WO2022181203A1 - ショットキーバリアダイオード - Google Patents
ショットキーバリアダイオード Download PDFInfo
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- WO2022181203A1 WO2022181203A1 PCT/JP2022/003329 JP2022003329W WO2022181203A1 WO 2022181203 A1 WO2022181203 A1 WO 2022181203A1 JP 2022003329 W JP2022003329 W JP 2022003329W WO 2022181203 A1 WO2022181203 A1 WO 2022181203A1
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- Prior art keywords
- trench
- schottky barrier
- barrier diode
- outer peripheral
- anode electrode
- Prior art date
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- 230000004888 barrier function Effects 0.000 title claims abstract description 78
- 230000002093 peripheral effect Effects 0.000 claims abstract description 94
- 239000004065 semiconductor Substances 0.000 claims abstract description 22
- 239000000758 substrate Substances 0.000 claims abstract description 21
- AJNVQOSZGJRYEI-UHFFFAOYSA-N digallium;oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[Ga+3].[Ga+3] AJNVQOSZGJRYEI-UHFFFAOYSA-N 0.000 claims abstract description 17
- 229910001195 gallium oxide Inorganic materials 0.000 claims abstract description 16
- 230000005684 electric field Effects 0.000 abstract description 29
- 230000015556 catabolic process Effects 0.000 abstract description 14
- 238000009413 insulation Methods 0.000 abstract description 3
- 239000010408 film Substances 0.000 description 65
- 239000010931 gold Substances 0.000 description 8
- 238000004088 simulation Methods 0.000 description 8
- 239000010936 titanium Substances 0.000 description 7
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 6
- 229910052737 gold Inorganic materials 0.000 description 6
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 6
- 239000010949 copper Substances 0.000 description 5
- 239000002019 doping agent Substances 0.000 description 5
- 239000000463 material Substances 0.000 description 5
- 229910052751 metal Inorganic materials 0.000 description 5
- 239000002184 metal Substances 0.000 description 5
- 230000004048 modification Effects 0.000 description 5
- 238000012986 modification Methods 0.000 description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 230000000052 comparative effect Effects 0.000 description 4
- 229910052763 palladium Inorganic materials 0.000 description 4
- 229910052814 silicon oxide Inorganic materials 0.000 description 4
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 3
- 229910052697 platinum Inorganic materials 0.000 description 3
- 229910052719 titanium Inorganic materials 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- 239000012141 concentrate Substances 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 229910052750 molybdenum Inorganic materials 0.000 description 2
- 239000011733 molybdenum Substances 0.000 description 2
- 229910005191 Ga 2 O 3 Inorganic materials 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 238000002248 hydride vapour-phase epitaxy Methods 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 239000000155 melt Substances 0.000 description 1
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000001451 molecular beam epitaxy Methods 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 238000004549 pulsed laser deposition Methods 0.000 description 1
- 238000005546 reactive sputtering Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/24—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/872—Schottky diodes
- H01L29/8725—Schottky diodes of the trench MOS barrier type [TMBS]
Definitions
- the present invention relates to Schottky barrier diodes, and more particularly to Schottky barrier diodes using gallium oxide.
- a Schottky barrier diode is a rectifying element that utilizes a Schottky barrier formed by a junction between a metal and a semiconductor, and is characterized by a lower forward voltage and a faster switching speed than ordinary diodes having a PN junction. is doing. Therefore, Schottky barrier diodes are sometimes used as switching elements for power devices.
- gallium oxide has a very large bandgap of 4.8 to 4.9 eV and a large breakdown electric field of about 8 MV/cm. It is very promising as a device.
- An example of a Schottky barrier diode using gallium oxide is described in Patent Document 1.
- the Schottky barrier diode described in Patent Document 1 has a structure in which a plurality of trenches are provided in a gallium oxide layer and part of the anode electrode is embedded in the trenches via an insulating film.
- a plurality of trenches are provided in the gallium oxide layer, the mesa regions located between the trenches become depletion layers when a reverse voltage is applied, so that the channel region of the drift layer is pinched off.
- leak current when a reverse voltage is applied can be greatly suppressed.
- an object of the present invention is to prevent dielectric breakdown in a Schottky barrier diode using gallium oxide by alleviating the electric field generated when a reverse voltage is applied.
- a Schottky barrier diode comprises a semiconductor substrate made of gallium oxide, a drift layer made of gallium oxide provided on the semiconductor substrate, an anode electrode in Schottky contact with the drift layer, and a cathode in ohmic contact with the semiconductor substrate.
- an electrode and an insulating film covering the inner wall of a trench provided in the drift layer, the trench including a ring-shaped peripheral trench and a central trench formed in a region surrounded by the peripheral trench; A part of the electrode is embedded in the outer trench and the central trench through the insulating film, and the thickness of the insulating film in the depth direction of the outer trench increases toward the outside, thereby forming the anode embedded in the outer trench.
- the outer peripheral wall of the electrode is characterized by having a curved shape that becomes closer to being vertical toward the outside.
- the outer peripheral wall of the anode electrode embedded in the outer peripheral trench has a curved shape that becomes nearly vertical toward the outside, when a reverse voltage is applied, the outer peripheral bottom of the outer peripheral trench The electric field generated in the
- the inner peripheral wall of the anode electrode embedded in the outer trench may be closer to the vertical than the outer peripheral wall. According to this, it is possible to reliably pinch off the mesa region between the central trench and the peripheral trench.
- the width of the outer trench may be wider than the width of the central trench. According to this, the electric field generated at the outer peripheral bottom portion of the outer peripheral trench can be further alleviated.
- the peripheral trench may be deeper than the central trench. According to this, the electric field generated at the outer peripheral bottom portion of the outer peripheral trench can be further alleviated.
- the upper surface of the drift layer located outside the outer peripheral trench may be covered with an insulating film. According to this, the upper surface of the drift layer is protected by the insulating film.
- At least a portion of the insulating film covering the inner wall of the outer trench may have a multilayer structure. According to this, it becomes easy to adjust the film thickness and characteristics of the insulating film.
- FIG. 1 is a schematic plan view showing the configuration of a Schottky barrier diode 11 according to a first embodiment of the invention.
- FIG. 2 is a schematic cross-sectional view along line AA shown in FIG.
- FIG. 3 is a schematic cross-sectional view showing the configuration of a Schottky barrier diode 10 according to a comparative example.
- FIG. 4 is a schematic cross-sectional view showing the configuration of a Schottky barrier diode 12 according to a second embodiment of the invention.
- FIG. 5 is a schematic cross-sectional view showing the configuration of a Schottky barrier diode 13 according to a third embodiment of the invention.
- FIG. 1 is a schematic plan view showing the configuration of a Schottky barrier diode 11 according to a first embodiment of the invention.
- FIG. 2 is a schematic cross-sectional view along line AA shown in FIG.
- FIG. 3 is a schematic cross-sectional view showing the configuration of a Schottky barrier
- FIG. 6 is a schematic cross-sectional view showing the configuration of a Schottky barrier diode 14 according to a fourth embodiment of the invention.
- FIG. 7 is a schematic cross-sectional view showing the configuration of a Schottky barrier diode 14a according to a modification of the fourth embodiment.
- FIG. 8 is a schematic cross-sectional view showing the configuration of a Schottky barrier diode 15 according to a fifth embodiment of the invention.
- FIG. 9 is a schematic cross-sectional view showing the configuration of a Schottky barrier diode 16 according to a sixth embodiment of the invention.
- FIG. 10 is a schematic cross-sectional view showing the configuration of a Schottky barrier diode 17 according to the seventh embodiment of the invention.
- FIG. 10 is a schematic cross-sectional view showing the configuration of a Schottky barrier diode 17 according to the seventh embodiment of the invention.
- FIG. 11 is a schematic cross-sectional view showing the configuration of a Schottky barrier diode 18 according to an eighth embodiment of the invention.
- FIG. 12 is a schematic cross-sectional view showing the configuration of a Schottky barrier diode 18a according to a modification of the eighth embodiment.
- FIG. 13 is a schematic cross-sectional view showing the configuration of a Schottky barrier diode 19 according to the ninth embodiment of the invention.
- FIG. 14 is a schematic diagram for explaining parameters of Example 1.
- FIG. 15 is a graph showing simulation results of Example 1.
- FIG. 16 is a graph showing simulation results of Example 2.
- FIG. 17 is a table showing simulation results of Example 3.
- FIG. 15 is a graph showing simulation results of Example 1.
- FIG. 16 is a graph showing simulation results of Example 2.
- FIG. 17 is a table showing simulation results of Example 3.
- FIG. 1 is a schematic plan view showing the configuration of a Schottky barrier diode 11 according to a first embodiment of the invention.
- 2 is a schematic cross-sectional view along line AA shown in FIG.
- the Schottky barrier diode 11 includes a semiconductor substrate 20 and a drift layer 30 both made of gallium oxide ( ⁇ -Ga 2 O 3 ). Silicon (Si) or tin (Sn) is introduced into the semiconductor substrate 20 and the drift layer 30 as an n-type dopant. The dopant concentration is higher in the semiconductor substrate 20 than in the drift layer 30, so that the semiconductor substrate 20 functions as an n + layer and the drift layer 30 functions as an n ⁇ layer.
- the semiconductor substrate 20 is obtained by cutting a bulk crystal formed using a melt growth method or the like, and its thickness is about 250 ⁇ m.
- the planar size of the semiconductor substrate 20 is not particularly limited, but is generally selected according to the amount of current flowing through the element. It may be about 2.4 mm.
- the semiconductor substrate 20 has an upper surface 21 positioned on the upper surface side during mounting, and a back surface 22 positioned on the lower surface side during mounting on the opposite side of the upper surface 21 .
- a drift layer 30 is formed on the entire upper surface 21 .
- the drift layer 30 is a thin film obtained by epitaxially growing gallium oxide on the upper surface 21 of the semiconductor substrate 20 using reactive sputtering, PLD, MBE, MOCVD, HVPE, or the like. Although the thickness of the drift layer 30 is not particularly limited, it is generally selected according to the reverse withstand voltage of the device.
- An anode electrode 40 is formed on the upper surface 31 of the drift layer 30 to make Schottky contact with the drift layer 30 .
- the anode electrode 40 is made of metal such as platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), molybdenum (Mo), and copper (Cu).
- the anode electrode 40 may be a multilayer structure in which different metal films are laminated, such as Pt/Au, Pt/Al, Pd/Au, Pd/Al, Pt/Ti/Au or Pd/Ti/Au.
- the back surface 22 of the semiconductor substrate 20 is provided with a cathode electrode 50 that makes ohmic contact with the semiconductor substrate 20 .
- the cathode electrode 50 is made of metal such as titanium (Ti).
- the cathode electrode 50 may have a multi-layer structure in which different metal films are laminated, such as Ti/Au or Ti/Al.
- trenches 61 and 62 are provided in the drift layer 30 .
- the trenches 61 and 62 are both provided at positions overlapping the anode electrode 40 in plan view.
- the trench 61 is a peripheral trench formed in a ring shape
- the trench 62 is a central trench formed in a region surrounded by the peripheral trench.
- the peripheral trench 61 and the central trench 62 do not need to be completely separated, and may be connected to each other as shown in FIG. In this embodiment, the peripheral trench 61 and the central trench 62 have the same depth.
- the inner walls of the trenches 61 and 62 are covered with an insulating film 63 made of HfO 2 or the like, and the inside of the trenches 61 and 62 is filled with the same material as the anode electrode 40 via the insulating film 63 .
- the material of the anode electrode 40 is a material with a low work function such as molybdenum (Mo) or copper (Cu). I don't mind.
- the dopant concentration of the drift layer 30 can be increased to approximately 4 ⁇ 10 16 cm ⁇ 3 .
- a portion of the drift layer 30 partitioned by the trenches 61 and 62 forms a mesa region M. Since the mesa region M becomes a depletion layer when a reverse voltage is applied between the anode electrode 40 and the cathode electrode 50, the channel region of the drift layer 30 is pinched off. As a result, leak current when a reverse voltage is applied is greatly suppressed.
- the width of the peripheral trench 61 along line AA is W1 and the width of the central trench 62 is W2, W1 > W2 is set to
- the width W1 of the outer trench 61 indicates the width in the radial direction
- the width W2 of the center trench 62 indicates the width in the mesa width direction.
- the insulating film 63 covering the inner wall of the outer trench 61 has a thickness in the depth direction (that is, in the vertical direction) that increases radially outward.
- the thickness of the insulating film 63 in the direction perpendicular to the outer peripheral wall of the outer trench 61 increases as the depth position increases.
- the increase in thickness is quadratic, and as a result, the outer peripheral wall S1 of the anode electrode 40 embedded in the outer trench 61 assumes a gently curved shape that becomes closer to vertical toward the outside.
- the thickness in the horizontal direction of the insulating film 63 formed on the inner peripheral wall of the outer trench 61 is substantially constant, so that the inner peripheral wall S2 of the anode electrode 40 is more vertical than the outer peripheral wall S1 of the anode electrode 40.
- the outer peripheral wall S1 of the anode electrode 40 has a small angle with respect to the upper surface 31 of the drift layer 30 near the boundary with the inner peripheral wall S2, but the angle with respect to the upper surface 31 of the drift layer 30 gradually increases toward the outside. , are substantially vertical in the vicinity of the upper surface 31 of the drift layer 30 .
- the inner peripheral wall S2 of the anode electrode 40 is almost vertical although it is slightly curved in the vicinity of the boundary with the outer peripheral wall S1.
- the cross section in the radial direction of the anode electrode 40 embedded in the outer trench 61 is asymmetrical.
- the width W1 of the outer trench 61 is set larger than the width W2 of the central trench 62 is that a sufficient radial space for gently curving the outer peripheral wall S1 of the anode electrode 40 is provided. This is to ensure
- the insulating film 63 having such a shape can be formed, for example, by film formation or etching in multiple stages using a plurality of masks.
- FIG. 3 is a schematic cross-sectional view showing the configuration of a Schottky barrier diode 10 according to a comparative example.
- the thickness of the insulating film 63 in the direction perpendicular to the wall surface of the outer trench 61 is constant.
- the cross section in the radial direction of the anode electrode 40 embedded in the outer trench 61 is symmetrical, and both the outer peripheral wall S1 and the inner peripheral wall S2 are substantially vertical.
- the radius of curvature of the outer peripheral bottom portion A located between the outer peripheral wall S1 and the bottom portion S3 of the anode electrode 40 becomes small, the electric field concentrates on this portion, and dielectric breakdown may occur in some cases.
- the cross section in the radial direction of the anode electrode 40 embedded in the outer trench 61 is asymmetrical, and the outer peripheral wall S1 of the anode electrode 40 itself has a large radius of curvature. Due to the curved surface, the electric field is widely distributed.
- the radius of curvature of the inner peripheral bottom portion B located at the boundary between the outer peripheral wall S1 and the inner peripheral wall S2 is relatively small, the outer peripheral wall S1 itself having the large curvature radius disperses the electric field. Almost no electric field concentration at the bottom B occurs.
- the inner peripheral wall S2 is substantially perpendicular to the upper surface 31 of the drift layer 30, the distance between the anode electrode 40 embedded in the outer peripheral trench 61 and the anode electrode 40 embedded in the central trench 62 is too large. never. Therefore, the channel region of the drift layer 30 can be reliably pinched off when a reverse voltage is applied.
- the outer peripheral wall S1 of the anode electrode 40 itself forms a curved surface having a large radius of curvature by controlling the film thickness of the insulating film 63. Local electric field concentration is less likely to occur even when a reverse voltage is applied. This makes it possible to prevent dielectric breakdown at the outer peripheral bottom portion of the outer peripheral trench 61, which is likely to occur when a reverse voltage is applied. Moreover, since the outer trench 61 and the central trench 62 have the same shape except for the width, they can be formed at the same time.
- FIG. 4 is a schematic cross-sectional view showing the configuration of a Schottky barrier diode 12 according to a second embodiment of the invention.
- the Schottky barrier diode 12 according to the second embodiment differs from the Schottky barrier diode 11 according to the first embodiment in that the anode electrode 40 has a substantially flat bottom surface portion S3. are different. Since other basic configurations are the same as those of the Schottky barrier diode 11 according to the first embodiment, the same elements are denoted by the same reference numerals, and overlapping descriptions are omitted.
- the substantially flat bottom surface portion S3 may exist between the outer peripheral wall S1 and the inner peripheral wall S2 of the anode electrode 40.
- FIG. 5 is a schematic cross-sectional view showing the configuration of a Schottky barrier diode 13 according to a third embodiment of the invention.
- the depth D1 of the peripheral trench 61 is deeper than the depth D2 of the central trench 62, which is the same as the Schottky barrier diode 13 according to the first embodiment.
- Diode 11 is different. Since other basic configurations are the same as those of the Schottky barrier diode 11 according to the first embodiment, the same elements are denoted by the same reference numerals, and overlapping descriptions are omitted.
- the depth D1 of the outer trench 61 is deeper than the depth D2 of the central trench 62, the radius of curvature of the outer peripheral wall S1 of the anode electrode 40 becomes larger, so that the electric field is more concentrated. mitigated.
- the depth D1 of the outer peripheral trench 61 is too deep, the remaining film of the drift layer 30 located at the bottom of the outer peripheral trench 61 will be too thin, and the electric field will be rather strong. Therefore, it is preferable to set the depth D1 of the outer peripheral trench 61 to a range in which the thickness of the drift layer 30 positioned at the bottom of the outer peripheral trench 61 is 1 ⁇ m or more.
- FIG. 6 is a schematic cross-sectional view showing the configuration of a Schottky barrier diode 14 according to a fourth embodiment of the invention.
- the Schottky barrier diode 14 according to the fourth embodiment is different from the first embodiment in that the upper surface 31 of the drift layer 30 located outside the outer peripheral trench 61 is covered with an insulating film 63 . It differs from the Schottky barrier diode 11 in terms of form. Since other basic configurations are the same as those of the Schottky barrier diode 11 according to the first embodiment, the same elements are denoted by the same reference numerals, and overlapping descriptions are omitted.
- the insulating film 63 is formed not only on the inner walls of the trenches 61 and 62 but also on the upper surface 31 of the drift layer 30 located outside the outer peripheral trench 61, the upper surface 31 of the drift layer 30 is protected. becomes possible.
- FIG. 7 is a schematic cross-sectional view showing the configuration of a Schottky barrier diode 14a according to a modification of the fourth embodiment.
- the Schottky barrier diode 14a shown in FIG. 7 a portion of the anode electrode 40 located above the outer trench 61 is removed, and an insulating film 63 is provided in the portion where the anode electrode 40 is removed.
- the upper surface of the anode electrode 40 need not be flat and may be partially removed.
- FIG. 8 is a schematic cross-sectional view showing the configuration of a Schottky barrier diode 15 according to a fifth embodiment of the invention.
- the Schottky barrier diode 15 according to the fifth embodiment is different from the first embodiment in that a part of the anode electrode 40 is formed on the insulating film 63 beyond the outer trench 61 . is different from the Schottky barrier diode 11 by Since other basic configurations are the same as those of the Schottky barrier diode 11 according to the first embodiment, the same elements are denoted by the same reference numerals, and overlapping descriptions are omitted.
- a part of the anode electrode 40 may be formed on the insulating film 63 beyond the peripheral trench 61 .
- FIG. 9 is a schematic cross-sectional view showing the configuration of a Schottky barrier diode 16 according to a sixth embodiment of the invention.
- the Schottky barrier diode 16 according to the sixth embodiment is similar to the Schottky barrier diode 16 according to the first embodiment in that a portion of the anode electrode 40 located in the outer peripheral trench 61 is removed. Diode 11 is different. Since other basic configurations are the same as those of the Schottky barrier diode 11 according to the first embodiment, the same elements are denoted by the same reference numerals, and overlapping descriptions are omitted.
- the inside of the outer peripheral trench 61 does not need to be filled with the anode electrode 40, and a cavity may partially exist.
- FIG. 10 is a schematic cross-sectional view showing the configuration of a Schottky barrier diode 17 according to the seventh embodiment of the invention.
- the Schottky barrier diode 17 according to the seventh embodiment is similar to the Schottky barrier diode 17 according to the sixth embodiment in that a part of the insulating film 63 covering the outer peripheral wall of the outer trench is exposed. Diode 16 is different. Since other basic configurations are the same as those of the Schottky barrier diode 16 according to the sixth embodiment, the same elements are denoted by the same reference numerals, and overlapping descriptions are omitted.
- the insulating film 63 covering the outer peripheral wall of the outer trench 61 does not need to be entirely covered with the anode electrode 40, and a part of the insulating film 63 may be exposed.
- FIG. 11 is a schematic cross-sectional view showing the configuration of a Schottky barrier diode 18 according to an eighth embodiment of the invention.
- the Schottky barrier diode 18 according to the eighth embodiment differs from the seventh embodiment in that the upper portion of the outer peripheral wall of the outer trench 61 is exposed without being covered with the insulating film 63. It differs from the Schottky barrier diode 17 .
- Other basic configurations are the same as those of the Schottky barrier diode 17 according to the seventh embodiment.
- the outer peripheral wall of the outer trench 61 does not need to be entirely covered with the insulating film 63, and the upper portion may be partially exposed.
- FIG. 12 is a schematic cross-sectional view showing the configuration of a Schottky barrier diode 18a according to a modification of the eighth embodiment.
- FIG. 13 is a schematic cross-sectional view showing the configuration of a Schottky barrier diode 19 according to the ninth embodiment of the invention.
- the Schottky barrier diode 19 according to the ninth embodiment differs from the first embodiment in that an insulating film 64 separate from the insulating film 63 is provided inside the outer trench 61. It differs from the Schottky barrier diode 11 . Since other basic configurations are the same as those of the Schottky barrier diode 11 according to the first embodiment, the same elements are denoted by the same reference numerals, and overlapping descriptions are omitted.
- the insulating film 64 is made of an insulating material different from that of the insulating film 63, such as SiO 2 , and its thickness in the depth direction (that is, in the vertical direction) increases toward the outer side in the radial direction. In contrast, the thickness of the insulating film 63 is substantially constant in the direction perpendicular to the inner wall of the outer trench 61 .
- Example 1 Assuming the simulation model of Example 1 having the same structure as the Schottky barrier diode 19 shown in FIG. .
- the dopant concentration of the semiconductor substrate 20 was set to 1 ⁇ 10 18 cm ⁇ 3 and the dopant concentration of the drift layer 30 was set to 4 ⁇ 10 16 cm ⁇ 3 .
- the thickness of the drift layer 30 was set to 7 ⁇ m. Further, the depths of the peripheral trench 61 and the central trench 62 are both set to 3 ⁇ m.
- the width W1 of the outer trench 61 was 10 ⁇ m, and the width W2 of the central trench 62 and the width of the drift layer 30 in contact with the anode electrode 40, that is, the width of the mesa region M were all 1.5 ⁇ m.
- the insulating film 63 was a HfO 2 film with a thickness of 50 nm.
- the material of the anode electrode 40 was Cu, and the material of the cathode electrode 50 was a laminated film of Ti and Au.
- a SiO 2 film was used as the insulating film 64 covering the bottom surface and the outer peripheral wall of the outer trench 61, and the simulation was performed using the shape as a variable.
- FIG. 14 is a schematic diagram for explaining the parameters of Example 1.
- the maximum width in the radial direction of the anode electrode 40 embedded in the outer trench 61 is defined as a, and the maximum depth as b.
- the film thickness of the insulating film 63 covering the inner peripheral wall of the outer peripheral trench 61 is t1
- the minimum film thickness of the insulating films 63 and 64 covering the bottom surface of the outer peripheral trench 61 is t2
- the insulating film 63 covering the outer peripheral wall of the outer peripheral trench 61 is t2.
- 64 was defined as t3.
- Example 1 the width a and the film thickness t3 were used as variables, and the depth b was fixed at 2.4 ⁇ m, the film thickness t1 was fixed at 0.05 ⁇ m, and the film thickness t2 was fixed at 0.6 ⁇ m.
- the maximum electric field intensity (Emax) applied to the insulating film 64 is equal to that of the silicon oxide insulation. It exceeded 10 MV/cm which is the breakdown electric field intensity.
- the maximum electric field intensity applied to the insulating film 64 exceeded 10 MV/cm, which is the dielectric breakdown electric field intensity of silicon oxide.
- the maximum electric field intensity applied to the drift layer 30 was 8 MV/cm or less, which is the dielectric breakdown electric field intensity of gallium oxide, regardless of the width a of the anode electrode 40 .
- Example 2 The simulation was performed under the same conditions as in Example 1 except that the width b and the film thickness t2 were used as variables, the width a was fixed at 4.95 ⁇ m, the film thickness t1 was fixed at 0.05 ⁇ m, and the film thickness t3 was fixed at 5 ⁇ m. .
- the maximum electric field strength applied to the insulating film 64 is equal to the dielectric breakdown electric field strength of silicon oxide. It exceeded 10 MV/cm.
- the maximum electric field intensity applied to the drift layer 30 exceeded 8 MV/cm, which is the dielectric breakdown electric field intensity of gallium oxide.
- Example 3 The simulation was performed under the same conditions as in Example 2, except that the depth D1 of the peripheral trench 61 was set to 4 ⁇ m, 5 ⁇ m, or 6 ⁇ m.
- the maximum electric field intensity applied to the insulating film 64 is 10 MV/cm, which is the dielectric breakdown electric field intensity of silicon oxide. Beyond. Further, the intensity of the electric field applied to the drift layer 30 is moderated as the depth D1 of the outer trench 61 becomes deeper.
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Abstract
Description
図1は、本発明の第1の実施形態によるショットキーバリアダイオード11の構成を示す模式的な平面図である。また、図2は、図1に示すA-A線に沿った略断面図である。
W1>W2
に設定されている。ここで、外周トレンチ61の幅W1とは径方向における幅を指し、中心トレンチ62の幅W2とはメサ幅方向における幅を指す。
図4は、本発明の第2の実施形態によるショットキーバリアダイオード12の構成を示す略断面図である。
図5は、本発明の第3の実施形態によるショットキーバリアダイオード13の構成を示す略断面図である。
図6は、本発明の第4の実施形態によるショットキーバリアダイオード14の構成を示す略断面図である。
図8は、本発明の第5の実施形態によるショットキーバリアダイオード15の構成を示す略断面図である。
図9は、本発明の第6の実施形態によるショットキーバリアダイオード16の構成を示す略断面図である。
図10は、本発明の第7の実施形態によるショットキーバリアダイオード17の構成を示す略断面図である。
図11は、本発明の第8の実施形態によるショットキーバリアダイオード18の構成を示す略断面図である。
図13は、本発明の第9の実施形態によるショットキーバリアダイオード19の構成を示す略断面図である。
図13に示したショットキーバリアダイオード19と同じ構造を有する実施例1のシミュレーションモデルを想定し、アノード電極40とカソード電極50の間に600Vの逆方向電圧を印加した場合の電界強度をシミュレーションした。半導体基板20のドーパント濃度については1×1018cm-3とし、ドリフト層30のドーパント濃度としては4×1016cm-3とした。ドリフト層30の厚みは7μmとした。また、外周トレンチ61及び中心トレンチ62の深さはいずれも3μmとした。外周トレンチ61の幅W1については10μmとし、中心トレンチ62の幅W2、並びに、アノード電極40と接する部分におけるドリフト層30の幅、つまりメサ領域Mの幅については、いずれも1.5μmとした。絶縁膜63は厚さ50nmのHfO2膜とした。アノード電極40の材料はCuとし、カソード電極50の材料はTiとAuの積層膜とした。そして、外周トレンチ61の底面部及び外周壁を覆う絶縁膜64をSiO2膜とし、その形状を変数としてシミュレーションを行った。
図3に示したショットキーバリアダイオード10と同じ構造を有する比較例1のシミュレーションモデルを想定し、実施例1と同じ条件でシミュレーションを行った。外周トレンチ61に埋め込まれたアノード電極40の形状は対称形であり、幅aは9.9μm、深さbは2.95μm、膜厚t1~t3はいずれも0.05μmである。その結果、図3に示す外周底部Aにおける最大電界強度は8.6MV/cmであった。
幅b及び膜厚t2を変数とし、幅aについては4.95μm、膜厚t1については0.05μm、膜厚t3については5μmに固定した他は、実施例1と同じ条件でシミュレーションを行った。
外周トレンチ61の深さD1を4μm、5μm又は6μmとした他は、実施例2と同じ条件でシミュレーションを行った。
20 半導体基板
21 半導体基板の上面
22 半導体基板の裏面
30 ドリフト層
31 ドリフト層の上面
40 アノード電極
50 カソード電極
61 外周トレンチ
62 中心トレンチ
63,64 絶縁膜
A 外周底部
B 内周底部
M メサ領域
S1 外周壁
S2 内周壁
S3 底面部
Claims (6)
- 酸化ガリウムからなる半導体基板と、
前記半導体基板上に設けられた酸化ガリウムからなるドリフト層と、
前記ドリフト層とショットキー接触するアノード電極と、
前記半導体基板とオーミック接触するカソード電極と、
前記ドリフト層に設けられたトレンチの内壁を覆う絶縁膜と、を備え、
前記トレンチは、リング状に形成された外周トレンチと、前記外周トレンチに囲まれた領域に形成された中心トレンチとを含み、
前記アノード電極の一部は、前記絶縁膜を介して前記外周トレンチ及び前記中心トレンチ内に埋め込まれ、
前記絶縁膜は、外側に向かうにつれて前記外周トレンチの深さ方向における厚みが厚くなり、これにより前記外周トレンチに埋め込まれた前記アノード電極の外周壁は、外側に向かうにつれて垂直に近くなる湾曲形状を有していることを特徴とするショットキーバリアダイオード。 - 前記外周トレンチに埋め込まれた前記アノード電極の内周壁は、前記外周壁よりも垂直に近いことを特徴とする請求項1に記載のショットキーバリアダイオード。
- 前記外周トレンチの幅は、前記中心トレンチの幅よりも広いことを特徴とする請求項1又は2に記載のショットキーバリアダイオード。
- 前記外周トレンチは、前記中心トレンチよりも深いことを特徴とする請求項1乃至3のいずれか一項に記載のショットキーバリアダイオード。
- 前記外周トレンチの外側に位置する前記ドリフト層の上面が前記絶縁膜で覆われていることを特徴とする請求項1乃至4のいずれか一項に記載のショットキーバリアダイオード。
- 前記絶縁膜のうち少なくとも前記外周トレンチの内壁を覆う部分が多層構造を有していることを特徴とする請求項1乃至5のいずれか一項に記載のショットキーバリアダイオード。
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EP22759244.1A EP4300586A1 (en) | 2021-02-25 | 2022-01-28 | Schottky barrier diode |
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