WO2022166901A1 - 过流保护电路及其控制方法 - Google Patents

过流保护电路及其控制方法 Download PDF

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Publication number
WO2022166901A1
WO2022166901A1 PCT/CN2022/075058 CN2022075058W WO2022166901A1 WO 2022166901 A1 WO2022166901 A1 WO 2022166901A1 CN 2022075058 W CN2022075058 W CN 2022075058W WO 2022166901 A1 WO2022166901 A1 WO 2022166901A1
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Prior art keywords
circuit
signal
overcurrent protection
control signal
gate
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PCT/CN2022/075058
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English (en)
French (fr)
Inventor
邓国健
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广州视源电子科技股份有限公司
广州视琨电子科技有限公司
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Publication of WO2022166901A1 publication Critical patent/WO2022166901A1/zh

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H3/00—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection
    • H02H3/08—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to excess current
    • H02H3/087—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to excess current for dc applications
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H3/00—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection
    • H02H3/08—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to excess current
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H7/00—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
    • H02H7/10—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers
    • H02H7/12—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H7/00—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
    • H02H7/10—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers
    • H02H7/12—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers
    • H02H7/1213—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers for DC-DC converters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/32—Means for protecting converters other than automatic disconnection

Definitions

  • the present disclosure relates to the technical field of circuits, and in particular, to an overcurrent protection circuit and a control method thereof.
  • the overcurrent protection is realized by limiting the FET current on the primary side of the transformer cycle by cycle according to the sampling voltage of the primary circuit of the transformer.
  • the existing overcurrent protection circuit has no temperature compensation, and the overcurrent protection point of the flyback converter does not change with temperature.
  • Figure 1 shows an overcurrent protection circuit in the prior art.
  • U1 is a comparator
  • U3 is a delay
  • U5 It is an inverter
  • U6 is an AND gate
  • CS is a voltage sampling terminal
  • the sampling voltage is input from the non-inverting input terminal of the comparator U1, and compared with the voltage reference REF1 at the inverting input terminal of the comparator U1, when the sampling voltage is greater than the REF1 voltage
  • the comparator U1 outputs a high-level signal.
  • the low-level signal is used as the input of the AND gate U6, and the U6 output is low. Drive signal to realize overcurrent protection of transformer.
  • the overcurrent protection point In the drive circuit of the TV board, in order to meet the dynamic requirements of the TV board, the overcurrent protection point is set to more than 1.5 times the rated current value. However, when the working current of the transformer is greater than the rated current, the overcurrent protection point is not reached. When the temperature rise of the transformer is large or even burned out. In addition, in the safety test standard, if the temperature rise of the transformer exceeds 125° before overcurrent protection, it does not meet the requirements of the safety test standard.
  • the embodiments of the present disclosure provide an overcurrent protection circuit and a control method thereof, so as to at least solve the problem that when the working current of the transformer in the prior art is greater than the rated current, and the overcurrent protection point is smaller than the overcurrent protection point, the transformer may cause the transformer to fail to trigger the overcurrent protection.
  • an overcurrent protection circuit including: a sampling circuit, connected to a target object, and configured to collect a voltage of the target object to obtain a sampling voltage; a comparison circuit, including a first comparison circuit and a second comparison circuit, the first comparison circuit is configured to compare the sampled voltage with the first reference voltage to obtain the first control signal, and the second comparison circuit is configured to compare the sampled voltage with the second reference voltage to obtain the second control signal signal, wherein the second reference voltage is lower than the first reference voltage; the logic control circuit, connected to the output end of the comparison circuit, is configured to output a protection signal according to the first control signal and the second control signal, wherein the protection signal is configured as Trigger overcurrent protection on the target object.
  • a method for controlling an overcurrent protection circuit including: collecting a voltage of a target object to obtain a sampled voltage; comparing the sampled voltage with a first reference voltage to obtain a first control signal; comparing the voltage with the second reference voltage to obtain a second control signal, wherein the second reference voltage is smaller than the first reference voltage; outputting a protection signal according to the first control signal and the second control signal, wherein the protection signal is configured to trigger the target Object overcurrent protection.
  • a board card of a display device including any one of the above-mentioned overcurrent protection circuits.
  • a display device including the above-mentioned board card of the display device.
  • a comparison circuit including a first comparison circuit and a second comparison circuit is provided in the overcurrent protection circuit, and the second reference voltage is lower than the first reference voltage, according to the first control signal output by the first comparison circuit and the second control signal output by the second comparison circuit to trigger the overcurrent protection.
  • FIG. 1 is a schematic diagram of an overcurrent protection circuit according to the prior art
  • FIG. 2 is a schematic diagram of an overcurrent protection circuit according to an embodiment of the present disclosure
  • FIG. 3 is a schematic diagram of an optional overcurrent protection circuit according to an embodiment of the present disclosure.
  • FIG. 4 is a schematic diagram of an optional overcurrent protection circuit according to an embodiment of the present disclosure.
  • FIG. 5 is a flowchart of a control method of an overcurrent protection circuit according to an embodiment of the present disclosure.
  • FIG. 2 is a schematic diagram of an overcurrent protection circuit according to an embodiment of the present disclosure.
  • the above-mentioned overcurrent protection circuit includes: a sampling circuit 21 , Connected to the target object 20 and configured to collect the voltage of the target object 20 to obtain a sampled voltage; the comparison circuit 22 includes a first comparison circuit 221 and a second comparison circuit 222, and the first comparison circuit 221 is configured to compare the sampled voltage with The first reference voltage is compared to obtain the first control signal, and the second comparison circuit 222 is configured to compare the sampled voltage with the second reference voltage to obtain the second control signal, wherein the second reference voltage is smaller than the first reference voltage; logic control The circuit 23 , connected to the output terminal of the comparison circuit 22 , is configured to output a protection signal according to the first control signal and the second control signal, wherein the protection signal is configured to trigger the overcurrent protection of the target object 20 .
  • the above-mentioned target object is an object of overcurrent protection.
  • the above-mentioned target object may be a flyback transformer or a switching element.
  • the sampling circuit is connected to the target object to collect the sampling voltage of the target object.
  • the sampling circuit can collect the sampling voltage of the primary side of the flyback transformer through the sampling resistor connected to the primary side of the transformer.
  • the sampling voltage divided by the sampling resistance can obtain the transformer. Primary current value.
  • the second reference voltage is smaller than the first reference voltage, so that the comparison circuit can trigger the overcurrent protection when the sampling voltage is greater than any one of the second reference voltage and the first reference voltage.
  • the above-mentioned logic control circuit can be realized by hardware, for example, the logic control circuit realizes the trigger overcurrent protection of the first control signal and the second control signal by setting a NOR gate or an OR gate.
  • the logic control circuit can also be implemented by software, for example, the logic control circuit is a programmable logic controller, and the logic control of the first control signal and the second control signal triggers the overcurrent protection through a software program.
  • the above-mentioned overcurrent protection circuit is configured as the overcurrent protection of the drive circuit of the TV board card.
  • the load on the display screen and the power amplifier will be sharp.
  • the increase will lead to a large instantaneous load capacity of the board drive circuit (that is, the instantaneous high current generated by the dynamic load), but the instantaneous high current generated by the dynamic load of the board has a very short duration and will not cause the temperature of the circuit device to increase significantly. , there is no need for overcurrent protection.
  • the value of the first reference voltage is determined according to the instantaneous load capacity of the board drive circuit, so as to avoid the instantaneous high current caused by the dynamic load of the board drive circuit. trigger.
  • the overcurrent protection point corresponding to the first reference voltage is more than 1.5 times the rated current value.
  • the second reference voltage is determined according to the temperature rise of the board drive circuit under the overcurrent working state.
  • the temperature rise under the overcurrent working state can be understood as the board drive circuit can work normally under this temperature rise or meet the relevant standard conditions.
  • the transformer of the board drive circuit works within the overcurrent protection point determined according to the second reference voltage, and the temperature rise of the transformer will not cause damage to the transformer or exceed the test conditions of the safety standard.
  • the overcurrent protection circuit In the overcurrent protection circuit proposed in this embodiment, a comparison circuit including a first comparison circuit and a second comparison circuit is added, and the second reference voltage is lower than the first reference voltage. According to the first control signal output by the first comparison circuit and the second reference voltage The second control signal output from the comparison circuit triggers the overcurrent protection.
  • the overcurrent protection circuit not only meets the requirements of the board's dynamic load, but also prevents the components in the circuit from burning out or exceeding the temperature due to excessive temperature rise in the overcurrent state. It solves the problem of safety standards, and further solves the problem in the prior art that when the working current of the transformer is greater than the rated current and less than the overcurrent protection point, the temperature rise of the transformer is too high because the overcurrent protection cannot be triggered.
  • FIG. 3 provides a schematic diagram of an optional overcurrent protection circuit.
  • the first comparison circuit includes a first comparator U1
  • the second comparison circuit includes a second comparison circuit.
  • the non-inverting input terminal of the first comparator U1 and the non-inverting input terminal of the second comparator U2 are connected to the sampling circuit
  • the inverting input terminal of the first comparator U1 is connected to the first reference voltage circuit
  • the inverting terminal of the second comparator U2 is connected to the first reference voltage circuit.
  • the phase input terminal is connected to a second reference voltage circuit, wherein the first reference voltage circuit is configured to provide a first reference voltage REF1 and the second reference voltage circuit is configured to provide a second reference voltage REF2.
  • the first reference voltage circuit and the second reference voltage circuit can realize different reference voltages through the combination of different voltage dividing resistors.
  • the value of the voltage REF1 and the value of the second reference voltage REF2 determine the number and resistance of the voltage dividing resistors.
  • the non-inverting input terminals of the first comparator U1 and the second comparator U2 are connected to the same position of the sampling circuit to obtain the same sampling voltage, which is respectively the same as the value of the first reference voltage REF1 and the value of the first reference voltage REF1.
  • the values of the two reference voltages REF2 are compared to output the first control signal and the second control signal, and the protection signal is output according to the logic relationship set by the logic control circuit.
  • the second comparator U2 outputs a high level
  • the first comparator U1 outputs a low level
  • the logic control circuit can be based on the second comparator U2
  • the high level of the output triggers the overcurrent protection.
  • the overcurrent protection circuit further includes a delay circuit
  • the delay circuit includes: a first comparator disposed between the output end of the first comparison circuit and the input end of the logic control circuit a delay unit U3, and a second delay unit U4 arranged between the output end of the second comparison circuit and the input end of the logic control circuit; wherein the first delay unit is configured to delay the first control signal by a first time delay After the preset time T1, it is input to the logic control circuit, and the second delay unit U4 is configured to delay the second control signal for a second preset time T2 and then input it to the logic control circuit, and the second preset time T2 is greater than the first preset time. Set time T1.
  • the first comparison circuit may be a first comparator U1
  • the second comparison circuit may be a second comparator U2.
  • the first delay unit U3 and the second delay unit U4 may be implemented by hardware or by software.
  • the first delay unit U3 and the second delay unit U4 are timers, so as to delay the first control signal for T1 time and delay the second control signal for T2 time.
  • the first delay unit U3 is configured to delay the first control signal for a time T1, which means that when the duration of the first control signal exceeds T1, the first delay unit U3 can output a corresponding control signal For example, when the first comparator U1 outputs a high-level signal, and the duration of the high-level signal is greater than T1, the first delay unit U3 can output a high-level signal, otherwise, the high-level signal When the duration of the signal is less than T1, the first delay unit U3 outputs a low-level signal.
  • the above-mentioned second preset time T2 is determined according to the maximum time of the instantaneous load of the board card. Since the overcurrent protection point corresponding to the second reference voltage REF2 is smaller than the overcurrent protection point corresponding to the first reference voltage REF1 (the overcurrent protection point corresponding to the first reference voltage REF1 is determined according to the transient load capacity of the board), the second The overcurrent protection point corresponding to the reference voltage REF2 may be smaller than the instantaneous high current value caused by the dynamic load of the board, resulting in false triggering of the overcurrent protection.
  • the second preset time T2 should be greater than the maximum time of the instantaneous load of the board (ie The maximum duration of the instantaneous high current when the board is dynamically loaded), so that when the sampling voltage is greater than the second reference voltage REF2, and the duration of the sampling voltage must be greater than the second preset time T2, the second delay unit U4 will output a high-level signal to trigger the overcurrent protection, which avoids the false triggering of the overcurrent protection caused by the instantaneous high current caused by the dynamic load of the board.
  • the first preset time T1 may be set to the millisecond level
  • the second preset time T2 may be set to the second level, for example, the second preset time T2 is 10 seconds.
  • the preset time T2 is much larger than the maximum time of the instantaneous load of the board, which avoids the false trigger of overcurrent protection caused by the instantaneous high current caused by the dynamic load of the board, and satisfies the requirements of the components in the board drive circuit when the time is greater than the second time.
  • the overcurrent protection point corresponding to the reference voltage REF2 the operating temperature rise is higher, and the overcurrent protection is triggered.
  • the first preset time T1 is short, the circuit has an overcurrent protection greater than that corresponding to the first reference voltage REF1. When the current reaches the point, the overcurrent protection circuit can quickly trigger the overcurrent protection.
  • the logic control circuit includes an OR gate, two input ends of the OR gate are respectively connected to the output end of the first delay unit and the output end of the second delay unit, and the OR gate is configured to When any one of the first control signal and the second control signal after time is at a high level, a high level signal is output as a protection signal.
  • a first overcurrent protection point with a higher current value and a shorter delay is set as the overcurrent protection condition through the first comparator and the first delay unit, and the second comparison
  • the controller and the second delay unit set the second overcurrent protection point with a lower current value and a longer delay as the overcurrent protection condition, and the first overcurrent protection point is configured to trigger the overcurrent quickly when the circuit has a large current.
  • the second overcurrent protection point is configured to trigger the overcurrent protection when the temperature rises too high when the component works for a long time in an overcurrent state that is greater than the rated current and less than the first overcurrent protection point.
  • Overcurrent protection is triggered when one of the current protection conditions is met.
  • the logic control circuit is an OR gate
  • the OR gate when one of the first control signal and the second control signal is at a high level, the OR gate can output a high level as a protection signal, and can be configured to be turned off according to the high level Conditional protection circuit, for example, in a circuit using a PMOS field effect transistor as a switching device, its gate is turned off when it is at a high level to achieve overcurrent protection.
  • the output of the OR gate and the given signal are jointly input to the second OR gate (that is, another OR gate), and when the output of the OR gate is at a high level, No matter what level the given signal is, the second OR gate can output a high level as a protection signal.
  • the logic control circuit includes a NOR gate U5, and the two input ends of the NOR gate U5 are respectively connected to the output end of the first delay unit U3 and the second delay time
  • the output terminal of the unit U4, or the NOR gate U5 is configured to output a low-level signal as a protection signal when either one of the delayed first control signal and the second control signal is at a high level.
  • the logic control circuit is a NOR gate
  • the NOR gate when one of the first control signal and the second control signal is at a high level, the NOR gate can output a low level as a protection signal, and can be configured to act as a protection signal according to the low level
  • a protection circuit for shutdown conditions for example, in a circuit using an NMOS field effect transistor as a switching device, the gate is turned off when the gate is at a low level to achieve overcurrent protection.
  • the logic control circuit further includes an AND gate, one input terminal of the AND gate is connected to a NOR gate, another input terminal of the AND gate is connected to a given signal, and the NOR gate outputs a low level signal.
  • the AND gate outputs a low level signal as a protection signal.
  • the logic control circuit further includes an AND gate U6, one input end of the AND gate U6 is connected to the output end of the NOR gate U5, and the other input end of the AND gate U6 is connected to the When the NOR gate U5 outputs a low-level signal, the AND gate U6 outputs a low-level signal as a protection signal. When any of the input terminals of the AND gate U6 is a low-level signal, it outputs a low-level signal. Therefore, when the NOR gate U5 outputs a low-level signal, no matter what kind of signal the given signal GATE is, the AND gate U6 all output low level signal as protection signal.
  • the given signal GATE is the drive control signal of the circuit, for example, the given signal GATE is the PWM pulse control signal, and the switching device can be controlled according to the given signal GATE
  • the signal GATE controls the transformer to work.
  • the NOR gate U5 outputs a high level signal
  • the output of the AND gate U6 is consistent with the given signal GATE.
  • the NOR gate U5 outputs a low level signal
  • the output of the AND gate U6 is consistent with the given signal GATE.
  • the output is low, the switching device (eg, NMOS field effect transistor) is turned off, and the transformer does not work.
  • the overcurrent protection circuit further includes a field effect transistor, the gate of the field effect transistor is connected to the output end of the AND gate, the drain electrode of the field effect transistor is connected to the target object, and the source electrode of the field effect transistor is connected
  • the FET is configured to disconnect the driving signal of the target object according to the protection signal output by the output terminal of the AND gate.
  • the overcurrent protection circuit is configured as the overcurrent protection of the board drive circuit
  • the above-mentioned target object is the transformer in the flyback converter
  • the gate of the FET receives the drive signal to control the transformer to work
  • the gate of the FET The source is connected to the sampling circuit
  • the drain of the FET is connected to the primary coil of the transformer.
  • the field effect transistor can be a PMOS transistor or an NMOS transistor, which is specifically determined according to the level configured as a protection signal.
  • the field effect transistor is an NMOS transistor, and the gate of the NMOS transistor is connected to the output end of the AND gate U6.
  • the output of the AND gate U6 is the same as the given The signal GATE is consistent, the output of the AND gate U6 is the drive signal of the transformer, and the FET controls the transformer to work according to the given signal GATE; when the current of the transformer primary coil obtained by the sampling circuit exceeds the above-mentioned first overcurrent protection point condition or When the condition of the second overcurrent protection point is met, the AND gate U6 that triggers the above-mentioned overcurrent protection circuit outputs a low-level signal, and the NMOS transistor is turned off, thereby disconnecting the drive signal of the transformer.
  • the sampling circuit includes a first sampling resistor and a second sampling resistor, and the first sampling resistor and the second sampling resistor are connected in series between the non-inverting input terminal of the first comparator and the ground, and the first sampling resistor and the ground are connected in series.
  • a sampling point is between the resistor and the second sampling resistor, and the sampling point is configured to collect the voltage of the target object.
  • the current value of the target object can be represented by the voltage of the target object collected at the sampling point.
  • the voltage at the sampling point is the ground voltage of the second sampling resistor.
  • the resistance values of the first sampling resistor and the second sampling resistor are determined according to the voltage value corresponding to the preset overcurrent protection point and the second reference voltage. , which is not limited here.
  • the comparison circuit and the logic control circuit are integrated inside the control chip U101 , wherein the first comparison circuit and the second comparison circuit are collected by the chip selection signal terminal CS of the control chip U101
  • the voltage of the target object, the output end of the logic control circuit is the signal output end OUT of the control chip U101.
  • FIG. 4 is a schematic diagram of an optional overcurrent protection circuit.
  • the overcurrent protection circuit in FIG. 4 can be configured as a current-controlled flyback converter driven by a board card.
  • the first sampling The resistor R1 and the second sampling resistor R2 are connected in series between the chip select signal terminal CS of the control chip U101 and the ground SGND.
  • the sampling point is between the first sampling resistor R1 and the second sampling resistor R2, and the source of the FET Q1 is connected to the sampling point.
  • the drain of the FET Q1 is connected to the primary coil of the transformer T, and the chip select signal terminal CS of the control chip U101 is configured to collect the sampling voltage corresponding to the current of the primary coil of the transformer (that is, the voltage to ground of the second sampling resistor R2 ).
  • the signal output terminal OUT of the control chip U101 is connected to the gate of the field effect transistor Q1 through the resistor R3, and is configured to output the drive signal of the transformer.
  • the circuit structure inside the control chip U101 is shown in Figure 3.
  • the chip select signal terminal CS of the control chip U101 is connected to the non-inverting input terminal of the first comparator U1 and the non-inverting input terminal of the second comparator U2 at the same time.
  • the first reference voltage REF1 is set greater than the second reference voltage REF2
  • the output of the first comparator U1 is connected to the delay unit U3
  • the output of the second comparator U2 is connected to the delay unit U4
  • the delay time T1 is ms.
  • the delay time T2 is much longer than T1
  • the outputs of the delay unit U4 and the delay unit U3 are connected to the NOR gate U5, U5 and the driving signal Gate of the control chip are jointly input to the AND gate U6, and the output of the AND gate U6 is the control chip.
  • the first comparator U1 When the sampling voltage value obtained by the CS pin of the control chip U101 is greater than REF1, the first comparator U1 outputs a high-level signal to the delay unit U3, and if the duration of the high-level signal is greater than the delay time T1, the delay time The unit U3 outputs a high-level signal. Due to the short delay time T1 (for example, T1 can be set to ms level), the control chip U101 quickly triggers the over-current protection, and outputs a low-level signal through the signal output terminal OUT to trigger the over-current protection, and the field effect The tube is turned off and the transformer does not work.
  • T1 for example, T1 can be set to ms level
  • the second comparator U2 When the sampling voltage value obtained by the CS pin of the control chip U101 is less than REF1 and greater than REF2, the second comparator U2 outputs a high-level signal to the delay unit U4, if the duration of the high-level signal is greater than the delay time T2 , the delay unit U4 outputs a high level signal, the NOR gate U5 outputs a low level, and the AND gate U6 outputs a low level, the OUT of the control signal U101 outputs the driving signal of the FET Q1 is turned off, the transformer does not work, In order to achieve overcurrent protection.
  • the overcurrent protection circuit not only meets the requirements of the dynamic load of the board, but also prevents the components in the circuit from In the overcurrent state, the problem of burning out or exceeding the safety standard due to the high temperature rise is solved.
  • the overcurrent protection circuit when the working current of the transformer is greater than the rated current, when it is less than the overcurrent protection point, the overcurrent cannot be triggered. Protects the problem that the temperature rise of the transformer is too high.
  • FIG. 5 is a flowchart of a control method for an overcurrent protection circuit according to an embodiment of the present disclosure. As shown in FIG. 5 , the method includes the following steps :
  • Step S501 collecting the voltage of the target object to obtain a sampling voltage.
  • the above-mentioned target object is an object of overcurrent protection.
  • the above-mentioned target object may be a flyback transformer or a switching element.
  • the voltage of the above-mentioned target object can be collected by a sampling circuit.
  • the sampling circuit 21 is connected to the target object 20 to collect the sampled voltage of the target object 20.
  • the sampling circuit 21 can be connected to the primary side of the transformer.
  • the sampling resistor is used to collect the sampling voltage of the primary side of the flyback transformer, and the current value of the primary side of the transformer can be obtained by dividing the sampling voltage by the sampling resistor.
  • Step S502 comparing the sampled voltage with a first reference voltage to obtain a first control signal, and comparing the sampled voltage with a second reference voltage to obtain a second control signal, wherein the second reference voltage is smaller than the first reference voltage.
  • the second reference voltage is smaller than the first reference voltage so that the overcurrent protection can be triggered when the sampling voltage is larger than either the second reference voltage or the first reference voltage.
  • Step S503 outputting a protection signal according to the first control signal and the second control signal, wherein the protection signal is configured to trigger overcurrent protection for the target object.
  • the control method of the above-mentioned overcurrent protection circuit is configured as the overcurrent protection of the drive circuit of the TV board card.
  • the load will increase sharply, causing the board drive circuit to generate a large instantaneous load (that is, the dynamic load generates an instantaneous high current), but the instantaneous high current generated by the dynamic load of the board has a very short duration and will not cause circuit devices.
  • the temperature increases significantly, and overcurrent protection is not required. Therefore, the value of the first reference voltage is determined according to the instantaneous load capacity of the board drive circuit, so as to avoid the overcurrent protection caused by the instantaneous high current caused by the dynamic load of the board drive circuit. False triggering of the circuit.
  • the overcurrent protection point corresponding to the first reference voltage is more than 1.5 times the rated current value.
  • the second reference voltage is determined according to the temperature rise of the board drive circuit under the overcurrent working state.
  • the temperature rise under the overcurrent working state can be understood as the board drive circuit can work normally under this temperature rise or meet the relevant standard conditions.
  • the transformer of the board drive circuit works within the overcurrent protection point determined according to the second reference voltage, and the temperature rise of the transformer will not cause damage to the transformer or exceed the test conditions of the safety standard.
  • the sampling voltage is obtained by collecting the voltage of the target object
  • the first control signal is obtained by comparing the sampling voltage with the first reference voltage
  • the first control signal is obtained by comparing the sampling voltage with the second reference voltage.
  • the second control signal wherein the second reference voltage is lower than the first reference voltage, outputs a protection signal according to the first control signal and the second control signal, wherein the protection signal is configured to trigger overcurrent protection for the target object.
  • the method before outputting the protection signal according to the first control signal and the second control signal, the method further includes: delaying the first control signal by a first preset time, and delaying the second control signal The second preset time, wherein the second preset time is greater than the first preset time.
  • the above-mentioned second preset time is determined according to the maximum time of the instantaneous load of the board card. Since the overcurrent protection point corresponding to the second reference voltage REF2 is smaller than the overcurrent protection point corresponding to the first reference voltage REF1 (the overcurrent protection point corresponding to the first reference voltage REF1 is determined according to the transient load capacity of the board), the second The overcurrent protection point corresponding to the reference voltage REF2 may be smaller than the instantaneous high current value caused by the dynamic load of the board, resulting in false triggering of the overcurrent protection.
  • the second preset time T2 should be greater than the maximum time of the instantaneous load of the board (ie The maximum duration of the instantaneous high current when the board is dynamically loaded), so that when the sampling voltage is greater than the second reference voltage REF2, and the duration of the sampling voltage must be greater than the second preset time T2, the second delay unit U4 will output a high-level signal to trigger the overcurrent protection, which avoids the false triggering of the overcurrent protection caused by the instantaneous high current caused by the dynamic load of the board.
  • the first preset time T1 may be set to the millisecond level
  • the second preset time T2 may be set to the second level, for example, the second preset time T2 is 10 seconds.
  • the preset time T2 is much larger than the maximum time of the instantaneous load of the board, which avoids the false trigger of overcurrent protection caused by the instantaneous high current caused by the dynamic load of the board, and satisfies the requirements of the components in the board drive circuit when the time is greater than the second time.
  • the overcurrent protection point corresponding to the reference voltage REF2 the operating temperature rise is higher, and the overcurrent protection is triggered.
  • the first preset time T1 is short, the circuit has an overcurrent protection greater than that corresponding to the first reference voltage REF1. When the current reaches the point, the overcurrent protection circuit can quickly trigger the overcurrent protection.
  • outputting a protection signal according to the first control signal and the second control signal includes: any one of the delayed first control signal and the second control signal is at a high level. In this case, the above protection signal is output.
  • the delayed first control signal is configured as a first overcurrent protection point with a higher current value and a shorter delay
  • the delayed second control signal is configured as a lower current value and a shorter delay. longer second overcurrent protection point.
  • a first overcurrent protection point with a higher current value and a shorter delay is set as the overcurrent protection condition
  • a second overcurrent protection point with a lower current value and a longer delay is set as the overcurrent protection condition.
  • the first overcurrent protection point is configured to trigger the overcurrent protection quickly when a large current occurs in the circuit
  • the second overcurrent protection point is configured so that the components work for a long time at a current greater than the rated current and less than the first overcurrent protection point.
  • the overcurrent protection is triggered when the temperature rise is too high in the overcurrent state of the current protection point. Therefore, the overcurrent protection will be triggered when one of the above two overcurrent protection conditions is satisfied.
  • a board card of a display device including any one of the above-mentioned overcurrent protection circuits.
  • a display device including the above-mentioned board card of the display device.
  • the disclosed technical content may be implemented in other manners.
  • the device embodiments described above are only illustrative, for example, the division of the units may be a logical function division, and there may be other division methods in actual implementation, for example, multiple units or components may be combined or Integration into another system, or some features can be ignored, or not implemented.
  • the shown or discussed mutual coupling or direct coupling or communication connection may be through some interfaces, indirect coupling or communication connection of units or modules, and may be in electrical or other forms.
  • the units described as separate components may or may not be physically separated, and components shown as units may or may not be physical units, that is, may be located in one place, or may be distributed to multiple units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution in this embodiment.
  • each functional unit in each embodiment of the present disclosure may be integrated into one processing unit, or each unit may exist physically alone, or two or more units may be integrated into one unit.
  • the above-mentioned integrated units may be implemented in the form of hardware, or may be implemented in the form of software functional units.
  • the integrated unit if implemented in the form of a software functional unit and sold or used as an independent product, may be stored in a computer-readable storage medium.
  • the technical solutions of the present disclosure can be embodied in the form of software products in essence, or the part that contributes to the prior art, or all or part of the technical solutions, and the computer software product is stored in a storage medium , including several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present disclosure.
  • the aforementioned storage medium includes: U disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), mobile hard disk, magnetic disk or optical disk and other media that can store program codes .

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Abstract

本公开公开了一种过流保护电路及其控制方法。其中，过流保护电路包括：采样电路，与目标对象连接，被配置为对目标对象的电压进行采集得到采样电压；比较电路，包括第一比较电路和第二比较电路，第一比较电路被配置为将采样电压与第一基准电压进行比较得到第一控制信号，第二比较电路被配置为将采样电压与第二基准电压进行比较得到第二控制信号，其中，第二基准电压小于第一基准电压；逻辑控制电路，连接于比较电路的输出端，被配置为根据第一控制信号和第二控制信号输出保护信号。

Description

过流保护电路及其控制方法
本申请要求于2021年2月5日提交中国专利局、申请号为202110163172.0、发明名称为“过流保护电路及及其控制方法”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本公开涉及电路技术领域，具体而言，涉及一种过流保护电路及其控制方法。
背景技术
在电流控制型反激变换器中，通过根据变压器原边电路的采样电压对变压器原边的场效应管电流进行逐周期限制来实现过流保护。现有的过流保护电路没有温度补偿，反激变换器的过流保护点不随温度变化，图1为现有技术的一种过流保护电路，U1为比较器，U3为延时器，U5为反相器，U6为与门，CS为电压采样端，采样电压从比较器U1的同相输入端输入，与比较器U1反相输入端的电压基准REF1进行比较，在采样电压大于REF1电压时，比较器U1输出高电平信号，经延时器U3延时后，再经U5反相输出低电平信号，该低电平信号作为与门U6输入，U6输出低电平关闭场效应管的驱动信号，实现对变压器的过流保护。在TV板卡的驱动电路中，为了满足TV板卡的动态需求，将过流保护点设置为额定电流值的1.5倍以上，然而当变压器的工作电流大于额定电流，但未达到过流保护点时，导致变压器温升较大甚至烧坏。此外，在安规测试标准中，如果变压器在过流保护前的温升超过125°，不满足安规测试标准的要求。
针对上述解决现有技术中变压器工作电流大于额定电流时，在小于过流保护点的情况下，由于无法触发过流保护导致变压器温升过高的问题，目前尚未提出有效的解决方案。
发明内容
本公开实施例提供了一种过流保护电路及其控制方法，以至少解决现有技术中变压器工作电流大于额定电流时，在小于过流保护点的情况下，由于无法触发过流保护导致变压器温升过高的技术问题。
根据本公开实施例的一个方面，提供了一种过流保护电路，包括：采样电路，与目标对象连接，被配置为对目标对象的电压进行采集得到采样电压；比较电路，包括第一比较电路和第二比较电路，第一比较电路被配置为将采样电压与第一基准电压进行比较得到第一控制信号，第二比较电路被配置为将采样电压与第二基准电压进行比较得到第二控制信号，其中，第二基准电压小于第一基准电压；逻辑控制电路，连接于比较电路的输出端，被配置为根据第一控制信号和第二控制信号输出保护信号，其中，保护信号被配置为触发对目标对象的过流保护。
根据本公开实施例的一个方面，提供了一种过流保护电路的控制方法，包括：采集目标对象的电压得到采样电压；将采样电压与第一基准电压进行比较得到第一控制信号，将采样电压与第二基准电压进行比较得到第二控制信号，其中，第二基准电压小于第一基准电压；根据第一控制信号和第二控制信号输出保护信号，其中，保护信号被配置为触发对目标对象的过流保护。
根据本公开实施例的另一方面，还提供了一种显示装置的板卡，包括上述任意一种的过流保护电路。
根据本公开实施例的另一方面，还提供了一种显示装置，包括上述的显示装置的板卡。
在本公开实施例中，在过流保护电路中设置包括第一比较电路和第二比较电路的比较电路，且第二基准电压小于第一基准电压，根据第一比较电路输出的第一控制信号和第二比较电路输出的第二控制信号触发过流保护。通过设置两个不同的过流保护点，使得过流保护电路不但满足板卡动态吃载的要求，还避免了电路中的元器件在过流状态下，由于温升过高引起烧坏或者超出安规标准的问题，进而解决现有技术中变压器工作电流大于额定电流时，在小于过流保护点的情况下，由于无法触发过流保护导致变压器温升过高的问题。
附图说明
此处所说明的附图用来提供对本公开的进一步理解，构成本公开的一部分，本公开的示意性实施例及其说明被配置为解释本公开，并不构成对本公开的不当限定。在附图中：
图1是根据现有技术的一种过流保护电路的示意图；
图2是根据本公开实施例的一种过流保护电路的示意图；
图3是根据本公开实施例的一种可选的过流保护电路的示意图；
图4是根据本公开实施例的一种可选的过流保护电路的示意图；
图5是根据本公开实施例的一种过流保护电路的控制方法流程图。
具体实施方式
为了使本技术领域的人员更好地理解本公开方案，下面将结合本公开实施例中的附图，对本公开实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本公开一部分的实施例，而不是全部的实施例。基于本公开中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都应当属于本公开保护的范围。
需要说明的是，本公开的说明书和权利要求书及上述附图中的术语“第一”、“第二”等是被配置为区别类似的对象，而不必被配置为描述特定的顺序或先后次序。应该理解这样使用的数据在适当情况下可以互换，以便这里描述的本公开的实施例能够以除了在这里图示或描述的那些以外的顺序实施。此外，术语“包括”和“具有”以及他们的任何变形，意图在于覆盖不排他的包含，例如，包含了一系列步骤或单元的过程、方法、系统、产品或设备不必限于清楚地列出的那些步骤或单元，而是可包括没有清楚地列出的或对于这些过程、方法、产品或设备固有的其它步骤或单元。
根据本公开实施例，提供了一种过流保护电路，图2是根据本公开实施例的一种过流保护电路的示意图，如图2所示，上述过流保护电路包括：采样电路21，与目标对象20连接，被配置为对目标对象20的电压进行采集得到采样电压；比较电路22，包括第一比较电路221和第二比较电路222，第一比较电路221被配置为将采样电压与第一基准电压进行比较得到第一控制信号，第二比较电路222被配置为将采样电压与第二基准电压进行比较得到第二控制信号，其中，第二基准电压小于第一基准电压；逻辑控制电路23，连接于比较电路22的输出端，被配置为根据第一控制信号和第二控制信号输出保护信号，其中，保护信号被配置为触发对目标对象20的过流保护。
上述目标对象为过流保护的对象，在反激式变换器的实施例中，上述目标对象可以为反激变压器或者开关元器件。采样电路与目标对象连接以采集目标对象的采样电压，例如，采样电路可通过与变压器原边连接的采样电阻，以采集反激变压器原边的采样电压，该采样电压除以采样电阻可以得到变压器原边的电流值。
第二基准电压小于第一基准电压，使得比较电路在采样电压大于第二基准电压和第一基准电压中任意一个时可触发过流保护。
上述逻辑控制电路可以通过硬件实现，例如，逻辑控制电路通过设置或非门或者 或门，实现第一控制信号和第二控制信号的触发过流保护。逻辑控制电路也可以通过软件实现，例如，逻辑控制电路为可编程逻辑控制器，通过软件程序实现第一控制信号和第二控制信号的逻辑控制触发过流保护。
在一种可选的实施例中，上述过流保护电路被配置为电视机板卡驱动电路的过流保护，在电视机播放重低音及白场画面时，显示屏及功放的吃载会急剧增加导致板卡驱动电路产生较大的瞬时带载量(即动态吃载产生瞬时大电流)，但是板卡动态吃载产生的瞬时大电流持续时间很短，不会造成电路器件的温度大幅增加，并不需要进行过流保护，因此，第一基准电压的取值根据板卡驱动电路的瞬时带载量确定，避免板卡驱动电路动态吃载引起的瞬时大电流引起过流保护电路的误触发。例如，第一基准电压所对应的过流保护点为额定电流值的1.5倍以上。第二基准电压根据板卡驱动电路在过流工作状态下的温升确定，在过流工作状态下的温升可以理解为板卡驱动电路在该温升下可正常工作或者满足相关标准条件，例如，板卡驱动电路的变压器工作在根据第二基准电压确定的过流保护点以内，变压器温度上升不会引起变压器损坏或者超出安规标准的测试条件。
本实施例提出的过流保护电路，增加包括第一比较电路和第二比较电路的比较电路，且第二基准电压小于第一基准电压，根据第一比较电路输出的第一控制信号和第二比较电路输出的第二控制信号触发过流保护。通过设置两个不同的过流保护点，使得过流保护电路不但满足板卡动态吃载的要求，还避免了电路中的元器件在过流状态下，由于温升过高引起烧坏或者超出安规标准的问题，进而解决现有技术中变压器工作电流大于额定电流时，在小于过流保护点的情况下，由于无法触发过流保护导致变压器温升过高的问题。
作为一种可选的实施例，图3提供了一种可选的过流保护电路的示意图，如图3所示，第一比较电路包括第一比较器U1，第二比较电路包括第二比较器U2；第一比较器U1的同相输入端和第二比较器U2的同相输入端连接采样电路，第一比较器U1的反相输入端连接第一基准电压电路，第二比较器U2的反相输入端连接第二基准电压电路，其中，第一基准电压电路被配置为提供第一基准电压REF1，第二基准电压电路被配置为提供第二基准电压REF2。
第一基准电压电路和第二基准电压电路可以通过不同的分压电阻的组合实现不同的基准电压，例如，通过在预设电源和地之间串联若干个分压电阻，根据需要的第一基准电压REF1值和第二基准电压REF2值确定出分压电阻的数量和阻值。
需要说明的是，上述第一比较器U1和第二比较器U2的同相输入端相连并连接采样电路的同一位置，以获得相同的采样电压，该采样电压分别与第一基准电压REF1 值和第二基准电压REF2值进行比较以输出第一控制信号和第二控制信号，并根据逻辑控制电路设定的逻辑关系输出保护信号。例如，如果采样电压小于第一基准电压REF1且大于第二基准电压REF2时，第二比较器U2输出高电平，第一比较器U1输出低电平，逻辑控制电路可以根据第二比较器U2输出的高电平触发过流保护。
作为一种可选的实施例，如图3所示，过流保护电路还包括延时电路，延时电路包括：设置于第一比较电路的输出端与逻辑控制电路输入端之间的第一延时单元U3，以及设置于第二比较电路的输出端与逻辑控制电路输入端之间的第二延时单元U4；其中，第一延时单元被配置为将第一控制信号延时第一预设时间T1后输入至逻辑控制电路，第二延时单元U4被配置为将第二控制信号延时第二预设时间T2后输入至逻辑控制电路，第二预设时间T2大于第一预设时间T1。
如图3所示，第一比较电路可以为第一比较器U1，第二比较电路可以为第二比较器U2。第一延时单元U3和第二延时单元U4可以通过硬件实现，也可以通过软件实现。例如，第一延时单元U3和第二延时单元U4为计时器，以实现将第一控制信号延时T1时间，以及将第二控制信号延时T2时间。需要说明的是，第一延时单元U3被配置为将第一控制信号延时T1时间，理解为当第一控制信号的持续时间超过T1时，第一延时单元U3可输出相应的控制信号，例如，当第一比较器U1输出高电平信号时，该高电平信号的持续时间在大于T1的情况下，第一延时单元U3可输出高电平信号，反之，该高电平信号的持续时间在小于T1的情况下，第一延时单元U3输出低电平信号。
需要说明的是，在被配置为板卡驱动的实施中，上述第二预设时间T2根据板卡的瞬时带载的最大时间确定。由于上述第二基准电压REF2对应的过流保护点小于第一基准电压REF1对应的过流保护点(第一基准电压REF1对应的过流保护点根据板卡瞬态带载量确定)，第二基准电压REF2对应的过流保护点可能小于板卡动态吃载引起的瞬时大电流值而导致误触发过流保护，因此第二预设时间T2应大于板卡的瞬时带载的最大时间(即板卡动态吃载时瞬时大电流的最大持续时间)，使得在采样电压大于第二基准电压REF2的情况下，且该采样电压的持续时间须大于第二预设时间T2，第二延时单元U4才会输出高电平信号以触发过流保护，避免了板卡动态吃载引起的瞬时大电流而导致误触发过流保护。
在一种可选的实施例中，第一预设时间T1可设定为毫秒级别，第二预设时间T2设定为秒级，例如第二预设时间T2为10秒，一方面由于第二预设时间T2远大于板卡的瞬时带载的最大时间，避免了板卡动态吃载引起的瞬时大电流而导致误触发过流保护，且满足板卡驱动电路中元器件在大于第二基准电压REF2对应的过流保护点下工作温升较高触发过流保护的需求，另一方面，由于第一预设时间T1较短，使得电路出现 大于第一基准电压REF1对应的过流保护点的电流时，过流保护电路可以快速的触发过流保护。
作为一种可选的实施例，逻辑控制电路包括或门，或门的两个输入端分别连接第一延时单元的输出端和第二延时单元的输出端，或门被配置为在延时后的第一控制信号和第二控制信号中任意一个为高电平的情况下输出高电平信号作为保护信号。
需要说明的是，本实施例中通过第一比较器和第一延时单元设定了电流值较高且延时较短的第一过流保护点作为过流保护条件，以及通过第二比较器和第二延时单元设定了电流值较低且延时较长的第二过流保护点作为过流保护条件，第一过流保护点被配置为电路出现大电流时快速触发过流保护，第二过流保护点被配置为元器件长时间工作于大于额定电流且小于第一过流保护点的过流状态下引起温升过高时触发过流保护，因此，前述两种过流保护条件在其中之一满足时均会触发过流保护。
在逻辑控制电路为或门的情况下，第一控制信号和第二控制信号其中之一为高电平时，或门可输出高电平作为保护信号，可被配置为根据高电平作为关断条件的保护电路，例如，在采用PMOS场效应管作为开关器件的电路中，其栅极为高电平时关断，以实现过流保护。在一种可选的实施例中，上述或门的输出以及给定信号(PWM脉冲控制信号)共同输入第二或门(即另一个或门)，当上述或门的输出为高电平时，无论给定信号为何种电平，第二或门均可输出高电平作为保护信号。当作为一种可选的实施例，如图3所示，逻辑控制电路包括或非门U5，或非门U5的两个输入端分别连接第一延时单元U3的输出端和第二延时单元U4的输出端，或非门U5被配置为在延时后的第一控制信号和第二控制信号中任意一个为高电平的情况下输出低电平信号作为保护信号。
在逻辑控制电路为或非门的情况下，第一控制信号和第二控制信号其中之一为高电平时，或非门可输出低电平作为保护信号，可被配置为根据低电平作为关断条件的保护电路，例如，在采用NMOS场效应管作为开关器件的电路中，其栅极为低电平时关断，以实现过流保护。
作为一种可选的实施例，逻辑控制电路还包括与门，与门的一个输入端连接或非门，与门的另一个输入端连接给定信号，在或非门输出低电平信号的情况下，与门输出低电平信号作为保护信号。
在一种可选的实施中，如图3所示，逻辑控制电路还包括与门U6，与门U6的一个输入端连接或非门U5的输出端，与门U6的另一个输入端连接给定信号GATE，在或非门U5输出低电平信号的情况下，与门U6输出低电平信号作为保护信号。在与门U6 的输入端有任意一个为低电平信号时，均输出低电平信号，因此在或非门U5输出低电平信号的情况下，无论给定信号GATE为何种信号，与门U6均输出低电平信号作为保护信号。
在过流保护电路被配置为板卡驱动电路的过流保护的实施例中，给定信号GATE为电路的驱动控制信号，例如，给定信号GATE为PWM脉冲控制信号，开关器件可根据给定信号GATE控制变压器工作，在或非门U5输出高电平信号的情况下，与门U6的输出与给定信号GATE一致，在或非门U5输出低电平信号的情况下，与门U6的输出为低电平，开关器件(例如，NMOS场效应管)关断，变压器不工作。
作为一种可选的实施例，过流保护电路还包括场效应管，场效应管的栅极连接与门的输出端，场效应管的漏极连接于目标对象，场效应管的源极连接于采样电路，场效应管被配置为根据与门的输出端输出的保护信号将目标对象的驱动信号断开。
在过流保护电路被配置为板卡驱动电路的过流保护的实施例中，上述目标对象为反激式变换器中变压器，场效应管的栅极接收驱动信号控制变压器工作，场效应管的源极连接采样电路，场效应管的漏极连接变压器的原边线圈。场效应管可以为PMOS管或者NMOS管，具体根据被配置为保护信号的电平确定。
在一种可选的实施例中，如图3所示，场效应管为NMOS管，NMOS管的栅极连接与门U6的输出端，当变压器正常工作时，与门U6的输出与给定信号GATE一致，与门U6的输出即为变压器的驱动信号，场效应管根据给定信号GATE控制变压器工作；当采样电路获取的变压器原边线圈的电流超过上述第一过流保护点的条件或者第二过流保护点的条件时，触发上述过流保护电路的与门U6输出低电平信号，NMOS管关断，进而断开了变压器的驱动信号。
作为一种可选的实施例，采样电路包括第一采样电阻和第二采样电阻，第一采样电阻和第二采样电阻串联连接于第一比较器的同相输入端与地之间，第一采样电阻和第二采样电阻之间为采样点，采样点被配置为采集目标对象的电压。
需要说明的是，在本实施例的过流保护电路中，通过采样点采集的目标对象的电压，可以表征出目标对象的电流值，例如，采样点电压为第二采样电阻的对地电压，通过计算第二采样电阻的对地电压与第二采样电阻的比值，可以获得第二采样电阻上的电流值，该电流值可以表征出目标对象的电流，通过将采样点的电压作为采样电压提供给上述比较电路，进而实现对目标对象的过流保护。
第一采样电阻和第二采样电阻的电阻值根据预设的过流保护点对应的电压值与第二基准电压确定，第一采样电阻和第二采样电阻的阻值和数量由多种组合方式，此处 不作限定。
作为一种可选的实施例，如图4所示，比较电路和逻辑控制电路集成于控制芯片U101内部，其中，第一比较电路和第二比较电路通过控制芯片U101的片选信号端CS采集目标对象的电压，逻辑控制电路的输出端为控制芯片U101的信号输出端OUT。
图4为一种可选的过流保护电路的示意图，具体的，图4的过流保护电路可被配置为板卡驱动的电流控制型反激变换器，如图4所示，第一采样电阻R1第二采样电阻R2串联连接于控制芯片U101的片选信号端CS于地SGND之间,第一采样电阻R1第二采样电阻R2之间为采样点，场效应管Q1的源极连接采样点，场效应管Q1的漏极连接变压器T的原边线圈，控制芯片U101的片选信号端CS被配置为采集变压器原边线圈电流对应的采样电压(即第二采样电阻R2的对地电压)。控制芯片U101的信号输出端OUT通过电阻R3连接场效应管Q1的栅极，被配置为输出变压器的驱动信号。
在控制芯片U101内部的电路结构如图3所示，控制芯片U101的片选信号端CS同时连接第一比较器U1的同相输入端和第二比较器U2的同相输入端，在板卡驱动的实施例中，设定第一基准电压REF1大于第二基准电压REF2，第一比较器U1的输出连接延时单元U3，第二比较器U2的输出连接延时单元U4，延时时间T1为ms级，延时时间T2远大于T1,延时单元U4和延时单元U3的输出连接或非门U5，U5与控制芯片的驱动信号Gate共同输入与门U6，与门U6的输出即为控制芯片U101的信号输出端OUT。当变压器工作于额定电流之内时，第一比较器U1和第二比较器U2均输出低电平信号，经延时后，或非门U5输出高电平信号，与门U6输出为驱动信号，即场效应管根据控制信号U101的OUT端输出的驱动信号控制变压器正常工作。
当控制芯片U101的CS引脚获得的采样电压值大于REF1时，第一比较器U1输出高电平信号至延时单元U3，如果该高电平信号持续时间大于延时时间T1时，延时单元U3输出高电平信号，由于延时时间T1较短(比如T1可设置为ms级别)，控制芯片U101快速触发过流保护，通过信号输出端OUT输出低电平触发过流保护，场效应管关断，进而变压器不工作。当控制芯片U101的CS引脚获得的采样电压值小于REF1且大于REF2时,第二比较器U2输出高电平信号至延时单元U4，如果该高电平信号持续时间大于延时时间T2时，延时单元U4输出高电平信号，或非门U5输出低电平，与门U6输出低电平，控制信号U101的OUT输出至场效应管Q1的驱动信号被关断，变压器不工作，进而实现过流保护。
在本实施例中，通过设置两路并列的比较电路，且设置不同的基准电压以及延时时间，使得过流保护电路不但满足板卡动态吃载的要求，还避免了电路中的元器件在过流状态下，由于温升过高引起烧坏或者超出安规标准的问题，进而解决现有技术中 变压器工作电流大于额定电流时，在小于过流保护点的情况下，由于无法触发过流保护导致变压器温升过高的问题。
实施例2
根据本公开实施例，提供了一种过流保护电路的控制方法，图5是根据本公开实施例的一种过流保护电路的控制方法流程图，如图5所示，该方法包括如下步骤：
步骤S501，采集目标对象的电压得到采样电压。
上述目标对象为过流保护的对象，在反激式变换器的实施例中，上述目标对象可以为反激变压器或者开关元器件。具体的，上述目标对象的电压可以通过采样电路采集，如图2所示，采样电路21与目标对象20连接以采集目标对象20的采样电压，例如，采样电路21可通过与变压器原边连接的采样电阻，以采集反激变压器原边的采样电压，该采样电压除以采样电阻可以得到变压器原边的电流值。
步骤S502，将采样电压与第一基准电压进行比较得到第一控制信号，将采样电压与第二基准电压进行比较得到第二控制信号，其中，第二基准电压小于第一基准电压。
第二基准电压小于第一基准电压可以使得在采样电压大于第二基准电压和第一基准电压中任意一个时可触发过流保护。
步骤S503，根据第一控制信号和第二控制信号输出保护信号，其中，保护信号被配置为触发对目标对象的过流保护。
在一种可选的实施例中，上述过流保护电路的控制方法被配置为电视机板卡驱动电路的过流保护，在电视机播放重低音及白场画面时，显示屏及功放的吃载会急剧增加导致板卡驱动电路产生较大的瞬时带载量(即动态吃载产生瞬时大电流)，但是板卡动态吃载产生的瞬时大电流持续时间很短，不会造成电路器件的温度大幅增加，并不需要进行过流保护，因此，第一基准电压的取值根据板卡驱动电路的瞬时带载量确定，避免板卡驱动电路动态吃载引起的瞬时大电流引起过流保护电路的误触发。例如，第一基准电压所对应的过流保护点为额定电流值的1.5倍以上。第二基准电压根据板卡驱动电路在过流工作状态下的温升确定，在过流工作状态下的温升可以理解为板卡驱动电路在该温升下可正常工作或者满足相关标准条件，例如，板卡驱动电路的变压器工作在根据第二基准电压确定的过流保护点以内，变压器温度上升不会引起变压器损坏或者超出安规标准的测试条件。
本实施例提出的过流保护电路的控制方法，通过采集目标对象的电压得到采样电压，将采样电压与第一基准电压进行比较得到第一控制信号，将采样电压与第二基准 电压进行比较得到第二控制信号，其中，第二基准电压小于第一基准电压，根据第一控制信号和第二控制信号输出保护信号，其中，保护信号被配置为触发对目标对象的过流保护。通过设置两个不同的过流保护点，使得过流保护不但满足板卡动态吃载的要求，还避免了电路中的元器件在过流状态下，由于温升过高引起烧坏或者超出安规标准的问题，进而解决现有技术中变压器工作电流大于额定电流时，在小于过流保护点的情况下，由于无法触发过流保护导致变压器温升过高的问题。
作为一种可选的实施例，在根据第一控制信号和第二控制信号输出保护信号之前，方法还包括：将第一控制信号延时第一预设时间，且将第二控制信号延时第二预设时间，其中，第二预设时间大于第一预设时间。
在被配置为板卡驱动的实施中，上述第二预设时间根据板卡的瞬时带载的最大时间确定。由于上述第二基准电压REF2对应的过流保护点小于第一基准电压REF1对应的过流保护点(第一基准电压REF1对应的过流保护点根据板卡瞬态带载量确定)，第二基准电压REF2对应的过流保护点可能小于板卡动态吃载引起的瞬时大电流值而导致误触发过流保护，因此第二预设时间T2应大于板卡的瞬时带载的最大时间(即板卡动态吃载时瞬时大电流的最大持续时间)，使得在采样电压大于第二基准电压REF2的情况下，且该采样电压的持续时间须大于第二预设时间T2，第二延时单元U4才会输出高电平信号以触发过流保护，避免了板卡动态吃载引起的瞬时大电流而导致误触发过流保护。
在一种可选的实施例中，第一预设时间T1可设定为毫秒级别，第二预设时间T2设定为秒级，例如第二预设时间T2为10秒，一方面由于第二预设时间T2远大于板卡的瞬时带载的最大时间，避免了板卡动态吃载引起的瞬时大电流而导致误触发过流保护，且满足板卡驱动电路中元器件在大于第二基准电压REF2对应的过流保护点下工作温升较高触发过流保护的需求，另一方面，由于第一预设时间T1较短，使得电路出现大于第一基准电压REF1对应的过流保护点的电流时，过流保护电路可以快速的触发过流保护。
作为一种可选的实施例，根据上述第一控制信号和上述第二控制信号输出保护信号，包括：在上述延时后的第一控制信号和第二控制信号中任意一个为高电平的情况下输出上述保护信号。
需要说明的是，延时后的第一控制信号被配置为电流值较高且延时较短的第一过流保护点，延时后的第二控制信号被配置为电流值较低且延时较长的第二过流保护点。本实施例中通过设定了电流值较高且延时较短的第一过流保护点作为过流保护条件，以及通过设定了电流值较低且延时较长的第二过流保护点作为过流保护条件，第一过 流保护点被配置为电路出现大电流时快速触发过流保护，第二过流保护点被配置为元器件长时间工作于大于额定电流且小于第一过流保护点的过流状态下引起温升过高时触发过流保护，因此，前述两种过流保护条件在其中之一满足时均会触发过流保护。
实施例3
根据本公开实施例，提供了一种显示装置的板卡，包括上述任意一种过流保护电路。
根据本公开实施例，提供了一种显示装置，包括上述的显示装置的板卡。
上述本公开实施例序号仅仅为了描述，不代表实施例的优劣。
在本公开的上述实施例中，对各个实施例的描述都各有侧重，某个实施例中没有详述的部分，可以参见其他实施例的相关描述。
在本公开所提供的几个实施例中，应该理解到，所揭露的技术内容，可通过其它的方式实现。其中，以上所描述的装置实施例仅仅是示意性的，例如所述单元的划分，可以为一种逻辑功能划分，实际实现时可以有另外的划分方式，例如多个单元或组件可以结合或者可以集成到另一个系统，或一些特征可以忽略，或不执行。另一点，所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口，单元或模块的间接耦合或通信连接，可以是电性或其它的形式。
所述作为分离部件说明的单元可以是或者也可以不是物理上分开的，作为单元显示的部件可以是或者也可以不是物理单元，即可以位于一个地方，或者也可以分布到多个单元上。可以根据实际的需要选择其中的部分或者全部单元来实现本实施例方案的目的。
另外，在本公开各个实施例中的各功能单元可以集成在一个处理单元中，也可以是各个单元单独物理存在，也可以两个或两个以上单元集成在一个单元中。上述集成的单元既可以采用硬件的形式实现，也可以采用软件功能单元的形式实现。
所述集成的单元如果以软件功能单元的形式实现并作为独立的产品销售或使用时，可以存储在一个计算机可读取存储介质中。基于这样的理解，本公开的技术方案本质上或者说对现有技术做出贡献的部分或者该技术方案的全部或部分可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质中，包括若干指令用以使得一台计算机设备(可为个人计算机、服务器或者网络设备等)执行本公开各个实施例所述方法的全部或部分步骤。而前述的存储介质包括：U盘、只读存储器(ROM，Read-Only Memory)、随机存取存储器(RAM，Random Access Memory)、移动硬盘、磁碟或者光盘 等各种可以存储程序代码的介质。
以上所述仅是本公开的优选实施方式，应当指出，对于本技术领域的普通技术人员来说，在不脱离本公开原理的前提下，还可以做出若干改进和润饰，这些改进和润饰也应视为本公开的保护范围。

Claims (15)

  1. 一种过流保护电路，包括：
    采样电路，与目标对象连接，被配置为对所述目标对象的电压进行采集得到采样电压；
    比较电路，包括第一比较电路和第二比较电路，所述第一比较电路被配置为将所述采样电压与第一基准电压进行比较得到第一控制信号，所述第二比较电路被配置为将所述采样电压与第二基准电压进行比较得到第二控制信号，其中，所述第二基准电压小于所述第一基准电压；
    逻辑控制电路，连接于所述比较电路的输出端，被配置为根据所述第一控制信号和所述第二控制信号输出保护信号，其中，所述保护信号被配置为触发对所述目标对象的过流保护。
  2. 根据权利要求1所述的过流保护电路，其中，所述第一比较电路包括第一比较器，所述第二比较电路包括第二比较器；
    所述第一比较器的同相输入端和所述第二比较器的同相输入端连接所述采样电路，所述第一比较器的反相输入端连接第一基准电压电路，所述第二比较器的反相输入端连接第二基准电压电路，其中，所述第一基准电压电路被配置为提供所述第一基准电压，所述第二基准电压电路被配置为提供所述第二基准电压。
  3. 根据权利要求1所述的过流保护电路，其中，所述过流保护电路还包括延时电路，所述延时电路包括：
    设置于所述第一比较电路的输出端与所述逻辑控制电路输入端之间的第一延时单元，以及设置于所述第二比较电路的输出端与所述逻辑控制电路输入端之间的第二延时单元；
    其中，所述第一延时单元被配置为将所述第一控制信号延时第一预设时间后输入至所述逻辑控制电路，所述第二延时单元被配置为将所述第二控制信号延时第二预设时间后输入至所述逻辑控制电路，所述第二预设时间大于所述第一预设时间。
  4. 根据权利要求3所述的过流保护电路，其中，所述逻辑控制电路包括或门，所述或门的两个输入端分别连接所述第一延时单元的输出端和所述第二延时单元的输出端，所述或门被配置为在所述延时后的第一控制信号和第二控制信号中任意一 个为高电平的情况下输出高电平信号作为所述保护信号。
  5. 根据权利要求3所述的过流保护电路，其中，所述逻辑控制电路包括或非门，所述或非门的两个输入端分别连接所述第一延时单元的输出端和所述第二延时单元的输出端，所述或非门被配置为在所述延时后的第一控制信号和第二控制信号中任意一个为高电平的情况下输出低电平信号作为所述保护信号。
  6. 根据权利要求5所述的过流保护电路，其中，所述逻辑控制电路还包括与门，所述与门的一个输入端连接所述或非门的输出端，所述与门的另一个输入端连接给定信号，在所述或非门输出低电平信号的情况下，所述与门输出低电平信号作为保护信号。
  7. 根据权利要求6所述的过流保护电路，其中，所述过流保护电路还包括场效应管，所述场效应管的栅极连接所述与门的输出端，所述场效应管的漏极连接于所述目标对象，所述场效应管的源极连接于所述采样电路，所述场效应管被配置为根据所述与门的输出端输出的保护信号将所述目标对象的驱动信号断开。
  8. 根据权利要求2所述的过流保护电路，其中，所述采样电路包括第一采样电阻和第二采样电阻，所述第一采样电阻和所述第二采样电阻串联连接于所述第一比较器的同相输入端与地之间，所述第一采样电阻和所述第二采样电阻之间为采样点，所述采样点被配置为采集所述目标对象的电压。
  9. 根据权利要求1所述的过流保护电路，其中，所述比较电路和所述逻辑控制电路集成于控制芯片内部，其中，所述第一比较电路和所述第二比较电路通过所述控制芯片的片选信号端采集所述目标对象的电压，所述逻辑控制电路的输出端为所述控制芯片的信号输出端。
  10. 根据权利要求1所述的过流保护电路，其中，所述目标对象为反激式变换器中的变压器。
  11. 一种过流保护电路的控制方法，包括：
    采集目标对象的电压得到采样电压；
    将所述采样电压与第一基准电压进行比较得到第一控制信号，将所述采样电压与第二基准电压进行比较得到第二控制信号，其中，所述第二基准电压小于所述第一基准电压；
    根据所述第一控制信号和所述第二控制信号输出保护信号，其中，所述保护信号被配置为触发对所述目标对象的过流保护。
  12. 根据权利要求11所述的方法，其中，在根据所述第一控制信号和所述第二控制信号输出保护信号之前，所述方法还包括：
    将所述第一控制信号延时第一预设时间，且将所述第二控制信号延时第二预设时间，其中，所述第二预设时间大于所述第一预设时间。
  13. 根据权利要求12所述的方法，其中，根据所述第一控制信号和所述第二控制信号输出保护信号，包括：
    在延时后的所述第一控制信号和所述第二控制信号中任意一个为高电平的情况下，输出所述保护信号，其中，当所述采样电压大于所述第一基准电压时，第一控制信号为高电平，当所述采样电压大于所述第二基准电压时，第二控制信号为高电平。
  14. 一种显示装置的板卡，包括权利要求1至10中任意一项所述的过流保护电路。
  15. 一种显示装置，包括如权利要求14所述的显示装置的板卡。
PCT/CN2022/075058 2021-02-05 2022-01-29 过流保护电路及其控制方法 WO2022166901A1 (zh)

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