WO2022165964A1 - 显示面板及其制作方法、显示装置 - Google Patents

显示面板及其制作方法、显示装置 Download PDF

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Publication number
WO2022165964A1
WO2022165964A1 PCT/CN2021/084525 CN2021084525W WO2022165964A1 WO 2022165964 A1 WO2022165964 A1 WO 2022165964A1 CN 2021084525 W CN2021084525 W CN 2021084525W WO 2022165964 A1 WO2022165964 A1 WO 2022165964A1
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Prior art keywords
layer
reflection
display panel
reflection layer
gate
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PCT/CN2021/084525
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English (en)
French (fr)
Inventor
卢马才
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深圳市华星光电半导体显示技术有限公司
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Publication of WO2022165964A1 publication Critical patent/WO2022165964A1/zh

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78633—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device with a light shield
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
    • H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
    • H01L27/156—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66969—Multistep manufacturing processes of devices having semiconductor bodies not comprising group 14 or group 13/15 materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
    • H01L29/78693—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate the semiconducting oxide being amorphous
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1213—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being TFTs

Definitions

  • the present invention relates to the field of display technology, in particular to the manufacture of display devices, and in particular to a display panel, a manufacturing method thereof, and a display device.
  • Oxide semiconductor thin film transistors use oxides as electron channels, and have higher mobility, smaller parasitic capacitance and low leakage current than polysilicon thin film transistors.
  • the active layer in the oxide semiconductor thin film transistor is greatly affected by light, so that the oxide semiconductor thin film transistor is prone to change in performance under light and fail, which reduces the stability and reliability of the operation of the oxide semiconductor thin film transistor.
  • the purpose of the present invention is to provide a display panel, a method for manufacturing the same, and a display device, so as to reduce the light irradiated to the active layer, and solve the problem of oxide semiconductor thin film caused by the active layer being irradiated by a lot of light in the prior art. Transistors fail due to changes in performance.
  • An embodiment of the present invention provides a display panel, and the display panel includes:
  • a thin film transistor layer the thin film transistor layer is located on the substrate, the thin film transistor layer includes an active layer, a metal layer and an anti-reflection layer, and the anti-reflection layer is located at least on the metal layer close to the active layer. On one side, the reflectivity of the anti-reflection layer is smaller than that of the metal layer.
  • the metal layer includes a light shielding layer
  • the light shielding layer is located on a side of the active layer close to the substrate
  • the anti-reflection layer includes a first anti-reflection layer
  • the first anti-reflection layer The layer is located on the side of the light shielding layer close to the active layer, and the reflectivity of the first anti-reflection layer is lower than that of the light shielding layer.
  • the constituent material of the first antireflection layer includes molybdenum oxide.
  • the first antireflection layer includes:
  • the constituent material of the first sublayer includes molybdenum-titanium-nickel alloy, molybdenum-titanium alloy or molybdenum;
  • a second sublayer, the second sublayer is located on the side of the first sublayer close to the active layer, and the constituent material of the second sublayer includes indium zinc oxide.
  • the constituent material of the light shielding layer includes a metal material.
  • the display panel further includes a buffer layer, the buffer layer is located on a side of the first anti-reflection layer away from the substrate, and the buffer layer covers the first anti-reflection layer and the first anti-reflection layer. the substrate.
  • the metal layer includes a gate layer, the gate layer is located on a side of the active layer away from the substrate, the anti-reflection layer includes a second anti-reflection layer, the second anti-reflection layer is The anti-reflection layer is located on the side of the gate layer close to the active layer, and the reflectivity of the second anti-reflection layer is lower than that of the gate layer.
  • the constituent material of the second anti-reflection layer includes molybdenum oxide.
  • the second anti-reflection layer includes:
  • the third sublayer, the constituent material of the third sublayer includes molybdenum-titanium-nickel alloy, molybdenum-titanium alloy or molybdenum;
  • the fourth sublayer is located on the side of the third sublayer close to the active layer, and the constituent material of the fourth sublayer includes indium zinc oxide.
  • the constituent material of the gate layer includes a metal material.
  • the thin film transistor layer further includes an insulating layer, and the insulating layer is located between the gate layer and the active layer.
  • the constituent material of the active layer includes metal oxide.
  • the anti-reflection layer and the active layer are disposed opposite to each other, and two ends of the anti-reflection layer respectively extend beyond two ends of the active layer.
  • An embodiment of the present invention provides a method for fabricating a display panel, which is used to fabricate the display panel as described above.
  • the method includes:
  • a thin film transistor layer is formed on the substrate, the thin film transistor layer includes an active layer, a metal layer and an anti-reflection layer, the anti-reflection layer is located at least on a side of the metal layer close to the active layer, the The reflectivity of the antireflection layer is lower than that of the metal layer.
  • the metal layer includes a light shielding layer
  • the anti-reflection layer includes a first anti-reflection layer
  • the step of forming a thin film transistor layer on the substrate includes:
  • the reflectivity of the first anti-reflection layer is lower than the reflectivity of the light-shielding layer
  • the active layer is formed on the first antireflection layer.
  • the metal layer further includes a gate layer
  • the anti-reflection layer further includes a second anti-reflection layer
  • after the step of forming the active layer on the first anti-reflection layer include:
  • the gate layer is formed on the second anti-reflection layer, and the reflectivity of the second anti-reflection layer is lower than that of the gate layer.
  • the metal layer includes a gate layer
  • the anti-reflection layer includes a second anti-reflection layer
  • the step of forming a thin film transistor layer on the substrate includes:
  • the gate layer is formed on the second anti-reflection layer, and the reflectivity of the second anti-reflection layer is lower than that of the gate layer.
  • the reflectivity of the second anti-reflection layer is smaller than the reflectivity of the gate layer or after the step of forming the gate layer on the second anti-reflection layer
  • the gate layer is formed on the second anti-reflection layer, and after the step that the reflectivity of the second anti-reflection layer is smaller than the reflectivity of the gate layer, the method includes:
  • a light-emitting layer, a first electrode and a second electrode are formed on the source layer and the second conductive layer.
  • An embodiment of the present invention provides a display device, and the display device includes the display panel as described in any of the above or a display panel manufactured by the fabrication method as described in any of the above.
  • the present invention provides a display panel, a manufacturing method thereof, and a display device.
  • the display panel includes a thin film transistor layer, and the thin film transistor layer includes an active layer, a metal layer and an antireflection layer.
  • the antireflection layer By arranging the antireflection layer to be located on the The side of the metal layer close to the active layer, and the reflectivity of the anti-reflection layer is smaller than that of the metal layer, that is, the anti-reflection layer can enhance the proximity of the metal layer to the active layer
  • One side absorbs light to reduce the light irradiated on the active layer, thereby reducing the risk of performance change and failure of the thin film transistor layer, so as to improve the working stability and reliability of the thin film transistor layer.
  • FIG. 1 is a schematic cross-sectional view of a display panel according to an embodiment of the present invention.
  • FIG. 2 is a schematic cross-sectional view of another display panel according to an embodiment of the present invention.
  • FIG. 3 is a schematic cross-sectional view of yet another display panel according to an embodiment of the present invention.
  • FIG. 4 is a flowchart of a first method for fabricating a display panel according to an embodiment of the present invention.
  • FIG. 5 is a schematic flow diagram of a method for manufacturing a display panel according to an embodiment of the present invention.
  • FIG. 6 is a flowchart of a second method for fabricating a display panel according to an embodiment of the present invention.
  • FIG. 7 is a flowchart of a third method for fabricating a display panel according to an embodiment of the present invention.
  • FIG. 8 is a flowchart of a fourth method for fabricating a display panel according to an embodiment of the present invention.
  • FIG. 9 is a schematic flow diagram of another method for manufacturing a display panel according to an embodiment of the present invention.
  • the present invention provides a display panel, which includes but is not limited to the following embodiments and combinations of the following embodiments.
  • the display panel 100 includes: a substrate 10 ; a thin film transistor layer 20 , the thin film transistor layer 20 is located on the substrate 10 , and the thin film transistor layer 20 includes The source layer 201, the metal layer and the anti-reflection layer, the anti-reflection layer is located at least on the side of the metal layer close to the active layer 201, and the reflectivity of the anti-reflection layer is lower than that of the metal layer.
  • the metal layer may include, but is not limited to, two separate film layers
  • the anti-reflection layer may also include, but is not limited to, two separate film layers, and many of the anti-reflection layers
  • Each film layer is in one-to-one correspondence with the plurality of film layers in the metal layer, and the reflectivity of each film layer in the anti-reflection layer is respectively smaller than that of the corresponding film layer in the metal layer.
  • the substrate 10 may be a rigid substrate or a flexible substrate, the rigid substrate may be glass or a silicon wafer, and the constituent materials of the rigid substrate may include but are not limited to quartz powder, strontium carbonate, barium carbonate, boric acid, boric anhydride , at least one of aluminum oxide, calcium carbonate, barium nitrate, magnesium oxide, tin oxide, and zinc oxide, and the flexible substrate can be a polymer material substrate, a metal foil substrate, an ultra-thin glass substrate, a polymer/inorganic substrate Substrate or polymer/organic/inorganic substrate, wherein the polymer material may include polyethylene, polypropylene, polystyrene, polyethylene terephthalate, polyethylene terephthalate, polyethylene at least one of imides.
  • the constituent material of the active layer 201 includes metal oxide.
  • the constituent materials of the active layer 201 may include indium gallium zinc oxide, indium gallium tin oxide, indium gallium oxide, indium zinc oxide, aluminum indium zinc oxide, indium gallium zinc tin oxide, or other Metal oxide, further, the constituent material of the active layer 201 may include amorphous metal oxide. It can be understood that the thin film transistor layer 20 prepared by using the active layer 201 in this embodiment has higher mobility, smaller parasitic capacitance and lower leakage current than conventional amorphous silicon thin film transistors.
  • the thin film transistor layer 20 may serve as a current-driven display circuit, for example, the light-emitting devices in the display panel 100 may include organic light-emitting semiconductor light-emitting devices, micro light-emitting diodes or other self-luminous devices.
  • the anti-reflection layer and the active layer 201 are disposed opposite to each other, and both ends of the anti-reflection layer respectively extend beyond the two ends of the active layer 201 to ensure that the active layer 201 is shielded. It can be understood that since the anti-reflection layer is located on the side of the corresponding metal layer close to the active layer 201, and the reflectivity of the anti-reflection layer is lower than the reflectivity of the corresponding metal layer, that is, the irradiation The light reaching the surface of the anti-reflection layer can be absorbed to a greater extent than the light irradiating the surface of the metal layer, so that the light reflected on the active layer 201 can be reduced, and the thin film transistor layer can be reduced. There is a risk of performance change and failure of the thin film transistor layer 20 , so as to improve the stability and reliability of the thin film transistor layer 20 .
  • the metal layer includes a light shielding layer 3031 , the light shielding layer 303 is located on the side of the active layer 201 close to the substrate 10 , and the antireflection layer Including a first anti-reflection layer 3032, the first anti-reflection layer 3032 is located on the side of the light shielding layer 3031 close to the active layer 201, and the reflectivity of the first anti-reflection layer 3032 is lower than that of the light shielding layer 3031 reflectivity.
  • the light shielding layer 3031 is closer to the substrate 10 and the first anti-reflection layer 3032 is closer to the active layer 201 , that is, ambient light or backlight light can pass through the light shielding layer 3031 in sequence and the first antireflection layer 3032.
  • setting the reflectivity of the light-shielding layer 3031 to a larger value can not only reflect more external light or backlight light to the side away from the active layer 201 to improve the utilization rate of light, but also
  • the pass rate of light in the light shielding layer 3031 can be reduced to prevent the light from being irradiated to the active layer 201; by setting the reflectivity of the first anti-reflection layer 3032 to be smaller, the light can be irradiated to the first anti-reflection layer 3032.
  • the anti-reflection layer 3032 absorbs most of the light, reducing the light reflected from the first anti-reflection layer 3032 to the active layer 201 . Therefore, in this embodiment, the light irradiated on the active layer 201 can be reduced, and the risk of failure of the thin film transistor layer 20 due to performance change can be reduced, so as to improve the stability and reliability of the thin film transistor layer 20 in operation.
  • the constituent material of the light shielding layer 3031 includes a metal material.
  • the light shielding layer 3031 may be a single-layer film layer or a composite film layer.
  • the composition material of the light-shielding layer 3031 may include but not limited to copper or aluminum; when the light-shielding layer 3031 is a composite film layer, as shown in FIGS. 1 and 3
  • the light-shielding layer 3031 includes a first light-shielding layer 30311 and a second light-shielding layer 30312 located on the side of the first light-shielding layer 30311 away from the substrate 10 .
  • the constituent materials of the first light-shielding layer 30311 may include but not Limited to molybdenum, molybdenum-titanium alloy or molybdenum-titanium-doped nickel alloy
  • the constituent material of the second light shielding layer 30312 may include but not limited to copper or aluminum
  • the first light shielding layer 30311 is used to increase the light shielding layer 3031 and the Adhesion between substrates 10 .
  • the constituent material of the first anti-reflection layer 3032 includes molybdenum oxide.
  • the constituent material of the first anti-reflection layer 3032 may include molybdenum oxide. In one embodiment, as shown in FIGS.
  • the first anti-reflection layer 3032 when the first anti-reflection layer 3032 is a composite film layer, the first anti-reflection layer 3032 includes: a first sub-layer 30321 , the first sub-layer 30321
  • the constituent materials of the layer 30321 include but are not limited to molybdenum-titanium-nickel alloy, molybdenum-titanium alloy or molybdenum
  • the second sub-layer 30322 is located in the first sub-layer 30321 close to the active layer 201;
  • the constituent materials of the second sub-layer 30322 include but are not limited to indium zinc oxide or indium tin oxide.
  • the display panel 100 further includes a buffer layer 40 , the buffer layer 40 is located on the side of the first anti-reflection layer 3032 away from the substrate 10 , and the buffer layer 40 covers the first antireflection layer 3032 and the substrate 10 .
  • the buffer layer 40 is insulating, and the buffer layer 40 may be a single-layer film layer or a composite film layer.
  • the composition material of the buffer layer 40 may include but not limited to silicon oxide, silicon nitride or silicon oxynitride; when the buffer layer 40 is a composite film layer , the buffer layer 40 may include a first buffer layer and a second buffer layer located on the side of the first buffer layer away from the substrate 10 , and the composition material of the first buffer layer may include but not limited to silicon nitride , the constituent material of the second buffer layer may include but not limited to silicon oxide.
  • the metal layer includes a gate layer 3041 , and the gate layer 3041 is located on the side of the active layer 201 away from the substrate 10 .
  • the anti-reflection layer includes a second anti-reflection layer 3042, the second anti-reflection layer 3042 is located on the side of the gate layer 3041 close to the active layer 201, and the reflectivity of the second anti-reflection layer 3042 is smaller than the reflectivity of the gate layer 3041.
  • the gate layer 3041 is located on a side of the active layer 201 away from the substrate 10 .
  • the second anti-reflection layer 3042 is closer to the active layer 201 , that is, external light passes through the gate layer 3041 and the second anti-reflection layer 3042 in sequence, and the second anti-reflection layer
  • the reflectivity of 3042 is set relatively small, which can absorb most of the light irradiated to the second anti-reflection layer 3042 and reduce the light reflected from the second anti-reflection layer 3042 to the active layer 201 . Therefore, in this embodiment, the light irradiated on the active layer 201 can be reduced, and the risk of failure of the thin film transistor layer 20 due to performance change can be reduced, so as to improve the stability and reliability of the thin film transistor layer 20 in operation.
  • the constituent material of the gate layer 3041 includes a metal material.
  • the gate layer 3041 may be a single-layer film or a composite film.
  • the gate layer 3041 is a single-layer film, as shown in FIG. 2 and FIG. 3 , the gate layer 3041
  • the constituent materials may include but are not limited to copper, aluminum, molybdenum, or titanium.
  • the constituent materials of the gate layer 3041 may also include metal oxides, metal nitrides or metal oxynitrides; when the gate layer 3041 is When composite film layers are used, the gate layer 3041 may be, but not limited to, a molybdenum/aluminum/molybdenum layer, an aluminum/molybdenum layer, a molybdenum/copper layer, and a molybdenum-titanium alloy/copper layer.
  • the constituent material of the second anti-reflection layer 3042 includes molybdenum oxide.
  • the constituent material of the second anti-reflection layer 3042 may include molybdenum oxide. In one embodiment, as shown in FIG. 2 and FIG.
  • the second anti-reflection layer 3042 when the second anti-reflection layer 3042 is a composite film layer, the second anti-reflection layer 3042 includes: a third sub-layer 30421, the third The constituent materials of the sub-layer 30421 include but are not limited to molybdenum-titanium-nickel alloy, molybdenum-titanium alloy or molybdenum; the fourth sub-layer 30422, the fourth sub-layer 30422 is located in the third sub-layer 30421 close to the active layer 201 On one side of the fourth sub-layer 30422, the constituent material of the fourth sub-layer 30422 includes but is not limited to indium zinc oxide or indium tin oxide.
  • the thin film transistor layer 20 further includes an insulating layer 202 , and the insulating layer 202 is located between the gate layer 3041 and the active layer 201 .
  • the insulating layer 202 may be a single-layer film layer or a composite film layer. When the insulating layer 202 is a single-layer film layer, as shown in FIGS.
  • the constituent materials of the insulating layer 202 may include But not limited to silicon oxide or silicon nitride; when the insulating layer 202 is a composite film layer, the insulating layer 202 can be, but not limited to, aluminum oxide/silicon nitride/silicon oxide layer, silicon oxide/nitride Silicon/Silicon Oxide Layer.
  • the display panel 100 further includes an intermediate dielectric layer 50 , and the intermediate dielectric layer 50 covers the gate layer 3041 , the buffer layer 40 , the active Layer 201 and the insulating layer 202, the intermediate dielectric layer 50 is provided with a plurality of through holes 01; further, the thin film transistor layer 20 further includes a source layer 203 and a drain layer 204, as shown in FIG. 1 and As shown in FIG. 3 , the two ends of the source layer 203 are respectively connected to the left end of the active layer 201 and the light shielding layer 3031 through the corresponding through holes 01 , and the drain layer 204 is connected through the corresponding through holes 01 .
  • the through hole 01 is connected to the right end of the active layer 201 .
  • the constituent material of the intermediate dielectric layer 50 may include but not limited to silicon oxide, silicon nitride or silicon oxynitride.
  • the film structure of the source electrode layer 203 and the drain electrode layer 204 is the same, and both can be a single-layer film layer or a composite film layer. When the source electrode layer 203 and the drain electrode layer 204 When both are single-layer films, as shown in FIGS.
  • the constituent materials of the source layer 203 and the drain layer 204 may include but are not limited to molybdenum, aluminum, copper, titanium, indium tin oxide or copper Niobium alloy; when both the source layer 203 and the drain layer 204 are composite film layers, both the source layer 203 and the drain layer 204 can be, but not limited to, a molybdenum/aluminum layer, a molybdenum/aluminum layer copper layer, molybdenum/copper/indium zinc oxide layer, indium zinc oxide/copper/indium zinc oxide layer, molybdenum/copper/indium tin oxide layer, nickel/copper/nickel layer, molybdenum nitinol/copper/molybdenum nitinol layer or nichrome/copper/nichrome layer.
  • the display panel 100 further includes a sub-insulating layer 80 , a first conductive layer 60 and a second conductive layer 70 , and the sub-insulating layer 80 and the insulating layer 202 are the same layer provided with a gap between the sub-insulating layer 80 and the corresponding thin film transistor layer 20, the first conductive layer 60 and the gate layer 3041 are provided in the same layer, and the first conductive layer 60 and the corresponding There is a gap between the thin film transistor layers 20, the second conductive layer 70 and the source layer 203 and the drain layer 204 are disposed in the same layer, and the second conductive layer 70 and the corresponding thin film transistor There are gaps between the layers 20 .
  • the sub-insulating layer 80 can be used to elevate the first conductive layer 60
  • the first conductive layer 60 can be used to transmit data signals
  • the second conductive layer 70 can be used to load a high voltage or a low voltage Voltage.
  • the display panel 100 further includes a light-emitting layer 90 , a first electrode 901 and a second electrode 902 , and the light-emitting layer 90 is close to two ends of the thin film transistor layer 20 side
  • the first electrode 901 and the second electrode 902 are respectively provided, the first electrode 901 is connected to the light-emitting layer 90 and the corresponding second conductive layer 70, and the second electrode 902 is connected to the light-emitting layer 90 and the corresponding source layer 203 .
  • the light emitting layer 90 may be, but not limited to, organic light emitting semiconductor light emitting devices, micro light emitting diodes, or other self-emitting devices. Further, as shown in FIGS.
  • the display panel 100 further includes a passivation layer 101 and a black light shielding layer 102 , and the passivation layer 101 covers the intermediate dielectric layer 50 , the drain layer 204 and the Part of the source layer 203 and the black light shielding layer 102 are located on the side of the passivation layer 101 away from the thin film transistor layer 20 .
  • the passivation layer 101 is a single-layer film layer
  • the constituent materials of the passivation layer 101 may include but not limited to silicon oxide, silicon nitride or silicon oxynitride; when the passivation layer 101 is a composite film layer , the passivation layer 101 may be, but not limited to, a silicon oxide/silicon nitride layer.
  • the present invention provides a manufacturing method of a display panel, and the manufacturing method of the display panel includes but is not limited to the following embodiments and combinations of the following embodiments.
  • the method may include but not limited to the following steps.
  • the substrate 10 may be a rigid substrate or a flexible substrate
  • the rigid substrate may be glass or a silicon wafer
  • the constituent materials of the rigid substrate may include but are not limited to quartz powder, strontium carbonate, carbonic acid At least one of barium, boric acid, boric anhydride, aluminum oxide, calcium carbonate, barium nitrate, magnesium oxide, tin oxide, and zinc oxide
  • the flexible substrate can be a polymer material substrate, a metal foil substrate, or an ultra-thin glass substrate , polymer/inorganic substrate or polymer/organic/inorganic substrate, wherein the polymer material may include polyethylene, polypropylene, polystyrene, polyethylene terephthalate, polyethylene terephthalate At least one of glycol ester and polyimide.
  • the thin film transistor layer including an active layer, a metal layer and an anti-reflection layer, the anti-reflection layer is located at least on the side of the metal layer close to the active layer, The reflectivity of the anti-reflection layer is lower than the reflectivity of the metal layer.
  • the constituent material of the active layer 201 includes metal oxide.
  • the constituent materials of the active layer 201 may include indium gallium zinc oxide, indium gallium tin oxide, indium gallium oxide, indium zinc oxide, aluminum indium zinc oxide, indium gallium zinc tin oxide, or other Metal oxide, further, the constituent material of the active layer 201 may include amorphous metal oxide. It can be understood that the thin film transistor layer 20 prepared by using the active layer 201 in this embodiment has higher mobility, smaller parasitic capacitance and lower leakage current than conventional amorphous silicon thin film transistors.
  • the thin film transistor layer 20 may serve as a current-driven display circuit, for example, the light-emitting devices in the display panel 100 may include organic light-emitting semiconductor light-emitting devices, micro light-emitting diodes or other self-luminous devices.
  • the metal layer includes a light shielding layer 3031
  • the anti-reflection layer includes a first anti-reflection layer 3032 .
  • the light shielding layer 3031 and the active layer 201 are disposed opposite to each other, and both ends of the light shielding layer 3031 respectively extend beyond the two ends of the active layer 201 to ensure that the active layer 201 is shielded.
  • the first anti-reflection layer 3032 is located on the side of the light shielding layer 3031 close to the active layer 201 , and the reflectivity of the first anti-reflection layer 3032 is smaller than the reflection of the light shielding layer 3031 That is, the light irradiated on the surface of the first anti-reflection layer 3032 can be absorbed to a greater extent than the light irradiated on the surface of the light shielding layer 3031, so that the reflection on the active layer 201 can be reduced. light to reduce the risk of failure of the thin film transistor layer 20 due to performance changes, so as to improve the working stability and reliability of the thin film transistor layer 20 .
  • the step S20 may include but not limited to the following steps.
  • the constituent material of the light shielding layer 3031 includes a metal material.
  • the light shielding layer 3031 may be a single-layer film layer or a composite film layer.
  • the composition material of the light-shielding layer 3031 may include but not limited to copper or aluminum;
  • the light-shielding layer 3031 is a composite film layer, the light-shielding layer 3031 includes A first light-shielding layer and a second light-shielding layer located on the side of the first light-shielding layer away from the substrate 10, the first light-shielding layer may be composed of but not limited to molybdenum, molybdenum-titanium alloy or molybdenum-titanium-nickel alloy , the constituent material of the second light shielding layer may include but not limited to copper or aluminum, and the first light shielding layer is used to increase the adhe
  • the constituent material of the first anti-reflection layer 3032 includes molybdenum oxide.
  • the constituent material of the first anti-reflection layer 3032 may include molybdenum oxide.
  • the first anti-reflection layer 3032 when the first anti-reflection layer 3032 is a composite film layer, the first anti-reflection layer 3032 includes: a first sub-layer, and the constituent material of the first sub-layer includes but is not limited to molybdenum Titanium-doped nickel alloy, molybdenum-titanium alloy or molybdenum; a second sublayer, the second sublayer is located on the side of the first sublayer close to the active layer, and the constituent materials of the second sublayer include but Not limited to indium zinc oxide or indium tin oxide.
  • an entire and continuous light-shielding film and a first anti-reflection film can be formed on the substrate 10 in sequence, and then the light-shielding film and the first anti-reflection film can be patterned at one time. chemical treatment to form the light shielding layer 3031 and the first antireflection layer 3032 .
  • the entire surface and continuous film layer fabrication and patterning process can be performed according to the actual film layer structures of the light-shielding film and the first anti-reflection film.
  • the light shielding layer 3031 is closer to the substrate 10 and the first anti-reflection layer 3032 is closer to the active layer 201 , that is, ambient light or backlight light passes through in sequence the light shielding layer 3031 and the first antireflection layer 3032 .
  • setting the reflectivity of the light-shielding layer 3031 to a larger value can not only reflect more external light or backlight light to the side away from the active layer 201 to improve the utilization rate of light, but also
  • the pass rate of light in the light shielding layer 3031 can be reduced to prevent the light from being irradiated to the active layer 201; by setting the reflectivity of the first anti-reflection layer 3032 to be smaller, the light can be irradiated to the first anti-reflection layer 3032.
  • the anti-reflection layer 3032 absorbs most of the light, reducing the light reflected from the first anti-reflection layer 3032 to the active layer 201 . Therefore, in this embodiment, the light irradiated on the active layer 201 can be reduced, and the risk of failure of the thin film transistor layer due to performance change can be reduced, so as to improve the stability and reliability of the thin film transistor operation.
  • the display panel 100 further includes a buffer layer 40 , the buffer layer 40 is located on the side of the light shielding layer 3031 away from the substrate 10 , and the buffer layer 40 covers the light shielding layer 40
  • the layer 3031 and the substrate 10 that is, before the step S2031 , the entire and continuous buffer layer 40 may be formed on the light shielding layer 303 and the base 10 .
  • the buffer layer 40 is insulating, and the buffer layer 40 may be a single-layer film layer or a composite film layer.
  • the composition material of the buffer layer 40 may include but not limited to silicon oxide, silicon nitride or silicon oxynitride; when the buffer layer 40 is a composite film layer , the buffer layer 40 may include a first buffer layer and a second buffer layer located on the side of the first buffer layer away from the substrate 10 , and the composition material of the first buffer layer may include but not limited to silicon nitride , the constituent material of the second buffer layer may include but not limited to silicon oxide.
  • an entire and continuous active film can be formed on the buffer layer 40 first, and then the active film can be patterned to form the active layer 201 .
  • the active layer 201 and the light shielding layer 3031 are disposed opposite to each other, and the two ends of the active layer 201 do not exceed the two ends of the light shielding layer 3031 respectively.
  • the metal layer further includes a gate layer
  • the anti-reflection layer further includes a second anti-reflection layer.
  • the step S203 may include, but is not limited to, the following steps.
  • the thin film transistor layer further includes an insulating layer 202, and the insulating layer 202 is located between the gate layer 3041 and the active layer 201, that is, before the S2031, can be First, the insulating layer 202 is formed on the active layer 201 .
  • the sub-insulating layer 80 may also be formed while the insulating layer 202 is formed.
  • the insulating layer 202 may be a single-layer film layer or a composite film layer.
  • the constituent materials of the insulating layer 202 may include but are not limited to silicon oxide or nitride.
  • the insulating layer 202 when the insulating layer 202 is a composite film layer, the insulating layer 202 may be, but not limited to, an aluminum oxide/silicon nitride/silicon oxide layer, a silicon oxide/silicon nitride/silicon oxide layer. Similarly, an entire and continuous insulating film may be formed on the active layer 201 first, and then the insulating film may be patterned to form the insulating layer 202 .
  • the constituent material of the second anti-reflection layer 3042 includes molybdenum oxide.
  • the constituent material of the second anti-reflection layer 3042 may include molybdenum oxide.
  • the second anti-reflection layer 3042 when the second anti-reflection layer 3042 is a composite film layer, the second anti-reflection layer 3042 includes: a third sub-layer, and the constituent material of the third sub-layer includes but is not limited to molybdenum Titanium-doped nickel alloy, molybdenum-titanium alloy or molybdenum; a fourth sublayer, the fourth sublayer is located on the side of the third sublayer close to the active layer, and the fourth sublayer is composed of materials including but not Limited to indium zinc oxide or indium tin oxide.
  • the constituent material of the gate layer 3041 includes a metal material.
  • the gate layer 3041 may be a single-layer film layer or a composite film layer.
  • the constituent materials of the gate layer 3041 may include but are not limited to copper, Aluminum, molybdenum, or titanium, of course, the composition material of the gate layer 3041 may also include metal oxide, metal nitride or metal oxynitride; when the gate layer 3041 is a composite film layer, the gate Layer 3041 can be, but is not limited to, a molybdenum/aluminum/molybdenum layer, an aluminum/molybdenum layer, a molybdenum/copper layer, a molybdenum-titanium alloy/copper layer.
  • an entire and continuous second anti-reflection film and a gate film can be formed on the insulating layer 202, the sub-insulating layer 80, the active layer 201 and the buffer layer 40 in sequence, and once again The second anti-reflection film and the gate film are patterned to form the second anti-reflection layer 3042 and the gate layer 3041, and the first conductive layer 60 is also formed at the same time. It can be understood that, The film structure of the first conductive layer 60 is the same as that of the gate layer 304 . Similarly, the entire surface and continuous layer fabrication and patterning can be performed according to the actual layer structures of the second anti-reflection film and the gate film.
  • the metal layer includes a gate layer
  • the anti-reflection layer includes a second anti-reflection layer.
  • the step S20 may also include, but is not limited to, the following steps.
  • the buffer layer 40 may be formed on the substrate 10 first, and then the active layer 201 may be formed on the buffer layer 40 .
  • step S205 reference may be made to the relevant description of the step S2031 described above.
  • step S206 reference may be made to the relevant description of the step S2032 described above.
  • the following steps may be included but not limited to after the step S2032 or the step S206 .
  • an intermediate dielectric layer 50 is formed on the gate layer 3041.
  • the intermediate dielectric is formed on the gate layer 304 , the first conductive layer 60 , the buffer layer 40 , the active layer 201 and the insulating layer 202 .
  • Layer 50 is provided with a plurality of through holes 01, and the plurality of through holes 01 can be formed by patterning.
  • the source layer 203 the drain layer 204 and the second conductive layer 70
  • the source layer 203, the drain layer 204 and the second conductive layer 70 may be formed by patterning.
  • the two ends of the source layer 203 are respectively connected to the left end of the active layer 201 and the light shielding layer 303
  • the drain layer 204 is connected to the right end of the active layer 201 .
  • a passivation film and a black light-shielding film may be formed on the intermediate dielectric layer 50 , the drain layer 204 and part of the source layer 203 in sequence, and then the black light-shielding film is patterned to form The black light shielding layer 102 is then used as a hard mask to pattern the passivation film to form the passivation layer 101 .
  • the first electrode 901 and the second electrode 902 can be fabricated first, and then transferred to the corresponding source layer 203 and the corresponding second conductive layer 70 at one time. .
  • An embodiment of the present invention provides a display device, and the display device includes the display panel as described in any of the above or a display panel manufactured by the fabrication method as described in any of the above.
  • the present invention provides a display panel, a manufacturing method thereof, and a display device.
  • the display panel includes a thin film transistor layer, and the thin film transistor layer includes an active layer, a metal layer and an antireflection layer.
  • the antireflection layer By arranging the antireflection layer to be located on the The side of the metal layer close to the active layer, and the reflectivity of the anti-reflection layer is smaller than that of the metal layer, that is, the anti-reflection layer can enhance the proximity of the metal layer to the active layer
  • One side absorbs light to reduce the light irradiated on the active layer, thereby reducing the risk of performance change and failure of the thin film transistor layer, so as to improve the working stability and reliability of the thin film transistor layer.

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Abstract

显示面板（100）及其制作方法、显示装置，该显示面板（100）包括：基板（10）；位于基板（10）上的薄膜晶体管层（20），薄膜晶体管层（20）包括有源层（201）、金属层和减反层，减反层至少位于金属层靠近有源层（201）的一侧，减反层的反射率小于金属层的反射率，从而能够减少照射至有源层（201）的光线。

Description

显示面板及其制作方法、显示装置 技术领域
本发明涉及显示技术领域，尤其涉及显示器件的制造，具体涉及显示面板及其制作方法、显示装置。
 背景技术
氧化物半导体薄膜晶体管采用氧化物作为电子通道，相较于多晶硅薄膜晶体管具有较高的迁移率、较小寄生电容和低漏电流等特性。
然而，氧化物半导体薄膜晶体管中的有源层受光照影响较大，导致氧化物半导体薄膜晶体管在光照下易出现性能变化而失效，降低了氧化物半导体薄膜晶体管工作的稳定性和可靠性。
 技术问题
本发明的目的在于提供显示面板及其制作方法、显示装置，以减少照射至有源层的光线，解决了现有技术中因有源层被较多的光线照射下而引发的氧化物半导体薄膜晶体管出现性能变化而失效的问题。
 技术解决方案
本发明实施例提供显示面板，所述显示面板包括：
基板；
薄膜晶体管层，所述薄膜晶体管层位于所述基板上，所述薄膜晶体管层包括有源层、金属层和减反层，所述减反层至少位于所述金属层靠近所述有源层的一侧，所述减反层的反射率小于所述金属层的反射率。
在一实施例中，所述金属层包括遮光层，所述遮光层位于所述有源层靠近所述基板的一侧，所述减反层包括第一减反层，所述第一减反层位于所述遮光层靠近所述有源层的一侧，所述第一减反层的反射率小于所述遮光层的反射率。
在一实施例中，所述第一减反层的组成材料包括氧化钼。
在一实施例中，所述第一减反层包括：
第一子层，所述第一子层的组成材料包括钼钛掺镍合金、钼钛合金或者钼；
第二子层，所述第二子层位于所述第一子层靠近所述有源层的一侧，所述第二子层的组成材料包括氧化铟锌。
在一实施例中，所述遮光层的组成材料包括金属材料。
在一实施例中，所述显示面板还包括缓冲层，所述缓冲层位于所述第一减反层远离所述基板的一侧，且所述缓冲层覆盖所述第一减反层和所述基板。
在一实施例中，所述金属层包括栅极层，所述栅极层位于所述有源层远离所述基板的一侧，所述减反层包括第二减反层，所述第二减反层位于所述栅极层靠近所述有源层的一侧，所述第二减反层的反射率小于所述栅极层的反射率。
在一实施例中，所述第二减反层的组成材料包括氧化钼。
在一实施例中，所述第二减反层包括：
第三子层，所述第三子层的组成材料包括钼钛掺镍合金、钼钛合金或者钼；
第四子层，所述第四子层位于所述第三子层靠近所述有源层的一侧，所述第四子层的组成材料包括氧化铟锌。
在一实施例中，所述栅极层的组成材料包括金属材料。
在一实施例中，所述薄膜晶体管层还包括绝缘层，所述绝缘层位于所述栅极层和所述有源层之间。
在一实施例中，所述有源层的组成材料包括金属氧化物。
在一实施例中，所述减反层和所述有源层相对设置，且所述减反层的两端分别超出所述有源层的两端。
本发明实施例提供显示面板的制作方法，用于制作如上文任一所述的显示面板，所述方法包括：
提供一基板；
在所述基板上形成薄膜晶体管层，所述薄膜晶体管层包括有源层、金属层和减反层，所述减反层至少位于所述金属层靠近所述有源层的一侧，所述减反层的反射率小于所述金属层的反射率。
在一实施例中，所述金属层包括遮光层，所述减反层包括第一减反层，所述在所述基板上形成薄膜晶体管层的步骤包括：
在所述基板上形成所述遮光层；
在所述遮光层上形成所述第一减反层，所述第一减反层的反射率小于所述遮光层的反射率；
在所述第一减反层上形成所述有源层。
在一实施例中，所述金属层还包括栅极层，所述减反层还包括第二减反层，所述在所述第一减反层上形成所述有源层的步骤之后，包括：
在所述有源层上形成所述第二减反层；
在所述第二减反层上形成所述栅极层，所述第二减反层的反射率小于所述栅极层的反射率。
在一实施例中，所述金属层包括栅极层，所述减反层包括第二减反层，所述在所述基板上形成薄膜晶体管层的步骤包括：
在所述基板上形成所述有源层；
在所述有源层上形成所述第二减反层；
在所述第二减反层上形成所述栅极层，所述第二减反层的反射率小于所述栅极层的反射率。
在一实施例中，所述在所述第二减反层上形成所述栅极层，所述第二减反层的反射率小于所述栅极层的反射率的步骤之后或者所述在所述第二减反层上形成所述栅极层，所述第二减反层的反射率小于所述栅极层的反射率的步骤之后，包括：
在所述栅极层上形成中间介电层；
在所述中间介电层上形成源极层、漏极层和第二导电层；
在所述中间介电层、所述漏极层和部分所述源极层上形成钝化层，以及在所述钝化层上形成黑色遮光层；
在所述源极层和所述第二导电层上形成发光层、第一电极和第二电极。
本发明实施例提供显示装置，所述显示装置包括如上文任一所述的显示面板或者包括如上文任一所述的制作方法制作的显示面板。
 有益效果
本发明提供了显示面板及其制作方法、显示装置，所述显示面板包括薄膜晶体管层，所述薄膜晶体管层包括有源层、金属层和减反层，通过将所述减反层设置为位于所述金属层靠近所述有源层的一侧，且所述减反层的反射率小于所述金属层的反射率，即所述减反层可以增强所述金属层靠近所述有源层的一侧对于光线的吸收，以减少照射至所述有源层上的光线，从而降低薄膜晶体管层出现性能变化从而失效的风险，以提高薄膜晶体管层工作的稳定性和可靠性。
 附图说明
下面结合附图，通过对本申请的具体实施方式详细描述，将使本申请的技术方案及其它有益效果显而易见。
图1为本发明实施例提供的一种显示面板的剖面示意图。
图2为本发明实施例提供的另一种显示面板的剖面示意图。
图3为本发明实施例提供的又一种显示面板的剖面示意图。
图4为本发明实施例提供的第一种显示面板的制作方法的流程图。
图5为本发明实施例提供的一种显示面板的制作方法的流程场景示意图。
图6为本发明实施例提供的第二种显示面板的制作方法的流程图。
图7为本发明实施例提供的第三种显示面板的制作方法的流程图。
图8为本发明实施例提供的第四种显示面板的制作方法的流程图。
图9为本发明实施例提供的另一种显示面板的制作方法的流程场景示意图。
 本发明的实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整的描述。显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
在本发明的描述中，需要理解的是，术语“上”、“下”、“靠近”、“远离”等指示的方位或位置关系为基于附图所示的方位或位置关系，例如，“上”只是表面在物体上方，具体指代正上方、斜上方、上表面都可以，只要居于物体水平之上即可；“两侧”或者“两端”是指代图中可以体现出的物体的相对的两个位置，所述两个位置可以和物体直接或者间接接触，以上方位或位置关系仅是为了便于描述本发明和简化描述，而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为对本发明的限制。
另外，还需要说明的是，附图提供的仅仅是和本发明关系比较密切的结构和步骤，省略了一些与发明关系不大的细节，目的在于简化附图，使发明点一目了然，而不是表明实际中装置和方法就是和附图一模一样，不作为实际中装置和方法的限制。
本发明提供显示面板，所述显示面板包括但不限于以下实施例以及以下实施例的组合。
在一实施例中，如图1-3所示，所述显示面板100包括：基板10；薄膜晶体管层20，所述薄膜晶体管层20位于所述基板10上，所述薄膜晶体管层20包括有源层201、金属层和减反层，所述减反层至少位于所述金属层靠近所述有源层201的一侧，所述减反层的反射率小于所述金属层的反射率。需要注意的是，所述金属层可以包括但不限于两个分隔设置的膜层，所述减反层也可以包括但不限于两个分隔设置的膜层，并且所述减反层中的多个膜层和所述金属层中的多个膜层一一对应，并且满足所述减反层中的每一个膜层的反射率分别小于所述金属层中的对应的膜层的反射率。
其中，所述基板10可以为刚性基板或者柔性基板，所述刚性基板可以为玻璃或者硅片，所述刚性基板的组成材料可以包括但不限于石英粉、碳酸锶、碳酸钡、硼酸、硼酐、氧化铝、碳酸钙、硝酸钡、氧化镁、氧化锡、氧化锌中的至少一种，所述柔性基板可以为聚合物材料基板、金属箔片基板、超薄玻璃基板、聚合物/无机物基板或者聚合物/有机物/无机物基板，其中所述聚合物材料可以包括聚乙烯、聚丙烯、聚苯乙烯、聚对苯二甲酸乙二醇酯、聚对萘二甲酸乙二醇酯、聚酰亚胺中的至少一种。
特别的，所述有源层201的组成材料包括金属氧化物。具体的，所述有源层201的组成材料可以包括铟镓锌氧化物、铟镓锡氧化物、铟镓氧化物、铟锌氧化物、铝铟锌氧化物、铟镓锌锡氧化物或者其它金属氧化物，进一步的，所述有源层201的组成材料可以包括非晶金属氧化物。可以理解的，采用本实施例中的所述有源层201制备的所述薄膜晶体管层20相比于传统的非晶硅薄膜晶体管具有较高的迁移率、较小寄生电容和低漏电流。进一步的，所述薄膜晶体管层20可以作为电流驱动显示电路，例如，所述显示面板100中的发光器件可以包括有机发光半导体发光器件、微型发光二极管或者其它自发光器件。
具体的，所述减反层和所述有源层201相对设置，且所述减反层的两端分别超出所述有源层201的两端，以确保遮挡所述有源层201。可以理解的，由于所述减反层位于对应的所述金属层靠近所述有源层201的一侧，且所述减反层的反射率小于对应的所述金属层的反射率，即照射至所述减反层表面的光线相比于照射至所述金属层表面的光线可以更大程度地被吸收，从而可以减少反射至所述有源层201上的光线，降低所述薄膜晶体管层20出现性能变化从而失效的风险，以提高薄膜晶体管层20工作的稳定性和可靠性。
在一实施例中，如图1和图3所示，所述金属层包括遮光层3031，所述遮光层303位于所述有源层201靠近所述基板10的一侧，所述减反层包括第一减反层3032，所述第一减反层3032位于所述遮光层3031靠近所述有源层201的一侧，所述第一减反层3032的反射率小于所述遮光层3031的反射率。需要注意的是，由于所述遮光层3031较靠近所述基板10，且所述第一减反层3032较靠近所述有源层201，即外界光线或者背光光线可以依次经过所述遮光层3031和所述第一减反层3032。可以理解的，将所述遮光层3031的反射率设置的较大，不仅可以将较多的外界光线或者背光光线反射至远离所述有源层201的一侧，以提高光线的利用率，而且可以减少光线在所述遮光层3031的通过率，以避免光线照射至所述有源层201；将所述第一减反层3032的反射率设置的较小，可以将照射至所述第一减反层3032的大部分光线吸收，减少从所述第一减反层3032反射至所述有源层201的光线。因此，本实施例可以减小照射至有源层201上的光线，降低所述薄膜晶体管层20出现性能变化从而失效的风险，以提高薄膜晶体管层20工作的稳定性和可靠性。
在一实施例中，所述遮光层3031的组成材料包括金属材料。具体的，所述遮光层3031可以为单层膜层或者复合膜层。例如，当所述遮光层3031为单层膜层时，所述遮光层3031的组成材料可以包括但不限于铜或者铝；当所述遮光层3031为复合膜层时，如图1、3所示，所述遮光层3031包括第一遮光层30311和位于所述第一遮光层30311远离所述基板10一侧的第二遮光层30312，所述第一遮光层30311的组成材料可以包括但不限于钼、钼钛合金或者钼钛掺镍合金，所述第二遮光层30312的组成材料可以包括但不限于铜或者铝，所述第一遮光层30311用于增加所述遮光层3031和所述基板10之间的粘附力。
在一实施例中，所述第一减反层3032的组成材料包括氧化钼。具体的，当所述第一减反层3032为单层膜层时，所述第一减反层3032的组成材料可以包括氧化钼。在一实施例中，如图1、3所示，当所述第一减反层3032为复合膜层时，所述第一减反层3032包括：第一子层30321，所述第一子层30321的组成材料包括但不限于钼钛掺镍合金、钼钛合金或者钼；第二子层30322，所述第二子层30322位于所述第一子层30321靠近所述有源层201的一侧，所述第二子层30322的组成材料包括但不限于氧化铟锌或者氧化铟锡。
进一步的，如图1-3所示，所述显示面板100还包括缓冲层40，所述缓冲层40位于所述第一减反层3032远离所述基板10的一侧，且所述缓冲层40覆盖所述第一减反层3032和所述基板10。具体的，所述缓冲层40呈绝缘性，所述缓冲层40可以为单层膜层或者复合膜层。例如，当所述缓冲层40为单层膜层时，所述缓冲层40的组成材料可以包括但不限于氧化硅、氮化硅或者氮氧化硅；当所述缓冲层40为复合膜层时，所述缓冲层40可以包括第一缓冲层和位于所述第一缓冲层远离所述基板10一侧的第二缓冲层，所述第一缓冲层的组成材料可以包括但不限于氮化硅，所述第二缓冲层的组成材料可以包括但不限于氧化硅。
在一实施例中，如图2和图3所示，所述金属层包括栅极层3041，所述栅极层3041位于所述有源层201远离所述基板10的一侧，所述减反层包括第二减反层3042，所述第二减反层3042位于所述栅极层3041靠近所述有源层201的一侧，所述第二减反层3042的反射率小于所述栅极层3041的反射率。进一步的，所述栅极层3041位于所述有源层201的远离所述基板10的一侧。同理，由于所述第二减反层3042较靠近所述有源层201，即外界光线依次经过所述栅极层3041和所述第二减反层3042，将所述第二减反层3042的反射率设置的较小，可以将照射至所述第二减反层3042的大部分光线吸收，减少从所述第二减反层3042反射至所述有源层201的光线。因此，本实施例可以减小照射至有源层201上的光线，降低所述薄膜晶体管层20出现性能变化从而失效的风险，以提高薄膜晶体管层20工作的稳定性和可靠性。
在一实施例中，如图2和图3所示，所述栅极层3041的组成材料包括金属材料。具体的，所述栅极层3041可以为单层膜层或者复合膜层，当所述栅极层3041为单层膜层时，如图2和图3所示，所述栅极层3041的组成材料可以包括但不限于铜、铝、钼、或者钛，当然所述栅极层3041的组成材料也可以包括金属氧化物、金属氮化物或者金属氮氧化物；当所述栅极层3041为复合膜层时，所述栅极层3041可以为但不限于钼/铝/钼层、铝/钼层、钼/铜层、钼钛合金/铜层。
在一实施例中，所述第二减反层3042的组成材料包括氧化钼。具体的，当所述第二减反层3042为单层膜层时，所述第二减反层3042的组成材料可以包括氧化钼。在一实施例中，如图2和图3所示，当所述第二减反层3042为复合膜层时，所述第二减反层3042包括：第三子层30421，所述第三子层30421的组成材料包括但不限于钼钛掺镍合金、钼钛合金或者钼；第四子层30422，所述第四子层30422位于所述第三子层30421靠近所述有源层201的一侧，所述第四子层30422的组成材料包括但不限于氧化铟锌或者氧化铟锡。
进一步的，如图1-3所示，所述薄膜晶体管层20还包括绝缘层202，所述绝缘层202位于所述栅极层3041和所述有源层201之间。具体的，所述绝缘层202可以为单层膜层或者复合膜层，当所述绝缘层202为单层膜层时，如图1-3所示，所述绝缘层202的组成材料可以包括但不限于氧化硅或者氮化硅；当所述绝缘层202为复合膜层时，所述绝缘层202可以为但不限于三氧化二铝/氮化硅/氧化硅层、氧化硅/氮化硅/氧化硅层。
具体的，如图1至图3所示，所述显示面板100还包括中间介电层50，所述中间介电层50覆盖所述栅极层3041、所述缓冲层40、所述有源层201和所述绝缘层202，所述中间介电层50上设有多个通孔01；进一步的，所述薄膜晶体管层20还包括源极层203和漏极层204，如图1和图3所示，所述源极层203的两端分别通过对应的所述通孔01连接所述有源层201的左端和所述遮光层3031，所述漏极层204通过对应的所述通孔01连接所述有源层201的右端。具体的，所述中间介电层50的组成材料可以包括但不限于氧化硅、氮化硅或者氮氧化硅。具体的，所述源极层203和所述漏极层204的膜层结构相同，两者均可以为单层膜层或者复合膜层，当所述源极层203和所述漏极层204均为单层膜层时，如图1-3所示，所述源极层203和所述漏极层204的组成材料可以包括但不限于钼、铝、铜、钛、氧化铟锡或者铜铌合金；当所述源极层203和所述漏极层204均为复合膜层时，所述源极层203和所述漏极层204均可以为但不限于钼/铝层、钼/铜层、钼/铜/氧化铟锌层、氧化铟锌/铜/氧化铟锌层、钼/铜/氧化铟锡层、镍/铜/镍层、钼镍钛合金/铜/钼镍钛合金层或者镍铬合金/铜/镍铬合金层。
具体的，如图1至图3所示，所述显示面板100还包括子绝缘层80、第一导电层60和第二导电层70，所述子绝缘层80和所述绝缘层202同层设置且所述子绝缘层80和对应的所述薄膜晶体管层20之间具有间隙，所述第一导电层60和所述栅极层3041同层设置且所述第一导电层60和对应的所述薄膜晶体管层20之间具有间隙，所述第二导电层70和所述源极层203、所述漏极层204同层设置且所述第二导电层70和对应的所述薄膜晶体管层20之间具有间隙。其中，所述子绝缘层80可以用于垫高所述第一导电层60，所述第一导电层60可以用于传输数据信号，所述第二导电层70可以用于加载高电压或者低电压。
具体的，如图1至图3所示，所述显示面板100还包括发光层90、第一电极901和第二电极902，所述发光层90靠近所述薄膜晶体管层20一侧的两端分别设置所述第一电极901和所述第二电极902，所述第一电极901连接所述发光层90和对应的所述第二导电层70，所述第二电极902连接所述发光层90和对应的所述源极层203。可以理解的，由于所述第二导电层70和所述源极层203具有不同的电压，即所述第一电极901和所述第二电极902具有电压差，会有电流通过所述发光层90，使得所述发光层90发光。如上文所述，发光层90可以为但不限于有机发光半导体发光器件、微型发光二极管或者其它自发光器件。进一步的，如图1-3所示，所述显示面板100还包括钝化层101和黑色遮光层102，所述钝化层101覆盖所述中间介电层50、所述漏极层204和部分所述源极层203，所述黑色遮光层102位于所述钝化层101远离所述薄膜晶体管层20的一侧。当所述钝化层101为单层膜层时，所述钝化层101的组成材料可以包括但不限于氧化硅、氮化硅或者氮氧化硅；当所述钝化层101为复合膜层时，所述钝化层101可以为但不限于氧化硅/氮化硅层。
本发明提供显示面板的制作方法，所述显示面板的制作方法包括但不限于以下实施例以及以下实施例的组合。
在一实施例中，如图4、5所示，所述方法可以包括但不限于如下步骤。
S10，提供一基板。
其中，如图5所示，所述基板10可以为刚性基板或者柔性基板，所述刚性基板可以为玻璃或者硅片，所述刚性基板的组成材料可以包括但不限于石英粉、碳酸锶、碳酸钡、硼酸、硼酐、氧化铝、碳酸钙、硝酸钡、氧化镁、氧化锡、氧化锌中的至少一种，所述柔性基板可以为聚合物材料基板、金属箔片基板、超薄玻璃基板、聚合物/无机物基板或者聚合物/有机物/无机物基板，其中所述聚合物材料可以包括聚乙烯、聚丙烯、聚苯乙烯、聚对苯二甲酸乙二醇酯、聚对萘二甲酸乙二醇酯、聚酰亚胺中的至少一种。
S20，在所述基板上形成薄膜晶体管层，所述薄膜晶体管层包括有源层、金属层和减反层，所述减反层至少位于所述金属层靠近所述有源层的一侧，所述减反层的反射率小于所述金属层的反射率。
特别的，如图5所示，所述有源层201的组成材料包括金属氧化物。具体的，所述有源层201的组成材料可以包括铟镓锌氧化物、铟镓锡氧化物、铟镓氧化物、铟锌氧化物、铝铟锌氧化物、铟镓锌锡氧化物或者其它金属氧化物，进一步的，所述有源层201的组成材料可以包括非晶金属氧化物。可以理解的，采用本实施例中的所述有源层201制备的所述薄膜晶体管层20相比于传统的非晶硅薄膜晶体管具有较高的迁移率、较小寄生电容和低漏电流。进一步的，所述薄膜晶体管层20可以作为电流驱动显示电路，例如，所述显示面板100中的发光器件可以包括有机发光半导体发光器件、微型发光二极管或者其它自发光器件。
具体的，如图5所示，所述金属层包括遮光层3031，所述减反层包括第一减反层3032。其中，所述遮光层3031和所述有源层201相对设置，且所述遮光层3031的两端分别超出所述有源层201的两端，以确保遮挡所述有源层201。可以理解的，由于所述第一减反层3032位于所述遮光层3031靠近所述有源层201的一侧，且所述第一减反层3032的反射率小于所述遮光层3031的反射率，即照射至所述第一减反层3032表面的光线相比于照射至所述遮光层3031表面的光线可以更大程度地被吸收，从而可以减少反射至所述有源层201上的光线，降低所述薄膜晶体管层20出现性能变化从而失效的风险，以提高薄膜晶体管层20工作的稳定性和可靠性。
在一实施例中，如图6所示，所述步骤S20可以包括但不限于如下步骤。
S201，在所述基板上形成所述遮光层。
在一实施例中，如图5所示，所述遮光层3031的组成材料包括金属材料。具体的，所述遮光层3031可以为单层膜层或者复合膜层。例如，当所述遮光层3031为单层膜层时，所述遮光层3031的组成材料可以包括但不限于铜或者铝；当所述遮光层3031为复合膜层时，所述遮光层3031包括第一遮光层和位于所述第一遮光层远离所述基板10一侧的第二遮光层，所述第一遮光层的组成材料可以包括但不限于钼、钼钛合金或者钼钛掺镍合金，所述第二遮光层的组成材料可以包括但不限于铜或者铝，所述第一遮光层用于增加所述遮光层3031和所述基板10之间的粘附力。
S202，在所述遮光层上形成所述第一减反层，所述第一减反层的反射率小于所述遮光层的反射率。
在一实施例中，如图5所示，所述第一减反层3032的组成材料包括氧化钼。具体的，当所述第一减反层3032为单层膜层时，所述第一减反层3032的组成材料可以包括氧化钼。在一实施例中，当所述第一减反层3032为复合膜层时，所述第一减反层3032包括：第一子层，所述第一子层的组成材料包括但不限于钼钛掺镍合金、钼钛合金或者钼；第二子层，所述第二子层位于所述第一子层靠近所述有源层的一侧，所述第二子层的组成材料包括但不限于氧化铟锌或者氧化铟锡。
具体的，如图5所示，可以依次在所述基板10上形成整面且连续的遮光膜和第一减反膜，再一次性对所述遮光膜和所述第一减反膜进行图案化处理以形成所述遮光层3031和所述第一减反层3032。同理，可以根据所述遮光膜和所述第一减反膜的实际膜层结构进行整面且连续的膜层制作和图案化处理。
S203，在所述第一减反层上形成所述有源层。
需要注意的是，如图5所示，由于所述遮光层3031较靠近所述基板10，且所述第一减反层3032较靠近所述有源层201，即外界光线或者背光光线依次经过所述遮光层3031和所述第一减反层3032。可以理解的，将所述遮光层3031的反射率设置的较大，不仅可以将较多的外界光线或者背光光线反射至远离所述有源层201的一侧，以提高光线的利用率，而且可以减少光线在所述遮光层3031的通过率，以避免光线照射至所述有源层201；将所述第一减反层3032的反射率设置的较小，可以将照射至所述第一减反层3032的大部分光线吸收，减少从所述第一减反层3032反射至所述有源层201的光线。因此，本实施例可以减小照射至有源层201上的光线，降低所述薄膜晶体管层出现性能变化从而失效的风险，以提高薄膜晶体管工作的稳定性和可靠性。
进一步的，如图5所示，所述显示面板100还包括缓冲层40，所述缓冲层40位于所述遮光层3031远离所述基板10的一侧，且所述缓冲层40覆盖所述遮光层3031和所述基板10，即在所述步骤S2031之前可以先在所述遮光层303和所述基10上形成整面且连续的所述缓冲层40。具体的，所述缓冲层40呈绝缘性，所述缓冲层40可以为单层膜层或者复合膜层。例如，当所述缓冲层40为单层膜层时，所述缓冲层40的组成材料可以包括但不限于氧化硅、氮化硅或者氮氧化硅；当所述缓冲层40为复合膜层时，所述缓冲层40可以包括第一缓冲层和位于所述第一缓冲层远离所述基板10一侧的第二缓冲层，所述第一缓冲层的组成材料可以包括但不限于氮化硅，所述第二缓冲层的组成材料可以包括但不限于氧化硅。
同理，可以先在所述缓冲层40上形成整面且连续的有源膜，再对所述有源膜进行图案化处理以形成所述有源层201。需要注意的是，所述有源层201和所述遮光层3031相对设置，并且所述有源层201的两端分别未超出所述遮光层3031的两端。
在一实施例中，所述金属层还包括栅极层，所述减反层还包括第二减反层，如图7所示，所述步骤S203可以包括但不限于如下步骤。
S2031，在所述有源层上形成所述第二减反层。
进一步的，如图5所示，所述薄膜晶体管层还包括绝缘层202，所述绝缘层202位于所述栅极层3041和所述有源层201之间，即在所述S2031之前，可以先在所述有源层201上形成所述绝缘层202，根据上文可知，在形成所述绝缘层202 的同时也可以形成子绝缘层80。具体的，所述绝缘层202可以为单层膜层或者复合膜层，当所述绝缘层202为单层膜层时，所述绝缘层202的组成材料可以包括但不限于氧化硅或者氮化硅；当所述绝缘层202为复合膜层时，所述绝缘层202可以为但不限于三氧化二铝/氮化硅/氧化硅层、氧化硅/氮化硅/氧化硅层。同理，可以先在所述有源层201上形成整面且连续的绝缘膜，再对所述绝缘膜进行图案化处理以形成所述绝缘层202。
在一实施例中，所述第二减反层3042的组成材料包括氧化钼。具体的，当所述第二减反层3042为单层膜层时，所述第二减反层3042的组成材料可以包括氧化钼。在一实施例中，当所述第二减反层3042为复合膜层时，所述第二减反层3042包括：第三子层，所述第三子层的组成材料包括但不限于钼钛掺镍合金、钼钛合金或者钼；第四子层，所述第四子层位于所述第三子层靠近所述有源层的一侧，所述第四子层组成材料包括但不限于氧化铟锌或者氧化铟锡。
S2032，在所述第二减反层上形成所述栅极层，所述第二减反层的反射率小于所述栅极层的反射率。
在一实施例中，如图5所示，所述栅极层3041的组成材料包括金属材料。具体的，所述栅极层3041可以为单层膜层或者复合膜层，当所述栅极层3041为单层膜层时，所述栅极层3041的组成材料可以包括但不限于铜、铝、钼、或者钛，当然所述栅极层3041的组成材料也可以包括金属氧化物、金属氮化物或者金属氮氧化物；当所述栅极层3041为复合膜层时，所述栅极层3041可以为但不限于钼/铝/钼层、铝/钼层、钼/铜层、钼钛合金/铜层。
同理，可以依次在所述绝缘层202、所述子绝缘层80、所述有源层201和所述缓冲层40上形成整面且连续的第二减反膜和栅极膜，再一次性对所述第二减反膜和所述栅极膜进行图案化处理以形成所述第二减反层3042和所述栅极层3041，同时也形成第一导电层60，可以理解的，所述第一导电层60的膜层结构和所述栅极层304相同。同理，可以根据所述第二减反膜和所述栅极膜的实际膜层结构进行整面且连续的膜层制作和图案化处理。
在一实施例中，所述金属层包括栅极层，所述减反层包括第二减反层，如图8所示，所述步骤S20也可以包括但不限于如下步骤。
S204，在所述基板上形成所述有源层。
具体的，如图5所示，所述有源层201可以参考上文的相关描述。可以理解的，此处可以先在所述基板10上形成所述缓冲层40，再在所述缓冲层40上形成所述有源层201。
S205，在所述有源层上形成所述第二减反层。
具体的，所述步骤S205可以参考上文中所述步骤S2031的相关描述。
S206，在所述第二减反层上形成所述栅极层，所述第二减反层的反射率小于所述栅极层的反射率。
具体的，所述步骤S206可以参考上文中所述步骤S2032的相关描述。
在一实施例中，如图9所示，在所述步骤S2032或者所述步骤S206之后可以包括但不限于如下步骤。
S20321，在所述栅极层3041上形成中间介电层50。
具体的，根据上文论述可知，在所述栅极层304、所述第一导电层60、所述缓冲层40、所述有源层201和所述绝缘层202上形成所述中间介电层50。其中，所述中间介电层50上设有多个通孔01，所述多个通孔01可以通过图案化形成。
S20322，在所述中间介电层50上形成源极层203、漏极层204和第二导电层70。
具体的，所述源极层203、所述漏极层204和所述第二导电层70可以参考上文的相关描述。同样，所述源极层203、所述漏极层204和所述第二导电层70可以通过图案化形成。其中，所述源极层203的两端分别连接所述有源层201的左端和所述遮光层303，所述漏极层204连接所述有源层201的右端。
S20323，在所述中间介电层50、所述漏极层204和部分所述源极层203上形成钝化层101，以及在所述钝化层101上形成黑色遮光层102。
具体的，所述钝化层101和所述黑色遮光层102可以参考上文的相关描述。其中，可以先依次在所述中间介电层50、所述漏极层204和部分所述源极层203上形成钝化膜、黑色遮光膜，再对所述黑色遮光膜进行图案化处理形成所述黑色遮光层102，再通过所述黑色遮光层102作为硬掩模对所述钝化膜进行图案化处理形成所述钝化层101。
S20334，在所述源极层203和所述第二导电层70上形成发光层90、第一电极901和第二电极902。
具体的，所述发光层90、所述第一电极901和所述第二电极902可以参考上文的相关。其中，所述发光层90、所述第一电极901和所述第二电极902可以先制作完成，再一次性转移至对应的所述源极层203和对应的所述第二导电层70上。
本发明实施例提供显示装置，所述显示装置包括如上文任一所述的显示面板或者包括如上文任一所述的制作方法制作的显示面板。
本发明提供了显示面板及其制作方法、显示装置，所述显示面板包括薄膜晶体管层，所述薄膜晶体管层包括有源层、金属层和减反层，通过将所述减反层设置为位于所述金属层靠近所述有源层的一侧，且所述减反层的反射率小于所述金属层的反射率，即所述减反层可以增强所述金属层靠近所述有源层的一侧对于光线的吸收，以减少照射至所述有源层上的光线，从而降低薄膜晶体管层出现性能变化从而失效的风险，以提高薄膜晶体管层工作的稳定性和可靠性。
以上对本发明实施例所提供的显示面板及其制作、显示装置进行了详细介绍，本文中应用了具体个例对本发明的原理及实施方式进行了阐述，以上实施例的说明只是用于帮助理解本发明的技术方案及其核心思想；本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本发明各实施例的技术方案的范围。

Claims (19)

  1. 一种显示面板，其中，包括：
    基板；
    薄膜晶体管层，所述薄膜晶体管层位于所述基板上，所述薄膜晶体管层包括有源层、金属层和减反层，所述减反层至少位于所述金属层靠近所述有源层的一侧，所述减反层的反射率小于所述金属层的反射率。
  2. 如权利要求1所述的显示面板，其中，所述金属层包括遮光层，所述遮光层位于所述有源层靠近所述基板的一侧，所述减反层包括第一减反层，所述第一减反层位于所述遮光层靠近所述有源层的一侧，所述第一减反层的反射率小于所述遮光层的反射率。
  3. 如权利要求2所述的显示面板，其中，所述第一减反层的组成材料包括氧化钼。
  4. 如权利要求2所述的显示面板，其中，所述第一减反层包括：
    第一子层，所述第一子层的组成材料包括钼钛掺镍合金、钼钛合金或者钼；
    第二子层，所述第二子层位于所述第一子层靠近所述有源层的一侧，所述第二子层的组成材料包括氧化铟锌。
  5. 如权利要求2所述的显示面板，其中，所述遮光层的组成材料包括金属材料。
  6. 如权利要求2所述的显示面板，其中，所述显示面板还包括缓冲层，所述缓冲层位于所述第一减反层远离所述基板的一侧，且所述缓冲层覆盖所述第一减反层和所述基板。
  7. 如权利要求1或2所述的显示面板，其中，所述金属层包括栅极层，所述栅极层位于所述有源层远离所述基板的一侧，所述减反层包括第二减反层，所述第二减反层位于所述栅极层靠近所述有源层的一侧，所述第二减反层的反射率小于所述栅极层的反射率。
  8. 如权利要求7所述的显示面板，其中，所述第二减反层的组成材料包括氧化钼。
  9. 如权利要求7所述的显示面板，其中，所述第二减反层包括：
    第三子层，所述第三子层的组成材料包括钼钛掺镍合金、钼钛合金或者钼；
    第四子层，所述第四子层位于所述第三子层靠近所述有源层的一侧，所述第四子层的组成材料包括氧化铟锌。
  10. 如权利要求7所述的显示面板，其中，所述栅极层的组成材料包括金属材料。
  11. 如权利要求7所述的显示面板，其中，所述薄膜晶体管层还包括绝缘层，所述绝缘层位于所述栅极层和所述有源层之间。
  12. 如权利要求1所述的显示面板，其中，所述有源层的组成材料包括金属氧化物。
  13. 如权利要求1所述的显示面板，其中，所述减反层和所述有源层相对设置，且所述减反层的两端分别超出所述有源层的两端。
  14. 一种显示面板的制作方法，其中，用于制作显示面板，所述方法包括：
    提供一基板；
    在所述基板上形成薄膜晶体管层，所述薄膜晶体管层包括有源层、金属层和减反层，所述减反层至少位于所述金属层靠近所述有源层的一侧，所述减反层的反射率小于所述金属层的反射率。
  15. 如权利要求14所述的显示面板的制作方法，其中，所述金属层包括遮光层，所述减反层包括第一减反层，所述在所述基板上形成薄膜晶体管层的步骤包括：
    在所述基板上形成所述遮光层；
    在所述遮光层上形成所述第一减反层，所述第一减反层的反射率小于所述遮光层的反射率；
    在所述第一减反层上形成所述有源层。
  16. 如权利要求15所述的显示面板的制作方法，其中，所述金属层还包括栅极层，所述减反层还包括第二减反层，所述在所述第一减反层上形成所述有源层的步骤之后，包括：
    在所述有源层上形成所述第二减反层；
    在所述第二减反层上形成所述栅极层，所述第二减反层的反射率小于所述栅极层的反射率。
  17. 如权利要求14所述的显示面板的制作方法，其中，所述金属层包括栅极层，所述减反层包括第二减反层，所述在所述基板上形成薄膜晶体管层的步骤包括：
    在所述基板上形成所述有源层；
    在所述有源层上形成所述第二减反层；
    在所述第二减反层上形成所述栅极层，所述第二减反层的反射率小于所述栅极层的反射率。
  18. 如权利要求16或17所述的显示面板的制作方法，其中，所述在所述第二减反层上形成所述栅极层，所述第二减反层的反射率小于所述栅极层的反射率的步骤之后或者所述在所述第二减反层上形成所述栅极层，所述第二减反层的反射率小于所述栅极层的反射率的步骤之后，包括：
    在所述栅极层上形成中间介电层；
    在所述中间介电层上形成源极层、漏极层和第二导电层；
    在所述中间介电层、所述漏极层和部分所述源极层上形成钝化层，以及在所述钝化层上形成黑色遮光层；
    在所述源极层和所述第二导电层上形成发光层、第一电极和第二电极。
  19. 一种显示装置，其中，所述显示装置包括如权利要求1所述的显示面板或包括采用如权利要求14所述的显示面板的制作方法制作的显示面板。
PCT/CN2021/084525 2021-02-04 2021-03-31 显示面板及其制作方法、显示装置 WO2022165964A1 (zh)

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