WO2022165955A1 - 闪存的异常检测方法、装置、计算机设备及存储介质 - Google Patents
闪存的异常检测方法、装置、计算机设备及存储介质 Download PDFInfo
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- G—PHYSICS
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- the present invention relates to the field of information technology, and in particular, to a method, device, computer equipment and storage medium for abnormality detection of flash memory.
- SSD Solid State Disk
- the solid state drive is composed of a control unit and a storage unit. With the advantages of no noise and light weight, it is widely used in industrial control, video surveillance, network monitoring, network terminals, navigation equipment and many other fields.
- the storage unit of SSD is mainly flash memory. To the extent, errors will occur in the data storage process, affecting the normal use of the entire storage system.
- the number of program-erase operations of the flash memory is usually limited to prevent the flash memory from causing errors in the storage process due to excessive wear.
- this method greatly limits the service life of the flash memory, and it is impossible to know the actual wear and tear of the flash memory during use, that is, it is impossible to detect the abnormality of the flash memory. Once the flash memory is abnormal, it will continue to store data, which will lead to data storage errors. , and this method cannot avoid the loss caused by sudden flash data errors.
- the present invention provides a method, device, computer equipment and storage medium for abnormality detection of flash memory, mainly in that the abnormality detection of flash memory can be performed according to the reliability level corresponding to the flash memory, so as to avoid data storage errors caused by abnormality of the flash memory.
- a method for detecting anomalies of flash memory including:
- the flash memory block to be detected is abnormal.
- an abnormality detection device for flash memory comprising:
- an acquisition unit used for acquiring attribute characteristics corresponding to the flash memory block to be detected in the flash memory chip
- a first prediction unit configured to input the attribute feature into a preset reliability prediction model for low-frequency reliability prediction, and obtain a low-frequency prediction result corresponding to the flash memory block to be detected;
- a second prediction unit configured to input the attribute feature into the preset reliability level model for high-frequency reliability prediction if the low-frequency prediction result does not meet the preset reliability level requirements, and obtain the to-be-detected The high-frequency prediction result corresponding to the flash block;
- a determination unit configured to determine whether there is an abnormality in the flash memory block to be detected according to the high-frequency prediction result.
- a computer-readable storage medium on which a computer program is stored, and when the program is executed by a processor, the following steps are implemented:
- the flash memory block to be detected is abnormal.
- a computer device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, the processor implementing the following steps when executing the program:
- the flash memory block to be detected is abnormal.
- the present invention provides a flash memory abnormality detection method, device, computer equipment and storage medium, which can obtain the flash memory to be detected in the flash memory chip.
- the attribute feature corresponding to the block; and the attribute feature is input into the preset reliability prediction model for low-frequency reliability prediction, and the low-frequency prediction result corresponding to the flash memory block to be detected is obtained; if the low-frequency prediction result does not meet the preset reliability If the reliability level requirement is met, the attribute feature is input into the preset reliability level model for high-frequency reliability prediction, and the high-frequency prediction result corresponding to the flash memory block to be detected is obtained; finally, according to the high-frequency prediction result, Determining whether the flash memory block to be detected is abnormal, thus by performing low-frequency reliability prediction and high-frequency reliability prediction on the flash memory block to be detected, the reliability prediction result corresponding to the flash memory block to be detected can be determined, and then according to the reliability prediction result It can determine whether there is an abnormality in the flash memory
- the present invention adopts the combination of high-frequency reliability prediction and low-frequency reliability prediction, which can reduce the power consumption and the computing resource occupation of the main control chip while improving the accuracy of the prediction result, thereby reducing the amount of time required for the computer storage device. influences.
- FIG. 1 shows a flowchart of an abnormality detection method of a flash memory provided by an embodiment of the present invention
- FIG. 2 shows a flowchart of another flash memory abnormality detection method provided by an embodiment of the present invention
- FIG. 3 shows a schematic structural diagram of an abnormality detection device for a flash memory provided by an embodiment of the present invention
- FIG. 4 shows a schematic structural diagram of another flash memory abnormality detection apparatus provided by an embodiment of the present invention.
- FIG. 5 shows a schematic diagram of an entity structure of a computer device provided by an embodiment of the present invention.
- the way of limiting the number of program-erase operations of the flash memory greatly limits the service life of the flash memory, and it is impossible to know the actual wear and tear of the flash memory during use, that is, it is impossible to detect the abnormality of the flash memory. Once the flash memory is abnormal Continuing data storage will result in data storage errors, and this method cannot avoid losses caused by sudden flash data errors.
- an embodiment of the present invention provides a method for detecting anomaly of a flash memory, as shown in FIG. 1 , the method includes:
- the flash memory chip includes a plurality of flash memory blocks to be tested, and the number of the flash memory blocks to be tested is related to the model and actual usage of the flash memory chip.
- the flash memory chip includes 1352 flash memory blocks , 1267 flash memory blocks are put into use, and the remaining 85 flash memory blocks are used as backup.
- the 1267 flash memory blocks are the flash memory blocks to be detected.
- the attribute characteristics corresponding to the flash memory blocks to be detected include the number, the number of programming and erasing operations , Flash memory operation time, operating current, power consumption, voltage distribution, original page error bit count, page original error bit rate, flash conditional error page count, conditional error block count at least one attribute feature, and can also be other attribute features , the embodiments of the present invention are not specifically limited.
- the embodiments of the present invention are mainly applicable to the scenario of abnormal detection of flash memory blocks in flash memory chips.
- the execution subject of the embodiments of the present invention is a device or equipment capable of abnormal detection of flash memory blocks, which may be specifically set on the server side.
- the main control chip of the SSD when the SSD is in normal use, the main control chip of the SSD will collect and record the attribute characteristics corresponding to each flash memory block to be detected. The collection is performed during normal use, or the SSD can automatically test the flash memory block to be tested, and collect data according to the test results. For example, in the process of collecting the raw error bits of the page of the block to be tested, the device side can read the flash memory. The data written by the user in the block is compared with the recorded data written by the user, and the original number of error bits on the page is determined according to the comparison result. In addition, it can also be written in the flash block by the SSD main control chip on the device side.
- the attribute feature corresponding to the flash memory block to be detected can be obtained, so as to perform reliability prediction on the flash memory block to be detected according to the attribute feature.
- the preset reliability detection model may specifically be a support vector machine reliability detection model, a naive Bayesian reliability detection model, a K-nearest neighbor reliability detection model, a decision tree reliability detection model, and a neural network reliability detection model, or It is another model, which is not specifically limited in this embodiment of the present invention.
- the low-frequency prediction result may specifically be a low-frequency reliability prediction level, which may be divided into multiple reliability levels according to the total original error bits corresponding to the flash memory block. The number of levels can be set according to actual needs.
- the reliability levels corresponding to flash memory blocks include level one, level two, level three, level four, and level five.
- the preset reliability level requires that the reliability level of the flash memory block to be detected must be Below level 4, if the reliability level corresponding to the flash memory block to be detected is level 4 or level 5, it is determined that the prediction result of the flash memory block to be detected does not meet the preset reliability level requirement.
- the low frequency reliability prediction of the flash memory block to be detected in the process of reliability prediction of the flash memory block to be detected, in order to reduce the power consumption and computing resource occupation of the main control chip, the low frequency reliability prediction of the flash memory block to be detected can be performed first. After the block has undergone the first preset number of programming and erasing operations, the reliability of the flash memory block to be detected is predicted. Set the reliability prediction model to perform reliability prediction, and obtain the low-frequency prediction result corresponding to the flash memory block to be detected. Perform high-frequency reliability detection on the block; if the low-frequency detection result meets the preset reliability level requirements, continue to perform low-frequency reliability detection on the flash memory block to be detected.
- a linear operation or a nonlinear operation is performed on the attribute feature corresponding to the flash memory block to be detected, and the calculated attribute feature is input into a preset reliability detection model for low-frequency reliability prediction, and a low-frequency prediction result corresponding to the flash memory block to be detected is obtained.
- the low-frequency prediction result is specifically the probability values of the flash memory blocks to be detected belonging to different reliability levels, and the maximum value of each probability value is selected, and the reliability level corresponding to the maximum value is determined as the low-frequency reliability level corresponding to the flash memory block to be detected.
- the low-frequency reliability level does not meet the preset reliability level requirements, perform high-frequency reliability prediction on the flash memory block to be detected; if the low-frequency reliability level meets the preset reliability level requirements, continue to perform low-frequency reliability prediction on the flash memory block to be detected. Reliability testing.
- the reliability of the flash memory block to be tested can be predicted every time the flash memory block to be tested undergoes a second preset number of programming and erasing operations, for example, every 20 times.
- the attribute characteristics corresponding to the flash memory block to be detected are input into a preset reliability prediction model for reliability prediction, and the high frequency prediction result corresponding to the flash memory block to be detected is obtained.
- the high-frequency prediction result is specifically the probability value of the flash memory block to be detected belonging to different reliability levels, the maximum value of each probability value is selected, and the reliability level corresponding to the maximum value is determined as the high value corresponding to the flash memory block to be detected. If the high-frequency reliability level does not meet the preset reliability level requirements, it is determined that a high-frequency prediction result does not meet the preset reliability level requirements.
- the flash memory block to be detected in the process of high-frequency reliability prediction, in order to further ensure the accuracy of the prediction results, when there are multiple high-frequency prediction results that do not meet the preset reliability level requirements, it is determined that the flash memory block to be detected is abnormal , for example, after the flash memory block has undergone the first 20 programming and erasing operations, perform high-frequency reliability prediction on it, and if it is determined that its flash memory block does not meet the preset reliability level requirements, continue to perform high-frequency reliability prediction on it.
- a preset duration can be set. For example, if three high-frequency prediction results are accumulated within 1 hour, the preset reliability If the level requirements are met, it is determined that there is an abnormality in the flash memory block to be detected.
- the method for detecting an abnormality of the flash memory can obtain the attribute characteristics corresponding to the flash memory block to be detected in the flash memory chip; Input the attribute feature into a preset reliability prediction model for low-frequency reliability prediction, and obtain a low-frequency prediction result corresponding to the flash memory block to be detected; if the low-frequency prediction result does not meet the preset reliability level requirements, then The attribute feature is input into the preset reliability level model for high-frequency reliability prediction, and a high-frequency prediction result corresponding to the flash memory block to be detected is obtained; finally, the flash memory to be detected is determined according to the high-frequency prediction result.
- the block is abnormal or not, by performing low-frequency reliability prediction and high-frequency reliability prediction on the flash memory block to be detected, the reliability prediction result corresponding to the flash memory block to be detected can be determined, and then the flash memory block to be detected can be determined according to the reliability prediction result.
- the stored data can be backed up in time, and the corresponding read and write operations can be stopped, so as to avoid data storage errors and prolong the service life of the flash memory block.
- the combination of high-frequency reliability prediction and low-frequency reliability prediction can improve the accuracy of prediction results, reduce power consumption and the occupation of computing resources of the main control chip, and thus reduce the impact on computer storage devices.
- the embodiment of the present invention provides another abnormality detection method for flash memory, as shown in FIG.
- the methods described include:
- a reliability prediction model needs to be constructed in advance.
- the method includes: obtaining the same process and model as the flash memory chip, And the sample attribute features corresponding to the flash memory blocks in different batches of sample flash memory chips; perform linear operation or nonlinear operation on the sample attribute features to obtain the sample attribute features after operation; use the sample attribute features after the operation as training
- a preset neural network algorithm is used to train the training set to construct a preset reliability prediction model.
- the sample flash memory chips can be selected according to the following rules, and the sample flash memory chips of the same process, type, and model as the flash memory chips to be tested, and of different batches from those of the flash memory chips to be tested are selected, thereby ensuring that the training samples have Diversity can better enhance the generalization ability of the preset reliability prediction model and alleviate the worries of subsequent model parameter optimization.
- the flash memory chip to be tested is the TLC NAND Flash flash memory product MT29F512G08EBLCE (referred to as model M flash memory).
- the chip has a total of 1352 flash memory blocks with a total capacity of 512Gb and a preset lifespan of 3000 program and erase operations.
- the selected sample flash memory chip is connected to the flash memory test system, and the specifications, test information and test pattern of the model flash memory are set, and then the flash memory blocks in the sample flash memory chip are respectively tested.
- Block erase operation and page programming operation and write the test pattern into the sample flash memory block, and then update the cycle value corresponding to the program and erase operations.
- the obtained page data is compared with the test pattern written by the programming operation of the corresponding page, and the corresponding flash memory block error information is obtained and recorded.
- the original error bit rate of the page in the flash memory error information exceeds the upper limit of the error correction algorithm. If it exceeds the upper limit of the error correction algorithm, stop the test and return to the sample flash block test termination callout; if it does not exceed the upper limit of the error correction algorithm, continue to perform block erase operations and page programming on the sample flash block operate.
- the sample attribute features collected during the above-mentioned sample flash memory chip testing process include: the number corresponding to the sample flash memory block, the number of programming and erasing operations, the flash memory operation time, operating current, power consumption, voltage distribution, At least one sample attribute feature among the number of original page errors, the page original error bit rate, the number of flash conditional error pages, and the number of conditional error blocks.
- the operation method includes at least one of the following: linear and nonlinear operation of sample attribute characteristics, linear and nonlinear operation between different sample attribute characteristics, calculation of the maximum and minimum value of sample attribute characteristics of different storage pages, Linear and nonlinear operations between sample attribute features of different storage pages, linear and nonlinear operations between sample attribute features of different storage blocks, maximum and minimum value of sample attribute features of different storage blocks, for example, the corresponding sample flash block
- the sample attribute features include: the number of raw error bits on the page of the sample flash memory block, the number of programming and erasing operations that the sample flash memory block has experienced currently, and the average value of the number of raw error bits on the page corresponding to the sample flash memory chip is calculated according to the above sample attribute features.
- the preset reliability prediction model can be but not limited to support vector machine reliable prediction model, naive Bayesian reliable prediction model sex prediction model, K-nearest neighbor reliability prediction model, decision tree reliability prediction model and neural network reliability prediction model.
- the preset reliability prediction model is the preset decision tree reliability prediction model
- Region category calculate the regression variance in this planning method, if the regression variance is large and greater than or equal to the preset threshold, re-select the classification node for region division; if the regression variance is less than the preset threshold, stop training and determine the preset Decision tree reliability prediction model.
- the built preset reliability prediction model is integrated into the SSD, and at the same time, it is equipped with software and hardware necessary for recording data and making predictions.
- the preset reliability prediction model can be integrated into the main control chip. , the model is run by the main control chip, and a dedicated machine learning chip can be used to run the model. No specific limitation is made.
- the main control chip can collect the attribute characteristics of each flash memory block to be detected, and use the preset reliability prediction model to perform reliability analysis of the flash memory block to be detected according to the collected attribute characteristics.
- the main control chip can collect and record the attribute characteristics of the 1267 flash memory blocks to be tested, and then predict the reliability level of the 1267 flash memory blocks to be tested. Further, in order to record the reliability prediction result corresponding to each flash memory block to be detected, an independent memory space can be opened to represent the prediction result, a total of 1267 bits are set, and each bit represents the reliability prediction corresponding to a flash memory block to be detected. As a result, the flag bit is 0 in a default state, and when it is determined that the flash memory block to be detected is abnormal, the flag corresponding to the flash memory block to be detected is set to 1.
- the SSD main control chip is required to have a good power-off retention capability, or an independent power supply can be used.
- the SSD has a built-in small lithium-ion battery, which is charged when the user is using the SSD normally. If the prediction model suddenly loses power while running, the lithium-ion battery can also complete the reliability prediction sequentially.
- the attribute feature includes at least one attribute feature of the number corresponding to the flash memory block to be detected, the number of programming and erasing operations, flash memory operation time, operating current, voltage distribution, and the number of original error bits in the page.
- the first preset number of times is set before the prediction starts. The first preset number of times may not be the same in different test processes. The first preset number of times is related to the following factors: chip model, type of reliability prediction model, reliability The accuracy of the prediction model, how many times the reliability prediction model can predict the reliability level after programming-erase operations, and the requirements for power consumption, computing resources, and reliability prediction accuracy.
- step 202 specifically includes: performing a linear operation or a nonlinear operation on the at least one attribute feature to obtain an attribute feature after the operation; The programming and erasing operations are performed, and the calculated attribute features are input into a preset reliability prediction model for low-frequency reliability prediction, and the low-frequency prediction result corresponding to the flash memory block to be detected is obtained.
- the reliability prediction model performs low-frequency prediction, and obtains the low-frequency prediction result corresponding to the flash memory block to be detected.
- High-frequency reliability detection if the low-frequency detection result meets the preset reliability level requirements, continue to perform low-frequency reliability detection on the flash memory block to be detected. It should be said that in the process of low-frequency prediction, in order to avoid occupying a lot of resources in the process of low-frequency prediction, the main control chip should pay attention to adjusting the prediction order between the flash memory blocks to be detected, and try to avoid predicting multiple flash memory blocks to be detected at the same time. .
- the second preset number of times is smaller than the first preset number of times.
- the second preset number of times is set before the prediction starts, and can also be continuously modified as the test proceeds.
- the preset times are not necessarily the same, and the second preset times are related to the following factors: the chip model, the type of the reliability prediction model, the accuracy of the reliability prediction model, and the number of times the reliability prediction model can predict after the program-erase operation. Reliability level, requirements for power consumption, computing resources, and reliability prediction accuracy.
- step 203 specifically includes: every time the first A preset number of programming and erasing operations are performed, and the calculated attribute features are input into the preset reliability level model for high-frequency reliability prediction, and a high-frequency prediction result corresponding to the flash memory block to be detected is obtained.
- the reliability prediction model performs high-frequency prediction, and obtains the high-frequency prediction result corresponding to the flash memory block to be detected.
- the main control chip should pay attention to adjusting the prediction order between the flash memory blocks to be detected, and try to avoid simultaneous detection of multiple flash memory blocks to be detected. Make predictions.
- step 203 specifically Including: if the high-frequency detection result does not meet the preset reliability level requirements, inputting the attribute feature into a preset reliability level model for high-frequency reliability after every third preset number of programming and erasing operations performance prediction to obtain a high-frequency detection result corresponding to the flash memory block to be detected, wherein the third preset number of times is less than the second preset number of times.
- high-frequency prediction After every 50 programming and erasing operations, high-frequency prediction is performed on the flash memory block to be detected.
- high-frequency prediction result fails to meet the preset reliability level requirements, every 20 programming times and erase operation, high-frequency prediction is performed on the flash memory block to be detected, so as to improve the prediction efficiency of the reliability level.
- step 204 specifically includes: according to the high-frequency prediction result, setting a flag bit corresponding to the flash memory block to be detected; detecting the flag bit corresponding to the flash memory block to be detected every preset time interval If the flag bit corresponding to the flash memory block to be detected is 1, then it is determined that the flash memory block to be detected is abnormal, the storage data of the flash memory block to be detected is backed up, and the reading of the flash memory block to be detected is stopped. write operation.
- the setting of the flag corresponding to the flash memory block to be detected according to the high-frequency prediction result includes: accumulating the number of predictions for which the high-frequency prediction result does not meet the preset reliability level requirement; if the number of predictions is greater than or equal to the fourth preset number of times, the flag bit corresponding to the flash memory block to be detected is set to 1.
- the fourth preset number of times is related to the accuracy of the prediction model. The higher the accuracy of the prediction model is, the lower the fourth preset number of times is set; the lower the accuracy of the prediction model is, the lower the fourth preset number of times is set. higher.
- the flag corresponding to the flash memory block to be detected is set to 1, and the normal default value is 0.
- Bus transmission and voltage biasing can be used.
- the main control chip will monitor the flag bits corresponding to each flash memory block in the memory. When the main control chip finds that a certain bit is set to 1, it means that the corresponding flash memory block does not meet the preset reliability level requirements. That is, if there is an exception, the main control chip will find a free flash memory block from the reserved flash memory block for data backup, and update the mapping table at the same time to avoid the flash memory block whose reliability level does not meet the standard from being used again.
- Free flash memory blocks indicate that all flash memory blocks are occupied or have become bad blocks. At this time, an alarm message will be sent to the user, prompting the user that the flash memory chip of the SSD is approaching the life limit, and the user is requested to manually back up the data. Since the flash memory block has not exceeded the reliability level requirements when the alarm is issued, the main control chip can read the data in the flash memory block and store it in another place without worrying about the reliability of the data. At the same time, the main control chip can also choose Dispose of the flash block completely to avoid data errors.
- the present invention can obtain the attribute characteristics corresponding to the flash memory block to be detected in the flash memory chip and input the attribute feature into a preset reliability prediction model for low-frequency reliability prediction, and obtain the low-frequency prediction result corresponding to the flash memory block to be detected; if the low-frequency prediction result does not meet the preset reliability level requirements, then Inputting the attribute feature into the preset reliability level model for high-frequency reliability prediction, and obtaining a high-frequency prediction result corresponding to the flash memory block to be detected; finally, according to the high-frequency prediction result, determine the to-be-detected flash memory block Whether there is an abnormality in the flash memory block, by performing low-frequency reliability prediction and high-frequency reliability prediction on the flash memory block to be detected, the reliability prediction result corresponding to the flash memory block to be detected can be determined, and then the flash memory to be detected can be determined according to the reliability prediction result.
- the stored data can be backed up in time, and the corresponding read and write operations can be stopped, so as to avoid data storage errors and prolong the service life of the flash memory block.
- the invention adopts the combination of high-frequency reliability prediction and low-frequency reliability prediction, which can reduce the power consumption and the occupation of computing resources of the main control chip while improving the accuracy of the prediction result, thereby reducing the impact on the computer storage device.
- an embodiment of the present invention provides an abnormality detection device for flash memory.
- the device includes: an acquisition unit 31 , a first prediction unit 32 , and a second prediction unit 33 and the determination unit 34 .
- the obtaining unit 31 may be configured to obtain attribute characteristics corresponding to the flash memory block to be detected in the flash memory chip.
- the first prediction unit 32 may be configured to input the attribute feature into a preset reliability prediction model to perform low-frequency reliability prediction, and obtain a low-frequency prediction result corresponding to the flash memory block to be detected.
- the second prediction unit 33 can be configured to input the attribute feature into the preset reliability level model for high-frequency reliability prediction if the low-frequency prediction result does not meet the preset reliability level requirements, and obtain: The high-frequency prediction result corresponding to the flash memory block to be detected.
- the determining unit 34 may be configured to determine whether there is an abnormality in the flash memory block to be detected according to the high-frequency prediction result.
- low-frequency prediction and high-frequency prediction are respectively performed for the flash memory block to be detected.
- the first prediction unit 32 can be specifically configured to input the attribute feature into a preset reliability prediction model for low-frequency reliability prediction every time it undergoes a first preset number of programming and erasing operations, and obtain the to-be-detected The low frequency prediction result corresponding to the flash block.
- the second prediction unit 33 can be specifically configured to input the attribute feature into the preset reliability level model for high-frequency reliability prediction every time the second preset number of programming and erasing operations are performed, and obtain the result.
- the attribute feature includes at least one attribute of the number corresponding to the flash memory block to be detected, the number of programming and erasing operations, flash memory operation time, operating current, voltage distribution, and the number of original error bits in the page.
- the first prediction unit 32 includes: an operation module 321 and a prediction module 322 .
- the operation module 321 may be configured to perform a linear operation or a nonlinear operation on the at least one attribute feature to obtain an attribute feature after operation.
- the prediction module 322 can be used to input the calculated attribute features into a preset reliability prediction model for low-frequency reliability prediction every time it undergoes a first preset number of programming and erasing operations, and obtain the to-be-detected The low frequency prediction result corresponding to the flash block.
- the second predicting unit 33 can also be used to input the calculated attribute features into the preset reliability level model for high-frequency reliability every time it undergoes a first preset number of programming and erasing operations. Prediction to obtain a high-frequency prediction result corresponding to the flash memory block to be detected.
- the second prediction unit 33 can also be used specifically if the high-frequency detection result does not meet the preset reliability level. If the level requirements are met, after every third preset number of programming and erasing operations, the attribute characteristics are input into the preset reliability level model for high-frequency reliability prediction, and the high-frequency detection corresponding to the flash memory block to be detected is obtained. As a result, the third preset number of times is smaller than the second preset number of times.
- the determining unit 34 includes: a setting module 341 , a detection module 342 and a backup module 343 .
- the setting module 341 may be configured to set the flag bit corresponding to the flash memory block to be detected according to the high-frequency prediction result.
- the detection module 342 may be configured to detect the flag bit corresponding to the flash memory block to be detected at preset time intervals.
- the backup module 343 can be configured to, if the flag bit corresponding to the flash memory block to be detected is 1, determine that the flash memory block to be detected is abnormal, perform backup processing on the stored data of the flash memory block to be detected, and stop. The read and write operations of the flash memory block to be detected.
- the setting module 341 includes: an accumulation sub-module and a setting sub-module.
- the accumulating sub-module may be used to accumulate the number of prediction times when the high-frequency prediction result does not meet the preset reliability level requirement.
- the setting submodule may be configured to set the flag bit corresponding to the flash memory block to be detected to 1 if the predicted number of times is greater than or equal to a fourth preset number of times.
- the apparatus further includes: an operation unit 35 and a construction unit 36 .
- the operation unit 35 may be configured to perform linear operation or non-linear operation on the sample attribute feature to obtain the sample attribute feature after operation.
- the construction unit 36 may be configured to use the calculated sample attribute features as a training set, and use a preset neural network algorithm to train the training set to construct a preset reliability prediction model.
- an embodiment of the present invention further provides a computer-readable storage medium, on which a computer program is stored, and when the program is executed by a processor, the following steps are implemented: obtaining a storage medium to be stored in a flash memory chip.
- Detecting attribute features corresponding to flash memory blocks inputting the attribute features into a preset reliability prediction model for low-frequency reliability prediction, and obtaining low-frequency prediction results corresponding to the flash memory blocks to be detected; if the low-frequency prediction results do not meet the preset requirements If the reliability level requirement is met, the attribute feature is input into the preset reliability level model for high-frequency reliability prediction, and the high-frequency prediction result corresponding to the flash memory block to be detected is obtained; according to the high-frequency prediction result, It is determined whether there is an abnormality in the flash memory block to be detected.
- an embodiment of the present invention further provides an entity structure diagram of a computer device.
- the computer device includes: a processor 41 , Memory 42, and a computer program stored on the memory 42 and running on the processor, wherein both the memory 42 and the processor 41 are arranged on the bus 43 and the processor 41 implements the following steps when executing the program: obtaining a flash memory chip attribute features corresponding to the flash memory blocks to be detected in the test; input the attribute features into a preset reliability prediction model for low-frequency reliability prediction, and obtain the low-frequency prediction results corresponding to the flash memory blocks to be detected; if the low-frequency prediction results do not satisfy Preset reliability level requirements, input the attribute feature into the preset reliability level model for high-frequency reliability prediction, and obtain the high-frequency prediction result corresponding to the flash memory block to be detected; according to the high-frequency prediction As a result, it is determined whether the flash memory block to be detected is abnormal.
- the present invention can obtain attribute characteristics corresponding to the flash memory blocks to be detected in the flash memory chip; input the attribute characteristics into a preset reliability prediction model for low-frequency reliability prediction, and obtain the flash memory to be detected.
- the low-frequency prediction result corresponding to the block if the low-frequency prediction result does not meet the preset reliability level requirements, input the attribute feature into the preset reliability level model for high-frequency reliability prediction, and obtain the to-be-detected
- the high-frequency prediction result corresponding to the flash memory block finally, according to the high-frequency prediction result, it is determined whether the flash memory block to be detected is abnormal.
- the reliability prediction result corresponding to the flash memory block to be detected and then it can be determined whether the flash memory block to be detected is abnormal according to the reliability prediction result. Therefore, data storage errors can be avoided and the service life of flash memory blocks can be extended.
- the present invention adopts the combination of high-frequency reliability prediction and low-frequency reliability prediction, which can reduce the power consumption while improving the accuracy of prediction results. It reduces the power consumption and the computing resource occupation of the main control chip, thereby reducing the impact on the computer storage device.
- modules or steps of the present invention can be implemented by a general-purpose computing device, which can be centralized on a single computing device, or distributed in a network composed of multiple computing devices Alternatively, they may be implemented in program code executable by a computing device, such that they may be stored in a storage device and executed by the computing device, and in some cases, in a different order than here
- the steps shown or described are performed either by fabricating them separately into individual integrated circuit modules, or by fabricating multiple modules or steps of them into a single integrated circuit module.
- the present invention is not limited to any particular combination of hardware and software.
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Abstract
本发明公开了一种闪存的异常检测方法、装置、计算机设备及存储介质，涉及信息技术领域，主要在于能够根据闪存对应的可靠性等级对闪存进行异常检测，从而能够避免由于闪存异常导致的数据存储错误。其中方法包括：获取闪存芯片中待检测闪存块对应的属性特征；将所述属性特征输入至预设可靠性预测模型进行低频可靠性预测，得到所述待检测闪存块对应的低频预测结果；若所述低频预测结果不满足预设可靠性等级要求，则将所述属性特征输入至所述预设可靠性等级模型进行高频可靠性预测，得到所述待检测闪存块对应的高频预测结果；根据所述高频预测结果，判定所述待检测闪存块是否存在异常。本发明适用于闪存的异常检测。
Description
本发明涉及信息技术领域，尤其是涉及一种闪存的异常检测方法、装置、计算机设备及存储介质。
固态硬盘(Solid State Disk)，简称SSD，是一种主要是闪存作为永久性存储器的计算机存储设备，固态硬盘由控制单元和存储单元组成，具有读写速度快、防震性强、低功耗、无噪音、重量轻等优点，被广泛应用于工控、视频监控、网络监控、网络终端、导航设备等诸多领域，SSD的存储单元以闪存为主，在使用过程中一旦闪存的氧化层磨损超过一定程度，便会在数据存储过程中出现错误，影响整个存储系统的正常使用。
目前，通常通过对闪存的编程-擦除操作的次数进行限制，以防止闪存由于过度损耗而导致在存储过程中出现错误。然而，这种方式极大地限制了闪存的使用寿命，而且无法在使用过程中了解闪存的实际损耗情况，即无法对闪存进行异常检测，一旦闪存出现异常还继续进行数据存储，会导致数据存储错误，同时这种方式无法避免突发性的闪存数据错误导致的损失。
发明内容
本发明提供了一种闪存的异常检测方法、装置、计算机设备及存储介质，主要在于能够根据闪存对应的可靠性等级对闪存进行异常检测，从而能够避免由于闪存异常导致的数据存储错误。
根据本发明的第一个方面，提供一种闪存的异常检测方法，包括：
获取闪存芯片中待检测闪存块对应的属性特征；
将所述属性特征输入至预设可靠性预测模型进行低频可靠性预测，得到所述待检测闪存块对应的低频预测结果；
若所述低频预测结果不满足预设可靠性等级要求，则将所述属性特征输入至所述预设可靠性等级模型进行高频可靠性预测，得到所述待检测闪存块对应的高频预测结果；
根据所述高频预测结果，判定所述待检测闪存块是否存在异常。
根据本发明的第二个方面，提供一种闪存的异常检测装置，包括：
获取单元，用于获取闪存芯片中待检测闪存块对应的属性特征；
第一预测单元，用于将所述属性特征输入至预设可靠性预测模型进行低频可靠性预测，得到所述待检测闪存块对应的低频预测结果；
第二预测单元，用于若所述低频预测结果不满足预设可靠性等级要求，则将所述属性特征输入至所述预设可靠性等级模型进行高频可靠性预测，得到所述待检测闪存块对应的高频预测结果；
判定单元，用于根据所述高频预测结果，判定所述待检测闪存块是否存在异常。
根据本发明的第三个方面，提供一种计算机可读存储介质，其上存储有计算机程序，该程序被处理器执行时实现以下步骤：
获取闪存芯片中待检测闪存块对应的属性特征；
将所述属性特征输入至预设可靠性预测模型进行低频可靠性预测，得到所述待检测闪存块对应的低频预测结果；
若所述低频预测结果不满足预设可靠性等级要求，则将所述属性特征输入至所述预设可靠性等级模型进行高频可靠性预测，得到所述待检测闪存块对应的高频预测结果；
根据所述高频预测结果，判定所述待检测闪存块是否存在异常。
根据本发明的第四个方面，提供一种计算机设备，包括存储器、处理器及存储在存储器上并可在处理器上运行的计算机程序，所述处理器执行所述程序时实现以下步骤：
获取闪存芯片中待检测闪存块对应的属性特征；
将所述属性特征输入至预设可靠性预测模型进行低频可靠性预测，得到所述待检测闪存块对应的低频预测结果；
若所述低频预测结果不满足预设可靠性等级要求，则将所述属性特征输入至所述预设可靠性等级模型进行高频可靠性预测，得到所述待检测闪存块对应的高频预测结果；
根据所述高频预测结果，判定所述待检测闪存块是否存在异常。
本发明提供的一种闪存的异常检测方法、装置、计算机设备及存储介质， 与目前对闪存的编程-擦除操作的次数进行限制的方式相比，本方明能够获取闪存芯片中待检测闪存块对应的属性特征；并将所述属性特征输入至预设可靠性预测模型进行低频可靠性预测，得到所述待检测闪存块对应的低频预测结果；若所述低频预测结果不满足预设可靠性等级要求，则将所述属性特征输入至所述预设可靠性等级模型进行高频可靠性预测，得到所述待检测闪存块对应的高频预测结果；最终根据所述高频预测结果，判定所述待检测闪存块是否存在异常，由此通过对待检测闪存块进行低频可靠性预测和高频可靠性预测，能够确定待检测闪存块对应的可靠性预测结果，进而根据该可靠性预测结果能够判定待检测闪存块是否存在异常，在闪存块存在异常的情况下，能够及时对存储数据进行备份，并停止相应的读写操作，从而能够避免发生数据存储错误，同时能够延长闪存块的使用寿命，此外，本发明采用高频可靠性预测和低频可靠性预测相结合，在提高预测结果准确度的同时，能够减少功耗和主控芯片的计算资源占用，进而能够减少对计算机存储设备的影响。
此处所说明的附图用来提供对本发明的进一步理解，构成本申请的一部分，本发明的示意性实施例及其说明用于解释本发明，并不构成对本发明的不当限定。在附图中：
图1示出了本发明实施例提供的一种闪存的异常检测方法流程图；
图2示出了本发明实施例提供的另一种闪存的异常检测方法流程图；
图3示出了本发明实施例提供的一种闪存的异常检测装置的结构示意图；
图4示出了本发明实施例提供的另一种闪存的异常检测装置的结构示意图；
图5示出了本发明实施例提供的一种计算机设备的实体结构示意图。
下文中将参考附图并结合实施例来详细说明本发明。需要说明的是，在不冲突的情况下，本申请中的实施例及实施例中的特征可以相互组合。
目前，对闪存的编程-擦除操作的次数进行限制的方式极大地限制了闪存的使用寿命，而且无法在使用过程中了解闪存的实际损耗情况，即无法对闪 存进行异常检测，一旦闪存出现异常还继续进行数据存储，会导致数据存储错误，同时这种方式无法避免突发性的闪存数据错误导致的损失。
为了解决上述问题，本发明实施例提供了一种闪存的异常检测方法，如图1所示，所述方法包括：
101、获取闪存芯片中待检测闪存块对应的属性特征。
其中，闪存芯片包括多个待检测闪存块，该待检测闪存块的数量与闪存芯片的型号和实际使用情况相关，以镁光TLC NAND Flash闪存产品MT29F512G08EBLCE为例，该闪存芯片中包括1352个闪存块，将1267个闪存块作为投入使用，剩余85个为闪存块作为备份，该1267个闪存块为待检测闪存块，此外，待检测闪存块对应的属性特征包括编号、编程和擦除操作的次数、闪存操作时间、工作电流、功耗、电压分布、页原始错误比特数、页原始错误比特率、闪存条件错误页数、条件错误块数中的至少一种属性特征，也可以为其他属性特征，本发明实施例不做具体限定。本发明实施例主要适用于对闪存芯片中的闪存块进行异常检测的场景，本发明实施例的执行主体为能够对闪存块进行异常检测的装置或者设备，具体可以设置在服务器一侧。
对于本发明实施例，在SSD被正常使用时，SSD的主控制芯片会采集并记录每一个待检测闪存块对应的属性特征，具体地，采集待检测闪存块属性特征的过程，可以是在用户正常使用过程中进行采集，也可以是SSD自动对待检测闪存块进行测试，并根据测试结果进行数据采集，例如，在采集待检测块的页原始错误比特数的过程中，装置侧可以读取闪存块中用户写入的数据，并将其与记录的用户写入的数据进行对比，根据对比结果确定页原始错误比特数，此外，还可以在装置侧由SSD主控制芯片在闪存块中写入一些数据，之后读取该数据并将其与记录的写入数据进行对比，根据对比结果确定页原始错误比特数。由此按照上述方式，能够获取待检测闪存块对应的属性特征，以便根据该属性特征对待检测闪存块进行可靠性预测。
102、将所述属性特征输入至预设可靠性预测模型进行低频可靠性预测，得到所述待检测闪存块对应的低频预测结果。
其中，预设可靠性检测模型具体可以为支持向量机可靠检测模型、朴素贝叶斯可靠性检测模型、K近邻可靠性检测模型、决策树可靠性检测模型和神经网络可靠性检测模型，也可以为其他模型，本发明实施例不做具体限定，此外，低频预测结果具体可以为低频可靠性预测等级，具体可以根据闪存块对应的总原始错误比特数，划分成多个可靠性等级，划分的等级数量可以根据实际需求进行设定，例如，闪存块对应的可靠性等级包括一级、二级、三级、四级和五级，预设可靠性等级要求待检测闪存块的可靠性等级必须低于四级，如果待检测闪存块对应的可靠性等级为四级或者五级，则确定待检测闪存块的本次预测结果不满足预设可靠性等级要求。
对于本发明实施例，在对待检测闪存块进行可靠性预测的过程中，为了减少主控制芯片的功耗和计算资源占用，可以先对待检测闪存块进行低频可靠性预测，具体可以在待检测闪存块每经历第一预设次数的编程和擦除操作后，对待检测闪存块的可靠性进行预测，例如，每经历200次编程和擦除操作，将待检测闪存块对应的属性特征输入至预设可靠性预测模型进行可靠性预测，得到待检测闪存块对应的低频预测结果，在低频可靠性等级预测的过程中，如果出现一次低频预测结果不满足预设可靠性等级要求，则对待检测闪存块进行高频可靠性检测；如果低频检测结果满足预设可靠性等级要求，则继续对待检测闪存块进行低频可靠性检测。
具体地，对待检测闪存块对应的属性特征进行线性运算或者非线性运算，并将运算后的属性特征输入至预设可靠性检测模型进行低频可靠性预测，得到待检测闪存块对应的低频预测结果，该低频预测结果具体为待检测闪存块属于不同可靠性等级的概率值，选取各个概率值中的最大值，将该最大值对应的可靠性等级确定为待检测闪存块对应的低频可靠性等级，如果该低频可靠性等级不满足预设可靠性等级要求，则对待检测闪存块进行高频可靠性预测；如果该低频可靠性等级满足预设可靠性等级要求，则对待检测闪存块继续进行低频可靠性检测。
103、若所述低频预测结果不满足预设可靠性等级要求，则将所述属性特征输入至所述预设可靠性等级模型进行高频可靠性预测，得到所述待检测闪存块对应的高频预测结果。
对于本发明实施例，为了提高闪存块可靠性等级预测的准确度，在低频可靠性预测的过程中如果发现待检测闪存块不满足预设可靠性等级要求，不能直接确定待检测闪存块存在异常，还需要进一步对其进行高频可靠性检测，具体可以在待检测闪存块每经历第二预设次数的编程和擦除操作，对待检测闪存块的可靠性进行预测，例如，每经历20次编程和擦除操作，将待检测闪存块对应的属性特征输入至预设可靠性预测模型进行可靠性预测，得到待检测闪存块对应的高频预测结果。在高频可靠性等级预测的过程中，为了确保预测结果的准确度，如果出现一次高频预测结果不满足预设可靠性等级要求，则继续对待检测闪存块进行高频预测，并累计高频预测结果不满足预设可靠性等级要求的次数，以便根据该累计次数判定闪存块是否存在异常。
具体地，对待检测闪存块对应的属性特征进行线性运算或者非线性运算，并将运算后的属性特征输入至预设可靠性检测模型进行高频可靠性预测，得到待检测闪存块对应的高频预测结果，该高频预测结果具体为待检测闪存块属于不同可靠性等级的概率值，选取各个概率值中的最大值，将该最大值对应的可靠性等级确定为待检测闪存块对应的高频可靠性等级，如果该高频可靠性等级不满足预设可靠性等级要求，则确定出现一次高频预测结果不满足预设可靠性等级要求。
104、根据所述高频预测结果，判定所述待检测闪存块是否存在异常。
对于本发明实施例，在高频可靠性预测的过程中，为了进一步保证预测结果的准确性，当存在多次高频预测结果不满足预设可靠性等级要求时，确定待检测闪存块存在异常，例如，当闪存块经历第一个20次编程和擦除操作后，对其进行高频可靠性预测，如果确定其闪存块不满足预设可靠性等级要求，则继续对其进行高频可靠性预测，如果累计到3次高频预测结果不满足预设可靠性等级要求，则确定待检测闪存块存在异常，可以将其在存储空间中对应的标志位设置为1，正常默认值为0，需要说明的是，为了避免无期限的对待检测闪存块进行高频可靠性预测，可以设定预设时长，例如，如果在1小时内累计到3次高频预测结果不满足预设可靠性等级要求，则确定待检测闪存块存在异常。
本发明实施例提供的一种闪存的异常检测方法，与目前对闪存的编程-擦除操作的次数进行限制的方式相比，本方明能够获取闪存芯片中待检测闪存块对应的属性特征；并将所述属性特征输入至预设可靠性预测模型进行低频可靠性预测，得到所述待检测闪存块对应的低频预测结果；若所述低频预测结果不满足预设可靠性等级要求，则将所述属性特征输入至所述预设可靠性等级模型进行高频可靠性预测，得到所述待检测闪存块对应的高频预测结果；最终根据所述高频预测结果，判定所述待检测闪存块是否存在异常，由此通过对待检测闪存块进行低频可靠性预测和高频可靠性预测，能够确定待检测闪存块对应的可靠性预测结果，进而根据该可靠性预测结果能够判定待检测闪存块是否存在异常，在闪存块存在异常的情况下，能够及时对存储数据进行备份，并停止相应的读写操作，从而能够避免发生数据存储错误，同时能够延长闪存块的使用寿命，此外，本发明采用高频可靠性预测和低频可靠性预测相结合，在提高预测结果准确度的同时，能够减少功耗和主控芯片的计算资源占用，进而能够减少对计算机存储设备的影响。
进一步的，为了更好的说明上述对闪存块的异常检测过程，作为对上述实施例的细化和扩展，本发明实施例提供了另一种闪存的异常检测方法，如图2所示，所述方法包括：
201、获取闪存芯片中待检测闪存块对应的属性特征。
对于本发明实施例，为了对待检测闪存块进行低频可靠性预测和高频可靠性预测，需要预先构建可靠性预测模型，基于此，所述方法包括：获取与所述闪存芯片相同工艺和型号，且不同批次的样本闪存芯片中闪存块对应的样本属性特征；对所述样本属性特征进行线性运算或者非线性运算，得到运算后的样本属性特征；将所述运算后的样本属性特征作为训练集，利用预设神经网络算法对所述训练集进行训练，构建预设可靠性预测模型。
具体地，选取样本闪存芯片时可以按照以下规则进行选取，选取与待检测闪存芯片具有相同工艺、类型、型号，且与待检测闪存芯片不同批次的样本闪存芯片，由此能够保证训练样本具有多样性，能更好地增强预设可靠性预测模型的泛化能力，减轻后续模型参数优化的担忧，例如，待检测闪存芯 片为TLC NAND Flash闪存产品MT29F512G08EBLCE(简称为型号M闪存)，该闪存芯片共有1352个闪存块，总容量为512Gb，预设寿命为3000次编程和擦除操作，若某SSD厂商试图使用此TLC闪存颗粒制造容量为480Gb的SSD，将1352个闪存块中的1267个闪存块投入使用，剩余的85个闪存块留作备份，当1267个闪存块闪存出现问题时，使用备用的85个闪存块进行补充，在选择样本闪存芯片时，可以选择同一制造工艺、不同批次生成的M型号样本闪存芯片中1267个闪存块进行数据采集，样本闪存块的编号应当覆盖闪存编号列表中的前中后区域。
进一步地，具体在进行数据采集的过程中，首先将选择的样本闪存芯片与闪存测试系统进行连接，并设置型号闪存的规格、测试信息以及测试图样，之后分别对样本闪存芯片中的闪存块进行块擦除操作和页编程操作，并将测试图样写入样本闪存块中，接着更新编程和擦除操作对应的周期数值，若该周期数以参数T
pe表示，周期数值更新表达式为：T
pe＝T
pe+1，进一步地，若T
pe值不是50的倍数，则继续对样本闪存块进行块擦除操作和页编程操作；若更新的T
pe值为50的倍数，则对样本闪存块进行页读取操作，需要说明的是，当更新的T
pe值为其他数值的倍数时，也可以对样本闪存块进行页读取操作，本发明实施例不做具体限定，之后将读取到的页数据与对应页的编程操作写入的测试图样进行数据对比，获取并记录相应的闪存块错误信息，进一步地，判断闪存错误信息中页原始错误比特率是否超过纠错算法的上限值，如果超过纠错算法的上限值，则停止测试，并返回样本闪存块测试终止标注；如果没有超过纠错算法的上限值，则继续对样本闪存块进行块擦除操作和页编程操作。
对于本发明实施例，在上述样本闪存芯片测试的过程中采集的样本属性特征包括：样本闪存块对应的编号、编程和擦除操作的次数、闪存操作时间、工作电流、功耗、电压分布、页原始错误比特数、页原始错误比特率、闪存条件错误页数、条件错误块数中的至少一种样本属性特征，进一步地，为了利用样本属性特征构建预设可靠性预测模型，需要对样本数据特征进行运算，该运算方法至少包括以下一种：样本属性特征的线性和非线性运算、不同样本属性特征间的线性和非线性运算、计算不同存储页面样本属性特征的最大 值和最小值、不同存储页面样本属性特征之间的线性和非线性运算、不同存储块样本属性特征之间的线性和非线性运算、不同存储块样本属性特征的最大值和最小值，例如，采集样本闪存块对应的样本属性特征包括：样本闪存块的页原始错误比特数，样本闪存块当前已经历的编程和擦除操作的次数，根据上述样本属性特征计算样本闪存芯片对应的页原始错误比特数的平均值、平方平均值和中位数，进一步地，将页原始错误比特数的均值值、页原始错误比特数平方的平均值，页原始错误比特数的中位数和样本闪存块当前已经历的编程和擦除操作的次数作为训练集，对该训练集进行训练，构建预设可靠性预测模型，该预设可靠性预测模型可以为但不局限于支持向量机可靠预测模型、朴素贝叶斯可靠性预测模型、K近邻可靠性预测模型、决策树可靠性预测模型和神经网络可靠性预测模型。
当预设可靠性预测模型为预设决策树可靠性预测模型时，具体训练时，首先从节点集合中选取适当的分裂节点，并对该分裂节点的取值范围进行区域划分，之后根据划分的区域类别，计算该中规划方式下的回归方差，若回归方差较大，大于或者等于预设阈值，则重新选取分类节点进行区域划分；若回归方差小于预设阈值，则停止训练，确定预设决策树可靠性预测模型。
进一步地，将构建的预设可靠性预测模型集成到SSD之中，同时为其配备记录数据和进行预测所必须的软硬件，具体地，可以将预设可靠性预测模型集成到主控制芯片中，由主控制芯片来运行该模型，可以使用专用的机器学习芯片来运行该模型，具体情况可以根据本发明实施例中主控制芯片的功耗、性能和机器学习算法而定，本发明实施例不做具体限定。当构建的可靠性模型集成到SSD的主控制芯片中，主控制芯片能够采集每一个待检测闪存块的属性特征，并根据采集的属性特征利用预设可靠性预测模型对待检测闪存块进行可靠性预测，当待检测闪存芯片为M型闪存芯片时，主控制芯片能够采集并记录1267个待检测闪存块的属性特征，进而对1267个待检测闪存块的可靠性等级进行预测。进一步地，为了记录每个待检测闪存块对应的可靠性预测结果，可以开辟一块独立的内存空间用于表示预测结果，共设置1267位，每一位表示一个待检测闪存块对应的可靠性预测结果，默认状态下标志位为0，当确定待检测闪存块存在异常时，设置待检测闪存块对应的标志为1。
需要说明的是，考虑到预设可靠性预测模型进行预测可能需要一定时间，为防止SSD突然掉电，要求SSD主控制芯片具有良好的断电保持能力，或者使用独立电源，具体地，可以在SSD内置一块小型锂离子电池，当用户正常使用SSD时进行充电，如果预测模型运行时突然掉电，通过锂离子电池也能够顺序完成可靠性预测。
202、每经历第一预设次数的编程和擦除操作，将所述属性特征输入至预设可靠性预测模型进行低频可靠性预测，得到所述待检测闪存块对应的低频预测结果。
其中，所述属性特征包括所述待检测闪存块对应的编号、编程和擦除操作的次数、闪存操作时间、工作电流、电压分布和页原始错误比特数中的至少一种属性特征，此外，第一预设次数是在预测开始之前进行设置的，不同的测试过程中第一预设次数未必相同，该第一预设次数与以下因素有关：芯片型号，可靠性预测模型的种类，可靠性预测模型的准确度，可靠性预测模型能够预测多少次编程-擦除操作之后的可靠性等级，对功耗、计算占用资源、可靠性预测准确度的要求。
对于本发明实施例，为了对待检测闪存块进行低频预测，步骤202具体包括：对所述至少一种属性特征进行线性运算或者非线性运算，得到运算后的属性特征；每经历第一预设次数的编程和擦除操作，将所述运算后的属性特征输入至预设可靠性预测模型进行低频可靠性预测，得到所述待检测闪存块对应的低频预测结果。
例如，每经历200次编程和擦除操作，采集待检测闪存块对应的页原始错误比特数，当前已经历的编程和擦除操作的次数，根据上述属性特征计算待检测闪存块对应的页原始错误比特数的平均值、平方平均值和中位数，之后将页原始错误比特数的平均值、平方平均值和中位数，以及当前已经历的编程和擦除操作的次数输入至预设可靠性预测模型进行低频预测，得到待检测闪存块对应的低频预测结果，在低频可靠性等级预测的过程中，如果出现一次低频预测结果不满足预设可靠性等级要求，则对待检测闪存块进行高频可靠性检测；如果低频检测结果满足预设可靠性等级要求，则继续对待检测 闪存块进行低频可靠性检测。需要说的是，在低频预测的过程中，为了避免低频预测过程中占用大量资源，主控制芯片应注意调整待检测闪存块之间的预测顺序，尽量避免同时对多个待检测闪存块进行预测。
203、若所述低频预测结果不满足预设可靠性等级要求，则每经历第二预设次数的编程和擦除操作，将所述属性特征输入至所述预设可靠性等级模型进行高频可靠性预测，得到所述待检测闪存块对应的高频预测结果。
其中，所述第二预设次数小于所述第一预设次数，此外，第二预设次数是在预测开始之前设置的，也可以随着测试的进行不断地修改，不同测试过程中第二预设次数未必相同，该第二预设次数与以下因素有关：芯片型号，可靠性预测模型的种类，可靠性预测模型的准确度，可靠性预测模型能够预测多少次编程-擦除操作之后的可靠性等级，对功耗、计算占用资源、可靠性预测准确度的要求。
对于本发明实施例，在低频预测结果不满足预设可靠性等级要求的情况下，为了确保预测结果的准确性，还需要对其进行高频检测，基于此，步骤203具体包括：每经历第一预设次数的编程和擦除操作，将所述运算后的属性特征输入至所述预设可靠性等级模型进行高频可靠性预测，得到所述待检测闪存块对应的高频预测结果。
例如，每经历50次编程和擦除操作，采集待检测闪存块对应的页原始错误比特数，当前已经历的编程和擦除操作的次数，根据上述属性特征计算待检测闪存块对应的页原始错误比特数的平均值、平方平均值和中位数，之后将页原始错误比特数的平均值、平方平均值和中位数，以及当前已经历的编程和擦除操作的次数输入至预设可靠性预测模型进行高频预测，得到待检测闪存块对应的高频预测结果，在高频可靠性等级预测的过程中，如果高频预测结果不满足预设等级要求的次数达到一定次数，则确定待检测闪存存在异常。需要说的是，在高频预测的过程中，为了避免高频预测过程中占用大量资源，主控制芯片应注意调整待检测闪存块之间的预测顺序，尽量避免同时对多个待检测闪存块进行预测。
在具体应用场景中，当高频预测结果出现一次不满足预设可靠性等级要求的情况，则说明待检测闪存块很有可能存在异常，需要提高频率对其进行预测，基于此，步骤203具体包括：若所述高频检测结果不满足预设可靠性等级要求，则每经历第三预设次数的编程和擦除操作，将所述属性特征输入至预设可靠性等级模型进行高频可靠性预测，得到所述待检测闪存块对应的高频检测结果，其中，所第三预设次数小于所述第二预设次数。
例如，高频预测时，每经历50次编程和擦除操作，对待检测闪存块进行高频预测，当高频预测结果出现一次不满足预设可靠性等级要求的情况，则每经历20次编程和擦除操作，对待检测闪存块进行高频预测，以便提高可靠性等级的预测效率。
204、根据所述高频预测结果，判定所述待检测闪存块是否存在异常。
对于本发明实施例，步骤204具体包括：根据所述高频预测结果，设置所述待检测闪存块对应的标志位；每隔预设时间间隔对所述待检测闪存块对应的标志位进行检测；若所述待检测闪存块对应的标志位为1，则确定所述待检测闪存块存在异常，对所述待检测闪存块的存储数据进行备份处理，并停止所述待检测闪存块的读写操作。进一步地，所述根据所述高频预测结果，设置所述待检测闪存块对应的标志位，包括：累计高频预测结果不满足预设可靠性等级要求的预测次数；若所述预测次数大于或者等于第四预设次数，则将所述待检测闪存块对应的标志位设置为1。其中，第四预设次数与预测模型的准确率有关，预测模型的准确率越高，第四预设次数被设置的越低；预测模型的准确率越低，第四预设次数被设置的越高。
例如，当高频预测结果不满预设可靠性等级要求的预测次数累计到3次时，将待检测闪存块对应的标志为设置为1，正常默认值为0，可以使用总线传输、电压拉偏等方式实现，主控制芯片会实施监测内存中各闪存块对应的标志位，当主控制芯片发现某一位被置为1之后，代表这一位对应的闪存块不满足预设可靠性等级要求，即存在异常，主控制芯片此时会从预留的闪存块中寻找一个空闲闪存块进行数据备份，同时更新映射表，避免可靠性等级不达标的闪存块再次被使用，如果主控制芯片没有找到空闲闪存块，说明所 有的闪存块均被占用或已经成为坏块，此时会向用户发出报警信息，提示用户该SSD的闪存芯片已接近寿命极限，请用户手动进行数据备份。由于发出报警时，闪存块还没有超出可靠性等级要求，主控制芯片可以将闪存块中的数据读出之后存放到另外的地方，而不必担心数据可靠性的问题，同时主控芯片也可以选择将闪存块完全弃置不用，避免出现数据错误。
本发明实施例提供的另一种闪存的异常检测方法，与目前对闪存的编程-擦除操作的次数进行限制的方式相比，本方明能够获取闪存芯片中待检测闪存块对应的属性特征；并将所述属性特征输入至预设可靠性预测模型进行低频可靠性预测，得到所述待检测闪存块对应的低频预测结果；若所述低频预测结果不满足预设可靠性等级要求，则将所述属性特征输入至所述预设可靠性等级模型进行高频可靠性预测，得到所述待检测闪存块对应的高频预测结果；最终根据所述高频预测结果，判定所述待检测闪存块是否存在异常，由此通过对待检测闪存块进行低频可靠性预测和高频可靠性预测，能够确定待检测闪存块对应的可靠性预测结果，进而根据该可靠性预测结果能够判定待检测闪存块是否存在异常，在闪存块存在异常的情况下，能够及时对存储数据进行备份，并停止相应的读写操作，从而能够避免发生数据存储错误，同时能够延长闪存块的使用寿命，此外，本发明采用高频可靠性预测和低频可靠性预测相结合，在提高预测结果准确度的同时，能够减少功耗和主控芯片的计算资源占用，进而能够减少对计算机存储设备的影响。
进一步地，作为图1的具体实现，本发明实施例提供了一种闪存的异常检测装置，如图3所示，所述装置包括：获取单元31、第一预测单元32、第二预测单元33和判定单元34。
所述获取单元31，可以用于获取闪存芯片中待检测闪存块对应的属性特征。
所述第一预测单元32，可以用于将所述属性特征输入至预设可靠性预测模型进行低频可靠性预测，得到所述待检测闪存块对应的低频预测结果。
所述第二预测单元33，可以用于若所述低频预测结果不满足预设可靠性等级要求，则将所述属性特征输入至所述预设可靠性等级模型进行高频可靠 性预测，得到所述待检测闪存块对应的高频预测结果。
所述判定元34，可以用于根据所述高频预测结果，判定所述待检测闪存块是否存在异常。
对于本发明实施例，如图4所示，为了对待检测闪存块分别进行低频预测和高频预测。
所述第一预测单元32，具体可以用于每经历第一预设次数的编程和擦除操作，将所述属性特征输入至预设可靠性预测模型进行低频可靠性预测，得到所述待检测闪存块对应的低频预测结果。
所述第二预测单元33，具体可以用于每经历第二预设次数的编程和擦除操作，将所述属性特征输入至所述预设可靠性等级模型进行高频可靠性预测，得到所述待检测闪存块对应的高频预测结果，其中，所述第二预设次数小于所述第一预设次数。
在具体应用场景中，所述属性特征包括所述待检测闪存块对应的编号、编程和擦除操作的次数、闪存操作时间、工作电流、电压分布和页原始错误比特数中的至少一种属性特征，第一预测单元32，包括：运算模块321和预测模块322。
所述运算模块321，可以用于对所述至少一种属性特征进行线性运算或者非线性运算，得到运算后的属性特征。
所述预测模块322，可以用于每经历第一预设次数的编程和擦除操作，将所述运算后的属性特征输入至预设可靠性预测模型进行低频可靠性预测，得到所述待检测闪存块对应的低频预测结果。
所述第二预测单元33，具体还可以用于每经历第一预设次数的编程和擦除操作，将所述运算后的属性特征输入至所述预设可靠性等级模型进行高频可靠性预测，得到所述待检测闪存块对应的高频预测结果。
进一步地，当高频预测结果出现一次不满足预设可靠性等级要求时，提高预测频率，所述第二预测单元33，具体还可以用于若所述高频检测结果不 满足预设可靠性等级要求，则每经历第三预设次数的编程和擦除操作，将所述属性特征输入至预设可靠性等级模型进行高频可靠性预测，得到所述待检测闪存块对应的高频检测结果，其中，所第三预设次数小于所述第二预设次数。
进一步地，为了判定待检测闪存块是否存在异常，所述判定单元34，包括：设置模块341、检测模块342和备份模块343。
所述设置模块341，可以用于根据所述高频预测结果，设置所述待检测闪存块对应的标志位。
所述检测模块342，可以用于每隔预设时间间隔对所述待检测闪存块对应的标志位进行检测。
所述备份模块343，可以用于若所述待检测闪存块对应的标志位为1，则确定所述待检测闪存块存在异常，对所述待检测闪存块的存储数据进行备份处理，并停止所述待检测闪存块的读写操作。
进一步地，为了设置待检测闪存块对应的标志位，所述设置模块341，包括：累计子模块和设置子模块。
所述累计子模块，可以用于累计高频预测结果不满足预设可靠性等级要求的预测次数。
所述设置子模块，可以用于若所述预测次数大于或者等于第四预设次数，则将所述待检测闪存块对应的标志位设置为1。
进一步地，为了构建预设可靠性预测模型，所述装置还包括：运算单元35和构建单元36。
所述运算单元35，可以用于对所述样本属性特征进行线性运算或者非线性运算，得到运算后的样本属性特征。
所述构建单元36，可以用于将所述运算后的样本属性特征作为训练集，利用预设神经网络算法对所述训练集进行训练，构建预设可靠性预测模型。
需要说明的是，本发明实施例提供的一种闪存的异常检测装置所涉及各功能模块的其他相应描述，可以参考图1所示方法的对应描述，在此不再赘述。
基于上述如图1所示方法，相应的，本发明实施例还提供了一种计算机可读存储介质，其上存储有计算机程序，该程序被处理器执行时实现以下步骤：获取闪存芯片中待检测闪存块对应的属性特征；将所述属性特征输入至预设可靠性预测模型进行低频可靠性预测，得到所述待检测闪存块对应的低频预测结果；若所述低频预测结果不满足预设可靠性等级要求，则将所述属性特征输入至所述预设可靠性等级模型进行高频可靠性预测，得到所述待检测闪存块对应的高频预测结果；根据所述高频预测结果，判定所述待检测闪存块是否存在异常。
基于上述如图1所示方法和如图3所示装置的实施例，本发明实施例还提供了一种计算机设备的实体结构图，如图5所示，该计算机设备包括：处理器41、存储器42、及存储在存储器42上并可在处理器上运行的计算机程序，其中存储器42和处理器41均设置在总线43上所述处理器41执行所述程序时实现以下步骤：获取闪存芯片中待检测闪存块对应的属性特征；将所述属性特征输入至预设可靠性预测模型进行低频可靠性预测，得到所述待检测闪存块对应的低频预测结果；若所述低频预测结果不满足预设可靠性等级要求，则将所述属性特征输入至所述预设可靠性等级模型进行高频可靠性预测，得到所述待检测闪存块对应的高频预测结果；根据所述高频预测结果，判定所述待检测闪存块是否存在异常。
通过本发明的技术方案，本方明能够获取闪存芯片中待检测闪存块对应的属性特征；并将所述属性特征输入至预设可靠性预测模型进行低频可靠性预测，得到所述待检测闪存块对应的低频预测结果；若所述低频预测结果不满足预设可靠性等级要求，则将所述属性特征输入至所述预设可靠性等级模型进行高频可靠性预测，得到所述待检测闪存块对应的高频预测结果；最终根据所述高频预测结果，判定所述待检测闪存块是否存在异常，由此通过对待检测闪存块进行低频可靠性预测和高频可靠性预测，能够确定待检测闪存块对应的可靠性预测结果，进而根据该可靠性预测结果能够判定待检测闪存 块是否存在异常，在闪存块存在异常的情况下，能够及时对存储数据进行备份，并停止相应的读写操作，从而能够避免发生数据存储错误，同时能够延长闪存块的使用寿命，此外，本发明采用高频可靠性预测和低频可靠性预测相结合，在提高预测结果准确度的同时，能够减少功耗和主控芯片的计算资源占用，进而能够减少对计算机存储设备的影响。
显然，本领域的技术人员应该明白，上述的本发明的各模块或各步骤可以用通用的计算装置来实现，它们可以集中在单个的计算装置上，或者分布在多个计算装置所组成的网络上，可选地，它们可以用计算装置可执行的程序代码来实现，从而，可以将它们存储在存储装置中由计算装置来执行，并且在某些情况下，可以以不同于此处的顺序执行所示出或描述的步骤，或者将它们分别制作成各个集成电路模块，或者将它们中的多个模块或步骤制作成单个集成电路模块来实现。这样，本发明不限制于任何特定的硬件和软件结合。
以上所述仅为本发明的优选实施例而已，并不用于限制本发明，对于本领域的技术人员来说，本发明可以有各种更改和变化。凡在本发明的精神和原则之内，所作的任何修改、等同替换、改进等，均应包括在本发明的保护范围之内。
Claims (10)
- 一种闪存的异常检测方法，其特征在于，包括：获取闪存芯片中待检测闪存块对应的属性特征；将所述属性特征输入至预设可靠性预测模型进行低频可靠性预测，得到所述待检测闪存块对应的低频预测结果；若所述低频预测结果不满足预设可靠性等级要求，则将所述属性特征输入至所述预设可靠性等级模型进行高频可靠性预测，得到所述待检测闪存块对应的高频预测结果；根据所述高频预测结果，判定所述待检测闪存块是否存在异常。
- 根据权利要求1所述的方法，其特征在于，所述所述属性特征输入至预设可靠性预测模型进行低频可靠性预测，得到所述待检测闪存块对应的低频预测结果，包括：每经历第一预设次数的编程和擦除操作，将所述属性特征输入至预设可靠性预测模型进行低频可靠性预测，得到所述待检测闪存块对应的低频预测结果；所述将所述属性特征输入至所述预设可靠性等级模型进行高频可靠性预测，得到所述待检测闪存块对应的高频预测结果，包括：每经历第二预设次数的编程和擦除操作，将所述属性特征输入至所述预设可靠性等级模型进行高频可靠性预测，得到所述待检测闪存块对应的高频预测结果，其中，所述第二预设次数小于所述第一预设次数。
- 根据权利要求2所述的方法，其特征在于，所述属性特征包括所述待检测闪存块对应的编号、编程和擦除操作的次数、闪存操作时间、工作电流、电压分布和页原始错误比特数中的至少一种属性特征，所述每经历第一预设次数的编程和擦除操作，将所述属性特征输入至预设可靠性预测模型进行低频可靠性预测，得到所述待检测闪存块对应的低频预测结果，包括：对所述至少一种属性特征进行线性运算或者非线性运算，得到运算后的属性特征；每经历第一预设次数的编程和擦除操作，将所述运算后的属性特征输入至预设可靠性预测模型进行低频可靠性预测，得到所述待检测闪存块对应的低频预测结果；所述每经历第二预设次数的编程和擦除操作，将所述属性特征输入至所述预设可靠性等级模型进行高频可靠性预测，得到所述待检测闪存块对应的高频预测结果包括：每经历第一预设次数的编程和擦除操作，将所述运算后的属性特征输入至所述预设可靠性等级模型进行高频可靠性预测，得到所述待检测闪存块对应的高频预测结果。
- 根据权利要求2所述的方法，其特征在于，所述每经历第二预设次数的编程和擦除操作，将所述属性特征输入至所述预设可靠性等级模型进行高频可靠性预测，得到所述待检测闪存块对应的高频预测结果，包括：若所述高频检测结果不满足预设可靠性等级要求，则每经历第三预设次数的编程和擦除操作，将所述属性特征输入至预设可靠性等级模型进行高频可靠性预测，得到所述待检测闪存块对应的高频检测结果，其中，所第三预设次数小于所述第二预设次数。
- 根据权利要求2所述的方法，其特征在于，所述根据所述高频预测结果，判定所述待检测闪存块是否存在异常，包括：根据所述高频预测结果，设置所述待检测闪存块对应的标志位；每隔预设时间间隔对所述待检测闪存块对应的标志位进行检测；若所述待检测闪存块对应的标志位为1，则确定所述待检测闪存块存在异常，对所述待检测闪存块的存储数据进行备份处理，并停止所述待检测闪存块的读写操作。
- 根据权利要求5所述的方法，其特征在于，所述根据所述高频预测结果，设置所述待检测闪存块对应的标志位，包括：累计高频预测结果不满足预设可靠性等级要求的预测次数；若所述预测次数大于或者等于第四预设次数，则将所述待检测闪存块对应的标志位设置为1。
- 根据权利要求1所述的方法，其特征在于，在所述获取闪存芯片中待检测闪存块对应的属性特征之前，所述方法还包括：获取与所述闪存芯片相同工艺和型号，且不同批次的样本闪存芯片中闪存块对应的样本属性特征；对所述样本属性特征进行线性运算或者非线性运算，得到运算后的样本 属性特征；将所述运算后的样本属性特征作为训练集，利用预设神经网络算法对所述训练集进行训练，构建预设可靠性预测模型。
- 一种闪存的异常检测装置，其特征在于，包括：获取单元，用于获取闪存芯片中待检测闪存块对应的属性特征；第一预测单元，用于将所述属性特征输入至预设可靠性预测模型进行低频可靠性预测，得到所述待检测闪存块对应的低频预测结果；第二预测单元，用于若所述低频预测结果不满足预设可靠性等级要求，则将所述属性特征输入至所述预设可靠性等级模型进行高频可靠性预测，得到所述待检测闪存块对应的高频预测结果；判定单元，用于根据所述高频预测结果，判定所述待检测闪存块是否存在异常。
- 一种计算机设备，包括存储器、处理器及存储在存储器上并可在处理器上运行的计算机程序，其特征在于，所述计算机程序被处理器执行时实现权利要求1至7中任一项所述的方法的步骤。
- 一种计算机可读存储介质，其上存储有计算机程序，其特征在于，所述计算机程序被处理器执行时实现权利要求1至7中任一项所述的方法的步骤。
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