WO2022134162A1 - Preparation method for transferable flexible interconnection structure, and structure - Google Patents
Preparation method for transferable flexible interconnection structure, and structure Download PDFInfo
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- WO2022134162A1 WO2022134162A1 PCT/CN2020/141291 CN2020141291W WO2022134162A1 WO 2022134162 A1 WO2022134162 A1 WO 2022134162A1 CN 2020141291 W CN2020141291 W CN 2020141291W WO 2022134162 A1 WO2022134162 A1 WO 2022134162A1
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- 238000002360 preparation method Methods 0.000 title abstract description 5
- 229920001721 polyimide Polymers 0.000 claims abstract description 78
- 229910052751 metal Inorganic materials 0.000 claims abstract description 74
- 239000002184 metal Substances 0.000 claims abstract description 74
- 239000000758 substrate Substances 0.000 claims abstract description 66
- 238000012546 transfer Methods 0.000 claims abstract description 35
- 239000004642 Polyimide Substances 0.000 claims abstract description 18
- 239000010408 film Substances 0.000 claims description 28
- 229920000379 polypropylene carbonate Polymers 0.000 claims description 24
- 238000000034 method Methods 0.000 claims description 22
- -1 polypropylene carbonate Polymers 0.000 claims description 16
- 239000000463 material Substances 0.000 claims description 12
- 230000008569 process Effects 0.000 claims description 11
- 229910052782 aluminium Inorganic materials 0.000 claims description 10
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 10
- 238000012876 topography Methods 0.000 claims description 10
- 238000005530 etching Methods 0.000 claims description 9
- 239000010409 thin film Substances 0.000 claims description 9
- 238000001312 dry etching Methods 0.000 claims description 7
- 238000004544 sputter deposition Methods 0.000 claims description 5
- 238000000059 patterning Methods 0.000 claims description 4
- 230000000295 complement effect Effects 0.000 claims description 3
- 230000004888 barrier function Effects 0.000 claims description 2
- YGSDEFSMJLZEOE-UHFFFAOYSA-M salicylate Chemical compound OC1=CC=CC=C1C([O-])=O YGSDEFSMJLZEOE-UHFFFAOYSA-M 0.000 claims description 2
- 229960001860 salicylate Drugs 0.000 claims description 2
- 239000012528 membrane Substances 0.000 abstract 3
- 239000010410 layer Substances 0.000 description 97
- 235000012431 wafers Nutrition 0.000 description 11
- 238000005516 engineering process Methods 0.000 description 6
- 230000010354 integration Effects 0.000 description 6
- 238000011161 development Methods 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 4
- 239000000853 adhesive Substances 0.000 description 3
- 230000001070 adhesive effect Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 238000004100 electronic packaging Methods 0.000 description 3
- 238000004806 packaging method and process Methods 0.000 description 3
- 150000001412 amines Chemical class 0.000 description 2
- 238000005452 bending Methods 0.000 description 2
- 238000001459 lithography Methods 0.000 description 2
- 238000005259 measurement Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- 229920003223 poly(pyromellitimide-1,4-diphenyl ether) Polymers 0.000 description 2
- 239000002243 precursor Substances 0.000 description 2
- 238000004528 spin coating Methods 0.000 description 2
- 239000004793 Polystyrene Substances 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000006835 compression Effects 0.000 description 1
- 238000007906 compression Methods 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 239000004205 dimethyl polysiloxane Substances 0.000 description 1
- 235000013870 dimethyl polysiloxane Nutrition 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- CXQXSVUQTKDNFP-UHFFFAOYSA-N octamethyltrisiloxane Chemical compound C[Si](C)(C)O[Si](C)(C)O[Si](C)(C)C CXQXSVUQTKDNFP-UHFFFAOYSA-N 0.000 description 1
- 239000005022 packaging material Substances 0.000 description 1
- 238000012858 packaging process Methods 0.000 description 1
- 238000012536 packaging technology Methods 0.000 description 1
- 238000004987 plasma desorption mass spectroscopy Methods 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- 229920000435 poly(dimethylsiloxane) Polymers 0.000 description 1
- 229920002223 polystyrene Polymers 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 239000011241 protective layer Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
Abstract
The present invention provides a preparation method for a transferable flexible interconnection structure. The preparation method comprises the following steps: providing a transfer substrate, wherein a surface of the transfer substrate is provided with a pyromellitic polyimide membrane layer, a continuous metal conductive layer and a patterned polyimide membrane layer; providing a device substrate, wherein a surface of the device substrate is provided with a patterned metal electrode; bonding the device substrate to a support substrate with the patterned metal electrode and the patterned polyimide film layer acting as an intermediate layer; and removing the transfer substrate and part of the pyromellitic polyimide membrane layer to expose the continuous metal conductive layer.
Description
本发明涉及柔性电子学领域，尤其涉及一种可转移的柔性互联结构的制备方法以及结构。The invention relates to the field of flexible electronics, in particular to a preparation method and structure of a transferable flexible interconnection structure.
随着半导体产业的快速发展，电子封装正在扮演着越来越重要的角色。对集成电路制造商而言，保持其在更小尺寸、更低成本和更高性能等多方面的领先优势，需要将更先进的芯片封装技术整合到整个制造流程中，通常称为系统级封装(SIP)。这也对电子封装材料的可延展性和可转移技术提出了新的要求和挑战，所谓可延展性是指使得电子封装器件无论面临着拉、压、弯、扭转等一系列可能出现的变形下仍然能维持自身良好性能，大大提高电子器件的易携带性和较高的环境适应性，可转移技术降低了封装工艺的难度，增加了其灵活性。随着半导体技术发展，通过传统的缩小晶体管尺寸的方式来提高集成度已经变得非常困难。异质集成系统成为一种可以超越摩尔定律发展的重要途径。同时，它的发展也推动了可转移技术和微纳柔性互连集成的进步。With the rapid development of the semiconductor industry, electronic packaging is playing an increasingly important role. For integrated circuit manufacturers, maintaining their leading edge in smaller size, lower cost and higher performance requires the integration of more advanced chip packaging technology into the entire manufacturing process, often referred to as system-in-package (SIP). This also puts forward new requirements and challenges for the ductility and transfer technology of electronic packaging materials. The so-called ductility refers to making electronic packaging devices face a series of possible deformations such as tension, compression, bending, and torsion. It can still maintain its own good performance, greatly improve the portability and high environmental adaptability of electronic devices, and the transferable technology reduces the difficulty of the packaging process and increases its flexibility. With the development of semiconductor technology, it has become very difficult to increase the level of integration by traditionally reducing the size of transistors. Heterogeneous integrated systems have become an important way to go beyond Moore's Law. At the same time, its development has also promoted the progress of transferable technology and the integration of micro-nano flexible interconnection.
异质集成技术的发展可以提高系统的性能。降低加工、封装的成本。但是目前对于异质集成技术来说，集成度高，技术难度大，节省封装所带来的成本优势却可能被增加的工艺复杂度和难度所抵消The development of heterogeneous integration technology can improve the performance of the system. Reduce processing and packaging costs. However, at present, for heterogeneous integration technology, the integration level is high and the technical difficulty is high. The cost advantage brought by saving packaging may be offset by the increased process complexity and difficulty.
现有柔性封装的问题。随着系统工作频率的增加，信号通道的设计变得困难。在高频通道中，信号衰减，通道之间的耦合以及电磁干扰(EMI)会变成十分关键的问题。此外，对于柔性芯片，通道的电特性可以由于重复弯曲而由于机械应力和疲劳而改变。进而影响整体的性能。Problems with existing flexible packages. As the operating frequency of the system increases, the design of the signal path becomes difficult. In high frequency channels, signal attenuation, coupling between channels, and electromagnetic interference (EMI) can become critical issues. Furthermore, for flexible chips, the electrical properties of the channels can change due to mechanical stress and fatigue due to repeated bending. This in turn affects the overall performance.
H.Sharifi在2007年报告了SAWLIT先前的工作。这项工作中的柔性互连是直接在具有嵌入式组件的晶圆上制造的。但是，PDMS将其封装温度限制为200℃。因此，如何提高柔性互联的耐温性能是现有技术需要解决的问题。H. Sharifi reported previous work on SAWLIT in 2007. The flexible interconnects in this work are fabricated directly on wafers with embedded components. However, PDMS limits its packaging temperature to 200°C. Therefore, how to improve the temperature resistance of the flexible interconnection is a problem to be solved in the prior art.
发明内容SUMMARY OF THE INVENTION
本发明所要解决的技术问题是，提供一种可转移的柔性互联结构的制备方法以及结构，提高柔性互联的耐温性能。The technical problem to be solved by the present invention is to provide a preparation method and structure of a transferable flexible interconnection structure, so as to improve the temperature resistance performance of the flexible interconnection structure.
为了解决上述问题，本发明提供了一种可转移的柔性互联结构的制备方法，包括如下步骤：提供一转移衬底，所述转移衬底表面具有表面呈现起伏状的均苯型聚酰亚胺薄膜层，所述均苯型聚酰亚胺薄膜层的表面具有连续的金属导电层，所述金属导电层继承所述均苯型聚酰亚胺薄膜层表面的起伏状形貌，在所述金属导电层表面具有图形化的聚酰亚胺薄膜层，所述图形化的聚酰亚胺薄膜层部分的覆盖具有起伏状形貌的所述金属导电层的凸起部；提供一器件衬底，所述器件衬底表面具有图形化金属电极，所述图形化金属电极的图形与所述图形化聚酰亚胺薄膜层的图形为互补图形；以所述图形化金属电极和所述图形化聚酰亚胺薄膜层为中间层，将所述器件衬底与所述支撑衬底键合，键合后所述图形化金属电极与通过图形化聚酰亚胺薄膜层暴露出的连续的金属导电层相互贴合；去除转移衬底和部分的均苯型聚酰亚胺薄膜层，至暴露出所述连续的金属导电层。In order to solve the above problems, the present invention provides a method for preparing a transferable flexible interconnection structure, which includes the following steps: providing a transfer substrate, the surface of the transfer substrate having a homogeneous polyimide with a undulating surface A thin film layer, the surface of the polyimide polyimide film layer has a continuous metal conductive layer, and the conductive metal layer inherits the undulating morphology of the surface of the polyimide polyimide film layer. The surface of the metal conductive layer has a patterned polyimide film layer, and the patterned polyimide film layer partially covers the convex portion of the metal conductive layer with undulating topography; a device substrate is provided , the surface of the device substrate has a patterned metal electrode, and the pattern of the patterned metal electrode and the pattern of the patterned polyimide film layer are complementary patterns; the patterned metal electrode and the patterned The polyimide film layer is an intermediate layer, and the device substrate and the supporting substrate are bonded. After bonding, the patterned metal electrode and the continuous metal exposed through the patterned polyimide film layer are bonded. The conductive layers are adhered to each other; the transfer substrate and part of the polyimide film layer are removed to expose the continuous metal conductive layer.
为了解决上述问题，本发明提供了一种可转移的柔性互联结构，包括：一器件衬底；设置在所述器件衬底表面的图形化金属电极；与所述金属电极贴合的连续的金属导电层，所述金属导电层在平行于所述器件衬底表面的方向具有起伏状形貌，所述起伏状形貌通过均苯型聚酰亚胺薄膜填平而形成连续的平坦的薄膜导电层。In order to solve the above problems, the present invention provides a transferable flexible interconnection structure, comprising: a device substrate; a patterned metal electrode disposed on the surface of the device substrate; a continuous metal electrode attached to the metal electrode A conductive layer, the metal conductive layer has an undulating shape in a direction parallel to the surface of the device substrate, and the undulating shape is filled and filled with a homophenylene polyimide film to form a continuous flat film for conduction Floor.
上述技术方案在牺牲层之上制造柔性互连。使用旋涂，溅射和光刻技术制造嵌入图案化聚酰亚胺中的铝互连。证明了聚酰亚胺前体与PPC牺牲材料不相容。无法克服收缩和对不准问题。但是，
膜与PPC材料具有更好的兼容性，并且已通过接触电阻测量验证了转移互连理论。最终的转移互连通过接触电阻结构与器件晶圆上的金属层相结合进行测试，并在转移晶圆上制造了转移的柔性互连。
The above technical solutions fabricate the flexible interconnect on the sacrificial layer. Aluminum interconnects embedded in patterned polyimide were fabricated using spin coating, sputtering and lithography techniques. The polyimide precursor was proved to be incompatible with the PPC sacrificial material. Shrinkage and misalignment issues cannot be overcome. but, The films have better compatibility with PPC materials, and the transfer interconnection theory has been verified by contact resistance measurements. The final transfer interconnects were tested by contact resistance structures in combination with metal layers on the device wafer, and transferred flexible interconnects were fabricated on the transfer wafer.
附图1所示是本发明一具体实施方式所述步骤的示意图。FIG. 1 is a schematic diagram of the steps described in a specific embodiment of the present invention.
附图2A至附图2F、附图3A至附图3C，附图4以及附图5所示为本发明一具体实施方式所述工艺流程图。FIG. 2A to FIG. 2F , FIG. 3A to FIG. 3C , FIG. 4 and FIG. 5 are the process flow diagrams according to a specific embodiment of the present invention.
下面结合附图对本发明提供的一种可转移的柔性互联结构的制备方法以及结构的具体实施方式做详细说明。A method for preparing a transferable flexible interconnection structure and specific implementations of the structure provided by the present invention will be described in detail below with reference to the accompanying drawings.
附图1所示是上述具体实施方式所述步骤的示意图，包括：步骤S101，提供一转移衬底；步骤S102，在所述转移衬底表面形成聚碳酸亚丙酯薄膜层；步骤S103，将所述聚碳酸亚丙酯薄膜裁切成预设形状，并贴敷在所述聚碳酸亚丙酯薄膜层的表面，形成均苯型聚酰亚胺薄膜层；步骤S104，图形化所述均苯型聚酰亚胺薄膜层，在所述均苯型聚酰亚胺薄膜层表面形成起伏；步骤S105，在图形化的所述均苯型聚酰亚胺薄膜表面形成连续的金属导电层，所述金属导电层继承所述均苯型聚酰亚胺薄膜层表面的起伏状形貌；步骤S106，在所述金属导电层表面形成图形化的聚酰亚胺薄膜层，所述图形化的聚酰亚胺薄膜层部分的覆盖具有起伏状形貌的所述金属导电层的凸起部；步骤S111，提供一器件衬底；步骤S112，在所述器件衬底表面采用溅射工艺形成连续的Al/Si层；步骤S113，采用刻蚀工艺，用Cl2和HBr进行干法蚀刻，形成图形化金属电极；步骤S120，以所述图形化金属电极和所述图形化聚酰亚胺薄膜层为中间层，将所述器件衬底与所述支撑衬底键合，键合后所述图形化金属电极与通过图形化聚酰亚胺薄膜层暴露出的连续的金属导电层相互贴合；步骤S130，去除转移衬底和部分的均苯型聚酰亚胺薄膜层，至暴露出所述连续的金属导电层。1 is a schematic diagram of the steps described in the above specific embodiment, including: step S101, providing a transfer substrate; step S102, forming a polypropylene carbonate film layer on the surface of the transfer substrate; step S103, adding The polypropylene carbonate film is cut into a preset shape and attached to the surface of the polypropylene carbonate film layer to form a homophenylene type polyimide film layer; step S104, patterning the homogenous polyimide film layer. The benzene-type polyimide film layer, forming undulations on the surface of the sphene-type polyimide film layer; step S105 , forming a continuous metal conductive layer on the surface of the patterned sphene-type polyimide film, The metal conductive layer inherits the undulating topography of the surface of the homophenyl type polyimide film layer; step S106, a patterned polyimide film layer is formed on the surface of the metal conductive layer, and the patterned polyimide film layer is formed on the surface of the metal conductive layer. Part of the polyimide film layer covers the convex part of the metal conductive layer with undulating topography; step S111, providing a device substrate; step S112, using a sputtering process to form a continuous surface on the surface of the device substrate The Al/Si layer; step S113, using an etching process, dry etching with Cl2 and HBr to form a patterned metal electrode; step S120, using the patterned metal electrode and the patterned polyimide film layer As an intermediate layer, the device substrate and the supporting substrate are bonded, and after bonding, the patterned metal electrode and the continuous metal conductive layer exposed through the patterned polyimide film layer are attached to each other; Step S130, removing the transfer substrate and part of the polyimide film layer of the homophenylene type until the continuous metal conductive layer is exposed.
附图2A所示，参考步骤S101，提供一转移衬底200。所述转移衬底200的材料可以是任何一种常见的半导体衬底材料，包括但不限于单晶硅。As shown in FIG. 2A , referring to step S101 , a transfer substrate 200 is provided. The material of the transfer substrate 200 can be any common semiconductor substrate material, including but not limited to single crystal silicon.
附图2B所示，参考步骤S102，在所述转移衬底200表面形成聚碳酸亚丙酯薄膜层201。将聚碳酸亚丙酯(PPC)溶液旋涂在转移衬底200上作为牺牲层。在真空中于180℃烘烤2小时后，大部分溶剂被去除，并获得3μm厚的聚碳酸亚丙酯薄膜层201。在这种情况下，聚碳酸亚丙酯薄膜层201不仅用作牺牲材料，而且用作粘合材料。As shown in FIG. 2B , referring to step S102 , a polypropylene carbonate film layer 201 is formed on the surface of the transfer substrate 200 . Polypropylene carbonate (PPC) solution was spin-coated on the transfer substrate 200 as a sacrificial layer. After baking at 180° C. in vacuum for 2 hours, most of the solvent was removed, and a 3 μm thick polypropylene carbonate film layer 201 was obtained. In this case, the polypropylene carbonate film layer 201 serves not only as a sacrificial material but also as an adhesive material.
附图2C所示，参考步骤S103，将聚碳酸亚丙酯薄膜裁切成预设形状，并贴敷在所述聚碳酸亚丙酯薄膜层201的表面，形成均苯型聚酰亚胺薄膜层202。在本具体实施方式中，所述均苯型聚酰亚胺薄膜层202可以采用美国杜邦公司 生产的Kapton薄膜。将其切成合适的形状，并将PPC放在转移晶圆上。粘接剂用于薄膜附着。作为一种具体实施方式，将转移衬底200在粘接剂上以500N的压力在真空环境下从室温升至70℃持续10分钟。然后在聚碳酸亚丙酯薄膜层201的帮助下将Kapton膜牢固地附着在晶片上。由于膜的厚度仍然太厚而不能用于涂覆，因此首先对膜进行均匀的干法蚀刻。在干法蚀刻机中以每3分钟3.5μm的蚀刻速率进行蚀刻。这种等离子蚀刻还可以去除未被均苯型聚酰亚胺薄膜层202薄膜覆盖的聚碳酸亚丙酯薄膜层201。均匀蚀刻6分钟后，在晶圆上保留了5.7μm的薄膜层。As shown in FIG. 2C , referring to step S103 , the polypropylene carbonate film is cut into a preset shape and attached to the surface of the polypropylene carbonate film layer 201 to form a homophenylene polyimide film layer 202. In this specific embodiment, the polyimide film layer 202 of the homophenylene type can be Kapton film produced by DuPont Company of the United States. Cut it to the right shape and place the PPC on the transfer wafer. Adhesives are used for film attachment. As a specific embodiment, the transfer substrate 200 is raised from room temperature to 70° C. for 10 minutes on the adhesive with a pressure of 500 N in a vacuum environment. The Kapton film is then firmly attached to the wafer with the help of the polypropylene carbonate film layer 201 . Since the thickness of the film was still too thick for coating, the film was first subjected to a uniform dry etching. Etching was performed in a dry etcher at an etch rate of 3.5 μm per 3 minutes. This plasma etching can also remove the polypropylene carbonate film layer 201 that is not covered by the sparene type polyimide film layer 202 film. After 6 minutes of uniform etching, a thin film layer of 5.7 μm remained on the wafer.
上述步骤实施完毕后，即在所述转移衬底200表面布置了均苯型聚酰亚胺薄膜层202。在其他的具体实施方式中，也可以采用不同的方式获得上述结构。After the above steps are completed, the homophenyl type polyimide film layer 202 is arranged on the surface of the transfer substrate 200 . In other specific embodiments, the above structures can also be obtained in different ways.
附图2D所示，参考步骤S104，图形化所述均苯型聚酰亚胺薄膜层202，在所述均苯型聚酰亚胺薄膜层202表面形成起伏。本步骤具体可以采用金属铝作为刻蚀阻挡层，采用刻蚀工艺对均苯型聚酰亚胺薄膜层202的暴露部分进行部分刻蚀，形成起伏状的表面。具体的说，选择铝作为构图
膜的硬掩模。使用该铝质硬掩模在干法蚀刻下对
膜进行图案化处理。将3.5μm的
膜被蚀刻，剩下2.2μm的膜作为PPC的保护层。这是由于无法精确控制
膜的蚀刻速率，因此保留该薄层可保护PPC免受等离子体腐蚀，并避免铝互连层降落在硅衬底上。
As shown in FIG. 2D , referring to step S104 , the sparene-type polyimide film layer 202 is patterned, and undulations are formed on the surface of the sparene-type polyimide film layer 202 . In this step, metal aluminum may be used as an etching barrier layer, and an etching process may be used to partially etch the exposed portion of the salicylic polyimide film layer 202 to form a undulating surface. Specifically, aluminum was chosen for the composition film hardmask. Using this aluminum hard mask, under dry etching The film is patterned. The 3.5µm The film was etched, leaving a 2.2 μm film as a protective layer for the PPC. This is due to the inability to precisely control The etch rate of the film, so keeping this thin layer protects the PPC from plasma corrosion and prevents the aluminum interconnect layer from landing on the silicon substrate.
附图2E所示，参考步骤S105，在图形化的所述均苯型聚酰亚胺薄膜层202表面形成连续的金属导电层203，所述金属导电层203继承所述均苯型聚酰亚胺薄膜层202表面的起伏状形貌。所述连续的金属导电层203采用金属铝材料。As shown in FIG. 2E , referring to step S105 , a continuous metal conductive layer 203 is formed on the surface of the patterned polystyrene polyimide film layer 202 , and the metal conductive layer 203 inherits the polyimide polyimide. The undulating topography of the surface of the amine thin film layer 202 . The continuous metal conductive layer 203 is made of metal aluminum material.
附图2F所示，参考步骤S106，在所述金属导电层203表面形成图形化的聚酰亚胺薄膜层204，所述图形化的聚酰亚胺薄膜层204部分的覆盖具有起伏状形貌的所述金属导电层203的凸起部。具体的说，上述步骤可以是涂覆一层2.6μm的聚酰亚胺，然后以与之前介绍的相同的方式使用铝质硬掩模在干法蚀刻下对聚酰亚胺进行图案化处理进行图案化。As shown in FIG. 2F , referring to step S106 , a patterned polyimide film layer 204 is formed on the surface of the metal conductive layer 203 , and a portion of the patterned polyimide film layer 204 has an undulating topography. the protrusions of the metal conductive layer 203. Specifically, the above steps may be to coat a layer of 2.6 μm polyimide, and then use an aluminum hard mask to pattern the polyimide under dry etching in the same manner as previously described. patterned.
上述步骤实施完毕后，即获得转移衬底200，所述转移衬底200表面具有表面呈现起伏状的均苯型聚酰亚胺薄膜层202，所述均苯型聚酰亚胺薄膜层202 的表面具有连续的金属导电层203，所述金属导电层203继承所述均苯型聚酰亚胺薄膜层202表面的起伏状形貌，在所述金属导电层203表面具有图形化的聚酰亚胺薄膜层204，所述图形化的聚酰亚胺薄膜层204部分的覆盖具有起伏状形貌的所述金属导电层203的凸起部；After the above steps are completed, the transfer substrate 200 is obtained. The surface has a continuous metal conductive layer 203, the metal conductive layer 203 inherits the undulating topography of the surface of the polyimide film layer 202, and has a patterned polyimide on the surface of the metal conductive layer 203 Amine thin film layer 204, the patterned polyimide thin film layer 204 partially covers the convex portion of the metal conductive layer 203 with undulating topography;
附图3A所示，参考步骤S111，提供一器件衬底310。所示器件衬底310的材料可以是任何一种常见的半导体衬底材料，包括但不限于单晶硅。As shown in FIG. 3A , referring to step S111 , a device substrate 310 is provided. The material of the device substrate 310 shown can be any of the common semiconductor substrate materials, including but not limited to single crystal silicon.
附图3B所示，参考步骤S112，在所述器件衬底310表面采用溅射工艺形成连续的Al/Si层311。为了确保可以进行接触，接触垫的厚度应大于最后一层聚酰亚胺的2.6μm厚度。因此，在百级洁净室中将4μm的Al/Si层溅射在基板上。As shown in FIG. 3B , referring to step S112 , a continuous Al/Si layer 311 is formed on the surface of the device substrate 310 by a sputtering process. To ensure that contact can be made, the thickness of the contact pads should be greater than the 2.6 μm thickness of the final polyimide layer. Therefore, a 4 μm Al/Si layer was sputtered on the substrate in a class 100 clean room.
附图3C所示，参考步骤S113，采用刻蚀工艺，用Cl
2和HBr进行干法蚀刻，形成图形化金属电极312。采用4μm的光致抗蚀剂用作图案化的掩模。然后用Cl
2和HBr进行干法蚀刻。最后将掩膜光刻胶剥离。
As shown in FIG. 3C , referring to step S113 , an etching process is used to perform dry etching with Cl 2 and HBr to form a patterned metal electrode 312 . A 4 μm photoresist was used as a patterning mask. Then dry etch with Cl2 and HBr. Finally, the mask photoresist is peeled off.
上述步骤实施完毕后，可以获得器件衬底310，所述器件衬底310表面具有图形化金属电极312，所述图形化金属电极312的图形与所述图形化聚酰亚胺薄膜层204的图形为互补图形。After the above steps are completed, a device substrate 310 can be obtained. The surface of the device substrate 310 has patterned metal electrodes 312. The pattern of the patterned metal electrodes 312 and the pattern of the patterned polyimide film layer 204 are obtained. for complementary graphics.
附图4所示，参考步骤S120，以所述图形化金属电极312和所述图形化聚酰亚胺薄膜层204为中间层，将所述器件衬底310与所述支撑衬底200键合，键合后所述图形化金属电极212与通过图形化聚酰亚胺薄膜层204暴露出的连续的金属导电层203相互贴合。对齐两个晶片，并在8000N、180℃的温度下在真空中粘合2小时。As shown in FIG. 4, referring to step S120, using the patterned metal electrode 312 and the patterned polyimide film layer 204 as intermediate layers, the device substrate 310 is bonded to the support substrate 200 , after bonding, the patterned metal electrode 212 and the continuous metal conductive layer 203 exposed through the patterned polyimide film layer 204 are attached to each other. The two wafers were aligned and bonded in vacuum at 8000N, 180°C for 2 hours.
附图5所示，参考步骤S130，去除转移衬底200和部分的均苯型聚酰亚胺薄膜层202，至暴露出所述连续的金属导电层203。具体的说，对于具有聚碳酸亚丙酯薄膜层201的结构，将结合的两个晶片置于250℃的环境中保持2小时。在此过程之后，聚碳酸亚丙酯薄膜层201会作为牺牲层而挥发去除，将转移衬底200和器件衬底310分离两个晶片。整个均苯型聚酰亚胺薄膜层202从转移衬底200转移至器件衬底310。在转移之后再对均苯型聚酰亚胺薄膜层202进行干法蚀刻，以暴露出连续的金属导电层203。As shown in FIG. 5 , referring to step S130 , the transfer substrate 200 and part of the polyimide film layer 202 of the salicylate type are removed until the continuous metal conductive layer 203 is exposed. Specifically, for the structure with the polypropylene carbonate thin film layer 201, the bonded two wafers were placed in an environment of 250°C for 2 hours. After this process, the polypropylene carbonate film layer 201 is volatilized and removed as a sacrificial layer, and the transfer substrate 200 and the device substrate 310 are separated into two wafers. The entire polyimide film layer 202 of the styrenic type is transferred from the transfer substrate 200 to the device substrate 310 . After the transfer, dry etching is performed on the polyimide film layer 202 of the styrenic type to expose the continuous metal conductive layer 203 .
上述步骤实施完毕后，即获得一种可转移的柔性互联结构，包括：一器件衬底310；设置在所述器件衬底310表面的图形化金属电极312；与所述金属电极贴合的连续的金属导电层203，所述金属导电层203在平行于所述器件衬底310表面的方向具有起伏状形貌，所述起伏状形貌通过均苯型聚酰亚胺薄膜202填平而形成连续平坦的薄膜导电层。After the above steps are completed, a transferable flexible interconnection structure is obtained, including: a device substrate 310; patterned metal electrodes 312 disposed on the surface of the device substrate 310; The metal conductive layer 203 has an undulating shape in the direction parallel to the surface of the device substrate 310 , and the undulating shape is formed by filling the homophenyl polyimide film 202 Continuous flat thin film conductive layer.
上述技术方案在牺牲层之上制造柔性互连。使用旋涂，溅射和光刻技术制造嵌入图案化聚酰亚胺中的铝互连。证明了聚酰亚胺前体与PPC牺牲材料不相容。无法克服收缩和对不准问题。但是，
膜与PPC材料具有更好的兼容性，并且已通过接触电阻测量验证了转移互连理论。最终的转移互连通过接触电阻结构与器件晶圆上的金属层相结合进行测试，并在转移晶圆上制造了转移的柔性互连。
The above technical solutions fabricate the flexible interconnect on the sacrificial layer. Aluminum interconnects embedded in patterned polyimide were fabricated using spin coating, sputtering and lithography techniques. The polyimide precursor was proved to be incompatible with the PPC sacrificial material. Shrinkage and misalignment issues cannot be overcome. but, The films have better compatibility with PPC materials, and the transfer interconnection theory has been verified by contact resistance measurements. The final transfer interconnects were tested by contact resistance structures in combination with metal layers on the device wafer, and transferred flexible interconnects were fabricated on the transfer wafer.
以上所述仅是本发明的优选实施方式，应当指出，对于本技术领域的普通技术人员，在不脱离本发明原理的前提下，还可以做出若干改进和润饰，这些改进和润饰也应视为本发明的保护范围。The above are only the preferred embodiments of the present invention. It should be pointed out that for those skilled in the art, without departing from the principles of the present invention, several improvements and modifications can also be made, and these improvements and modifications should also be regarded as It is the protection scope of the present invention.
Claims (7)
- 一种可转移的柔性互联结构的制备方法，其特征在于，包括如下步骤：A method for preparing a transferable flexible interconnect structure, comprising the steps of:提供一转移衬底，所述转移衬底表面具有表面呈现起伏状的均苯型聚酰亚胺薄膜层，所述均苯型聚酰亚胺薄膜层的表面具有连续的金属导电层，所述金属导电层继承所述均苯型聚酰亚胺薄膜层表面的起伏状形貌，在所述金属导电层表面具有图形化的聚酰亚胺薄膜层，所述图形化的聚酰亚胺薄膜层部分的覆盖具有起伏状形貌的所述金属导电层的凸起部；A transfer substrate is provided, the surface of the transfer substrate has a sparse polyimide film layer with a undulating surface, and the surface of the homophenyl polyimide film layer has a continuous metal conductive layer, the The metal conductive layer inherits the undulating shape of the surface of the homophenyl type polyimide film layer, and has a patterned polyimide film layer on the surface of the metal conductive layer, and the patterned polyimide film a raised portion of the layer portion covering the metal conductive layer having an undulating topography;提供一器件衬底，所述器件衬底表面具有图形化金属电极，所述图形化金属电极的图形与所述图形化聚酰亚胺薄膜层的图形为互补图形；A device substrate is provided, the surface of the device substrate has a patterned metal electrode, and the pattern of the patterned metal electrode and the pattern of the patterned polyimide film layer are complementary patterns;以所述图形化金属电极和所述图形化聚酰亚胺薄膜层为中间层，将所述器件衬底与所述支撑衬底键合，键合后所述图形化金属电极与通过图形化聚酰亚胺薄膜层暴露出的连续的金属导电层相互贴合；Using the patterned metal electrode and the patterned polyimide film layer as an intermediate layer, the device substrate and the support substrate are bonded, and after bonding, the patterned metal electrode is bonded to the The exposed continuous metal conductive layers of the polyimide film layer are attached to each other;去除转移衬底和部分的均苯型聚酰亚胺薄膜层，至暴露出所述连续的金属导电层。The transfer substrate and part of the polyimide film layer are removed to expose the continuous metal conductive layer.
- 根据权利要求1所述的方法，其特征在于，所述转移衬底表面的结构采用如下步骤形成：The method according to claim 1, wherein the structure on the surface of the transfer substrate is formed by the following steps:在所述转移衬底表面布置均苯型聚酰亚胺薄膜层；Arranging a homophenylene polyimide film layer on the surface of the transfer substrate;图形化所述均苯型聚酰亚胺薄膜层，在所述均苯型聚酰亚胺薄膜层表面形成起伏；patterning the homophenyl polyimide film layer to form undulations on the surface of the homophenyl type polyimide film layer;在图形化的所述均苯型聚酰亚胺薄膜表面形成连续的金属导电层，所述金属导电层继承所述均苯型聚酰亚胺薄膜层表面的起伏状形貌；A continuous metal conductive layer is formed on the surface of the patterned homophenylene polyimide film, and the metal conductive layer inherits the undulating topography of the surface of the homophenylene polyimide film;在所述金属导电层表面形成图形化的聚酰亚胺薄膜层，所述图形化的聚酰亚胺薄膜层部分的覆盖具有起伏状形貌的所述金属导电层的凸起部。A patterned polyimide film layer is formed on the surface of the metal conductive layer, and a portion of the patterned polyimide film layer covers the protrusions of the metal conductive layer with undulating topography.
- 根据权利要求2所述的方法，其特征在于，在所述转移衬底表面布置均苯型聚酰亚胺薄膜层的步骤，进一步是：The method according to claim 2, wherein the step of arranging a homophenyl type polyimide film layer on the surface of the transfer substrate is further:在所述转移衬底表面形成聚碳酸亚丙酯薄膜层；forming a polypropylene carbonate film layer on the surface of the transfer substrate;将聚碳酸亚丙酯薄膜裁切成预设形状，并贴敷在所述聚碳酸亚丙酯薄膜层的表面，形成均苯型聚酰亚胺薄膜层。The polypropylene carbonate film is cut into a preset shape and attached to the surface of the polypropylene carbonate film layer to form a homophenylene polyimide film layer.
- 根据权利要求2所述的方法，其特征在于，所述图形化所述均苯型聚酰亚胺薄膜层的步骤，进一步是：The method according to claim 2, wherein the step of patterning the salicylic polyimide film layer is further:采用金属铝作为刻蚀阻挡层，采用刻蚀工艺对均苯型聚酰亚胺薄膜层的暴露部分进行部分刻蚀，形成起伏状的表面。Metal aluminum is used as an etching barrier layer, and an etching process is used to partially etch the exposed portion of the salicylate polyimide film layer to form a undulating surface.
- 根据权利要求1所述的方法，其特征在于，所述连续的金属导电层采用金属铝材料。The method according to claim 1, wherein the continuous metal conductive layer is made of metal aluminum material.
- 根据权利要求1所述的方法，其特征在于，在所述器件衬底表面的图形化金属电极进一步采用如下步骤形成：The method according to claim 1, wherein the patterned metal electrode on the surface of the device substrate is further formed by the following steps:在所述器件衬底表面采用溅射工艺形成连续的Al/Si层；A continuous Al/Si layer is formed on the surface of the device substrate by a sputtering process;采用刻蚀工艺，用Cl 2和HBr进行干法蚀刻，形成图形化金属电极。 The patterned metal electrodes were formed by dry etching with Cl 2 and HBr using an etching process.
- 一种可转移的柔性互联结构，其特征在于，包括：A transferable flexible interconnect structure, characterized in that it includes:一器件衬底；a device substrate;设置在所述器件衬底表面的图形化金属电极；a patterned metal electrode disposed on the surface of the device substrate;与所述金属电极贴合的连续的金属导电层，所述金属导电层在平行于所述器件衬底表面的方向具有起伏状形貌，所述起伏状形貌通过均苯型聚酰亚胺薄膜填平而形成连续的平坦的薄膜导电层。A continuous metal conductive layer attached to the metal electrode, the metal conductive layer has an undulating shape in a direction parallel to the surface of the device substrate, and the undulating shape is formed by homophenyl polyimide The thin film is filled to form a continuous flat thin film conductive layer.
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| CN106605294A (en) * | 2014-08-26 | 2017-04-26 | 株式会社尼康 | Semiconductor device and method for manufacturing semiconductor device |
| CN108831828A (en) * | 2018-06-05 | 2018-11-16 | 中山大学 | It can be applied to the flexible electronic device and preparation method thereof on a variety of surfaces |
| CN111886681A (en) * | 2018-03-29 | 2020-11-03 | 夏普株式会社 | Display device and method for manufacturing display device |
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| JP4837295B2 (en) * | 2005-03-02 | 2011-12-14 | 株式会社沖データ | Semiconductor device, LED device, LED head, and image forming apparatus |
| CN101868127B (en) * | 2009-11-24 | 2012-11-07 | 清华大学 | Preparation process of superconductive planar circuit |
| CN103811669B (en) * | 2012-11-09 | 2016-08-17 | 上海天马微电子有限公司 | Organic luminescent device, organic LED display device and manufacture method |
| CN104701460B (en) * | 2013-12-09 | 2017-03-29 | 昆山工研院新型平板显示技术中心有限公司 | A kind of reflecting electrode and its preparation method and application |
| CN105361977B (en) * | 2014-08-26 | 2018-08-10 | 中国科学院苏州纳米技术与纳米仿生研究所 | Resistance-type flexible and transparent joint part electronic skin and its preparation method and application |
| CN104393001B (en) * | 2014-10-24 | 2017-10-31 | 京东方科技集团股份有限公司 | Thin-film transistor array base-plate and preparation method thereof, display device |
| CN107611172A (en) * | 2017-09-16 | 2018-01-19 | 天津大学 | A kind of heterogeneous dielectric layer flexibility bottom-gate transistor and preparation method |
| US10606213B2 (en) * | 2017-12-12 | 2020-03-31 | Eastman Kodak Company | Embedding an optically-detectable pattern of information in an electrical element |
| CN110676343A (en) * | 2018-06-15 | 2020-01-10 | 君泰创新（北京）科技有限公司 | Back contact solar cell and preparation method thereof |
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| CN103489823A (en) * | 2012-06-12 | 2014-01-01 | 索尼公司 | Multilayer film substrate, method of manufacturing multilayer film substrate |
| CN106605294A (en) * | 2014-08-26 | 2017-04-26 | 株式会社尼康 | Semiconductor device and method for manufacturing semiconductor device |
| CN111886681A (en) * | 2018-03-29 | 2020-11-03 | 夏普株式会社 | Display device and method for manufacturing display device |
| CN108831828A (en) * | 2018-06-05 | 2018-11-16 | 中山大学 | It can be applied to the flexible electronic device and preparation method thereof on a variety of surfaces |
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