WO2022105193A1 - Preparation method for silicon oxide and doped amorphous silicon film layer in topcon battery - Google Patents
Preparation method for silicon oxide and doped amorphous silicon film layer in topcon battery Download PDFInfo
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- 229910021417 amorphous silicon Inorganic materials 0.000 title claims abstract description 146
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 title claims abstract description 67
- 229910052814 silicon oxide Inorganic materials 0.000 title claims abstract description 66
- 238000002360 preparation method Methods 0.000 title claims abstract description 13
- 230000008021 deposition Effects 0.000 claims abstract description 52
- XYFCBTPGUUZFHI-UHFFFAOYSA-N Phosphine Chemical compound P XYFCBTPGUUZFHI-UHFFFAOYSA-N 0.000 claims abstract description 29
- 229910052739 hydrogen Inorganic materials 0.000 claims abstract description 29
- 239000001257 hydrogen Substances 0.000 claims abstract description 29
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 claims abstract description 28
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims abstract description 27
- 229910052698 phosphorus Inorganic materials 0.000 claims abstract description 27
- 239000011574 phosphorus Substances 0.000 claims abstract description 27
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 26
- 229910000077 silane Inorganic materials 0.000 claims abstract description 26
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 26
- 239000010703 silicon Substances 0.000 claims abstract description 26
- 238000005984 hydrogenation reaction Methods 0.000 claims abstract description 22
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims abstract description 18
- 238000011065 in-situ storage Methods 0.000 claims abstract description 16
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical group [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims abstract description 11
- 238000004140 cleaning Methods 0.000 claims abstract description 11
- 229910052757 nitrogen Inorganic materials 0.000 claims abstract description 9
- 238000005530 etching Methods 0.000 claims abstract description 8
- 230000005284 excitation Effects 0.000 claims abstract description 7
- 238000000034 method Methods 0.000 claims description 37
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims description 28
- 229910000073 phosphorus hydride Inorganic materials 0.000 claims description 14
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Chemical compound [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 claims description 11
- 230000009471 action Effects 0.000 claims description 6
- UORVGPXVDQYIDP-UHFFFAOYSA-N borane Chemical compound B UORVGPXVDQYIDP-UHFFFAOYSA-N 0.000 claims description 6
- 229910052796 boron Inorganic materials 0.000 claims description 6
- 239000007789 gas Substances 0.000 claims description 6
- 229910021419 crystalline silicon Inorganic materials 0.000 claims description 5
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 claims description 3
- 229910052782 aluminium Inorganic materials 0.000 claims description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 3
- 229910000085 borane Inorganic materials 0.000 claims description 3
- 229910052733 gallium Inorganic materials 0.000 claims description 3
- 230000000694 effects Effects 0.000 abstract description 6
- 125000004437 phosphorous atom Chemical group 0.000 abstract description 3
- 125000004435 hydrogen atom Chemical class [H]* 0.000 abstract description 2
- 230000003247 decreasing effect Effects 0.000 abstract 1
- 239000012495 reaction gas Substances 0.000 abstract 1
- 238000000151 deposition Methods 0.000 description 40
- 238000002161 passivation Methods 0.000 description 22
- 238000000137 annealing Methods 0.000 description 18
- 230000008569 process Effects 0.000 description 16
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 12
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 11
- 229920005591 polysilicon Polymers 0.000 description 8
- 238000002425 crystallisation Methods 0.000 description 7
- 230000008025 crystallization Effects 0.000 description 7
- 238000005516 engineering process Methods 0.000 description 5
- 238000004519 manufacturing process Methods 0.000 description 5
- 230000006798 recombination Effects 0.000 description 5
- 238000005215 recombination Methods 0.000 description 5
- 239000011248 coating agent Substances 0.000 description 4
- 238000000576 coating method Methods 0.000 description 4
- 230000000052 comparative effect Effects 0.000 description 3
- 230000007547 defect Effects 0.000 description 3
- 238000013461 design Methods 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 238000012360 testing method Methods 0.000 description 3
- 239000002699 waste material Substances 0.000 description 3
- 125000004429 atom Chemical group 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 230000006872 improvement Effects 0.000 description 2
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 2
- 239000011159 matrix material Substances 0.000 description 2
- 238000007650 screen-printing Methods 0.000 description 2
- 238000005245 sintering Methods 0.000 description 2
- 230000005641 tunneling Effects 0.000 description 2
- 241000710779 Trina Species 0.000 description 1
- 238000010521 absorption reaction Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 239000002019 doping agent Substances 0.000 description 1
- 239000000428 dust Substances 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000009776 industrial production Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 230000035515 penetration Effects 0.000 description 1
- 238000011056 performance test Methods 0.000 description 1
- 238000005240 physical vapour deposition Methods 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 238000010926 purge Methods 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 239000004575 stone Substances 0.000 description 1
- 238000004804 winding Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/20—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials
- H01L31/208—Particular post-treatment of the devices, e.g. annealing, short-circuit elimination
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0216—Coatings
- H01L31/02161—Coatings for devices characterised by at least one potential jump barrier or surface barrier
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
- H01L31/072—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type
- H01L31/0745—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells
- H01L31/0747—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells comprising a heterojunction of crystalline and amorphous materials, e.g. heterojunction with intrinsic thin layer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/20—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials
- H01L31/202—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials including only elements of Group IV of the Periodic Table
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Definitions
- the invention relates to a method for preparing a silicon oxide+phosphorus doped amorphous silicon film used in a TOPCon battery, in particular to a method for preparing a high-quality silicon oxide and doped amorphous silicon film in a TOPCon battery based on PECVD technology.
- the biggest advantage of the passivation contact cell structure is that the backside SiO x /poly-Si structure avoids the direct contact between the metal and the silicon base, thus effectively reducing the recombination rate under the metal , which improves the open circuit voltage of the battery; at the same time, the SiOx/poly-Si structure itself has a good passivation effect, which reduces the passivation of the metal region and reduces the carrier recombination in the passivation region, which can be said to kill two birds with one stone.
- Tunneling oxide layer the growth quality of SiOx is very important for the passivation of dangling bonds at the silicon interface, and at the same time, the uniformity of the thickness of the tunnel oxide layer is very high, usually > 2nm The oxide layer cannot allow electrons to tunnel efficiently.
- Polysilicon growth the existing polysilicon growth includes PECVD, LPCVD, PVD, etc., and then annealed and crystallized into polysilicon, but polysilicon requires good passivation quality, fewer defects, high crystallization rate, and good uniformity. In the photovoltaic industry, it is still difficult to ensure the uniformity and stability of poly-Si while ensuring large production capacity. 3.
- Doping amorphous silicon the doping of poly can realize in-situ doping at the same time as poly deposition, or diffusion doping can be performed after the deposition of amorphous silicon, but the doping concentration of Poly-Si needs to reach a certain amount
- the level ensures field effect and metallization contact (generally > 2-4E20cm -3 ), while the concentration of penetrating the oxide layer to the silicon base needs to be strictly controlled to reduce Auger recombination on the silicon surface.
- the current process requirements for preparing TOPCon cells are very high, and the control of process parameters needs to be very strict.
- the preparation of the contact passivation structure has the following problems: the conventional production process of the contact passivation structure (SiOx/doped-poly) is roughly: thermal growth of silicon oxide layer (annealing furnace) - growth of polysilicon layer (LPCVD equipment) - polysilicon doping (diffusion furnace), usually three equipments are required and the polysilicon is plated on the other side of the cell and needs special cleaning equipment to remove, and the process is complicated.
- Another method for preparing a contact passivation structure is based on PECVD equipment.
- This method has a short process time and can achieve in-situ doping and no-winding plating; the conventional technical solution is to first grow silicon oxide by PECVD, and then deposit doping non- Crystalline silicon, and finally annealed and crystallized.
- the limitations of this method are: 1. The passivation quality of silicon oxide grown by PECVD is poor, and the passivation of dangling bonds on the surface of the silicon wafer is not complete, resulting in an increase in the current density of electron-hole recombination; 2. Amorphous silicon doping The impurity concentration has a low window in the whole process flow.
- the doping amount is high, it is easy to penetrate the silicon oxide layer and enter the silicon matrix in the subsequent annealing and crystallization process, causing the increase of recombination.
- the low doping concentration will lead to a large contact resistivity. , which is not conducive to the export of external circuit electrons, so it is difficult to maintain a high concentration of dopant atoms in polysilicon without doping the silicon matrix.
- the process of preparing TOPCon cells based on PECVD coating technology usually includes the following steps: 1. Double-sided texturing, 2. Boron expansion, 3. Back etching cleaning, 4. PECVD growth of silicon oxide + phosphorus-doped amorphous silicon, 5. Annealing crystal 6. Silicon wafer cleaning, 7. Front + back coating, 8. Screen printing + sintering; in order to grow higher passivation quality silicon oxide + phosphorus-doped amorphous silicon, the main purpose of the present invention is to provide a Preparation method of silicon oxide and doped amorphous silicon film layer in TOPCon cell.
- the preparation method of silicon oxide and doped amorphous silicon film layer in the TOPCon battery proposed by the present invention includes the following operation steps:
- the temperature after preheating is 300-700°C; if the preheating temperature is lower than 300°C, the deposition rate will be too slow, but the temperature is too high and the temperature is too high. At 700°C, it will cause the silane to decompose too fast and it will be difficult to control the reaction, and dust particles will be generated on the silicon wafer.
- the temperature after preheating is preferably 400-600°C; more preferably, it is 450°C.
- silane and phosphine are simultaneously introduced for in-situ doped amorphous silicon deposition.
- each layer is doped from the inner layer to the outer layer.
- the phosphorus concentration of the amorphous silicon is gradually reduced until the final desired thickness of the amorphous silicon film is deposited.
- This step can be combined with different thicknesses and different doping concentrations.
- the number of layers of amorphous silicon is controlled to be 3-10 layers. If it is less than 3 layers, it is difficult to achieve the purpose of gradient doping to prevent phosphorus atoms from doping into the silicon base.
- the optimal number of layers is 5 layers.
- the total thickness of the amorphous silicon film is 100-200nm. If the thickness is less than 100nm, the paste will burn through the silicon oxide and destroy the passivation contact structure. If the thickness is higher than 200nm, it will cause serious parasitic absorption and reduce the short-circuit current density of the battery.
- the preferred concentration combination is: the phosphorus concentration of the second layer of doped amorphous silicon reaches 1E19cm -3 , the phosphorus concentration of the third layer of doped amorphous silicon reaches 1E20cm -3 , the phosphorus concentration of the fourth layer of doped amorphous silicon reaches 5E20cm -3 , until the desired thickness of amorphous silicon is finally achieved.
- step (5) crystallization annealing is performed after the deposition of the amorphous silicon film layer, the annealing temperature is 600-1000°C, and the time is 10-100min; preferably, the annealing is performed at 950°C for 30min.
- the thickness of the silicon oxide film deposited in the step (2) is 1-3nm, and if the silicon oxide layer is less than 1nm, the compactness on the surface of the silicon wafer is poor, and the surface defects of the silicon wafer cannot be well passivated, Above 3 nm will make electron tunneling difficult, resulting in a severe drop in FF, where the preferred silicon oxide film thickness is 1.5 nm.
- the power of the AC radio frequency power supply is 10-1000W.
- the hydrogen volume content in step (3) accounts for 1-50% of the total volume of hydrogen and nitrogen, if the hydrogen concentration is lower than 1%, the hydrogenation effect is insufficient, and the concentration is higher than 50%.
- the hydrogen ionization concentration reaches saturation, No matter how high the hydrogen volume concentration is, it will not only cause waste but also increase the risk of equipment operation.
- the preferred hydrogen volume concentration is 5%, which not only ensures the hydrogenation effect but also does not cause waste and equipment risks.
- the thickness of the intrinsic amorphous silicon in step (4) is 10-50nm; if the thickness of the intrinsic amorphous silicon is less than 10nm, the purpose of achieving the gradient concentration cannot be achieved. During annealing, it is difficult to achieve in-situ doping of the bottom layer, and the preferred thickness of amorphous silicon is 20 nm.
- step (5) silane and borane are simultaneously introduced to carry out the deposition of in-situ doped amorphous silicon.
- the boron concentration of each layer of doped amorphous silicon in the outer layer is gradually increased until the final desired thickness of amorphous silicon is deposited.
- step (4) the deposition temperature, deposition power and deposition thickness of the grown intrinsic amorphous silicon can be adjusted according to actual needs.
- the doped amorphous silicon grown in step (5) not only includes positive gradient doping (increase in concentration from the inner layer to the outer layer), but also includes other arbitrary elements that can inhibit the doping atoms from entering the silicon base. A combination of concentrations.
- step (5) the deposition of aluminum or gallium doped amorphous silicon is performed after the intrinsic amorphous silicon is deposited.
- the deposition thickness of the intrinsic amorphous silicon film in step (4) is 20nm
- the thickness of the second layer of doped amorphous silicon in step (5) is 40nm
- the doping concentration is 1E19cm ⁇ 3
- the third layer The thickness of the doped amorphous silicon is 40nm, and the doping concentration is 1E20cm -3
- the thickness of the fourth layer of doped amorphous silicon is 40nm, and the doping concentration is 5E20cm -3
- the thickness of the fifth layer of doped amorphous silicon is 40nm, the doping concentration is 1E21cm -3 .
- step (3) hydrogen is introduced in a manner of introducing sufficient hydrogen at one time for hydrogenation or continuous and uninterrupted introduction of hydrogen for hydrogenation.
- the present invention is based on PECVD technology, after the deposition of the silicon oxide film layer, the hydrogenation treatment is performed to increase the hydrogen atom content at the silicon-based interface, thereby better passivating the dangling bonds at the interface.
- the technical scheme of the present invention in order to avoid the high concentration of phosphorus atoms or boron atoms at the interface between the oxide layer and the amorphous silicon, penetrate the silicon oxide layer and be doped into the silicon base, a gradient doping method is adopted. A layer of intrinsic amorphous silicon is deposited, and then amorphous silicon with increasing phosphorus or boron atom content is deposited layer by layer until the desired thickness of amorphous silicon is achieved. Alternatively, the phosphorus or boron atoms are deposited by other means of changing the concentration.
- the phosphorus or boron atoms in the amorphous silicon are redistributed to achieve the desired doping concentration while avoiding the penetration of the phosphorus or boron atoms. Overdoping of the silicon base caused by the permeable oxide layer.
- Fig. 1 is comparative group and embodiment 1 and 2 service life test results schematic diagram
- Fig. 2 is comparative group and embodiment 1 and 2I-VOC test result schematic diagram
- the process of preparing TOPCon cells based on PECVD coating technology usually includes the following steps: 1. Double-sided texturing, 2. Boron expansion, 3. Back etching cleaning, 4. PECVD growth of silicon oxide + phosphorus-doped amorphous silicon, 5. Annealing crystal 6. Wafer cleaning, 7. Front + back coating, 8. Screen printing + sintering.
- the preparation method of the silicon oxide and the doped amorphous silicon film in the TOPCon cell of the present invention includes the following operation steps:
- silane and phosphine are simultaneously introduced to carry out the deposition of in-situ doped amorphous silicon.
- the phosphorus of the second layer is doped with amorphous silicon
- the concentration reaches 1E19cm -3
- the phosphorus concentration of the third layer of doped amorphous silicon reaches 1E20cm -3
- the phosphorus concentration of the fourth layer of doped amorphous silicon reaches 5E20cm -3
- so on until the desired amorphous silicon is finally reached thickness is finally reached thickness.
- the final combination of the formed film layers is: the thickness of intrinsic amorphous silicon is 20 nm; the thickness of the second layer of doped amorphous silicon is 40 nm, and the doping concentration is 1E19cm ⁇ 3 ; the thickness of the third layer of doped amorphous silicon is 40 nm, and the doping concentration is 1E20 cm -3 ; the thickness of the fourth layer of doped amorphous silicon is 40 nm and the doping concentration is 5E20cm -3 ; the thickness of the fifth layer of doped amorphous silicon is 40 nm and the doping concentration is 1E21cm -3 .
- the preparation method of the silicon oxide and the doped amorphous silicon film in the TOPCon cell of the present invention includes the following operation steps:
- silane and phosphine are simultaneously introduced to carry out the deposition of in-situ doped amorphous silicon.
- the phosphorus of the second layer is doped with amorphous silicon
- the concentration reaches 1E19cm -3
- the phosphorus concentration of the third layer of doped amorphous silicon reaches 1E20cm -3
- the phosphorus concentration of the fourth layer of doped amorphous silicon reaches 5E20cm -3
- so on until the desired amorphous silicon is finally reached thickness is finally reached thickness.
- the final combination of the formed film layers is: the thickness of intrinsic amorphous silicon is 10 nm; the thickness of the second layer of doped amorphous silicon is 35 nm, and the doping concentration is 1E19cm ⁇ 3 ; the thickness of the third layer of doped amorphous silicon is 35 nm, and the doping concentration is 1E20 cm -3 ; the thickness of the fourth layer of doped amorphous silicon is 50 nm and the doping concentration is 5E20cm -3 ; the thickness of the fifth layer of doped amorphous silicon is 50 nm and the doping concentration is 1E21cm -3 .
- the preparation method of the silicon oxide and the doped amorphous silicon film in the TOPCon cell of the present invention includes the following operation steps:
- silane and phosphine are simultaneously introduced to carry out the deposition of in-situ doped amorphous silicon.
- the phosphorus of the second layer is doped with amorphous silicon
- the concentration reaches 1E20cm -3
- the phosphorus concentration of the third layer of doped amorphous silicon reaches 1E21cm -3 .
- the final combination of the formed film layers is: the thickness of intrinsic amorphous silicon is 50 nm; the thickness of the second layer of doped amorphous silicon is 60 nm, and the doping concentration is 1E20cm ⁇ 3 ; the thickness of the third layer of doped amorphous silicon is 70 nm, and the doping concentration is 1E21 cm -3 .
- the preparation method of the silicon oxide and the doped amorphous silicon film in the TOPCon cell of the present invention includes the following operation steps:
- silane and phosphine are simultaneously introduced to carry out the deposition of in-situ doped amorphous silicon.
- the phosphorus of the second layer is doped with amorphous silicon
- the concentration reaches 1E17cm -3
- the phosphorus concentration of the third layer of doped amorphous silicon reaches 5E17cm -3
- the phosphorus concentration of the fourth layer of doped amorphous silicon reaches 1E18cm -3
- so on until the desired amorphous silicon is finally reached thickness is finally reached thickness.
- the final combination of the formed film layers is: the thickness of intrinsic amorphous silicon is 10 nm; the thickness of the second layer of doped amorphous silicon is 15 nm, and the doping concentration is 1E17cm -3 ; the thickness of the third layer of doped amorphous silicon is 15 nm, and the doping concentration is 5E17cm -3 ; the thickness of the fourth layer of doped amorphous silicon is 20nm, and the doping concentration is 1E18cm -3 ; the thickness of the fifth layer of doped amorphous silicon is 20nm, and the doping concentration is 5E18cm -3 ; the thickness of the sixth layer of doped amorphous silicon is 20nm, Doping concentration 1E19cm -3 ; seventh layer doped amorphous silicon thickness 20nm, doping concentration 5E19cm -3 ; eighth layer doped amorphous silicon thickness 20nm, doping concentration 1E20cm -3 ; ninth layer doped amorphous
- the passivation contact structure produced by conventional PECVD is used as the comparison group, that is, the silicon oxide film is not subjected to hydrogenation treatment after deposition, and the process of doping amorphous silicon is one-time molding, which is the same as the preparation method of the present invention.
- Table 1 shows the passivation performance of the passivation contact structure of the materials prepared in the comparative group and the embodiments of the present invention and the electrical performance test results of the batteries prepared based on the four embodiments:
- the passivation performance of the film prepared by the method of the present invention is significantly improved compared to the comparison group.
- the lifespan was 2650us; the I-Voc values were 714Mv and 716mV, which were 7 and 9mV higher than the 707mV of the control group, respectively.
- the open voltages of the TOPCon cells made based on Example 1 and Example 2 are 687 and 689mV, respectively, which are 1mV and 3mV higher than those of the control group, respectively, and the cell efficiency is increased by 0.12% and 0.16%, respectively.
- Example 3 when the amorphous silicon is 3 layers (Example 3), the efficiency is increased by 0.02%; when the amorphous silicon is 10 layers (Example 4), the effect of gradient doping is close to that of 5 layers, However, the process time is about doubled compared with 5 layers, and the efficiency of Example 4 is increased by 0.17% compared with the comparison group.
- the current limit efficiency of crystalline silicon cells is around 29%, and the current world record efficiency of TOPCon cells is 24.48% (Trina Solar Lab). It is very difficult to improve the efficiency when the cell efficiency is close to the theoretical limit, and an efficiency improvement of 0.01% has good industrial value.
- the technical solution can effectively improve the conversion efficiency of the TOPCon battery only through the design of the deposition solution without changing the device design and the battery structure.
- the technical solutions involved in the present invention are not limited to in-situ phosphorus-doped amorphous silicon, but include in-situ doping of other elements such as boron doping, aluminum doping, gallium doping, and the like.
- the gradient in-situ doping concentration and method involved in this technical solution are not limited to the methods shown in the above embodiments.
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Abstract
A preparation method for a silicon oxide and doped amorphous silicon film layer in a TOPCon battery. Operation steps comprise: (1) placing a silicon wafer subjected to back etching and cleaning onto a carrier plate for preheating; (2) introducing SiH4 and N2O or O2 as reaction gas, generating plasma by using an alternating-current radio-frequency power supply, and reacting SiH4 and N2O to deposit a silicon oxide film; (3) introducing nitrogen and hydrogen, and performing hydrogenation treatment under a plasma excitation condition; (4) after hydrogenation treatment is performed on the silicon oxide film, introducing silane, and performing deposition of intrinsic amorphous silicon under the effect of plasma; and (5) after deposition is finished, introducing silane and phosphorane to perform in-situ doped amorphous silicon deposition, so as to enable concentration of phosphorus of each layer of doped amorphous silicon from the inner layer to the outer layer to be gradually decreased till a final required amorphous silicon film layer thickness by means of deposition is finished. In this way, the required doping concentration is achieved, and excessive doping of the silicon base due to the fact that phosphorus atoms or boron atoms penetrate through the oxide layer is avoided.
Description
本发明涉及TOPCon电池中使用的氧化硅+磷掺杂非晶硅膜层的制备方法,尤其涉及基于PECVD技术制备TOPCon电池中高质量氧化硅和掺杂非晶硅膜层的方法。The invention relates to a method for preparing a silicon oxide+phosphorus doped amorphous silicon film used in a TOPCon battery, in particular to a method for preparing a high-quality silicon oxide and doped amorphous silicon film in a TOPCon battery based on PECVD technology.
采用钝化接触电池结构相比较于常规的N型PERT、PERL电池,最大的优势在于背面SiO
x/poly-Si结构避免了金属与硅基的直接接触,因此有效的降低了金属下的复合速率,提升了电池的开路电压;同时SiOx/poly-Si结构本身具有很好的钝化效果,在减少金属区钝化的同时也减少了钝化区的载流子复合,可谓一举两得。目前基于PECVD技术制备TOPCon电池中高质量氧化硅和掺杂非晶硅膜层存在两个急需解决的问题:
Compared with the conventional N-type PERT and PERL cells, the biggest advantage of the passivation contact cell structure is that the backside SiO x /poly-Si structure avoids the direct contact between the metal and the silicon base, thus effectively reducing the recombination rate under the metal , which improves the open circuit voltage of the battery; at the same time, the SiOx/poly-Si structure itself has a good passivation effect, which reduces the passivation of the metal region and reduces the carrier recombination in the passivation region, which can be said to kill two birds with one stone. At present, there are two urgent problems to be solved in the preparation of high-quality silicon oxide and doped amorphous silicon films in TOPCon cells based on PECVD technology:
首先,制备TOPCon电池的工艺存在以下难点:1.隧穿氧化层,SiOx的生长质量对硅界面悬挂键的钝化非常重要,同时对隧穿氧化层厚度均匀性的要求很高,通常>2nm的氧化层就不能使电子有效的隧穿。2.多晶硅生长,现有的多晶硅生长包括PECVD、LPCVD、PVD等,然后经过退火晶化成为多晶硅,但是多晶硅要求钝化质量好、缺陷少、晶化率高、均匀性好,对于要求高产能的光伏行业来说保证大产能的同时,保证poly-Si的均匀性和稳定性依然很难实现。3.掺杂非晶硅,poly的掺杂可以在poly沉积的同时实现原位掺杂,也可以在非晶硅沉积完成后进行扩散掺杂,但是需要求Poly-Si掺杂浓度达到一定量级保证场效应和金属化接触(一般>2-4E20cm
-3),同时穿透氧化层到达硅基的浓度需要严格控制,以减少硅表面的俄歇复合。总体来说,目前制备TOPCon电池的工艺要求非常高,工艺参数控制需要非常严格。
First of all, the process of preparing TOPCon cells has the following difficulties: 1. Tunneling oxide layer, the growth quality of SiOx is very important for the passivation of dangling bonds at the silicon interface, and at the same time, the uniformity of the thickness of the tunnel oxide layer is very high, usually > 2nm The oxide layer cannot allow electrons to tunnel efficiently. 2. Polysilicon growth, the existing polysilicon growth includes PECVD, LPCVD, PVD, etc., and then annealed and crystallized into polysilicon, but polysilicon requires good passivation quality, fewer defects, high crystallization rate, and good uniformity. In the photovoltaic industry, it is still difficult to ensure the uniformity and stability of poly-Si while ensuring large production capacity. 3. Doping amorphous silicon, the doping of poly can realize in-situ doping at the same time as poly deposition, or diffusion doping can be performed after the deposition of amorphous silicon, but the doping concentration of Poly-Si needs to reach a certain amount The level ensures field effect and metallization contact (generally > 2-4E20cm -3 ), while the concentration of penetrating the oxide layer to the silicon base needs to be strictly controlled to reduce Auger recombination on the silicon surface. In general, the current process requirements for preparing TOPCon cells are very high, and the control of process parameters needs to be very strict.
其次,制备接触钝化结构(SiOx/doped-poly)存在如下的问题:常规的接触钝化结构(SiOx/doped-poly)制作流程大概为:热生长氧化硅层(退火炉)-生长多晶硅层(LPCVD设备)-多晶硅掺杂(扩散炉),通常需要三台设备并且多晶硅在电池的另一面绕镀需要专门的清洗设备去除,工艺复杂。另一种制备接触钝化结构的方法是基于PECVD设备,这种方法工艺时间短、可以实现原位掺杂、无绕镀;常规技术方案首先通过PECVD进行氧化硅的生长,然后沉积掺杂非晶硅,最后进行退火晶化。这种方法的局限之处在于:1.PECVD生长的氧化硅钝化质量较差,对硅片表面的悬挂键钝化不彻底,导致电子空穴复合电流密度的增加;2.非晶硅掺杂浓度在整个工艺流程中窗口低,若掺杂量高,在后 续的退火晶化过程中容易穿透氧化硅层进入硅基引起复合的增加,掺杂浓度低又会导致接触电阻率较大,不利于外电路电子的导出,因此掺杂原子很难在多晶硅中保持较高的浓度而不掺杂硅基体中。Secondly, the preparation of the contact passivation structure (SiOx/doped-poly) has the following problems: the conventional production process of the contact passivation structure (SiOx/doped-poly) is roughly: thermal growth of silicon oxide layer (annealing furnace) - growth of polysilicon layer (LPCVD equipment) - polysilicon doping (diffusion furnace), usually three equipments are required and the polysilicon is plated on the other side of the cell and needs special cleaning equipment to remove, and the process is complicated. Another method for preparing a contact passivation structure is based on PECVD equipment. This method has a short process time and can achieve in-situ doping and no-winding plating; the conventional technical solution is to first grow silicon oxide by PECVD, and then deposit doping non- Crystalline silicon, and finally annealed and crystallized. The limitations of this method are: 1. The passivation quality of silicon oxide grown by PECVD is poor, and the passivation of dangling bonds on the surface of the silicon wafer is not complete, resulting in an increase in the current density of electron-hole recombination; 2. Amorphous silicon doping The impurity concentration has a low window in the whole process flow. If the doping amount is high, it is easy to penetrate the silicon oxide layer and enter the silicon matrix in the subsequent annealing and crystallization process, causing the increase of recombination. The low doping concentration will lead to a large contact resistivity. , which is not conducive to the export of external circuit electrons, so it is difficult to maintain a high concentration of dopant atoms in polysilicon without doping the silicon matrix.
另外,针对工业化生产,晶体硅电池的极限效率在29%左右,目前TOPCon电池的量产世界纪录效率在24.48%。在电池效率接近理论极限的情况下效率的提升是非常困难的,仅0.01%的效率提升已经变得非常困难并且具有良好的产业化价值。In addition, for industrial production, the limit efficiency of crystalline silicon cells is around 29%, and the current mass production world record efficiency of TOPCon cells is 24.48%. It is very difficult to improve the efficiency when the cell efficiency is close to the theoretical limit, and the efficiency improvement of only 0.01% has become very difficult and has good industrialization value.
有鉴于上述现有的氧化硅和掺杂非晶硅膜层制备方法存在的缺陷,本发明人基于从事此类产品设计制造多年丰富的实务经验及专业知识,并配合学理的运用,积极加以研究创新,以期创设一种TOPCon电池中氧化硅和掺杂非晶硅膜层的制备方法,提高生长更高钝化质量的氧化硅+磷掺杂非晶硅膜层,使其更具有实用性。In view of the defects of the above-mentioned existing methods for preparing silicon oxide and doped amorphous silicon films, the inventors actively conduct research based on years of rich practical experience and professional knowledge engaged in the design and manufacture of such products, as well as the application of theory. Innovation, in order to create a preparation method of silicon oxide and doped amorphous silicon film in TOPCon cells, improve the growth of silicon oxide + phosphorus doped amorphous silicon film with higher passivation quality, and make it more practical.
发明内容SUMMARY OF THE INVENTION
基于PECVD镀膜技术制备TOPCon电池的流程通常包括如下步骤:1.双面制绒,2.硼扩,3.背刻清洗,4.PECVD生长氧化硅+磷掺杂非晶硅,5.退火晶化,6.硅片清洗,7.正面+背面镀膜,8.丝网印刷+烧结;为了生长更高钝化质量的氧化硅+磷掺杂非晶硅,本发明的主要目的为提供一种TOPCon电池中氧化硅和掺杂非晶硅膜层的制备方法。The process of preparing TOPCon cells based on PECVD coating technology usually includes the following steps: 1. Double-sided texturing, 2. Boron expansion, 3. Back etching cleaning, 4. PECVD growth of silicon oxide + phosphorus-doped amorphous silicon, 5. Annealing crystal 6. Silicon wafer cleaning, 7. Front + back coating, 8. Screen printing + sintering; in order to grow higher passivation quality silicon oxide + phosphorus-doped amorphous silicon, the main purpose of the present invention is to provide a Preparation method of silicon oxide and doped amorphous silicon film layer in TOPCon cell.
为了达到上述目的,本发明所采用的技术方案是:In order to achieve the above object, the technical scheme adopted in the present invention is:
本发明提出的TOPCon电池中氧化硅和掺杂非晶硅膜层的制备方法,包括如下操作步骤,The preparation method of silicon oxide and doped amorphous silicon film layer in the TOPCon battery proposed by the present invention includes the following operation steps:
(1)将背刻蚀清洗后的硅片放到载板上进行预热,预热后温度300-700℃;如果预热温度低于300℃沉积速率会过慢,但是温度过高,高于700℃会导致硅烷分解过快反应控制难度大,在硅片上产生粉尘颗粒,预热后温度优选为400-600℃;更优选的为450℃。(1) Place the back-etched and cleaned silicon wafer on the carrier for preheating, and the temperature after preheating is 300-700°C; if the preheating temperature is lower than 300°C, the deposition rate will be too slow, but the temperature is too high and the temperature is too high. At 700°C, it will cause the silane to decompose too fast and it will be difficult to control the reaction, and dust particles will be generated on the silicon wafer. The temperature after preheating is preferably 400-600°C; more preferably, it is 450°C.
(2)通入SiH
4和N
2O或O
2作为反应气体,利用交流射频电源产生等离子体,SiH
4和N
2O反应生产SiO
x,并进行氧化硅薄膜沉积;
(2) feed SiH 4 and N 2 O or O 2 as reactive gas, utilize AC radio frequency power supply to generate plasma, SiH 4 and N 2 O react to produce SiO x , and carry out silicon oxide film deposition;
(3)氧化硅薄膜沉积完成之后,通入氮气和氢气,并在等离子体激发条件下进行氢化处理;(3) after the deposition of the silicon oxide film is completed, nitrogen and hydrogen are introduced, and hydrogenation treatment is carried out under plasma excitation conditions;
(4)氧化硅薄膜经过氢化处理之后,通入硅烷,在等离子体作用下进行本征非晶硅的沉积;(4) After the silicon oxide film is subjected to hydrogenation treatment, silane is introduced, and the deposition of intrinsic amorphous silicon is carried out under the action of plasma;
(5)本征非晶硅沉积完之后,同时通入硅烷和磷烷进行原位掺杂非晶硅的沉积,通过控制硅烷/磷烷的比例,使得从内层到外层每层掺杂非晶硅的磷浓度逐渐降低,直到沉 积完成最终所需的非晶硅膜层厚度。此步骤可以进行不同厚度和不同掺杂浓度的组合,其中控制非晶硅的层数为3-10层,若小于3层难以起到梯度掺杂阻止磷原子掺杂到硅基的目的,层数高于10层效果接近一致,还会造成沉积时间过长(每层沉积之后需要吹扫),浪费产能,较优的层数为5层。非晶硅膜层的总厚度为100-200nm,厚度低于100nm会造成浆料烧穿氧化硅破坏钝化接触结构,厚度高于200nm会造成严重的寄生吸收,降低电池的短路电流密度。(5) After the deposition of intrinsic amorphous silicon, silane and phosphine are simultaneously introduced for in-situ doped amorphous silicon deposition. By controlling the ratio of silane/phosphine, each layer is doped from the inner layer to the outer layer. The phosphorus concentration of the amorphous silicon is gradually reduced until the final desired thickness of the amorphous silicon film is deposited. This step can be combined with different thicknesses and different doping concentrations. The number of layers of amorphous silicon is controlled to be 3-10 layers. If it is less than 3 layers, it is difficult to achieve the purpose of gradient doping to prevent phosphorus atoms from doping into the silicon base. If the number of layers is higher than 10, the effect is close to the same, and it will also cause the deposition time to be too long (purging is required after each layer is deposited), which wastes the production capacity. The optimal number of layers is 5 layers. The total thickness of the amorphous silicon film is 100-200nm. If the thickness is less than 100nm, the paste will burn through the silicon oxide and destroy the passivation contact structure. If the thickness is higher than 200nm, it will cause serious parasitic absorption and reduce the short-circuit current density of the battery.
更进一步的,步骤(5)中本征非晶硅沉积完之后,同时通入硅烷和磷烷进行原位掺杂非晶硅的沉积,通过控制硅烷/磷烷的比例,优选的浓度组合为:使第二层掺杂非晶硅的磷浓度达到1E19cm
-3,第三层掺杂非晶硅的磷浓度达到1E20cm
-3,第四层掺杂非晶硅的磷浓度达到5E20cm
-3,直至最终达到所需的非晶硅厚度。
Further, after the intrinsic amorphous silicon is deposited in step (5), silane and phosphine are simultaneously introduced to carry out the deposition of in-situ doped amorphous silicon. By controlling the ratio of silane/phosphine, the preferred concentration combination is: : the phosphorus concentration of the second layer of doped amorphous silicon reaches 1E19cm -3 , the phosphorus concentration of the third layer of doped amorphous silicon reaches 1E20cm -3 , the phosphorus concentration of the fourth layer of doped amorphous silicon reaches 5E20cm -3 , until the desired thickness of amorphous silicon is finally achieved.
更进一步的,在步骤(5)当非晶硅膜层沉积完成后进行晶化退火,退火温度为600-1000℃,时间10-100min;优选在950℃条件下退火30min。Further, in step (5), crystallization annealing is performed after the deposition of the amorphous silicon film layer, the annealing temperature is 600-1000°C, and the time is 10-100min; preferably, the annealing is performed at 950°C for 30min.
更进一步的,其中步骤(2)中沉积的氧化硅薄膜厚度为1-3nm,其中若氧化硅层小于1nm,在硅片表面的致密性较差,不能很好的钝化硅片表面缺陷,高于3nm将使电子隧穿困难,造成FF的严重下降,其中优选的氧化硅薄膜厚度为1.5nm。Further, the thickness of the silicon oxide film deposited in the step (2) is 1-3nm, and if the silicon oxide layer is less than 1nm, the compactness on the surface of the silicon wafer is poor, and the surface defects of the silicon wafer cannot be well passivated, Above 3 nm will make electron tunneling difficult, resulting in a severe drop in FF, where the preferred silicon oxide film thickness is 1.5 nm.
更进一步的,其中步骤(2)中交流射频电源功率为10-1000W。Further, in the step (2), the power of the AC radio frequency power supply is 10-1000W.
更进一步的,其中步骤(3)中氢气体积含量占氢气和氮气总体积的1-50%,若氢气浓度低于1%则导致氢化效果不足,浓度高于50%氢气离子化浓度达到饱和,再高的氢气体积浓度不仅会造成浪费也增加了设备运行的风险。优选的氢气体积浓度为5%,既保证了氢化效果同时不会造成浪费和设备风险。Further, wherein the hydrogen volume content in step (3) accounts for 1-50% of the total volume of hydrogen and nitrogen, if the hydrogen concentration is lower than 1%, the hydrogenation effect is insufficient, and the concentration is higher than 50%. The hydrogen ionization concentration reaches saturation, No matter how high the hydrogen volume concentration is, it will not only cause waste but also increase the risk of equipment operation. The preferred hydrogen volume concentration is 5%, which not only ensures the hydrogenation effect but also does not cause waste and equipment risks.
更进一步的,其中步骤(4)中本征非晶硅的厚度为10-50nm;若本征非晶硅的厚度低于10nm则起不到实现梯度浓度的目的,若厚度高于50nm,在退火时底层难以实现原位掺杂,其中优选的非晶硅的厚度为20nm。Further, the thickness of the intrinsic amorphous silicon in step (4) is 10-50nm; if the thickness of the intrinsic amorphous silicon is less than 10nm, the purpose of achieving the gradient concentration cannot be achieved. During annealing, it is difficult to achieve in-situ doping of the bottom layer, and the preferred thickness of amorphous silicon is 20 nm.
更进一步的,其中步骤(5)本征非晶硅沉积完之后,同时通入硅烷和硼烷进行原位掺杂非晶硅的沉积,通过控制硅烷/硼烷的比例,使得从内层到外层每层掺杂非晶硅的硼浓度逐渐升高,直到沉积完成最终所需的非晶硅厚度。Further, after the deposition of the intrinsic amorphous silicon in step (5), silane and borane are simultaneously introduced to carry out the deposition of in-situ doped amorphous silicon. The boron concentration of each layer of doped amorphous silicon in the outer layer is gradually increased until the final desired thickness of amorphous silicon is deposited.
更进一步的,步骤(4)中生长本征非晶硅沉积温度、沉积功率、沉积厚度均可根据实际需要调节。Furthermore, in step (4), the deposition temperature, deposition power and deposition thickness of the grown intrinsic amorphous silicon can be adjusted according to actual needs.
更进一步的,步骤(5)中所生长的掺杂非晶硅不仅包括正梯度掺杂(从内层到外层浓度依次升高),也包含其它可实现抑制掺杂原子进入硅基的任意浓度的组合方式。Further, the doped amorphous silicon grown in step (5) not only includes positive gradient doping (increase in concentration from the inner layer to the outer layer), but also includes other arbitrary elements that can inhibit the doping atoms from entering the silicon base. A combination of concentrations.
更进一步的,步骤(5)在本征非晶硅沉积完之后进行铝或镓掺杂非晶硅的沉积。Further, in step (5), the deposition of aluminum or gallium doped amorphous silicon is performed after the intrinsic amorphous silicon is deposited.
更进一步的,步骤(4)中本征非晶硅薄膜的沉积厚度为20nm,步骤(5)中第二层掺杂非晶硅的厚度为40nm,掺杂浓度为1E19cm
-3;第三层掺杂非晶硅的厚度为40nm,掺杂浓度为1E20cm
-3;第四层掺杂非晶硅的厚度为40nm,掺杂浓度为5E20cm
-3;第五层掺杂非晶硅的厚度为40nm,掺杂浓度为1E21cm
-3。
Further, the deposition thickness of the intrinsic amorphous silicon film in step (4) is 20nm, the thickness of the second layer of doped amorphous silicon in step (5) is 40nm, and the doping concentration is 1E19cm −3 ; the third layer The thickness of the doped amorphous silicon is 40nm, and the doping concentration is 1E20cm -3 ; the thickness of the fourth layer of doped amorphous silicon is 40nm, and the doping concentration is 5E20cm -3 ; the thickness of the fifth layer of doped amorphous silicon is 40nm, the doping concentration is 1E21cm -3 .
更进一步的,步骤(3)中通入氢气的方式为一次性通入充足氢气进行氢化或者持续不间断通入氢气进行氢化。Further, in step (3), hydrogen is introduced in a manner of introducing sufficient hydrogen at one time for hydrogenation or continuous and uninterrupted introduction of hydrogen for hydrogenation.
通过上述技术方案,本发明的有益效果是:Through the above-mentioned technical scheme, the beneficial effects of the present invention are:
1.本发明基于PECVD技术,在沉积完遂穿氧化硅薄膜层后,进行氢化处理,增加硅基界面处的氢原子含量,从而更好的钝化界面处的悬挂键。1. The present invention is based on PECVD technology, after the deposition of the silicon oxide film layer, the hydrogenation treatment is performed to increase the hydrogen atom content at the silicon-based interface, thereby better passivating the dangling bonds at the interface.
2.本发明的技术方案,为了避免在氧化层与非晶硅的界面处磷原子或硼原子浓度过高穿透氧化硅层而掺杂到硅基,采用梯度掺杂的方式,具体的先沉积一层本征非晶硅,然后逐层沉积磷原子或硼原子含量逐渐升高的非晶硅,直至达到所需求的非晶硅厚度。或者采用浓度变化组合的其他方式沉积磷原子或硼原子,在退火晶化的过程中非晶硅中的磷原子或硼原子重新分布,达到所需掺杂浓度同时避免了磷原子或硼原子穿透氧化层造成的硅基过度掺杂。2. The technical scheme of the present invention, in order to avoid the high concentration of phosphorus atoms or boron atoms at the interface between the oxide layer and the amorphous silicon, penetrate the silicon oxide layer and be doped into the silicon base, a gradient doping method is adopted. A layer of intrinsic amorphous silicon is deposited, and then amorphous silicon with increasing phosphorus or boron atom content is deposited layer by layer until the desired thickness of amorphous silicon is achieved. Alternatively, the phosphorus or boron atoms are deposited by other means of changing the concentration. During the annealing and crystallization process, the phosphorus or boron atoms in the amorphous silicon are redistributed to achieve the desired doping concentration while avoiding the penetration of the phosphorus or boron atoms. Overdoping of the silicon base caused by the permeable oxide layer.
图1为对比组与实施例1和2使用寿命测试结果示意图;Fig. 1 is comparative group and embodiment 1 and 2 service life test results schematic diagram;
图2为对比组与实施例1和2I-VOC测试结果示意图;Fig. 2 is comparative group and embodiment 1 and 2I-VOC test result schematic diagram;
下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本发明一部分实施例,而不是全部的实施例。The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, but not all of the embodiments.
除非另有定义,本文所使用的所有的技术和科学术语与属于本发明的技术领域的技术人员通常理解的含义相同。本文中在本发明的说明书中所使用的术语只是为了描述具体的实施例的目的,不是旨在于限制本发明。本文所使用的术语“及/或”包括一个或多个相关的所列项目的任意的和所有的组合。Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terms used herein in the description of the present invention are for the purpose of describing specific embodiments only, and are not intended to limit the present invention. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.
基于PECVD镀膜技术制备TOPCon电池的流程通常包括如下步骤:1.双面制绒,2.硼扩,3.背刻清洗,4.PECVD生长氧化硅+磷掺杂非晶硅,5.退火晶化,6.硅片清洗,7.正面+背面镀膜,8.丝网印刷+烧结。The process of preparing TOPCon cells based on PECVD coating technology usually includes the following steps: 1. Double-sided texturing, 2. Boron expansion, 3. Back etching cleaning, 4. PECVD growth of silicon oxide + phosphorus-doped amorphous silicon, 5. Annealing crystal 6. Wafer cleaning, 7. Front + back coating, 8. Screen printing + sintering.
实施例1Example 1
为了生长更高钝化质量的氧化硅+磷掺杂非晶硅膜层,本发明TOPCon电池中氧化硅和掺杂非晶硅膜层的制备方法包括如下操作步骤:In order to grow a silicon oxide+phosphorus doped amorphous silicon film with higher passivation quality, the preparation method of the silicon oxide and the doped amorphous silicon film in the TOPCon cell of the present invention includes the following operation steps:
(1)将做完前道制程背刻清洗后的硅片放到载板上进行预热,预热后温度为450℃;(1) Put the silicon wafer after back-etching and cleaning in the previous process on the carrier board for preheating, and the temperature after preheating is 450°C;
(2)通入SiH
4和N
2O作为反应气体,利用交流射频电源产生等离子体,SiH
4和N
2O反应生产SiO
x,沉积的SiO
x(氧化硅薄膜)厚度达到1.5nm时结束;
(2) pass SiH 4 and N 2 O as reactive gases, utilize AC radio frequency power supply to generate plasma, SiH 4 and N 2 O react to produce SiO x , and the deposited SiO x (silicon oxide film) ends when the thickness reaches 1.5 nm;
(3)氧化硅薄膜沉积完成之后,通入氮气和氢气,并在等离子体激发条件下进行氢化处理,其中一次性冲入充足的氢气,氢气体积含量为5%;(3) After the deposition of the silicon oxide film is completed, nitrogen and hydrogen are introduced, and hydrogenation treatment is performed under plasma excitation conditions, wherein sufficient hydrogen is charged at one time, and the volume content of hydrogen is 5%;
(4)氧化硅薄膜经过氢化处理之后,通入硅烷,在等离子体作用下进行本征非晶硅的沉积,本征非晶硅的沉积厚度20nm;(4) After the silicon oxide film is subjected to hydrogenation treatment, silane is introduced, and the deposition of intrinsic amorphous silicon is carried out under the action of plasma, and the deposition thickness of intrinsic amorphous silicon is 20 nm;
(5)本征非晶硅沉积完之后,同时通入硅烷和磷烷进行原位掺杂非晶硅的沉积,通过控制硅烷/磷烷的比例,使第二层掺杂非晶硅的磷浓度达到1E19cm
-3,第三层掺杂非晶硅的磷浓度达到1E20cm
-3,第四层掺杂非晶硅的磷浓度达到5E20cm
-3,以此类推直至最终达到所需的非晶硅厚度。
(5) After the intrinsic amorphous silicon is deposited, silane and phosphine are simultaneously introduced to carry out the deposition of in-situ doped amorphous silicon. By controlling the ratio of silane/phosphine, the phosphorus of the second layer is doped with amorphous silicon The concentration reaches 1E19cm -3 , the phosphorus concentration of the third layer of doped amorphous silicon reaches 1E20cm -3 , the phosphorus concentration of the fourth layer of doped amorphous silicon reaches 5E20cm -3 , and so on until the desired amorphous silicon is finally reached thickness.
形成的膜层最终的组合为:本征非晶硅厚度20nm;第二层掺杂非晶硅厚度40nm,掺杂浓度1E19cm
-3;第三层掺杂非晶硅厚度40nm,掺杂浓度1E20cm
-3;第四层掺杂非晶硅厚度40nm,掺杂浓度5E20cm
-3;第五层掺杂非晶硅厚度40nm,掺杂浓度1E21cm
-3。
The final combination of the formed film layers is: the thickness of intrinsic amorphous silicon is 20 nm; the thickness of the second layer of doped amorphous silicon is 40 nm, and the doping concentration is 1E19cm −3 ; the thickness of the third layer of doped amorphous silicon is 40 nm, and the doping concentration is 1E20 cm -3 ; the thickness of the fourth layer of doped amorphous silicon is 40 nm and the doping concentration is 5E20cm -3 ; the thickness of the fifth layer of doped amorphous silicon is 40 nm and the doping concentration is 1E21cm -3 .
(6)膜层沉积完成后进行晶化退火,退火温度950℃,退火时间30min。(6) After the film deposition is completed, crystallization annealing is performed, the annealing temperature is 950° C., and the annealing time is 30 minutes.
实施例2Example 2
为了生长更高钝化质量的氧化硅+磷掺杂非晶硅膜层,本发明TOPCon电池中氧化硅和掺杂非晶硅膜层的制备方法包括如下操作步骤:In order to grow a silicon oxide+phosphorus doped amorphous silicon film with higher passivation quality, the preparation method of the silicon oxide and the doped amorphous silicon film in the TOPCon cell of the present invention includes the following operation steps:
(1)将做完前道制程背刻清洗后的硅片放到载板上进行预热,预热后温度为450℃;(1) Put the silicon wafer after back-etching and cleaning in the previous process on the carrier board for preheating, and the temperature after preheating is 450°C;
(2)通入SiH
4和N
2O作为反应气体,利用交流射频电源产生等离子体,SiH
4和N
2O反应生产SiO
x,沉积的SiO
x(氧化硅薄膜)厚度达到1.5nm时结束;
(2) feed SiH 4 and N 2 O as reactive gases, utilize AC radio frequency power to generate plasma, SiH 4 and N 2 O react to produce SiO x , and the deposited SiO x (silicon oxide film) ends when the thickness reaches 1.5 nm;
(3)氧化硅薄膜沉积完成之后,通入氮气和氢气,并在等离子体激发条件下进行氢化处理,其中持续不间断的冲入氢气,保证氢气的体积含量维持在5%;(3) After the deposition of the silicon oxide film is completed, nitrogen and hydrogen are introduced, and hydrogenation treatment is carried out under plasma excitation conditions, wherein the hydrogen is continuously flushed to ensure that the volume content of hydrogen is maintained at 5%;
(4)氧化硅薄膜经过氢化处理之后,通入硅烷,在等离子体作用下进行本征非晶硅的沉积,本征非晶硅的沉积厚度10nm;(4) After the silicon oxide film is subjected to hydrogenation treatment, silane is introduced, and the deposition of intrinsic amorphous silicon is carried out under the action of plasma, and the deposition thickness of intrinsic amorphous silicon is 10 nm;
(5)本征非晶硅沉积完之后,同时通入硅烷和磷烷进行原位掺杂非晶硅的沉积,通过控制硅烷/磷烷的比例,使第二层掺杂非晶硅的磷浓度达到1E19cm
-3,第三层掺杂 非晶硅的磷浓度达到1E20cm
-3,第四层掺杂非晶硅的磷浓度达到5E20cm
-3,以此类推直至最终达到所需的非晶硅厚度。
(5) After the intrinsic amorphous silicon is deposited, silane and phosphine are simultaneously introduced to carry out the deposition of in-situ doped amorphous silicon. By controlling the ratio of silane/phosphine, the phosphorus of the second layer is doped with amorphous silicon The concentration reaches 1E19cm -3 , the phosphorus concentration of the third layer of doped amorphous silicon reaches 1E20cm -3 , the phosphorus concentration of the fourth layer of doped amorphous silicon reaches 5E20cm -3 , and so on until the desired amorphous silicon is finally reached thickness.
形成的膜层最终的组合为:本征非晶硅厚度10nm;第二层掺杂非晶硅厚度35nm,掺杂浓度1E19cm
-3;第三层掺杂非晶硅厚度35nm,掺杂浓度1E20cm
-3;第四层掺杂非晶硅厚度50nm,掺杂浓度5E20cm
-3;第五层掺杂非晶硅厚度50nm,掺杂浓度1E21cm
-3。
The final combination of the formed film layers is: the thickness of intrinsic amorphous silicon is 10 nm; the thickness of the second layer of doped amorphous silicon is 35 nm, and the doping concentration is 1E19cm −3 ; the thickness of the third layer of doped amorphous silicon is 35 nm, and the doping concentration is 1E20 cm -3 ; the thickness of the fourth layer of doped amorphous silicon is 50 nm and the doping concentration is 5E20cm -3 ; the thickness of the fifth layer of doped amorphous silicon is 50 nm and the doping concentration is 1E21cm -3 .
(6)膜层沉积完成后进行晶化退火,退火温度950℃,退火时间30min。(6) After the film deposition is completed, crystallization annealing is performed, the annealing temperature is 950° C., and the annealing time is 30 minutes.
实施例3Example 3
为了生长更高钝化质量的氧化硅+磷掺杂非晶硅膜层,本发明TOPCon电池中氧化硅和掺杂非晶硅膜层的制备方法包括如下操作步骤:In order to grow a silicon oxide+phosphorus doped amorphous silicon film with higher passivation quality, the preparation method of the silicon oxide and the doped amorphous silicon film in the TOPCon cell of the present invention includes the following operation steps:
(1)将做完前道制程背刻清洗后的硅片放到载板上进行预热,预热后温度为400℃;(1) Put the silicon wafer after back-etching and cleaning in the previous process on the carrier board for preheating, and the temperature after preheating is 400°C;
(2)通入SiH
4和N
2O作为反应气体,利用交流射频电源产生等离子体,SiH
4和N
2O反应生产SiO
x,沉积的SiO
x(氧化硅薄膜)厚度达到1.8nm时结束;
(2) feed SiH 4 and N 2 O as reactive gases, utilize AC radio frequency power supply to generate plasma, SiH 4 and N 2 O react to produce SiO x , and the deposited SiO x (silicon oxide film) ends when the thickness reaches 1.8 nm;
(3)氧化硅薄膜沉积完成之后,通入氮气和氢气,并在等离子体激发条件下进行氢化处理,其中持续不间断的冲入氢气,保证氢气的体积含量维持在10%;(3) After the deposition of the silicon oxide film is completed, nitrogen and hydrogen are introduced, and hydrogenation treatment is carried out under plasma excitation conditions, wherein the hydrogen is continuously flushed to ensure that the volume content of hydrogen is maintained at 10%;
(4)氧化硅薄膜经过氢化处理之后,通入硅烷,在等离子体作用下进行本征非晶硅的沉积,本征非晶硅的沉积厚度50nm;(4) After the silicon oxide film is subjected to hydrogenation treatment, silane is introduced, and the deposition of intrinsic amorphous silicon is carried out under the action of plasma, and the deposition thickness of intrinsic amorphous silicon is 50 nm;
(5)本征非晶硅沉积完之后,同时通入硅烷和磷烷进行原位掺杂非晶硅的沉积,通过控制硅烷/磷烷的比例,使第二层掺杂非晶硅的磷浓度达到1E20cm
-3,第三层掺杂非晶硅的磷浓度达到1E21cm
-3。
(5) After the intrinsic amorphous silicon is deposited, silane and phosphine are simultaneously introduced to carry out the deposition of in-situ doped amorphous silicon. By controlling the ratio of silane/phosphine, the phosphorus of the second layer is doped with amorphous silicon The concentration reaches 1E20cm -3 , and the phosphorus concentration of the third layer of doped amorphous silicon reaches 1E21cm -3 .
形成的膜层最终的组合为:本征非晶硅厚度50nm;第二层掺杂非晶硅厚度60nm,掺杂浓度1E20cm
-3;第三层掺杂非晶硅厚度70nm,掺杂浓度1E21cm
-3。
The final combination of the formed film layers is: the thickness of intrinsic amorphous silicon is 50 nm; the thickness of the second layer of doped amorphous silicon is 60 nm, and the doping concentration is 1E20cm −3 ; the thickness of the third layer of doped amorphous silicon is 70 nm, and the doping concentration is 1E21 cm -3 .
(6)膜层沉积完成后进行晶化退火,退火温度850℃,退火时间45min。(6) After the film deposition is completed, crystallization annealing is performed, the annealing temperature is 850°C, and the annealing time is 45 minutes.
实施例4Example 4
为了生长更高钝化质量的氧化硅+磷掺杂非晶硅膜层,本发明TOPCon电池中氧化硅和掺杂非晶硅膜层的制备方法包括如下操作步骤:In order to grow a silicon oxide+phosphorus doped amorphous silicon film with higher passivation quality, the preparation method of the silicon oxide and the doped amorphous silicon film in the TOPCon cell of the present invention includes the following operation steps:
(1)将做完前道制程背刻清洗后的硅片放到载板上进行预热,预热后温度为600℃;(1) Put the silicon wafer after back-etching and cleaning in the previous process on the carrier board for preheating, and the temperature after preheating is 600°C;
(2)通入SiH
4和N
2O作为反应气体,利用交流射频电源产生等离子体,SiH
4和N
2O反应生产SiO
x,沉积的SiO
x(氧化硅薄膜)厚度达到2.2nm时结束;
(2) feed SiH 4 and N 2 O as reactive gases, utilize AC radio frequency power supply to generate plasma, SiH 4 and N 2 O react to produce SiO x , and the deposited SiO x (silicon oxide film) ends when the thickness reaches 2.2 nm;
(3)氧化硅薄膜沉积完成之后,通入氮气和氢气,并在等离子体激发条件下进行氢化处理,其中持续不间断的冲入氢气,保证氢气的体积含量维持在15%;(3) After the deposition of the silicon oxide film is completed, nitrogen and hydrogen are introduced, and hydrogenation treatment is carried out under the plasma excitation condition, wherein the hydrogen is continuously flushed to ensure that the volume content of the hydrogen is maintained at 15%;
(4)氧化硅薄膜经过氢化处理之后,通入硅烷,在等离子体作用下进行本征非晶硅的沉积,本征非晶硅的沉积厚度10nm;(4) After the silicon oxide film is subjected to hydrogenation treatment, silane is introduced, and the deposition of intrinsic amorphous silicon is carried out under the action of plasma, and the deposition thickness of intrinsic amorphous silicon is 10 nm;
(5)本征非晶硅沉积完之后,同时通入硅烷和磷烷进行原位掺杂非晶硅的沉积,通过控制硅烷/磷烷的比例,使第二层掺杂非晶硅的磷浓度达到1E17cm
-3,第三层掺杂非晶硅的磷浓度达到5E17cm
-3,第四层掺杂非晶硅的磷浓度达到1E18cm
-3,以此类推直至最终达到所需的非晶硅厚度。
(5) After the intrinsic amorphous silicon is deposited, silane and phosphine are simultaneously introduced to carry out the deposition of in-situ doped amorphous silicon. By controlling the ratio of silane/phosphine, the phosphorus of the second layer is doped with amorphous silicon The concentration reaches 1E17cm -3 , the phosphorus concentration of the third layer of doped amorphous silicon reaches 5E17cm -3 , the phosphorus concentration of the fourth layer of doped amorphous silicon reaches 1E18cm -3 , and so on until the desired amorphous silicon is finally reached thickness.
形成的膜层最终的组合为:本征非晶硅厚度10nm;第二层掺杂非晶硅厚度15nm,掺杂浓度1E17cm
-3;第三层掺杂非晶硅厚度15nm,掺杂浓度5E17cm
-3;第四层掺杂非晶硅厚度20nm,掺杂浓度1E18cm
-3;第五层掺杂非晶硅厚度20nm,掺杂浓度5E18cm
-3;第六层掺杂非晶硅厚度20nm,掺杂浓度1E19cm
-3;第七层掺杂非晶硅厚度20nm,掺杂浓度5E19cm
-3;第八层掺杂非晶硅厚度20nm,掺杂浓度1E20cm
-3;第九层掺杂非晶硅厚度20nm,掺杂浓度5E20cm
-3;第十层掺杂非晶硅厚度20nm,掺杂浓度1E21cm
-3。
The final combination of the formed film layers is: the thickness of intrinsic amorphous silicon is 10 nm; the thickness of the second layer of doped amorphous silicon is 15 nm, and the doping concentration is 1E17cm -3 ; the thickness of the third layer of doped amorphous silicon is 15 nm, and the doping concentration is 5E17cm -3 ; the thickness of the fourth layer of doped amorphous silicon is 20nm, and the doping concentration is 1E18cm -3 ; the thickness of the fifth layer of doped amorphous silicon is 20nm, and the doping concentration is 5E18cm -3 ; the thickness of the sixth layer of doped amorphous silicon is 20nm, Doping concentration 1E19cm -3 ; seventh layer doped amorphous silicon thickness 20nm, doping concentration 5E19cm -3 ; eighth layer doped amorphous silicon thickness 20nm, doping concentration 1E20cm -3 ; ninth layer doped amorphous silicon The thickness of silicon is 20nm and the doping concentration is 5E20cm -3 ; the thickness of the tenth layer doped amorphous silicon is 20nm and the doping concentration is 1E21cm -3 .
对比组comparison group
以常规的PECVD制作钝化接触结构为对比组,即氧化硅薄膜沉积之后不进行氢化处理,同时掺杂非晶硅过程一次成型,其与制备方法与本发明相同。The passivation contact structure produced by conventional PECVD is used as the comparison group, that is, the silicon oxide film is not subjected to hydrogenation treatment after deposition, and the process of doping amorphous silicon is one-time molding, which is the same as the preparation method of the present invention.
对比组及本发明实施例制备的材料,其钝化接触结构的钝化性能和基于四个实施例方案制备出的电池电性能检测结果如表1所示:Table 1 shows the passivation performance of the passivation contact structure of the materials prepared in the comparative group and the embodiments of the present invention and the electrical performance test results of the batteries prepared based on the four embodiments:
表1Table 1
Voc(V)Voc(V) | Isc(A)Isc(A) | FF(%)FF(%) | Eta(%)Eta(%) | Rs(ohm)Rs(ohm) | Rp(ohm)Rp(ohm) | |
对比组comparison group | 0.6860.686 | 10.4010.40 | 81.2981.29 | 22.9522.95 | 0.0020.002 | 596596 |
实施例1Example 1 | 0.6870.687 | 10.4110.41 | 81.2681.26 | 23.0723.07 | 0.0020.002 | 524524 |
实施例2Example 2 | 0.6890.689 | 10.4410.44 | 81.2781.27 | 23.1123.11 | 0.0010.001 | 723723 |
实施例3Example 3 | 0.6860.686 | 10.4110.41 | 81.381.3 | 22.9722.97 | 0.0020.002 | 654654 |
实施例4Example 4 | 0.6890.689 | 10.4310.43 | 81.2881.28 | 23.1223.12 | 0.0010.001 | 706706 |
从上述数据可以看出,其中采用本发明方法制备的膜层钝化性能相对于对比组有明显的提升,实施例1和实施例2中位值少子寿命分别为3650us和3680us,而对比组少子寿命为2650us;I-Voc值分别为714Mv和716mV,比对比组707mV分别提高了7和9mV。It can be seen from the above data that the passivation performance of the film prepared by the method of the present invention is significantly improved compared to the comparison group. The lifespan was 2650us; the I-Voc values were 714Mv and 716mV, which were 7 and 9mV higher than the 707mV of the control group, respectively.
基于实施例1和实施例2所制作的TOPCon电池开压分别为687和689mV,比对比 组分别提升了1mV和3mV,电池效率分别提升了0.12%和0.16%。The open voltages of the TOPCon cells made based on Example 1 and Example 2 are 687 and 689mV, respectively, which are 1mV and 3mV higher than those of the control group, respectively, and the cell efficiency is increased by 0.12% and 0.16%, respectively.
根据实施例3的检测结果,当非晶硅为3层时(实施例3)效率提升0.02%;当非晶硅为10层时(实施例4),梯度掺杂的效果和5层接近,但是工艺时间比5层提高一倍左右,实施例4比对比组效率提升0.17%。According to the test results of Example 3, when the amorphous silicon is 3 layers (Example 3), the efficiency is increased by 0.02%; when the amorphous silicon is 10 layers (Example 4), the effect of gradient doping is close to that of 5 layers, However, the process time is about doubled compared with 5 layers, and the efficiency of Example 4 is increased by 0.17% compared with the comparison group.
目前晶体硅电池的极限效率在29%左右,目前TOPCon电池的量产世界纪录效率在24.48%(天合光能实验室)。在电池效率接近理论极限的情况下效率的提升是非常困难的,0.01%的效率提升已经具有良好的产业化价值。本技术方案在不改变设备设计和电池结构的前提下,仅通过沉积方案的设计就可有效提高TOPCon电池的转换效率。The current limit efficiency of crystalline silicon cells is around 29%, and the current world record efficiency of TOPCon cells is 24.48% (Trina Solar Lab). It is very difficult to improve the efficiency when the cell efficiency is close to the theoretical limit, and an efficiency improvement of 0.01% has good industrial value. The technical solution can effectively improve the conversion efficiency of the TOPCon battery only through the design of the deposition solution without changing the device design and the battery structure.
本发明所涉及的技术方案不仅仅局限于原位磷掺杂的非晶硅,包括其他元素的原位掺杂例如硼掺杂、铝掺杂、镓掺杂等。本技术方案中涉及的梯度原位掺杂浓度和方式亦不局限于如上实施例所示的方式。The technical solutions involved in the present invention are not limited to in-situ phosphorus-doped amorphous silicon, but include in-situ doping of other elements such as boron doping, aluminum doping, gallium doping, and the like. The gradient in-situ doping concentration and method involved in this technical solution are not limited to the methods shown in the above embodiments.
本行业的技术人员应该了解,本发明不受上述实施例的限制,上述实施例和说明书中描述的只是说明本发明的原理,在不脱离本发明精神和范围的前提下,本发明还会有各种变化和改进,这些变化和改进都落入要求保护的本发明范围内。本发明要求保护范围由所附的权利要求书及其等效物界定。Those skilled in the art should understand that the present invention is not limited by the above-mentioned embodiments. The above-mentioned embodiments and descriptions only illustrate the principle of the present invention. Without departing from the spirit and scope of the present invention, the present invention will also have Various changes and modifications fall within the scope of the claimed invention. The claimed scope of the present invention is defined by the appended claims and their equivalents.
Claims (10)
- 一种TOPCon电池中氧化硅和掺杂非晶硅膜层的制备方法,其特征在于:包括如下操作步骤,A preparation method of silicon oxide and doped amorphous silicon film in a TOPCon battery, characterized in that it comprises the following operation steps,(1)将背刻蚀清洗后的硅片放到载板上进行预热,预热后温度300-700℃;(1) Put the silicon wafer after back etching and cleaning on the carrier plate for preheating, and the temperature after preheating is 300-700℃;(2)通入SiH 4和N 2O或O 2作为反应气体,利用交流射频电源产生等离子体,SiH 4和N 2O反应生产SiO x,并进行氧化硅薄膜沉积; (2) feed SiH 4 and N 2 O or O 2 as reactive gas, utilize AC radio frequency power supply to generate plasma, SiH 4 and N 2 O react to produce SiO x , and carry out silicon oxide film deposition;(3)氧化硅薄膜沉积完成之后,通入氮气和氢气,并在等离子体激发条件下进行氢化处理;(3) after the deposition of the silicon oxide film is completed, nitrogen and hydrogen are introduced, and hydrogenation treatment is carried out under plasma excitation conditions;(4)氧化硅薄膜经过氢化处理之后,通入硅烷,在等离子体作用下进行本征非晶硅的沉积;(4) After the silicon oxide film is subjected to hydrogenation treatment, silane is introduced, and the deposition of intrinsic amorphous silicon is carried out under the action of plasma;(5)本征非晶硅沉积完之后,同时通入硅烷和磷烷进行原位掺杂非晶硅的沉积,通过控制硅烷/磷烷的比例,使得从内层到外层每层掺杂非晶硅的磷浓度逐渐降低,直到沉积完成最终所需的非晶硅膜层厚度。(5) After the intrinsic amorphous silicon is deposited, silane and phosphine are simultaneously introduced for the deposition of in-situ doped amorphous silicon. By controlling the ratio of silane/phosphine, each layer is doped from the inner layer to the outer layer. The phosphorus concentration of the amorphous silicon is gradually reduced until the final desired thickness of the amorphous silicon film is deposited.
- 根据权利要求1所述的TOPCon电池中氧化硅和掺杂非晶硅膜层的制备方法,其特征在于:所述步骤(1)中预热后温度400-600℃。The method for preparing a silicon oxide and doped amorphous silicon film layer in a TOPCon battery according to claim 1, wherein the temperature after preheating in the step (1) is 400-600°C.
- 根据权利要求1或2所述的TOPCon电池中氧化硅和掺杂非晶硅膜层的制备方法,其特征在于:所述步骤(2)中沉积的氧化硅薄膜厚度为1-3nm。The method for preparing a silicon oxide and doped amorphous silicon film layer in a TOPCon battery according to claim 1 or 2, wherein the thickness of the silicon oxide film deposited in the step (2) is 1-3 nm.
- 根据权利要求1或2所述的TOPCon电池中氧化硅和掺杂非晶硅膜层的制备方法,其特征在于:所述步骤(2)中交流射频电源功率为10-1000W。The method for preparing silicon oxide and doped amorphous silicon film layers in a TOPCon battery according to claim 1 or 2, characterized in that: in the step (2), the power of the AC radio frequency power supply is 10-1000W.
- 根据权利要求3所述的TOPCon电池中氧化硅和掺杂非晶硅膜层的制备方法,其特征在于:所述步骤(3)中氢气体积含量占氢气和氮气总体积的1-50%。The method for preparing silicon oxide and doped amorphous silicon film layers in a TOPCon battery according to claim 3, wherein the volume content of hydrogen in the step (3) accounts for 1-50% of the total volume of hydrogen and nitrogen.
- 根据权利要求3所述的TOPCon电池中氧化硅和掺杂非晶硅膜层的制备方法,其特征在于:所述步骤(4)中本征非晶硅的厚度为10-50nm。The method for preparing a silicon oxide and doped amorphous silicon film layer in a TOPCon cell according to claim 3, wherein the thickness of the intrinsic amorphous silicon in the step (4) is 10-50 nm.
- 根据权利要求1所述的TOPCon电池中氧化硅和掺杂非晶硅膜层的制备方法,其特征在于:所述步骤(5)本征非晶硅沉积完之后,同时通入硅烷和硼烷进行原位掺杂非晶硅的沉积,通过控制硅烷/硼烷的比例,使得从内层到外层每层掺杂非晶硅的硼浓度逐渐升高,直到沉积完成最终所需的非晶硅膜层厚度。The method for preparing silicon oxide and doped amorphous silicon film layers in a TOPCon battery according to claim 1, characterized in that: after the deposition of the intrinsic amorphous silicon in the step (5), silane and borane are simultaneously introduced Carry out the deposition of in-situ doped amorphous silicon. By controlling the ratio of silane/borane, the boron concentration of each layer of doped amorphous silicon from the inner layer to the outer layer is gradually increased until the final desired amorphous silicon is deposited. Silicon film thickness.
- 根据权利要求1所述的TOPCon电池中氧化硅和掺杂非晶硅膜层的制备方法,其特征在于:所述步骤(5)在本征非晶硅沉积完之后进行铝或镓掺杂非晶硅的沉积。The method for preparing silicon oxide and doped amorphous silicon film layers in a TOPCon cell according to claim 1, wherein in the step (5), aluminum or gallium doped non-crystalline silicon is performed after the intrinsic amorphous silicon is deposited. Deposition of crystalline silicon.
- 根据权利要求1所述的TOPCon电池中氧化硅和掺杂非晶硅膜层的制备方法,其特 征在于:所述步骤(4)中本征非晶硅薄膜的沉积厚度为20nm,所述步骤(5)中第二层掺杂非晶硅的厚度为40nm,掺杂浓度为1E19cm -3;第三层掺杂非晶硅的厚度为40nm,掺杂浓度为1E20cm -3;第四层掺杂非晶硅的厚度为40nm,掺杂浓度为5E20cm -3;第五层掺杂非晶硅的厚度为40nm,掺杂浓度为1E21cm -3。 The method for preparing a silicon oxide and doped amorphous silicon film layer in a TOPCon cell according to claim 1, wherein the deposition thickness of the intrinsic amorphous silicon film in the step (4) is 20 nm, and the step In (5), the thickness of the second layer of doped amorphous silicon is 40nm, and the doping concentration is 1E19cm -3 ; the thickness of the third layer of doped amorphous silicon is 40nm, and the doping concentration is 1E20cm -3 ; The thickness of the hetero-amorphous silicon is 40nm, and the doping concentration is 5E20cm -3 ; the thickness of the fifth layer of doped amorphous silicon is 40nm, and the doping concentration is 1E21cm -3 .
- 根据权利要求5所述的TOPCon电池中氧化硅和掺杂非晶硅膜层的制备方法,其特征在于:所述步骤(3)中通入氢气的方式为一次性通入充足氢气进行氢化或者持续不间断通入氢气进行氢化。The method for preparing silicon oxide and doped amorphous silicon film layers in a TOPCon battery according to claim 5, wherein the method of introducing hydrogen in the step (3) is to introduce sufficient hydrogen at one time for hydrogenation or Hydrogenation was carried out with continuous and uninterrupted flow of hydrogen.
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