WO2022104789A1 - 谐振腔发光二极管的制备方法 - Google Patents

谐振腔发光二极管的制备方法 Download PDF

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WO2022104789A1
WO2022104789A1 PCT/CN2020/130867 CN2020130867W WO2022104789A1 WO 2022104789 A1 WO2022104789 A1 WO 2022104789A1 CN 2020130867 W CN2020130867 W CN 2020130867W WO 2022104789 A1 WO2022104789 A1 WO 2022104789A1
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layer
semiconductor layer
material layer
resonant cavity
emitting diode
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PCT/CN2020/130867
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English (en)
French (fr)
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程凯
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苏州晶湛半导体有限公司
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Priority to CN202080107157.8A priority Critical patent/CN116472653A/zh
Priority to PCT/CN2020/130867 priority patent/WO2022104789A1/zh
Priority to US17/714,473 priority patent/US20220231186A1/en
Publication of WO2022104789A1 publication Critical patent/WO2022104789A1/zh

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/10Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a light reflecting structure, e.g. semiconductor Bragg reflector
    • H01L33/105Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a light reflecting structure, e.g. semiconductor Bragg reflector with a resonant cavity structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/10Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • H01L33/007Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds
    • H01L33/0075Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/04Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
    • H01L33/06Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26Materials of the light emitting region
    • H01L33/30Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
    • H01L33/32Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
    • H01L33/325Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen characterised by the doping materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • H01L33/385Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape the electrode extending at least partially onto a side surface of the semiconductor body

Definitions

  • the invention relates to the technical field of semiconductors, in particular to a method for preparing a resonant cavity light emitting diode.
  • Group III nitrides are the third generation of new semiconductor materials after the first and second generation semiconductor materials such as Si and GaAs.
  • GaN has many advantages as a wide bandgap semiconductor material, such as high saturation drift speed, high breakdown voltage, It has excellent carrier transport properties and can form AlGaN, InGaN ternary alloys and AlInGaN quaternary alloys, etc., and is easy to fabricate GaN-based PN junctions.
  • GaN-based materials and semiconductor devices have been extensively and deeply studied in recent years, and MOCVD (Metal-organicChemicalVaporDeposition, metal-organic chemical vapor deposition) technology to grow GaN-based materials is becoming more and more mature;
  • MOCVD Metal-organicChemicalVaporDeposition, metal-organic chemical vapor deposition
  • GaN-based LED The research on optoelectronic devices such as LDs and microelectronic devices such as GaN-based HEMTs has achieved remarkable achievements and great progress.
  • the purpose of the present invention is to provide a method for preparing a resonant cavity light-emitting diode, which can improve the uniformity of light emission of the resonant cavity light-emitting diode.
  • a first aspect of the present invention provides a method for preparing a resonant cavity light emitting diode, the resonant cavity light emitting diode comprises a first mirror, a first semiconductor layer, an active layer, and a second semiconductor layer stacked in sequence and the second reflecting mirror, the conductivity type of the first semiconductor layer is opposite to the conductivity type of the second semiconductor layer; the preparation method includes: a first contact between the first semiconductor layer and the first reflecting mirror surface, and/or the second contact surface of the second semiconductor layer and the second mirror is planarized.
  • the preparation method of the resonant cavity light-emitting diode includes:
  • the second semiconductor layer is obtained by planarizing a first surface of the second semiconductor material layer away from the substrate, and the first surface is the second contact surface after being planarized.
  • the preparation method of the resonant cavity light-emitting diode includes:
  • the first reflective material layer including a first insulating material layer and a second insulating material layer arranged in layers;
  • the first semiconductor layer, the active layer, the second semiconductor layer and the second reflection mirror are sequentially formed on the first reflection mirror.
  • the first reflective material layer includes multiple layers of the first insulating material layer and the second insulating material layer alternately arranged;
  • the method further includes:
  • a nucleation layer and a buffer layer are sequentially formed on the substrate.
  • the method further includes:
  • a nucleation layer and a buffer layer are sequentially formed on the substrate.
  • the method further includes:
  • the second mirror is formed on the second semiconductor layer.
  • the method for preparing a resonant cavity light-emitting diode includes:
  • the third surface is planarized to obtain the first semiconductor layer, and the third surface is the first contact surface after being planarized.
  • the method before forming the first semiconductor material layer, the active layer, the second semiconductor layer and the second mirror in sequence on the substrate, the method further includes:
  • the peeling off the substrate includes:
  • the substrate, nucleation layer, and buffer layer are peeled off to expose the third surface.
  • the method further includes:
  • the first mirror is formed on the first semiconductor layer.
  • the first semiconductor layer is an N-type semiconductor layer
  • the second semiconductor layer is a P-type semiconductor layer
  • the active layer includes a multiple quantum well structure.
  • the multiple quantum well structure is a periodic structure in which GaN and AlGaN are alternately arranged, or a periodic structure in which GaN and AlInGaN are alternately arranged.
  • the material of the first semiconductor layer includes group III-V compounds
  • the material of the second semiconductor layer includes group III-V compounds.
  • the resonant cavity light-emitting diode further includes a third insulating material layer, a fourth insulating material layer, a first electrode and a second electrode, and the third insulating material layer is located on the first reflector away from the second electrode.
  • the first electrode is located on the side of the third insulating material layer away from the first mirror;
  • the fourth insulating material layer is located on the side of the second reflector away from the first reflector, and the second electrode is located on the side of the fourth insulating material layer away from the second reflector, so The second electrode is in contact with the second mirror through a via hole on the fourth insulating material layer.
  • the method further includes:
  • the first contact surface in the process of planarizing the first contact surface, it is detected whether the surface roughness of the first contact surface is within a specified range, and if so, stop the flattening the first contact surface, if not, continuing to flatten the first contact surface until the surface roughness is within the specified range;
  • the second contact surface in the process of planarizing the second contact surface, it is detected whether the surface roughness of the second contact surface is within a specified range, and if so, stop the The second contact surface is planarized, and if not, the second contact surface is continued to be planarized until the surface roughness is within the specified range.
  • the beneficial effect of the present invention is that the first contact surface of the first semiconductor layer and the first mirror, and/or the second contact surface of the second semiconductor layer and the second mirror is planarized , therefore, the uniformity of the spacing between the first reflector and the second reflector can be improved, that is, the uniformity of the cavity length of the resonant cavity formed by the first reflector and the second reflector can be improved, and further, the resonant cavity can be improved Uniformity of light emitting diodes.
  • the cavity length of the resonant cavity is uniform, this scheme only allows light of a specific wavelength to be emitted.
  • the process is simple and the cost is low.
  • FIG. 1 is a flowchart of a method for manufacturing a resonant cavity light-emitting diode according to a first embodiment of the present invention
  • FIG. 2 to 3 are schematic diagrams of intermediate structures corresponding to the process in FIG. 1;
  • FIG. 4 is a schematic cross-sectional structure diagram of a resonant cavity light-emitting diode according to the first embodiment of the present invention
  • FIG. 5 is a flowchart of a method for manufacturing a resonant cavity light-emitting diode according to a second embodiment of the present invention.
  • 6 to 8 are schematic diagrams of intermediate structures corresponding to the process in FIG. 5;
  • FIG. 9 is a schematic cross-sectional structure diagram of a resonant cavity light-emitting diode according to a second embodiment of the present invention.
  • FIG. 10 is a flowchart of a method for manufacturing a resonant cavity light-emitting diode according to a third embodiment of the present invention.
  • 11 to 15 are schematic diagrams of intermediate structures corresponding to the process in FIG. 10;
  • FIG. 16 is a schematic cross-sectional structure diagram of a resonant cavity light-emitting diode according to a third embodiment of the present invention.
  • FIG. 17 is a schematic cross-sectional structure diagram of a resonant cavity light-emitting diode according to a fourth embodiment of the present invention.
  • the first reflection mirror 23 The first semiconductor layer 24
  • the second semiconductor layer 27 The second mirror 28
  • the first semiconductor material layer 29 The adhesion layer 210
  • the first insulating material layer 2151 The first contact surface 217
  • the second insulating material layer 2152 The third surface 218
  • FIG. 1 is a flow chart of a method for manufacturing a resonant cavity light-emitting diode according to the first embodiment of the present invention.
  • 2 to 3 are schematic diagrams of intermediate structures corresponding to the process in FIG. 1 .
  • 4 is a schematic cross-sectional structure diagram of a resonant cavity light-emitting diode according to the first embodiment of the present invention.
  • the preparation method of the resonant cavity light-emitting diode includes the following steps 101-103:
  • step S101 a nucleation layer 219 , a buffer layer 22 , a first mirror 23 , a first semiconductor layer 24 , an active layer 25 and a second semiconductor material layer 26 are sequentially formed on the substrate 21 .
  • a nucleation layer 219 , a buffer layer 22 , a first mirror 23 , a first semiconductor layer 24 , an active layer 25 and a second mirror can be sequentially formed on the substrate 21 by an epitaxial process.
  • Layer 26 of semiconductor material is a semiconductor material that is sequentially formed on the substrate 21 by an epitaxial process.
  • the material of the substrate 21 is silicon.
  • the material of the substrate 21 can also be silicon carbide (SiC), gallium nitride (GaN) or sapphire.
  • the material of the nucleation layer 219 may be a III-V group compound, for example, may be AlN, or may be GaN, AlGaN, InGaN or AlInGaN.
  • the material of the buffer layer 22 may be a group III-V compound, for example, may be GaN, or may be AlN, AlGaN, InGaN or AlInGaN.
  • the first reflector 23 is a Bragg reflector, and the first reflector 23 is formed by alternately arranging high-refractive-index materials and low-refractive-index materials.
  • the first reflector 23 includes multiple layers of alternately arranged SiO 2 and TiO 2 , but not limited thereto.
  • the first semiconductor layer 24 is an N-type semiconductor layer.
  • the material of the first semiconductor layer 24 is a group III-V compound, such as GaN, or AlN, AlGaN, InGaN or AlInGaN.
  • the doping element of the first semiconductor layer 24 includes at least one of Si ions, Ge ions, Sn ions, Se ions and Te ions.
  • the doping elements of the first semiconductor layer 24 include Si ions, or include Si ions with Ge ions, but not limited thereto.
  • the active layer 25 includes a multiple quantum well structure.
  • the multiple quantum well structure may be a periodic structure in which GaN and AlGaN are alternately arranged, or a periodic structure in which GaN and AlInGaN are alternately arranged, but not limited thereto.
  • the second semiconductor material layer 26 is a P-type conductor material layer, and the material of the second semiconductor material layer 26 is a III-V group compound, for example, GaN, or AlN, AlGaN, InGaN or AlInGaN .
  • the doping element of the second semiconductor material layer 26 includes at least one of Mg ions, Zn ions, Ca ions, Sr ions or Ba ions, for example, Mg ions, or Zn ions and Ca ions, but not limited thereto.
  • the first surface 213 of the second semiconductor material layer 26 away from the substrate 21 may be uneven.
  • the surface of the mirror 28 facing the first mirror 23 is uneven, and the thickness uniformity of the epitaxial layer between the second mirror 28 and the first mirror 23 is poor, which leads to different cavity lengths of the resonant cavity at different positions, that is, resonance
  • the uniformity of the cavity length of the cavity is poor, resulting in poor uniformity of light emission of the resonant cavity light-emitting diode.
  • the relationship between the cavity length T of the resonant cavity and the wavelength ⁇ of the light emitted by the light-emitting diode of the resonant cavity is as follows:
  • N is a positive integer.
  • step S102 the first surface 213 of the second semiconductor material layer 26 away from the substrate 21 is planarized to obtain a second semiconductor layer 27 .
  • the planarized first surface 213 becomes the second contact surface 214 .
  • a dry etching process, a wet etching process or a mechanical grinding process may be used to planarize the first surface 213 of the second semiconductor material layer 26 away from the substrate 21 to obtain In the second semiconductor layer 27 , the first surface 213 is a flat second contact surface 214 after being planarized.
  • step S103 the second mirror 28 is formed on the second semiconductor layer 27 .
  • a second mirror 28 is formed on the second semiconductor layer 27 by an epitaxial process, so as to form a resonant cavity with the first mirror 23 .
  • the structure of the second reflector 28 is similar to that of the first reflector 23, both are Bragg reflectors, and the second reflector 28 is also formed by alternately arranging high-refractive-index materials and low-refractive-index materials.
  • the reflector 28 is composed of multiple layers of alternately arranged high and low refractive index materials, such as SiO 2 and TiO 2 alternately arranged.
  • the second contact surface 214 of the second semiconductor layer 27 in contact with the second mirror 28 is flat Therefore, the surface of the second mirror 28 facing the first mirror 23 is flat, so that the problem of different cavity lengths at different positions of the resonator can be improved, that is, the uniformity of the cavity length of the resonator can be improved, and the first The uniformity of the thickness of the epitaxial layer between the two reflecting mirrors 28 and the first reflecting mirror 23 improves the uniformity of light emission of the resonant cavity light emitting diode.
  • the cavity length of the resonant cavity is uniform, this scheme only allows light of a specific wavelength to be emitted. Compared with the scheme of improving the uniformity of sensitive elements in the active layer that affect the emission wavelength, such as In element, in the resonator cavity , the process is simple and the cost is low.
  • FIG. 5 is a flowchart of a method for manufacturing a resonant cavity light-emitting diode according to the second embodiment of the present invention.
  • 6 to 8 are schematic diagrams of intermediate structures corresponding to the process in FIG. 5 .
  • 9 is a schematic cross-sectional structure diagram of a resonant cavity light-emitting diode according to a second embodiment of the present invention.
  • the method for manufacturing a resonant cavity light-emitting diode includes the following steps 501 to 504 :
  • step 501 the nucleation layer 219 and the buffer layer 22 are sequentially formed on the substrate 21 .
  • a nucleation layer 219 and a buffer layer 22 are sequentially formed on the substrate 21 by an epitaxial process.
  • the material of the substrate 21 may be gallium nitride, or may be silicon, silicon carbide or sapphire.
  • the material of the nucleation layer 219 may be GaN, or may be AlN, AlGaN, InGaN or AlInGaN.
  • the material of the buffer layer 22 may be AlGaN, or may be GaN, AlN, InGaN or AlInGaN.
  • a first reflective material layer 215 is formed on the buffer layer 22 , and the first reflective material layer 215 includes a first insulating material layer 2151 and a second insulating material layer 2152 that are stacked.
  • first reflective material layer 215 on the buffer layer 22 , wherein the first reflective material layer 215 includes a plurality of alternately arranged first insulating material layers 2151 and a second reflective material layer 215 .
  • Two insulating material layers 2152 .
  • the material of the first insulating material layer 2151 may be TiO 2
  • the material of the second insulating material layer 2152 may be SiO 2 , but not limited thereto.
  • the second surface 216 of the first reflective material layer 215 away from the substrate 21 may be uneven, which may lead to different cavity lengths of the resonator at different positions, that is, the length of the resonator is different.
  • the uniformity of the cavity length is poor, and if the first semiconductor layer 24 is grown directly thereon, the surface of the first semiconductor layer 24 facing the first mirror 23 may be uneven, resulting in the difference between the second mirror 28 and the first mirror 23.
  • the thickness uniformity of the epitaxial layer between them is poor, resulting in poor uniformity of light emission of the resonant cavity light-emitting diode.
  • step 503 the second surface 216 of the first reflective material layer 215 away from the substrate 21 is planarized to obtain the first reflecting mirror 23 , and the planarized second surface 216 becomes the first contact surface 217 .
  • the process of planarizing the second surface 216 in the process of planarizing the second surface 216, it can be detected whether the surface roughness of the second surface 216 is within a specified range, and if so, stop the planarizing of the second surface 216, if not , then continue to planarize the second surface 216 until the surface roughness of the second surface 216 is within a specified range.
  • a dry etching process, a wet etching process or a mechanical grinding process may be used to planarize the second surface 216 of the first reflective material layer 215 away from the substrate 21 to obtain The first mirror 23 .
  • the second surface 216 is a flat first contact surface 217 after being planarized.
  • step 504 the first semiconductor layer 24 , the active layer 25 , the second semiconductor layer 27 and the second mirror 28 are sequentially formed on the first mirror 23 .
  • a first semiconductor layer 24 , an active layer 25 , a second semiconductor layer 27 and a second mirror 28 are sequentially formed on the first mirror 23 by an epitaxial process.
  • the first semiconductor layer 24 , the active layer 25 , and the second semiconductor layer 27 are similar to the first semiconductor layer 24 , the active layer 25 , and the second semiconductor layer 27 in the first embodiment. Repeat.
  • the structure of the second reflector 28 is similar to that of the first reflector 23 , both are Bragg reflectors, including multiple layers of alternately arranged SiO 2 and TiO 2 .
  • the second surface 216 of the first reflective material layer 215 away from the substrate 21 is planarized, the first contact surface 217 of the first reflective mirror 23 in contact with the first semiconductor layer 24 is flat Therefore, the surface of the first reflecting mirror 23 facing the second reflecting mirror 28 is flat, so that the problem of different cavity lengths at different positions of the resonant cavity can be improved, that is, the uniformity of the cavity length of the resonant cavity can be improved, and the The uniformity of the thickness of the epitaxial layer between the second reflecting mirror 28 and the first reflecting mirror 23 improves the uniformity of light emission of the resonant cavity light emitting diode.
  • first embodiment and the second embodiment can be used in combination, so that the surface of the first reflecting mirror 23 facing the second reflecting mirror 28 is flat, and at the same time, the surface of the second reflecting mirror 28 facing the first reflecting mirror 23 is flat.
  • the surface is also flat, so that the uniformity of the cavity length of the resonator can be further improved, and the uniformity of the thickness of the epitaxial layer between the second mirror 28 and the first mirror 23 is better, so that the resonator light-emitting diode can be further improved luminous uniformity.
  • FIG. 10 is a flow chart of a method for manufacturing a resonant cavity light-emitting diode according to a third embodiment of the present invention.
  • 11 to 15 are schematic diagrams of intermediate structures corresponding to the process in FIG. 10 .
  • FIG. 16 is a schematic cross-sectional structure diagram of a resonant cavity light-emitting diode according to a third embodiment of the present invention.
  • the method for manufacturing a resonant cavity light-emitting diode includes the following steps 1001 to 1006:
  • step 1001 a nucleation layer 219 and a buffer layer 22 are sequentially formed on the substrate 21 .
  • a nucleation layer 219 and a buffer layer 22 are sequentially formed on the substrate 21 by an epitaxial process.
  • the material of the substrate 21 may be sapphire, or may be silicon, silicon carbide or gallium nitride.
  • the material of the nucleation layer 219 may be InGaN, or may be GaN, AlN, AlGaN or AlInGaN.
  • the material of the buffer layer 22 may be InGaN, or may be GaN, AlN, AlGaN or AlInGaN.
  • step 1002 a first semiconductor material layer 29 , an active layer 25 , a second semiconductor layer 27 and a second mirror 28 are sequentially formed on the buffer layer 22 .
  • a first semiconductor material layer 29 , an active layer 25 , a second semiconductor layer 27 and a second mirror 28 are sequentially formed on the buffer layer 22 by an epitaxial process.
  • the first semiconductor material layer 29 is an N-type semiconductor material layer.
  • the material of the first semiconductor material layer 29 is a III-V group compound, such as GaN, or AlN, AlGaN, InGaN or AlInGaN.
  • the doping element of the first semiconductor material layer 29 includes at least one of Si ions, Ge ions, Sn ions, Se ions and Te ions.
  • the doping elements of the first semiconductor material layer 29 include Si ions, or include Si ions and Ge ions, but not limited thereto.
  • the second surface 216 of the first semiconductor material layer 29 facing the buffer layer 22 may be uneven, which may cause the second mirror 28 and the first mirror 23
  • the phenomenon of poor uniformity of the thickness of the epitaxial layer between them leads to the poor uniformity of light emission of the resonant cavity light-emitting diode.
  • step 1003 the supporting substrate 211 is pasted on the second reflecting mirror 28 to obtain the intermediate transition structure 212 .
  • the support substrate 211 can be pasted on the second reflector 28 by using the adhesive layer 210 to obtain the intermediate transition structure 212 .
  • the adhesive layer 210 and the support substrate 211 may be insulating materials.
  • the material of the support substrate 211 may be silicon.
  • the material of the substrate 21 can also be silicon carbide, gallium nitride or sapphire.
  • step 1004 the intermediate transition structure 212 is turned over, and the substrate 21 , the nucleation layer 219 and the buffer layer 22 are peeled off to expose the third surface 218 of the first semiconductor material layer 29 .
  • the intermediate transition structure 212 is turned over, and the substrate 21 , the nucleation layer 219 and the buffer layer 22 are peeled off to expose the third surface 218 of the first semiconductor material layer 29 so as to facilitate the Flatten.
  • step 1005 the third surface 218 is planarized to obtain the first semiconductor layer 24 , and the third surface 218 becomes the first contact surface 217 after being planarized.
  • a dry etching process, a wet etching process or a mechanical grinding process may be used to planarize the third surface 218 to obtain the first semiconductor layer 24 .
  • the third surface 218 is a flat first contact surface 217 after being planarized.
  • step 1006 the first mirror 23 is formed on the first semiconductor layer 24 .
  • the first mirror 23 is formed on the first semiconductor layer 24 by an epitaxial process.
  • the first contact surface 217 of the first semiconductor layer 24 in contact with the first mirror 23 is flat, and the first The thickness uniformity of the semiconductor layer 24 is improved, thereby improving the thickness uniformity of the epitaxial layer between the second reflecting mirror 28 and the first reflecting mirror 23, thereby improving the uniformity of light emission of the resonant cavity light-emitting diode.
  • the cavity length of the resonant cavity is uniform, this scheme only allows light of a specific wavelength to be emitted. Compared with the scheme of improving the uniformity of sensitive elements in the active layer that affect the emission wavelength, such as In element, in the resonator cavity , the process is simple and the cost is low.
  • the resonant cavity light-emitting diode includes: a first electrode 222, a third insulating material layer 220, a first mirror 23, a first semiconductor layer 24, an active layer 25, The second semiconductor layer 27 , the second mirror 28 , the fourth insulating material layer 221 and the second electrode 223 .
  • the second electrode 223 is in contact with the second mirror 28 through the via hole on the fourth insulating material layer 221 .
  • the first reflecting mirror 23 , the first semiconductor layer 24 , the active layer 25 , the second semiconductor layer 27 , and the second reflecting mirror 28 stacked in sequence may use the resonant cavity light-emitting diodes described in any of the above embodiments. Preparation method preparation.

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Abstract

一种谐振腔发光二极管的制备方法。该谐振腔发光二极管包括依次层叠的第一反射镜(23)、第一半导体层(24)、有源层(25)、第二半导体层(27)与第二反射镜(28),第一半导体层(24)的导电类型与第二半导体层(27)的导电类型相反;所述制备方法包括:第一半导体层(24)与第一反射镜(23)的第一接触面(217),和/或第二半导体层(27)与第二反射镜(28)的第二接触面(214)经平坦化。由于第一半导体层(24)与第一反射镜(23)的第一接触面(217),和/或第二半导体层(27)与第二反射镜(28)的第二接触面(214)经平坦化,因此,可以改善谐振腔发光二极管的发光均一性。

Description

谐振腔发光二极管的制备方法 技术领域
本发明涉及半导体技术领域,尤其涉及一种谐振腔发光二极管的制备方法。
背景技术
III族氮化物是继Si、GaAs等第一、第二代半导体材料之后的第三代新型半导体材料,其中GaN作为宽禁带半导体材料有许多优点,诸如饱和漂移速度高、击穿电压大、载流子输运性能优异以及能够形成AlGaN、InGaN三元合金和AlInGaN四元合金等,容易制作GaN基的PN结。鉴于此,近几年来GaN基材料和半导体器件得到了广泛和深入的研究,MOCVD(Metal-organicChemicalVaporDeposition,金属有机物化学气相沉积)技术生长GaN基材料日趋成熟;在半导体器件研究方面,GaN基LED、LDs等光电子器件以及GaN基HEMT等微电子器件方面的研究都取得了显著的成绩和长足的发展。
然而,相关技术中,基于谐振腔的光电子器件的不同位置的发光波长不同,即发光均一性差。
有鉴于此,实有必要提供一种新的谐振腔发光二极管的制备方法,以解决上述技术问题。
发明内容
本发明的发明目的是提供一种谐振腔发光二极管的制备方法,可以改善谐振腔发光二极管发光均一性。
为实现上述目的,本发明的第一方面提供一种谐振腔发光二极管的制备方法,所述谐振腔发光二极管包括依次层叠的第一反射镜、第一半导体层、有源层、第二半导体层与第二反射镜,所述第一半导体层的导电类型与所述第二半导体层的导电类型相反;所述制备方法包括:所述第一半导体层与所述第一反射镜的第一接触面,和/或所述第二半导体层与所述第二反射镜的第二接触面经平坦化。
可选地,所述谐振腔发光二极管的制备方法,包括:
在衬底上依次形成所述第一反射镜、所述第一半导体层、所述有源层与第二半导体材料 层;
对所述第二半导体材料层远离所述衬底的第一表面进行平坦化,得到所述第二半导体层,所述第一表面经平坦化后为所述第二接触面。
可选地,所述谐振腔发光二极管的制备方法,包括:
在衬底上形成第一反射材料层,所述第一反射材料层包括层叠设置的第一绝缘材料层与第二绝缘材料层;
对所述第一反射材料层远离所述衬底的第二表面进行平坦化,得到所述第一反射镜,所述第二表面经平坦化后为所述第一接触面;
在所述第一反射镜上依次形成所述第一半导体层、所述有源层、第二半导体层与第二反射镜。
可选地,所述第一反射材料层包括多层交替设置的所述第一绝缘材料层与所述第二绝缘材料层;
所述在衬底上形成第一反射材料层之前,还包括:
在所述衬底上依次形成成核层与缓冲层。
可选地,所述在衬底上依次形成所述第一反射镜、所述第一半导体层、所述有源层与第二半导体材料层之前,还包括:
在所述衬底上依次形成成核层与缓冲层。
可选地,所述对所述第二半导体材料层远离所述衬底的第一表面进行平坦化,得到所述第二半导体层之后,还包括:
在所述第二半导体层上形成所述第二反射镜。
可选地,所述的谐振腔发光二极管的制备方法,包括:
在衬底上依次形成第一半导体材料层、有源层、所述第二半导体层与所述第二反射镜;
在所述第二反射镜上粘贴所述支撑基板,得到所述中间过渡结构;
翻转所述中间过渡结构,并剥离所述衬底,以暴露所述第一半导体材料层的第三表面;
对所述第三表面进行平坦化,得到所述第一半导体层,所述第三表面经平坦化后为所述第一接触面。
可选地,所述在衬底上依次形成第一半导体材料层、有源层、所述第二半导体层与所述第二反射镜之前,还包括:
在所述衬底上依次形成成核层与缓冲层;
所述剥离所述衬底,包括:
剥离所述衬底、成核层与所述缓冲层,以暴露所述第三表面。
可选地,所述对所述第三表面进行平坦化,得到所述第一半导体层之后,还包括:
在所述第一半导体层上形成所述第一反射镜。
可选地,所述第一半导体层为N型半导体层;所述第二半导体层为P型半导体层;所述有源层包括多量子阱结构。
可选地,所述多量子阱结构为GaN与AlGaN交替排布的周期性结构,或者为GaN与AlInGaN交替排布的周期性结构。
可选地,所述第一半导体层的材料包括Ⅲ-Ⅴ族化合物,所述第二半导体层的材料包括Ⅲ-Ⅴ族化合物。
可选地,所述谐振腔发光二极管还包括第三绝缘材料层、第四绝缘材料层、第一电极以及第二电极,所述第三绝缘材料层位于所述第一反射镜远离所述第二反射镜的一侧,所述第一电极位于所述第三绝缘材料层远离所述第一反射镜的一侧;
所述第四绝缘材料层位于所述第二反射镜远离所述第一反射镜的一侧,所述第二电极位于所述第四绝缘材料层远离所述第二反射镜的一侧,所述第二电极通过所述第四绝缘材料层上的过孔与所述第二反射镜接触。
可选地,所述方法还包括:
当所述第一接触面经平坦化时,在对所述第一接触面进行平坦化的过程中,检测所述第一接触面的表面粗糙度是否位于指定范围内,若是,则停止对所述第一接触面进行平坦化,若否,则继续对所述第一接触面进行平坦化直至所述表面粗糙度位于所述指定范围内;
当所述第二接触面经平坦化时,在对所述第二接触面进行平坦化的过程中,检测所述第二接触面的表面粗糙度是否位于指定范围内,若是,则停止对所述第二接触面进行平坦化,若否,则继续对所述第二接触面进行平坦化直至所述表面粗糙度位于所述指定范围内。
与现有技术相比,本发明的有益效果在于:由于第一半导体层与第一反射镜的第一接触面,和/或第二半导体层与第二反射镜的第二接触面经平坦化,因此,可以改善第一反射镜与第二反射镜之间的间距的均一性,即改善第一反射镜与第二反射镜构成的谐振腔的腔长的均一性,进而,可以改善谐振腔发光二极管的发光均一性。此外,本方案由于谐振腔的腔长均一,因而只允许特定波长的光出射,相对于改善有源层中影响发光波长的敏感元素,例如In元素,在谐振腔中各处的均匀性的方案,工艺简单、成本低。
附图说明
图1是本发明第一实施例的谐振腔发光二极管的制备方法的流程图;
图2至图3是图1中的流程对应的中间结构示意图;
图4是本发明第一实施例的谐振腔发光二极管的截面结构示意图;
图5是本发明第二实施例的谐振腔发光二极管的制备方法的流程图;
图6至图8是图5中的流程对应的中间结构示意图;
图9是本发明第二实施例的谐振腔发光二极管的截面结构示意图;
图10是本发明第三实施例的谐振腔发光二极管的制备方法的流程图;
图11至图15是图10中的流程对应的中间结构示意图;
图16是本发明第三实施例的谐振腔发光二极管的截面结构示意图;
图17是本发明第四实施例的谐振腔发光二极管的截面结构示意图。
为方便理解本发明,以下列出本发明中出现的所有附图标记:
衬底21                                    缓冲层22
第一反射镜23                              第一半导体层24
有源层25                                  第二半导体材料层26
第二半导体层27                            第二反射镜28
第一半导体材料层29                        粘附层210
支撑基板211                               中间过渡结构212
第一表面213                               第二接触面214
第一反射材料层215                         第二表面216
第一绝缘材料层2151                        第一接触面217
第二绝缘材料层2152                        第三表面218
成核层219                                 第三绝缘材料层220
第四绝缘材料层221                         第一电极222
第二电极223
具体实施方式
为使本发明的上述目的、特征和优点能够更为明显易懂,下面结合附图对本发明的具体实施例做详细的说明。
图1是本发明第一实施例的谐振腔发光二极管的制备方法的流程图。图2至图3是图1中的流程对应的中间结构示意图。图4是本发明第一实施例的谐振腔发光二极管的截面结构示意图。如图1所示,该谐振腔发光二极管的制备方法包括以下步骤101~103:
在步骤S101中,在衬底21上依次形成成核层219、缓冲层22、第一反射镜23、第一半导体层24、有源层25与第二半导体材料层26。
在本步骤中,如图2所示,可以采用外延工艺在衬底21上依次形成成核层219、缓冲层22、第一反射镜23、第一半导体层24、有源层25与第二半导体材料层26。
在本实施例中,衬底21的材料为硅。当然,衬底21的材料也可以是碳化硅(SiC)、氮化镓(GaN)或蓝宝石。
在本实施例中,成核层219的材料可以为III-V族化合物,例如,可以为AlN,也可以为GaN、AlGaN、InGaN或AlInGaN。
在本实施例中,缓冲层22的材料可以为III-V族化合物,例如,可以为GaN,也可以为AlN、AlGaN、InGaN或AlInGaN。
在本实施例中,第一反射镜23为布拉格反射镜,第一反射镜23由高折射率材料与低折射率材料交替排布形成,例如,第一反射镜23包括多层交替设置的SiO 2与TiO 2,但不限于此。
在本实施例中,第一半导体层24为N型半导体层。第一半导体层24的材料为III-V族化合物,例如为GaN,也可为AlN、AlGaN、InGaN或AlInGaN。第一半导体层24的掺杂元素包括Si离子、Ge离子、Sn离子、Se离子与Te离子中的至少一种,例如,第一半导体层24的掺杂元素包括Si离子,或者,包括Si离子与Ge离子,但不限于此。
在本实施例中,有源层25包括多量子阱结构。其中,多量子阱结构可为GaN与AlGaN交替排布的周期性结构,也可为GaN与AlInGaN交替排布的周期性结构,但不限于此。
在本实施例中,第二半导体材料层26为P型导体材料层,第二半导体材料层26的材料为III-V族化合物,例如,可以为GaN,也可以为AlN、AlGaN、InGaN或AlInGaN。第二半导体材料层26掺杂元素包括Mg离子、Zn离子、Ca离子、Sr离子或Ba离子中的至少一种,例如,包括Mg离子,或者包括Zn离子与Ca离子,但不限于此。
需要说明的是,如图2所示,第二半导体材料层26远离衬底21的第一表面213可能存在凸凹不平的现象,如果在其上直接生长第二反射镜28,可能使第二反射镜28朝向第一反射镜23的表面凸凹不平,以及使第二反射镜28与第一反射镜23之间的外延层的厚度均一性差,进而导致谐振腔在不同位置的腔长不同,即谐振腔的腔长的均一性差,从而导致谐振腔发光二极管的发光均一性差。
其中,谐振腔的腔长T与谐振腔发光二极管所发射的光的波长λ之间的关系如下:
λ=2nT/N
其中,N为正整数。
在步骤S102中,对第二半导体材料层26远离衬底21的第一表面213进行平坦化,得到第二半导体层27,第一表面213经平坦化后为第二接触面214。
在本实施例中,如图3所示,可以采用干法刻蚀工艺、湿法刻蚀工艺或机械研磨工艺对第二半导体材料层26远离衬底21的第一表面213进行平坦化,得到第二半导体层27,其中,第一表面213经平坦化后为平坦的第二接触面214。
在本实施例中,在对第一表面213进行平坦化的过程中,可以检测第一表面213的表面粗糙度是否位于指定范围内,若是,则停止对第一表面213进行平坦化,若否,则继续对第一表面213进行平坦化直至第一表面213的表面粗糙度位于指定范围内。
在步骤S103中,在第二半导体层27上形成第二反射镜28。
在本实施例中,如图4所示,采用外延工艺在第二半导体层27上形成第二反射镜28,以与第一反射镜23构成谐振腔。其中,第二反射镜28的结构与第一反射镜23的结构相似,均为布拉格反射镜,第二反射镜28也由高折射率材料与低折射率材料交替排布形成,例如,第二反射镜28包括多层交替设置的高、低折射率的材料构成,如SiO 2与TiO 2交替设置。
在本实施例中,由于对第二半导体材料层26远离衬底21的第一表面213进行了平坦化,因此,第二半导体层27与第二反射镜28接触的第二接触面214是平坦的,第二反射镜28朝向第一反射镜23的表面是平坦的,这样,可以改善谐振腔在不同位置的腔长不同的问题,即改善谐振腔的腔长均一性,而且,改善了第二反射镜28与第一反射镜23之间的外延层的厚度的均一性,从而改善了谐振腔发光二极管的发光均一性。此外,本方案由于谐振腔的腔长均一,因而只允许特定波长的光出射,相对于改善有源层中影响发光波长的敏感元素,例如In元素,在谐振腔中各处的均匀性的方案,工艺简单、成本低。
图5是本发明第二实施例的谐振腔发光二极管的制备方法的流程图。图6至图8是图5中的流程对应的中间结构示意图。图9是本发明第二实施例的谐振腔发光二极管的截面结构示意图。如图5所示,在本实施例中,谐振腔发光二极管的制备方法包括以下步骤501~504:
在步骤501中,在衬底21上依次形成成核层219与缓冲层22。
在本步骤中,如图6所示,采用外延工艺在衬底21上依次形成成核层219与缓冲层22。
在本实施例中,衬底21的材料可以为氮化镓,也可为硅、碳化硅或蓝宝石。
在本实施例中,成核层219的材料可以为GaN,也可以为AlN、AlGaN、InGaN或AlInGaN。
在本实施例中,缓冲层22的材料可以为AlGaN,也可以为GaN、AlN、InGaN或AlInGaN。
在步骤502中,在缓冲层22上形成第一反射材料层215,第一反射材料层215包括层叠设置的第一绝缘材料层2151与第二绝缘材料层2152。
在本步骤中,如图7所示,采用外延工艺在在缓冲层22上形成第一反射材料层215,其中,第一反射材料层215包括多层交替设置的第一绝缘材料层2151与第二绝缘材料层2152。其中,第一绝缘材料层2151的材料可以是TiO 2,第二绝缘材料层2152的材料可以是SiO 2,但不限于此。
需要说明的是,如图7所示,第一反射材料层215远离衬底21的第二表面216可能存在凸凹不平的现象,这样会导致谐振腔在不同位置的腔长不同,即谐振腔的腔长均一性差,而且,如果在其上直接生长第一半导体层24,可能使第一半导体层24朝向第一反射镜23的表面凸凹不平,导致第二反射镜28与第一反射镜23之间的外延层的厚度的均一性差,从而导致谐振腔发光二极管发光均一性差。
在步骤503中,对第一反射材料层215远离衬底21的第二表面216进行平坦化,得到第一反射镜23,第二表面216经平坦化后为第一接触面217。
在本实施例中,在对第二表面216进行平坦化的过程中,可以检测第二表面216的表面粗糙度是否位于指定范围内,若是,则停止对第二表面216进行平坦化,若否,则继续对第二表面216进行平坦化直至第二表面216的表面粗糙度位于指定范围内。
在本步骤中,如图8所示,可以采用干法刻蚀工艺、湿法刻蚀工艺或机械研磨工艺对对第一反射材料层215远离衬底21的第二表面216进行平坦化,得到第一反射镜23。其中,第二表面216经平坦化后为平坦的第一接触面217。
在步骤504中,在第一反射镜23上依次形成第一半导体层24、有源层25、第二半导体层27与第二反射镜28。
在本步骤中,如图9所示,采用外延工艺在第一反射镜23上依次形成第一半导体层24、有源层25、第二半导体层27与第二反射镜28。
在本实施例中,第一半导体层24、有源层25、第二半导体层27与第一实施例中的第一半导体层24、有源层25、第二半导体层27相似,在此不再赘述。
在本实施例中,如图9所示,第二反射镜28的结构与第一反射镜23的结构相似,均为布拉格反射镜,包括多层交替设置的SiO 2与TiO 2
在本实施例中,由于对第一反射材料层215远离衬底21的第二表面216进行了平坦化,因此,第一反射镜23与第一半导体层24接触的第一接触面217是平坦的,第一反射镜23朝向第二反射镜28的表面是平坦的,这样,可以改善谐振腔在不同位置的腔长不同的问题,即可以改善谐振腔的腔长均一性,而且,可以改善第二反射镜28与第一反射镜23之间的外延层的厚度的均一性,从而改善谐振腔发光二极管的发光均一性。此外,本方案由于谐振腔的腔长均一,因而只允许特定波长的光出射,相对于改善有源层中影响发光波长 的敏感元素,例如In元素,在谐振腔中各处的均匀性的方案,工艺简单、成本低。
需要说明的是,第一实施例与第二实施例可以结合使用,使第一反射镜23朝向第二反射镜28的表面是平坦的,同时,第二反射镜28朝向第一反射镜23的表面也是平坦的,这样,可以进一步改善谐振腔的腔长均一性,第二反射镜28与第一反射镜23之间的外延层的厚度的均一性更好,从而可以进一步改善谐振腔发光二极管的发光均一性。
图10是本发明第三实施例的谐振腔发光二极管的制备方法的流程图。图11至图15是图10中的流程对应的中间结构示意图。图16是本发明第三实施例的谐振腔发光二极管的截面结构示意图。在本实施例中,谐振腔发光二极管的制备方法包括以下步骤1001~1006:
在步骤1001中,在衬底21上依次形成成核层219与缓冲层22。
在本步骤中,如图11所示,采用外延工艺在衬底21上依次形成成核层219与缓冲层22。
在本实施例中,衬底21的材料可以为蓝宝石,也可为硅、碳化硅或氮化镓。
在本实施例中,成核层219的材料可以为InGaN,也可以为GaN、AlN、AlGaN或AlInGaN。
在本实施例中,缓冲层22的材料可以为InGaN,也可以为GaN、AlN、AlGaN或AlInGaN。
在步骤1002中,在缓冲层22上依次形成第一半导体材料层29、有源层25、第二半导体层27与第二反射镜28。
在本实施例中,如图12所示,采用外延工艺在缓冲层22上依次形成第一半导体材料层29、有源层25、第二半导体层27与第二反射镜28。
在本实施例中,第一半导体材料层29为N型半导体材料层。第一半导体材料层29的材料为III-V族化合物,例如为GaN,也可为AlN、AlGaN、InGaN或AlInGaN。第一半导体材料层29的掺杂元素包括Si离子、Ge离子、Sn离子、Se离子与Te离子中的至少一种,例如,第一半导体材料层29的掺杂元素包括Si离子,或者,包括Si离子与Ge离子,但不限于此。
在本实施例中,如图12所示,第一半导体材料层29朝向缓冲层22的第二表面216可能存在凸凹不平的现象,这样,可能会导致第二反射镜28与第一反射镜23之间的外延层厚度均一性差的现象,从而导致谐振腔发光二极管发光均一性差。
在步骤1003中,在第二反射镜28上粘贴支撑基板211,得到中间过渡结构212。
在本实施例中,如图13所示,可以采用粘附层210在第二反射镜28上粘贴支撑基板211,得到中间过渡结构212。其中,粘附层210与支撑基板211可以是绝缘材料。支撑基板211的材料可以是硅。当然,衬底21的材料也可以是碳化硅、氮化镓或蓝宝石。
在步骤1004中,翻转中间过渡结构212,并剥离衬底21、成核层219与缓冲层22,以暴露第一半导体材料层29的第三表面218。
在本实施例中,如图14所示,翻转中间过渡结构212,并剥离衬底21、成核层219与缓冲层22,使第一半导体材料层29的第三表面218暴露出来,以便于进行平坦化。
在步骤1005中,对第三表面218进行平坦化,得到第一半导体层24,第三表面218经平坦化后为第一接触面217。
在本实施例中,如图15所示,可以采用干法刻蚀工艺、湿法刻蚀工艺或机械研磨工艺对对第三表面218进行平坦化,得到第一半导体层24。其中,第三表面218经平坦化后为平坦的第一接触面217。
在步骤1006中,在第一半导体层24上形成第一反射镜23。
在本实施例中,如图16所示,采用外延工艺在第一半导体层24上形成第一反射镜23。
在本实施例中,由于对第一半导体材料层29的第三表面218进行了平坦化,因此,第一半导体层24与第一反射镜23接触的第一接触面217是平坦的,第一半导体层24的厚度均一性得到了改善,进而改善了第二反射镜28与第一反射镜23之间的外延层厚度的均一性,从而改善了谐振腔发光二极管发光均一性。此外,本方案由于谐振腔的腔长均一,因而只允许特定波长的光出射,相对于改善有源层中影响发光波长的敏感元素,例如In元素,在谐振腔中各处的均匀性的方案,工艺简单、成本低。
图17是本发明第四实施例的谐振腔发光二极管的截面结构示意图。在本实施例中,如图17所示,谐振腔发光二极管包括:依次层叠的第一电极222、第三绝缘材料层220、第一反射镜23、第一半导体层24、有源层25、第二半导体层27、第二反射镜28、第四绝缘材料层221以及第二电极223。
在本实施例中,如图17所示,第二电极223通过第四绝缘材料层221上的过孔与第二反射镜28接触。
本实施例中依次层叠的第一反射镜23、第一半导体层24、有源层25、第二半导体层27、第二反射镜28可以采用上述任一实施例所述的谐振腔发光二极管的制备方法制备。
虽然本发明披露如上,但本发明并非限定于此。任何本领域技术人员,在不脱离本发明的精神和范围内,均可作各种更动与修改,因此本发明的保护范围应当以权利要求所限定的范围为准。

Claims (14)

  1. 一种谐振腔发光二极管的制备方法,其特征在于,所述谐振腔发光二极管包括依次层叠的第一反射镜(23)、第一半导体层(24)、有源层(25)、第二半导体层(27)与第二反射镜(28),所述第一半导体层(24)的导电类型与所述第二半导体层(27)的导电类型相反;所述制备方法包括:所述第一半导体层(24)与所述第一反射镜(23)的第一接触面(217),和/或所述第二半导体层(27)与所述第二反射镜(28)的第二接触面(214)经平坦化。
  2. 根据权利要求1所述的谐振腔发光二极管的制备方法,其特征在于,包括:
    在衬底(21)上依次形成所述第一反射镜(23)、所述第一半导体层(24)、所述有源层(25)与第二半导体材料层(26);
    对所述第二半导体材料层(26)远离所述衬底(21)的第一表面(213)进行平坦化,得到所述第二半导体层(27),所述第一表面(213)经平坦化后为所述第二接触面(214)。
  3. 根据权利要求2所述的谐振腔发光二极管的制备方法,其特征在于,所述在衬底(21)上依次形成所述第一反射镜(23)、所述第一半导体层(24)、所述有源层(25)与第二半导体材料层(26)之前,还包括:
    在所述衬底(21)上依次形成成核层(219)与缓冲层(22)。
  4. 根据权利要求2所述的谐振腔发光二极管的制备方法,其特征在于,所述对所述第二半导体材料层(26)远离所述衬底(21)的第一表面进行平坦化,得到所述第二半导体层(27)之后,还包括:
    在所述第二半导体层(27)上形成所述第二反射镜(28)。
  5. 根据权利要求1所述的谐振腔发光二极管的制备方法,其特征在于,包括:
    在衬底(21)上形成第一反射材料层(215),所述第一反射材料层(215)包括层叠设置的第一绝缘材料层(2151)与第二绝缘材料层(2152);
    对所述第一反射材料层(215)远离所述衬底(21)的第二表面(216)进行平坦化,得到所述第一反射镜(23),所述第二表面(216)经平坦化后为所述第一接触面(217);
    在所述第一反射镜(23)上依次形成所述第一半导体层(24)、所述有源层(25)、第二半导体层(27)与第二反射镜(28)。
  6. 根据权利要求5所述的谐振腔发光二极管的制备方法,其特征在于,所述第一反射材料层(215)包括多层交替设置的所述第一绝缘材料层(2151)与所述第二绝缘材料层(2152);
    所述在衬底(21)上形成第一反射材料层(215)之前,还包括:
    在所述衬底(21)上依次形成成核层(219)与缓冲层(22)。
  7. 根据权利要求1所述的谐振腔发光二极管的制备方法,其特征在于,包括:
    在衬底(21)上依次形成第一半导体材料层(29)、有源层(25)、所述第二半导体层(27)与所述第二反射镜(28);
    在所述第二反射镜(28)上粘贴所述支撑基板(211),得到所述中间过渡结构(212);
    翻转所述中间过渡结构(212),并剥离所述衬底(21),以暴露所述第一半导体材料层(29)的第三表面(218);
    对所述第三表面(218)进行平坦化,得到所述第一半导体层(24),所述第三表面(218)经平坦化后为所述第一接触面(217)。
  8. 根据权利要求7所述的谐振腔发光二极管的制备方法,其特征在于,所述在衬底(21)上依次形成第一半导体材料层(29)、有源层(25)、所述第二半导体层(27)与所述第二反射镜(28)之前,还包括:
    在所述衬底(21)上依次形成成核层(219)与缓冲层(22);
    所述剥离所述衬底(21),包括:
    剥离所述衬底(21)、成核层(219)与所述缓冲层(22),以暴露所述第三表面(218)。
  9. 根据权利要求7所述的谐振腔发光二极管的制备方法,其特征在于,所述对所述第三表面(218)进行平坦化,得到所述第一半导体层(24)之后,还包括:
    在所述第一半导体层(24)上形成所述第一反射镜(23)。
  10. 根据权利要求1所述的谐振腔发光二极管的制备方法,其特征在于,所述第一半导体层(24)为N型半导体层;所述第二半导体层(27)为P型半导体层;所述有源层(25)包括多量子阱结构。
  11. 根据权利要求10所述的谐振腔发光二极管的制备方法,其特征在于,所述多量子阱结构为GaN与AlGaN交替排布的周期性结构,或者为GaN与AlInGaN交替排布的周期性结构。
  12. 根据权利要求1所述的谐振腔发光二极管的制备方法,其特征在于,所述第一半导体层(24)的材料包括Ⅲ-Ⅴ族化合物,所述第二半导体层(27)的材料包括Ⅲ-Ⅴ族化合物。
  13. 根据权利要求1所述的谐振腔发光二极管的制备方法,其特征在于,所述谐振腔发光二极管还包括第三绝缘材料层(220)、第四绝缘材料层(221)、第一电极(222)以及第二电极(223),所述第三绝缘材料层(220)位于所述第一反射镜(23)远离所述第二反射镜(28)的一侧,所述第一电极(222)位于所述第三绝缘材料层(220)远离所述第一反射镜(23)的一侧;
    所述第四绝缘材料层(221)位于所述第二反射镜(28)远离所述第一反射镜(23)的一侧,所述第二电极(223)位于所述第四绝缘材料层(221)远离所述第二反射镜(28)的一 侧,所述第二电极(223)通过所述第四绝缘材料层(221)上的过孔与所述第二反射镜(28)接触。
  14. 根据权利要求1所述的垂直腔表面发射激光器的制备方法,其特征在于,所述方法还包括:
    当所述第一接触面(217)经平坦化时,在对所述第一接触面(217)进行平坦化的过程中,检测所述第一接触面(217)的表面粗糙度是否位于指定范围内,若是,则停止对所述第一接触面(217)进行平坦化,若否,则继续对所述第一接触面(217)进行平坦化直至所述表面粗糙度位于所述指定范围内;
    当所述第二接触面(214)经平坦化时,在对所述第二接触面(214)进行平坦化的过程中,检测所述第二接触面(214)的表面粗糙度是否位于指定范围内,若是,则停止对所述第二接触面(214)进行平坦化,若否,则继续对所述第二接触面(214)进行平坦化直至所述表面粗糙度位于所述指定范围内。
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Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003017806A (ja) * 2001-06-29 2003-01-17 Toshiba Corp 化合物半導体発光素子とその製造方法および化合物半導体発光装置
CN1820376A (zh) * 2003-08-08 2006-08-16 维切尔公司 高亮度氮化物微发光二极管及其制造方法
US20080179605A1 (en) * 2007-01-29 2008-07-31 Yuji Takase Nitride semiconductor light emitting device and method for fabricating the same
CN101523603A (zh) * 2006-08-06 2009-09-02 光波光电技术公司 具有一个或多个谐振反射器的ⅲ族氮化物发光器件以及用于该器件的反射工程化生长模板和方法
US20130050686A1 (en) * 2011-08-25 2013-02-28 Palo Alto Research Center Incorporated Gap distributed bragg reflectors
CN103227265A (zh) * 2013-04-12 2013-07-31 厦门大学 用于制作氮化镓基发光器件的非平面键合方法
CN103325894A (zh) * 2013-07-04 2013-09-25 厦门大学 一种电注入GaN基谐振腔的制作方法
CN107078190A (zh) * 2014-09-30 2017-08-18 耶鲁大学 用于GaN垂直微腔面发射激光器(VCSEL)的方法

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003017806A (ja) * 2001-06-29 2003-01-17 Toshiba Corp 化合物半導体発光素子とその製造方法および化合物半導体発光装置
CN1820376A (zh) * 2003-08-08 2006-08-16 维切尔公司 高亮度氮化物微发光二极管及其制造方法
CN101523603A (zh) * 2006-08-06 2009-09-02 光波光电技术公司 具有一个或多个谐振反射器的ⅲ族氮化物发光器件以及用于该器件的反射工程化生长模板和方法
US20080179605A1 (en) * 2007-01-29 2008-07-31 Yuji Takase Nitride semiconductor light emitting device and method for fabricating the same
US20130050686A1 (en) * 2011-08-25 2013-02-28 Palo Alto Research Center Incorporated Gap distributed bragg reflectors
CN103227265A (zh) * 2013-04-12 2013-07-31 厦门大学 用于制作氮化镓基发光器件的非平面键合方法
CN103325894A (zh) * 2013-07-04 2013-09-25 厦门大学 一种电注入GaN基谐振腔的制作方法
CN107078190A (zh) * 2014-09-30 2017-08-18 耶鲁大学 用于GaN垂直微腔面发射激光器(VCSEL)的方法

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