WO2022089475A1 - 半导体工艺设备及其法拉第杯 - Google Patents

半导体工艺设备及其法拉第杯 Download PDF

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Publication number
WO2022089475A1
WO2022089475A1 PCT/CN2021/126673 CN2021126673W WO2022089475A1 WO 2022089475 A1 WO2022089475 A1 WO 2022089475A1 CN 2021126673 W CN2021126673 W CN 2021126673W WO 2022089475 A1 WO2022089475 A1 WO 2022089475A1
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WIPO (PCT)
Prior art keywords
electrode layer
negative pulse
cup
pulse bias
cup body
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PCT/CN2021/126673
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English (en)
French (fr)
Inventor
王桂滨
韦刚
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北京北方华创微电子装备有限公司
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Publication of WO2022089475A1 publication Critical patent/WO2022089475A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32412—Plasma immersion ion implantation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/02—Details
    • H01J37/244—Detectors; Associated components or circuits therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32431—Constructional details of the reactor
    • H01J37/32798—Further details of plasma apparatus not provided for in groups H01J37/3244 - H01J37/32788; special provisions for cleaning or maintenance of the apparatus
    • H01J37/32853—Hygiene

Definitions

  • the present application relates to the field of semiconductor processing, and in particular, to a semiconductor processing equipment and its Faraday cup.
  • the plasma immersion ion implantation system is different from the beam-line ion implantation system (beam-line ion implantation system) that uses the accelerating electric field and the ion mass-to-charge ratio to obtain the target energy ions.
  • the plasma immersion ion implantation system is the target that needs to be doped
  • the object is directly immersed in the plasma containing the dopant, and by applying a specific negative bias to the object, the dopant ions in the plasma enter the surface of the object.
  • the cost of wafers continues to increase, and the related process technology has an impact on the stability of doping equipment, doping uniformity, and implanted ion dose control. And metal pollution levels put forward higher requirements.
  • the precision of the doping process is mainly determined by the ion implantation dose measuring device. Therefore, the ion implantation dose measurement device needs to be continuously updated and optimized to obtain higher process control accuracy.
  • the present application proposes a Faraday cup for semiconductor processing equipment, comprising: a cup body and a cup mouth assembly, wherein the cup mouth assembly is disposed at the cup mouth of the cup body, and the cup mouth assembly includes a first electrode layer , and a second electrode layer located on the side of the first electrode layer away from the mouth of the cup, the second electrode layer is electrically insulated from the first electrode layer; the first electrode layer and the second electrode layer A correspondingly arranged first through hole is opened for connecting the inside and the outside of the cup body;
  • the first electrode layer and the second electrode layer can be applied to the first electrode layer when the first negative pulse bias is applied to the first electrode layer and the second negative pulse bias is applied to the second electrode layer.
  • a first electric field with an electric field direction toward the first electrode layer is formed between the layer and the second electrode layer, wherein the first negative pulse bias voltage and the second negative pulse bias voltage have the same phase, and the first negative pulse bias voltage has the same phase.
  • the bias value of the negative pulse bias is greater than the bias value of the second negative pulse bias.
  • a third negative pulse bias voltage can be applied to the cup body, the first negative pulse bias voltage can be applied to the first electrode layer, and the first negative pulse bias voltage can be applied to the second electrode layer.
  • a second electric field with an electric field direction toward the first electrode layer is formed between the cup body and the first electrode layer, wherein the third electric field is The negative pulse bias, the first negative pulse bias and the second negative pulse bias have the same phase, and the bias value of the third negative pulse bias is smaller than the bias value of the second negative pulse bias, so The cup body is electrically insulated from the first electrode layer.
  • each of the insulating layers is provided with a second through hole corresponding to the first through hole.
  • the cup mouth assembly further includes a third electrode layer, the third electrode layer is located on the side of the first electrode layer close to the cup mouth, and the third electrode layer can be on the third electrode layer.
  • the electrode layer is applied with a third negative pulse bias, the first electrode layer is applied with the first negative pulse bias, and the second electrode layer is applied with the second negative pulse bias, at the time of the pulse period.
  • a second electric field with an electric field direction toward the first electrode layer is formed between the third electrode layer and the first electrode layer, wherein the third negative pulse bias, the first negative pulse
  • the bias voltage and the second negative pulse bias voltage have the same phase, and the bias voltage value of the third negative pulse bias voltage is smaller than the bias voltage value of the second negative pulse bias voltage, and the third electrode layer is connected to the second negative pulse bias voltage.
  • An electrode layer is electrically insulating.
  • the side of the second electrode layer away from the first electrode layer is provided with an insulating layer, and the insulating layer is provided with a second through hole corresponding to the first through hole, and the second through hole is connected with the first through hole.
  • the first through hole is used to communicate the inside and the outside of the cup body.
  • the inner wall of the cup body is provided with a protective layer.
  • each of the first through holes is greater than or equal to 0.5 mm and less than or equal to 2 mm.
  • the percentage of the sum of the opening areas of the plurality of first through holes to the opening area of the cup mouth of the cup body is greater than or equal to 0.4% and less than or equal to 2%.
  • the present application also provides a semiconductor process equipment, including a process chamber; the process chamber is provided with a bearing portion for supporting wafers, and the process chamber is also provided with a Faraday cup and a Faraday cup for fixing the Faraday cup on the The fixed installation part on one side of the bearing part, wherein the Faraday cup is the Faraday cup according to any one of claims 1-8.
  • the fixed installation part includes a fixed ring, the fixed ring is arranged around the outer side of the side wall of the bearing part, and one or more accommodating grooves are provided on the upper end surface of the fixed ring, and a plurality of accommodating grooves are provided.
  • the accommodating grooves are distributed at intervals along the circumference of the fixing ring; the number of the Faraday cups is the same as the number of the accommodating grooves, and each of the Faraday cups is arranged in each of the accommodating grooves in a one-to-one correspondence Inside.
  • the semiconductor processing equipment further includes a focus ring, the focus ring is arranged around the outer side of the bearing portion, and covers the outer ring surface of the fixed ring and the upper end surface of the fixed ring; the focus ring A third through hole corresponding to the first through hole is opened.
  • fixing ring and the cup body are both ceramics and have an integral structure.
  • the upper end surface of the cup mouth assembly is flush with the upper end surface of the fixed installation portion.
  • the first electrode layer and the second electrode layer in the cup mouth assembly can be applied with a first negative pulse bias voltage on the first electrode layer, the second electrode layer is applied with a second negative pulse bias voltage, and the first negative pulse bias voltage It has the same phase as the second negative pulse bias.
  • the bias value of the first negative pulse bias is greater than the bias value of the second negative pulse bias, an electric field direction is formed between the first electrode layer and the second electrode layer.
  • the free electrons diffused into the cup in the plasma are entering the first electrode layer and the second electrode layer.
  • FIG. 1 is a schematic diagram of the overall structure of a Faraday cup according to an embodiment of the present application.
  • Figure 2 is a schematic top view of the Faraday cup installed in the fixed installation part
  • Figure 3 is a schematic front view of the Faraday cup installed in the fixed installation part
  • FIG. 4 is a schematic diagram of the overall structure of the semiconductor process equipment.
  • 200-cup mouth assembly 210-first electrode layer, 220-second electrode layer, 230-first through hole, 240-insulating layer; 250-second through-hole; 260-third through-hole;
  • 300-process chamber 310-air source, 311-spray head, 321-coupling coil, 322-electrode RF source, 323-matching device, 330-detection system, 340-conical cylinder, 341-support frame, 350- Adapter, 360-liner, 370-light sensor, 371-signal processing system, 380-vacuum pump system, 390-power supply;
  • FIGS. 1 and 4 schematically show a Faraday cup of a semiconductor processing equipment according to an embodiment of the present application, which includes a cup body 100 and a cup mouth assembly 200 , wherein the above-mentioned cup mouth assembly 200 is disposed on the cup of the cup body 100
  • the cup mouth assembly 200 includes a first electrode layer 210 and a second electrode layer 220 .
  • the second electrode layer 220 is located on the side of the first electrode layer 210 away from the mouth of the cup.
  • the first electrode layer 210 is disposed above the mouth of the cup body 100
  • the second electrode layer 220 is disposed on the first electrode layer 210
  • the second electrode layer 220 is electrically insulated from the first electrode layer 210
  • the first electrode layer 210 and the second electrode layer 220 are provided with corresponding first through holes 230 for connecting the inside of the cup body 100 with the outside so that the external ions can enter the cup body 100 through the first through hole 230 .
  • the first electrode layer 210 and the second electrode layer 220 are applied with the first negative pulse bias voltage and the second electrode layer 220 is applied with the second negative pulse bias voltage
  • the first electrode layer 210 and the second electrode layer 220 A first electric field with the electric field direction toward the first electrode layer 210 is formed between the two electrode layers 220 , wherein the first negative pulse bias voltage and the second negative pulse bias voltage have the same phase, and the first negative pulse bias voltage has the same phase.
  • the bias value is greater than the bias value of the second negative pulse bias.
  • the second negative pulse bias is -U0
  • the first negative pulse bias is -U0-70V.
  • the first electrode layer 210 and the second electrode layer 220 may be electrically connected by a power supply part 390, the power supply part 390 can apply a first negative pulse bias voltage to the first electrode layer 210, and The second electrode layer 220 applies a second negative pulse bias.
  • a certain distance may be set between the first electrode layer 210 and the second electrode layer 220, and between the first electrode layer 210 and the cup body 100, so that the three are insulated from each other.
  • the material of the cup body 100 is nickel, for example.
  • the Faraday cup is an important device for measuring the ion doping accuracy in the plasma immersion ion implantation system.
  • positive ions enter the Faraday cup and are converted into current signals, which are obtained by the calculation of the electronic system and enter the Faraday.
  • some free electrons from the plasma will enter the Faraday cup and cause inaccurate measurement.
  • the above-mentioned second negative pulse bias applied to the second electrode layer 220 can introduce positive ions into the cup body 100 , and the positive ions enter the cup body 100 to form a current signal, so that the measured Ion doping amount. Since the first electrode layer 210 and the second electrode layer 220 are respectively applied by the power supply unit 390 with bias voltage values of the same phase but different magnitudes, an electric field will be formed between the first electrode layer 210 and the second electrode layer 220 .
  • the bias value of the first negative pulse bias applied to the first electrode layer 210 is greater than the bias value of the second negative pulse bias applied to the second electrode layer 220, so the first electrode layer 210 and the second electrode
  • the direction of the electric field formed between the layers 220 is toward the first electrode layer 210, that is, the downward direction in FIG. 1.
  • the moving direction of the electrons in the electric field is opposite to the direction of the electric field, so the freedom of diffusion in the plasma is
  • electrons enter into the first electric field between the first electrode layer 210 and the second electrode layer 220 they will be subjected to a repulsive force, so that the free electrons are directed away from the inside of the cup body 100 (ie, the upward direction in FIG.
  • the free electrons can be prevented from entering the cup body 100 and the influence of the free electrons on the ion measurement accuracy can be reduced.
  • the measurement accuracy of the Faraday cup is improved, the accuracy of the ion doping will also be improved accordingly.
  • the direction of the first electric field is always toward the first electrode layer 210 (ie, the downward direction in FIG. 1 ), so it can always be Repulsion to free electrons is maintained.
  • a third negative pulse bias is applied to the cup body 100
  • a first negative pulse bias is applied to the first electrode layer 210
  • a first negative pulse bias is applied to the second electrode layer 220 .
  • a second electric field direction is formed between the cup body 100 and the first electrode layer 210 toward the first electrode layer 210 (ie, the upward direction in FIG. 1 ).
  • the third negative pulse bias, the first negative pulse bias and the second negative pulse bias all have the same phase, and the bias value of the third negative pulse bias is smaller than the bias of the second negative pulse bias
  • the cup body 100 is electrically insulated from the first electrode layer 210 . Specifically, a certain distance may be set between the cup body 100 and the first electrode layer 210 to achieve electrical insulation between the two.
  • the power supply part 390 may be used to apply a third negative pulse bias voltage to the cup body 100 .
  • the cup body 100 When the cup body 100 is applied with the third negative pulse bias, the first electrode layer 210 is applied with the first negative pulse bias, and the second electrode layer 220 is applied with the second negative pulse bias, in the pulse-off phase of the pulse cycle, A second electric field is formed between the cup body 100 and the first electrode layer 210 , and the direction of the second electric field is the upward direction in FIG. 1 , so in the pulse-off phase of the pulse cycle, some low-energy positive ions generated by the plasma It will be repelled by the second electric field and cannot enter the cup body 100 , thereby further ensuring the measurement accuracy of the Faraday cup.
  • the bias value between the first electrode layer 210 and the second electrode layer 220 is -70V
  • the direction of the first electric field between the first electrode layer 210 and the second electrode layer 220 is the downward direction in FIG. 1
  • the bias voltage between the cup body 100 and the first electrode layer 210 is +90V
  • the direction of the second electric field between the cup body 100 and the first electrode layer 210 is the direction in FIG. 1 . up direction. Therefore, in the pulse-off phase of the pulse period, the above-mentioned second electric field can repel part of the low-energy positive ions generated by the plasma.
  • the purpose of applying the third negative pulse bias on the cup body 100 is to form a third electric field whose direction is toward the first electrode layer 210.
  • the cup mouth assembly may further include a third electric field.
  • the third electrode layer is located on the side of the first electrode layer 210 close to the mouth of the cup, a third negative pulse bias is applied to the third electrode layer, and a first negative pulse bias is applied to the first electrode layer 210
  • a second electric field direction is formed between the third electrode layer and the first electrode layer 210 toward the first electrode layer 210.
  • the electric field that is, applying the above-mentioned third negative pulse bias voltage to the third electrode layer can also achieve the same purpose as the above-mentioned application of the third negative pulse bias voltage on the cup body 100 .
  • the solution in the above-mentioned embodiment is to make the first electrode layer 210, the second electrode layer 220 and the cup body 100 (or the third electrode layer) have mutual On this basis, in order to further isolate the three completely, in some optional embodiments, as shown in FIG. 1, between the first electrode layer 210 and the cup body 100, the first electrode layer 210 and An insulating layer 240 is provided between the second electrode layers 220 and on the side of the second electrode layer 220 away from the first electrode layer 210 .
  • a through hole 230 corresponds to a second through hole 250 provided.
  • the first electrode layer 210 , the second electrode layer 220 and the cup body 100 can be completely isolated, so as to avoid mutual influence of the above three after being applied with negative pulse bias.
  • the material of the insulating layer 240 can be ceramics.
  • the inner wall of the cup body 100 is provided with a protective layer 110 , and the purpose of providing the protective layer 110 is to prevent the positive ions entering the cup body 100 from bombarding the inner wall of the cup body 100 directly While destroying the cup body 100 , the protective layer 110 can prevent positive ions from bombarding the inner wall of the cup body 100 to generate secondary electrons by sputtering, so as to prevent the generated secondary electrons from affecting the accuracy of the measurement.
  • the material of the protective layer 110 can be made of graphite, silicon and silicon carbide and other materials.
  • the first through holes 230 corresponding to the first electrode layer 210 and the second electrode layer 220 The number of the first through-holes 230 is multiple, and the multiple first through holes 230 are distributed at various places on the plane where the first electrode layer 210 and the second electrode layer 220 are located.
  • first through holes 230 can be uniformly distributed in the plane where the first electrode layer 210 and the second electrode layer 220 are located, and the distance between two adjacent first through holes 230 should be identical.
  • the diameters of the plurality of first through holes 230 are greater than or equal to 0.5 mm and less than or equal to 2 mm.
  • the percentage of the sum of the opening areas of the plurality of first through holes 230 to the opening area of the cup mouth of the cup body 100 is greater than or equal to 0.4% and less than or equal to 2%.
  • the sum of the opening areas of the plurality of first through holes 230 may be 1 square centimeter to 5 square centimeters to meet the measurement accuracy requirement.
  • the present application also provides a semiconductor process equipment, as shown in FIGS. 2 , 3 and 4 , comprising a process chamber 300 , the above-mentioned Faraday cup is arranged in the process chamber 300 , and a bearing portion is also arranged in the process chamber 300 500 , the carrying part 500 is used for carrying wafers, and a fixed installation part is further provided in the process chamber 300 , and the fixed installation part is used for fixing the Faraday cup on one side of the side wall of the carrying part 500 .
  • a semiconductor process equipment as shown in FIGS. 2 , 3 and 4 , comprising a process chamber 300 , the above-mentioned Faraday cup is arranged in the process chamber 300 , and a bearing portion is also arranged in the process chamber 300 500 , the carrying part 500 is used for carrying wafers, and a fixed installation part is further provided in the process chamber 300 , and the fixed installation part is used for fixing the Faraday cup on one side of the side wall of the carrying part 500 .
  • the above-mentioned bearing portion 500 is an electrostatic chuck, which can fix the wafer by electrostatic adsorption.
  • the above-mentioned fixed installation part includes a fixed ring 400, the fixed ring 400 is disposed around the outer side of the side wall of the bearing part 500, and a plurality of accommodating grooves 410 are provided on the upper end surface of the fixed ring 400, The plurality of accommodating grooves 410 are distributed at intervals along the circumferential direction of the fixing ring 400 .
  • the number of the above-mentioned Faraday cups is the same as that of the accommodating grooves 410 , and each Faraday cup is disposed in each accommodating groove 410 in a one-to-one correspondence.
  • the main processing object is a wafer, and the shape of the wafer is circular.
  • a circular fixing ring 400 is adopted through the above-mentioned fixing and mounting part, and a plurality of accommodating grooves 410 are arranged along the fixing ring.
  • the circumferential spacing distribution of 400 can reduce the distance between each accommodating groove 410 and the wafer on the carrier part 500, that is, reduce the distance between each Faraday cup and the wafer on the carrier part 500, so that the measurement results can be improved. more accurate.
  • the fixing ring 400 can also be rectangular or any other shape, and is arranged around the bearing portion 500 .
  • the shape and size of the accommodating groove 410 are adapted to the outer shape of the Faraday cup, so as to prevent the Faraday cup from shaking in the accommodating groove 410 .
  • the number of the above-mentioned accommodating grooves 410 may also be one, which is, for example, an annular shape (eg, a circular ring), and is circumferentially arranged along the circumference of the fixing ring 400 .
  • the outer shape of the Faraday cup is It is also annular (eg, a circular ring), which enables the Faraday cup to be placed close to the bearing portion 500, and also enables the Faraday cup to be located everywhere in the circumferential direction of the bearing portion 500, thereby improving the accuracy of measurement.
  • a plurality of baffles 420 are provided in the fixing ring 400 , and the plurality of baffles 420 are used to separate the annular grooves to form a plurality of accommodating grooves 410 .
  • the processing difficulty of the Faraday cup is reduced, and the durability of the Faraday cup is better.
  • the baffle 420 and the fixing ring 400 are integrally formed.
  • the separation manner of the plurality of separators 420 is set such that the size and shape of the plurality of separated accommodating grooves 410 are the same, and are evenly distributed in the circumferential direction of the fixing ring 400 .
  • a plurality of partitions 420 may divide the annular groove into a plurality of arc-shaped accommodating grooves 410 of the same size.
  • the above-mentioned semiconductor processing equipment further includes a focus ring 430 , the focus ring 430 is arranged around the outer side of the fixing ring 400 and covers the outer ring surface of the fixing ring 400 and the fixing ring 400 .
  • the upper end face of the ring 400, and the focusing ring 430 is provided with a third through hole 260 corresponding to the above-mentioned first through hole 230, so as to connect the inside of the cup body 100 with the outside, so that the external ions can pass through the first through hole 260 in sequence.
  • the three through holes 260 and the first through holes 230 enter into the cup body 100 .
  • the Faraday cup can be set in the accommodating groove 410 first, and then the focusing ring 430 can be set to cover the upper end surface of the Faraday cup.
  • the focusing ring 430 can protect the Faraday cup and the fixing ring 400 to prevent ions from bombarding the surfaces of the Faraday cup and the fixing ring 400 directly.
  • the focusing ring 430 can be made of silicon, for example.
  • the above-mentioned fixing ring 400 and the Faraday cup are both ceramics, and have an integral structure. The step of fitting the cup into the retaining ring 400 .
  • the upper end surface of the cup mouth assembly 200 on the side away from the cup body 100 is flush with the upper end surface of the fixed installation portion (eg, the fixing ring 400 ), which can make the Faraday cup Set-up locations and structures are closer to the wafer, resulting in more accurate measurements.
  • the fixed installation portion eg, the fixing ring 400
  • the above-mentioned semiconductor processing equipment is further provided with a gas source part 310 , a coupling part and a detection system 330 ; wherein, the gas source part 310 is connected to the process chamber.
  • the chamber 300 is connected to the process chamber 300, which is used to input process gas into the process chamber 300.
  • the above-mentioned gas source part 310 is communicated with the process chamber 300 through the shower head 311, and the gas source part 310 injects the process gas into the process chamber through the shower head 311.
  • a plurality of shower heads 311 can be provided, so that the injected process gas is evenly distributed in the process chamber 300 .
  • the coupling part is used to start the process gas in the process chamber 300 to form plasma.
  • the above-mentioned coupling part includes a coupling coil 321, an electrode radio frequency source 322 and a matching device 323, wherein the coupling part
  • the coil 321 is connected with the process chamber 300.
  • the process chamber 300 is also connected with a conical cylinder 340, which is located on the upper side of the process chamber 300 and communicates with the process chamber 300 to A larger chamber is formed, the cone 340 is hollow inside, the nozzle 311 of the gas source 310 communicates with the cone 340 , and the process gas ejected from the nozzle 311 enters the process chamber 300 through the cone 340 .
  • the above-mentioned coupling coil 321 can also be arranged around the outer side of the conical cylinder 340 along the circumferential direction of the conical cylinder 340, and in some optional embodiments, the coupling coil 321 is formed around the shape similar to the conical cylinder so that the coupling coil 321 and the conical cylinder can be arranged at equal intervals.
  • the electrode radio frequency source 322 is electrically connected to the coupling coil 321 through the matching device 323, and the electrode radio frequency source 322 couples the power to the process gas in the process chamber 300 through the coupling coil 321 by means of inductive coupling, so that the process gas is ignited to generate plasma body.
  • the power supply unit 390 is used to apply a negative pulse bias to the wafer fixed on the carrier unit 500 , and the processing system 600 calculates the ion implantation dose by measuring the equivalent current formed by positive ions entering the Faraday cup. It should be noted that the above-mentioned power supply unit 390 is not necessarily a single power supply, but may also be a collection of multiple power supplies, which are used to supply power to various electrical components in the semiconductor process equipment.
  • an adapter 350 is provided between the conical barrel 340 and the process chamber 300 .
  • a support frame 341 is also provided on the adapter 350 , the support frame 341 is used to support and install the spray head 311 , and the adapter 350 is used to support the installation of the cone 340 and the support frame 341 .
  • an opening is provided at the top of the process chamber 300 for communicating with the conical cylinder 340
  • the adapter 350 is provided at the above-mentioned opening of the process chamber 300
  • the conical cylinder 340 is provided on the adapter 350 .
  • the adapter 350 can also electrically connect the coupling coil 321 to the process chamber 300 , and the adapter 350 should be made of conductive material and also have a certain strength to support the mounting cone 340 requirements.
  • the above-mentioned support frame 341 can also be omitted.
  • a plurality of support frames 341 may be provided, and the plurality of support frames 341 are arranged at intervals along the circumference of the conical cylinder 340 to support the spray head 311 evenly. It should be noted that, the support frame 341 and the conical cylinder 340 may jointly support the spray head 311 to prevent the spray head 311 from being completely pressed on the conical cylinder 340 .
  • the inner wall of the process chamber 300 is provided with a lining plate 360 , and the material of the lining plate 360 can be silicon carbide, graphite or quartz, etc.
  • the lining plate 360 can protect the inner wall of the process chamber 300 effect. It is worth noting that the backing plate 360 can also cover the inner surface of the adapter 350 exposed in the process chamber 300 , so that the backing plate 360 can also protect the adapter 350 together.
  • a photosensitive sensor 370 is further disposed in the process chamber 300 , and the photosensitive sensor 370 is connected with a signal processing system 371 .
  • the light sensor 370 can detect the light intensity signal of the plasma in the process chamber 300, and the signal processing system 371 is used to process and convert the light intensity signal into an electrical signal, and send it to the processing system 600; the processing system 600 can According to the light intensity signal, it is determined whether the plasma ignition in the process chamber 300 is successful.
  • the process chamber 300 is further connected with a vacuum pump system 380, and the vacuum pump system 380 is used to change the gas environment, such as air pressure, in the process chamber to meet the gas environment required for semiconductor processing.

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Abstract

提供了一种半导体工艺设备及其法拉第杯，法拉第杯包括杯体（100）和杯口组件（200），杯口组件（200）设置在杯体（100）的杯口上，杯口组件（200）包括第一电极层（210），和位于第一电极层（210）的远离杯口一侧的第二电极层（220）。第二电极层（220）与第一电极层（210）电绝缘，第一电极层（210）和第二电极层（220）具有对应设置的第一通孔（230），用于将杯体（100）的内部和外部相连通，在第一电极层（210）施加第一负脉冲偏压，第二电极层（220）被施加第二负脉冲偏压时，在第一电极层（210）和第二电极层（220）之间形成电场方向朝向第一电极层（210）的第一电场，其中第一负脉冲偏压和第二负脉冲偏压具有相同的相位，并且第一负脉冲偏压的负偏压值大于第二负脉冲偏压的负偏压值。法拉第杯能够防止等离子体中扩散的自由电子进入到杯体中，从而使得法拉第杯的测量结果更加精确。

Description

半导体工艺设备及其法拉第杯 技术领域
本申请涉及半导体加工领域，特别涉及一种半导体工艺设备及其法拉第杯。
背景技术
等离子体浸没离子注入系统不同于利用加速电场及离子质荷比特性得到目标能量离子的束线离子注入系统(beam-line ion implantation system)，等离子体浸没离子注入系统是将需要被掺杂的目标物直接浸没在包含掺杂剂的等离子体中，并通过给该目标物施加特定负偏压，使等离子体中的掺杂剂离子进入到目标物表面。然而随着集成电路制程工艺的不断发展，尤其是进入到7nm、5nm甚至3nm制程阶段，晶圆的成本不断提高，相关制程工艺对掺杂设备的稳定性、掺杂均匀性、注入离子剂量控制以及金属污染量级提出了更高的要求。其中，掺杂工艺的精度主要由离子注入剂量测量装置决定。因此，离子注入剂量测量装置需不断更新优化以获得更高的工艺控制精度。
发明内容
本申请提出了一种半导体工艺设备的法拉第杯，包括：杯体和杯口组件，其中，所述杯口组件设置在所述杯体的杯口处，所述杯口组件包括第一电极层，和位于所述第一电极层的远离所述杯口一侧的第二电极层，所述第二电极层与所述第一电极层电绝缘；所述第一电极层和第二电极层开设有对应设置的第一通孔，用于将所述杯体的内部和外部相连通；
所述第一电极层和第二电极层能够在所述第一电极层被施加第一负脉冲偏压，所述第二电极层被施加第二负脉冲偏压时，在所述第一电极层和第 二电极层之间形成电场方向朝向所述第一电极层的第一电场，其中，所述第一负脉冲偏压和第二负脉冲偏压具有相同的相位，且所述第一负脉冲偏压的偏压值大于所述第二负脉冲偏压的偏压值。
进一步的，所述杯体能够在所述杯体被施加第三负脉冲偏压，所述第一电极层被施加所述第一负脉冲偏压，所述第二电极层被施加所述第二负脉冲偏压时，在脉冲周期的脉冲关闭阶段，在所述杯体与所述第一电极层之间形成电场方向朝向所述第一电极层的第二电场，其中，所述第三负脉冲偏压、第一负脉冲偏压和第二负脉冲偏压具有相同相位，且所述第三负脉冲偏压的偏压值小于所述第二负脉冲偏压的偏压值，所述杯体与所述第一电极层电绝缘。
进一步的，所述第一电极层与所述杯体之间、所述第一电极层与所述第二电极层之间、所述第二电极层远离所述第一电极层的一侧均设置有绝缘层，所述绝缘层均开设有与所述第一通孔对应设置的第二通孔。
进一步的，所述杯口组件还包括第三电极层，所述第三电极层位于所述第一电极层的靠近所述杯口的一侧，所述第三电极层能够在所述第三电极层被施加第三负脉冲偏压，所述第一电极层被施加所述第一负脉冲偏压，所述第二电极层被施加所述第二负脉冲偏压时，在脉冲周期的脉冲关闭阶段，在所述第三电极层与所述第一电极层之间形成电场方向朝向所述第一电极层的第二电场，其中，所述第三负脉冲偏压、第一负脉冲偏压和第二负脉冲偏压具有相同相位，且所述第三负脉冲偏压的偏压值小于所述第二负脉冲偏压的偏压值，所述第三电极层与所述第一电极层电绝缘。
进一步的，所述第三电极层与所述杯体之间、所述第三电极层与所述第一电极层之间、所述第一电极层与所述第二电极层之间、所述第二电极层远离所述第一电极层的一侧均设置有绝缘层，所述绝缘层均开设有与所述第一通孔对应设置的第二通孔，所述第二通孔与所述第一通孔用于将所述杯体的 内部和外部相连通。
进一步的，所述杯体的内壁设置有保护层。
进一步的，所述第一通孔具有多个，每个所述第一通孔的直径大于等于0.5mm，且小于等于2mm。
进一步的，多个所述第一通孔的开口面积之和占所述杯体的杯口的开口面积的百分比大于等于0.4％，且小于等于2％。
本申请还提供一种半导体工艺设备，包括工艺腔室；所述工艺腔室内设置有用于承载晶圆的承载部，所述工艺腔室内还设置有法拉第杯和用于将所述法拉第杯固定在所述承载部一侧的固定安装部，其中，所述法拉第杯为如权利要求1-8任意一项所述的法拉第杯。
进一步的，所述固定安装部包括固定环，所述固定环环绕设置于所述承载部的侧壁外侧，且在所述固定环的上端面设置有一个或多个容置槽，且多个所述容置槽沿所述固定环的周向间隔分布；所述法拉第杯的数量与所述容置槽的数量相同，且各个所述法拉第杯一一对应地设置在各个所述容置槽内。
进一步的，所述半导体工艺设备还包括聚焦环，所述聚焦环环绕设置所述承载部的外侧，且覆盖所述固定环的的外环面和所述固定环的上端面；所述聚焦环开设有与所述第一通孔对应设置的第三通孔。
进一步的，所述固定环和所述杯体均为陶瓷，且为一体结构。
进一步的，所述杯口组件的上端面与所述固定安装部的上端面平齐。
与现有技术相比，本申请的有益效果如下：
杯口组件中的第一电极层和第二电极层能够在第一电极层被施加第一负脉冲偏压，第二电极层被施加第二负脉冲偏压，且该第一负脉冲偏压和第二负脉冲偏压具有相同的相位，第一负脉冲偏压的偏压值大于第二负脉冲偏压的偏压值时，在第一电极层和第二电极层之间形成电场方向朝向上述第一电极层的第一电场，由于电子在电场中的运动方向与电场方向是相反的，因 此等离子体中向杯体中扩散的自由电子在进入到第一电极层和第二电极层之间的第一电场中时会受到排斥力，使自由电子朝远离杯体内部的方向运动，从而能够防止等离子体中扩散的自由电子进入到杯体中，进而使得本申请的测量结果更加准确。
附图说明
此处所说明的附图用来提供对本申请的进一步理解，构成本申请的一部分，本申请的示意性实施例及其说明用于解释本申请，并不构成对本申请的不当限定。在附图中：
图1是根据本申请的一个实施例的法拉第杯的整体结构示意图；
图2是法拉第杯安装在固定安装部内的俯视示意图；
图3是法拉第杯安装在固定安装部内的正视示意图；
图4是半导体工艺设备的整体结构示意图。
附图标记说明：
100-杯体，110-保护层；
200-杯口组件，210-第一电极层，220-第二电极层，230-第一通孔，240-绝缘层；250-第二通孔；260-第三通孔；
300-工艺腔室，310-气源部，311-喷头，321-耦合线圈，322-电极射频源，323-匹配器，330-检测系统，340-锥形筒，341-支撑架，350-转接件，360-衬板，370-光敏感应器，371-信号处理系统，380-真空泵系统，390-电源部；
400-固定环，410-容置槽，420-隔板，430-聚焦环；
500-承载部；
600-处理系统。
具体实施方式
为使本申请的目的、技术方案和优点更加清楚，下面将结合本申请具体 实施例及相应的附图对本申请技术方案进行清楚、完整地描述。显然，所描述的实施例仅是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
图1和4示意性地显示了根据本申请的一个实施例的半导体工艺设备的法拉第杯，其包括杯体100和杯口组件200，其中，上述的杯口组件200设置在杯体100的杯口处，杯口组件200包括第一电极层210和第二电极层220。其中，第二电极层220位于第一电极层210的远离杯口一侧，具体的，第一电极层210设置在杯体100的杯口上方，第二电极层220设置在第一电极层210的上方，第二电极层220与第一电极层210电绝缘，第一电极层210和第二电极层220开设有对应设置的第一通孔230，用于将杯体100的内部与外部相连通，以使外部的离子能够通过第一通孔230进入到杯体100中。
第一电极层210和第二电极层220能够在第一电极层210被施加第一负脉冲偏压，第二电极层220被施加第二负脉冲偏压时，在第一电极层210和第二电极层220之间形成电场方向朝向第一电极层210的第一电场，其中，上述第一负脉冲偏压和第二负脉冲偏压具有相同的相位，且上述第一负脉冲偏压的偏压值大于上述第二负脉冲偏压的偏压值。例如，第二负脉冲偏压为-U0，第一负脉冲偏压为-U0-70V。
在一些可选的实施例中，可以利用电源部390与第一电极层210和第二电极层220电连接，该电源部390能够对第一电极层210施加第一负脉冲偏压，以及对第二电极层220施加第二负脉冲偏压。
在一些可选的实施例中，第一电极层210与第二电极层220之间，以及第一电极层210与杯体100之间均可设置一定间距，使三者之间相互绝缘。
在一些可选的实施例中，杯体100的材质例如为镍。
法拉第杯是等离子体浸没离子注入系统中用于测量离子掺杂精度的重 要装置，在掺杂过程中，正离子会进入到法拉第杯中被转化成电流信号，通过电子系统的计算得到进入到法拉第杯中的正离子的量，从而得到等离子体浸没系统中的离子掺杂量。在实际测量过程中，部分来自等离子体的自由电子会进入到法拉第杯中造成测量不准。
在本实施例中，上述的第二电极层220被施加的第二负脉冲偏压能够将正离子引入到杯体100中，正离子进入到杯体100中后形成电流信号，从而可测得离子掺杂量。第一电极层210和第二电极层220由于分别被电源部390施加相位相同，但大小不同的偏压值，因此在第一电极层210和第二电极层220之间会形成电场，同时由于第一电极层210被施加的第一负脉冲偏压的偏压值大于第二电极层220上被施加的第二负脉冲偏压的偏压值，因此在第一电极层210和第二电极层220之间形成的电场方向朝向第一电极层210，即，图1中朝下的方向，根据物理规则，电子在电场中的运动方向与电场方向是相反的，因此等离子体中扩散的自由电子在进入到第一电极层210和第二电极层220之间的第一电场中时会受到排斥力，使自由电子朝远离杯体100内部的方向(即，图1中朝上的方向)运动，从而能够防止自由电子进入到杯体100中，减少自由电子对离子测量精度的影响。当法拉第杯的测量精度提高后，相应的，离子掺杂的精度也会提升。
另外，无论是在脉冲周期的脉冲开启阶段，还是脉冲关闭阶段(U0＝0V)，上述第一电场的方向始终朝向第一电极层210(即，图1中朝下的方向)，因此可以始终保持对自由电子的排斥作用。
在一些可选的实施例中，如图1所示，在杯体100被施加第三负脉冲偏压，第一电极层210被施加第一负脉冲偏压，第二电极层220被施加第二负脉冲偏压时，在脉冲周期的脉冲关闭阶段，在杯体100与第一电极层210之间形成电场方向朝向第一电极层210(即，图1中朝上的方向)的第二电场，其中，第三负脉冲偏压、第一负脉冲偏压和第二负脉冲偏压都具有相同的相 位，且第三负脉冲偏压的偏压值小于第二负脉冲偏压的偏压值，例如，在脉冲周期的脉冲关闭阶段，U0＝0，此时第二负脉冲偏压为U0＝0V；第一负脉冲偏压为-U0-70V＝-70V；第三负脉冲偏压为-U0+20V＝+20V。并且，杯体100与第一电极层210电绝缘。具体的，可以将杯体100与第一电极层210之间设置一定的间距，以实现二者的电绝缘。在一些可选的实施例中，可以利用电源部390向杯体100施加第三负脉冲偏压。
在杯体100被施加第三负脉冲偏压，第一电极层210被施加第一负脉冲偏压，第二电极层220被施加第二负脉冲偏压时，在脉冲周期的脉冲关闭阶段，杯体100与第一电极层210之间形成有第二电场，并且该第二电场的方向为图1中朝上的方向，因此在脉冲周期的脉冲关闭阶段，等离子体产生的部分低能正离子会受到上述第二电场的排斥作用而无法进入到杯体100中，进而进一步保证了法拉第杯的测量精度。
例如，在脉冲周期的脉冲关闭阶段，U0＝0，此时第二负脉冲偏压为U0＝0V；第一负脉冲偏压为-U0-70V＝-70V；第三负脉冲偏压为-U0+20V＝+20V，此时，第一电极层210和第二电极层220之间的偏压值为-70V，第一电极层210和第二电极层220之间的第一电场的方向为图1中朝下的方向；杯体100与第一电极层210之间的偏压值为+90V，杯体100与第一电极层210之间的第二电场的方向为图1中朝上的方向。因此，在脉冲周期的脉冲关闭阶段，上述第二电场可以对等离子体产生的部分低能正离子起到排斥作用。
值得注意的是，上述的杯体100上被施加第三负脉冲偏压的目的是为了形成一个电场方向朝向第一电极层210的第三电场，作为一个替代方案，杯口组件还可以包括第三电极层，该第三电极层位于第一电极层210的靠近杯口的一侧，在第三电极层被施加第三负脉冲偏压，第一电极层210被施加第一负脉冲偏压，第二电极层220被施加第二负脉冲偏压时，在脉冲周期的脉冲关闭阶段，在上述第三电极层与第一电极层210之间形成电场方向朝向第 一电极层210的第二电场，也就是说，将上述第三负脉冲偏压施加在第三电极层上，这同样可以达到与上述的在杯体100上施加第三负脉冲偏压相同的目的。
当第一电极层210、第二电极层220和杯体100(或者第三电极层)都被施加负脉冲偏压时，为了使第一电极层210、第二电极层220和杯体100(或者第三电极层)之间不会相互影响，在上述的实施例中的解决方法是使第一电极层210、第二电极层220和杯体100(或者第三电极层)相互之间具有一定的间距，在此基础上，为了进一步使三者完全隔离，在一些可选的实施例中，如图1所示，第一电极层210与杯体100之间、第一电极层210和第二电极层220之间、第二电极层220远离第一电极层210的一侧均设置有绝缘层240，绝缘层240均开设有与第一电极层210和第二电极层220上的第一通孔230对应设置的第二通孔250。
通过设置绝缘层240能够使第一电极层210、第二电极层220和杯体100完全隔离，避免上述三者被施加负脉冲偏压后相互影响。具体的，绝缘层240的材质可采用陶瓷。
在一些可选的实施例中，如图1所示，杯体100的内壁设置有保护层110，设置保护层110的目的在于防止进入到杯体100中的正离子直接轰击杯体100的内壁而破坏杯体100，同时保护层110能够防止正离子轰击杯体100的内壁后溅射产生二次电子，避免产生的二次电子影响测量的准确性。具体的，保护层110的材质可采用石墨、硅及其碳化硅等材质。
在一些可选的实施例中，为了使法拉第杯的测量精度更高，测量结果更准确，如图1所示，第一电极层210和第二电极层220上对应设置的第一通孔230的数量为多个，多个第一通孔230分布在第一电极层210和第二电极层220所在平面的各处。
值得注意的是，第一通孔230的分布方式可以是在第一电极层210和第 二电极层220所在平面内均匀分布，且相邻的两个第一通孔230之间的间距应是相同的。
在一些可选的实施例中，多个第一通孔230的直径大于等于0.5mm，且小于等于2mm。优选的，多个第一通孔230的开口面积之和占杯体100的杯口的开口面积的百分比大于等于0.4％，且小于等于2％。例如，多个第一通孔230开口面积之和可以为1平方厘米-5平方厘米，以满足测量精度的要求。
本申请还提供了一种半导体工艺设备，如图2、3和4所示，包括工艺腔室300，上述的法拉第杯设置在该工艺腔室300内，工艺腔室300内还设置有承载部500，该承载部500用于承载晶圆，在工艺腔室300内还设置有固定安装部，该固定安装部用于将法拉第杯固定在承载部500的侧壁一侧。
在一些可选的实施例中，为了更好地固定晶圆，上述的承载部500为静电卡盘，其能够采用静电吸附的方式固定晶圆。
在一些可选的实施例中，上述固定安装部包括固定环400，该固定环400环绕设置于承载部500的侧壁外侧，且在固定环400的上端面设置有多个容置槽410，多个容置槽410沿固定环400的周向间隔分布，上述的法拉第杯的数量与容置槽410的数量相同，且各个法拉第杯一一对应地设置在各个容置槽410内。在半导体工业中主要的加工对象是晶圆，晶圆的外形为圆形，在此基础上，通过上述固定安装部通过采用圆形的固定环400，并使多个容置槽410沿固定环400的周向间隔分布，可以减小各个容置槽410与承载部500上的晶圆的间距，即，减小了各个法拉第杯与承载部500上的晶圆的间距，从而可以使测量结果更为准确。值得注意的是，固定环400也可为矩形或其他任意形状，并绕承载部500设置。
另外，在实际应用中，为了使法拉第杯的固定更牢固，容置槽410的形状和大小与法拉第杯的外形相适应，以避免法拉第杯在容置槽410内发生晃动。
在一些可选的实施例中，上述的容置槽410的数量还可为一个，其例如为环形(例如圆环)，且沿固定环400的周向环绕设置，相应的，法拉第杯的外形也为环形(例如圆环)，这样能够使法拉第杯紧靠承载部500设置，同时也能够使法拉第杯处于承载部500在其周向上的各处，从而提高测量的精确度。
在一些可选的实施例中，如图2所示，在固定环400内设置有多个隔板420，多个隔板420用于将环形槽分隔形成多个容置槽410，这样设置能够减小法拉第杯的加工难度，使法拉第杯的耐用性更好。可选的，隔板420与固定环400为一体结构。优选的，多个隔板420的分隔方式被设置为：使分隔而成的多个容置槽410的大小和形状相同，且在固定环400的周向上均匀分布。例如，多个隔板420可以将圆环形槽分隔成多个大小相同的圆弧形的容置槽410。
在一些可选的实施例中，如图3所示，上述的半导体工艺设备还包括聚焦环430，该聚焦环430环绕设置在固定环400的外侧，且覆盖固定环400的外环面和固定环400的上端面，并且聚焦环430开设有与上述第一通孔230对应设置的第三通孔260，用以将杯体100的内部与外部相连通，以使外部的离子能够依次通过第三通孔260和第一通孔230进入到杯体100中。
在安装时，可以先将法拉第杯设置在容置槽410内之后，再设置聚焦环430，以将法拉第杯的上端面包覆。聚焦环430可以起到保护法拉第杯和固定环400的作用，防止离子直接轰击法拉第杯和固定环400的表面，聚焦环430例如可采用硅材质。
在一些可选的实施例中，如图2和3所示，上述的固定环400和法拉第杯均为陶瓷，且为一体结构，一体结构的上述两者的一致性更好，可减少将法拉第杯装配到固定环400内的步骤。
在一些可选的实施例中，如图3所示，杯口组件200远离杯体100一侧 的上端面与固定安装部(例如固定环400)的上端面平齐，这样能够使法拉第杯的设置位置和结构与晶圆更接近，从而使测量结果更为精确。
在一些可选的实施例中，为了完成半导体加工，如图4所示，上述的半导体工艺设备内还设置有气源部310、耦合部和检测系统330；其中，气源部310与工艺腔室300连通，其用于向工艺腔室300内输入工艺气体，可选的，上述的气源部310通过喷头311与工艺腔室300连通，气源部310通过喷头311将工艺气体注入到工艺腔室300内，喷头311的数量可设置多个，使被注入的工艺气体均匀地分布在工艺腔室300内。
耦合部用于使工艺腔室300内的工艺气体启辉，从而形成等离子体，在一个具体的实施例中，上述的耦合部包括耦合线圈321、电极射频源322和匹配器323，其中，耦合线圈321与工艺腔室300连接，例如，如图4所示，工艺腔室300还连接有锥形筒340，该锥形筒340位于工艺腔室300的上侧并与工艺腔室300连通以形成更大的腔室，锥形筒340内部空心，气源部310的喷头311与锥形筒340连通，喷头311喷出的工艺气体通过锥形筒340进入到工艺腔室300内。相应的，上述的耦合线圈321也可以沿锥形筒340的周向环绕设置在锥形筒340的外侧，而且在一些可选的实施例中，耦合线圈321环绕形成与锥形筒的形状相似的锥形环体，以使耦合线圈321与锥形筒能够等间距设置。
电极射频源322通过匹配器323与耦合线圈321电连接，电极射频源322通过耦合线圈321采用感应耦合的方式将功率耦合至工艺腔室300内的工艺气体，从而使工艺气体启辉以产生等离子体。
电源部390用于对固定在承载部500上的晶圆施加负脉冲偏压，处理系统600通过测得正离子进入到法拉第杯内形成的等效电流来计算离子注入剂量。应注意是，上述电源部390并非一定是单一电源，也可以是多个电源的集合，其用于向半导体工艺设备内的各个用电组件供电。
在一些可选的实施例中，在锥形筒340与工艺腔室300之间设置有转接件350。且在转接件350上还设置有支撑架341，该支撑架341用于支撑安装喷头311，该转接件350作用在于支撑安装锥形筒340和支撑架341。具体的，在工艺腔室300的顶部设置有开口，用于与锥形筒340连通，转接件350设置在工艺腔室300的上述开口处，锥形筒340设置在转接件350上。
在一些可选的实施例中，转接件350还能够使耦合线圈321与工艺腔室300电连接，转接件350的材质应采用可导电，同时还具有一定的强度材质以满足支撑安装锥形筒340的要求。当然，在实际应用中，还可以省去上述支撑架341。
在一些可选的实施例中，支撑架341可以设置多个，多个支撑架341沿锥形筒340的周向间隔设置，用以均匀地支撑喷头311。需要说明的是，可以使支撑架341和锥形筒340共同支撑喷头311，以避免喷头311完全压设在锥形筒340上。
在一些可选的实施例中，工艺腔室300的内壁设置有衬板360，该衬板360的材质可以为碳化硅、石墨或者石英等等，衬板360能够起到保护工艺腔室300内壁的作用。值得注意的是，衬板360还可以覆盖转接件350的暴露在工艺腔室300内的内表面，这样衬板360还可以一并将转接件350进行保护。
在一些可选的实施例中，工艺腔室300内还设置有光敏感应器370，光敏感应器370连接有信号处理系统371。光敏感应器370能够检测工艺腔室300内的等离子体的光强度信号，信号处理系统371用于对该光强度信号进行处理转换为电信号，并将其发送至处理系统600；处理系统600能够根据这一光强度信号判断工艺腔室300内的等离子体启辉是否成功。
在一些可选的实施例中，工艺腔室300还连接有真空泵系统380，真空泵系统380用于改变工艺腔室内的气体环境，例如气压，以符合半导体加工 所需的气体环境。
以上所述仅为本申请的实施例而已，并不用于限制本申请。对于本领域技术人员来说，本申请可以有各种更改和变化。凡在本申请的精神和原理之内所作的任何修改、等同替换、改进等，均应包含在本申请的权利要求范围之内。

Claims (13)

  1. 一种半导体工艺设备的法拉第杯，其特征在于，包括：杯体和杯口组件，其中，所述杯口组件设置在所述杯体的杯口处，所述杯口组件包括第一电极层，和位于所述第一电极层的远离所述杯口一侧的第二电极层，所述第二电极层与所述第一电极层电绝缘；所述第一电极层和第二电极层开设有对应设置的第一通孔，用于将所述杯体的内部和外部相连通；
    所述第一电极层和第二电极层能够在所述第一电极层被施加第一负脉冲偏压，所述第二电极层被施加第二负脉冲偏压时，在所述第一电极层和第二电极层之间形成电场方向朝向所述第一电极层的第一电场，其中，所述第一负脉冲偏压和第二负脉冲偏压具有相同的相位，且所述第一负脉冲偏压的偏压值大于所述第二负脉冲偏压的偏压值。
  2. 根据权利要求1所述的法拉第杯，其特征在于，所述杯体能够在所述杯体被施加第三负脉冲偏压，所述第一电极层被施加所述第一负脉冲偏压，所述第二电极层被施加所述第二负脉冲偏压时，在脉冲周期的脉冲关闭阶段，在所述杯体与所述第一电极层之间形成电场方向朝向所述第一电极层的第二电场，其中，所述第三负脉冲偏压、第一负脉冲偏压和第二负脉冲偏压具有相同相位，且所述第三负脉冲偏压的偏压值小于所述第二负脉冲偏压的偏压值，所述杯体与所述第一电极层电绝缘。
  3. 根据权利要求2所述的法拉第杯，其特征在于，所述第一电极层与所述杯体之间、所述第一电极层与所述第二电极层之间、所述第二电极层远离所述第一电极层的一侧均设置有绝缘层，所述绝缘层均开设有与所述第一通孔对应设置的第二通孔。
  4. 根据权利要求1所述的法拉第杯，其特征在于，所述杯口组件还包 括第三电极层，所述第三电极层位于所述第一电极层的靠近所述杯口的一侧，所述第三电极层能够在所述第三电极层被施加第三负脉冲偏压，所述第一电极层被施加所述第一负脉冲偏压，所述第二电极层被施加所述第二负脉冲偏压时，在脉冲周期的脉冲关闭阶段，在所述第三电极层与所述第一电极层之间形成电场方向朝向所述第一电极层的第二电场，其中，所述第三负脉冲偏压、第一负脉冲偏压和第二负脉冲偏压具有相同相位，且所述第三负脉冲偏压的偏压值小于所述第二负脉冲偏压的偏压值，所述第三电极层与所述第一电极层电绝缘。
  5. 根据权利要求4所述的法拉第杯，其特征在于，所述第三电极层与所述杯体之间、所述第三电极层与所述第一电极层之间、所述第一电极层与所述第二电极层之间、所述第二电极层远离所述第一电极层的一侧均设置有绝缘层，所述绝缘层均开设有与所述第一通孔对应设置的第二通孔，所述第二通孔与所述第一通孔用于将所述杯体的内部和外部相连通。
  6. 根据权利要求1-5任意一项所述的法拉第杯，其特征在于，所述杯体的内壁设置有保护层。
  7. 根据权利要求1-5任意一项所述的法拉第杯，其特征在于，所述第一通孔具有多个，每个所述第一通孔的直径大于等于0.5mm，且小于等于2mm。
  8. 根据权利要求7所述的法拉第杯，其特征在于，多个所述第一通孔的开口面积之和占所述杯体的杯口的开口面积的百分比大于等于0.4％，且小于等于2％。
  9. 一种半导体工艺设备，其特征在于，包括：工艺腔室；所述工艺腔 室内设置有用于承载晶圆的承载部，所述工艺腔室内还设置有法拉第杯和用于将所述法拉第杯固定在所述承载部一侧的固定安装部，其中，所述法拉第杯为如权利要求1-8任意一项所述的法拉第杯。
  10. 根据权利要求9所述的半导体工艺设备，其特征在于，所述固定安装部包括固定环，所述固定环环绕设置于所述承载部的侧壁外侧，且在所述固定环的上端面设置有一个或多个容置槽，且多个所述容置槽沿所述固定环的周向间隔分布；所述法拉第杯的数量与所述容置槽的数量相同，且各个所述法拉第杯一一对应地设置在各个所述容置槽内。
  11. 根据权利要求10所述的半导体工艺设备，其特征在于，所述半导体工艺设备还包括聚焦环，所述聚焦环环绕设置所述固定环的外侧，且覆盖所述固定环的外环面和所述固定环的上端面；所述聚焦环开设有与所述第一通孔对应设置的第三通孔。
  12. 根据权利要求10所述的半导体工艺设备，其特征在于，所述固定环和所述杯体均为陶瓷，且为一体结构。
  13. 根据权利要求9-12任意一项所述的半导体工艺设备，其特征在于，所述杯口组件的上端面与所述固定安装部的上端面平齐。
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