WO2022089047A1 - 一种显示控制方法及装置 - Google Patents

一种显示控制方法及装置 Download PDF

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Publication number
WO2022089047A1
WO2022089047A1 PCT/CN2021/117994 CN2021117994W WO2022089047A1 WO 2022089047 A1 WO2022089047 A1 WO 2022089047A1 CN 2021117994 W CN2021117994 W CN 2021117994W WO 2022089047 A1 WO2022089047 A1 WO 2022089047A1
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Prior art keywords
light
stage
emitting
signal line
control signal
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PCT/CN2021/117994
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English (en)
French (fr)
Inventor
袁志东
袁粲
李永谦
刘烺
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京东方科技集团股份有限公司
合肥京东方卓印科技有限公司
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Priority to US17/788,627 priority Critical patent/US11922874B2/en
Publication of WO2022089047A1 publication Critical patent/WO2022089047A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3275—Details of drivers for data electrodes
    • G09G3/3283—Details of drivers for data electrodes in which the data driver supplies a variable data current for setting the current through, or the voltage across, the light-emitting elements
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0421—Structural details of the set of electrodes
    • G09G2300/0426—Layout of electrodes and connections
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0861—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0202—Addressing of scan or signal lines
    • G09G2310/0216—Interleaved control phases for different scan lines in the same sub-field, e.g. initialization, addressing and sustaining in plasma displays that are not simultaneous for all scan lines
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0243—Details of the generation of driving signals
    • G09G2310/0251—Precharge or discharge of pixel before applying new pixel voltage
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/08—Details of timing specific for flat panels, other than clock recovery
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0247—Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes

Definitions

  • the present disclosure relates to the field of display technology, and in particular, to a display control method and device.
  • OLED Organic Light Emitting Diode
  • Embodiments of the present disclosure provide a display control method and device, so as to solve the problem that the light-emitting time is too short, which may cause a screen flicker phenomenon on the display panel and affect the display effect.
  • an embodiment of the present disclosure provides a display control method, applied to a display panel, the display panel includes at least a first display area and a second display area arranged along a first direction, the first display area connected with the first signal line, the second display area is connected with the second signal line, and the method includes:
  • the second sub-pixel located in the second display area is controlled to display an image through the second signal line, wherein the light-emitting stage of the first sub-pixel and the light-emitting stage of the second sub-pixel overlap at most in part.
  • the first signal line includes a first lighting control signal line that provides a first lighting control signal
  • the second signal line includes a second lighting control signal line that provides a second lighting control signal
  • the first light-emitting control signal and the second light-emitting control signal are different, and the first display area and the second display area are connected to the same gate driving signal line.
  • the falling edge of the second lighting control signal is located between the falling edge of the first lighting control signal and the rising edge of the first lighting control signal.
  • each light-emitting period of the first sub-pixel includes a first reset stage, a first compensation stage, a first data writing stage and a first light-emitting stage arranged in sequence
  • the second sub-pixel has a
  • Each light-emitting period includes a second reset stage, a second compensation stage, a second data writing stage and a second light-emitting stage arranged in sequence;
  • the second reset phase and the second compensation phase correspond to the first data writing phase.
  • the overlapping duration of the first data writing phase and the second data writing phase is no greater than one third of the second data writing phase.
  • an embodiment of the present disclosure provides a display control device applied to a display panel, the display panel includes at least a first display area and a second display area arranged along a first direction, the first display area Connected with the first signal line, the second display area is connected with the second signal line, and the device includes:
  • a first control module configured to control the first sub-pixel located in the first display area to display an image through the first signal line
  • a second control module configured to control the second sub-pixel in the second display area to display an image through the second signal line, wherein the light-emitting stage of the first sub-pixel and the light-emitting stage of the second sub-pixel The light-emitting phases are at most partially coincident.
  • the first signal line includes a first lighting control signal line that provides a first lighting control signal
  • the second signal line includes a second lighting control signal line that provides a second lighting control signal
  • the first light-emitting control signal and the second light-emitting control signal are different, and the first display area and the second display area are connected to the same gate driving signal line.
  • the falling edge of the second lighting control signal is located between the falling edge of the first lighting control signal and the rising edge of the first lighting control signal.
  • each light-emitting period of the first sub-pixel includes a first reset stage, a first compensation stage, a first data writing stage and a first light-emitting stage arranged in sequence
  • the second sub-pixel has a
  • Each light-emitting period includes a second reset stage, a second compensation stage, a second data writing stage and a second light-emitting stage arranged in sequence;
  • the second reset phase and the second compensation phase correspond to the first data writing phase.
  • the overlapping duration of the first data writing phase and the second data writing phase is no greater than one third of the second data writing phase.
  • the light-emitting stage of the first sub-pixel located in the first display area and the light-emitting stage of the second sub-pixel located in the light-emitting stage of the second sub-pixel overlap at most.
  • the light-emitting time is prolonged, thereby reducing the possibility of screen flashing due to insufficient light-emitting time, which helps to improve the display effect.
  • FIG. 1 is a structural diagram of a display panel provided by an embodiment of the present disclosure
  • FIG. 2 is a circuit diagram of a pixel structure in an embodiment of the present disclosure
  • FIG. 3 is a timing diagram of a display panel driving method according to an embodiment of the present disclosure.
  • Embodiments of the present disclosure provide a display control method.
  • the display control method is applied to a display panel.
  • the display panel includes at least a first display area and a second display area arranged along a first direction.
  • the effective display area (AA area) of the display panel is divided into a plurality of display areas, and the number of divided display areas is at least two. Obviously, in actual implementation, the number may be more. For example, there may be three, four, five or more.
  • each display area can correspond to a group of signal lines to obtain control signals, or multiple display areas can be connected to the same group of signal lines to obtain control signals, and the number of signal lines should be set to at least two. Group.
  • the divided display area includes two display areas, a first display area and a second display area as an example, wherein the first display area is connected to the first signal line, and the second display area is connected to the The second signal line is connected.
  • Each display area includes a plurality of sub-pixels.
  • the sub-pixels included in the first display area are the first sub-pixels
  • the sub-pixels included in the second display area are the second sub-pixels as an example.
  • the structure of the sub-pixel can be set as required.
  • the sub-pixel is a 5T1C sub-pixel including five control switches and one storage capacitor as an example.
  • the structure of the sub-pixel is Not limited to this.
  • each sub-pixel includes a first transistor T1, a second transistor T2, a third transistor T3, a fourth transistor T4 and a fifth transistor T5, and a storage capacitor Cst, wherein each A transistor includes a gate, a first electrode and a second electrode, wherein the gate is also called a control electrode, the first electrode can be a source electrode, the second electrode can be a drain electrode, or the first electrode can be said to be a drain electrode, and the second electrode can be said to be a drain electrode.
  • the pole may be the source.
  • the gate of the first transistor T1 is connected to the gate driving signal line G1(n), the first electrode of the first transistor T1 is connected to the data line DL, and the second electrode of the first transistor T1 is connected to the first node N1.
  • the gate of the second transistor T2 is connected to the first control signal line G2(n), the first pole of the second transistor T2 is connected to the first power signal line VIN1, and the second pole of the second transistor T2 is connected to the first node N1 .
  • the gate of the third transistor T3 is connected to the first node N1, the first electrode of the third transistor T3 is connected to the positive electrode of the light emitting diode OLED, and the second electrode of the third transistor T3 is connected to the second electrode of the fifth diode T5 .
  • the gate of the fourth transistor T4 is connected to the second control signal line G3(n), the first pole of the fourth transistor T4 is connected to the first power signal line VIN2, and the second pole of the third transistor T3 is connected to the positive pole of the light emitting diode .
  • the gate of the fifth transistor T5 is connected to the light emission control signal line EM(n), and the first electrode of the fifth transistor T5 is connected to the power supply line VDD.
  • the first pole of the storage capacitor Cst is connected to the first node, and the second pole of the storage capacitor Cst is connected to the anode of the light emitting diode OLED.
  • a set of signal lines corresponding to each display area may include a gate driving signal line G1(n), a first control signal line G2(n), a second control signal line G3(n) and an emission control signal line EM(n) ).
  • the first signal lines corresponding to the first display area are denoted as G1a(n), G2a(n), G3a(n) and EMa respectively
  • the second signal lines corresponding to the first display area are respectively denoted as G1a(n), G2a(n), G3a(n) and EMa
  • G1b(n), G2b(n), G3b(n) and EMb Denoted as G1b(n), G2b(n), G3b(n) and EMb.
  • the first signal line includes a first lighting control signal line EMa that provides a first lighting control signal
  • the second signal line includes a second lighting control signal line EMb that provides a second lighting control signal
  • the first light-emitting control signal and the second light-emitting control signal are different, and the first display area and the second display area are connected to the same gate driving signal line, that is, G1a(n) and Gb( n) is the same gate drive signal line, that is, G1(n) in FIG. 1 , which is beneficial to reduce the number of lines, thereby helping to save the wiring space, thereby helping to increase the opening area of the display panel and improving the resolution .
  • each sub-pixel includes a reset phase, a compensation phase, a data writing phase, and a light-emitting phase in each light-emitting period.
  • the second control signal line G3(n) is turned on, and the fourth transistor T4 is controlled to be turned on, so that the second pole of the third transistor T3 is reset, and the first control signal line G2(n) provides a high-level signal through the
  • the two transistors T2 write the compensation data Vref provided by the first power signal line VIN1 at the first node N1.
  • the second control signal line G3(n) is turned off to charge the storage capacitor Cst, so that the potential of the first electrode of the third transistor T3 reaches Vref-Vth, where Vth is the threshold voltage.
  • the light-emitting control signal line EM(n) provides a low-level signal
  • the gate driving signal line G1(n) is turned on in sequence
  • light-emitting data is sequentially written in the first row to the Nth row.
  • the light-emitting control signal line EM(n) provides a high-level signal, and the sub-pixels in the display area start to emit light.
  • each light-emitting period of the first sub-pixel includes a first reset stage (stage 1 in FIG. 3 ), a first compensation stage (stage 2 in FIG. 3 ), and a first data writing stage ( 3 stages in FIG. 3 ) and the first light-emitting stage, the second reset stage (4 stages in FIG. 3 ), the second compensation stage (5 stages in FIG. 3 ), the second data The writing stage (6 stages in Figure 3) and the second light-emitting stage.
  • the first row to the n th row correspond to the first display area
  • the n+1 th row to the 2n th row correspond to the second display area
  • the second sub-pixel in the second display area is controlled to display an image through the second signal line.
  • the first signal line is used to control the first sub-pixel in the first display area to emit light
  • the second signal line is used to control the second sub-pixel in the second display area to emit light.
  • the light-emitting stage of the first sub-pixel and the light-emitting stage of the second sub-pixel overlap at most, that is to say, when the first sub-pixel enters the light-emitting stage, the second sub-pixel is not yet in the light-emitting state.
  • the light-emitting stage of one sub-pixel and the light-emitting stage of the second sub-pixel do not completely coincide.
  • the light-emitting time of a pixel in the display panel is 2t1-t2, since t2 is less than t1, 2t1-t2 is greater than t1, which is equivalent to increasing the light-emitting time of the pixels on the display panel in each light-emitting period.
  • the light-emitting stage of the first sub-pixel located in the first display area and the light-emitting stage of the second sub-pixel located in the light-emitting stage of the second sub-pixel overlap at most.
  • the light-emitting time is prolonged, thereby reducing the possibility of screen flashing due to insufficient light-emitting time, which helps to improve the display effect.
  • the falling edge of the second lighting control signal is located between the falling edge of the first lighting control signal and the rising edge of the first lighting control signal. That is to say, in this embodiment, the first data writing stage and the second data writing stage overlap for a part of time.
  • the overlapping duration of the first data writing phase and the second data writing phase is no greater than one third of the second data writing phase. It should be understood that, the shorter the overlapping time between the first data writing stage and the second data writing stage, the shorter the corresponding overlapping time between the first light-emitting stage and the second light-emitting stage, which helps to prolong each The total duration of the light-emitting display panel in one light-emitting period improves the display effect.
  • the second reset phase and the second compensation phase correspond to the first data write phase. That is, when the first display area is in the first data writing phase, the second display area is in the second reset phase, and while the first data writing phase of the first display area continues, the second display area is completed In the second compensation stage, this helps to prolong the light-emitting time of the display panel and improve the light-emitting effect of the display panel.
  • an embodiment of the present disclosure provides a display control device applied to a display panel, the display panel includes at least a first display area and a second display area arranged along a first direction, the first display area Connected with the first signal line, the second display area is connected with the second signal line, and the device includes:
  • a first control module configured to control the first sub-pixel located in the first display area to display an image through the first signal line
  • a second control module configured to control the second sub-pixel in the second display area to display an image through the second signal line, wherein the light-emitting stage of the first sub-pixel and the light-emitting stage of the second sub-pixel The light-emitting phases are at most partially coincident.
  • the first signal line includes a first lighting control signal line that provides a first lighting control signal
  • the second signal line includes a second lighting control signal line that provides a second lighting control signal
  • the first light-emitting control signal and the second light-emitting control signal are different, and the first display area and the second display area are connected to the same gate driving signal line.
  • the falling edge of the second lighting control signal is located between the falling edge of the first lighting control signal and the rising edge of the first lighting control signal.
  • each light-emitting period of the first sub-pixel includes a first reset stage, a first compensation stage, a first data writing stage and a first light-emitting stage arranged in sequence
  • the second sub-pixel has a
  • Each light-emitting period includes a second reset stage, a second compensation stage, a second data writing stage and a second light-emitting stage arranged in sequence;
  • the second reset phase and the second compensation phase correspond to the first data writing phase.
  • the overlapping duration of the first data writing phase and the second data writing phase is no greater than one third of the second data writing phase.
  • the light-emitting stage of the first sub-pixel located in the first display area and the light-emitting stage of the second sub-pixel located in the light-emitting stage of the second sub-pixel overlap at most.
  • the light-emitting time is prolonged, thereby reducing the possibility of screen flashing due to insufficient light-emitting time, which helps to improve the display effect.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Electroluminescent Light Sources (AREA)
  • Control Of El Displays (AREA)

Abstract

本公开提供一种显示控制方法及装置。显示控制方法应用于显示面板，所述显示面板包括至少包括沿第一方向排列的第一显示区和第二显示区，所述第一显示区与第一信号线连接，所述第二显示区与第二信号线连接，所述方法包括：通过所述第一信号线控制位于所述第一显示区中的第一子像素显示图像；通过所述第二信号线控制位于所述第二显示区中的第二子像素显示图像，其中，所述第一子像素的发光阶段和所述第二子像素的发光阶段至多部分重合。

Description

一种显示控制方法及装置
相关申请的交叉引用
本申请主张在2020年10月30日在中国提交的中国专利申请号202011194016.2的优先权，其全部内容通过引用包含于此。
技术领域
本公开涉及显示技术领域，尤其涉及一种显示控制方法及装置。
背景技术
随着显示技术的发展，OLED(有机发光二极管)显示面板由于具有响应速度快、图像质量高等优点收到用户的欢迎，然而现有的OLED显示面板每一像素的发光时间是一定的，如果发光时间过短，可能导致显示面板出现闪屏现象，影响显示效果。
发明内容
本公开实施例提供一种显示控制方法及装置，以解决发光时间过短，可能导致显示面板出现闪屏现象，影响显示效果的问题。
第一方面，本公开实施例提供了一种显示控制方法，应用于显示面板，所述显示面板包括至少包括沿第一方向排列的第一显示区和第二显示区，所述第一显示区与第一信号线连接，所述第二显示区与第二信号线连接，所述方法包括：
通过所述第一信号线控制位于所述第一显示区中的第一子像素显示图像；
通过所述第二信号线控制位于所述第二显示区中的第二子像素显示图像，其中，所述第一子像素的发光阶段和所述第二子像素的发光阶段至多部分重合。
在一些实施例中，所述第一信号线包括提供第一发光控制信号的第一发光控制信号线，所述第二信号线包括提供第二发光控制信号的第二发光控制 信号线，所述第一发光控制信号和所述第二发光控制信号不同，所述第一显示区和所述第二显示区与同一栅极驱动信号线相连。
在一些实施例中，所述第二发光控制信号的下降沿位于所述第一发光控制信号的下降沿和第一发光控制信号的上升沿之间。
在一些实施例中，所述第一子像素的每一发光周期包括依次排列的第一复位阶段、第一补偿阶段、第一数据写入阶段和第一发光阶段，所述第二子像素的每一发光周期包括依次排列的第二复位阶段、第二补偿阶段、第二数据写入阶段和第二发光阶段；
所述第二复位阶段和所述第二补偿阶段与所述第一数据写入阶段相对应。
在一些实施例中，所述第一数据写入阶段和所述第二数据写入阶段的交叠时长不大于所述第二数据写入阶段的三分之一。
第二方面，本公开实施例提供了一种显示控制装置，应用于显示面板，所述显示面板包括至少包括沿第一方向排列的第一显示区和第二显示区，所述第一显示区与第一信号线连接，所述第二显示区与第二信号线连接，所述装置包括：
第一控制模块，用于通过所述第一信号线控制位于所述第一显示区中的第一子像素显示图像；
第二控制模块，用于通过所述第二信号线控制位于所述第二显示区中的第二子像素显示图像，其中，所述第一子像素的发光阶段和所述第二子像素的发光阶段至多部分重合。
在一些实施例中，所述第一信号线包括提供第一发光控制信号的第一发光控制信号线，所述第二信号线包括提供第二发光控制信号的第二发光控制信号线，所述第一发光控制信号和所述第二发光控制信号不同，所述第一显示区和所述第二显示区与同一栅极驱动信号线相连。
在一些实施例中，所述第二发光控制信号的下降沿位于所述第一发光控制信号的下降沿和第一发光控制信号的上升沿之间。
在一些实施例中，所述第一子像素的每一发光周期包括依次排列的第一复位阶段、第一补偿阶段、第一数据写入阶段和第一发光阶段，所述第二子 像素的每一发光周期包括依次排列的第二复位阶段、第二补偿阶段、第二数据写入阶段和第二发光阶段；
所述第二复位阶段和所述第二补偿阶段与所述第一数据写入阶段相对应。
在一些实施例中，所述第一数据写入阶段和所述第二数据写入阶段的交叠时长不大于所述第二数据写入阶段的三分之一。
本公开实施例中，位于第一显示区的第一子像素的发光阶段和位于第二子像素的发光阶段第二子像素的发光阶段至多部分重合，这样，显示面板在每一发光周期内的发光时间延长，从而降低了因为发光时间不足导致闪屏的可能性，有助于提高显示效果。
附图说明
为了更清楚地说明本公开实施例的技术方案，下面将对本公开实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本公开的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动性的前提下，还可以根据这些附图获取其他的附图。
图1是本公开一实施例提供的显示面板的结构图；
图2是本公开一实施例中像素结构的电路图；
图3是本公开一实施例中显示面板驱动方法的时序图。
具体实施方式
下面将结合本公开实施例中的附图，对本公开实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例是本公开一部分实施例，而不是全部的实施例。基于本公开中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获取的所有其他实施例，都属于本公开保护的范围。
本公开实施例提供了一种显示控制方法。
该显示控制方法应用于显示面板，如图1所示，显示面板包括至少包括沿第一方向排列的第一显示区和第二显示区。
本实施例的技术方案中，将显示面板的有效显示区(AA区)划分为多个 显示区，所划分的显示区的数量至少为两个，显然，实际实施时，其数量可以更多，例如可以是三个、四个、五个或更多。
当所划分的显示区包括第一显示区和第二显示区的情况下，第一显示区与第一信号线连接，第二显示区与第二信号线连接，以获取相应的控制信号，当显示区的数量更多的情况下，可以每个显示区对应一组信号线以获取控制信号，也可以多个显示区与同一组信号线相连以获取控制信号，且信号线的数量至少应当设置两组。
示例性的，本实施例中以所划分的显示区包括第一显示区和第二显示区两个显示区为例说明，其中，第一显示区与第一信号线连接，第二显示区与第二信号线连接。
每一显示区内包括多个子像素，本实施例中，以第一显示区包括的子像素为第一子像素、第二显示区中包括的子像素为第二子像素为例说明。
子像素的结构可以根据需要设置，示例性的，本实施例中以子像素为包括5个控制开关管和1个存储电容的5T1C子像素为例说明，显然，实际实施时，子像素的结构并不局限于此。
如图2所示，本实施例中，每一子像素均包括第一晶体管T1、第二晶体管T2、第三晶体管T3、第四晶体管T4和第五晶体管T5，以及存储电容Cst，其中，每一晶体管包括栅极、第一极和第二极，其中，栅极又称控制极，第一极可以是源极，第二极可以是漏极，或者第一极可以说漏极，第二极可以是源极。
第一晶体管T1的栅极与栅极驱动信号线G1(n)相连，第一晶体管T1的第一极与数据线DL相连，第一晶体管T1的第二极与第一节点N1相连。
第二晶体管T2的栅极与第一控制信号线G2(n)相连，第二晶体管T2的第一极与第一电源信号线VIN1相连，第二晶体管T2的第二极与第一节点N1相连。
第三晶体管T3的栅极与第一节点N1相连，第三晶体管T3的第一极与发光二极管OLED的正极相连，第三晶体管T3的第二极与第五二极管T5的第二极相连。
第四晶体管T4的栅极与第二控制信号线G3(n)相连，第四晶体管T4 的第一极与第一电源信号线VIN2相连，第三晶体管T3的第二极与发光二极管的正极相连。
第五晶体管T5的栅极与发光控制信号线EM(n)相连，第五晶体管T5的第一极与电源线VDD相连。
存储电容Cst的第一极与第一节点相连，存储电容Cst的第二极与发光二极管OLED的正极相连。
与每一显示区对应的一组信号线可以包括栅极驱动信号线G1(n)、第一控制信号线G2(n)、第二控制信号线G3(n)和发光控制信号线EM(n)。
本实施例中，将与第一显示区对应的第一信号线分别记做G1a(n)、G2a(n)、G3a(n)和EMa，将与第一显示区对应的第二信号线分别记做G1b(n)、G2b(n)、G3b(n)和EMb。
在一些实施例中，所述第一信号线包括提供第一发光控制信号的第一发光控制信号线EMa，所述第二信号线包括提供第二发光控制信号的第二发光控制信号线EMb，所述第一发光控制信号和所述第二发光控制信号不同，所述第一显示区和所述第二显示区与同一栅极驱动信号线相连，也就是说，G1a(n)和Gb(n)为同一栅极驱动信号线，即图1中G1(n)，这样，有利于减少走线数量，从而有助于节约布线空间，从而有助于提高显示面板的开口面积，提高分辨率。
如图3所示，每一子像素在每一发光周期包括复位阶段、补偿阶段、数据写入阶段和发光阶段。
在复位阶段,第二控制信号线G3(n)打开，控制第四晶体管T4打开，使得第三晶体管T3的第二极复位，第一控制信号线G2(n)提供高电平信号，通过第二晶体管T2在第一节点N1写入第一电源信号线VIN1提供的补偿数据Vref。
在补偿阶段，第二控制信号线G3(n)关闭，为存储电容Cst充电，使得第三晶体管T3的第一极的电位达到Vref-Vth，其中，Vth为阈值电压。
在数据写入阶段，发光控制信号线EM(n)提供低电平信号，栅极驱动信号线G1(n)依次打开，在第一行至第N行依次写入发光数据。
在发光阶段，发光控制信号线EM(n)提供高电平信号，该显示区中的 子像素开始发光。
本实施例中，将第一子像素的每一发光周期包括依次记做第一复位阶段(图3中1阶段)、第一补偿阶段(图3中2阶段)、第一数据写入阶段(图3中3阶段)和第一发光阶段，将第二子像素的每一发光周期依次第二复位阶段(图3中4阶段)、第二补偿阶段(图3中5阶段)、第二数据写入阶段(图3中6阶段)和第二发光阶段。
如图3所示，本实施例中，第一行至第n行对应第一显示区，第n+1行至第2n行对应第二显示区。
本实施例的显示控制方法包括：
通过所述第一信号线控制位于所述第一显示区中的第一子像素显示图像；
通过所述第二信号线控制位于所述第二显示区中的第二子像素显示图像。
本实施例中，实施时，分别利用第一信号线控制第一显示区中的第一子像素发光，利用第二信号线控制第二显示区中的第二子像素发光，具体的发光控制过程可参考上述描述过程。
本实施例中，第一子像素的发光阶段和第二子像素的发光阶段至多部分重合，也就是说，在第一子像素进入发光阶段时，第二子像素尚未处于发光状态，这样，第一子像素的发光阶段和第二子像素的发光阶段不完全重合。
以每一发光阶段的持续时间为t1，第一子像素的发光阶段和第二子像素的发光阶段重合的时间为t2为例说明，在每一发光周期中，显示面板中像素的发光时间为2t1-t2，由于t2小于t1，所以2t1-t2大于t1，相当于在每一发光周期内，显示面板上像素的发光的时间增加。
本公开实施例中，位于第一显示区的第一子像素的发光阶段和位于第二子像素的发光阶段第二子像素的发光阶段至多部分重合，这样，显示面板在每一发光周期内的发光时间延长，从而降低了因为发光时间不足导致闪屏的可能性，有助于提高显示效果。
在一些实施例中，所述第二发光控制信号的下降沿位于所述第一发光控制信号的下降沿和第一发光控制信号的上升沿之间。也就是说，本实施例中， 第一数据写入阶段和第二数据写入阶段有一部分时间是交叠的。
在一些实施例中，第一数据写入阶段和第二数据写入阶段的交叠时长不大于第二数据写入阶段的三分之一。应当理解的是，第一数据写入阶段和第二数据写入阶段的交叠时间越短，对应的第一发光阶段和第二发光阶段的交叠时间也就越短，有助于延长每一发光周期内显示面板发光的总时长，提高显示效果。
在一个实施例中，第二复位阶段和第二补偿阶段与第一数据写入阶段相对应。也就是说，在第一显示区处于第一数据写入阶段时，第二显示区处于第二复位阶段，且在第一显示区的第一数据写入阶段持续过程中，第二显示区完成在第二补偿阶段，这样，有助于延长显示面板的发光时间，提高显示面板的发光效果。
第二方面，本公开实施例提供了一种显示控制装置，应用于显示面板，所述显示面板包括至少包括沿第一方向排列的第一显示区和第二显示区，所述第一显示区与第一信号线连接，所述第二显示区与第二信号线连接，所述装置包括：
第一控制模块，用于通过所述第一信号线控制位于所述第一显示区中的第一子像素显示图像；
第二控制模块，用于通过所述第二信号线控制位于所述第二显示区中的第二子像素显示图像，其中，所述第一子像素的发光阶段和所述第二子像素的发光阶段至多部分重合。
在一些实施例中，所述第一信号线包括提供第一发光控制信号的第一发光控制信号线，所述第二信号线包括提供第二发光控制信号的第二发光控制信号线，所述第一发光控制信号和所述第二发光控制信号不同，所述第一显示区和所述第二显示区与同一栅极驱动信号线相连。
在一些实施例中，所述第二发光控制信号的下降沿位于所述第一发光控制信号的下降沿和第一发光控制信号的上升沿之间。
在一些实施例中，所述第一子像素的每一发光周期包括依次排列的第一复位阶段、第一补偿阶段、第一数据写入阶段和第一发光阶段，所述第二子像素的每一发光周期包括依次排列的第二复位阶段、第二补偿阶段、第二数 据写入阶段和第二发光阶段；
所述第二复位阶段和所述第二补偿阶段与所述第一数据写入阶段相对应。
在一些实施例中，所述第一数据写入阶段和所述第二数据写入阶段的交叠时长不大于所述第二数据写入阶段的三分之一。
本公开实施例中，位于第一显示区的第一子像素的发光阶段和位于第二子像素的发光阶段第二子像素的发光阶段至多部分重合，这样，显示面板在每一发光周期内的发光时间延长，从而降低了因为发光时间不足导致闪屏的可能性，有助于提高显示效果。
以上，仅为本公开的具体实施方式，但本公开的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本公开揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本公开的保护范围之内。因此，本公开的保护范围应以权利要求的保护范围为准。

Claims (10)

  1. 一种显示控制方法，应用于显示面板，其特征在于，所述显示面板包括至少包括沿第一方向排列的第一显示区和第二显示区，所述第一显示区与第一信号线连接，所述第二显示区与第二信号线连接，所述方法包括：
    通过所述第一信号线控制位于所述第一显示区中的第一子像素显示图像；
    通过所述第二信号线控制位于所述第二显示区中的第二子像素显示图像，其中，所述第一子像素的发光阶段和所述第二子像素的发光阶段至多部分重合。
  2. 根据权利要求1所述的方法，其特征在于，所述第一信号线包括提供第一发光控制信号的第一发光控制信号线，所述第二信号线包括提供第二发光控制信号的第二发光控制信号线，所述第一发光控制信号和所述第二发光控制信号不同，所述第一显示区和所述第二显示区与同一栅极驱动信号线相连。
  3. 根据权利要求2所述的方法，其特征在于，所述第二发光控制信号的下降沿位于所述第一发光控制信号的下降沿和第一发光控制信号的上升沿之间。
  4. 根据权利要求1或2所述的方法，其特征在于，所述第一子像素的每一发光周期包括依次排列的第一复位阶段、第一补偿阶段、第一数据写入阶段和第一发光阶段，所述第二子像素的每一发光周期包括依次排列的第二复位阶段、第二补偿阶段、第二数据写入阶段和第二发光阶段；
    所述第二复位阶段和所述第二补偿阶段与所述第一数据写入阶段相对应。
  5. 根据权利要求4所述的方法，其特征在于，所述第一数据写入阶段和所述第二数据写入阶段的交叠时长不大于所述第二数据写入阶段的三分之一。
  6. 一种显示控制装置，应用于显示面板，其特征在于，所述显示面板包括至少包括沿第一方向排列的第一显示区和第二显示区，所述第一显示区与 第一信号线连接，所述第二显示区与第二信号线连接，所述装置包括：
    第一控制模块，用于通过所述第一信号线控制位于所述第一显示区中的第一子像素显示图像；
    第二控制模块，用于通过所述第二信号线控制位于所述第二显示区中的第二子像素显示图像，其中，所述第一子像素的发光阶段和所述第二子像素的发光阶段至多部分重合。
  7. 根据权利要求6所述的装置，其特征在于，所述第一信号线包括提供第一发光控制信号的第一发光控制信号线，所述第二信号线包括提供第二发光控制信号的第二发光控制信号线，所述第一发光控制信号和所述第二发光控制信号不同，所述第一显示区和所述第二显示区与同一栅极驱动信号线相连。
  8. 根据权利要求7所述的装置，其特征在于，所述第二发光控制信号的下降沿位于所述第一发光控制信号的下降沿和第一发光控制信号的上升沿之间。
  9. 根据权利要求6或7所述的装置，其特征在于，所述第一子像素的每一发光周期包括依次排列的第一复位阶段、第一补偿阶段、第一数据写入阶段和第一发光阶段，所述第二子像素的每一发光周期包括依次排列的第二复位阶段、第二补偿阶段、第二数据写入阶段和第二发光阶段；
    所述第二复位阶段和所述第二补偿阶段与所述第一数据写入阶段相对应。
  10. 根据权利要求9所述的装置，其特征在于，所述第一数据写入阶段和所述第二数据写入阶段的交叠时长不大于所述第二数据写入阶段的三分之一。
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