WO2022071186A1 - Multiplexer - Google Patents

Multiplexer Download PDF

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Publication number
WO2022071186A1
WO2022071186A1 PCT/JP2021/035267 JP2021035267W WO2022071186A1 WO 2022071186 A1 WO2022071186 A1 WO 2022071186A1 JP 2021035267 W JP2021035267 W JP 2021035267W WO 2022071186 A1 WO2022071186 A1 WO 2022071186A1
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Prior art keywords
parallel arm
filter circuit
resistance
arm resonator
common terminal
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PCT/JP2021/035267
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French (fr)
Japanese (ja)
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茂生 小笹
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株式会社村田製作所
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Publication of WO2022071186A1 publication Critical patent/WO2022071186A1/en

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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/02Details
    • H03H9/125Driving means, e.g. electrodes, coils
    • H03H9/145Driving means, e.g. electrodes, coils for networks using surface acoustic waves
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/70Multiple-port networks for connecting several sources or loads, working on different frequencies or frequency bands, to a common load or source
    • H03H9/72Networks using surface acoustic waves

Definitions

  • the present invention relates to a multiplexer having a plurality of filters.
  • Patent Document 1 discloses a multiplexer including one filter and the other filter.
  • One filter is composed of a ladder type filter having a series arm resonator and a parallel arm resonator.
  • the insertion loss of the pass band of the other filter may decrease due to the influence of the parallel arm resonator.
  • An object of the present invention is to suppress a decrease in insertion loss in the pass band of the other filter in a multiplexer including one filter and the other filter.
  • the multiplexer is provided on a first path connecting a common terminal, a first terminal and a second terminal, and the common terminal and the first terminal.
  • a first filter circuit and a second filter circuit provided on a second path connecting the common terminal and the second terminal are provided, and the first filter circuit has a plurality of parallel arm resonators.
  • the resistance of a single parallel arm resonator closest to the common terminal among the plurality of parallel arm resonators is the smallest.
  • FIG. 1 is a circuit configuration diagram showing a multiplexer in a study example of the present invention.
  • FIG. 2 is a graph showing the impedance characteristics of the parallel arm resonator included in the first filter circuit of the multiplexer shown in FIG.
  • FIG. 3 is a Smith chart showing the impedance characteristics of the parallel arm resonator shown in FIG.
  • FIG. 4 is a graph showing the resistance of a single parallel arm resonator shown in FIG.
  • FIG. 5 is a Smith chart showing the impedance characteristics of the remaining circuit excluding the series arm resonator from the first filter circuit shown in FIG.
  • FIG. 6 is a Smith chart showing the impedance characteristics of the first filter circuit shown in FIG.
  • FIG. 7 is a graph showing the conductance of the first filter circuit shown in FIG. FIG.
  • FIG. 8 is a graph showing the passage characteristics of the second filter circuit shown in FIG.
  • FIG. 9 is a circuit configuration diagram showing a multiplexer according to the embodiment.
  • FIG. 10 is a diagram showing the structure of the IDT electrode of the elastic wave resonator included in the first filter circuit of the multiplexer according to the embodiment.
  • FIG. 11A is a diagram showing design parameters of the parallel arm resonator included in the first filter circuit of the embodiment.
  • FIG. 11B is a diagram showing design parameters of the parallel arm resonator included in the first filter circuit of the comparative example.
  • FIG. 12A is a graph showing the impedance characteristics of the parallel arm resonators in the embodiment.
  • FIG. 12B is a graph showing the impedance characteristics of the parallel arm resonators in the comparative example.
  • FIG. 13A is a Smith chart showing the impedance characteristics of the parallel arm resonators in the embodiment.
  • FIG. 13B is a Smith chart showing the impedance characteristics of the parallel arm resonators in the comparative example.
  • FIG. 14A is a graph showing the resistance of a single parallel arm resonator in the embodiment.
  • FIG. 14B is a graph showing the resistance of a single parallel arm resonator in the comparative example.
  • FIG. 15 is a Smith chart showing the impedance characteristics of the first filter circuit of the multiplexer in Examples and Comparative Examples.
  • FIG. 16 is a graph showing the conductance of the first filter circuit of the multiplexer in Examples and Comparative Examples.
  • FIG. 17 is a diagram showing the pass characteristics of the second filter circuit of the multiplexer in Examples and Comparative Examples.
  • FIG. 18 is a diagram showing an equivalent circuit of parallel arm resonators.
  • FIG. 19 is a diagram showing the design parameters of the parallel arm resonator and the resonance resistance of the parallel arm resonator.
  • FIG. 20 is a diagram showing the relationship between the resonance resistance of the parallel arm resonator and the design parameter.
  • FIG. 21 is a graph showing the impedance characteristics of a circuit in which an inductor is connected to a parallel arm resonator.
  • FIG. 22 is a graph showing the resistance of a circuit in which an inductor is connected to a parallel arm resonator.
  • FIG. 1 is a circuit configuration diagram showing a multiplexer 1 in Study Examples 1 and 2 of the present invention.
  • Each multiplexer 1 of the examples 1 and 2 includes a first filter circuit 10 which is one filter and a second filter circuit 50 which is the other filter.
  • the first filter circuit 10 is arranged on the first path r1 connecting the common terminal tc and the first terminal t1.
  • the second filter circuit 50 is arranged on the second path r2 connecting the common terminal tc and the second terminal t2.
  • the first filter circuit 10 is composed of a ladder type filter including a series arm resonator S0 and a parallel arm resonator P0.
  • the series arm resonator S0 is arranged on the first path r1 on the common terminal ct side of the parallel arm resonator P0.
  • the pass band of the first filter circuit 10 is 1805 MHz to 1880 MHz
  • the pass band of the second filter circuit 50 is 1710 MHz to 1785 MHz.
  • the pass band of the first filter circuit 10 may be referred to as an own band
  • the pass band of the second filter circuit 50 may be referred to as a mating band.
  • the circuit configurations of the multiplexers 1 of Study Examples 1 and 2 are the same as each other, but the characteristics of the parallel arm resonator P0 are different as shown below.
  • the relationship between the characteristics of the parallel arm resonator P0 of the first filter circuit 10 and the loss generated in the mating band will be described.
  • FIG. 2 is a graph showing the impedance characteristics of the parallel arm resonator P0 included in the first filter circuit 10 of the multiplexer 1 shown in FIG.
  • the position corresponding to 1805 MHz in the own band is indicated by the marker M7
  • the position corresponding to 1880 MHz is indicated by the marker M8.
  • the position corresponding to 1710 MHz in the other band is indicated by the marker M5
  • the position corresponding to 1785 MHz is indicated by the marker M6.
  • the parallel arm resonator P0 of Study Example 1 and the parallel arm resonator P0 of Study Example 2 have impedance characteristics as shown in FIG.
  • FIG. 3 is a Smith chart showing the impedance characteristics of the parallel arm resonator P0 shown in FIG.
  • the parallel arm resonator P0 of the study example 1 has an impedance characteristic located closer to the outer peripheral circle of the Smith chart than the parallel arm resonator P0 of the study example 2 in the mating band indicated by the markers M5 to M6. That is, the parallel arm resonator P0 of the study example 1 has a smaller loss generated in the mating band than the parallel arm resonator P0 of the study example 2.
  • FIG. 4 is a graph showing the resistance of the parallel arm resonator P0 shown in FIG. 2 alone.
  • FIG. 4 shows the actual impedance portion of the impedance characteristics shown in FIG. As shown in this figure, in the mating band indicated by the markers M5 to M6, the resistance of the parallel arm resonator P0 alone is smaller in the study example 1 than in the study example 2.
  • the resistance of the parallel arm resonator P0 alone is related to the loss generated in the mating band. For example, in order to reduce the loss generated in the mating band, it is desirable to reduce the resistance of the parallel arm resonator P0 alone.
  • FIG. 5 is a Smith chart showing the impedance characteristics of the remaining circuits excluding the series arm resonator S0 from the first filter circuit 10 shown in FIG. Specifically, FIG. 5 shows the characteristics when the remaining circuit including the parallel arm resonator P0 is viewed from the node n1 of the first path r1 to which the parallel arm resonator P0 is connected. ..
  • the impedance characteristic of the study example 2 is farther from the outer circle of the Smith chart than the study example 1.
  • the reason why the impedance characteristic is separated from the outer peripheral circle is that the resistance component (resistance component) of the parallel arm resonator P0 described above is larger in the study example 2 than in the study example 1.
  • FIG. 6 is a Smith chart showing the impedance characteristics of the first filter circuit 10 shown in FIG.
  • FIG. 7 is a graph showing the conductance of the first filter circuit 10 shown in FIG.
  • FIG. 8 is a graph showing the passage characteristics of the second filter circuit 50 shown in FIG. 6 and 7 show a circuit in which the series arm resonator S0 is added to the parallel arm resonator P0 shown in FIG. 5, that is, the first filter circuit 10 including the series arm resonator S0 is viewed from the common terminal tk side. The characteristics of the case are shown.
  • the impedance characteristic rotates counterclockwise and the impedance characteristic in the mating band moves to the open side, as shown in FIG.
  • the resistance component of the parallel arm resonator P0 remains. Therefore, as shown in FIG. 7, the conductance in the mating band is larger in the study example 2 than in the study example 1.
  • the pass characteristics (EL characteristics) of the second filter circuit 50 are compared, the insertion loss in the pass band of the second filter circuit 50 is lower in the study example 2 than in the study example 1. ing.
  • the impedance characteristic of the first filter circuit 10 can be moved to the open side on the Smith chart.
  • the resistance component of the original parallel arm resonator P0 is large, even if the Smith chart is moved to the open side, the Smith chart will not stick to the outer peripheral circle, and the real part component will become large.
  • the parallel arm resonator of the first filter circuit 10 has the following configuration in order to suppress the reduction of the insertion loss in the pass band of the second filter circuit 50.
  • FIG. 9 is a circuit configuration diagram showing the multiplexer 1 according to the embodiment. Note that FIG. 9 also shows the antenna element 9.
  • the multiplexer 1 is a demultiplexer or combiner including a plurality of filters having different frequency pass bands. As shown in FIG. 9, the multiplexer 1 includes a first filter circuit 10 which is one filter and a second filter circuit 50 which is the other filter. Further, the multiplexer 1 includes a common terminal tc, a first terminal t1 and a second terminal t2. The pass bands of the first filter circuit 10 and the second filter circuit 50 are the same as those of Study Examples 1 and 2 described above.
  • the common terminal ct is an antenna terminal of the multiplexer 1, and is connected to an antenna element 9 arranged outside the multiplexer 1. Further, the common terminal tc is connected to each of the first filter circuit 10 and the second filter circuit 50. Specifically, the common terminal tc is connected to the first filter circuit 10 via the node n0 between the first filter circuit 10 and the first terminal t1, and the second filter circuit 50 via the node n0. Connected to.
  • the node n0 is a bundling point where the first path r1 and the second path r2, which will be described later, are bundled.
  • the first terminal t1 is connected to the first filter circuit 10. Further, the first terminal t1 is connected to an RF signal processing circuit (not shown) via an amplifier circuit or the like (not shown) arranged outside the multiplexer 1.
  • the second terminal t2 is connected to the second filter circuit 50. Further, the second terminal t2 is connected to an RF signal processing circuit (not shown) via an amplifier circuit or the like (not shown) arranged outside the multiplexer 1.
  • the first filter circuit 10 is arranged on the first path r1 connecting the common terminal tc and the first terminal t1.
  • the first filter circuit 10 is, for example, a reception filter having a downlink frequency band (reception band) as a pass band, and is set so that the pass band is higher than that of the second filter circuit 50.
  • the first filter circuit 10 includes series arm resonators S1, S2, S3, S4, S5 and parallel arm resonators P1, P2, P3, P4, which are elastic wave resonators.
  • the surface acoustic wave resonator is, for example, a SAW (Surface Acoustic Wave) resonator using an elastic surface wave.
  • the series arm resonators S1 to S5 are arranged on the first path (series arm) r1 connecting the common terminal tc and the first terminal t1.
  • the series arm resonators S1 to S5 are connected in series in this order from the common terminal tc toward the first terminal t1.
  • the series arm resonator S1 is provided on the common terminal ct side of the plurality of parallel arm resonators P1 to P4.
  • the parallel arm resonators P1 to P4 are paths (parallel) connecting the nodes n1, n2, n3, n4 between the adjacent series arm resonators S1 to S5 on the first path r1 and the reference terminal (ground). Arms) are connected in parallel to each other. Specifically, among the parallel arm resonators P1 to P4, one end of the parallel arm resonator P1 closest to the common terminal tc is connected to the node n1 between the series arm resonators S1 and S2, and the other end is connected to the node n1. It is connected to the reference terminal.
  • One end of the parallel arm resonator P2 is connected to the node n2 between the series arm resonators S2 and S3, and the other end is connected to the reference terminal.
  • One end of the parallel arm resonator P3 is connected to the node n3 between the series arm resonators S3 and S4, and the other end is connected to the reference terminal.
  • One end of the parallel arm resonator P4 is connected to the node n4 between the series arm resonators S4 and S5, and the other end is connected to the reference terminal.
  • the first filter circuit 10 is arranged on the five series arm resonators S1 to S5 arranged on the first path r1 and on the path connecting the first path r1 and the reference terminal. It has a T-shaped ladder filter structure composed of four parallel arm resonators P1 to P4.
  • the number of series arm resonators and parallel arm resonators constituting the first filter circuit 10 is not limited to five or four, and the number of series arm resonators is two or more and the number of parallel arm resonators is two or more. It should be.
  • the second filter circuit 50 is arranged on the second path r2 connecting the common terminal tc and the second terminal t2.
  • the second filter circuit 50 is, for example, a transmission filter having an uplink frequency band (transmission band) as a pass band, and is set so that the pass band is lower than that of the first filter circuit 10.
  • the second filter circuit 50 includes series arm resonators S51, S52, S53, S54, S55 and parallel arm resonators P51, P52, P53, P54 which are elastic wave resonators.
  • the series arm resonators S51 to S55 are arranged on the second path (series arm) r2 connecting the common terminal tc and the second terminal t2.
  • the series arm resonators S51 to S55 are connected in series in this order from the common terminal tc toward the second terminal t2.
  • the parallel arm resonators P51 to P54 are parallel to each other on the path (parallel arm) connecting each node between the adjacent series arm resonators S51 to S55 on the second path r2 and the reference terminal (ground). It is connected.
  • the second filter circuit 50 is arranged on the five series arm resonators S51 to S55 arranged on the second path r2 and the path connecting the second path r2 and the reference terminal 4. It has a T-shaped ladder filter structure composed of two parallel arm resonators P51 to P54.
  • the second filter circuit 50 is not limited to the above configuration, and may be appropriately designed according to the required filter characteristics and the like.
  • the second filter circuit 50 may have a vertically coupled elastic wave resonator or may have a ⁇ -type ladder filter structure.
  • each resonator constituting the second filter circuit 50 is not limited to the SAW resonator, and may be, for example, a BAW (Bulk Acoustic Wave) resonator.
  • the second filter circuit 50 may be configured without using a resonator, and may be, for example, an LC resonance filter or a dielectric filter.
  • the first filter circuit 10 is required to have characteristics that do not reduce the insertion loss in the pass band of the second filter circuit 50. Therefore, in the present embodiment, the resistance of the single parallel arm resonator P1 is set to be smaller than the resistance of the other parallel arm resonators P2 to P4 alone. This will be explained in detail later.
  • FIG. 10 is a diagram showing a structure of an IDT (InterDigital Transducer) electrode 30 of an elastic wave resonator included in the first filter circuit 10 of the multiplexer 1. Since the parallel arm resonator is an example of an elastic wave resonator, here, the structure of the IDT electrodes 30 of the parallel arm resonators P1 to P4 will be described by taking the elastic wave resonator as an example. Note that this figure is a simplified description of the structure of the IDT electrode, and the number and length of the electrode fingers included in the IDT electrode are different from the actual ones.
  • IDT InterDigital Transducer
  • the elastic wave resonator includes a substrate 320 having piezoelectricity, an electrode layer 325 constituting the IDT electrode 30 formed on the substrate 320, and a dielectric layer 326 provided on the substrate 320 so as to cover the IDT electrode 30. And formed by.
  • the elastic wave resonator may include a reflector in addition to the IDT electrode 30.
  • the substrate 320 is, for example, a LiNbO 3 substrate (lithium niobate substrate) having a cut angle of 127.5 °.
  • the cut angle of the substrate 320 is preferably 120 ° ⁇ 20 ° or 300 ° ⁇ 20 °.
  • the electrode layer 325 has a structure in which a plurality of metal layers are laminated.
  • the electrode layer 325 is formed by, for example, laminating a Ti layer, an Al layer, a Ti layer, a Pt layer, and a NiCr layer in this order from the top.
  • the dielectric layer 326 is, for example, a film containing silicon dioxide (SiO 2 ) as a main component.
  • the dielectric layer 326 is provided for the purpose of adjusting the frequency temperature characteristic of the IDT electrode 30, protecting the electrode layer 325 from the external environment, or enhancing the moisture resistance.
  • Each of the IDT electrodes 30 is composed of a pair of first comb-shaped electrodes ca and second comb-shaped electrodes cb facing each other.
  • the first comb-shaped electrode ca has a comb-shaped shape and is composed of a plurality of electrode finger fas parallel to each other and a bus bar electrode connecting one end of each of the plurality of electrode finger fas. ..
  • the second comb-shaped electrode cb has the shape of a comb tooth and is composed of a plurality of electrode fingers fb parallel to each other and a bus bar electrode connecting one ends of the plurality of electrode fingers fb to each other.
  • Each bus bar electrode is formed so as to extend along the elastic wave propagation direction d1.
  • the electrode finger fa and the electrode finger fb are formed so as to extend in the orthogonal direction d2 of the elastic wave propagation direction d1, intersperse with each other in the orthogonal direction d2, and face the elastic wave propagation direction d1.
  • the design parameters of the elastic wave resonator such as wavelength ⁇ , logarithm P of IDT electrode 30, cross width L, duty D, and electrode film thickness T, will be described.
  • the wavelength of the elastic wave resonator is defined by the wavelength ⁇ which is the repetition period of the plurality of electrode fingers fa or fb constituting the IDT electrode 30.
  • the electrode pitch is 1/2 of the wavelength ⁇
  • the line width of each electrode finger fa and fb constituting each comb tooth-shaped electrode ca and cb is W
  • the adjacent electrode finger fa and the electrode finger fb are used.
  • the electrode pitch (W + S).
  • the crossing width L is a distance between the pair of comb-shaped electrodes ca and cb, and is a length at which the electrode fingers fa and fb overlap each other when viewed from the elastic wave propagation direction d1.
  • the electrode film thickness T is the thickness of the electrode layer 325. When the electrode layer 325 is composed of a plurality of metal layers, for example, the total film thickness when each metal layer is converted into a density and replaced with an Al layer is adopted.
  • the Al equivalent film thickness of the first metal layer is the first metal. It is a value obtained by dividing the product of the layer density and the film thickness of the first metal layer by the density of Al, and the Al equivalent film thickness of the electrode layer 325 is the first metal layer, the second metal layer, and the third. It is the total of the Al equivalent film thickness of each of the metal layers of.
  • each parallel arm resonator P1 to P4 alone can be adjusted by changing these design parameters.
  • FIG. 11A is a diagram showing design parameters of the parallel arm resonators P1 to P4 included in the first filter circuit 10 of the embodiment.
  • FIG. 11B is a diagram showing design parameters of the parallel arm resonators P1 to P4 included in the first filter circuit 10 of the comparative example. These figures show wavelength ⁇ , logarithm P, cross width L and duty D, which are examples of design parameters. These figures also show the design parameters of the series arm resonators S1 to S5.
  • the logarithm P of the IDT electrode 30 of the parallel arm resonator P1 is the largest, and the cross width L of the parallel arm resonator P1 is the largest. Is set to be the shortest.
  • the logarithm P of the IDT electrode 30 of the parallel arm resonator P1 is the smallest, and the parallel arm resonator P1 intersects.
  • the width L is set to be the longest.
  • the wavelength ⁇ of the parallel arm resonator P1 is the same, and the duty D of the parallel arm resonator P1 is also the same. The same applies to the other parallel arm resonators P2 to P4.
  • FIG. 12A is a graph showing the impedance characteristics of the parallel arm resonators P1 to P4 in the embodiment.
  • FIG. 12B is a graph showing the impedance characteristics of the parallel arm resonators P1 to P4 in the comparative example.
  • each of the parallel arm resonators P1 to P4 has a resonance frequency (resonance point) within the mating band (1710 MHz to 1785 MHz) or in the vicinity of the mating band.
  • the resonance frequency of the parallel arm resonator P1 may be in a band between the pass band (own band) of the first filter circuit 10 and the pass band (counterband) of the second filter circuit.
  • FIG. 13A is a Smith chart showing the impedance characteristics of the parallel arm resonators P1 to P4 in the embodiment.
  • FIG. 13B is a Smith chart showing the impedance characteristics of the parallel arm resonators P1 to P4 in the comparative example.
  • the parallel arm resonator P1 of the embodiment has an impedance characteristic located closer to the outer peripheral circle of the Smith chart than the other parallel arm resonators P2 to P4.
  • the impedance characteristic of the parallel arm resonator P1 of the comparative example is separated from the outer circumference circle of the Smith chart.
  • FIG. 14A is a graph showing the resistance of the parallel arm resonators P1 to P4 in the embodiment.
  • FIG. 14B is a graph showing the resistance of the parallel arm resonators P1 to P4 in the comparative example.
  • the resistance of the parallel arm resonator P1 alone is smaller than the resistance of the other parallel arm resonators P2 to P4 alone in the entire range of the mating band.
  • the magnitude relationship of the resistance in the embodiment is P1 ⁇ P4 ⁇ P3 ⁇ P2, and the resistance of the parallel arm resonator P1 alone is the smallest.
  • the resistance of the parallel arm resonator P1 alone is larger than the resistance of the other parallel arm resonators P2 to P4 alone in the mating band.
  • the magnitude relationship of the resistance in the comparative example is P4 ⁇ P3 ⁇ P2 ⁇ P1, and the resistance of the parallel arm resonator P1 alone is the largest.
  • the resistance is the average value of the resistance of a single parallel arm resonator in the mating band.
  • FIG. 15 is a Smith chart showing the impedance characteristics of the first filter circuit 10 in Examples and Comparative Examples.
  • FIG. 15 shows the impedance characteristics and the admittance characteristics of the first filter circuit 10 when viewed from the common terminal ct side.
  • the first filter circuit 10 of the embodiment has an impedance characteristic closer to the outer circumference circle of the Smith chart than the first filter circuit 10 of the comparative example. Therefore, in the embodiment, the loss generated in the mating band is smaller than that in the comparative example.
  • FIG. 16 is a graph showing the conductance of the first filter circuit 10 in Examples and Comparative Examples.
  • FIG. 16 shows the admittance real part, that is, the conductance of the first filter circuit 10 when viewed from the common terminal ct side. As shown in FIG. 16, the example has a smaller conductance in the mating band than the comparative example.
  • FIG. 17 is a diagram showing the passage characteristics of the second filter circuit 50 of the multiplexer 1.
  • FIG. 17A shows a passing characteristic including a matching loss
  • FIG. 17B shows an EL characteristic which is a passing characteristic after removing the matching loss.
  • the examples can suppress the reduction of the insertion loss in the mating band as compared with the comparative example.
  • the conductance of the first filter circuit 10 can be reduced in the mating band.
  • FIG. 18 is a diagram showing an equivalent circuit of parallel arm resonators. As shown in FIG. 18, the equivalent circuit of the parallel arm resonator is represented by three resistance components R1, R2, R3, two capacitance components C1 and C2, and one inductance component L1.
  • the capacitance components C1 and C2 and the inductance component L1 correspond to the impedance imaginary part and are not related to the resistance setting which is the impedance real part.
  • the resistance component R3 is a value that is negligibly large for setting the resistance. Therefore, as shown in the following (Equation 1), the resistance Zr of the parallel arm resonator is represented by the total value of the resistance component R1 and the resistance component R2.
  • the resistance component R1 is a resistance component expressing the resistance loss of the electrode fingers fa and fb of the IDT electrode 30, and the resistance component R2 is a resistance component expressing the signal propagation loss in the elastic wave propagation direction d1.
  • the resistance loss of the electrode fingers fa and fb and the signal propagation loss are values that vary depending on design parameters such as the logarithm P of the IDT electrode 30, the intersection width L, the duty D, and the electrode film thickness T. Therefore, multivariate analysis was performed by shaking the values of the logarithm P, the cross width L, the duty D, and the electrode film thickness T, which are the design parameters, and the relationship between the resistance components R1 and R2 and each design parameter was obtained.
  • R1 c1 + (c2 ⁇ T) + (c3 ⁇ D) + (c4 ⁇ P) + (c5 ⁇ L) + (c6 ⁇ T2) + (c7 ⁇ D2) + (c8 ⁇ P2) + (c9) ⁇ P 3 ) + (c10 ⁇ T ⁇ D) + (c11 ⁇ TP) + (c12 ⁇ TL) + (c13 ⁇ D ⁇ P) + (c14 ⁇ D ⁇ L) + (c15 ⁇ P ⁇ L) ⁇ ⁇ ⁇ (Equation 2)
  • R2 c21 + (c22 ⁇ T) + (c23 ⁇ D) + (c24 ⁇ P) + (c25 ⁇ L) + (c26 ⁇ D 2 ) + (c27 ⁇ P 2 ) + (c28 ⁇ P 3 ) + (c29 ⁇ L 2 ) + (c30 ⁇ T ⁇ P) + (c31 ⁇ D ⁇ P) + (c32 ⁇ D ⁇ L) + (c33 ⁇ P ⁇ L) ⁇ ⁇ ⁇ (Equation 3)
  • FIG. 19 is a diagram showing the design parameters of the parallel arm resonators P1 to P4 and the resonance resistance of the parallel arm resonators P1 to P4.
  • FIG. 19 (a) shows the design parameters and the resonance resistance of the embodiment
  • FIG. 19 (b) shows the design parameters and the resonance resistance of the comparative example.
  • the resonance resistance is the resistance at the resonance frequency of the parallel arm resonator, and is calculated based on (Equation 1) to (Equation 3). Since the electrode layer is composed of an Al layer, a Ti layer, and a SiO 2 layer, the value obtained by converting the density of the Ti layer and the SiO 2 layer and then totaling the Al layer is defined as the electrode film thickness T.
  • the resonance resistance of the parallel arm resonator P1 alone is smaller than that of the other parallel arm resonators P2 to P4. That is, the design parameters are determined so that the resonance resistance of the parallel arm resonator P1 is the smallest among the plurality of parallel arm resonators P1 to P4. In this way, by using (Equation 1) to (Equation 3), the logarithm P, the cross width L, the duty D, and the electrode film thickness T of the IDT electrode 30 are determined, and the resonance resistance of the parallel arm resonator P1 is small. Can be set to be. By reducing the resonance resistance, the resistance near the resonance frequency can be reduced, and the decrease in insertion loss in the mating band can be suppressed.
  • FIG. 20 is a diagram showing the relationship between the resonance resistance of the parallel arm resonators P1 to P4 and the design parameters.
  • 20 (a) shows the relationship between the resonance resistance and the duty D
  • FIG. 20 (b) shows the relationship between the resonance resistance and the cross width L
  • FIG. 20 (c) shows the resonance resistance and the logarithmic P.
  • FIG. 20 (d) shows the relationship between the resonance resistance and (intersection width / logarithm)
  • FIG. 20 (e) shows the relationship between the resonance resistance and the electrode film thickness T.
  • the resonance resistance can be reduced by increasing the duty D.
  • the resonance resistance can be reduced by shortening the crossing width L.
  • the resonance resistance can be reduced by increasing the logarithm P.
  • the resonance resistance can be reduced by reducing (intersection width / logarithm).
  • the resonance resistance can be reduced by increasing the electrode film thickness T.
  • FIG. 21 is a graph showing the impedance characteristics of a circuit in which an inductor is connected to the parallel arm resonator P1.
  • FIG. 22 is a graph showing the resistance of a circuit in which an inductor is connected to the parallel arm resonator P1.
  • the inductor connected to the parallel arm resonator P1 is, for example, an SMD (surface mount component), and the Q value is 30. Note that FIGS. 21 and 22 also show an example in which the inductor is 0, that is, an example in which the inductor is not connected to the parallel arm resonator P1.
  • the resistance Zr increases because the inductance value and the Q value are related. In order to reduce the resistance Zr, it is necessary to make the inductor component of the parallel arm resonator P1 closest to the common terminal tc as small as possible.
  • the parallel arm resonator P1 is directly connected to the ground without using an inductor. Further, for example, when a plurality of parallel arm resonators P1 to P4 are directly connected to the ground without using an inductor or the like, the length of the wiring connecting the parallel arm resonator P1 closest to the common terminal ct and the ground. It is desirable that the length is shorter than the length of the wiring connecting the other parallel arm resonators P2 to P4 and the ground.
  • the multiplexer 1 is provided on the first path r1 connecting the common terminal tc, the first terminal t1 and the second terminal t2, and the common terminal tc and the first terminal t1.
  • the first filter circuit 10 is provided, and the second filter circuit 50 provided on the second path r2 connecting the common terminal tc and the second terminal t2 is provided.
  • the first filter circuit 10 has a plurality of parallel arm resonators P1 to P4. In the pass band of the second filter circuit 50, among the plurality of parallel arm resonators P1 to P4, the resistance Zr of the single parallel arm resonator P1 closest to the common terminal ct is the smallest.
  • the conductance of the first filter circuit 10 can be made smaller in the pass band of the second filter circuit 50. As a result, it is possible to suppress a decrease in the insertion loss of the pass band of the second filter circuit 50.
  • the second filter circuit 50 may have a pass band on the lower frequency side than the pass band of the first filter circuit 10.
  • the conductance of the first filter circuit 10 can be reduced in the band on the lower frequency side than the pass band of the first filter circuit 10. As a result, it is possible to suppress a decrease in the insertion loss of the pass band of the second filter circuit 50 located on the lower frequency side of the pass band of the first filter circuit 10.
  • each of the plurality of parallel arm resonators P1 to P4 has an IDT electrode 30, a resistance component R1 expressing the resistance loss of the electrode fingers fa and fb of the IDT electrode 30, and a signal in the elastic wave propagation direction d1. It may have a resistance Zr, which is a value obtained by summing up the resistance components R2 expressing the propagation loss of.
  • the resistance Zr of the parallel arm resonators P1 to P4 can be appropriately set so as to be small. As a result, the conductance of the first filter circuit 10 can be reduced, and the reduction of the insertion loss in the pass band of the second filter circuit 50 can be suppressed.
  • the resistance component R1 expressing the resistance loss of the electrode finger and the resistance component R2 expressing the signal propagation loss are relational expressions in which the logarithm P of the IDT electrode 30, the cross width L, the duty D and the electrode film thickness T are variables. It may be a value derived by.
  • the resistance Zr of the parallel arm resonators P1 to P4 can be appropriately set so as to be small. As a result, the conductance of the first filter circuit 10 can be reduced, and the reduction of the insertion loss in the pass band of the second filter circuit 50 can be suppressed.
  • Zr is a resistance
  • R1 is a resistance component expressing the resistance loss of the electrode finger of the IDT electrode
  • R2 is a resistance component expressing the signal propagation loss in the elastic wave propagation direction
  • P is a logarithm.
  • L is the cross width
  • D is the duty
  • T is the electrode film thickness
  • c1 to c15 and c21 to c33 are the coefficients, the above-mentioned (Equation 1), (Equation 2) and (Equation 3) are used. It may be represented by.
  • the resistance Zr of the parallel arm resonators P1 to P4 can be appropriately set so as to be small. As a result, the conductance of the first filter circuit 10 can be reduced, and the reduction of the insertion loss in the pass band of the second filter circuit 50 can be suppressed.
  • the resonance resistance of the parallel arm resonator P1 closest to the common terminal ct may be the smallest.
  • the conductance of the first filter circuit 10 can be reduced in at least a part of the pass band of the second filter circuit 50. As a result, it is possible to suppress a decrease in the insertion loss of the pass band of the second filter circuit 50.
  • the first filter circuit 10 further has a series arm resonator S1, and the series arm resonator S1 may be provided on the common terminal ct side of the plurality of parallel arm resonators P1 to P4.
  • the series C component can be inserted between the parallel arm resonator P1 and the second filter circuit 50, and the conductance of the first filter circuit 10 can be reduced. As a result, it is possible to suppress a decrease in the insertion loss of the pass band of the second filter circuit 50.
  • the resonance frequency of the parallel arm resonator P1 closest to the common terminal ct may be in the band between the pass band of the first filter circuit 10 and the pass band of the second filter circuit 50.
  • the L component of the parallel arm resonator P1 does not enter the pass band of the second filter circuit 50, for example, when the series arm resonator S1 is added to the common terminal ct side, the impedance on the Smith chart.
  • the characteristics can be sufficiently moved to the open side. As a result, it is possible to suppress a decrease in the insertion loss of the pass band of the second filter circuit 50.
  • the parallel arm resonator P1 closest to the common terminal ct may be directly connected to the ground without using an inductor.
  • the resistance Zr of a single parallel arm resonator P1 can be reduced.
  • the conductance of the first filter circuit 10 can be reduced, and the reduction of the insertion loss in the pass band of the second filter circuit 50 can be suppressed.
  • the other parallel arm resonators P2 to P4 except for the parallel arm resonator P1 closest to the common terminal ct are directly connected to the ground without passing through the inductor, and the parallel arm resonator P1 closest to the common terminal ct and the ground are connected to the ground.
  • the length of the wiring connecting the and may be shorter than the length of the wiring connecting the other parallel arm resonators P2 to P4 and the ground.
  • the resistance of the parallel arm resonator P1 alone can be made smaller than that of the other parallel arm resonators P2 to P4.
  • the conductance of the first filter circuit 10 can be reduced, and the reduction of the insertion loss in the pass band of the second filter circuit 50 can be suppressed.
  • the present invention includes another embodiment realized by combining arbitrary components in the above-described embodiment and the above-mentioned embodiments.
  • the present invention also includes modification examples obtained by subjecting various modifications to the embodiments that can be conceived by those skilled in the art without departing from the gist of the present invention, and high frequency front-end circuits and communication devices including a multiplexer according to the present invention. ..
  • the first filter circuit 10 may have a ⁇ -type ladder filter structure, and the parallel arm resonator P1 may be arranged on the common terminal ct side of the series arm resonator S1.
  • the first filter circuit 10 includes a parallel arm resonator P1 which is a trap filter (a filter that attenuates only a certain frequency component), and the parallel arm resonator P1 is on the common terminal ct side of the series arm resonator S1. It may be provided in.
  • the pass band of the first filter circuit 10 is set to be lower than the pass band of the second filter circuit 50, but the pass band of the first filter circuit 10 is not limited to this. , It may be set to be higher than the pass band of the second filter circuit 50.
  • the first filter circuit 10 is a transmission filter
  • the present invention is not limited to this, and the first filter circuit 10 may be a reception filter.
  • the multiplexer 1 is not limited to the configuration including both the transmission filter and the reception filter, and may be configured to include only the transmission filter or only the reception filter.
  • a multiplexer including two filters has been described as an example, but the present invention also relates to, for example, a triplexer in which the antenna terminals of three filters are shared and a hexaplexer in which the antenna terminals of six filters are shared. Can be applied. That is, the multiplexer need only have two or more filters.
  • the materials constituting the electrode layer 325 and the dielectric layer 326 of the IDT electrode 30 are not limited to the above-mentioned materials. Further, the IDT electrode 30 does not have to have the above-mentioned laminated structure.
  • the IDT electrode 30 may be made of, for example, a metal or alloy such as Ti, Al, Cu, Pt, Au, Ag, Pd, or may be made of a plurality of laminates made of the above metal or alloy. You may.
  • a substrate having piezoelectricity is shown as the substrate 320, but the substrate may be a piezoelectric substrate composed of a single layer of a piezoelectric layer.
  • the piezoelectric substrate in this case is composed of, for example, a piezoelectric single crystal of LiTaO 3 or another piezoelectric single crystal such as LiNbO 3 .
  • the substrate 320 on which the IDT electrode 30 is formed may be entirely made of a piezoelectric layer or may have a structure in which the piezoelectric layer is laminated on the support substrate, as long as it has piezoelectricity.
  • the cut angle of the substrate 320 according to the above embodiment is not limited.
  • the laminated structure, material, and thickness may be appropriately changed according to the required passing characteristics of the surface acoustic wave filter, and the LiTaO 3 piezoelectric substrate or LiNbO having a cut angle other than the cut angle shown in the above embodiment may be changed. 3 It is possible to obtain the same effect even with an elastic surface wave filter using a piezoelectric substrate or the like.
  • the present invention can be widely used in communication devices such as mobile phones as multiplexers, front-end circuits and communication devices.
  • antenna element 10 1st filter circuit 30 IDT electrode 50 2nd filter circuit 320 substrate 325 electrode layer 326 dielectric layer ca, cb comb tooth electrode C1, C2 capacitance component d1 elastic wave propagation direction d2 orthogonal direction D duty fa , Fb Electrode finger L Cross width L1 Inductance component n0, n1, n2, n3, n4 Node P log P0, P1, P2, P3, P4, P51, P52, P53, P54 Parallel arm resonator R1, R2, R3 Resistance component r1 1st path r2 2nd path S0, S1, S2, S3, S4, S5, S51, S52, S53, S54, S55 Series arm resonator ct Common terminal t1 1st terminal t2 2nd terminal T Electrode film thickness Zr resistance

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Abstract

This multiplexer (1) comprises: a common terminal (tc); a first terminal (t1) and a second terminal (t2); a first filter circuit (10) provided on a first path (r1) connecting the common terminal (tc) and the first terminal (t1); and a second filter circuit (50) provided on a second path (r2) connecting the common terminal (tc) and the second terminal (t2). The first filter circuit (10) has a plurality of parallel arm resonators (P1-P4). In a pass band of the second filter circuit (50), the resistance (Zr) of a single parallel arm resonator (P1), closest to the common terminal (tc) among the plurality of parallel arm resonators (P1-P4), is the lowest.

Description

マルチプレクサMultiplexer
 本発明は、複数のフィルタを備えるマルチプレクサに関する。 The present invention relates to a multiplexer having a plurality of filters.
 従来、複数のフィルタを備えるマルチプレクサが知られている。この種のマルチプレクサの一例として、特許文献1には、一方のフィルタおよび他方のフィルタを備えるマルチプレクサが開示されている。一方のフィルタは、直列腕共振子および並列腕共振子を有するラダー型のフィルタによって構成されている。 Conventionally, a multiplexer having a plurality of filters is known. As an example of this type of multiplexer, Patent Document 1 discloses a multiplexer including one filter and the other filter. One filter is composed of a ladder type filter having a series arm resonator and a parallel arm resonator.
国際公開第2016/031391号International Publication No. 2016/031391
 例えば、一方のフィルタが並列腕共振子を有している場合、並列腕共振子の影響により、他方のフィルタの通過帯域の挿入損失が低下することがある。 For example, when one filter has a parallel arm resonator, the insertion loss of the pass band of the other filter may decrease due to the influence of the parallel arm resonator.
 本発明の目的は、一方のフィルタおよび他方のフィルタを備えるマルチプレクサにおいて、他方のフィルタの通過帯域の挿入損失が低下することを抑制することである。 An object of the present invention is to suppress a decrease in insertion loss in the pass band of the other filter in a multiplexer including one filter and the other filter.
 上記目的を達成するために、本発明の一態様に係るマルチプレクサは、共通端子、第1端子および第2端子と、前記共通端子と前記第1端子とを結ぶ第1の経路上に設けられた第1フィルタ回路と、前記共通端子と前記第2端子とを結ぶ第2の経路上に設けられた第2フィルタ回路と、を備え、前記第1フィルタ回路は、複数の並列腕共振子を有し、前記第2フィルタ回路の通過帯域において、前記複数の並列腕共振子のうち前記共通端子に最も近い並列腕共振子の単体のレジスタンスが最も小さい。 In order to achieve the above object, the multiplexer according to one aspect of the present invention is provided on a first path connecting a common terminal, a first terminal and a second terminal, and the common terminal and the first terminal. A first filter circuit and a second filter circuit provided on a second path connecting the common terminal and the second terminal are provided, and the first filter circuit has a plurality of parallel arm resonators. However, in the pass band of the second filter circuit, the resistance of a single parallel arm resonator closest to the common terminal among the plurality of parallel arm resonators is the smallest.
 本発明によれば、一方のフィルタおよび他方のフィルタを備えるマルチプレクサにおいて、他方のフィルタの通過帯域の挿入損失が低下することを抑制できる。 According to the present invention, in a multiplexer including one filter and the other filter, it is possible to suppress a decrease in the insertion loss of the pass band of the other filter.
図1は、本発明の検討例におけるマルチプレクサを示す回路構成図である。FIG. 1 is a circuit configuration diagram showing a multiplexer in a study example of the present invention. 図2は、図1に示すマルチプレクサの第1フィルタ回路が備える並列腕共振子のインピーダンス特性を示すグラフである。FIG. 2 is a graph showing the impedance characteristics of the parallel arm resonator included in the first filter circuit of the multiplexer shown in FIG. 図3は、図2に示した並列腕共振子のインピーダンス特性を示すスミスチャートである。FIG. 3 is a Smith chart showing the impedance characteristics of the parallel arm resonator shown in FIG. 図4は、図2に示した並列腕共振子の単体のレジスタンスを示すグラフである。FIG. 4 is a graph showing the resistance of a single parallel arm resonator shown in FIG. 図5は、図1に示す第1フィルタ回路から直列腕共振子を除いた残りの回路のインピーダンス特性を示すスミスチャートである。FIG. 5 is a Smith chart showing the impedance characteristics of the remaining circuit excluding the series arm resonator from the first filter circuit shown in FIG. 図6は、図1に示す第1フィルタ回路のインピーダンス特性を示すスミスチャートである。FIG. 6 is a Smith chart showing the impedance characteristics of the first filter circuit shown in FIG. 図7は、図1に示す第1フィルタ回路のコンダクタンスを示すグラフである。FIG. 7 is a graph showing the conductance of the first filter circuit shown in FIG. 図8は、図1に示す第2フィルタ回路の通過特性を示すグラフである。FIG. 8 is a graph showing the passage characteristics of the second filter circuit shown in FIG. 図9は、実施の形態に係るマルチプレクサを示す回路構成図である。FIG. 9 is a circuit configuration diagram showing a multiplexer according to the embodiment. 図10は、実施の形態に係るマルチプレクサの第1フィルタ回路が備える弾性波共振子のIDT電極の構造を示す図である。FIG. 10 is a diagram showing the structure of the IDT electrode of the elastic wave resonator included in the first filter circuit of the multiplexer according to the embodiment. 図11Aは、実施例の第1フィルタ回路が備える並列腕共振子の設計パラメータを示す図である。FIG. 11A is a diagram showing design parameters of the parallel arm resonator included in the first filter circuit of the embodiment. 図11Bは、比較例の第1フィルタ回路が備える並列腕共振子の設計パラメータを示す図である。FIG. 11B is a diagram showing design parameters of the parallel arm resonator included in the first filter circuit of the comparative example. 図12Aは、実施例における並列腕共振子のインピーダンス特性を示すグラフである。FIG. 12A is a graph showing the impedance characteristics of the parallel arm resonators in the embodiment. 図12Bは、比較例における並列腕共振子のインピーダンス特性を示すグラフである。FIG. 12B is a graph showing the impedance characteristics of the parallel arm resonators in the comparative example. 図13Aは、実施例における並列腕共振子のインピーダンス特性を示すスミスチャートである。FIG. 13A is a Smith chart showing the impedance characteristics of the parallel arm resonators in the embodiment. 図13Bは、比較例における並列腕共振子のインピーダンス特性を示すスミスチャートである。FIG. 13B is a Smith chart showing the impedance characteristics of the parallel arm resonators in the comparative example. 図14Aは、実施例における並列腕共振子の単体のレジスタンスを示すグラフである。FIG. 14A is a graph showing the resistance of a single parallel arm resonator in the embodiment. 図14Bは、比較例における並列腕共振子の単体のレジスタンスを示すグラフである。FIG. 14B is a graph showing the resistance of a single parallel arm resonator in the comparative example. 図15は、実施例および比較例におけるマルチプレクサの第1フィルタ回路のインピーダンス特性を示すスミスチャートである。FIG. 15 is a Smith chart showing the impedance characteristics of the first filter circuit of the multiplexer in Examples and Comparative Examples. 図16は、実施例および比較例におけるマルチプレクサの第1フィルタ回路のコンダクタンスを示すグラフである。FIG. 16 is a graph showing the conductance of the first filter circuit of the multiplexer in Examples and Comparative Examples. 図17は、実施例および比較例におけるマルチプレクサの第2フィルタ回路の通過特性を示す図である。FIG. 17 is a diagram showing the pass characteristics of the second filter circuit of the multiplexer in Examples and Comparative Examples. 図18は、並列腕共振子の等価回路を示す図である。FIG. 18 is a diagram showing an equivalent circuit of parallel arm resonators. 図19は、並列腕共振子の設計パラメータ、および、並列腕共振子の共振抵抗を示す図である。FIG. 19 is a diagram showing the design parameters of the parallel arm resonator and the resonance resistance of the parallel arm resonator. 図20は、並列腕共振子の共振抵抗と設計パラメータとの関係を示す図である。FIG. 20 is a diagram showing the relationship between the resonance resistance of the parallel arm resonator and the design parameter. 図21は、並列腕共振子にインダクタが接続された回路のインピーダンス特性を示すグラフである。FIG. 21 is a graph showing the impedance characteristics of a circuit in which an inductor is connected to a parallel arm resonator. 図22は、並列腕共振子にインダクタが接続された回路のレジスタンスを示すグラフである。FIG. 22 is a graph showing the resistance of a circuit in which an inductor is connected to a parallel arm resonator.
 (本発明に至る経緯)
 本発明に至る経緯について、本発明の検討例1および2を例に挙げて説明する。なお、本発明の検討例1、2は、従来技術ではなく、本発明を説明するための一例である。
(Background to the present invention)
The background to the present invention will be described with reference to Examples 1 and 2 of the present invention as examples. It should be noted that Study Examples 1 and 2 of the present invention are examples for explaining the present invention, not the prior art.
 図1は、本発明の検討例1、2におけるマルチプレクサ1を示す回路構成図である。 FIG. 1 is a circuit configuration diagram showing a multiplexer 1 in Study Examples 1 and 2 of the present invention.
 検討例1、2の各マルチプレクサ1は、一方のフィルタである第1フィルタ回路10、および、他方のフィルタである第2フィルタ回路50を備えている。第1フィルタ回路10は、共通端子tcと第1端子t1とを結ぶ第1の経路r1上に配置されている。第2フィルタ回路50は、共通端子tcと第2端子t2とを結ぶ第2の経路r2上に配置されている。第1フィルタ回路10は、直列腕共振子S0および並列腕共振子P0を備えるラダー型のフィルタで構成されている。直列腕共振子S0は、第1の経路r1上において、並列腕共振子P0よりも共通端子tc側に配置されている。 Each multiplexer 1 of the examples 1 and 2 includes a first filter circuit 10 which is one filter and a second filter circuit 50 which is the other filter. The first filter circuit 10 is arranged on the first path r1 connecting the common terminal tc and the first terminal t1. The second filter circuit 50 is arranged on the second path r2 connecting the common terminal tc and the second terminal t2. The first filter circuit 10 is composed of a ladder type filter including a series arm resonator S0 and a parallel arm resonator P0. The series arm resonator S0 is arranged on the first path r1 on the common terminal ct side of the parallel arm resonator P0.
 例えば、第1フィルタ回路10の通過帯域は、1805MHz~1880MHzであり、第2フィルタ回路50の通過帯域は、1710MHz~1785MHzである。以降において、第1フィルタ回路10の通過帯域を自帯域と呼び、第2フィルタ回路50の通過帯域を相手帯域と呼ぶ場合がある。 For example, the pass band of the first filter circuit 10 is 1805 MHz to 1880 MHz, and the pass band of the second filter circuit 50 is 1710 MHz to 1785 MHz. Hereinafter, the pass band of the first filter circuit 10 may be referred to as an own band, and the pass band of the second filter circuit 50 may be referred to as a mating band.
 検討例1、2のマルチプレクサ1の回路構成は、互いに同じであるが、以下に示すように、並列腕共振子P0の特性が異なっている。まず、図2~図4を参照して、第1フィルタ回路10の並列腕共振子P0の特性と、相手帯域に発生する損失との関係について説明する。 The circuit configurations of the multiplexers 1 of Study Examples 1 and 2 are the same as each other, but the characteristics of the parallel arm resonator P0 are different as shown below. First, with reference to FIGS. 2 to 4, the relationship between the characteristics of the parallel arm resonator P0 of the first filter circuit 10 and the loss generated in the mating band will be described.
 図2は、図1に示すマルチプレクサ1の第1フィルタ回路10が備える並列腕共振子P0のインピーダンス特性を示すグラフである。この図では、自帯域のうち1805MHzに相当する位置がマーカM7で示され、1880MHzに相当する位置がマーカM8で示されている。また、相手帯域のうち1710MHzに相当する位置がマーカM5で示され、1785MHzに相当する位置がマーカM6で示されている。 FIG. 2 is a graph showing the impedance characteristics of the parallel arm resonator P0 included in the first filter circuit 10 of the multiplexer 1 shown in FIG. In this figure, the position corresponding to 1805 MHz in the own band is indicated by the marker M7, and the position corresponding to 1880 MHz is indicated by the marker M8. Further, the position corresponding to 1710 MHz in the other band is indicated by the marker M5, and the position corresponding to 1785 MHz is indicated by the marker M6.
 検討例1の並列腕共振子P0および検討例2の並列腕共振子P0は、図2に示すようなインピーダンス特性を有している。 The parallel arm resonator P0 of Study Example 1 and the parallel arm resonator P0 of Study Example 2 have impedance characteristics as shown in FIG.
 図3は、図2に示した並列腕共振子P0のインピーダンス特性を示すスミスチャートである。検討例1の並列腕共振子P0は、マーカM5~M6で示す相手帯域において、検討例2の並列腕共振子P0よりも、インピーダンス特性がスミスチャートの外周円の近くに位置している。つまり、検討例1の並列腕共振子P0は、検討例2の並列腕共振子P0よりも、相手帯域にて発生する損失が小さい。 FIG. 3 is a Smith chart showing the impedance characteristics of the parallel arm resonator P0 shown in FIG. The parallel arm resonator P0 of the study example 1 has an impedance characteristic located closer to the outer peripheral circle of the Smith chart than the parallel arm resonator P0 of the study example 2 in the mating band indicated by the markers M5 to M6. That is, the parallel arm resonator P0 of the study example 1 has a smaller loss generated in the mating band than the parallel arm resonator P0 of the study example 2.
 図4は、図2に示した並列腕共振子P0の単体のレジスタンスを示すグラフである。図4には、図3に示したインピーダンス特性のうちのインピーダンス実部が示されている。この図に示すように、マーカM5~M6で示す相手帯域において、検討例1は、検討例2よりも、並列腕共振子P0の単体のレジスタンスが小さくなっている。 FIG. 4 is a graph showing the resistance of the parallel arm resonator P0 shown in FIG. 2 alone. FIG. 4 shows the actual impedance portion of the impedance characteristics shown in FIG. As shown in this figure, in the mating band indicated by the markers M5 to M6, the resistance of the parallel arm resonator P0 alone is smaller in the study example 1 than in the study example 2.
 図3および図4に示すように、並列腕共振子P0の単体のレジスタンスと、相手帯域に発生する損失とは関連性がある。例えば、相手帯域に発生する損失を小さくするには、並列腕共振子P0の単体のレジスタンスを小さくすることが望ましい。 As shown in FIGS. 3 and 4, the resistance of the parallel arm resonator P0 alone is related to the loss generated in the mating band. For example, in order to reduce the loss generated in the mating band, it is desirable to reduce the resistance of the parallel arm resonator P0 alone.
 次に、図5~図8を参照して、第1フィルタ回路10の直列腕共振子S0および並列腕共振子P0が、相手帯域に与える影響について説明する。 Next, with reference to FIGS. 5 to 8, the influence of the series arm resonator S0 and the parallel arm resonator P0 of the first filter circuit 10 on the mating band will be described.
 図5は、図1に示す第1フィルタ回路10から直列腕共振子S0を除いた残りの回路のインピーダンス特性を示すスミスチャートである。具体的には、図5には、並列腕共振子P0が接続されている第1の経路r1のノードn1から、並列腕共振子P0を含む残り回路を見た場合の特性が示されている。 FIG. 5 is a Smith chart showing the impedance characteristics of the remaining circuits excluding the series arm resonator S0 from the first filter circuit 10 shown in FIG. Specifically, FIG. 5 shows the characteristics when the remaining circuit including the parallel arm resonator P0 is viewed from the node n1 of the first path r1 to which the parallel arm resonator P0 is connected. ..
 図5に示すように、マーカM5~M6で示す相手帯域では、検討例1よりも検討例2のインピーダンス特性のほうが、スミスチャートの外周円から離れている。インピーダンス特性が外周円から離れるのは、検討例1よりも検討例2のほうが、前述した並列腕共振子P0のレジスタンス成分(抵抗成分)が大きいからである。 As shown in FIG. 5, in the mating band indicated by the markers M5 to M6, the impedance characteristic of the study example 2 is farther from the outer circle of the Smith chart than the study example 1. The reason why the impedance characteristic is separated from the outer peripheral circle is that the resistance component (resistance component) of the parallel arm resonator P0 described above is larger in the study example 2 than in the study example 1.
 図6は、図1に示す第1フィルタ回路10のインピーダンス特性を示すスミスチャートである。図7は、図1に示す第1フィルタ回路10のコンダクタンスを示すグラフである。図8は、図1に示す第2フィルタ回路50の通過特性を示すグラフである。図6および図7には、図5で示した並列腕共振子P0に直列腕共振子S0を付加した回路、すなわち、直列腕共振子S0を含む第1フィルタ回路10を共通端子tc側から見た場合の特性が示されている。 FIG. 6 is a Smith chart showing the impedance characteristics of the first filter circuit 10 shown in FIG. FIG. 7 is a graph showing the conductance of the first filter circuit 10 shown in FIG. FIG. 8 is a graph showing the passage characteristics of the second filter circuit 50 shown in FIG. 6 and 7 show a circuit in which the series arm resonator S0 is added to the parallel arm resonator P0 shown in FIG. 5, that is, the first filter circuit 10 including the series arm resonator S0 is viewed from the common terminal tk side. The characteristics of the case are shown.
 並列腕共振子P0に直列腕共振子S0を付加することで、図6に示すように、インピーダンス特性が反時計回りに回転し、相手帯域におけるインピーダンス特性がオープン側に移動する。しかしながら、インピーダンス特性がオープン側に移動した場合でも、並列腕共振子P0のレジスタンス成分が残ってしまう。そのため、図7に示すように、検討例1よりも検討例2のほうが、相手帯域におけるコンダクタンスが大きくなる。その結果、図8に示すように第2フィルタ回路50の通過特性(EL特性)で比較すると、検討例1よりも検討例2のほうが、第2フィルタ回路50の通過帯域における挿入損失が低下している。 By adding the series arm resonator S0 to the parallel arm resonator P0, the impedance characteristic rotates counterclockwise and the impedance characteristic in the mating band moves to the open side, as shown in FIG. However, even when the impedance characteristic moves to the open side, the resistance component of the parallel arm resonator P0 remains. Therefore, as shown in FIG. 7, the conductance in the mating band is larger in the study example 2 than in the study example 1. As a result, as shown in FIG. 8, when the pass characteristics (EL characteristics) of the second filter circuit 50 are compared, the insertion loss in the pass band of the second filter circuit 50 is lower in the study example 2 than in the study example 1. ing.
 このように、並列腕共振子P0に直列腕共振子S0を付加することで、スミスチャート上において、第1フィルタ回路10のインピーダンス特性をオープン側に移動させることができる。しかし、元々の並列腕共振子P0のレジスタンス成分が大きいと、オープン側に移動したとしても、スミスチャートの外周円への張り付きが悪くなり、実部成分が大きくなってしまう。相手帯域に発生する損失を小さくするには、直列腕共振子S0を付加する前の並列腕共振子P0の単体のレジスタンスを小さくする必要がある。 In this way, by adding the series arm resonator S0 to the parallel arm resonator P0, the impedance characteristic of the first filter circuit 10 can be moved to the open side on the Smith chart. However, if the resistance component of the original parallel arm resonator P0 is large, even if the Smith chart is moved to the open side, the Smith chart will not stick to the outer peripheral circle, and the real part component will become large. In order to reduce the loss generated in the mating band, it is necessary to reduce the resistance of the parallel arm resonator P0 before adding the series arm resonator S0.
 本実施の形態では、第2フィルタ回路50の通過帯域における挿入損失が低下することを抑制するため、第1フィルタ回路10の並列腕共振子が以下に示す構成を有している。 In the present embodiment, the parallel arm resonator of the first filter circuit 10 has the following configuration in order to suppress the reduction of the insertion loss in the pass band of the second filter circuit 50.
 以下、本発明の実施の形態について、実施の形態および図面を用いて詳細に説明する。なお、以下で説明する実施の形態は、いずれも包括的または具体的な例を示すものである。以下の実施の形態で示される数値、形状、材料、構成要素、構成要素の配置および接続形態などは、一例であり、本発明を限定する主旨ではない。以下の実施の形態における構成要素のうち、独立請求項に記載されていない構成要素については、任意の構成要素として説明される。また、図面に示される構成要素の大きさ、または大きさの比は、必ずしも厳密ではない。また、各図において、実質的に同一の構成に対しては同一の符号を付しており、重複する説明は省略または簡略化する場合がある。また、以下の実施の形態において、「接続される」とは、直接接続される場合だけでなく、他の素子等を介して電気的に接続される場合も含まれる。 Hereinafter, embodiments of the present invention will be described in detail with reference to embodiments and drawings. It should be noted that all of the embodiments described below show comprehensive or specific examples. The numerical values, shapes, materials, components, arrangement of components, connection modes, etc. shown in the following embodiments are examples, and are not intended to limit the present invention. Among the components in the following embodiments, the components not described in the independent claims are described as arbitrary components. Also, the sizes of the components shown in the drawings, or the ratio of sizes, are not always exact. Further, in each figure, the same reference numerals are given to substantially the same configurations, and duplicate explanations may be omitted or simplified. Further, in the following embodiments, "connected" includes not only the case of being directly connected but also the case of being electrically connected via another element or the like.
 (実施の形態)
 [1.マルチプレクサの構成]
 実施の形態に係るマルチプレクサの構成について、図9を参照しながら説明する。
(Embodiment)
[1. Multiplexer configuration]
The configuration of the multiplexer according to the embodiment will be described with reference to FIG.
 図9は、実施の形態に係るマルチプレクサ1を示す回路構成図である。なお、図9にはアンテナ素子9も示されている。 FIG. 9 is a circuit configuration diagram showing the multiplexer 1 according to the embodiment. Note that FIG. 9 also shows the antenna element 9.
 マルチプレクサ1は、周波数通過帯域が異なる複数のフィルタを備える分波器または合波器である。図9に示すように、マルチプレクサ1は、一方のフィルタである第1フィルタ回路10と、他方のフィルタである第2フィルタ回路50とを備えている。また、マルチプレクサ1は、共通端子tc、第1端子t1および第2端子t2を備えている。第1フィルタ回路10および第2フィルタ回路50の通過帯域は、前述した検討例1、2と同様である。 The multiplexer 1 is a demultiplexer or combiner including a plurality of filters having different frequency pass bands. As shown in FIG. 9, the multiplexer 1 includes a first filter circuit 10 which is one filter and a second filter circuit 50 which is the other filter. Further, the multiplexer 1 includes a common terminal tc, a first terminal t1 and a second terminal t2. The pass bands of the first filter circuit 10 and the second filter circuit 50 are the same as those of Study Examples 1 and 2 described above.
 共通端子tcは、マルチプレクサ1のアンテナ端子であり、マルチプレクサ1の外部に配置されたアンテナ素子9に接続される。また、共通端子tcは、第1フィルタ回路10および第2フィルタ回路50のそれぞれに接続される。具体的には、共通端子tcは、第1フィルタ回路10と第1端子t1との間のノードn0を介して第1フィルタ回路10に接続され、また、ノードn0を介して第2フィルタ回路50に接続される。なお、ノードn0は、後述する第1の経路r1および第2の経路r2が束ねられている束ね点である。 The common terminal ct is an antenna terminal of the multiplexer 1, and is connected to an antenna element 9 arranged outside the multiplexer 1. Further, the common terminal tc is connected to each of the first filter circuit 10 and the second filter circuit 50. Specifically, the common terminal tc is connected to the first filter circuit 10 via the node n0 between the first filter circuit 10 and the first terminal t1, and the second filter circuit 50 via the node n0. Connected to. The node n0 is a bundling point where the first path r1 and the second path r2, which will be described later, are bundled.
 第1端子t1は、第1フィルタ回路10に接続されている。また、第1端子t1は、マルチプレクサ1の外部に配置された増幅回路等(図示せず)を介してRF信号処理回路(図示せず)に接続される。 The first terminal t1 is connected to the first filter circuit 10. Further, the first terminal t1 is connected to an RF signal processing circuit (not shown) via an amplifier circuit or the like (not shown) arranged outside the multiplexer 1.
 第2端子t2は、第2フィルタ回路50に接続されている。また、第2端子t2は、マルチプレクサ1の外部に配置された増幅回路等(図示せず)を介してRF信号処理回路(図示せず)に接続される。 The second terminal t2 is connected to the second filter circuit 50. Further, the second terminal t2 is connected to an RF signal processing circuit (not shown) via an amplifier circuit or the like (not shown) arranged outside the multiplexer 1.
 第1フィルタ回路10は、共通端子tcと第1端子t1とを結ぶ第1の経路r1上に配置されている。第1フィルタ回路10は、例えば、下り周波数帯(受信帯域)を通過帯域とする受信フィルタであり、第2フィルタ回路50よりも通過帯域が高くなるように設定される。 The first filter circuit 10 is arranged on the first path r1 connecting the common terminal tc and the first terminal t1. The first filter circuit 10 is, for example, a reception filter having a downlink frequency band (reception band) as a pass band, and is set so that the pass band is higher than that of the second filter circuit 50.
 第1フィルタ回路10は、弾性波共振子である直列腕共振子S1、S2、S3、S4、S5および並列腕共振子P1、P2、P3、P4を備えている。弾性波共振子は、例えば、弾性表面波を利用したSAW(Surface Acoustic Wave)共振子である。 The first filter circuit 10 includes series arm resonators S1, S2, S3, S4, S5 and parallel arm resonators P1, P2, P3, P4, which are elastic wave resonators. The surface acoustic wave resonator is, for example, a SAW (Surface Acoustic Wave) resonator using an elastic surface wave.
 直列腕共振子S1~S5は、共通端子tcと第1端子t1とを結ぶ第1の経路(直列腕)r1上に配置されている。直列腕共振子S1~S5は、共通端子tcから第1端子t1に向かって、この順で直列に接続されている。直列腕共振子S1は、複数の並列腕共振子P1~P4よりも共通端子tc側に設けられている。 The series arm resonators S1 to S5 are arranged on the first path (series arm) r1 connecting the common terminal tc and the first terminal t1. The series arm resonators S1 to S5 are connected in series in this order from the common terminal tc toward the first terminal t1. The series arm resonator S1 is provided on the common terminal ct side of the plurality of parallel arm resonators P1 to P4.
 並列腕共振子P1~P4は、第1の経路r1上にて隣り合う直列腕共振子S1~S5の間の各ノードn1、n2、n3、n4と基準端子(グランド)とを結ぶ経路(並列腕)上に互いに並列に接続されている。具体的には、並列腕共振子P1~P4のうち、共通端子tcに最も近い並列腕共振子P1は、一端が直列腕共振子S1とS2との間のノードn1に接続され、他端が基準端子に接続されている。並列腕共振子P2は、一端が直列腕共振子S2とS3との間のノードn2に接続され、他端が基準端子に接続されている。並列腕共振子P3は、一端が直列腕共振子S3とS4との間のノードn3に接続され、他端が基準端子に接続されている。並列腕共振子P4は、一端が直列腕共振子S4とS5との間のノードn4に接続され、他端が基準端子に接続されている。 The parallel arm resonators P1 to P4 are paths (parallel) connecting the nodes n1, n2, n3, n4 between the adjacent series arm resonators S1 to S5 on the first path r1 and the reference terminal (ground). Arms) are connected in parallel to each other. Specifically, among the parallel arm resonators P1 to P4, one end of the parallel arm resonator P1 closest to the common terminal tc is connected to the node n1 between the series arm resonators S1 and S2, and the other end is connected to the node n1. It is connected to the reference terminal. One end of the parallel arm resonator P2 is connected to the node n2 between the series arm resonators S2 and S3, and the other end is connected to the reference terminal. One end of the parallel arm resonator P3 is connected to the node n3 between the series arm resonators S3 and S4, and the other end is connected to the reference terminal. One end of the parallel arm resonator P4 is connected to the node n4 between the series arm resonators S4 and S5, and the other end is connected to the reference terminal.
 上記のように第1フィルタ回路10は、第1の経路r1上に配置された5つの直列腕共振子S1~S5、および、第1の経路r1と基準端子とを結ぶ経路上に配置された4つの並列腕共振子P1~P4で構成されるT型のラダーフィルタ構造を有している。なお、第1フィルタ回路10を構成する直列腕共振子および並列腕共振子の数は、5つまたは4つに限定されず、直列腕共振子が2つ以上かつ並列腕共振子が2つ以上であればよい。 As described above, the first filter circuit 10 is arranged on the five series arm resonators S1 to S5 arranged on the first path r1 and on the path connecting the first path r1 and the reference terminal. It has a T-shaped ladder filter structure composed of four parallel arm resonators P1 to P4. The number of series arm resonators and parallel arm resonators constituting the first filter circuit 10 is not limited to five or four, and the number of series arm resonators is two or more and the number of parallel arm resonators is two or more. It should be.
 第2フィルタ回路50は、共通端子tcと第2端子t2とを結ぶ第2の経路r2上に配置されている。第2フィルタ回路50は、例えば、上り周波数帯(送信帯域)を通過帯域とする送信フィルタであり、第1フィルタ回路10よりも通過帯域が低くなるように設定される。 The second filter circuit 50 is arranged on the second path r2 connecting the common terminal tc and the second terminal t2. The second filter circuit 50 is, for example, a transmission filter having an uplink frequency band (transmission band) as a pass band, and is set so that the pass band is lower than that of the first filter circuit 10.
 第2フィルタ回路50は、弾性波共振子である直列腕共振子S51、S52、S53、S54、S55および並列腕共振子P51、P52、P53、P54を備えている。 The second filter circuit 50 includes series arm resonators S51, S52, S53, S54, S55 and parallel arm resonators P51, P52, P53, P54 which are elastic wave resonators.
 直列腕共振子S51~S55は、共通端子tcと第2端子t2とを結ぶ第2の経路(直列腕)r2上に配置されている。直列腕共振子S51~S55は、共通端子tcから第2端子t2に向かって、この順で直列に接続されている。 The series arm resonators S51 to S55 are arranged on the second path (series arm) r2 connecting the common terminal tc and the second terminal t2. The series arm resonators S51 to S55 are connected in series in this order from the common terminal tc toward the second terminal t2.
 並列腕共振子P51~P54は、第2の経路r2上にて隣り合う直列腕共振子S51~S55の間の各ノードと基準端子(グランド)とを結ぶ経路(並列腕)上に互いに並列に接続されている。このように第2フィルタ回路50は、第2の経路r2上に配置された5つの直列腕共振子S51~S55、および、第2の経路r2と基準端子とを結ぶ経路上に配置された4つの並列腕共振子P51~P54で構成されるT型のラダーフィルタ構造を有している。 The parallel arm resonators P51 to P54 are parallel to each other on the path (parallel arm) connecting each node between the adjacent series arm resonators S51 to S55 on the second path r2 and the reference terminal (ground). It is connected. As described above, the second filter circuit 50 is arranged on the five series arm resonators S51 to S55 arranged on the second path r2 and the path connecting the second path r2 and the reference terminal 4. It has a T-shaped ladder filter structure composed of two parallel arm resonators P51 to P54.
 なお、第2フィルタ回路50は、上記構成に限定されず、要求されるフィルタ特性等に応じて適宜設計され得る。第2フィルタ回路50は、縦結合型弾性波共振器を有していてもよいし、π型のラダーフィルタ構造を有していてもよい。また、第2フィルタ回路50を構成する各共振子は、SAW共振子に限られず、例えば、BAW(Bulk Acoustic Wave)共振子であってもよい。さらには、第2フィルタ回路50は、共振子を用いずに構成されていてもよく、例えば、LC共振フィルタあるいは誘電体フィルタであってもよい。 The second filter circuit 50 is not limited to the above configuration, and may be appropriately designed according to the required filter characteristics and the like. The second filter circuit 50 may have a vertically coupled elastic wave resonator or may have a π-type ladder filter structure. Further, each resonator constituting the second filter circuit 50 is not limited to the SAW resonator, and may be, for example, a BAW (Bulk Acoustic Wave) resonator. Further, the second filter circuit 50 may be configured without using a resonator, and may be, for example, an LC resonance filter or a dielectric filter.
 第1フィルタ回路10には、第2フィルタ回路50の通過帯域の挿入損失を低下させないような特性が求められる。そのため本実施の形態では、並列腕共振子P1の単体のレジスタンスが、他の並列腕共振子P2~P4の単体のレジスタンスよりも小さくなるように設定されている。これについては後で詳しく説明する。 The first filter circuit 10 is required to have characteristics that do not reduce the insertion loss in the pass band of the second filter circuit 50. Therefore, in the present embodiment, the resistance of the single parallel arm resonator P1 is set to be smaller than the resistance of the other parallel arm resonators P2 to P4 alone. This will be explained in detail later.
 [2.弾性波共振子のIDT電極の構造]
 図10は、マルチプレクサ1の第1フィルタ回路10が備える弾性波共振子のIDT(InterDigital Transducer)電極30の構造を示す図である。並列腕共振子は弾性波共振子の一例であるので、ここでは弾性波共振子を例に挙げて並列腕共振子P1~P4のIDT電極30の構造について説明する。なおこの図は、IDT電極の構造を簡略化して説明するものであって、IDT電極に含まれる電極指の本数や長さなどは、実際とは異なる。
[2. Structure of IDT electrode of elastic wave resonator]
FIG. 10 is a diagram showing a structure of an IDT (InterDigital Transducer) electrode 30 of an elastic wave resonator included in the first filter circuit 10 of the multiplexer 1. Since the parallel arm resonator is an example of an elastic wave resonator, here, the structure of the IDT electrodes 30 of the parallel arm resonators P1 to P4 will be described by taking the elastic wave resonator as an example. Note that this figure is a simplified description of the structure of the IDT electrode, and the number and length of the electrode fingers included in the IDT electrode are different from the actual ones.
 弾性波共振子は、圧電性を有する基板320と、基板320上に形成されたIDT電極30を構成する電極層325と、IDT電極30を覆うように基板320上に設けられた誘電体層326とによって形成される。なお、弾性波共振子は、IDT電極30の他に反射器を備えていてもよい。 The elastic wave resonator includes a substrate 320 having piezoelectricity, an electrode layer 325 constituting the IDT electrode 30 formed on the substrate 320, and a dielectric layer 326 provided on the substrate 320 so as to cover the IDT electrode 30. And formed by. The elastic wave resonator may include a reflector in addition to the IDT electrode 30.
 基板320は、例えば、カット角127.5°のLiNbO基板(ニオブ酸リチウム基板)ある。基板320内を伝搬する弾性波としてレイリー波が使用される場合、基板320のカット角は、120°±20°、または、300°±20°であることが望ましい。 The substrate 320 is, for example, a LiNbO 3 substrate (lithium niobate substrate) having a cut angle of 127.5 °. When a Rayleigh wave is used as an elastic wave propagating in the substrate 320, the cut angle of the substrate 320 is preferably 120 ° ± 20 ° or 300 ° ± 20 °.
 電極層325は、複数の金属層が積層された構造を有している。電極層325は、例えば、上から順に、Ti層、Al層、Ti層、Pt層、NiCr層が積層されることで形成されている。 The electrode layer 325 has a structure in which a plurality of metal layers are laminated. The electrode layer 325 is formed by, for example, laminating a Ti layer, an Al layer, a Ti layer, a Pt layer, and a NiCr layer in this order from the top.
 誘電体層326は、例えば、二酸化ケイ素(SiO)を主成分とする膜である。誘電体層326は、IDT電極30の周波数温度特性を調整すること、電極層325を外部環境から保護すること、または、耐湿性を高めることなどを目的として設けられている。 The dielectric layer 326 is, for example, a film containing silicon dioxide (SiO 2 ) as a main component. The dielectric layer 326 is provided for the purpose of adjusting the frequency temperature characteristic of the IDT electrode 30, protecting the electrode layer 325 from the external environment, or enhancing the moisture resistance.
 IDT電極30のそれぞれは、互いに対向する一対の第1の櫛歯状電極caおよび第2の櫛歯状電極cbによって構成されている。第1の櫛歯状電極caは、櫛歯状の形状を有し、互いに平行な複数の電極指faと、複数の電極指faのそれぞれの一端同士を接続するバスバー電極とで構成されている。第2の櫛歯状電極cbは、櫛歯の形状を有し、互いに平行な複数の電極指fbと、複数の電極指fbのそれぞれの一端同士を接続するバスバー電極とで構成されている。各バスバー電極は、弾性波伝搬方向d1に沿って延びるように形成されている。電極指faおよび電極指fbは、弾性波伝搬方向d1の直交方向d2に延びるように形成され、直交方向d2に互いに間挿し合い、弾性波伝搬方向d1に対向している。 Each of the IDT electrodes 30 is composed of a pair of first comb-shaped electrodes ca and second comb-shaped electrodes cb facing each other. The first comb-shaped electrode ca has a comb-shaped shape and is composed of a plurality of electrode finger fas parallel to each other and a bus bar electrode connecting one end of each of the plurality of electrode finger fas. .. The second comb-shaped electrode cb has the shape of a comb tooth and is composed of a plurality of electrode fingers fb parallel to each other and a bus bar electrode connecting one ends of the plurality of electrode fingers fb to each other. Each bus bar electrode is formed so as to extend along the elastic wave propagation direction d1. The electrode finger fa and the electrode finger fb are formed so as to extend in the orthogonal direction d2 of the elastic wave propagation direction d1, intersperse with each other in the orthogonal direction d2, and face the elastic wave propagation direction d1.
 ここで、弾性波共振子の設計パラメータである、波長λ、IDT電極30の対数(ついすう)P、交差幅L、デューティDおよび電極膜厚T等について説明する。 Here, the design parameters of the elastic wave resonator, such as wavelength λ, logarithm P of IDT electrode 30, cross width L, duty D, and electrode film thickness T, will be described.
 弾性波共振子の波長は、IDT電極30を構成する複数の電極指faまたはfbの繰り返し周期である波長λで規定される。なお、電極ピッチは、波長λの1/2であり、各櫛歯状電極ca、cbを構成する各電極指fa、fbのライン幅をWとし、隣り合う電極指faと電極指fbとの間のスペース幅をSとした場合、電極ピッチ=(W+S)で定義される。交差幅Lは、一対の櫛歯状電極caおよびcbが間挿し合う距離であり、弾性波伝搬方向d1から見た場合に、電極指fa、fbが互いに重なる長さである。IDT電極30のデューティDは、複数の電極指faおよびfbのライン幅占有率であり、D=W/(W+S)で定義される。IDT電極30の対数Pは、電極指faおよびfbを1組とした場合の組数であり、P=(電極指の総本数-1)/2で定義される。電極膜厚Tは、電極層325の厚みである。電極層325が複数の金属層で構成されている場合、例えば、各金属層を密度換算してAl層に置き換えた場合の合計膜厚が採用される。具体的には、電極層325が、第1の金属層、第2の金属層および第3の金属層による積層構造からなる場合、第1の金属層のAl換算膜厚は、第1の金属層の密度と第1の金属層の膜厚との積をAlの密度により割った値であり、電極層325のAl換算膜厚は、第1の金属層、第2の金属層、第3の金属層のそれぞれのAl換算膜厚の合計である。 The wavelength of the elastic wave resonator is defined by the wavelength λ which is the repetition period of the plurality of electrode fingers fa or fb constituting the IDT electrode 30. The electrode pitch is 1/2 of the wavelength λ, the line width of each electrode finger fa and fb constituting each comb tooth-shaped electrode ca and cb is W, and the adjacent electrode finger fa and the electrode finger fb are used. When the space width between them is S, it is defined by the electrode pitch = (W + S). The crossing width L is a distance between the pair of comb-shaped electrodes ca and cb, and is a length at which the electrode fingers fa and fb overlap each other when viewed from the elastic wave propagation direction d1. The duty D of the IDT electrode 30 is the line width occupancy of the plurality of electrode fingers fa and fb, and is defined by D = W / (W + S). The logarithm P of the IDT electrode 30 is the number of pairs when the electrode fingers fa and fb are set as one set, and is defined by P = (total number of electrode fingers-1) / 2. The electrode film thickness T is the thickness of the electrode layer 325. When the electrode layer 325 is composed of a plurality of metal layers, for example, the total film thickness when each metal layer is converted into a density and replaced with an Al layer is adopted. Specifically, when the electrode layer 325 has a laminated structure consisting of a first metal layer, a second metal layer, and a third metal layer, the Al equivalent film thickness of the first metal layer is the first metal. It is a value obtained by dividing the product of the layer density and the film thickness of the first metal layer by the density of Al, and the Al equivalent film thickness of the electrode layer 325 is the first metal layer, the second metal layer, and the third. It is the total of the Al equivalent film thickness of each of the metal layers of.
 各並列腕共振子P1~P4の単体のレジスタンスは、これらの設計パラメータを変えることで調整可能である。 The resistance of each parallel arm resonator P1 to P4 alone can be adjusted by changing these design parameters.
 [3.実施例および比較例の対比]
 上記構成を有する実施の形態のマルチプレクサ1の特性について、比較例のマルチプレクサの特性と対比させながら説明する。なお、以下では、実施の形態の一例である実施例を例に挙げて説明する。また、比較例のマルチプレクサは、図9および図10と同じ回路構成を有しているので、ここでは実施例と同じ符号を用いて説明する。
[3. Comparison of Examples and Comparative Examples]
The characteristics of the multiplexer 1 of the embodiment having the above configuration will be described in comparison with the characteristics of the multiplexer of the comparative example. In the following, an embodiment, which is an example of the embodiment, will be described as an example. Further, since the multiplexer of the comparative example has the same circuit configuration as that of FIGS. 9 and 10, it will be described here using the same reference numerals as those of the embodiment.
 図11Aは、実施例の第1フィルタ回路10が備える並列腕共振子P1~P4の設計パラメータを示す図である。図11Bは、比較例の第1フィルタ回路10が備える並列腕共振子P1~P4の設計パラメータを示す図である。これらの図には、設計パラメータの一例である波長λ、対数P、交差幅LおよびデューティDが示されている。また、これらの図には、直列腕共振子S1~S5の設計パラメータも示されている。 FIG. 11A is a diagram showing design parameters of the parallel arm resonators P1 to P4 included in the first filter circuit 10 of the embodiment. FIG. 11B is a diagram showing design parameters of the parallel arm resonators P1 to P4 included in the first filter circuit 10 of the comparative example. These figures show wavelength λ, logarithm P, cross width L and duty D, which are examples of design parameters. These figures also show the design parameters of the series arm resonators S1 to S5.
 図11Aに示すように、実施例は、複数の並列腕共振子P1~P4のうち、並列腕共振子P1のIDT電極30の対数Pが最も多く、また、並列腕共振子P1の交差幅Lが最も短くなるように設定されている。一方、図11Bに示すように、比較例は、複数の並列腕共振子P1~P4のうち、並列腕共振子P1のIDT電極30の対数Pが最も少なく、また、並列腕共振子P1の交差幅Lが最も長くなるように設定されている。なお、実施例と比較例とで、並列腕共振子P1の波長λは同じであり、並列腕共振子P1のデューティDも同じである。他の並列腕共振子P2~P4についても同様である。 As shown in FIG. 11A, in the embodiment, among the plurality of parallel arm resonators P1 to P4, the logarithm P of the IDT electrode 30 of the parallel arm resonator P1 is the largest, and the cross width L of the parallel arm resonator P1 is the largest. Is set to be the shortest. On the other hand, as shown in FIG. 11B, in the comparative example, among the plurality of parallel arm resonators P1 to P4, the logarithm P of the IDT electrode 30 of the parallel arm resonator P1 is the smallest, and the parallel arm resonator P1 intersects. The width L is set to be the longest. In the examples and the comparative examples, the wavelength λ of the parallel arm resonator P1 is the same, and the duty D of the parallel arm resonator P1 is also the same. The same applies to the other parallel arm resonators P2 to P4.
 上記の設計パラメータを有する実施例および比較例の並列腕共振子P1~P4の特性について説明する。 The characteristics of the parallel arm resonators P1 to P4 of the examples and comparative examples having the above design parameters will be described.
 図12Aは、実施例における並列腕共振子P1~P4のインピーダンス特性を示すグラフである。図12Bは、比較例における並列腕共振子P1~P4のインピーダンス特性を示すグラフである。図12Aおよび図12Bに示すように、並列腕共振子P1~P4のそれぞれは、相手帯域(1710MHz~1785MHz)内または相手帯域の近傍に、共振周波数(共振点)を有している。なお、並列腕共振子P1の共振周波数は、第1フィルタ回路10の通過帯域(自帯域)と第2フィルタ回路の通過帯域(相手帯域)との間の帯域にあってもよい。 FIG. 12A is a graph showing the impedance characteristics of the parallel arm resonators P1 to P4 in the embodiment. FIG. 12B is a graph showing the impedance characteristics of the parallel arm resonators P1 to P4 in the comparative example. As shown in FIGS. 12A and 12B, each of the parallel arm resonators P1 to P4 has a resonance frequency (resonance point) within the mating band (1710 MHz to 1785 MHz) or in the vicinity of the mating band. The resonance frequency of the parallel arm resonator P1 may be in a band between the pass band (own band) of the first filter circuit 10 and the pass band (counterband) of the second filter circuit.
 図13Aは、実施例における並列腕共振子P1~P4のインピーダンス特性を示すスミスチャートである。図13Bは、比較例における並列腕共振子P1~P4のインピーダンス特性を示すスミスチャートである。図13Aに示すように、実施例の並列腕共振子P1は、他の並列腕共振子P2~P4よりも、インピーダンス特性がスミスチャートの外周円の近くに位置している。一方、図13Bに示すように、比較例の並列腕共振子P1は、インピーダンス特性がスミスチャートの外周円から離れている。 FIG. 13A is a Smith chart showing the impedance characteristics of the parallel arm resonators P1 to P4 in the embodiment. FIG. 13B is a Smith chart showing the impedance characteristics of the parallel arm resonators P1 to P4 in the comparative example. As shown in FIG. 13A, the parallel arm resonator P1 of the embodiment has an impedance characteristic located closer to the outer peripheral circle of the Smith chart than the other parallel arm resonators P2 to P4. On the other hand, as shown in FIG. 13B, the impedance characteristic of the parallel arm resonator P1 of the comparative example is separated from the outer circumference circle of the Smith chart.
 図14Aは、実施例における並列腕共振子P1~P4の単体のレジスタンスを示すグラフである。図14Bは、比較例における並列腕共振子P1~P4の単体のレジスタンスを示すグラフである。 FIG. 14A is a graph showing the resistance of the parallel arm resonators P1 to P4 in the embodiment. FIG. 14B is a graph showing the resistance of the parallel arm resonators P1 to P4 in the comparative example.
 図14Aに示すように、実施例では、相手帯域の全範囲において並列腕共振子P1の単体のレジスタンスは、他の並列腕共振子P2~P4の単体のレジスタンスよりも小さい。例えば、実施例における上記レジスタンスの大小関係は、P1<P4<P3<P2であり、並列腕共振子P1の単体のレジスタンスが最も小さい。一方、図14Bに示すように、比較例では、相手帯域において、並列腕共振子P1の単体のレジスタンスは、他の並列腕共振子P2~P4の単体のレジスタンスよりも大きい。例えば、比較例における上記レジスタンスの大小関係は、P4<P3<P2<P1であり、並列腕共振子P1の単体のレジスタンスが最も大きい。なお、上記レジスタンスは、相手帯域における並列腕共振子単体のレジスタンスの平均値である。 As shown in FIG. 14A, in the embodiment, the resistance of the parallel arm resonator P1 alone is smaller than the resistance of the other parallel arm resonators P2 to P4 alone in the entire range of the mating band. For example, the magnitude relationship of the resistance in the embodiment is P1 <P4 <P3 <P2, and the resistance of the parallel arm resonator P1 alone is the smallest. On the other hand, as shown in FIG. 14B, in the comparative example, the resistance of the parallel arm resonator P1 alone is larger than the resistance of the other parallel arm resonators P2 to P4 alone in the mating band. For example, the magnitude relationship of the resistance in the comparative example is P4 <P3 <P2 <P1, and the resistance of the parallel arm resonator P1 alone is the largest. The resistance is the average value of the resistance of a single parallel arm resonator in the mating band.
 次に、上記並列腕共振子P1~P4を有する第1フィルタ回路10、および、第2フィルタ回路50の周波数特性について説明する。 Next, the frequency characteristics of the first filter circuit 10 having the parallel arm resonators P1 to P4 and the second filter circuit 50 will be described.
 図15は、実施例および比較例における第1フィルタ回路10のインピーダンス特性を示すスミスチャートである。図15には、共通端子tc側から見た場合の第1フィルタ回路10のインピーダンス特性およびアドミタンス特性が示されている。図15に示すように、相手帯域において、実施例の第1フィルタ回路10は、比較例の第1フィルタ回路10よりも、インピーダンス特性がスミスチャートの外周円の近くに位置している。そのため、実施例は、比較例よりも相手帯域において発生する損失が少ない。 FIG. 15 is a Smith chart showing the impedance characteristics of the first filter circuit 10 in Examples and Comparative Examples. FIG. 15 shows the impedance characteristics and the admittance characteristics of the first filter circuit 10 when viewed from the common terminal ct side. As shown in FIG. 15, in the mating band, the first filter circuit 10 of the embodiment has an impedance characteristic closer to the outer circumference circle of the Smith chart than the first filter circuit 10 of the comparative example. Therefore, in the embodiment, the loss generated in the mating band is smaller than that in the comparative example.
 図16は、実施例および比較例における第1フィルタ回路10のコンダクタンスを示すグラフである。図16には、共通端子tc側から見た場合の第1フィルタ回路10のアドミタンス実部、すなわち、コンダクタンスが示されている。図16に示すように、実施例は、比較例よりも、相手帯域におけるコンダクタンスが小さくなっている。 FIG. 16 is a graph showing the conductance of the first filter circuit 10 in Examples and Comparative Examples. FIG. 16 shows the admittance real part, that is, the conductance of the first filter circuit 10 when viewed from the common terminal ct side. As shown in FIG. 16, the example has a smaller conductance in the mating band than the comparative example.
 図17は、マルチプレクサ1の第2フィルタ回路50の通過特性を示す図である。図17の(a)には、整合損を含む通過特性が示され、図17の(b)には、整合損を除いた後の通過特性であるEL特性が示されている。図17(a)および(b)に示すように、実施例は、比較例よりも、相手帯域において挿入損失が低下することを抑制できている。 FIG. 17 is a diagram showing the passage characteristics of the second filter circuit 50 of the multiplexer 1. FIG. 17A shows a passing characteristic including a matching loss, and FIG. 17B shows an EL characteristic which is a passing characteristic after removing the matching loss. As shown in FIGS. 17 (a) and 17 (b), the examples can suppress the reduction of the insertion loss in the mating band as compared with the comparative example.
 このように、共通端子tcの最も近く位置する並列腕共振子P1のレジスタンスを小さくすることで、相手帯域において、第1フィルタ回路10のコンダクタンスを小さくすることができる。これにより、第2フィルタ回路50の通過帯域の信号が、第1フィルタ回路10に流れ込むことを抑制でき、第2フィルタ回路50の通過帯域の挿入損失が低下することを抑制できる。 In this way, by reducing the resistance of the parallel arm resonator P1 located closest to the common terminal tc, the conductance of the first filter circuit 10 can be reduced in the mating band. As a result, it is possible to suppress the signal of the pass band of the second filter circuit 50 from flowing into the first filter circuit 10, and it is possible to suppress the reduction of the insertion loss of the pass band of the second filter circuit 50.
 [4.並列腕共振子のレジスタンスの設定方法]
 次に、並列腕共振子P1~P4のレジスタンスの設定方法について説明する。上記の実施例ではレジスタンスを変更する設計パラメータとして、対数Pおよび交差幅Lを例に挙げて説明したが、ここでは、他の設計パラメータも合わせて説明する。
[4. How to set the resistance of parallel arm resonators]
Next, a method of setting the resistance of the parallel arm resonators P1 to P4 will be described. In the above embodiment, the logarithm P and the intersection width L have been described as examples as design parameters for changing the resistance, but other design parameters will also be described here.
 図18は、並列腕共振子の等価回路を示す図である。図18に示すように、並列腕共振子の等価回路は、3つの抵抗成分R1、R2、R3、2つのキャパシタンス成分C1、C2、および、1つのインダクタンス成分L1によって表される。 FIG. 18 is a diagram showing an equivalent circuit of parallel arm resonators. As shown in FIG. 18, the equivalent circuit of the parallel arm resonator is represented by three resistance components R1, R2, R3, two capacitance components C1 and C2, and one inductance component L1.
 ここで、キャパシタンス成分C1、C2およびインダクタンス成分L1は、インピーダンス虚部に相当し、インピーダンス実部であるレジスタンスの設定に関係しない。また、抵抗成分R3は、レジスタンスを設定するのに無視できるほど大きな値である。したがって、以下の(式1)に示すように、並列腕共振子のレジスタンスZrは、抵抗成分R1および抵抗成分R2の合計値で表される。 Here, the capacitance components C1 and C2 and the inductance component L1 correspond to the impedance imaginary part and are not related to the resistance setting which is the impedance real part. Further, the resistance component R3 is a value that is negligibly large for setting the resistance. Therefore, as shown in the following (Equation 1), the resistance Zr of the parallel arm resonator is represented by the total value of the resistance component R1 and the resistance component R2.
 Zr=R1+R2・・・(式1) Zr = R1 + R2 ... (Equation 1)
 共振周波数付近において、抵抗成分R1は、IDT電極30の電極指fa、fbの抵抗損を表現する抵抗成分であり、抵抗成分R2は、弾性波伝搬方向d1における信号の伝搬損を表現する抵抗成分である。電極指fa、fbの抵抗損および信号の伝搬損は、IDT電極30の対数P、交差幅L、デューティDおよび電極膜厚Tなどの設計パラメータによって変動する値である。そこで、設計パラメータである対数P、交差幅L、デューティDおよび電極膜厚Tの値を振って多変量解析を行い、抵抗成分R1、R2と各設計パラメータとの関係を求めた。 In the vicinity of the resonance frequency, the resistance component R1 is a resistance component expressing the resistance loss of the electrode fingers fa and fb of the IDT electrode 30, and the resistance component R2 is a resistance component expressing the signal propagation loss in the elastic wave propagation direction d1. Is. The resistance loss of the electrode fingers fa and fb and the signal propagation loss are values that vary depending on design parameters such as the logarithm P of the IDT electrode 30, the intersection width L, the duty D, and the electrode film thickness T. Therefore, multivariate analysis was performed by shaking the values of the logarithm P, the cross width L, the duty D, and the electrode film thickness T, which are the design parameters, and the relationship between the resistance components R1 and R2 and each design parameter was obtained.
 以下において、抵抗成分R1と設計パラメータとの関係を(式2)に示し、抵抗成分R2と設計パラメータとの関係を(式3)に示す。 In the following, the relationship between the resistance component R1 and the design parameter is shown in (Equation 2), and the relationship between the resistance component R2 and the design parameter is shown in (Equation 3).
 R1=c1+(c2・T)+(c3・D)+(c4・P)+(c5・L)+(c6・T)+(c7・D)+(c8・P)+(c9・P)+(c10・T・D)+(c11・T・P)+(c12・T・L)+(c13・D・P)+(c14・D・L)+(c15・P・L) ・・・(式2) R1 = c1 + (c2 ・ T) + (c3 ・ D) (c4 ・ P) + (c5 ・ L) + (c6 ・ T2) (c7 ・ D2) + (c8 ・ P2) (c9)・ P 3 ) + (c10 ・ T ・ D) + (c11 ・ TP) + (c12 ・ TL) + (c13 ・ D ・ P) + (c14 ・ D ・ L) + (c15 ・ P ・L) ・ ・ ・ (Equation 2)
 R2=c21+(c22・T)+(c23・D)+(c24・P)+(c25・L)+(c26・D)+(c27・P)+(c28・P)+(c29・L)+(c30・T・P)+(c31・D・P)+(c32・D・L)+(c33・P・L) ・・・(式3) R2 = c21 + (c22 ・ T) + (c23 ・ D) + (c24 ・ P) + (c25 ・ L) + (c26 ・ D 2 ) + (c27 ・ P 2 ) + (c28 ・ P 3 ) + (c29・ L 2 ) + (c30 ・ T ・ P) + (c31 ・ D ・ P) + (c32 ・ D ・ L) + (c33 ・ P ・ L) ・ ・ ・ (Equation 3)
 なお、(式2)におけるc1~c15、および、(式3)におけるc21~c33のそれぞれは、係数である。 Note that each of c1 to c15 in (Equation 2) and c21 to c33 in (Equation 3) are coefficients.
 (式2)における各係数の値は、c1=3.2056、c2=-0.012122、c3=-3.0427、c4=-0.019227、c5=0.017022、c6=0.000019000、c7=1.4970、c8=0.000071764、c9=-0.00000010704、c10=0.0042089、c11=0.000015041、c12=-0.000030710、c13=0.0032706、c14=-0.0070267、c15=-0.000020600である。 The values of each coefficient in (Equation 2) are c1 = 3.2056, c2 = −0.012122, c3 = −3.0427, c4 = −0.0192227, c5 = 0.017022, c6 = 0.000019000, c7 = 1.4970, c8 = 0.000071764, c9 = -0.000000010704, c10 = 0.0042089, c11 = 0.000015041, c12 = -0.000030710, c13 = 0.0032706, c14 = -0.0070267 , C15 = -0.000020600.
 (式3)における各係数の値は、c21=1.0914、c22=-0.00013798、c23=-0.69470、c24=-0.0072613、c25=-0.0055282、c26=0.28278、c27=0.000028894、c28=-0.000000044315、c29=0.000013794、c30=0.00000054938、c31=0.00071880、c32=0.0016717、c33=0.0000066557である。 The values of each coefficient in (Equation 3) are c21 = 1.0914, c22 = -0.00013798, c23 = -0.69470, c24 = -0.0072613, c25 = -0.0055282, c26 = 0.28288. , C27 = 0.000028894, c28 = -0.0000000044315, c29 = 0.000013794, c30 = 0.000000054938, c31 = 0.00071880, c32 = 0.0016717, c33 = 0.0000066557.
 図19は、並列腕共振子P1~P4の設計パラメータ、および、並列腕共振子P1~P4の共振抵抗を示す図である。図19の(a)には実施例の設計パラメータおよび共振抵抗が示され、図19の(b)には比較例の設計パラメータおよび共振抵抗が示されている。共振抵抗は、並列腕共振子の共振周波数におけるレジスタンスであり、(式1)~(式3)に基づいて算出されている。なお、電極層は、Al層、Ti層およびSiO層から構成されているので、Ti層およびSiO層を密度換算した後、Al層に合計した値を電極膜厚Tとした。 FIG. 19 is a diagram showing the design parameters of the parallel arm resonators P1 to P4 and the resonance resistance of the parallel arm resonators P1 to P4. FIG. 19 (a) shows the design parameters and the resonance resistance of the embodiment, and FIG. 19 (b) shows the design parameters and the resonance resistance of the comparative example. The resonance resistance is the resistance at the resonance frequency of the parallel arm resonator, and is calculated based on (Equation 1) to (Equation 3). Since the electrode layer is composed of an Al layer, a Ti layer, and a SiO 2 layer, the value obtained by converting the density of the Ti layer and the SiO 2 layer and then totaling the Al layer is defined as the electrode film thickness T.
 図19の(a)では、並列腕共振子P1の単体の共振抵抗が、他の並列腕共振子P2~P4よりも小さくなっている。すなわち複数の並列腕共振子P1~P4のうち、並列腕共振子P1の共振抵抗が最も小さくなるように設計パラメータが決定されている。このように、(式1)~(式3)を用いることで、IDT電極30の対数P、交差幅L、デューティDおよび電極膜厚Tを決定し、並列腕共振子P1の共振抵抗が小さくなるように設定することができる。共振抵抗を小さくすることで、共振周波数付近におけるレジスタンスを小さくでき、相手帯域における挿入損失の低下を抑制できる。 In FIG. 19A, the resonance resistance of the parallel arm resonator P1 alone is smaller than that of the other parallel arm resonators P2 to P4. That is, the design parameters are determined so that the resonance resistance of the parallel arm resonator P1 is the smallest among the plurality of parallel arm resonators P1 to P4. In this way, by using (Equation 1) to (Equation 3), the logarithm P, the cross width L, the duty D, and the electrode film thickness T of the IDT electrode 30 are determined, and the resonance resistance of the parallel arm resonator P1 is small. Can be set to be. By reducing the resonance resistance, the resistance near the resonance frequency can be reduced, and the decrease in insertion loss in the mating band can be suppressed.
 次に、各設計パラメータを振ることによって得られた共振抵抗と各設計パラメータとの関係を示す。 Next, the relationship between the resonance resistance obtained by shaking each design parameter and each design parameter is shown.
 図20は、並列腕共振子P1~P4の共振抵抗と設計パラメータとの関係を示す図である。図20の(a)には共振抵抗とデューティDとの関係、図20の(b)には共振抵抗と交差幅Lとの関係、図20の(c)には共振抵抗と対数Pとの関係、図20の(d)には共振抵抗と(交差幅/対数)との関係、図20の(e)には共振抵抗と電極膜厚Tとの関係が示されている。 FIG. 20 is a diagram showing the relationship between the resonance resistance of the parallel arm resonators P1 to P4 and the design parameters. 20 (a) shows the relationship between the resonance resistance and the duty D, FIG. 20 (b) shows the relationship between the resonance resistance and the cross width L, and FIG. 20 (c) shows the resonance resistance and the logarithmic P. The relationship, FIG. 20 (d) shows the relationship between the resonance resistance and (intersection width / logarithm), and FIG. 20 (e) shows the relationship between the resonance resistance and the electrode film thickness T.
 図20の(a)に示すように、デューティDを大きくすることで、共振抵抗を小さくできる。図20の(b)に示すように、交差幅Lを短くすることで、共振抵抗を小さくできる。図20の(c)に示すように、対数Pを多くすることで、共振抵抗を小さくできる。図20の(d)に示すように、(交差幅/対数)を小さくすることで、共振抵抗を小さくできる。図20の(e)に示すように、電極膜厚Tを厚くすることで、共振抵抗を小さくできる。 As shown in FIG. 20 (a), the resonance resistance can be reduced by increasing the duty D. As shown in FIG. 20B, the resonance resistance can be reduced by shortening the crossing width L. As shown in FIG. 20 (c), the resonance resistance can be reduced by increasing the logarithm P. As shown in FIG. 20 (d), the resonance resistance can be reduced by reducing (intersection width / logarithm). As shown in FIG. 20 (e), the resonance resistance can be reduced by increasing the electrode film thickness T.
 これら図20の(a)~(e)に示す傾向に基づいて設計パラメータを決定することで、並列腕共振子の共振抵抗およびレジスタンスを効率的に設定することが可能となる。 By determining the design parameters based on the trends shown in FIGS. 20 (a) to 20 (e), it is possible to efficiently set the resonance resistance and resistance of the parallel arm resonators.
 (本発明の他の検討例)
 次に、本発明の他の検討例について説明する。この検討例では、並列腕共振子P1とグランドとの間にインダクタが直列挿入されている例について説明する。
(Other Study Examples of the Present Invention)
Next, another study example of the present invention will be described. In this study example, an example in which an inductor is inserted in series between the parallel arm resonator P1 and the ground will be described.
 図21は、並列腕共振子P1にインダクタが接続された回路のインピーダンス特性を示すグラフである。図22は、並列腕共振子P1にインダクタが接続された回路のレジスタンスを示すグラフである。並列腕共振子P1に接続したインダクタは、例えば、SMD(表面実装部品)であり、Q値は30とした。なお、図21および図22には、インダクタが0である例、すなわち、並列腕共振子P1にインダクタが接続されていない例も示されている。 FIG. 21 is a graph showing the impedance characteristics of a circuit in which an inductor is connected to the parallel arm resonator P1. FIG. 22 is a graph showing the resistance of a circuit in which an inductor is connected to the parallel arm resonator P1. The inductor connected to the parallel arm resonator P1 is, for example, an SMD (surface mount component), and the Q value is 30. Note that FIGS. 21 and 22 also show an example in which the inductor is 0, that is, an example in which the inductor is not connected to the parallel arm resonator P1.
 図21に示すように、並列腕共振子P1に接続されるインダクタのインダクタンス値が大きいほど、共振周波数が低周波側に存在する。また、図22に示すように、並列腕共振子P1に接続されるインダクタのインダクタンス値が大きいほど、レジスタンスZrが大きくなる。レジスタンスZrが大きくなるのは、インダクタンス値およびQ値が関係しているからである。レジスタンスZrを小さくするためには、共通端子tcに最も近い並列腕共振子P1のインダクタ成分を極力小さくする必要がある。 As shown in FIG. 21, the larger the inductance value of the inductor connected to the parallel arm resonator P1, the higher the resonance frequency exists on the lower frequency side. Further, as shown in FIG. 22, the larger the inductance value of the inductor connected to the parallel arm resonator P1, the larger the resistance Zr. The resistance Zr increases because the inductance value and the Q value are related. In order to reduce the resistance Zr, it is necessary to make the inductor component of the parallel arm resonator P1 closest to the common terminal tc as small as possible.
 そのため、並列腕共振子P1は、インダクタを介さずに、グランドに直接接続されていることが望ましい。また、例えば、複数の並列腕共振子P1~P4が、インダクタ等を介さずにグランドに直接接続されている場合は、共通端子tcに最も近い並列腕共振子P1とグランドとをつなぐ配線の長さは、他の並列腕共振子P2~P4と前記グランドとをつなぐ配線の長さよりも短くすることが望ましい。 Therefore, it is desirable that the parallel arm resonator P1 is directly connected to the ground without using an inductor. Further, for example, when a plurality of parallel arm resonators P1 to P4 are directly connected to the ground without using an inductor or the like, the length of the wiring connecting the parallel arm resonator P1 closest to the common terminal ct and the ground. It is desirable that the length is shorter than the length of the wiring connecting the other parallel arm resonators P2 to P4 and the ground.
 (まとめ)
 以上説明したように、本実施の形態に係るマルチプレクサ1は、共通端子tc、第1端子t1および第2端子t2と、共通端子tcと第1端子t1とを結ぶ第1の経路r1上に設けられた第1フィルタ回路10と、共通端子tcと第2端子t2とを結ぶ第2の経路r2上に設けられた第2フィルタ回路50と、を備える。第1フィルタ回路10は、複数の並列腕共振子P1~P4を有している。第2フィルタ回路50の通過帯域において、複数の並列腕共振子P1~P4のうち共通端子tcに最も近い並列腕共振子P1の単体のレジスタンスZrが最も小さい。
(summary)
As described above, the multiplexer 1 according to the present embodiment is provided on the first path r1 connecting the common terminal tc, the first terminal t1 and the second terminal t2, and the common terminal tc and the first terminal t1. The first filter circuit 10 is provided, and the second filter circuit 50 provided on the second path r2 connecting the common terminal tc and the second terminal t2 is provided. The first filter circuit 10 has a plurality of parallel arm resonators P1 to P4. In the pass band of the second filter circuit 50, among the plurality of parallel arm resonators P1 to P4, the resistance Zr of the single parallel arm resonator P1 closest to the common terminal ct is the smallest.
 このように、共通端子tcに最も近い並列腕共振子P1の単体のレジスタンスZrを最も小さくすることで、第2フィルタ回路50の通過帯域において、第1フィルタ回路10のコンダクタンスを小さくできる。これにより、第2フィルタ回路50の通過帯域の挿入損失が低下することを抑制できる。 In this way, by making the resistance Zr of the single body of the parallel arm resonator P1 closest to the common terminal ct the smallest, the conductance of the first filter circuit 10 can be made smaller in the pass band of the second filter circuit 50. As a result, it is possible to suppress a decrease in the insertion loss of the pass band of the second filter circuit 50.
 また、第2フィルタ回路50は、第1フィルタ回路10の通過帯域よりも低周波側の通過帯域を有していてもよい。 Further, the second filter circuit 50 may have a pass band on the lower frequency side than the pass band of the first filter circuit 10.
 これによれば、第1フィルタ回路10の通過帯域よりも低周波側の帯域において、第1フィルタ回路10のコンダクタンスを小さくできる。これにより、第1フィルタ回路10の通過帯域よりも低周波側に位置する第2フィルタ回路50の通過帯域の挿入損失が低下することを抑制できる。 According to this, the conductance of the first filter circuit 10 can be reduced in the band on the lower frequency side than the pass band of the first filter circuit 10. As a result, it is possible to suppress a decrease in the insertion loss of the pass band of the second filter circuit 50 located on the lower frequency side of the pass band of the first filter circuit 10.
 また、複数の並列腕共振子P1~P4のそれぞれは、IDT電極30を有し、IDT電極30の電極指fa、fbの抵抗損を表現する抵抗成分R1、および、弾性波伝搬方向d1における信号の伝搬損を表現する抵抗成分R2を合計した値である、レジスタンスZrを有していてもよい。 Further, each of the plurality of parallel arm resonators P1 to P4 has an IDT electrode 30, a resistance component R1 expressing the resistance loss of the electrode fingers fa and fb of the IDT electrode 30, and a signal in the elastic wave propagation direction d1. It may have a resistance Zr, which is a value obtained by summing up the resistance components R2 expressing the propagation loss of.
 これによれば、並列腕共振子P1~P4のレジスタンスZrが小さくなるように適切に設定することができる。これにより、第1フィルタ回路10のコンダクタンスを小さくし、第2フィルタ回路50の通過帯域の挿入損失が低下することを抑制できる。 According to this, the resistance Zr of the parallel arm resonators P1 to P4 can be appropriately set so as to be small. As a result, the conductance of the first filter circuit 10 can be reduced, and the reduction of the insertion loss in the pass band of the second filter circuit 50 can be suppressed.
 また、電極指の抵抗損を表現する抵抗成分R1および信号の伝搬損を表現する抵抗成分R2は、IDT電極30の対数P、交差幅L、デューティDおよび電極膜厚Tを変数とした関係式によって導出される値であってもよい。 Further, the resistance component R1 expressing the resistance loss of the electrode finger and the resistance component R2 expressing the signal propagation loss are relational expressions in which the logarithm P of the IDT electrode 30, the cross width L, the duty D and the electrode film thickness T are variables. It may be a value derived by.
 これによれば、並列腕共振子P1~P4のレジスタンスZrが小さくなるように適切に設定することができる。これにより、第1フィルタ回路10のコンダクタンスを小さくし、第2フィルタ回路50の通過帯域の挿入損失が低下することを抑制できる。 According to this, the resistance Zr of the parallel arm resonators P1 to P4 can be appropriately set so as to be small. As a result, the conductance of the first filter circuit 10 can be reduced, and the reduction of the insertion loss in the pass band of the second filter circuit 50 can be suppressed.
 また、上記関係式は、Zrをレジスタンスとし、R1をIDT電極の電極指の抵抗損を表現する抵抗成分とし、R2を弾性波伝搬方向における信号の伝搬損を表現する抵抗成分とし、Pを対数とし、Lを交差幅とし、Dをデューティとし、Tを電極膜厚とし、c1~c15、c21~c33を係数とした場合に、前述した(式1)、(式2)および(式3)で表されてもよい。 Further, in the above relational expression, Zr is a resistance, R1 is a resistance component expressing the resistance loss of the electrode finger of the IDT electrode, R2 is a resistance component expressing the signal propagation loss in the elastic wave propagation direction, and P is a logarithm. When L is the cross width, D is the duty, T is the electrode film thickness, and c1 to c15 and c21 to c33 are the coefficients, the above-mentioned (Equation 1), (Equation 2) and (Equation 3) are used. It may be represented by.
 これによれば、並列腕共振子P1~P4のレジスタンスZrが小さくなるように適切に設定することができる。これにより、第1フィルタ回路10のコンダクタンスを小さくし、第2フィルタ回路50の通過帯域の挿入損失が低下することを抑制できる。 According to this, the resistance Zr of the parallel arm resonators P1 to P4 can be appropriately set so as to be small. As a result, the conductance of the first filter circuit 10 can be reduced, and the reduction of the insertion loss in the pass band of the second filter circuit 50 can be suppressed.
 また、複数の並列腕共振子P1~P4のうち共通端子tcに最も近い並列腕共振子P1の共振抵抗が最も小さくてもよい。 Further, among the plurality of parallel arm resonators P1 to P4, the resonance resistance of the parallel arm resonator P1 closest to the common terminal ct may be the smallest.
 これによれば、第2フィルタ回路50の通過帯域の少なくとも一部において、第1フィルタ回路10のコンダクタンスを小さくできる。これにより、第2フィルタ回路50の通過帯域の挿入損失が低下することを抑制できる。 According to this, the conductance of the first filter circuit 10 can be reduced in at least a part of the pass band of the second filter circuit 50. As a result, it is possible to suppress a decrease in the insertion loss of the pass band of the second filter circuit 50.
 また、第1フィルタ回路10は、さらに、直列腕共振子S1を有し、直列腕共振子S1は、複数の並列腕共振子P1~P4よりも共通端子tc側に設けられていてもよい。 Further, the first filter circuit 10 further has a series arm resonator S1, and the series arm resonator S1 may be provided on the common terminal ct side of the plurality of parallel arm resonators P1 to P4.
 これによれば、並列腕共振子P1と第2フィルタ回路50との間に直列C成分を入れることができ、第1フィルタ回路10のコンダクタンスを小さくできる。これにより、第2フィルタ回路50の通過帯域の挿入損失が低下することを抑制できる。 According to this, the series C component can be inserted between the parallel arm resonator P1 and the second filter circuit 50, and the conductance of the first filter circuit 10 can be reduced. As a result, it is possible to suppress a decrease in the insertion loss of the pass band of the second filter circuit 50.
 また、共通端子tcに最も近い並列腕共振子P1の共振周波数は、第1フィルタ回路10の通過帯域と第2フィルタ回路50の通過帯域との間の帯域にあってもよい。 Further, the resonance frequency of the parallel arm resonator P1 closest to the common terminal ct may be in the band between the pass band of the first filter circuit 10 and the pass band of the second filter circuit 50.
 これによれば、第2フィルタ回路50の通過帯域に並列腕共振子P1のL成分が入らないため、例えば、共通端子tc側に直列腕共振子S1を付加した場合に、スミスチャート上におけるインピーダンス特性をオープン側に十分に移動させることができる。これにより、第2フィルタ回路50の通過帯域の挿入損失が低下することを抑制できる。 According to this, since the L component of the parallel arm resonator P1 does not enter the pass band of the second filter circuit 50, for example, when the series arm resonator S1 is added to the common terminal ct side, the impedance on the Smith chart. The characteristics can be sufficiently moved to the open side. As a result, it is possible to suppress a decrease in the insertion loss of the pass band of the second filter circuit 50.
 また、共通端子tcに最も近い並列腕共振子P1は、インダクタを介さずに、グランドに直接接続されていてもよい。 Further, the parallel arm resonator P1 closest to the common terminal ct may be directly connected to the ground without using an inductor.
 これによれば、並列腕共振子P1の単体のレジスタンスZrを小さくできる。これにより、第1フィルタ回路10のコンダクタンスを小さくし、第2フィルタ回路50の通過帯域の挿入損失が低下することを抑制できる。 According to this, the resistance Zr of a single parallel arm resonator P1 can be reduced. As a result, the conductance of the first filter circuit 10 can be reduced, and the reduction of the insertion loss in the pass band of the second filter circuit 50 can be suppressed.
 また、共通端子tcに最も近い並列腕共振子P1を除く他の並列腕共振子P2~P4は、インダクタを介さずにグランドに直接接続され、共通端子tcに最も近い並列腕共振子P1とグランドとをつなぐ配線の長さは、他の並列腕共振子P2~P4とグランドとをつなぐ配線の長さよりも短くてもよい。 Further, the other parallel arm resonators P2 to P4 except for the parallel arm resonator P1 closest to the common terminal ct are directly connected to the ground without passing through the inductor, and the parallel arm resonator P1 closest to the common terminal ct and the ground are connected to the ground. The length of the wiring connecting the and may be shorter than the length of the wiring connecting the other parallel arm resonators P2 to P4 and the ground.
 これによれば、他の並列腕共振子P2~P4のよりも並列腕共振子P1の単体のレジスタンスを小さくできる。これにより、第1フィルタ回路10のコンダクタンスを小さくし、第2フィルタ回路50の通過帯域の挿入損失が低下することを抑制できる。 According to this, the resistance of the parallel arm resonator P1 alone can be made smaller than that of the other parallel arm resonators P2 to P4. As a result, the conductance of the first filter circuit 10 can be reduced, and the reduction of the insertion loss in the pass band of the second filter circuit 50 can be suppressed.
 (その他の実施の形態)
 以上、本発明の実施の形態に係るマルチプレクサについて、実施の形態を挙げて説明したが、本発明は、上記実施の形態における任意の構成要素を組み合わせて実現される別の実施の形態や、上記実施の形態に対して本発明の主旨を逸脱しない範囲で当業者が思いつく各種変形を施して得られる変形例や、本発明に係るマルチプレクサを含む高周波フロントエンド回路および通信装置も本発明に含まれる。
(Other embodiments)
Although the multiplexer according to the embodiment of the present invention has been described above with reference to the embodiments, the present invention includes another embodiment realized by combining arbitrary components in the above-described embodiment and the above-mentioned embodiments. The present invention also includes modification examples obtained by subjecting various modifications to the embodiments that can be conceived by those skilled in the art without departing from the gist of the present invention, and high frequency front-end circuits and communication devices including a multiplexer according to the present invention. ..
 上記では、並列腕共振子P1がT型のラダーフィルタの一部を構成している例を示したが、それに限られない。例えば、第1フィルタ回路10がπ型のラダーフィルタ構造を有し、並列腕共振子P1が直列腕共振子S1よりも共通端子tc側に配置されていてもよい。また、第1フィルタ回路10が、トラップフィルタ(一定の周波数成分だけを減衰させるフィルタ)である並列腕共振子P1を含み、この並列腕共振子P1が直列腕共振子S1よりも共通端子tc側に設けられていてもよい。 The above shows an example in which the parallel arm resonator P1 constitutes a part of the T-type ladder filter, but the present invention is not limited to this. For example, the first filter circuit 10 may have a π-type ladder filter structure, and the parallel arm resonator P1 may be arranged on the common terminal ct side of the series arm resonator S1. Further, the first filter circuit 10 includes a parallel arm resonator P1 which is a trap filter (a filter that attenuates only a certain frequency component), and the parallel arm resonator P1 is on the common terminal ct side of the series arm resonator S1. It may be provided in.
 上記では、第1フィルタ回路10の通過帯域が、第2フィルタ回路50の通過帯域よりも低くなるように設定されている例を示したが、それに限られず、第1フィルタ回路10の通過帯域は、第2フィルタ回路50の通過帯域よりも高くなるように設定されていてもよい。 In the above, an example is shown in which the pass band of the first filter circuit 10 is set to be lower than the pass band of the second filter circuit 50, but the pass band of the first filter circuit 10 is not limited to this. , It may be set to be higher than the pass band of the second filter circuit 50.
 上記では、第1フィルタ回路10が送信フィルタである例を示したが、それに限られず、第1フィルタ回路10は受信フィルタであってもよい。また、マルチプレクサ1は、送信フィルタおよび受信フィルタの双方を備える構成に限られず、送信フィルタのみ、または、受信フィルタのみを備える構成であってもよい。 In the above, an example in which the first filter circuit 10 is a transmission filter is shown, but the present invention is not limited to this, and the first filter circuit 10 may be a reception filter. Further, the multiplexer 1 is not limited to the configuration including both the transmission filter and the reception filter, and may be configured to include only the transmission filter or only the reception filter.
 上記では、2つのフィルタを含むマルチプレクサを例に説明したが、本発明は、例えば、3つのフィルタのアンテナ端子が共通化されたトリプレクサや、6つのフィルタのアンテナ端子が共通化されたヘキサプレクサについても適用することができる。つまり、マルチプレクサは、2以上のフィルタを備えていればよい。 In the above, a multiplexer including two filters has been described as an example, but the present invention also relates to, for example, a triplexer in which the antenna terminals of three filters are shared and a hexaplexer in which the antenna terminals of six filters are shared. Can be applied. That is, the multiplexer need only have two or more filters.
 また、IDT電極30の電極層325および誘電体層326を構成する材料は、前述した材料に限定されない。また、IDT電極30は、上記積層構造でなくてもよい。IDT電極30は、例えば、Ti、Al、Cu、Pt、Au、Ag、Pdなどの金属または合金から構成されてもよく、また、上記の金属または合金から構成される複数の積層体から構成されてもよい。 Further, the materials constituting the electrode layer 325 and the dielectric layer 326 of the IDT electrode 30 are not limited to the above-mentioned materials. Further, the IDT electrode 30 does not have to have the above-mentioned laminated structure. The IDT electrode 30 may be made of, for example, a metal or alloy such as Ti, Al, Cu, Pt, Au, Ag, Pd, or may be made of a plurality of laminates made of the above metal or alloy. You may.
 また、実施の形態では、基板320として圧電性を有する基板を示したが、当該基板は、圧電体層の単層からなる圧電基板であってもよい。この場合の圧電基板は、例えば、LiTaOの圧電単結晶、または、LiNbOなどの他の圧電単結晶で構成される。また、IDT電極30が形成される基板320は、圧電性を有する限り、全体が圧電体層からなるものの他、支持基板上に圧電体層が積層されている構造を用いてもよい。また、上記実施の形態に係る基板320のカット角は限定されない。つまり、弾性波フィルタの要求通過特性などに応じて、適宜、積層構造、材料、および厚みを変更してもよく、上記実施の形態に示すカット角以外のカット角を有するLiTaO圧電基板またはLiNbO圧電基板などを用いた弾性表面波フィルタであっても、同様の効果を奏することが可能となる。 Further, in the embodiment, a substrate having piezoelectricity is shown as the substrate 320, but the substrate may be a piezoelectric substrate composed of a single layer of a piezoelectric layer. The piezoelectric substrate in this case is composed of, for example, a piezoelectric single crystal of LiTaO 3 or another piezoelectric single crystal such as LiNbO 3 . Further, the substrate 320 on which the IDT electrode 30 is formed may be entirely made of a piezoelectric layer or may have a structure in which the piezoelectric layer is laminated on the support substrate, as long as it has piezoelectricity. Further, the cut angle of the substrate 320 according to the above embodiment is not limited. That is, the laminated structure, material, and thickness may be appropriately changed according to the required passing characteristics of the surface acoustic wave filter, and the LiTaO 3 piezoelectric substrate or LiNbO having a cut angle other than the cut angle shown in the above embodiment may be changed. 3 It is possible to obtain the same effect even with an elastic surface wave filter using a piezoelectric substrate or the like.
 本発明は、マルチプレクサ、フロントエンド回路および通信装置として、携帯電話などの通信機器に広く利用できる。 The present invention can be widely used in communication devices such as mobile phones as multiplexers, front-end circuits and communication devices.
 1  マルチプレクサ
 9  アンテナ素子
 10 第1フィルタ回路
 30 IDT電極
 50 第2フィルタ回路
 320 基板
 325 電極層
 326 誘電体層
 ca、cb 櫛歯状電極
 C1、C2 キャパシタンス成分
 d1 弾性波伝搬方向
 d2 直交方向
 D  デューティ
 fa、fb 電極指
 L  交差幅
 L1 インダクタンス成分
 n0、n1、n2、n3、n4 ノード
 P  対数
 P0、P1、P2、P3、P4、P51、P52、P53、P54 並列腕共振子
 R1、R2、R3 抵抗成分
 r1 第1の経路
 r2 第2の経路
 S0、S1、S2、S3、S4、S5、S51、S52、S53、S54、S55 直列腕共振子
 tc 共通端子
 t1 第1端子
 t2 第2端子
 T  電極膜厚
 Zr レジスタンス
1 multiplexer 9 antenna element 10 1st filter circuit 30 IDT electrode 50 2nd filter circuit 320 substrate 325 electrode layer 326 dielectric layer ca, cb comb tooth electrode C1, C2 capacitance component d1 elastic wave propagation direction d2 orthogonal direction D duty fa , Fb Electrode finger L Cross width L1 Inductance component n0, n1, n2, n3, n4 Node P log P0, P1, P2, P3, P4, P51, P52, P53, P54 Parallel arm resonator R1, R2, R3 Resistance component r1 1st path r2 2nd path S0, S1, S2, S3, S4, S5, S51, S52, S53, S54, S55 Series arm resonator ct Common terminal t1 1st terminal t2 2nd terminal T Electrode film thickness Zr resistance

Claims (10)

  1.  共通端子、第1端子および第2端子と、
     前記共通端子と前記第1端子とを結ぶ第1の経路上に設けられた第1フィルタ回路と、
     前記共通端子と前記第2端子とを結ぶ第2の経路上に設けられた第2フィルタ回路と、
     を備え、
     前記第1フィルタ回路は、複数の並列腕共振子を有し、
     前記第2フィルタ回路の通過帯域において、前記複数の並列腕共振子のうち前記共通端子に最も近い並列腕共振子の単体のレジスタンスが最も小さい
     マルチプレクサ。
    Common terminal, 1st terminal and 2nd terminal,
    A first filter circuit provided on a first path connecting the common terminal and the first terminal,
    A second filter circuit provided on the second path connecting the common terminal and the second terminal, and
    Equipped with
    The first filter circuit has a plurality of parallel arm resonators and has a plurality of parallel arm resonators.
    A multiplexer having the smallest resistance of a single parallel arm resonator closest to the common terminal among the plurality of parallel arm resonators in the pass band of the second filter circuit.
  2.  前記第2フィルタ回路は、前記第1フィルタ回路の通過帯域よりも低周波側の通過帯域を有する
     請求項1に記載のマルチプレクサ。
    The multiplexer according to claim 1, wherein the second filter circuit has a pass band on the lower frequency side than the pass band of the first filter circuit.
  3.  前記複数の並列腕共振子のそれぞれは、IDT電極を有し、前記IDT電極の電極指の抵抗損を表現する抵抗成分、および、弾性波伝搬方向における信号の伝搬損を表現する抵抗成分を合計した値である、前記レジスタンスを有する
     請求項1または2に記載のマルチプレクサ。
    Each of the plurality of parallel arm resonators has an IDT electrode, and the resistance component expressing the resistance loss of the electrode finger of the IDT electrode and the resistance component expressing the resistance loss of the signal in the elastic wave propagation direction are summed up. The multiplexer according to claim 1 or 2, which has the resistance.
  4.  前記電極指の抵抗損を表現する抵抗成分および前記信号の伝搬損を表現する抵抗成分は、前記IDT電極の対数、交差幅、デューティおよび電極膜厚を変数とした関係式によって導出される値である
     請求項3に記載のマルチプレクサ。
    The resistance component expressing the resistance loss of the electrode finger and the resistance component expressing the propagation loss of the signal are values derived by a relational expression with the logarithm, the cross width, the duty and the electrode film thickness of the IDT electrode as variables. The multiplexer according to claim 3.
  5.  前記関係式は、
     Zrをレジスタンスとし、
     R1をIDT電極の電極指の抵抗損を表現する抵抗成分とし、
     R2を弾性波伝搬方向における信号の伝搬損を表現する抵抗成分とし、
     Pを対数とし、
     Lを交差幅とし、
     Dをデューティとし、
     Tを電極膜厚とし、
     c1、c2、c3、c4、c5、c6、c7、c8、c9、c10、c11、c12、c13、c14、c15、c21、c22、c23、c24、c25、c26、c27、c28、c29、c30、c31、c32、c33を係数とした場合に、
     Zr=R1+R2、
     ただし、
     R1=c1+(c2・T)+(c3・D)+(c4・P)+(c5・L)+(c6・T)+(c7・D)+(c8・P)+(c9・P)+(c10・T・D)+(c11・T・P)+(c12・T・L)+(c13・D・P)+(c14・D・L)+(c15・P・L)、
     R2=c21+(c22・T)+(c23・D)+(c24・P)+(c25・L)+(c26・D)+(c27・P)+(c28・P)+(c29・L)+(c30・T・P)+(c31・D・P)+(c32・D・L)+(c33・P・L)、
     である
     請求項4に記載のマルチプレクサ。
    The relational expression is
    Zr is the resistance
    R1 is used as a resistance component expressing the resistance loss of the electrode finger of the IDT electrode.
    R2 is a resistance component that expresses signal propagation loss in the elastic wave propagation direction.
    Let P be the logarithm
    Let L be the crossing width
    Let D be the duty
    Let T be the electrode film thickness
    c1, c2, c3, c4, c5, c6, c7, c8, c9, c10, c11, c12, c13, c14, c15, c21, c22, c23, c24, c25, c26, c27, c28, c29, c30, When c31, c32, and c33 are used as coefficients,
    Zr = R1 + R2,
    however,
    R1 = c1 + (c2 ・ T) + (c3 ・ D) (c4 ・ P) + (c5 ・ L) + (c6 ・ T2) (c7 ・ D2) + (c8 ・ P2) (c9)・ P 3 ) + (c10 ・ T ・ D) + (c11 ・ TP) + (c12 ・ TL) + (c13 ・ D ・ P) + (c14 ・ D ・ L) + (c15 ・ P ・L),
    R2 = c21 + (c22 ・ T) + (c23 ・ D) + (c24 ・ P) + (c25 ・ L) + (c26 ・ D 2 ) + (c27 ・ P 2 ) + (c28 ・ P 3 ) + (c29・ L 2 ) + (c30 ・ T ・ P) + (c31 ・ D ・ P) + (c32 ・ D ・ L) + (c33 ・ P ・ L),
    The multiplexer according to claim 4.
  6.  前記複数の並列腕共振子のうち前記共通端子に最も近い並列腕共振子の共振抵抗が最も小さい
     請求項1~5のいずれか1項に記載のマルチプレクサ。
    The multiplexer according to any one of claims 1 to 5, wherein the parallel arm resonator closest to the common terminal has the smallest resonance resistance among the plurality of parallel arm resonators.
  7.  前記第1フィルタ回路は、さらに、直列腕共振子を有し、
     前記直列腕共振子は、前記複数の並列腕共振子よりも前記共通端子側に設けられている
     請求項1~6のいずれか1項に記載のマルチプレクサ。
    The first filter circuit further has a series arm resonator.
    The multiplexer according to any one of claims 1 to 6, wherein the series arm resonator is provided on the common terminal side of the plurality of parallel arm resonators.
  8.  前記共通端子に最も近い並列腕共振子の共振周波数は、前記第1フィルタ回路の通過帯域と前記第2フィルタ回路の通過帯域との間の帯域にある
     請求項7に記載のマルチプレクサ。
    The multiplexer according to claim 7, wherein the resonance frequency of the parallel arm resonator closest to the common terminal is in the band between the pass band of the first filter circuit and the pass band of the second filter circuit.
  9.  前記共通端子に最も近い並列腕共振子は、インダクタを介さずに、グランドに直接接続されている
     請求項1~8のいずれか1項に記載のマルチプレクサ。
    The multiplexer according to any one of claims 1 to 8, wherein the parallel arm resonator closest to the common terminal is directly connected to the ground without an inductor.
  10.  前記共通端子に最も近い並列腕共振子を除く他の並列腕共振子は、インダクタを介さずにグランドに直接接続され、
     前記共通端子に最も近い並列腕共振子と前記グランドとをつなぐ配線の長さは、前記他の並列腕共振子と前記グランドとをつなぐ配線の長さよりも短い
     請求項9に記載のマルチプレクサ。
    The other parallel arm resonators except the parallel arm resonator closest to the common terminal are directly connected to the ground without an inductor.
    The multiplexer according to claim 9, wherein the length of the wiring connecting the parallel arm resonator closest to the common terminal and the ground is shorter than the length of the wiring connecting the other parallel arm resonator and the ground.
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JPH10209806A (en) * 1997-01-24 1998-08-07 Tdk Corp Surface acoustic wave device
JPH11251871A (en) * 1998-03-06 1999-09-17 Oki Electric Ind Co Ltd Receiving filter of surface acoustic wave branching filter
JP2011087282A (en) * 2009-09-15 2011-04-28 Murata Mfg Co Ltd Boundary acoustic wave filter, and demultiplexer having the same
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WO2018043606A1 (en) * 2016-09-02 2018-03-08 株式会社村田製作所 Acoustic wave filter device, high-frequency front-end circuit, and communication apparatus
WO2018043607A1 (en) * 2016-09-02 2018-03-08 株式会社村田製作所 Acoustic wave filter device, high-frequency front-end circuit, and communication apparatus
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Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10209806A (en) * 1997-01-24 1998-08-07 Tdk Corp Surface acoustic wave device
JPH11251871A (en) * 1998-03-06 1999-09-17 Oki Electric Ind Co Ltd Receiving filter of surface acoustic wave branching filter
JP2011087282A (en) * 2009-09-15 2011-04-28 Murata Mfg Co Ltd Boundary acoustic wave filter, and demultiplexer having the same
JP2016184900A (en) * 2015-03-26 2016-10-20 株式会社村田製作所 Surface acoustic wave filter
JP2017204743A (en) * 2016-05-11 2017-11-16 太陽誘電株式会社 Filter and multiplexer
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