WO2022061996A1 - 一种反馈信号检测方法及显示系统 - Google Patents

一种反馈信号检测方法及显示系统 Download PDF

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Publication number
WO2022061996A1
WO2022061996A1 PCT/CN2020/121565 CN2020121565W WO2022061996A1 WO 2022061996 A1 WO2022061996 A1 WO 2022061996A1 CN 2020121565 W CN2020121565 W CN 2020121565W WO 2022061996 A1 WO2022061996 A1 WO 2022061996A1
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Prior art keywords
voltage
column
feedback
digital
pixel unit
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PCT/CN2020/121565
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English (en)
French (fr)
Inventor
林兴武
张盛东
张敏
焦海龙
黄杰
邱赫梓
李成林
文金元
Original Assignee
北京大学深圳研究生院
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Publication of WO2022061996A1 publication Critical patent/WO2022061996A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays

Definitions

  • the invention relates to the field of optoelectronic technology, in particular to a feedback signal detection method and a display system.
  • AMOLED active matrix organic light emitting diode or active matrix organic light emitting diode, Active-matrix Organic light-emitting diode
  • TFT Thin Film Transistor, Thin Film Transistor
  • OLED Organic Light-Emitting Diode or Organic Electroluminesence Display
  • OLED-on-Silicon or QLED-on-Silicon type microdisplay products use silicon as a pixel unit circuit display, and add OLED or QLED (Quantum Dot Light Emitting Diodes) light-emitting devices on it.
  • OLED or QLED Quadantum Dot Light Emitting Diodes
  • TFT, OLED and QLED all have aging problems after emitting light.
  • the increase of TFT threshold voltage causes the current that can be given by the aging TFT to become smaller when the same display signal is input.
  • the threshold voltage of the aged TFT or the threshold voltage of the aged OLED will drift.
  • An increase in the OLED threshold voltage results in a decrease in OLED current.
  • the luminous efficiency of the aged OLED decreases, that is, for the same input current, the light that the aged OLED can emit decreases.
  • TFT, OLED, and QLED also have the problem of uneven threshold voltage.
  • the threshold voltage will be uneven due to process reasons, which will lead to uneven light emission of the display screen.
  • the power supply voltage of the pixel units will be uneven due to the flow of current, and the uneven temperature will lead to the uneven current of the drive tube.
  • the unevenness of each channel source driving module will lead to the unevenness of the feedback driving current.
  • the display driver chips of all pixel systems have the problem of uneven driving of different driving channels, ie, driving circuits.
  • the present invention provides a display system of a feedback signal detection method, which includes M columns of drive channels; each column of drive channels includes a pixel unit and a detection unit; the detection unit includes a source drive module and a detection module; the source drive module includes a digital-to-analog converter,
  • the detection module includes a comparator; the digital-to-analog converter is connected to the pixel unit through a display signal line; the first input end of the comparator is connected to the pixel unit through a feedback signal line for receiving a feedback voltage corresponding to a feedback signal of the pixel unit;
  • the second input terminal is connected to the reference digital-to-analog converter, and is used for receiving the comparison voltage output by the reference digital-to-analog converter; the output terminal of the comparator is used for outputting the detection result obtained by comparing the feedback voltage with the comparison voltage; wherein, M is an integer greater than or equal to 1.
  • the present invention also provides a feedback signal detection method, including the following processes:
  • the process of the detection operation is: when the write channel of the pixel unit of the nth row is gated, the pixel unit is controlled to generate a feedback signal and the reference digital-to-analog converter is controlled to output a comparison voltage, so that the first input end of the comparator receives the feedback signal corresponding feedback voltage, and make the second input terminal of the comparator receive the comparison voltage; compare the feedback voltage and the comparison voltage; control the comparator to feed back the comparison result to the aging information memory through the shift-out circuit.
  • the out-of-pixel compensation single DAC Digital-to-Analog Converter, digital-to-analog converter
  • AMOLED Organic-Voltage-Coupled Device
  • OLED-on-Silicon QLED-on-Silicon
  • PMOLED Passive matrix organic electroluminescent diode, Passive matrix OLED
  • LCD driver chips OLED lighting driver chips and other types of products.
  • FIG. 1 is a schematic structural diagram of a traditional external compensation display system
  • FIG. 2 is a schematic structural diagram of a pixel unit applicable to the present invention.
  • FIG. 3 is a schematic structural diagram of a pixel unit suitable for the present invention.
  • FIG. 4 is a schematic diagram of a partial structure of the display system according to the first embodiment
  • FIG. 5 is a schematic diagram of a partial structure of the display system according to the second embodiment.
  • FIG. 6 is a schematic diagram of a partial structure of a display system according to Embodiment 3.
  • FIG. 7 is a schematic diagram of a partial structure of the display system according to the fourth embodiment and the fifth embodiment.
  • FIG. 8 is a schematic diagram of a detection operation flow of the present invention.
  • FIG. 9 is a schematic diagram showing the comparison between the feedback voltage and the comparison voltage.
  • controller 10 line scan driver 20, source driver 30, display panel 40, timing control module 11, compensation algorithm module 12, aging information memory 13, shift-in circuit 31, detection unit 32, shift-out circuit 33, source Drive module 321, detection module 322, digital-to-analog converter 51, comparator 52, current source 53, current copy circuit 54, current-to-voltage circuit 55, pixel unit 41, display address line 42, feedback address line 43, display signal line 44.
  • connection and “connection” mentioned in the present invention, unless otherwise specified, include both direct and indirect connections (connections).
  • N is an integer greater than or equal to 1
  • n is an integer greater than or equal to 1 and less than or equal to N
  • M is an integer greater than or equal to 1
  • m is an integer greater than or equal to 1 and less than or equal to M
  • K is a natural number greater than 0, and k is A natural number greater than 0, t is an integer greater than or equal to 1 and less than or equal to M.
  • the compensation schemes for AMOLED display systems are divided into in-pixel compensation and out-of-pixel compensation (or external compensation).
  • the out-of-pixel compensation methods are divided into real-time compensation methods and non-real-time compensation methods.
  • Domain compensation method and analog domain compensation method the present invention adopts the digital domain compensation method.
  • the display digital signal and the aging signal in the memory are generally calculated into a compensated digital display signal through a compensation algorithm, and then transmitted from the controller to the source driver.
  • the compensated digital display signal generally has a larger digit width than the original digital display signal.
  • the aging information is 8 bits
  • the display signal is 8 bits
  • the digital display signal compensated by the compensation algorithm may be 10 bits.
  • Digital domain compensation methods are generally applied to a single DAC display system, such as a linear DAC using a 10-bit width.
  • the voltages of 1024 different potentials of the DAC can come from the resistor string.
  • 1023 resistor strings are used to divide 1024 potentials (including the lowest and the highest voltage) between the highest voltage and the lowest voltage in the form of a resistor divider.
  • the controller After the 8-bit digital display signal is calculated by the compensation algorithm using the data in the aging memory, the controller generates a 10-bit compensated digital display signal and then transmits it to the source driver.
  • the source driver module of each channel in the source driver has a 10-bit linear DAC, which converts the 10-bit compensated digital display signal into a compensated analog display signal and writes it into the gated pixel unit.
  • Pixel units form an array. Pixel units suitable for extra-pixel compensation display systems need to have feedback channels, and the aging information in the pixel units needs to be fed back to the aging signal detection module in the source driver for aging detection.
  • the line scan driver sends line scan signals to the display address line (corresponding to the display address signal) and the feedback address line (corresponding to the feedback address signal) respectively.
  • the display address signal is valid
  • the pixel circuit of a row connected to the display address line is turned on, and the signal on the display signal line (such as a correction signal or a compensated analog display signal) is written into the pixel connected to it. in the unit.
  • the feedback address signal is valid, the feedback channel of the pixel unit can be turned on, and the information of the aging of the pixel unit or the uneven threshold voltage of the pixel unit is transmitted to the feedback signal line in the form of current or voltage.
  • the function of the aging signal detection module is to detect whether the aging signal fed back from the pixel unit deviates from the expected aging degree.
  • the test result is a one-digit number, which represents the expected low or high degree of aging.
  • the test result will be output to the controller through the shift-out circuit, and then the aging information memory will be updated.
  • the pixel unit circuit Since the aging information in the pixel unit needs to be transmitted to the feedback signal line, the pixel unit circuit has a feedback channel output port and a feedback channel control input port.
  • the third switch in FIG. 2 forms a feedback channel connecting the pixel unit and the feedback signal line. .
  • the controller controls the source driver and the line scan driver to sequentially select the pixel unit to write the display signal, and also includes an aging information memory, which will be based on the aging information.
  • Each pixel unit can be subjected to various aging compensation, and the compensation algorithm is used to calculate the digital compensation value of each pixel unit.
  • the controller also receives the detection result of the feedback voltage of the pixel unit from the source driver.
  • the display system with out-of-pixel compensation can perform two operations, display operation and correction feedback detection operation.
  • Display operations are generally the same as conventional display systems.
  • the specific implementation details of the correction feedback detection operation need to be matched with the design of the entire off-pixel compensation display system.
  • the correction feedback detection operation may be performed when the display system is not performing the display operation. For example, after the display system is powered on, before the display screen starts to display the picture, when the power supply is still supplied after the display screen is turned off, or the blank period before the frame and the frame, or a period of time is specially arranged to not perform the display operation but to perform the correction feedback detection operation. .
  • the controller sends a control signal to the line scan driver, and the line scan driver sends a line scan signal to the display address line to select a row of pixel units (or some pixel units of a certain row), and the controller uses the aging information memory.
  • the aging data is compensated for the input 8-bit digital display signal, and the 10-bit compensated digital display signal is output to the source driver.
  • the source driver uses the shift-in circuit to serially receive the input 10-bit bit-width compensated digital display signals, and arranges each compensated digital display signal under the corresponding channel.
  • the controller also outputs a control signal to the source driver, and controls the entire row of compensated digital display signals to be output to the source driver module in parallel.
  • Each source driver module includes a 10-bit DAC, which converts the 10-bit compensated digital display signal into a compensated analog display signal and outputs it to the corresponding display signal line, and then writes it into the gated pixel unit.
  • the display signal writing channel of the pixel unit of the specified row (or part of the pixel unit of a certain row) is gated by the line scan driver, and then the correction signal is written through the display signal line.
  • the correction signal can come from the controller or the source.
  • the driver, or generated by the local source driver of the same channel (such as Figure 4, sw1 is turned on, sw2 is turned off and turned on)
  • the line scan driver immediately selects the feedback channel of the pixel unit of the row, and the detection module detects
  • the obtained aging information detection results are latched in parallel, and then serially output to the controller through the shift-out circuit, and then the aging information memory is updated.
  • FIG. 1 is a schematic structural diagram of a conventional external compensation display system, which includes a controller 10 , a line scan driver 20 , a source driver 30 and a display panel 40 .
  • the controller 10 is connected to the line scan driver 20 and the source driver 30 .
  • the controller 10 includes a timing control module 11 , a compensation algorithm module 12 and an aging information memory 13 which are connected in sequence.
  • the source driver 30 includes a shift-in circuit 31 , a shift-out circuit 33 and M detection units 32 ; the detection unit 32 includes a source driver module 321 and a detection module 322 .
  • the display panel 40 includes N rows and M columns of pixel units 41, and the row scan driver 20 leads out N rows of display address lines 42 and feedback address lines 43; wherein, the nth row of display address lines 42 and the feedback address lines 43 are respectively connected to the nth row each pixel unit 41; the row scan driver 20 is used to receive the row control signal of the controller 10 and sequentially select the write channel of each pixel unit from the 1st row to the Nth row through the display address lines of the 1st row to the Nth row .
  • the numbers of the pixel units in the first row are [1,1]...[1,m]...[1,M]
  • the numbers of the pixel units in the nth row are [n,1]... [n,m]...[n,M]
  • the numbers of the pixel units in the Nth row are respectively [N,1]...[N,m]...[N,M].
  • the compensation algorithm module 12 , the shift-in circuit 31 and the source driving module 321 of the m-th column detection unit 32 are connected in sequence.
  • the source driving module 321 of the detection unit 32 in the m-th column is connected to the display signal line 44 in the m-th column and then connected to the pixel units 41 in the m-th column respectively, for receiving the signal input from the controller 10 through the shift-in circuit 31 and passing the signal input from the m-th column
  • the column display signal line 44 writes the compensated analog display signal or the correction signal into the pixel unit 41 of the mth column that is gated by the display address signal line.
  • the detection modules 322 of the detection units 32 in the m-th column are respectively connected to the pixel units 41 in the m-th column through the m-th column feedback signal lines 45 for receiving feedback voltages corresponding to the feedback signals of the pixel units 41 .
  • the output terminal of the detection module 322 of the detection unit 32 in the m-th column, the removal circuit 33 and the aging information memory 13 are connected in sequence, so that the output terminal of the detection module 32 of the detection unit 32 in the m-th column passes the removal circuit 33 to compare the feedback voltage with The detection result obtained by comparing the voltages is fed back to the controller 10 through the shift-out circuit 33 .
  • the detection unit 32 in the m-th column and the pixel unit 41 in the m-th column form the m-th column of drive channels, and the display system is divided into M-th columns of drive channels.
  • the pixel unit 41 includes a second switching transistor Q2, a driving transistor Q1, a third switching transistor Q3 and a light emitting diode T1.
  • the second switch transistor Q2 in the pixel unit 41 of the nth row and the mth column is connected to the display address line 42 of the nth row and the display signal line 44 of the mth column; the second switch transistor Q2, the driving transistor Q1 and the third The switch transistors Q3 are connected in sequence; the light emitting diode T1 is connected between the drive transistor Q1 and the third switch transistor Q3; the third switch transistor Q3 in the pixel unit 41 of the nth row and the mth column is connected to the feedback address line of the nth row 43 and the feedback signal line 45 of the mth column.
  • an optional pixel unit 41 of the present invention includes a second switch transistor Q2, a drive transistor Q1, a third switch transistor Q3 and a light emitting diode T1; wherein, the second switch transistor Q2,
  • the driving transistor Q1 and the third switching transistor Q3 are N-type transistors.
  • the gate of the second switch transistor Q2 is connected to the display address line 42 of the nth row, the first pole of which is connected to the display signal line 44 of the mth column, and the second switch Q2 is connected to the display address line 42 of the nth row.
  • the electrode is connected to the gate of the driving transistor Q1.
  • the first pole of the driving transistor Q1 is connected to its working voltage terminal VDD_OLED, and its second pole is connected to the positive pole of the light emitting diode T1 and the first pole of the third switching transistor Q3; the working voltage of the display panel is the same as that of the source driver or the line scan driver.
  • the operating voltage can vary.
  • the cathode of the light-emitting diode T1 is connected to its ground terminal VSS_OLED (negative voltage or 0V can be selected).
  • the gate of the third switch transistor Q3 is connected to the feedback address line 43 in the nth row, and the second pole thereof is connected to the feedback signal line 45 in the mth column.
  • another optional pixel unit 41 of the present invention includes a second switch transistor Q2, a drive transistor Q1, a third switch transistor Q3 and a light emitting diode T1; wherein, the second switch transistor Q2, the drive transistor Q1 and the third switch tube Q3 are P-type tubes.
  • the gate of the second switch transistor Q2 in the pixel unit 41 of the nth row and the mth column is connected to the display address line 42 of the nth row, the first pole of which is connected to the display signal line 44 of the mth column, and the second The electrode is connected to the gate of the driving transistor Q1.
  • the first electrode of the driving transistor Q1 is connected to the negative electrode of the light emitting diode T1 and the first electrode of the third switching transistor Q3, and the second electrode thereof is connected to the ground terminal VSS_OLED thereof.
  • the anode of the light emitting diode T1 is connected to its working voltage terminal VDD_OLED.
  • the gate of the third switch transistor Q3 is connected to the feedback address line 43 in the nth row, and the second pole thereof is connected to the feedback signal line 45 in the mth column.
  • the driving transistor Q1, the second switching transistor Q2 and the third switching transistor Q3 can be, for example, amorphous silicon. , transistors prepared by polysilicon, oxide semiconductor, organic semiconductor, thin film technology, NMOS technology, PMOS technology or CMOS technology.
  • a conventional display panel circuit structure can be formed only by adjusting the connection relationship of the three Replacing the driving transistor Q1, the second switching transistor Q2 and the third switching transistor Q3 of the present invention with different types of transistors and designing a display panel are also conventional technical means in the art, that is, using other types of transistors to design a circuit for a display panel also falls into the same category. protection scope of the present invention.
  • the source electrode of the transistor as the first electrode and the drain electrode as the second electrode during the design process of the specific circuit structure; alternatively, the drain electrode of the transistor can also be used as the first electrode and the source electrode as the second pole.
  • the preset potential may be a low potential V1 or a high potential V2, and the low potential V1 and the high potential V2 may be set fixed voltages.
  • the detection unit in the t-th column may be set to be adjacent to the detection unit in the m-th column, for example, the detection unit in the t-th column is the detection unit in the m-1th column, or the detection unit in the t-th column is the m+th column. 1 column detection unit.
  • the detection unit of the t-th column may also be separated from the detection unit of the m-th column by other detection units.
  • feedback signal may refer to the following “feedback voltage” or “feedback information”.
  • the feedback information, the feedback signal and the feedback voltage may reflect the aging information or the aging condition of the device.
  • the display system of the present invention is an extra-pixel compensation single DAC display system, or is called an extra-pixel compensation AMOLED display system.
  • the comparator 52 of the detection unit 32 adopts a voltage comparator
  • the detection module 322 is a module for detecting aging information.
  • the light-emitting device is a light-emitting diode, which can be an organic light-emitting diode (OLED), or a quantum dot light-emitting diode (QLED), or a general type and various other types of LEDs (Light-Emitting Diodes). Diode).
  • OLED organic light-emitting diode
  • QLED quantum dot light-emitting diode
  • Diode Light-Emitting Diodes
  • the aging information memory 13 can store various aging information.
  • this embodiment is improved on the basis of the traditional external compensation display system.
  • the display system of the feedback signal detection method of this embodiment adopts the pixel unit shown in FIG. 2 .
  • the driving module 321 includes a digital-to-analog converter 51
  • the detection module 322 includes a comparator 52 and a current source 53
  • the current source 53 of the detection unit in the m-th column is connected to each pixel unit 41 in the m-th column through the feedback signal line 45 in the m-th column. .
  • the preset potential in this embodiment is the low potential V1.
  • the digital-to-analog converter 51 of the detection unit is connected to the display signal line 44 through the second switch sw2, and then connected to each pixel unit 41 of the column.
  • the display signal line 44 is also connected to the low potential V1 through the first switch sw1, and V1 may be 0V.
  • the operations of the first switch sw1 and the second switch sw2 are opposite, one is turned on and the other is turned off.
  • the positive input terminal of the comparator 52 in the m-th column detection unit is connected to the m-th column feedback signal line 45 , and the negative input terminal of the comparator 52 is connected to the digital-to-analog converter 51 of the m-th column detection unit.
  • the reference digital-to-analog converter is the digital-to-analog converter 51 of the m-th column detection unit.
  • the digital-to-analog converter for reference may be a digital-to-analog converter of detection units other than the m-th column.
  • the feedback signal detection method of this embodiment is used to detect the threshold voltage of the light-emitting diode T1, and includes the following processes:
  • Process 1 sequentially select the write channels of the pixel units from the 1st row to the Nth row and perform a detection operation when the write channels of each row of pixel units are selected;
  • the line scan driver 20 gates the write channel of the pixel unit of the nth row, and the line scan driver 20 outputs a scan signal to the display address line 42 of the nth row, so that the low voltage is written into the gate of the driving transistor Q1, and the turn-off is turned on.
  • St2 Control the pixel unit to generate a feedback signal and control the reference digital-to-analog converter to output a comparison voltage, so that the positive input terminal of the comparator receives the feedback voltage, and the negative input terminal of the comparator receives the comparison voltage.
  • the timing control module 11 controls the second switch sw2 of the m-th column driving channel to be turned off and the first switch sw1 to be turned on.
  • the second switch sw2 is turned off, the connection between the digital-to-analog converter 51 and the display signal line 44 is disconnected, and the digital-to-analog converter 51 cooperates with the voltage comparator 52 to detect the aging information. Since the first switch sw1 is turned on, the low potential V1 inputs a low voltage to the display signal line 44 through the first switch sw1.
  • the row scan driver 20 gates the feedback channel of the nth row of pixel units
  • the current source 53 of the detection unit in the mth column inputs a preset low current (eg, 1 nA) to the pixel unit 41 through the feedback signal line 45 in the mth column; since the current is relatively small, it can be considered that the voltage of the anode of the LED T1 and the feedback signal line 45
  • the voltage on is the threshold voltage of the light-emitting diode T1.
  • the voltage on the feedback signal line 45 is stable, it can be compared with the voltage selected by the digital-to-analog converter;
  • the obtained feedback voltage of the pixel unit 41 in the n-th row and the m-th column is the voltage on the feedback signal line 45 in the m-th column.
  • the timing control module 11 controls the digital-to-analog converter 51 of the detection unit in the mth column to generate the selected voltage, and the obtained comparison voltage is the voltage selected by the digital-to-analog converter 51 of the detection unit in the mth column.
  • the comparison voltage is: the controller 10 outputs the DAC input value corresponding to the threshold voltage of the light-emitting diode T1 of the pixel unit 41 in the m-th column previously detected to the 10-bit digital-to-analog converter 51 of the detection unit in the m-th column, and then through the digital-to-analog The voltage output by the converter 51 .
  • the comparator 52 compares the feedback voltage with the comparison voltage.
  • the comparator 52 feeds back the detection result obtained by the comparison to the aging information memory 13 through the shift-out circuit 33, and the aging information memory 13 stores the detection result and updates the data.
  • Process 2 Repeat process 1. As process 1 is repeated continuously, the input value of the digital-to-analog converter 51 will stably jump between K and K+1 in the later operation, and the feedback voltage can be determined. The final result compared to the comparison voltage.
  • Embodiment 2 is a diagrammatic representation of Embodiment 1:
  • this embodiment is improved on the basis of the traditional external compensation display system.
  • the display system of the feedback signal detection method of this embodiment adopts the pixel unit shown in FIG. 2 .
  • the driving module 321 includes a digital-to-analog converter 51
  • the detection module 322 includes a comparator 52.
  • the preset potential is a high potential V2, and V2 can be a high voltage from a resistor string or a high voltage with a known voltage value. The voltage can ensure that the driving transistor Q1 is turned on, and V2 corresponds to the following Vg.
  • the digital-to-analog converter 51 of the detection unit is connected to the display signal line 44 through the second switch sw2, and further connected to each pixel unit 41 of the column.
  • the display signal line 44 is also connected to the high potential V2 through the first switch sw1.
  • the display signal line 44 of the m-th column in this embodiment is also connected to the high potential V2 through the first switch sw1.
  • the negative input terminal of the comparator 52 of the m-th column detection unit is connected to the digital-to-analog converter 51 of the m-th column detection unit.
  • the reference digital-to-analog converter is the digital-to-analog converter 51 of the m-th column detection unit.
  • the digital-to-analog converter for reference may be a digital-to-analog converter of detection units other than the m-th column.
  • the feedback signal detection method of this embodiment is used to detect the threshold voltage of the driving transistor Q1, and includes the following process:
  • Process 1 sequentially select the write channels of the pixel units from the 1st row to the Nth row and perform a detection operation when the write channels of each row of pixel units are selected;
  • the line scan driver 20 gates the write channel of the pixel unit 41 in the nth row, and the line scan driver 20 outputs a scan signal to the display address line 42 in the nth row;
  • St2 Control the pixel unit to generate a feedback signal and control the reference digital-to-analog converter to output a comparison voltage, so that the positive input terminal of the comparator receives the feedback voltage, and the negative input terminal of the comparator receives the comparison voltage.
  • the high voltage can be one of the optional voltages Vg of the 10-bit DAC (for example, Vg is 10 -bit DAC input is equal to the output voltage when 1000) or a high voltage with a known voltage value, the high voltage can ensure that the driving transistor Q1 is turned on;
  • the line scan driver 20 gates the feedback channel of the pixel unit 41 in the nth row, and outputs the source terminal voltage (ie the OLED anode voltage) of the driving transistor Q1 to the positive input terminal of the comparator 52 through the feedback signal line 45;
  • the obtained feedback voltage of the pixel unit 41 in the n-th row and the m-th column is the voltage on the feedback signal line 45 in the m-th column, that is, the source terminal voltage of the driving transistor Q1.
  • the timing control module 11 controls the digital-to-analog converter 51 of the detection unit in the mth column to generate the selected voltage, and the obtained comparison voltage is the voltage selected by the digital-to-analog converter 51 of the detection unit in the mth column.
  • the comparison voltage is: the controller 10 outputs the DAC input value corresponding to the threshold voltage of the driving transistor Q1 of the pixel unit 41 in the m-th column previously detected to the 10-bit digital-to-analog converter 51 of the detection unit in the m-th column, and then through the digital-to-analog converter 51. The voltage output by the converter 51 .
  • the comparator 52 compares the feedback voltage with the comparison voltage.
  • the comparator 52 feeds back the detection result obtained by the comparison to the aging information memory 13 through the shift-out circuit 33, and the aging information memory 13 stores the detection result and updates the data.
  • Process 2 Repeat process 1. As process 1 is repeated continuously, the input value of the digital-to-analog converter 51 will stably jump between K and K+1 in the later operation, and the feedback voltage can be determined. The final result compared to the comparison voltage. At this time, it can be considered that the input value of the 10-bit DAC corresponding to the source voltage of the driving transistor Q1 is K.
  • the aging of the driving transistor Q1 will cause its threshold voltage to drift upward, and the source voltage of the driving transistor Q1 is equal to the gate voltage minus the threshold voltage.
  • Vg of the gate of the driving transistor Q1 correspond to the input value of the 10-bit DAC is G
  • Vs of the source of the driving transistor Q1 corresponds to the input value of the 10-bit DAC is S
  • Vs Vg – Vth
  • Vth Vg – Vs.
  • the threshold voltage Vth already includes the body effect of the driving transistor Q1.
  • the value of Vg has been preselected and is known, and Vs can be detected by the digital-to-analog converter 51 and the comparator 52, so the Vth of the driving transistor Q1 can be calculated. When the Vth value increases after the driving transistor Q1 is aged, the detected Vs will decrease accordingly.
  • this embodiment makes improvements on the basis of the traditional external compensation display system.
  • the display system of the feedback signal detection method of this embodiment adopts the pixel unit shown in FIG. 2 .
  • the driving module 321 includes a digital-to-analog converter 51
  • the detection module 322 includes a comparator 52, a current copy circuit 54 and a current-to-voltage circuit 55
  • the positive input terminal of the comparator 52 of the m-th detection unit sequentially passes through the current-to-voltage circuit 55 and
  • the current copy circuit 54 is connected to the feedback signal line 45 of the m-th column, and further connected to the respective pixel units 41 of the m-th column.
  • the digital-to-analog converter 51 of the detection unit is connected to the display signal line 44 through the second switch sw2, and further connected to each pixel unit 41 of the column.
  • the display signal line 44 is also connected to the low potential V1 through the first switch sw1.
  • the pixel units 41 of all columns are divided into single-numbered column driving channels and double-numbered column driving channels.
  • the detection unit in the m-th column can be set in the single-numbered column driving channel (the left driving channel in FIG. 6 ), and the t-th column can be set as the driving channel.
  • the detection unit is in the drive channel of the even-numbered column (the right-hand drive channel in Figure 6); it is also possible to make the detection unit of the m-th column drive the channel of the even-numbered column, and the detection unit of the t-th column to be the drive channel of the odd-numbered column.
  • the negative input terminal of the comparator 52 of the detection unit of the m-th column is connected to the digital-to-analog converter of the detection unit of the t-th column.
  • the reference digital-to-analog converter is the digital-to-analog converter of the t-th column detection unit.
  • the detection unit of the t-th column may be adjacent to the detection unit of the m-th column, or other detection units may be separated from the detection unit of the m-th column.
  • the feedback signal detection method of this embodiment is used to detect the current of the driving transistor Q1 to calculate the threshold voltage of the driving transistor Q1, including the following process:
  • Process 1 sequentially select the write channels of the pixel units from the 1st row to the Nth row and perform a detection operation when the write channels of each row of pixel units are selected;
  • the row scan driver 20 sends a scan signal to the display address signal line, and gates the write channel of the pixel unit 41 in the nth row;
  • St2 Control the pixel unit to generate a feedback signal and control the reference digital-to-analog converter to output a comparison voltage, so that the positive input terminal of the comparator receives the feedback voltage, and the negative input terminal of the comparator receives the comparison voltage.
  • the compensation algorithm module 12 writes the compensated digital correction signal to the digital-to-analog converter 51 of the m-th column detection unit through the shift-in circuit 31;
  • the compensated digital correction signal may be a compensated display grayscale 1 value, this value will correspond to a certain expected current output by the drive tube Q1, such as 10nA;
  • the digital-to-analog converter 51 of the detection unit in the mth column outputs the compensated analog correction signal
  • the controller 10 controls the second switch sw2 of the t-th column driving channel to be turned off and the first switch sw1 to be turned on, so that a low voltage (such as 0V) is written into the t-th column driving transistor Q1; since the second switch sw2 is turned off, the The digital-to-analog converter of the source driver module in column t is disconnected from the display signal line;
  • the above compensated digital correction signal will cause the target pixel unit 41 to output a feedback current of a predetermined size
  • the row scan driver 20 sends a scan signal to the feedback address line 43 to select the feedback channel of the pixel unit 41 in the nth row;
  • the current copy circuit 54 of the detection unit in the m-th column fixes the voltage of the feedback signal line 45 at a low voltage (the low voltage is lower than the minimum possible voltage of the OLED threshold, such as 0.8V; generally, the OLED threshold voltage exceeds 1V) to ensure light emission
  • the diode T1 is turned off and turned on; all the feedback current of the driving transistor Q1 is led to the feedback signal line 45 and then output to the current copy circuit 54 , and the current copy circuit 54 copies the feedback current to its output terminal and outputs it to the current to voltage circuit 55 ;
  • the current-to-voltage circuit 55 of the detection unit in the mth column converts the current into a voltage signal and outputs it to the positive input terminal of the comparator 52;
  • the obtained feedback voltage of the pixel unit 41 in the n-th row and the m-th column is the voltage signal from the current-to-voltage circuit 55 in the m-th column detection unit.
  • the compensation algorithm module 12 outputs the DAC input value corresponding to the feedback current of the driving transistor Q1 of the pixel unit 41 in the m-th column previously detected (that is, the DAC input value corresponding to the feedback current of the driving transistor Q1 under the correction signal) to the detection unit 10 of the t-th column.
  • -bit digital-to-analog converter
  • the digital-to-analog converter of the t-th column detection unit converts the DAC input value into a voltage signal and outputs it to the negative input end of the comparator 52 of the m-th column of detection unit;
  • the obtained comparison voltage is the voltage signal from the digital-to-analog converter of the t-th column detection unit.
  • the comparator 52 compares the feedback voltage with the comparison voltage. Comparing the obtained detection results can indicate whether the previous detection results stored by the controller 10 are too large or too small.
  • the comparator 52 feeds back the detection result obtained by the comparison to the aging information memory 13 through the shift-out circuit 33, and the aging information memory 13 stores the detection result and updates the data.
  • Process 2 Repeat process 1. As process 1 is repeated continuously, the input value of the digital-to-analog converter 51 will stably jump between K and K+1 in the later operation, and the feedback voltage can be determined. The final result compared to the comparison voltage.
  • the correction feedback detection operation can be performed on the pixel unit of the tth column of the row, and the roles of the mth column and the tth column in the correction feedback detection operation will be reversed. come over.
  • Embodiment 4 is a diagrammatic representation of Embodiment 4:
  • this embodiment is improved on the basis of the traditional external compensation display system.
  • the display system of the feedback signal detection method of this embodiment adopts the pixel unit shown in FIG. 2 .
  • the driving module 321 includes a digital-to-analog converter 51
  • the detection module 322 includes a comparator 52 and a current source 53
  • the current source 53 of the detection unit in the m-th column is connected to each pixel unit 41 in the m-th column through the feedback signal line 45 in the m-th column. .
  • the digital-to-analog converter 51 of the detection unit is connected to the display signal line 44 through the second switch sw2, and further connected to each pixel unit 41 of the column.
  • the display signal line 44 is also connected to the low potential V1 through the first switch sw1.
  • the pixel units 41 of all columns are divided into single-numbered column driving channels and double-numbered column driving channels.
  • the detection unit in the m-th column can be driven by the odd-numbered column channel (the left driving channel in FIG. 7 ), and the t-th column can be set as the driving channel.
  • the detection unit is in the drive channel of the even-numbered column (the right-hand drive channel in Figure 7); it is also possible to make the detection unit of the m-th column drive the channel of the even-numbered column, and the detection unit of the t-th column to be the drive channel of the odd-numbered column.
  • the negative input terminal of the comparator 52 of the detection unit of the m-th column is connected to the digital-to-analog converter of the detection unit of the t-th column.
  • the reference digital-to-analog converter is the digital-to-analog converter of the t-th column detection unit.
  • the detection unit of the t-th column may be adjacent to the detection unit of the m-th column, or other detection units may be separated from the detection unit of the m-th column.
  • the feedback signal detection method of this embodiment is used to detect the threshold voltage of the light-emitting diode T1, and includes the following processes:
  • Process 1 sequentially select the write channels of the pixel units from the 1st row to the Nth row and perform a detection operation when the write channels of each row of pixel units are selected;
  • the row scan driver 20 sends a scan signal to the display address signal line of the nth row, and gates the write channel of the pixel unit 41 of the nth row;
  • St2 Control the pixel unit to generate a feedback signal and control the reference digital-to-analog converter to output a comparison voltage, so that the positive input terminal of the comparator receives the feedback voltage, and the negative input terminal of the comparator receives the comparison voltage.
  • the compensation algorithm module 12 inputs a zero input signal (ie, writes digital 0) to the digital-to-analog converter 51 of the m-th column detection unit through the shift-in circuit 31;
  • the digital-to-analog converter 51 of the detection unit in the m-th column converts the zero input signal into a voltage signal and writes it into the pixel unit 41 in the m-th column, thereby turning off the driving transistor Q1 in the m-th column; this low voltage can also be generated locally , and does not need to be input from the controller 10; the compensation algorithm module 12 outputs the DAC input value corresponding to the OLED threshold voltage detected before the detection unit in the mth column (or the DAC input value corresponding to the expected OLED threshold voltage) to the tth column.
  • the digital-to-analog converter of the detection unit converts the zero input signal into a voltage signal and writes it into the pixel unit 41 in the m-th column, thereby turning off the driving transistor Q1 in the m-th column; this low voltage can also be generated locally , and does not need to be input from the controller 10; the compensation algorithm module 12 outputs the DAC input value corresponding to the OLED threshold voltage detected before the detection unit in the m
  • the controller 10 controls the second switch sw2 of the driving channel of the t column to be turned off and the first switch sw1 to be turned on, so that a low voltage (such as 0V) is written into the pixel unit of the t column, thereby turning off the driving of the t column.
  • tube Q1; the second switch sw2 is disconnected, so that the digital-to-analog converter in the t-th column is disconnected from the display signal line;
  • the current source 53 of the detection unit in the m-th column inputs a preset current (eg, 1 nA) to the pixel unit 41 through the feedback signal line 45 in the m-th column;
  • the obtained feedback voltage of the pixel unit 41 in the nth row and the mth column is the voltage on the feedback signal line 45 in the mth column. If the LED T1 ages, the threshold voltage will drift upwards.
  • the digital-to-analog converter of the detection unit in the t-th column converts its input value into a voltage signal and outputs it to the negative input terminal of the comparator 52 of the detection unit in the m-th column;
  • the obtained comparison voltage is a voltage signal converted by the digital-to-analog converter of the detection unit in the t-th column to the DAC input value corresponding to the OLED threshold voltage detected before the detection unit in the m-th column.
  • the comparator 52 compares the feedback voltage with the comparison voltage. Comparing the obtained detection results can indicate whether the OLED threshold voltage expected by the controller 10 is too large or too small.
  • the comparator 52 feeds back the detection result obtained by the comparison to the aging information memory 13 through the removal circuit 33, and the aging information memory 13 stores the detection result.
  • Process 2 Repeat process 1. As process 1 is repeated continuously, the input value of the digital-to-analog converter 51 will stably jump between K and K+1 in the later operation, and the feedback voltage can be determined. The final result compared to the comparison voltage.
  • the correction feedback detection operation can be performed on the pixel unit of the tth column of the row, and the roles of the mth column and the tth column in the correction feedback detection operation will be reversed. come over.
  • Embodiment 5 is a diagrammatic representation of Embodiment 5:
  • this embodiment is improved on the basis of the traditional external compensation display system.
  • the display system of the feedback signal detection method of this embodiment adopts the pixel unit shown in FIG. 2 .
  • the driving module 321 includes a digital-to-analog converter 51
  • the detection module 322 includes a comparator 52 and a current source 53
  • the current source 53 of the detection unit in the m-th column is connected to each pixel unit 41 in the m-th column through the feedback signal line 45 in the m-th column. .
  • the digital-to-analog converter 51 of the detection unit is connected to the display signal line 44 through the second switch sw2, and further connected to each pixel unit 41 of the column.
  • the display signal line 44 is also connected to the low potential V1 through the first switch sw1.
  • the pixel units 41 of all columns are divided into single-numbered column driving channels and double-numbered column driving channels.
  • the detection unit in the m-th column can be driven by the odd-numbered column channel (the left driving channel in FIG. 7 ), and the t-th column can be set as the driving channel.
  • the detection unit is in the drive channel of the even-numbered column (the right-hand drive channel in Figure 7); it is also possible to make the detection unit of the m-th column drive the channel of the even-numbered column, and the detection unit of the t-th column to be the drive channel of the odd-numbered column.
  • the negative input terminal of the comparator 52 of the detection unit of the m-th column is connected to the digital-to-analog converter of the detection unit of the t-th column.
  • the reference digital-to-analog converter is the digital-to-analog converter of the t-th column detection unit.
  • the detection unit of the t-th column may be adjacent to the detection unit of the m-th column, or other detection units may be separated from the detection unit of the m-th column.
  • the feedback signal detection method of this embodiment is used to detect the threshold voltage of the driving transistor Q1, and includes the following process:
  • Process 1 sequentially select the write channels of the pixel units from the 1st row to the Nth row and perform a detection operation when the write channels of each row of pixel units are selected;
  • the row scan driver 20 sends a scan signal to the display address signal line of the nth row, and gates the write channel of the pixel unit 41 of the nth row;
  • St2 Control the pixel unit to generate a feedback signal and control the reference digital-to-analog converter to output a comparison voltage, so that the positive input terminal of the comparator receives the feedback voltage, and the negative input terminal of the comparator receives the comparison voltage.
  • the compensation algorithm module 12 inputs a correction signal (for example, 1000) to the digital-to-analog converter 51 of the detection unit in the m-th column through the shift-in circuit 31, and the correction signal needs to ensure that the driving transistor Q1 can be turned on when the pixel unit 41 is written;
  • the DAC input value corresponding to the threshold voltage of the driving transistor Q1 (or the DAC input value corresponding to the expected threshold voltage of the driving transistor Q1) detected before the detection unit of the mth column is output to the digital-to-analog converter of the detection unit of the tth column;
  • the digital-to-analog converter 51 of the detection unit in the m-th column converts the correction signal into a voltage signal and writes it into the pixel unit 41 in the m-th column, thereby turning on the driving transistor Q1 in the m-th column; the correction signal can also be generated locally
  • the voltage signal of the selected voltage value does not need to be input from the controller 10;
  • the threshold voltage of the pixel unit 41 in the m columns drives the transistor Q1;
  • the row scan driver 20 sends a scan signal to the feedback address signal line of the nth row, and gates the feedback channel of the pixel unit 41 of the nth row, so that the source voltage of the driving transistor Q1 in the pixel unit 41 of the mth column is output to the feedback signal line 45.
  • Comparator 52 positive input;
  • the obtained feedback voltage of the pixel unit 41 in the n-th row and the m-th column is the voltage on the feedback signal line 45 in the m-th column.
  • the digital-to-analog converter of the detection unit in the t column converts the DAC input value corresponding to the threshold voltage of the driving transistor Q1 detected before the detection unit in the m column into a voltage signal and outputs it to the negative input terminal of the comparator 52 of the detection unit in the m column;
  • the obtained comparison voltage is a voltage signal converted by the digital-to-analog converter of the detection unit in the t-th column to the DAC input value corresponding to the threshold voltage of the driving transistor Q1 detected before the detection unit in the m-th column.
  • the comparator 52 compares the feedback voltage with the comparison voltage.
  • the comparator 52 feeds back the detection result obtained by the comparison to the aging information memory 13 through the removal circuit 33, and the aging information memory 13 stores the detection result.
  • Process 2 Repeat process 1. As process 1 is repeated continuously, the input value of the digital-to-analog converter 51 will stably jump between K and K+1 in the later operation, and the feedback voltage can be determined. The final result compared to the comparison voltage.
  • the correction feedback detection operation can be performed on the pixel unit of the tth column of the row, and the roles of the mth column and the tth column in the correction feedback detection operation will be reversed. come over.
  • FIG. 8 is a schematic flowchart of the feedback signal detection method of the present invention, which is suitable for describing the method of the display system in the first embodiment to the fifth embodiment.
  • the display systems of the first embodiment to the fifth embodiment select different reference numbers respectively. Therefore, the analog converters have different circuit structures, and the main difference between the methods of the first embodiment to the fifth embodiment is the St2 process.
  • the detection operations in this paper are all directed to the pixel unit of the n-th row and the m-th column, and the pixel unit of the n-th row and the m-th column is used as the target pixel unit.
  • the St1 process and the St2 process can be performed simultaneously.
  • the feedback signal detection method of the present invention includes the following processes:
  • Process 1 sequentially select the write channels of the pixel units from the 1st row to the Nth row and perform a detection operation when the write channels of each row of pixel units are selected;
  • the process of the detection operation is specifically: St1, gating the write channel of the pixel unit of the nth row; St2, controlling the pixel unit to generate a feedback signal and controlling the reference digital-to-analog converter to output a comparison voltage, so that the comparison
  • the first input terminal of the comparator receives the feedback voltage, and the second input terminal of the comparator receives the comparison voltage; St3, compares the feedback voltage and the comparison voltage; aging information memory;
  • Process 2 Repeat the process 1. As the process 1 is repeated continuously, the input value of the digital-to-analog converter 51 will stably jump between K and K+1 in the later operation. It should be understood by those skilled in the art that process one can be repeatedly performed.
  • the positive input terminal of the comparator 52 can be set as the first input terminal, and the negative input terminal can be set as the second input terminal. Then St3 compares the feedback voltage with the comparison voltage as follows:
  • the comparator 52 compares the comparison voltage with the feedback voltage
  • the comparator 52 compares the comparison voltage with the feedback voltage and outputs a result of 1 in the first round of scanning, then when the line scan driver 20 performs the second round of scanning, when the write channel of the nth row is gated again, the comparison voltage is controlled. Increase the preset value k; if in the first round of scanning, the comparator 52 compares the comparison voltage with the feedback voltage and the output result is 0, then when the row scanning driver 20 performs the second round of scanning, the write channel of the n-th row is reset again. When gating, control the comparison voltage to reduce the preset value k;
  • the line scan driver 20 When the line scan driver 20 performs a certain round of scanning, after the result outputted by the comparator 52 comparing the comparison voltage and the feedback voltage is inverted for the first time, if the first inversion is 1 to 0, then when the nth row write channel is selected for the next time When it is turned on, the control comparison voltage decreases by 1; if it is turned from 0 to 1 for the first time, when the write channel of the nth row is gated next time, the control comparison voltage increases by 1;
  • the line scan driver 20 continues to repeatedly perform multiple rounds of scan gating on the pixel units from the first row to the Nth row.
  • the nth row write channel is gated again, if the result of the previous comparison is 1, this time control
  • the comparison voltage is increased by 1; if the result of the previous comparison is 0, the comparison voltage of this control is decreased by 1;
  • the line scan driver 20 continues to repeatedly perform multiple rounds of scan gating on the pixel units in the first row to the Nth row, until the nth row of the write channel is subsequently gated, the feedback voltage and the comparison voltage with a value of K+1 are performed. If the output result of the comparison is 0 and the feedback voltage is compared with the comparison voltage whose value is K, the output result is 1, and a certain value between K and K+1 is used as the final result. For example, an intermediate value between K and K+1, an average value, a numerical value K, or a numerical value K+1 can be used as the detection result, and the calculation of the mean value includes calculation schemes such as arithmetic mean or geometric mean. The operation of "taking a certain value between K and K+1 as the final result" can be performed by the timing control module 11 or determined by a technician.
  • the display system uses the pixel unit shown in Figure 2, and the comparison voltage is the DAC input value.
  • the DAC input terminal first selects a value, assuming that it starts from the value 0, and then converts it to the corresponding value corresponding to the value 0 through the DAC
  • the analog signal (voltage) is output to the negative input terminal of the comparator 52 , and the positive input terminal of the comparator 52 inputs the signal to be detected (ie, the feedback voltage). If the result is 0, it means that the voltage selected by the DAC is high, but at this time the input of the DAC is already 0 and cannot be lower, which means that the input voltage to be detected exceeds the detectable range.
  • k is an integer other than 0, such as 1. If the result of the next round of comparison is still 1, the DAC input value is raised again until the output of the comparator 52 is 0, indicating that the voltage corresponding to the input value selected by the DAC has exceeded the detected signal input by the positive terminal of the comparator , this is the first flip.
  • the DAC value starts from 0, and the final state should be: when the DAC value rises to K+1, the output result of the comparator 52 is 0, indicating that the voltage selected by the DAC is larger than the compared voltage , then in the next comparison, the voltage value selected by the DAC will be decremented by 1; when the DAC value drops to K, the output result of the comparator 52 is 1, indicating that the voltage selected by the DAC is smaller than the compared voltage, and then the next time During the comparison, the voltage value selected by the DAC will be added by 1; this cycle will achieve stability. Finally, the input value of the entire DAC will be stable and jump between K and K+1, indicating that the voltage being compared is between the voltages corresponding to K and K+1.
  • the comparator 52 compares the comparison voltage with the feedback voltage
  • the comparator 52 compares the comparison voltage with the feedback voltage and outputs a result of 0 in the first round of scanning, then when the line scan driver 20 performs the second round of scanning, when the write channel of the nth row is gated again, the comparison voltage is controlled. Increase the preset value k; if the comparator 52 compares the comparison voltage with the feedback voltage in the first round of scanning and the output result is 1, then when the row scan driver 20 performs the second round of scanning, the write channel of the nth row is selected again When on, control the comparison voltage to reduce the preset value k;
  • the line scan driver 20 When the line scan driver 20 performs a certain round of scanning, after the result outputted by the comparator 52 comparing the comparison voltage and the feedback voltage is inverted for the first time, if the first inversion is 0 to 1, then when the nth row write channel is selected for the next time When it is turned on, the control comparison voltage decreases by 1; if it is flipped from 1 to 0 for the first time, when the write channel of the nth row is gated next time, the control comparison voltage increases by 1;
  • the line scan driver 20 continues to repeatedly perform multiple rounds of scanning and gating on the pixel units in the first row to the Nth row.
  • the nth row write channel is gated again, if the result of the previous comparison is 0, this time control
  • the comparison voltage is increased by 1; if the result of the previous comparison is 1, the comparison voltage of this control is decreased by 1;
  • the line scan driver 20 continues to repeatedly perform multiple rounds of scan gating on the pixel units in the first row to the Nth row, until the nth row of the write channel is subsequently gated, the feedback voltage and the comparison voltage with a value of K+1 are performed. If the output result of the comparison is 1 and the feedback voltage is compared with the comparison voltage whose value is K, the output result is 0, and a certain value between K and K+1 is used as the final result. For example, an intermediate value between K and K+1, an average value, a numerical value K, or a numerical value K+1 can be used as the detection result, and the calculation of the mean value includes calculation schemes such as arithmetic mean or geometric mean.
  • the system of the feedback signal detection method of the present invention is an extra-pixel compensation single DAC display system.
  • the digital-to-analog converter and the comparator are used to detect the feedback information (such as aging information) of the target pixel unit, which can be used for various devices such as TFT, OLED and QLED.
  • Various types of detection such as device aging, non-uniform threshold voltage and non-uniform driving, etc., are suitable for various types of AMOLED, OLED-on-Silicon, QLED-on-Silicon, PMOLED, LCD driver chips and OLED lighting driver chips.
  • AMOLED OLED-on-Silicon
  • QLED-on-Silicon QLED-on-Silicon
  • PMOLED LCD driver chips
  • OLED lighting driver chips OLED lighting driver chips.

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Abstract

本发明提供一种反馈信号检测方法及显示系统，系统包括M列驱动通道；每一列驱动通道包括像素单元和检测单元；检测单元包括源驱动模块和检测模块；源驱动模块包括数模转换器，检测模块包括比较器；数模转换器通过显示信号线连接至像素单元；比较器的第一输入端通过反馈信号线连接至像素单元，用于接收像素单元的反馈信号所对应的反馈电压；其第二输入端连接至参考用数模转换器，用于接收参考用数模转换器输出的比较电压；其输出端用于将反馈电压与比较电压进行比较所得的检测结果输出。本发明的显示系统采用数字域补偿方法，利用数模转换器搭配比较器检测反馈的老化信息，可以对TFT、OLED和QLED等器件做各种检测。

Description

一种反馈信号检测方法及显示系统 技术领域
本发明涉及光电技术领域，具体涉及一种反馈信号检测方法及显示系统。
 背景技术
现有技术中存在多种显示产品，例如AMOLED（有源矩阵有机发光二极体或主动矩阵有机发光二极体，Active-matrix organic light-emitting diode）是采用TFT（薄膜晶体管，Thin Film Transistor）进行像素单元电路陈列并在其上增设OLED（Organic Light-Emitting Diode或Organic Electroluminesence Display，又称有机发光二极管、有机电激光显示或有机发光半导体）的显示屏。
OLED-on-Silicon 或者QLED-on-Silicon类型的微显示产品是用硅做像素单元电路陈列，并在其上增设OLED或者QLED（量子点发光二极管T1，Quantum Dot Light Emitting Diodes）发光器件。
TFT、OLED和QLED等在发光之后都存在老化问题，例如，TFT阈值电压上升导致输入同样的显示信号老化TFT能给出的电流变小。当显示屏开始显示之后，老化TFT的阈值电压或老化OLED的阈值电压会发生飘移。OLED 阈值电压上升会导致OLED电流减少。老化OLED的发光效率降低，即同样的输入电流，老化OLED能发出来的光减少。
除了老化问题，TFT、OLED和QLED等还存在阈值电压不均匀的问题，例如在生产过程因为工艺原因会导致阈值电压不平均进而导致显示屏发光不均匀。由于显示屏上像素单元陈列位置的不同，在显示屏发光时由于电流的流动会导致像素单元电源电压不平均，温度的不平均会导致驱动管电流不平均。各个通道源驱动模块的不平均会导致反馈的驱动电流不平均。
除此之外，所有像素系统的显示驱动芯片本身都存在不同驱动通道即驱动电路驱动不均匀的问题。
 技术问题 技术解决方案
本发明提供一种反馈信号检测方法的显示系统，其包括M列驱动通道；每一列驱动通道包括像素单元和检测单元；检测单元包括源驱动模块和检测模块；源驱动模块包括数模转换器，检测模块包括比较器；数模转换器通过显示信号线连接至像素单元；比较器的第一输入端通过反馈信号线连接至像素单元，用于接收像素单元的反馈信号所对应的反馈电压；其第二输入端连接至参考用数模转换器，用于接收参考用数模转换器输出的比较电压；比较器的输出端用于将反馈电压与比较电压进行比较所得的检测结果输出；其中，M为大于等于1的整数。
本发明还提供一种反馈信号检测方法，包括如下过程：
依次选通第1行至第N行像素单元的写入通道并在每一行像素单元的写入通道被选通时进行检测操作；
重复上述操作，再次选通第1行至第N行像素单元的写入通道并在每一行像素单元的写入通道被选通时进行检测操作；
检测操作的过程为：当第n行像素单元的写入通道被选通时，控制像素单元产生反馈信号以及控制参考用数模转换器输出比较电压，使得比较器的第一输入端接收反馈信号对应的反馈电压，并使得比较器的第二输入端接收比较电压；将反馈电压和比较电压进行比较；控制比较器将比较所得的检测结果通过移出电路反馈至老化信息记忆体。
本发明的像素外补偿单DAC（Digital-to-Analog Converter，数模转换器）显示系统采用数字域补偿方法，利用DAC搭配比较器检测目标像素单元反馈的信息，可以对TFT、OLED和QLED等器件做各种检测，例如器件老化、阈值电压不均匀和驱动不均匀等问题的检测，适用于AMOLED、OLED-on-Silicon、QLED-on-Silicon、PMOLED（被动矩阵有机电激发光二极管，Passive matrix OLED）、LCD驱动芯片和OLED照明驱动芯片等各种类型的产品。
 附图说明
图1为传统的外部补偿显示系统结构示意图；
图2为适用于本发明的像素单元结构示意图；
图3为适用于本发明的像素单元结构示意图；
图4为实施例一的显示系统局部结构示意图；
图5为实施例二的显示系统局部结构示意图；
图6为实施例三的显示系统局部结构示意图；
图7为实施例四和实施例五的显示系统局部结构示意图；
图8为本发明的检测操作流程示意图；
图9为反馈电压与比较电压进行比较示意图。
附图标记：控制器10、行扫描驱动器20、源驱动器30、显示面板40、时序控制模块11、补偿算法模块12、老化信息记忆体13、移入电路31、检测单元32、移出电路33、源驱动模块321、检测模块322、数模转换器51、比较器52、电流源53、电流拷贝电路54、电流转电压电路55、像素单元41、显示地址线42、反馈地址线43、显示信号线44、反馈信号线45、第二开关管Q2、第三开关管Q3、驱动管Q1、发光二极管T1。
 本发明的实施方式
下面通过具体实施方式结合附图对本发明作进一步详细说明。其中不同实施方式中类似元件采用了相关联的类似的元件标号。在以下的实施方式中，很多细节描述是为了使得本发明能被更好的理解。然而，本领域技术人员可以毫不费力的认识到，其中部分特征在不同情况下是可以省略的，或者可以由其他元件、材料、方法所替代。在某些情况下，本发明相关的一些操作并没有在说明书中显示或者描述，这是为了避免本发明的核心部分被过多的描述所淹没，而对于本领域技术人员而言，详细描述这些相关操作并不是必要的，他们根据说明书中的描述以及本领域的一般技术知识即可完整了解相关操作。
另外，说明书中所描述的特点、操作或者特征可以以任意适当的方式结合形成各种实施方式。同时，方法描述中的各步骤或者动作也可以按照本领域技术人员所能显而易见的方式进行顺序调换或调整。因此，说明书和附图中的各种顺序只是为了清楚描述某一个实施例，并不意味着是必须的顺序，除非另有说明其中某个顺序是必须遵循的。
本文中为部件所编序号本身，例如“第一”、“第二”等，仅用于区分所描述的对象，不具有任何顺序或技术含义。而本发明所说“连接”、“联接”，如无特别说明，均包括直接和间接连接（联接）。
本文中，N为大于等于1的整数，n为大于等于1小于等于N的整数；M为大于等于1的整数，m为大于等于1小于等于M的整数；K为大于0的自然数，k为大于0的自然数，t为大于等于1小于等于M的整数。
本技术领域中，对AMOLED显示系统做补偿的方案分为像素内补偿和像素外补偿（或者外部补偿），像素外补偿方法分为实时补偿方法和非实时补偿方法，非实时补偿方法分为数字域补偿方法和模拟域补偿方法，本发明即采用数字域补偿方法。
数字域补偿方法一般是将显示数字信号与记忆体中的老化信号一起经过补偿算法计算成补偿过的数字显示信号再从控制器传给源驱动器。
补偿过的数字显示信号一般位数宽度会比原来数字显示信号大，例如，老化信息是8位，显示信号是8位，经过补偿算法补偿过的数字显示信号可能是10位。
数字域补偿方法一般应用于单个DAC显示系统，例如使用10位宽度的线性DAC。DAC的1024个不同电位的电压可以来自电阻串，比如用1023个电阻串以电阻分压形式在最高电压和最低电压之间分出1024个电位（包括最低和最高电压）。
8位的数字显示信号在控制器利用老化记忆体中的数据经过补偿算法计算之后生成10位的补偿过的数字显示信号再传给源驱动器。源驱动器中每个通道的源驱动模块有一个10位线性DAC，该DAC把10位补偿过的数字显示信号转换成补偿过的模拟显示信号再写入被选通的像素单元。
像素单元组成阵列，适用于像素外补偿显示系统的像素单元都需要具备反馈通道，需要把像素单元内的老化信息反馈到源驱动器内的老化信号检测模块做老化检测。
行扫描驱动器分别发出行扫描信号到显示地址线（对应显示地址信号）和反馈地址线（对应反馈地址信号）上。当显示地址信号有效时，就会与该显示地址线相连的某行的像素电路导通，把显示信号线上的信号（例如校正信号或者是补偿过的模拟显示信号）写入与其相连的像素单元里。当反馈地址信号有效时，就能导通像素单元的反馈通道，把像素单元的老化或者阈值电压不平均的信息以电流或者电压的形式输送到反馈信号线。
老化信号检测模块的作用是检测从像素单元反馈的老化信号与预期的老化程度是否有偏差。检测结果则为一位的数字，代表预期的老化程度偏低或者偏高，该检测结果会通过移出电路输出给控制器，再更新老化信息记忆体。
由于需要把像素单元内的老化信息传递到反馈信号线，故像素单元电路具有反馈通道输出端口和反馈通道的控制输入端口，比如图2的第三开关管形成反馈通道连接像素单元与反馈信号线。
控制器里除了具备传统显示系统的时序控制模块（Timing Controller）控制源驱动器和行扫描驱动器时序逐行选通像素单元写入显示信号的功能，还包括老化信息记忆体，会根据老化信息，每个像素单元都可以被进行各种老化补偿，利用补偿算法计算每个像素单元的数字补偿值。另外控制器也会从源驱动器接收像素单元反馈电压的检测结果。
像素外补偿的显示系统可进行两种操作，显示操作和校正反馈检测操作。显示操作一般与传统显示系统一样。校正反馈检测操作具体实施细节需要与整个像素外补偿显示系统的设计相配合。校正反馈检测操作可以在显示系统没有进行显示操作时进行。比如显示系统上电之后显示屏还没有开始显示画面之前，显示屏关闭之后还有电源供应时，或者帧与帧之前的空白时期，或者特意安排一段时期不进行显示操作而专门进行校正反馈检测操作。
显示操作中，控制器发出控制信号给行扫描驱动器，行扫描驱动器发出行扫描信号到显示地址线上，选通某行像素单元（或者某行的部分像素单元），控制器利用老化信息记忆体的老化数据为输入的8位位宽数字显示信号进行补偿计算，输出10位位宽补偿过的数字显示信号输出给源驱动器。源驱动器利用移入电路串行接收输入的10位位宽补偿过的数字显示信号，排列每个补偿过的数字显示信号在对应的通道下面。控制器也输出控制信号给源驱动器，控制整行的补偿过的数字显示信号平行输出给源驱动模块。每个源驱动模块里面包括一个10位DAC，该DAC把10位补偿过的数字显示信号转换成补偿过的模拟显示信号再输出到对应的显示信号线，再写入选通的像素单元。
校正反馈检测操作中，通过行扫描驱动器选通指定行像素单元（或者某行的部分像素单元）的显示信号写入通道，再通过显示信号线写入校正信号，校正信号可以来自控制器或者源驱动器，或者在本地同通道的源驱动器产生（比如图4，sw1导通，sw2截止导通），在写入校正信号之后，行扫描驱动器随即选通该行像素单元的反馈通道，检测模块检测到的老化信息检测结果被平行锁存，之后就通过移出电路串行输出给控制器，再更新老化信息记忆体。
如图1所示为传统的外部补偿显示系统结构示意图，其包括控制器10、行扫描驱动器20、源驱动器30和显示面板40，控制器10连接至行扫描驱动器20和源驱动器30。控制器10包括依次连接的时序控制模块11、补偿算法模块12和老化信息记忆体13。源驱动器30包括移入电路31、移出电路33和M个检测单元32；检测单元32包括源驱动模块321和检测模块322。
显示面板40包括N行、M列像素单元41，行扫描驱动器20引出N行显示地址线42和反馈地址线43；其中，第n行显示地址线42和反馈地址线43分别连接至第n行的各个像素单元41；行扫描驱动器20用于接收控制器10的行控制信号并依次通过第1行至第N行显示地址线选通第1行至第N行的各个像素单元的写入通道。第一行的像素单元的编号分别为[1,1]...[1,m]...[1,M]，第n行的像素单元的编号分别为[n,1]...[n,m]...[n,M]，第N行的像素单元的编号分别为[N,1]...[N,m]...[N,M]。
补偿算法模块12、移入电路31和第m列检测单元32的源驱动模块321依次连接。第m列检测单元32的源驱动模块321连接至第m列显示信号线44进而分别连接至第m列的各个像素单元41，用于通过移入电路31接收控制器10输入的信号并通过第m列显示信号线44把补偿过的模拟显示信号或者校正信号写入第m列的被显示地址信号线选通的像素单元41。
第m列检测单元32的检测模块322通过第m列反馈信号线45分别连接至第m列的各个像素单元41，用于接收像素单元41的反馈信号所对应的反馈电压。
第m列检测单元32的检测模块322的输出端、移出电路33和老化信息记忆体13依次连接，从而，第m列检测单元32的检测模块32的输出端通过移出电路33将反馈电压与比较电压进行比较所得的检测结果通过移出电路33反馈至控制器10。
第m列检测单元32及第m列的像素单元41组成第m列驱动通道，则显示系统共分成M列驱动通道。
本发明中，像素单元41包括第二开关管Q2、驱动管Q1、第三开关管Q3和发光二极管T1。第n行、第m列的像素单元41中的第二开关管Q2连接至第n行的显示地址线42和第m列的显示信号线44；第二开关管Q2、驱动管Q1和第三开关管Q3依次连接；发光二极管T1连接于驱动管Q1和第三开关管Q3之间；第n行、第m列的像素单元41中的第三开关管Q3连接至第n行的反馈地址线43和第m列的反馈信号线45。
具体地，如图2所示为本发明一种可选的像素单元41，其包括第二开关管Q2、驱动管Q1、第三开关管Q3和发光二极管T1；其中，第二开关管Q2、驱动管Q1、第三开关管Q3为N型管。第n行、第m列的像素单元41中，第二开关管Q2的栅极连接至第n行的显示地址线42，其第一极连接至第m列的显示信号线44，其第二极连接至驱动管Q1的栅极。驱动管Q1的第一极连接至其工作电压端VDD_OLED，其第二极连接至发光二极管T1的正极和第三开关管Q3的第一极；显示面板的工作电压与源驱动器或行扫描驱动器的工作电压可以不同。发光二极管T1的负极连接至其接地端VSS_OLED（可以选择负电压或0V）。第三开关管Q3的栅极连接至第n行的反馈地址线43，其第二极连接至第m列的反馈信号线45。
如图3所示为本发明另一种可选的像素单元41，其包括第二开关管Q2、驱动管Q1、第三开关管Q3和发光二极管T1；其中，第二开关管Q2、驱动管Q1、第三开关管Q3为P型管。第n行、第m列的像素单元41中的第二开关管Q2的栅极连接至第n行的显示地址线42，其第一极连接至第m列的显示信号线44，其第二极连接至驱动管Q1的栅极。驱动管Q1的第一极连接至发光二极管T1的负极和第三开关管Q3的第一极，其第二极连接至其接地端VSS_OLED。发光二极管T1的正极连接至其工作电压端VDD_OLED。第三开关管Q3的栅极连接至第n行的反馈地址线43，其第二极连接至第m列的反馈信号线45。
本领域技术人员可以根据实际情况选用具体的驱动管Q1、第二开关管Q2和第三开关管Q3的类型，驱动管Q1、第二开关管Q2和第三开关管Q3例如可以为非晶硅、多晶硅、氧化物半导体、有机半导体、薄膜工艺、NMOS工艺、PMOS工艺或CMOS工艺所制备的晶体管。当选定了驱动管Q1、第二开关管Q2和第三开关管Q3的具体类型后，只需将三者的连接关系做适应性调整即可构成常规的显示面板电路结构，且将某个种类的晶体管替换本发明的驱动管Q1、第二开关管Q2和第三开关管Q3并设计出显示面板也是本领域的常规技术手段，即利用其它类型的晶体管设计出显示面板的电路同样落入本发明的保护范围。
本领域技术人员在具体电路结构的设计过程中，可以将晶体管的源极作为第一极，将漏极作为第二极；或者，也可以将晶体管的漏极作为第一极，将源极作为第二极。
下述实施例中，预设电位可以是低电位V1或高电位V2，低电位V1和高电位V2可以为设定的固定电压。
下述实施例中，可以设定第t列检测单元与第m列检测单元相邻，例如，第t列检测单元为第m-1列检测单元，或者，第t列检测单元为第m+1列检测单元。第t列检测单元也可以与第m列检测单元之间还间隔其它检测单元。
本领域技术人员应当理解，本发明中，“反馈信号”可以指下文的“反馈电压”，也可以指“反馈信息”。以下实施例中，反馈信息、反馈信号以及反馈电压可以体现器件的老化信息或老化状况。
本发明的显示系统为像素外补偿单DAC显示系统，或者称为像素外补偿AMOLED显示系统。
本发明中检测单元32的比较器52采用电压比较器，检测模块322为检测老化信息的模块。
发光器件为发光二极管，可以是有机发光二极管即OLED，或者量子点发光二极管即QLED，或者一般类型及其他各种类型的LED（Light-Emitting Diode）。
老化信息记忆体13可存储各种老化信息。
实施例一：
如图1和图4所示，本实施例在传统外部补偿显示系统的基础上做了改进，本实施例的反馈信号检测方法的显示系统中，显示系统采用图2所示的像素单元，源驱动模块321包括数模转换器51，检测模块322包括比较器52和电流源53，第m列检测单元的电流源53通过第m列反馈信号线45分别连接至第m列的各个像素单元41。
本实施例的预设电位为低电位V1，每一列驱动通道中，检测单元的数模转换器51通过第二开关sw2连接显示信号线44，进而分别连接至该列的各个像素单元41。显示信号线44还通过第一开关sw1连接至低电位V1，V1可以是0V。第一开关sw1和第二开关sw2的操作是相反的，一个导通，另一个就截止导通。
第m列检测单元中比较器52的正输入端连接第m列反馈信号线45，比较器52的负输入端连接至第m列检测单元的数模转换器51。
本实施例中参考用数模转换器为第m列检测单元的数模转换器51。在本发明其它的实施方式中，参考用数模转换器也可以是第m列以外的检测单元的数模转换器。
当发光二极管T1开始发光之后出现老化现象，发光二极管T1的阈值电压就会向更高值漂移。本实施例的反馈信号检测方法用于检测发光二极管T1阈值电压，包括如下过程：
过程一：依次选通第1行至第N行像素单元的写入通道并在每一行像素单元的写入通道被选通时进行检测操作；
对于第n行像素单元，如图8所示，检测操作的过程具体为：
St1、行扫描驱动器20选通第n行像素单元的写入通道，行扫描驱动器20输出扫描信号到第n行显示地址线42，使得低电压被写入驱动管Q1的栅极，截止导通驱动管Q1；
St2、控制像素单元产生反馈信号以及控制参考用数模转换器输出比较电压，使得比较器的正输入端接收反馈电压，并使得比较器的负输入端接收比较电压。
具体地，时序控制模块11控制第m列驱动通道的第二开关sw2断开及第一开关sw1导通。第二开关sw2断开，则数模转换器51与显示信号线44之间的连线断开，数模转换器51会与电压比较器52搭配检测老化信息。由于第一开关sw1导通，则低电位V1通过第一开关sw1输入低电压到显示信号线44。
行扫描驱动器20选通第n行像素单元的反馈通道；
第m列检测单元的电流源53通过第m列反馈信号线45向像素单元41输入预设低电流（例如1nA）；由于电流比较小，故可认为发光二极管T1阳极的电压和反馈信号线45上的电压即为发光二极管T1的阈值电压。当反馈信号线45上的电压稳定之后，即可与数模转换器选出的电压做比较；
所得到的第n行、第m列的像素单元41的反馈电压为第m列反馈信号线45上的电压。
时序控制模块11控制第m列检测单元的数模转换器51产生选出的电压，则得到的比较电压为第m列检测单元的数模转换器51选出的电压。优选地，比较电压为：控制器10将之前检测第m列像素单元41发光二极管T1阈值电压对应的DAC输入值输出至第m列检测单元的10-bit数模转换器51，再经数模转换器51输出的电压。
St3、比较器52将反馈电压和比较电压进行比较。
St4、比较器52将比较所得的检测结果通过移出电路33反馈至老化信息记忆体13，老化信息记忆体13存储检测结果并更新数据。
过程二：重复进行过程一，随着过程一被不断重复，在越往后的运作中，数模转换器51的输入值将稳定地在 K与K+1之间跳动，则可以确定反馈电压与比较电压进行比较所得的最终结果。
本领域技术人员应当理解，过程一可以不断被重复执行。
实施例二：
如图1和图5所示，本实施例在传统外部补偿显示系统的基础上做了改进，本实施例的反馈信号检测方法的显示系统中，显示系统采用图2所示的像素单元，源驱动模块321包括数模转换器51，检测模块322包括比较器52，预设电位为高电位V2，V2可以是来自电阻串的某个高电压或者某个已知电压值的高电压，该高电压能确保驱动管Q1被导通，且V2对应下文的Vg。每一列驱动通道中，检测单元的数模转换器51通过第二开关sw2连接显示信号线44，进而分别连接至该列的各个像素单元41。显示信号线44还通过第一开关sw1连接至高电位V2。
本实施例的第m列显示信号线44还通过第一开关sw1连接至高电位V2。
第m列检测单元的比较器52的负输入端连接至第m列检测单元的数模转换器51。
本实施例中参考用数模转换器为第m列检测单元的数模转换器51。在本发明其它的实施方式中，参考用数模转换器也可以是第m列以外的检测单元的数模转换器。
本实施例的反馈信号检测方法用于检测驱动管Q1阈值电压，包括如下过程：
过程一：依次选通第1行至第N行像素单元的写入通道并在每一行像素单元的写入通道被选通时进行检测操作；
对于第n行像素单元，如图8所示，检测操作的过程具体为：
St1、行扫描驱动器20选通第n行像素单元41的写入通道，行扫描驱动器20输出扫描信号到第n行显示地址线42；
St2、控制像素单元产生反馈信号以及控制参考用数模转换器输出比较电压，使得比较器的正输入端接收反馈电压，并使得比较器的负输入端接收比较电压。
具体地，控制第m列驱动通道的第二开关sw2断开及第一开关sw1导通；第二开关sw2断开，则数模转换器51与显示信号线44之间的连线断开；
由于第一开关sw1导通，使得高电压被写入驱动管Q1栅极，驱动管Q1被导通；该高电压可以是10-bit DAC的其中一个可供选择的电压Vg（例如Vg是10-bit DAC输入等于1000时的输出电压）或者某个已知电压值的高电压，该高电压能确保驱动管Q1被导通；
行扫描驱动器20选通第n行像素单元41的反馈通道，将驱动管Q1源端电压（即OLED 阳极电压）通过反馈信号线45输出到比较器52的正输入端；
所得到的第n行、第m列的像素单元41的反馈电压为第m列反馈信号线45上的电压即驱动管Q1源端电压。
时序控制模块11控制第m列检测单元的数模转换器51产生选出的电压，则得到的比较电压为第m列检测单元的数模转换器51选出的电压。优选地，比较电压为：控制器10将之前检测第m列像素单元41驱动管Q1阈值电压对应的DAC输入值输出至第m列检测单元的10-bit数模转换器51，再经数模转换器51输出的电压。
St3、比较器52将反馈电压和比较电压进行比较。
St4、比较器52将比较所得的检测结果通过移出电路33反馈至老化信息记忆体13，老化信息记忆体13存储检测结果并更新数据。
过程二：重复进行过程一，随着过程一被不断重复，在越往后的运作中，数模转换器51的输入值将稳定地在 K与K+1之间跳动，则可以确定反馈电压与比较电压进行比较所得的最终结果。此时可以认为驱动管Q1的源极电压对应的10-bit DAC的输入值是K。
本领域技术人员应当理解，过程一可以不断被重复执行。
在显示系统中，当像素单元41开始发光之后，驱动管Q1的老化会导致其阈值电压向上飘移，驱动管Q1的源极电压等于栅极电压减去阈值电压。
令驱动管Q1栅极的电压Vg对应10-bit DAC 的输入值是G，驱动管Q1源极的电压Vs对应10-bit DAC 的输入值是S；Vs = Vg – Vth，故Vth = Vg – Vs。此处的阈值电压Vth已经包括了驱动管Q1的衬偏效应（body effect）。Vg 的值已经预先选定，是已知的，Vs可以通过数模转换器51和比较器52检测出来，所以驱动管Q1的Vth可以计算出来。当驱动管Q1老化之后Vth数值上升，检测到的Vs就会相应的下降。
实施例三：
如图1和图6所示，本实施例在传统外部补偿显示系统的基础上做了改进，本实施例的反馈信号检测方法的显示系统中，显示系统采用图2所示的像素单元，源驱动模块321包括数模转换器51，检测模块322包括比较器52、电流拷贝电路54和电流转电压电路55，第m列检测单元的比较器52的正输入端依次通过电流转电压电路55和电流拷贝电路54连接至第m列反馈信号线45，进而分别连接至第m列的各个像素单元41。
每一列驱动通道中，检测单元的数模转换器51通过第二开关sw2连接显示信号线44，进而分别连接至该列的各个像素单元41。显示信号线44还通过第一开关sw1连接至低电位V1。
本实施例中，将所有列的像素单元41分成单数列驱动通道和双数列驱动通道，例如可以令第m列检测单元在单数列驱动通道（图6中左侧驱动通道），令第t列检测单元在双数列驱动通道（图6中右侧驱动通道）；也可以令第m列检测单元在双数列驱动通道，令第t列检测单元在单数列驱动通道。第m列检测单元的比较器52的负输入端连接至第t列检测单元的数模转换器。
本实施例中参考用数模转换器为第t列检测单元的数模转换器。第t列检测单元既可以是与第m列检测单元相邻，也可以与第m列检测单元之间还间隔其它检测单元。
本实施例的反馈信号检测方法用于检测驱动管Q1电流从而计算驱动管Q1阈值电压，包括如下过程：
过程一：依次选通第1行至第N行像素单元的写入通道并在每一行像素单元的写入通道被选通时进行检测操作；
对于第n行像素单元，如图8所示，检测操作的过程具体为：
St1、行扫描驱动器20发出扫描信号到显示地址信号线，选通第n行像素单元41的写入通道；
St2、控制像素单元产生反馈信号以及控制参考用数模转换器输出比较电压，使得比较器的正输入端接收反馈电压，并使得比较器的负输入端接收比较电压。
具体地， 补偿算法模块12通过移入电路31向第m列检测单元的数模转换器51写入补偿过的数字校正信号；例如，补偿过的数字校正信号可以是补偿过的显示灰阶1的值，该值会对应驱动管Q1输出某个预期的电流，比如10nA；
第m列检测单元的数模转换器51输出补偿过的模拟校正信号；
控制器10控制第t列驱动通道的第二开关sw2断开及第一开关sw1导通，使得低电压（比如0V）被写入第t列驱动管Q1；由于第二开关sw2断开，故第t列的源驱动模块的数模转换器与显示信号线断开连接；
上述补偿过的数字校正信号会使目标像素单元41输出预定大小的反馈电流；
行扫描驱动器20发出扫描信号到反馈地址线43，选通第n行像素单元41的反馈通道；
第m列检测单元的电流拷贝电路54将反馈信号线45的电压固定在一低电压（该低电压是低于OLED阈值最小的可能电压，例如0.8V；一般OLED阈值电压超过1V），确保发光二极管T1截止导通；将驱动管Q1的反馈电流全部都引到反馈信号线45上再输出给电流拷贝电路54，电流拷贝电路54把反馈电流拷贝到其输出端并输出给电流转电压电路55；
第m列检测单元的电流转电压电路55将电流转换成电压信号并输出至比较器52的正输入端；
所得到的第n行、第m列的像素单元41的反馈电压为来自第m列检测单元中电流转电压电路55的电压信号。
补偿算法模块12将之前检测第m列像素单元41驱动管Q1反馈电流对应的DAC输入值（即该校正信号下驱动管Q1的反馈电流对应的DAC输入值）输出至第t列检测单元的10-bit数模转换器；
第t列检测单元的数模转换器将该DAC输入值转换成电压信号并输出至第m列检测单元的比较器52的负输入端；
所得到的比较电压为来自第t列检测单元数模转换器的电压信号。
St3、比较器52将反馈电压和比较电压进行比较。比较所得的检测结果可以表明控制器10储存的之前检测的结果是偏大还是偏小。
St4、比较器52将比较所得的检测结果通过移出电路33反馈至老化信息记忆体13，老化信息记忆体13存储检测结果并更新数据。
过程二：重复进行过程一，随着过程一被不断重复，在越往后的运作中，数模转换器51的输入值将稳定地在 K与K+1之间跳动，则可以确定反馈电压与比较电压进行比较所得的最终结果。
本领域技术人员应当理解，过程一可以不断被重复执行。
当第m列的像素单元41完成校正反馈检测操作后，就可对该行的第t列的像素单元进行校正反馈检测操作，第m列与第t列在校正反馈检测操作的作用就会反过来。
实施例四：
如图1和图7所示，本实施例在传统外部补偿显示系统的基础上做了改进，本实施例的反馈信号检测方法的显示系统中，显示系统采用图2所示的像素单元，源驱动模块321包括数模转换器51，检测模块322包括比较器52和电流源53，第m列检测单元的电流源53通过第m列反馈信号线45分别连接至第m列的各个像素单元41。
每一列驱动通道中，检测单元的数模转换器51通过第二开关sw2连接显示信号线44，进而分别连接至该列的各个像素单元41。显示信号线44还通过第一开关sw1连接至低电位V1。
本实施例中，将所有列的像素单元41分成单数列驱动通道和双数列驱动通道，例如可以令第m列检测单元在单数列驱动通道（图7中左侧驱动通道），令第t列检测单元在双数列驱动通道（图7中右侧驱动通道）；也可以令第m列检测单元在双数列驱动通道，令第t列检测单元在单数列驱动通道。第m列检测单元的比较器52的负输入端连接至第t列检测单元的数模转换器。
本实施例中参考用数模转换器为第t列检测单元的数模转换器。第t列检测单元既可以是与第m列检测单元相邻，也可以与第m列检测单元之间还间隔其它检测单元。
本实施例的反馈信号检测方法用于检测发光二极管T1阈值电压，包括如下过程：
过程一：依次选通第1行至第N行像素单元的写入通道并在每一行像素单元的写入通道被选通时进行检测操作；
对于第n行像素单元，如图8所示，检测操作的过程具体为：
St1、行扫描驱动器20发出扫描信号到第n行显示地址信号线，选通第n行像素单元41的写入通道；
St2、控制像素单元产生反馈信号以及控制参考用数模转换器输出比较电压，使得比较器的正输入端接收反馈电压，并使得比较器的负输入端接收比较电压。
具体地，补偿算法模块12通过移入电路31向第m列检测单元的数模转换器51输入零输入信号（即写入数字0）；
第m列检测单元的数模转换器51将零输入信号转换成电压信号并写入第m列的像素单元41，从而截止导通第m列的驱动管Q1；这个低电压也可以在本地产生，而不需要从控制器10输入；补偿算法模块12将第m列检测单元之前检测到的OLED阈值电压对应的DAC输入值（或者预期的OLED阈值电压对应的DAC输入值）输出至第t列检测单元的数模转换器；
控制器10控制第t列驱动通道的第二开关sw2断开及第一开关sw1导通，使得低电压（比如0V）被写入第t列的像素单元，从而截止导通第t列的驱动管Q1；第二开关sw2断开，使得第t列的数模转换器与显示信号线断开连接；
第m列检测单元的电流源53通过第m列反馈信号线45向像素单元41输入预设电流（比如1nA）；
待反馈信号线45上的电压稳定后，所得到的第n行、第m列的像素单元41的反馈电压为第m列反馈信号线45上的电压。如果发光二极管T1老化，该阈值电压会往上飘移。
第t列检测单元的数模转换器将其输入值转换成电压信号并输出至第m列检测单元的比较器52的负输入端；
所得到的比较电压为第t列检测单元的数模转换器将第m列检测单元之前检测到的OLED阈值电压对应的DAC输入值转换成的电压信号。
St3、比较器52将反馈电压和比较电压进行比较。比较所得的检测结果可以表明控制器10预期的OLED阈值电压是偏大还是偏小。
St4、比较器52将比较所得的检测结果通过移出电路33反馈至老化信息记忆体13，老化信息记忆体13存储检测结果。
过程二：重复进行过程一，随着过程一被不断重复，在越往后的运作中，数模转换器51的输入值将稳定地在 K与K+1之间跳动，则可以确定反馈电压与比较电压进行比较所得的最终结果。
本领域技术人员应当理解，过程一可以不断被重复执行。
当第m列的像素单元41完成校正反馈检测操作后，就可对该行的第t列的像素单元进行校正反馈检测操作，第m列与第t列在校正反馈检测操作的作用就会反过来。
实施例五：
如图1和图7所示，本实施例在传统外部补偿显示系统的基础上做了改进，本实施例的反馈信号检测方法的显示系统中，显示系统采用图2所示的像素单元，源驱动模块321包括数模转换器51，检测模块322包括比较器52和电流源53，第m列检测单元的电流源53通过第m列反馈信号线45分别连接至第m列的各个像素单元41。
每一列驱动通道中，检测单元的数模转换器51通过第二开关sw2连接显示信号线44，进而分别连接至该列的各个像素单元41。显示信号线44还通过第一开关sw1连接至低电位V1。
本实施例中，将所有列的像素单元41分成单数列驱动通道和双数列驱动通道，例如可以令第m列检测单元在单数列驱动通道（图7中左侧驱动通道），令第t列检测单元在双数列驱动通道（图7中右侧驱动通道）；也可以令第m列检测单元在双数列驱动通道，令第t列检测单元在单数列驱动通道。第m列检测单元的比较器52的负输入端连接至第t列检测单元的数模转换器。
本实施例中参考用数模转换器为第t列检测单元的数模转换器。第t列检测单元既可以是与第m列检测单元相邻，也可以与第m列检测单元之间还间隔其它检测单元。
本实施例的反馈信号检测方法用于检测驱动管Q1阈值电压，包括如下过程：
过程一：依次选通第1行至第N行像素单元的写入通道并在每一行像素单元的写入通道被选通时进行检测操作；
对于第n行像素单元，如图8所示，检测操作的过程具体为：
St1、行扫描驱动器20发出扫描信号到第n行显示地址信号线，选通第n行像素单元41的写入通道；
St2、控制像素单元产生反馈信号以及控制参考用数模转换器输出比较电压，使得比较器的正输入端接收反馈电压，并使得比较器的负输入端接收比较电压。
具体地，补偿算法模块12通过移入电路31向第m列检测单元的数模转换器51输入校正信号（例如1000），该校正信号需要确保写入像素单元41时可以导通驱动管Q1；将第m列检测单元之前检测到的驱动管Q1阈值电压对应的DAC输入值（或者预期的驱动管Q1阈值电压对应的DAC输入值）输出至第t列检测单元的数模转换器；
第m列检测单元的数模转换器51将校正信号转换成电压信号并写入第m列的像素单元41，从而导通第m列的驱动管Q1；该校正信号也可以是在本地产生的已经选定电压值的电压信号，而不需要从控制器10输入；
控制第t列驱动通道的第二开关sw2断开及第一开关sw1导通，使得低电压（例如0V）被写入第t列的像素单元，从而截止导通第t列的驱动管Q1；第二开关sw2断开使得第t列的数模转换模块与显示信号线断开连接；
模拟校正信号被写入第m列像素单元41的驱动管Q1的栅极（栅极电压为Vg)，像素单元41驱动管Q1的源极电压为Vs = Vg–Vth，此处，Vth 为第m列像素单元41驱动管Q1的阈值电压；
行扫描驱动器20发出扫描信号到第n行反馈地址信号线，选通第n行像素单元41的反馈通道，使得第m列像素单元41中驱动管Q1的源极电压通过反馈信号线45输出至比较器52正输入端；
所得到的第n行、第m列的像素单元41的反馈电压为第m列反馈信号线45上的电压。
第t列检测单元的数模转换器将第m列检测单元之前检测到的驱动管Q1阈值电压对应的DAC输入值转换成电压信号并输出至第m列检测单元的比较器52负输入端；
所得到的比较电压为第t列检测单元的数模转换器将第m列检测单元之前检测到的驱动管Q1阈值电压对应的DAC输入值转换成的电压信号。
St3、比较器52将反馈电压和比较电压进行比较。
St4、比较器52将比较所得的检测结果通过移出电路33反馈至老化信息记忆体13，老化信息记忆体13存储检测结果。
过程二：重复进行过程一，随着过程一被不断重复，在越往后的运作中，数模转换器51的输入值将稳定地在 K与K+1之间跳动，则可以确定反馈电压与比较电压进行比较所得的最终结果。
本领域技术人员应当理解，过程一可以不断被重复执行。
当第m列的像素单元41完成校正反馈检测操作后，就可对该行的第t列的像素单元进行校正反馈检测操作，第m列与第t列在校正反馈检测操作的作用就会反过来。
如图8所示为本发明的反馈信号检测方法流程示意图，该图适用于表述实施例一至实施例五中显示系统的方法，实施例一至实施例五的显示系统分别选取了不同的参考用数模转换器故具有不同的电路结构，实施例一至实施例五的方法的主要区别在于St2过程。为便于叙述分析，本文中的检测操作均针对第n行、第m列的像素单元，将第n行、第m列的像素单元作为目标像素单元。St1过程和St2过程可以同时进行。
本发明的反馈信号检测方法包括如下过程：
过程一：依次选通第1行至第N行像素单元的写入通道并在每一行像素单元的写入通道被选通时进行检测操作；
对于第n行像素单元，检测操作的过程具体为：St1、选通第n行像素单元的写入通道；St2、控制像素单元产生反馈信号以及控制参考用数模转换器输出比较电压，使得比较器的第一输入端接收反馈电压，并使得比较器的第二输入端接收比较电压；St3、将反馈电压和比较电压进行比较；St4、控制比较器将比较所得的检测结果通过移出电路反馈至老化信息记忆体；
过程二：重复进行过程一，随着过程一被不断重复，在越往后的运作中，数模转换器51的输入值将稳定地在 K与K+1之间跳动。本领域技术人员应当理解，过程一可以不断被重复执行。
本发明中，可以将比较器52的正输入端设定为第一输入端，将负输入端设定为第二输入端。则St3将反馈电压和比较电压进行比较的过程为：
当行扫描驱动器20进行第一轮扫描中选通第n行各个像素单元的写入通道时，比较器52将比较电压与反馈电压进行比较；
若第一轮扫描中比较器52将比较电压与反馈电压进行比较所输出的结果为1，则当行扫描驱动器20进行第二轮扫描中第n行写入通道再次被选通时，控制比较电压增加预设值k；若第一轮扫描中比较器52将比较电压与反馈电压进行比较所输出的结果为0，则当当行扫描驱动器20进行第二轮扫描中第n行写入通道再次被选通时，控制比较电压减小预设值k；
当行扫描驱动器20进行某一轮扫描中比较器52将比较电压与反馈电压进行比较所输出的结果首次发生翻转后，若首次翻转为1变0，则当第n行写入通道下一次被选通时，控制比较电压减小1；若首次翻转为0变1，则当第n行写入通道下一次被选通时，控制比较电压增加1；
行扫描驱动器20继续重复对第1行至第N行像素单元进行多轮的扫描选通，当第n行写入通道再次被选通时，若上一次比较的结果为1，则本次控制比较电压增加1；若上一次比较的结果为0，则本次控制比较电压减小1；
行扫描驱动器20继续重复对第1行至第N行像素单元进行多轮的扫描选通，直至第n行写入通道后续被选通时，反馈电压与取值为K+1的比较电压进行比较所输出的结果为0且反馈电压与取值为K的比较电压进行比较所输出的结果为1，则将K与K+1之间的某一数值作为最终结果。例如，可以将K与K+ 1之间的中间值、平均值、数值K或数值K+1作为检测结果，平均值的求解包括计算算数平均值或几何平均值等运算方案。“将K与K+1之间的某一数值作为最终结果”这一操作可以由时序控制模块11执行，也可以由技术人员来决定。
例如，如图9所示，显示系统采用图2所示的像素单元，比较电压为DAC输入值，首先DAC输入端先选一个值，假设从数值0开始，之后经过DAC转换成数值0对应的模拟信号（电压）输出到比较器52的负输入端，比较器52的正输入端输入需要检测的信号（即反馈电压）。如果结果为0，说明DAC选出来的电压偏高，不过此时DAC的输入已经为0不能再低，则说明输入需要检测的电压超出可检测的范围。如果为1，说明DAC选出来的电压不够，在下一轮比较时需要把DAC的输入值加k。此处k是不为0的整数，例如1。如果在下一轮比较结果还是1的话，则将DAC输入值再往上提，直至比较器52的输出为0，说明DAC所选的输入值对应的电压已经超过比较器正端输入的被检测信号，此时为首次翻转。
如图9所示，DAC值从0开始，最终所达到的状态应该是：当DAC值升到K+1之后比较器52的输出结果为0，表示DAC选出来的电压比被比较的电压大，之后在下次比较时就会把DAC选出来的电压值减1；当DAC值降到K之后比较器52的输出结果为1，表示DAC选出来的电压比被比较的电压小，之后在下次比较时就会把DAC选出来的电压值加1；如此循环，达到稳定。最后整个DAC的输入值就会稳定得在K和K+1之间跳动，说明被比较的电压是在K和K+1对应的电压之间。
或者，本领域技术人员根据电路设计的实际需要，还可以将比较器52的负输入端设定为第一输入端，将正输入端设定为第二输入端。则，St3将反馈电压和比较电压进行比较的过程为：
当行扫描驱动器20进行第一轮扫描中选通第n行各个像素单元的写入通道时，比较器52将比较电压与反馈电压进行比较；
若第一轮扫描中比较器52将比较电压与反馈电压进行比较所输出的结果为0，则当行扫描驱动器20进行第二轮扫描中第n行写入通道再次被选通时，控制比较电压增加预设值k；若第一轮扫描中比较器52将比较电压与反馈电压进行比较所输出的结果为1，则当行扫描驱动器20进行第二轮扫描中第n行写入通道再次被选通时，控制比较电压减小预设值k；
当行扫描驱动器20进行某一轮扫描中比较器52将比较电压与反馈电压进行比较所输出的结果首次发生翻转后，若首次翻转为0变1，则当第n行写入通道下一次被选通时，控制比较电压减小1；若首次翻转为1变0，则当第n行写入通道下一次被选通时，控制比较电压增加1；
行扫描驱动器20继续重复对第1行至第N行像素单元进行多轮的扫描选通，当第n行写入通道再次被选通时，若上一次比较的结果为0，则本次控制比较电压增加1；若上一次比较的结果为1，则本次控制比较电压减小1；
行扫描驱动器20继续重复对第1行至第N行像素单元进行多轮的扫描选通，直至第n行写入通道后续被选通时，反馈电压与取值为K+1的比较电压进行比较所输出的结果为1且反馈电压与取值为K的比较电压进行比较所输出的结果为0，则将K与K+1之间的某一数值作为最终结果。例如，可以将K与K+ 1之间的中间值、平均值、数值K或数值K+1作为检测结果，平均值的求解包括计算算数平均值或几何平均值等运算方案。
本发明的反馈信号检测方法的系统为像素外补偿单DAC显示系统，利用数模转换器搭配比较器检测目标像素单元反馈的信息（例如老化信息），可以对TFT、OLED和QLED等器件做各种检测，例如器件老化、阈值电压不均匀和驱动不均匀等问题的检测，适用于AMOLED、OLED-on-Silicon、QLED-on-Silicon、PMOLED、LCD驱动芯片和OLED照明驱动芯片等各种类型的产品。
以上应用了具体个例对本发明进行阐述，只是用于帮助理解本发明，并不用以限制本发明。对于本发明所属技术领域的技术人员，依据本发明的思想，还可以做出若干简单推演、变形或替换。

Claims (16)

  1. 一种反馈信号检测方法的显示系统，其特征在于，
    包括M列驱动通道；
    每一列驱动通道包括像素单元(41)和检测单元(32)；所述检测单元(32)包括源驱动模块(321)和检测模块(322)；所述源驱动模块(321)包括数模转换器(51)，所述检测模块(322)包括比较器(52)；
    所述数模转换器(51)通过显示信号线(44)连接至所述像素单元(41)；
    所述比较器(52)的第一输入端通过反馈信号线(45)连接至所述像素单元(41)，用于接收所述像素单元(41)的反馈信号所对应的反馈电压；其第二输入端连接至参考用数模转换器，用于接收参考用数模转换器输出的比较电压；所述比较器(52)的输出端用于将反馈电压与比较电压进行比较所得的检测结果输出；
    其中，M为大于等于1的整数。
  2. 如权利要求1所述的显示系统，其特征在于，
    还包括控制器(10)、行扫描驱动器(20)、源驱动器(30)和显示面板(40)；
    所述控制器(10)连接至所述行扫描驱动器(20)和所述源驱动器(30)；
    所述显示面板(40)上设置N行、M列像素单元(41)，所述行扫描驱动器(20)引出N行显示地址线(42)和反馈地址线(43)；其中，第n行显示地址线(42)和反馈地址线(43)分别连接至第n行的各个像素单元(41)；所述行扫描驱动器(20)用于接收所述控制器(10)的行控制信号并依次通过第1行至第N行显示地址线选通第1行至第N行的各个像素单元的写入通道；
    所述源驱动器(30)包括移入电路(31)、移出电路(33)和M个检测单元(32)；
    所述控制器(10)、所述移入电路(31)和第m列数模转换器(51)依次连接；
    所述控制器(10)用于控制参考用数模转换器输出比较电压；
    第m列比较器(52)的输出端通过所述移出电路(33)连接至所述控制器(10)，用于将检测结果通过所述移出电路(33)反馈至所述控制器(10)；
    其中，N为大于等于1的整数，n为大于等于1小于等于N的整数；m为大于等于1小于等于M的整数。
  3. 如权利要求2所述的显示系统，其特征在于，
    比较器(52)的第一输入端为正输入端，第二输入端为负输入端；
    当所述行扫描驱动器(20)选通第n行像素单元的写入通道时，比较器(52)用于将比较电压与反馈电压进行比较；
    若比较器(52)将比较电压与反馈电压进行比较所输出的结果为1，则当第n行写入通道再次被选通时，所述控制器(10)控制比较电压增加预设值k；若比较器(52)将比较电压与反馈电压进行比较所输出的结果为0，则当第n行写入通道再次被选通时，所述控制器(10)控制比较电压减小预设值k；
    当比较器(52)将比较电压与反馈电压进行比较所输出的结果首次发生翻转后，若首次翻转为1变0，则当第n行写入通道下一次被选通时，所述控制器(10)控制比较电压减小1；若首次翻转为0变1，则当第n行写入通道下一次被选通时，所述控制器(10)控制比较电压增加1；
    当第n行写入通道再次被选通时，若上一次比较的结果为1，则本次所述控制器(10)控制比较电压增加1；若上一次比较的结果为0，则本次所述控制器(10)控制比较电压减小1；
    直至第n行写入通道后续被选通时，反馈电压与取值为K+1的比较电压进行比较所输出的结果为0且反馈电压与取值为K的比较电压进行比较所输出的结果为1，则将K与K+1之间的某一数值作为最终结果；
    或者，比较器(52)的第一输入端为负输入端，第二输入端为正输入端；
    当所述行扫描驱动器(20)选通第n行像素单元的写入通道时，比较器(52)用于将比较电压与反馈电压进行比较；
    若比较器(52)将比较电压与反馈电压进行比较所输出的结果为0，则当第n行写入通道再次被选通时，所述控制器(10)控制比较电压增加预设值k；若比较器(52)将比较电压与反馈电压进行比较所输出的结果为1，则当第n行写入通道再次被选通时，所述控制器(10)控制比较电压减小预设值k；
    当比较器(52)将比较电压与反馈电压进行比较所输出的结果首次发生翻转后，若首次翻转为0变1，则当第n行写入通道下一次被选通时，所述控制器(10)控制比较电压减小1；若首次翻转为1变0，则当第n行写入通道下一次被选通时，所述控制器(10)控制比较电压增加1；
    当第n行写入通道再次被选通时，若上一次比较的结果为0，则本次所述控制器(10)控制比较电压增加1；若上一次比较的结果为1，则本次所述控制器(10)控制比较电压减小1；
    直至第n行写入通道后续被选通时，反馈电压与取值为K+1的比较电压进行比较所输出的结果为1且反馈电压与取值为K的比较电压进行比较所输出的结果为0，则将K与K+1之间的某一数值作为最终结果；
    其中，K为大于0的自然数，k为大于0的自然数。
  4. 如权利要求2或3所述的显示系统，其特征在于，
    所述控制器(10)包括依次连接的时序控制模块(11)、补偿算法模块(12)和老化信息记忆体(13)；
    所述补偿算法模块(12)、所述移入电路(31)和第m列数模转换器(51)依次连接；
    第m列数模转换器(51)通过第二开关连接至第m列显示信号线(44)，进而分别连接至第m列的各个像素单元(41)； 
    第m列显示信号线(44)还通过第一开关连接至预设电位；
    第m列比较器(52)的输出端、所述移出电路(33)和所述老化信息记忆体(13)依次连接；
    所述像素单元(41)包括第二开关管、驱动管、第三开关管和发光器件；
    第n行、第m列的像素单元(41)中，第二开关管连接至第n行的显示地址线(42)和第m列的显示信号线(44)；
    第二开关管、驱动管和第三开关管依次连接；
    发光器件连接于驱动管和第三开关管之间；
    第三开关管连接至第n行的反馈地址线(43)和第m列的反馈信号线(45)。
  5. 如权利要求4所述的显示系统，其特征在于，
    所述检测模块(322)还包括电流源(53)，第m列电流源(53)通过第m列反馈信号线(45)连接至第m列的各个像素单元(41)；
    第m列比较器(52)的第二输入端连接至第m列数模转换器(51)；
    所述时序控制模块(11)用于控制第m列的第二开关断开及第一开关导通；
    所述行扫描驱动器(20)用于选通第n行像素单元(41)的写入通道，使得来自所述预设电位的第一预设电压被写入驱动管，截止导通驱动管；所述行扫描驱动器(20)还用于选通第n行像素单元(41)的反馈通道；
    第m列电流源(53)用于通过第m列反馈信号线(45)向像素单元(41)输入预设电流；
    所述时序控制模块(11)还用于控制第m列数模转换器(51)产生选出的电压；
    第n行、第m列的像素单元(41)的反馈电压为第m列反馈信号线(45)上的电压，比较电压为第m列数模转换器(51)选出的电压。
  6. 如权利要求4所述的显示系统，其特征在于，
    第m列比较器(52)的第二输入端连接至第m列数模转换器(51)；
    所述时序控制模块(11)用于控制第m列的第二开关断开及第一开关导通；
    所述行扫描驱动器(20)用于选通第n行像素单元(41)的写入通道，使得来自所述预设电位的第二预设电压被写入驱动管；所述行扫描驱动器(20)还用于选通第n行像素单元(41)的反馈通道；
    所述时序控制模块(11)还用于控制第m列数模转换器(51)产生选出的电压；
    第n行、第m列的像素单元(41)的反馈电压为第m列反馈信号线(45)上的电压，比较电压为第m列数模转换器(51)选出的电压。
  7. 如权利要求4所述的显示系统，其特征在于，
    所述检测模块(322)还包括电流拷贝电路(54)和电流转电压电路(55)，第m列比较器(52)的第一输入端依次通过所述电流转电压电路(55)和电流拷贝电路(54)连接至第m列反馈信号线(45)，进而连接至第m列的各个像素单元(41)；
    第m列比较器(52)的第二输入端连接至第t列检测单元的数模转换器；
    所述时序控制模块(11)用于控制第m列的第二开关导通；
    所述补偿算法模块(12)用于通过移入电路(31)向第m列数模转换器(51)写入补偿过的数字校正信号；
    所述行扫描驱动器(20)用于选通第n行像素单元(41)的写入通道；
    第m列数模转换器(51)用于输出补偿过的模拟校正信号；
    所述时序控制模块(11)还用于控制第t列的第二开关断开及第一开关导通，使得来自所述预设电位的第一预设电压被写入驱动管；
    所述行扫描驱动器(20)还用于选通第n行像素单元(41)的反馈通道；
    第m列检测单元(32)的电流拷贝电路(54)用于将反馈信号线(45)的电压固定，将驱动管的电流输出至电流转电压电路(55)；
    第m列检测单元(32)的电流转电压电路(55)将电流转换成电压信号并输出至比较器(52)；
    所述控制器(10)还用于将之前检测第m列像素单元(41)驱动管反馈电流对应的DAC输入值输出至第t列检测单元的数模转换器；
    第t列检测单元的数模转换器用于将该DAC输入值转换成电压信号并输出至第m列比较器(52)；
    第n行、第m列的像素单元(41)的反馈电压为来自第m列检测单元(32)中电流转电压电路(55)的电压信号，比较电压为来自第t列检测单元中数模转换器的电压信号；
    其中，t为大于等于1小于等于M的整数。
  8. 如权利要求4所述的显示系统，其特征在于，
    所述检测模块(322)还包括电流源(53)，第m列电流源(53)通过第m列反馈信号线(45)连接至第m列的各个像素单元(41)；
    第m列比较器(52)的第二输入端连接至第t列检测单元的数模转换器；
    所述行扫描驱动器(20)用于选通第n行像素单元(41)的写入通道；
    所述时序控制模块(11)用于向第m列数模转换器(51)输入零输入信号，将第m列检测单元(32)之前检测到的发光器件阈值电压对应的DAC输入值或者预期的发光器件阈值电压对应的DAC输入值输出至第t列检测单元的数模转换器；
    第m列数模转换器(51)用于将零输入信号转换成电压信号并写入第m列的像素单元(41)，从而截止导通第m列的驱动管；
    所述时序控制模块(11)还用于控制第t列的第二开关断开及第一开关导通，使得来自所述预设电位的第一预设电压被写入第t列的像素单元，从而截止导通第t列的驱动管；
    第m列电流源(53)用于通过第m列反馈信号线(45)向像素单元(41)输入预设电流；
    第t列检测单元的数模转换器用于将所接收的DAC输入值转换成电压信号并输出至第m列比较器(52)；
    第n行、第m列的像素单元(41)的反馈电压为第m列反馈信号线(45)上的电压，比较电压为第t列检测单元的数模转换器将所接收的DAC输入值转换成的电压信号；
    其中，t为大于等于1小于等于M的整数。
  9. 如权利要求4所述的显示系统，其特征在于，
    所述检测模块(322)还包括电流源(53)，第m列电流源(53)通过第m列反馈信号线(45)连接至第m列的各个像素单元(41)；
    第m列比较器(52)的第二输入端连接至第t列检测单元的数模转换器；
    所述时序控制模块(11)用于向第m列数模转换器(51)输入校正信号，将第m列检测单元(32)之前检测到的驱动管阈值电压对应的DAC输入值或者预期的驱动管阈值电压对应的DAC输入值输出至第t列检测单元的数模转换器；
    所述行扫描驱动器(20)用于选通第n行像素单元(41)的写入通道；
    第m列数模转换器(51)用于将校正信号转换成电压信号并写入第m列的像素单元(41)，从而导通第m列的驱动管；
    所述时序控制模块(11)还用于控制第t列的第二开关断开及第一开关导通，使得来自所述预设电位的第一预设电压被写入第t列的像素单元，从而截止导通第t列的驱动管；
    所述行扫描驱动器(20)还用于选通第n行像素单元(41)的反馈通道，使得第m列像素单元(41)中驱动管的源极电压通过反馈信号线(45)输出至比较器(52)；
    第t列检测单元的数模转换器用于将所接收的DAC输入值转换成电压信号并输出至第m列比较器(52)；
    第n行、第m列的像素单元(41)的反馈电压为第m列反馈信号线(45)上的电压，比较电压为第t列检测单元的数模转换器将所接收的DAC输入值转换成的电压信号；
    其中，t为大于等于1小于等于M的整数。
  10. 一种反馈信号检测方法，其应用于如权利要求4所述的显示系统，其特征在于，包括：
    依次选通第1行至第N行像素单元的写入通道并在每一行像素单元的写入通道被选通时进行检测操作；
    重复上述操作，再次选通第1行至第N行像素单元的写入通道并在每一行像素单元的写入通道被选通时进行检测操作；
    检测操作的过程为：当第n行像素单元的写入通道被选通时，控制像素单元产生反馈信号以及控制参考用数模转换器输出比较电压，使得所述比较器的第一输入端接收反馈信号对应的反馈电压，并使得所述比较器的第二输入端接收比较电压；将反馈电压和比较电压进行比较；控制所述比较器将比较所得的检测结果通过所述移出电路反馈至所述老化信息记忆体。
  11. 如权利要求10所述的方法，其特征在于，
    比较器(52)的第一输入端为正输入端，第二输入端为负输入端；
    所述将反馈电压和比较电压进行比较的过程为：
    当所述行扫描驱动器(20)选通第n行像素单元的写入通道时，控制比较器(52)将比较电压与反馈电压进行比较；
    若比较器(52)将比较电压与反馈电压进行比较所输出的结果为1，则当第n行写入通道再次被选通时，控制比较电压增加预设值k；若比较器(52)将比较电压与反馈电压进行比较所输出的结果为0，则当第n行写入通道再次被选通时，控制比较电压减小预设值k；
    当比较器(52)将比较电压与反馈电压进行比较所输出的结果首次发生翻转后，若首次翻转为1变0，则当第n行写入通道下一次被选通时，控制比较电压减小1；若首次翻转为0变1，则当第n行写入通道下一次被选通时，控制比较电压增加1；
    当第n行写入通道再次被选通时，若上一次比较的结果为1，则本次控制比较电压增加1；若上一次比较的结果为0，则本次控制比较电压减小1；
    直至第n行写入通道后续被选通时，反馈电压与取值为K+1的比较电压进行比较所输出的结果为0且反馈电压与取值为K的比较电压进行比较所输出的结果为1，则将K与K+1之间的某一数值作为最终结果；
    或者，比较器(52)的第一输入端为负输入端，第二输入端为正输入端；
    所述将反馈电压和比较电压进行比较的过程为：
    当所述行扫描驱动器(20)选通第n行各个像素单元的写入通道时，控制比较器(52)将比较电压与反馈电压进行比较；
    若比较器(52)将比较电压与反馈电压进行比较所输出的结果为0，则当第n行写入通道再次被选通时，控制比较电压增加预设值k；若比较器(52)将比较电压与反馈电压进行比较所输出的结果为1，则当第n行写入通道再次被选通时，控制比较电压减小预设值k；
    当比较器(52)将比较电压与反馈电压进行比较所输出的结果首次发生翻转后，若首次翻转为0变1，则当第n行写入通道下一次被选通时，控制比较电压减小1；若首次翻转为1变0，则当第n行写入通道下一次被选通时，控制比较电压增加1；
    当第n行写入通道再次被选通时，若上一次比较的结果为0，则本次控制比较电压增加1；若上一次比较的结果为1，则本次控制比较电压减小1；
    直至第n行写入通道后续被选通时，反馈电压与取值为K+1的比较电压进行比较所输出的结果为1且反馈电压与取值为K的比较电压进行比较所输出的结果为0，则将K与K+1之间的某一数值作为最终结果；
    其中，K为大于0的自然数，k为大于0的自然数。
  12. 如权利要求10或11所述的方法，其用于检测发光器件阈值电压，其特征在于，
    所述显示系统中，所述检测模块(322)还包括电流源(53)，第m列电流源(53)通过第m列反馈信号线(45)连接至第m列的各个像素单元(41)；
    第m列比较器(52)的第二输入端连接至第m列数模转换器(51)；
    所述控制像素单元产生反馈信号以及控制参考用数模转换器输出比较电压的过程为：
    控制第m列的第二开关断开及第一开关导通；
    第n行像素单元(41)的写入通道被选通使得来自所述预设电位的第一预设电压被写入驱动管，截止导通驱动管；
    选通第n行像素单元(41)的反馈通道；
    通过第m列反馈信号线(45)向像素单元(41)输入预设电流；
    控制第m列数模转换器(51)产生选出的电压；
    得到第n行、第m列的像素单元(41)的反馈电压为第m列反馈信号线(45)上的电压，得到的比较电压为第m列数模转换器(51)选出的电压。
  13. 如权利要求10或11所述的方法，其用于检测驱动管阈值电压，其特征在于，
    所述显示系统中，第m列比较器(52)的第二输入端连接至第m列数模转换器(51)；
    所述控制像素单元产生反馈信号以及控制参考用数模转换器输出比较电压的过程为：
    控制第m列的第二开关断开及第一开关导通；
    第n行像素单元(41)的写入通道被选通使得来自所述预设电位的第二预设电压被写入驱动管；
    选通第n行像素单元(41)的反馈通道；
    控制第m列数模转换器(51)产生选出的电压；
    得到第n行、第m列的像素单元(41)的反馈电压为第m列反馈信号线(45)上的电压，得到的比较电压为第m列数模转换器(51)选出的电压。
  14. 如权利要求10或11所述的方法，其用于检测驱动管电流从而得到驱动管阈值电压，其特征在于，
    所述显示系统中，所述检测模块(322)还包括电流拷贝电路(54)和电流转电压电路(55)，第m列比较器(52)的第一输入端依次通过所述电流转电压电路(55)和电流拷贝电路(54)连接至第m列反馈信号线(45)，进而连接至第m列的各个像素单元(41)；
    第m列比较器(52)的第二输入端连接至第t列检测单元的数模转换器；
    所述控制像素单元产生反馈信号以及控制参考用数模转换器输出比较电压的过程为：
    控制第m列的第二开关导通；
    通过移入电路(31)向第m列数模转换器(51)写入补偿过的数字校正信号；
    控制数模转换器输出补偿过的模拟校正信号；
    控制第t列的第二开关断开及第一开关导通，使得来自所述预设电位的第一预设电压被写入驱动管；
    选通第n行像素单元(41)的反馈通道；
    控制第m列检测单元(32)的电流拷贝电路(54)将反馈信号线(45)的电压固定，将驱动管的电流输出至电流转电压电路(55)；
    控制第m列检测单元(32)的电流转电压电路(55)将电流转换成电压信号并输出至比较器(52)；
    将之前检测第m列像素单元(41)驱动管反馈电流对应的DAC输入值输出至第t列检测单元的数模转换器；
    控制第t列检测单元的数模转换器将该DAC输入值转换成电压信号并输出至第m列比较器(52)；
    得到第n行、第m列的像素单元(41)的反馈电压为来自第m列检测单元(32)电流转电压电路(55)的电压信号，得到的比较电压为来自第t列检测单元的数模转换器的电压信号。
  15. 如权利要求10或11所述的方法，其用于检测发光器件阈值电压，其特征在于，
    所述显示系统中，所述检测模块(322)还包括电流源(53)，第m列电流源(53)通过第m列反馈信号线(45)连接至第m列的各个像素单元(41)；
    第m列比较器(52)的第二输入端连接至第t列检测单元的数模转换器；
    所述控制像素单元产生反馈信号以及控制参考用数模转换器输出比较电压的过程为：
    向第m列数模转换器(51)输入零输入信号，将第m列检测单元(32)之前检测到的发光器件阈值电压对应的DAC输入值或者预期的发光器件阈值电压对应的DAC输入值输出至第t列检测单元的数模转换器；
    控制第m列数模转换器(51)将零输入信号转换成电压信号并写入第m列的像素单元(41)，从而截止导通第m列的驱动管；
    控制第t列的第二开关断开及第一开关导通，使得来自所述预设电位的第一预设电压被写入第t列的像素单元，从而截止导通第t列的驱动管；
    控制第m列电流源(53)通过第m列反馈信号线(45)向像素单元(41)输入预设电流；
    控制第t列检测单元的数模转换器将所接收的DAC输入值转换成电压信号并输出至第m列比较器(52)；
    得到第n行、第m列的像素单元(41)的反馈电压为第m列反馈信号线(45)上的电压，得到的比较电压为第t列检测单元的数模转换器将所接收的DAC输入值转换成的电压信号。
  16. 如权利要求10或11所述的方法，其用于检测驱动管阈值电压，其特征在于，
    所述显示系统中，第m列电流源(53)通过第m列反馈信号线(45)连接至第m列的各个像素单元(41)；
    第m列比较器(52)的第二输入端连接至第t列检测单元的数模转换器；
    所述控制像素单元产生反馈信号以及控制参考用数模转换器输出比较电压的过程为：
    向第m列数模转换器(51)输入校正信号，将第m列检测单元(32)之前检测到的驱动管阈值电压对应的DAC输入值或者预期的驱动管阈值电压对应的DAC输入值输出至第t列检测单元的数模转换器；
    控制第m列数模转换器(51)将校正信号转换成电压信号并写入第m列的像素单元(41)，从而导通第m列的驱动管；
    控制第t列的第二开关断开及第一开关导通，使得来自所述预设电位的第一预设电压被写入第t列的像素单元，从而截止导通第t列的驱动管；
    选通第n行像素单元(41)的反馈通道，使得第m列像素单元(41)中驱动管的源极电压通过反馈信号线(45)输出至比较器(52)；
    控制第t列检测单元的数模转换器将所接收的DAC输入值转换成电压信号并输出至第m列比较器(52)；
    得到第n行、第m列的像素单元(41)的反馈电压为第m列反馈信号线(45)上的电压，得到的比较电压为第t列检测单元的数模转换器将所接收的DAC输入值转换成的电压信号。
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