WO2022048047A1 - 一种显示面板及显示面板的制作方法 - Google Patents

一种显示面板及显示面板的制作方法 Download PDF

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Publication number
WO2022048047A1
WO2022048047A1 PCT/CN2020/131788 CN2020131788W WO2022048047A1 WO 2022048047 A1 WO2022048047 A1 WO 2022048047A1 CN 2020131788 W CN2020131788 W CN 2020131788W WO 2022048047 A1 WO2022048047 A1 WO 2022048047A1
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WIPO (PCT)
Prior art keywords
gate
connection
line
lines
repair
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Application number
PCT/CN2020/131788
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English (en)
French (fr)
Inventor
陈方甫
Original Assignee
深圳市华星光电半导体显示技术有限公司
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Application filed by 深圳市华星光电半导体显示技术有限公司 filed Critical 深圳市华星光电半导体显示技术有限公司
Priority to US16/972,961 priority Critical patent/US11852935B2/en
Publication of WO2022048047A1 publication Critical patent/WO2022048047A1/zh

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Classifications

    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/13306—Circuit arrangements or driving methods for the control of single liquid crystal cells
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136259—Repairing; Defects
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136259—Repairing; Defects
    • G02F1/136263—Line defects
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136259—Repairing; Defects
    • G02F1/136272—Auxiliary lines
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G02F1/136295—Materials; Compositions; Manufacture processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
    • H01L22/22—Connection or disconnection of sub-entities or redundant parts of a device in response to a measurement
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H01L27/1244—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits for preventing breakage, peeling or short circuiting

Definitions

  • the present application relates to the field of display technology, and in particular, to a display panel and a manufacturing method of the display panel.
  • GOA Gate Driver On Array, gate drive on glass substrate
  • GCOF gate drive on flexible circuit board
  • the product process generally needs to add a gate insulating layer (GI, Gate Insulation) metal mask (Mask), in-plane gate (Gate) lead holes (or called vias) to the source The pole (Source) side is driven.
  • GI Gate Insulation
  • Mosk metal mask
  • Gate in-plane gate
  • the display area includes: a plurality of gate lines and at least one gate repair line extending laterally, a plurality of gate connection lines extending longitudinally to the non-display area, and at least one first connection repair line extending longitudinally;
  • a plurality of gate lines and at least one gate repair line are arranged in the same layer, and a plurality of gate connection lines and at least one first connection repair line are arranged in the same layer.
  • At least one first connection repair line is disposed on at least one side of the plurality of gate connection lines.
  • the display area further includes at least one second connecting and repairing line extending longitudinally; at least one first connecting and repairing line and at least one second connecting and repairing line are arranged on opposite sides of the plurality of gate connecting lines;
  • the embodiment of the present application also provides a method for manufacturing a display panel, the display panel includes a display area and a non-display area located on one side of the display area; the manufacturing method for the display panel includes:
  • the target gate repair line is determined from at least one gate repair line, and the connection with the target gate repair line is determined.
  • the first connection repair line connected by the target gate repair line is determined as the target first connection repair line, and the first connection repair point on the target gate repair line corresponding to the target gate connection line and the target first connection repair line are melted.
  • the second connection repair point corresponding to the target gate line enables the target gate connection line to be electrically connected to the target gate line through the target gate repair line and the target first connection repair line.
  • the at least one gate repair line and the at least one first connection repair line are connected in a one-to-one correspondence through the first via hole.
  • a plurality of gate lines and at least one gate repair line are arranged in the same layer, and a plurality of gate connection lines and at least one first connection repair line are arranged in the same layer.
  • the orthographic projections of the plurality of gate connecting lines on the layer to which the gate repairing lines belong intersect with each gate repairing line in the gate repairing lines, and the intersecting position is set as the first connecting repairing point.
  • Embodiments of the present application provide a display panel and a manufacturing method of the display panel, wherein the display panel includes a display area and a non-display area located on one side of the display area; the display area includes: a plurality of gate lines and at least one gate line extending laterally A repair line, a plurality of gate connection lines extending longitudinally to the non-display area, and at least one first connection repair line extending longitudinally; the at least one gate repair line is connected to the at least one first connection repair line in a one-to-one correspondence, and each The gate repair line is provided with a plurality of first connection repair points corresponding to the gate connection lines one-to-one, and each first connection repair line is provided with a plurality of second connection repair points corresponding to the plurality of gate lines one-to-one.
  • FIG. 2 is another schematic structural diagram of a display panel provided by an embodiment of the present application.
  • At least one first connection and repair line 14 may be arranged between a plurality of gate connection lines 13, that is, a first connection and repair line is arranged between any two gate connection lines, specifically, in any two columns
  • a first connecting and repairing line is arranged between the pixel openings; at least one first connecting and repairing line 14 can also be arranged on at least one side of the plurality of gate connecting lines 13 .
  • At least one first connection repair line 14 is disposed on the left side of the plurality of gate connection lines 13 , that is, at least one first connection repair line 14 is disposed in the gate frame area on the left side of the first display area 101 103; it can be understood that at least one first connection and repair line 14 can also be arranged on the right side of the plurality of gate connection lines 13, that is, at least one first connection and repair line 14 is arranged on the gate on the right side of the first display area 101 In the polar frame region 103 (this case is not shown in the figure). As shown in FIG.
  • the other side of the plurality of gate connecting lines 13 is also disposed At least one second connection and repair line 18 extending longitudinally, at least one first connection and repair line 14 and at least one second connection and repair line 18 are disposed on opposite sides of the plurality of gate connection lines 13 .
  • at least one first connection and repair line 14 is provided on the left side of the plurality of gate connection lines 13
  • at least one second connection and repair line 18 is provided on the right side of the plurality of gate connection lines 13 .
  • At least one gate repair line 12 and at least one second connection repair line 18 are connected in a one-to-one correspondence through the second via holes 173 , and the at least one second connection repair line 18 is in the positive direction of the layer to which the plurality of gate lines 11 belong.
  • the projection intersects the plurality of gate lines 11 , and the intersecting position is set as the third connection repair point 19 .
  • the target is determined from at least one gate repair line 12 gate repair line, and determine the first connection repair line connected with the target gate repair line as the target first connection repair line, and determine the second connection repair line connected with the target gate repair line as the target second connection repair line line, melting the first connection repair point on the target gate repair line corresponding to the target gate connection line, melting the second connection repair point on the target first connection repair line corresponding to the target gate line, and melting the target first connection repair point.
  • the above-mentioned display panel shown in FIGS. 1 to 3 solves the problem of poor contact/connection failure between the gate line and the gate connection line in the display panel, and improves the product yield of the display panel.
  • a first insulating layer 33 is formed on the side of the first metal layer 32 away from the base substrate 31 by a deposition process, and a plurality of connecting vias 171 are formed on the first insulating layer 33 by a second mask process (PEP2).
  • PEP2 second mask process
  • a second metal film is formed on the side of the first insulating layer 33 away from the base substrate 31 , and a second metal layer 34 is formed on the second metal film through a third mask process (PEP3).
  • the second metal layer 34 includes A plurality of gate connection lines 13 extending longitudinally to the non-display area 20 and at least one first connection repairing line 14 extending longitudinally.
  • the plurality of gate connection lines 13 in the second metal layer 34 are electrically connected to the plurality of gate lines 11 in the first metal layer 32 through connection vias 171 .
  • At least one gate repair line 12 and at least one first connection repair line 14 are connected in a one-to-one correspondence through the first via holes 172 , and each gate repair line is formed with a plurality of first connection lines 13 one-to-one corresponding to the plurality of gate connection lines 13 .
  • a connection and repair point 15 is formed, and a plurality of second connection and repair points 16 corresponding to the plurality of gate lines 11 are formed on each of the first connection and repair lines.
  • the orthographic projections of the plurality of gate connecting lines 13 on the layer to which the gate repairing lines 12 belong intersect with each gate repairing line in the gate repairing lines 12 , and the intersecting position is formed as the first connecting repairing point 15 .
  • the orthographic projection of the at least one first connection repair line 14 in the layer to which the plurality of gate lines 11 belong intersects the plurality of gate lines 11 , and the intersecting position forms the second connection repair point 16 .
  • At least one gate repair line 12 is formed on at least one side of the plurality of gate lines 11 .
  • at least one gate repair line 12 is formed on the left side (corresponding to the display panel in FIG. 1 ), the right side (not shown in the figure), the left side and the right side (corresponding to FIG. 2 ) of the plurality of gate lines 11 display panel in ).
  • At least one first connection repair line 14 is formed on the left and right sides of the plurality of gate connection lines 13 as corresponding to the display panel shown in FIG. 2 .
  • the pixel electrode 36 is formed on the side of the flat layer 35 away from the base substrate 31 through a fifth mask process (PEP5).
  • the target gate repair line from at least one gate repair line, and Determining the first connection repair line connected to the target gate repair line as the target first connection repair line, melting the first connection repair point on the target gate repair line corresponding to the target gate connection line and the target first connection repair line A second connection repair point on the line corresponding to the target gate line, so that the target gate connection line is electrically connected to the target gate line through the target gate repair line and the target first connection repair line.
  • the number of target gate connection lines may be one or more; if the number of target gate connection lines is not greater than the number of gate repair lines, then In at least one gate repair line 12, the same number of target gate repair lines as the target gate connection lines is determined, and the first connection repair line connected with the target gate repair line is determined as the target first connection repair line;
  • the number of gate connecting lines is greater than the number of gate repairing lines 12 .
  • the number of target gate connecting lines is 5, while the number of gate repairing lines 12 is 4, which means that the formed gate repairing lines 12 are not enough.
  • the first connecting repairing line connected by the repairing line is determined as the target first connecting repairing line.
  • the target gate lines and corresponding target gate lines that can be repaired are re-determined, and a corresponding number of target gate lines and target gate lines with failed connections can be randomly determined from the gate lines and gate connection lines with failed connections. Or take a corresponding number of gate lines with failed connections close to the center of the display panel as target gate lines, and take the gate connecting lines corresponding to the target gate lines as target gate connecting lines, in this way, with the maximum limit Reduce the impact on the display effect of the display area. It is understandable that the failure of a gate line in the central area of the display panel and the corresponding gate connection line has a greater impact on the display effect than a gate line in the surrounding area of the display panel. The influence of the failure of the corresponding gate connection line on the display effect.
  • FIG. 6 is a schematic diagram of a repairing structure provided by an embodiment of the present application
  • FIG. 7 is a schematic diagram of a fusion structure corresponding to that shown in FIG. 6 provided by an embodiment of the present application.
  • FIG. 6 FIG. 6 corresponds to the display panel in FIG. 2
  • the Nth gate line and the corresponding The Nth gate connection line is determined as a target gate line and a target gate connection line.
  • One target gate repair line is determined from the at least one gate repair line 12
  • the first connection repair line connected to the target gate repair line is determined as the target first connection repair line.
  • the target first connection repair line connected to the target gate repair line is located on the left side of the display panel; or after the target gate repair line is determined, the target first connection repair line connected to the target gate repair line is located.
  • a connecting patch line is located on the right side of the display panel. It should be noted that the target gate repair line corresponding to the target first connection repair line on the left side of the display panel and the target gate repair line corresponding to the target first connection repair line on the right side of the display panel are different target gate repair lines. .
  • the target first connection repair line is located on the left side of the display panel
  • the second connection repair point corresponding to the target gate line on the target first connection repair line is located at the left side of the display panel, such as At point 1 in FIG. 6 , the first connection and repair point on the target gate repair line corresponding to the target gate connection line is point 2 in FIG. 6 .
  • a laser welding process was used to melt point 1 and point 2 (point 2 is not shown in FIG. 7 ). Wherein, melting point 2 makes the target gate connection line and the target gate repair line electrically connected, and melting point 1 makes the target first connection repair line connected to the target gate repair line electrically connected to the target gate line.
  • the target first connection repair line is located on the right side of the display panel
  • the second connection repair point corresponding to the target gate line on the target first connection repair line is located at the right side of the display panel, such as At point 3 in FIG. 6 , the first connection repair line on the target gate repair line corresponding to the target gate connection line is point 4 in FIG. 6 .
  • a laser welding process is used to melt point 3 and point 4 (point 4 is not shown in FIG. 7 ). Wherein, melting point 4 makes the target gate connection line and the target gate repair line electrically connected, and melting point 3 makes the target first connection repair line connected with the target gate repair line electrically connected with the target gate line.
  • the display panel shown in FIG. 6 is a single drive, and both melting points 1 and 2, or melting points 3 and 4 can be used to repair the target gate line and the target gate connection line, so that the target gate The connection line is electrically connected to the target gate line through the target gate repair line and the target first connection repair line, and the gate driving signal received by the target gate connection line is transmitted through the target gate repair line and the target first connection repair line to the target gate line.
  • melting point 1 and point 2, melting point 3 and point 4 in Figure 6 are two different embodiments that can solve the technical problem.
  • the embodiment of the present application also provides a method for fabricating a display panel, the display panel includes a display area 10 and a non-display area 20 , as shown in FIG. 8 , the method for fabricating the display panel includes the following steps 201 to 206 .
  • FIG. 9 is a schematic structural diagram of a part of a process for forming a display area of a display panel and a corresponding display area according to an embodiment of the present application. Please refer to the manufacturing method of the display panel in conjunction with FIG. 8 and FIG. 9 .
  • 201 Provide a base substrate in the display area, and form a plurality of gate lines and at least one gate repair line extending laterally on the base substrate.
  • a plurality of gate connecting lines extending longitudinally to the non-display area, at least one first connecting repairing line and at least one second connecting repairing line extending longitudinally on the side of the first insulating layer away from the base substrate, at least one The first connecting and repairing line and at least one second connecting and repairing line are arranged on opposite sides of the plurality of gate connecting lines, and the at least one gate repairing line is connected with at least one first connecting and repairing line and at least one second connecting and repairing line one by one.
  • each gate repair line is formed with a plurality of first connection repair points corresponding to a plurality of gate connection lines one-to-one, and each first connection repair line is formed with a one-to-one correspondence with a plurality of gate lines
  • a plurality of second connection and repair points are formed on each of the second connection and repair lines, and a plurality of third connection and repair points corresponding to the plurality of gate lines are formed on each of the second connection and repair lines.
  • a second metal layer 34 is formed on the side of the first insulating layer 33 away from the base substrate 31 , and a third photomask process (PEP3 ) is used to form the second metal layer 34 extending longitudinally to the non-display area 20 in the second metal layer 34 .
  • PEP3 photomask process
  • At least one first connection and repair line 14 and at least one second connection and repair line 18 are formed on opposite sides of the plurality of gate connection lines 13 , and at least one gate repair line 12 is connected to at least one first through hole 172
  • the repair lines 14 are connected in a one-to-one correspondence, and at least one gate repair line 12 is connected with at least one second connection repair line 18 through a second via hole 173 in a one-to-one correspondence.
  • the plurality of gate connection lines 13 in the second metal layer 34 are electrically connected to the plurality of gate lines 11 in the first metal layer 32 through connection vias 171 .
  • the third mask here is different from the third mask shown in FIG. 5 .
  • At least one first connection repair line 14 is formed on the left side of the plurality of gate connection lines 13
  • at least one second connection repair line 14 is formed on the right side of the plurality of gate connection lines 13 Line 18.
  • at least one first connection repair line 14 is formed on the left side of the plurality of gate connection lines 13 in the second metal layer 34
  • a plurality of gate connection lines 13 are formed in the second metal layer 34
  • At least one second connection repairing line 18 is formed on the right side of the .
  • each gate repair line 12 is provided with a plurality of first connection repair points 15 corresponding to the plurality of gate connection lines 13 one-to-one, and each first connection repair line 14 is formed with a plurality of gate lines A plurality of second connection points 16 corresponding to 11 one-to-one, and a plurality of third connection points 19 corresponding to a plurality of gate lines 11 are formed on each of the second connection repair lines 18 .
  • the orthographic projections of the plurality of gate connecting lines 13 on the layer to which the gate repairing lines 12 belong intersect with each gate repairing line in the gate repairing lines 12 , and the intersecting position is formed as the first connecting repairing point 15
  • the orthographic projection of the at least one first connection repair line 14 in the layer to which the plurality of gate lines 11 belong intersects the plurality of gate lines 11, and the intersecting position forms the second connection repair point 16, and at least one second connection repair point
  • the orthographic projection of the line 18 in the layer to which the plurality of gate lines 11 belong intersects the plurality of gate lines 11 , and the intersecting position forms the third connection repair point 19 .
  • the target gate repair line is electrically connected to the target gate line through the target gate repair line, the target first connection repair line, and the target second connection repair line.
  • the method of detecting the target gate line and the target gate connection line determining the method of the target gate line, the target gate connection line, the target gate repair line, the target first connection repair line, the target second connection repair line, etc.
  • the method is the same as that in step 106, and details are not repeated here.
  • FIG. 10 is a schematic diagram of a repairing structure provided by an embodiment of the present application
  • FIG. 11 is a schematic diagram of a melting corresponding to that shown in FIG. 10 provided by an embodiment of the present application.
  • FIG. 10 FIG. 10 corresponds to the display panel in FIG. 3
  • the Nth gate line and the corresponding The Nth gate connection line is determined as a target gate line and a target gate connection line.
  • a target gate repair line is determined from at least one gate repair line 12, and the first connection repair line and the second connection repair line connected to the target gate repair line are determined as the target first connection repair line and the target second repair line. Connect the patch cord.
  • the target first connection repair line connected with the target gate repair line is located on the left side of the display panel, and the target second connection repair line connected with the target gate repair line is located on the right side of the display panel. It should be noted that the target first connection repair line and the target second connection repair line are connected to the same target gate repair line.
  • the target first connection repair line is located on the left side of the display panel
  • the second connection repair point corresponding to the target gate line on the target first connection repair line is located at the left side of the display panel, such as Point 5 in Figure 10.
  • the target second connection and repair line is located on the right side of the display panel
  • the third connection and repair point on the target second connection and repair line corresponding to the target gate line is located at the right side of the display panel, such as point 6 in FIG. 10 .
  • the first connection repair point on the target gate repair line corresponding to the target gate connection line is point 7 in FIG. 10 .
  • a laser welding process was used to melt point 5, point 6 and point 7 (point 7 is not shown in FIG. 11 ).
  • melting point 7 makes the target gate connection line electrically connected with the target gate repair line
  • melting point 5 and point 6 make the target first connection repair line and the target second connection repair line connected to the target gate repair line
  • the line is electrically connected to the target gate line.
  • the display panel shown in FIG. 10 is a dual drive, and the melting point 5, point 6 and point 7 realize the repair of the target gate line and the target gate connection line, so that the target gate connection line is repaired through the target gate.
  • the line, the target first connection repair line, the target second connection repair line and the target gate line are electrically connected, and the gate drive signal received by the target gate connection line passes through the target gate repair line, the target first connection repair line, The target second connection repair line is transmitted to the target gate line.
  • steps 201 to 206 are the same as those in steps 101 to 106, please refer to the detailed descriptions in steps 101 to 106, which are not repeated here.
  • the above-mentioned manufacturing method of the display panel can repair the failed target gate line and the corresponding target gate connection line, so that the failed target gate line continues to be in a valid position, and the connection between the gate line and the gate in the display panel is solved.
  • the problem of poor wire contact/connection failure improves the product yield of the display panel.
  • a display panel and a method for fabricating a display panel provided by the embodiments of the present application have been described in detail above.
  • the principles and implementations of the present application are described with specific examples.
  • the descriptions of the above embodiments are only used to help Understand the technical solutions of the present application and their core ideas; those of ordinary skill in the art should understand that: they can still modify the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements to some of the technical features; and these modifications or The replacement does not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present application.

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Abstract

一种显示面板和显示面板的制作方法。其中，显示面板的显示区（10）包括：横向延伸的多条栅极线（11）和栅极修补线（12）、纵向延伸至非显示区（20）的多条栅极连接线（13）、以及纵向延伸的第一连接修补线（14）；栅极修补线（12）与第一连接修补线（14）一一对应连接，每条栅极修补线（12）上设有多个第一连接修补点（15），每条第一连接修补线（14）上设有多个第二连接修补点（16）。

Description

一种显示面板及显示面板的制作方法
本申请要求于2020年09月02日提交中国专利局、申请号为202010907676.4、发明名称为“一种显示面板及显示面板的制作方法”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及显示技术领域，具体涉及一种显示面板及显示面板的制作方法。
 背景技术
随着液晶显示面板4K、8K高解析及超窄边框和/或无边框(如边框（board）<=0.9mm)新技术产品开发及普及，传统面板设计已经不能满足高规格需求，为满足超窄边框和/或无边框及高解析规格的要求，业界在液晶面板中将GOA（Gate Driver On Array，栅极驱动在玻璃基板上）/GCOF（栅极驱动在软性线路板上）设置在显示面板一侧的源极边框上；而显示面板的相对一侧不再设置源极边框。若采用此技术，产品制程程普遍需要增加一道栅极绝缘层（GI，Gate Insulation）金属掩膜板（Mask），在面内把栅极（Gate）引孔（或者称为过孔）到源极（Source）侧进行驱动。
因为是高解析液晶面板，面内连接过孔非常密集，如4K的连接过孔数量为2160，8K的连接过孔数量为4320，为降低面内开口率影响，显示区的连接过孔需要非常小，如小于3*3um等，超出现有过孔制程能力极限。因连接过孔制程波动和/或其他制程波动，极易造成显示面板中的第一金属层的栅极线和第二金属层的栅极连接线接触不良/连接失效。通过现有检测技术检测不出接触不良/连接失效，而导致点灯时显示面板出现画面异常。如此，容易造成显示面板报废，降低了显示面板的产品良率。
 技术问题
本申请实施例提供一种显示面板及显示面板的制作方法，可解决显示面板中栅极线与栅极连接线的接触不良/连接失效的问题，提高显示面板的产品良率。
 技术解决方案
本申请实施例提供了一种显示面板，包括：
显示区和位于显示区一侧的非显示区；
显示区包括：横向延伸的多条栅极线和至少一条栅极修补线、纵向延伸至非显示区的多条栅极连接线、以及纵向延伸的至少一条第一连接修补线；
至少一条栅极修补线与至少一条第一连接修补线一一对应连接，每条栅极修补线上设有与多条栅极连接线一一对应的多个第一连接修补点，每条第一连接修补线上设有与多条栅极线一一对应的多个第二连接修补点。
其中，多条栅极线和至少一条栅极修补线同层设置，多条栅极连接线与至少一条第一连接修补线同层设置。
其中，多条栅极连接线在栅极修补线所属层上的正投影与栅极修补线中的每条栅极修补线相交，且相交的位置设为第一连接修补点。
其中，至少一条第一连接修补线在多条栅极线所属层中的正投影与多条栅极线相交，且相交的位置设为第二连接修补点。
其中，至少一条栅极修补线设置于多条栅极线靠近非显示区的一侧。
其中，至少一条第一连接修补线设置于多条栅极连接线的至少一侧。
其中，显示区还包括纵向延伸的至少一条第二连接修补线；至少一条第一连接修补线和至少一条第二连接修补线设于多条栅极连接线的相对两侧；
至少一条栅极修补线与至少一条第二连接修补线一一对应连接，每条第二连接修补线上设有与多条栅极线一一对应的多个第三连接修补点。
其中，至少一条第二连接修补线在多条栅极线所属层中的正投影与多条栅极线相交，且相交的位置设为第三连接修补点。
其中，至少一条栅极修补线与至少一条第一连接修补线通过第一过孔一一对应连接，至少一条栅极修补线与至少一条第二连接修补线通过第二过孔一一对应连接。
本申请实施例还提供了一种显示面板的制作方法，该示面板包括显示区和位于显示区一侧的非显示区；该显示面板的制作方法包括：
在显示区上形成横向延伸的多条栅极线和至少一条栅极修补线，纵向延伸至非显示区的多条栅极连接线，以及纵向延伸的至少一条第一连接修补线；
至少一条栅极修补线与至少一条第一连接修补线一一对应连接，每条栅极修补线上形成有与多条栅极连接线一一对应的多个第一连接修补点，每条第一连接修补线上形成有与多条栅极线一一对应的多个第二连接修补点；
在点灯测试时，若检测到多条栅极线中的目标栅极线与对应的目标栅极连接线的连接失效，则从至少一条栅极修补线中确定目标栅极修补线，并将与目标栅极修补线连接的第一连接修补线确定为目标第一连接修补线，熔融目标栅极修补线上与目标栅极连接线相对应的第一连接修补点和目标第一连接修补线上与目标栅极线相对应的第二连接修补点，使得目标栅极连接线通过目标栅极修补线、目标第一连接修补线与目标栅极线电性连接。
其中，该显示面板的制作方法还包括：
在所述显示区上形成纵向延伸的至少一条第二连接修补线；
所述至少一条第一连接修补线和所述至少一条第二连接修补线设于所述多条栅极连接线的相对两侧；至少一条栅极修补线与至少一条第二连接修补线一一对应连接，每条第二连接修补线上设有与多条栅极线一一对应的多个第三连接修补点；
在检测到多条栅极线的目标栅极线与对应的目标栅极连接线的连接失效后，还包括：将与目标栅极修补线连接的第二连接修补线确定为目标第二连接修补线，熔融目标第二连接修补线上与目标栅极线相对应的第三连接修补点，使得目标栅极连接线通过目标栅极修补线、目标第一连接修补线、目标第二连接修补线与目标栅极线电性连接。
其中，多条栅极线和至少一条栅极修补线同层设置，多条栅极连接线与至少一条第一连接修补线同层设置。
本申请实施例还提供了一种显示面板，包括：
显示区和位于显示区一侧的非显示区；
显示区包括：横向延伸的多条栅极线和至少一条栅极修补线、纵向延伸至非显示区的多条栅极连接线、以及纵向延伸的至少一条第一连接修补线；
至少一条栅极修补线与至少一条第一连接修补线一一对应连接，每条栅极修补线上设有与多条栅极连接线一一对应的多个第一连接修补点，每条第一连接修补线上设有与多条栅极线一一对应的多个第二连接修补点；
至少一条栅极修补线与至少一条第一连接修补线通过第一过孔一一对应连接。
其中，多条栅极线和至少一条栅极修补线同层设置，多条栅极连接线与至少一条第一连接修补线同层设置。
其中，多条栅极连接线在栅极修补线所属层上的正投影与栅极修补线中的每条栅极修补线相交，且相交的位置设为第一连接修补点。
其中，至少一条第一连接修补线在多条栅极线所属层中的正投影与多条栅极线相交，且相交的位置设为第二连接修补点。
其中，至少一条栅极修补线设置于多条栅极线靠近非显示区的一侧。
其中，至少一条第一连接修补线设置于多条栅极连接线的至少一侧。
其中，显示区还包括纵向延伸的至少一条第二连接修补线；至少一条第一连接修补线和至少一条第二连接修补线设于多条栅极连接线的相对两侧；
至少一条栅极修补线与至少一条第二连接修补线一一对应连接，每条第二连接修补线上设有与多条栅极线一一对应的多个第三连接修补点。
其中，至少一条第二连接修补线在多条栅极线所属层中的正投影与多条栅极线相交，且相交的位置设为第三连接修补点。
 有益效果
本申请实施例提供了显示面板和显示面板的制作方法，其中，显示面板包括显示区和位于显示区一侧的非显示区；显示区包括：横向延伸的多条栅极线和至少一条栅极修补线、纵向延伸至非显示区的多条栅极连接线、以及纵向延伸的至少一条第一连接修补线；至少一条栅极修补线与至少一条第一连接修补线一一对应连接，每条栅极修补线上设有与多条栅极连接线一一对应的多个第一连接修补点，每条第一连接修补线上设有与多条栅极线一一对应的多个第二连接修补点。如此，在检测到多条栅极连接线中的目标栅极连接线与对应的目标栅极线的连接失效/接触不良时，确定至少一条栅极修补线中的目标栅极修补线、与目标栅极修补线连接的目标第一连接修补线，并熔融目标栅极修补线上与目标栅极连接线相对应的第一连接修补点、和目标第一连接修补线上与目标栅极线相对应的第二连接修补点，使得目标栅极连接线通过目标栅极修补线、目标第一连接修补线与目标栅极线电性连接。如此，使得连接失效的目标栅极线继续维持有效状态，解决了显示面板中栅极线与栅极连接线的接触不良/连接失效的问题，提高显示面板的产品良率。
 附图说明
为了更清楚地说明本申请实施例中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1是本申请实施例提供的显示面板的结构示意图；
图2是本申请实施例提供的显示面板的另一结构示意图；
图3是本申请实施例提供的显示面板的另一结构示意图；
图4是本申请实施例提供的显示面板的制作方法的流程示意图；
图5是本申请实施例提供的形成显示面板显示区的部分制程及对应的结构示意图；
图6是本申请实施例提供的修补结构示意图；
图7是本申请实施例提供的熔融结构示意图；
图8是本申请实施例提供的显示面板的制作方法的另一流程示意图；
图9是本申请实施例提供的形成显示面板显示区的部分制程及对应的结构示意图；
图10是本申请实施例提供的另一修补结构示意图；
图11是本申请实施例提供的另一熔融结构示意图。
 本发明的实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
在本申请的描述中，需要理解的是，术语“纵向”、“横向”、“长度”、“宽度”、“上”、“下”、“前”、“后”、“左”、“右”、“竖直”、“水平”等指示的方位或位置关系为基于附图所示的方位或位置关系，仅是为了便于描述本申请和简化描述，而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为对本申请的限制。此外，术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个所述特征。在本申请的描述中，“多个”的含义是两个或两个以上，除非另有明确具体的限定。在本申请中，“/”表示“或者”的意思。
本申请可以在不同例子中重复参考数字和/或参考字母，这种重复是为了简化和清楚的目的，其本身不指示所讨论各种实施方式和/或设置之间的关系。
本申请实施例提供一种显示面板及显示面板的制作方法，用以解决现有窄边框/无边框的显示面板在制程过程中因制程波动而导致的栅极线和栅极连接线的接触不良/连接失效的问题，提高显示面板的产品良率。以下将结合具体实施例对本申请的显示面板及显示面板的制作方法进行详细描述。
图1至图3是本申请实施例提供的显示面板的结构示意图。该显示面板包括显示区10和位于显示区10一侧的非显示区20。显示区10包括显示面板中间区域对应的第一显示区101，位于第一显示区101和非显示区20之间的源极边框区102，以及位于第一显示区101的相对两侧且与源极边框区102相邻的栅极边框区103。其中，第一显示区101用于显示面板的显示。
显示区10包括横向延伸的多条栅极线11、纵向延伸至非显示区20的多条栅极连接线13。多条栅极连接线13与多条栅极线11一一对应连接。多条栅极线11和多条栅极连接线13设置于不同层，如多条栅极线11设置于衬底基板上的第一金属层，多条栅极连接线13设置于第一金属层远离衬底基板一侧的第二金属层。非显示区20中包括GOA驱动电路/GCOF驱动电路，用于为显示区10提供栅极驱动信号。多条栅极连接线13的一端与非显示区20中的GOA驱动电路连接，用于接收非显示区20提供的栅极驱动信号，多条栅极连接线13的另一端通过连接过孔171与多条栅极线11一一对应连接，用于将接收的栅极驱动信号传输至对应连接的多条栅极线11。
所述显示区10还包括横向延伸的至少一条栅极修补线12，和纵向延伸的至少一条第一连接修补线14，至少一条栅极修补线12与至少一条第一连接修补线14一一对应连接。每条栅极修补线12上设有与多条栅极连接线13一一对应的多个第一连接修补点15，每条第一连接修补线14上设有与多条栅极线11一一对应的多个第二连接修补点16。
显示区10还包括纵向延伸的多条数据线（图中未示出），多条数据线与多条栅极连接线13同层设置，多条数据线与多条栅极线11不同层设置。位于显示区10一侧的非显示区20还包括源极驱动电路，多条数据线与非显示区20中的源极驱动电路连接，用于提供数据信号。本申请实施例中将GOA驱动电路和源极驱动电路设置在显示区的一侧，缩减显示区其他侧的边框，达到窄边框/无边框的目的。
上述图1至图3中的显示面板，因为是高解析显示面板，面内连接过孔13非常密集，同时考虑到面内开口率，因此连接过孔171需要非常小，如小于3*3um等，超出现有过孔制程能力极限。因连接过孔制程波动和/或其他制程波动，极易造成显示面板第一金属层中的栅极线11和第二金属层中的栅极连接线13接触不良/连接失效。如第一金属层中的栅极线11与第二金属层中的栅极连接线13相连接的连接过孔171不良，导致第一金属层中的栅极线11与第二金属层中的栅极连接线13不能导通；或者第一金属层中的栅极线11和第二金属层中的栅极连接线13可能因为颗粒等异物而产生短路，导致第一金属层中的栅极线11与第二金属层的栅极连接线13不能导通；或者第二金属层中的栅极连接线13断掉，从而导致第一金属层中的栅极线11与第二金属层的栅极连接线13不能导通等。
当显示面板出现第一金属层中的栅极线11和第二金属层中的栅极连接线13接触不良/连接失效时，通过现有检测技术并不能即刻就检测出接触不良/连接失效。而在点灯测试时，才可以看出因为栅极线和栅极连接线接触不良/连接失败而导致点灯时显示面板出现画面异常。如此，容易造成显示面板报废，降低了显示面板的产品良率。另一方面，因为超窄边框/无边框在涉及和验证阶段，并未提出改善该接触不良/连接失效的方案。
通过本申请实施例中提供的显示面板，在检测到多条栅极连接线中的目标栅极连接线与对应的目标栅极线的连接失效/接触不良时，通过确定至少一条栅极修补线中的目标栅极修补线、与目标栅极修补线连接的目标第一连接修补线，并熔融目标栅极修补线上与目标栅极连接线相对应的第一连接修补点、和目标第一连接修补线上与目标栅极线相对应的第二连接修补点，使得目标栅极连接线通过目标栅极修补线、目标第一连接修补线与目标栅极线电性连接。如此，使得连接失效的目标栅极线继续维持有效状态，解决了显示面板中栅极线与栅极连接线的接触不良/连接失效的问题，提高显示面板的产品良率。
其中，多条栅极线11与至少一条栅极修补线12同层设置。可以理解为，多条栅极线11与至少一条栅极修补线12通过同一道光罩制程形成。多条栅极连接线13与至少一条第一连接修补线14同层设置。可以理解为，多条栅极连接线13与至少一条第一连接修补线14通过同一道光罩制程形成。如此，无需另外增加工艺制程来形成至少一条栅极修补线12和至少一条第一连接修补线14。可以理解地，多条栅极线11和至少一条连接修补线12，与多条栅极连接线13和至少一条第一连接修补线14设置于不同层。
具体地，至少一条栅极修补线12可设置于多条栅极线11之间，如在第一条栅极线和第二条栅极线之间设置一条栅极修补线，在第二条栅极线和第三条栅极线之间也设置一条栅极修补线等，即在任意两条栅极线之间设置一条栅极修补线，具体地，在任意两行像素开口之间设置一条栅极修补线；至少一条栅极修补线12也可设置于多条栅极线11靠近非显示区20的一侧。
较优地，为减少布线的长度以及避免对显示区10的显示效果造成影响，至少一条栅极修补线12设置于多条栅极线11靠近非显示区20的一侧，如图1至图3所示。可以简单理解为，根据源极边框区102的设计空间及需求，在源极边框区102中设计加入横向延伸的至少一条栅极修补线12。
具体地，至少一条第一连接修补线14可设置于多条栅极连接线13之间，即在任意两条栅极连接线之间设置一条第一连接修补线，具体地，在任意两列像素开口之间设置一条第一连接修补线；至少一条第一连接修补线14也可设置于多条栅极连接线13的至少一侧。
较优地，为了避免对显示区10的显示效果造成影响，至少一条第一连接修补线14设置于多条栅极连接线13的至少一侧。可以简单理解为将衬底基板、多条栅极线11等设计延伸入显示面板至少一侧的栅极边框区103中，以形成如图1至图3所示的结构，根据栅极边框区103的设计空间及需求，在至少一个栅极边框区103中设计加入纵向延伸的至少一条第一连接修补线14。
如在图3中，至少一条第一连接修补线14设置于多条栅极连接线13的左侧，即至少一条第一连接修补线14设置于第一显示区101左侧的栅极边框区103中；可以理解地，至少一条第一连接修补线14还可设置于多条栅极连接线13的右侧，即至少一条第一连接修补线14设置于第一显示区101右侧的栅极边框区103中（图中未示出该种情况）。如在图4中，至少一条第一连接修补线14设置于多条栅极连接线13相对设置的两侧，即在第一显示区101左侧和右侧的栅极边框区103中设置至少一条第一连接修补线14。如在图5中，至少一条第一连接修补线14设置于多条栅极连接线13的一侧，如设置于多条栅极连接线13的左侧，即在第一显示区101左侧的栅极边框区103中设置至少一条第一连接修补线14。
可以简单理解，本申请实施例中多条栅极线11既设计延伸入显示面板左边的栅极边框区103，又设计延伸入显示面板右边的栅极边框区103，以形成图1至图3中的结构，或者也可以理解为多条栅极线11既在显示面板第一显示区101的左侧延伸出该第一显示区101，又在显示面板第一显示区101的右侧延伸出该第一显示区101，以形成图1至图3中的结构。可以理解地，若至少一条第一连接修补线14设置于多条栅极连接线13的左侧，对应地，多条栅极线11还可以仅设计延伸入显示面板左侧的栅极边框区103，或者也可以理解为多条栅极线11在显示面板第一显示区101的左侧延伸出该第一显示区101（图中未示出该种情况）。若至少一条第一连接修补线14设置于多条栅极连接线13的右侧，对应地，多条栅极线11还可以仅设计延伸入显示面板右侧的栅极边框区103，或者也可以理解为多条栅极线11在显示面板第一显示区101的右侧延伸出该第一显示区101（图中未示出该种情况）。需要注意的是，此处只提到多条栅极线11的延伸，可以理解地，第一显示区的所有层级中的物理构件都与栅极线同步延伸。
具体地，如图1至图3所示，至少一条栅极修补线12与至少一条第一连接修补线14通过第一过孔172一一对应连接。多条栅极连接线13在栅极修补线12所属层上的正投影，与栅极修补线12中的每条栅极修补线相交，且相交的位置设为第一连接修补点15。至少一条第一连接修补线14在多条栅极线11所属层中的正投影与多条栅极线11相交，且相交的位置设置为第二连接修补点16。
在点灯测试时，若检测到多条栅极连接线13中的目标栅极连接线与对应的目标栅极线接触不良/连接失效，则从至少一条栅极修补线12中确定目标栅极修补线，并将与目标栅极修补线连接的第一连接修补线确定为目标第一连接修补线，熔融目标栅极修补线上与目标栅极连接线相对应的第一连接修补点和目标第一连接修补线上与目标栅极线相对应的第二连接修补点，使得目标栅极连接线通过目标栅极修补线、目标第一连接修补线与目标栅极线电性连接。如此，即使显示区中的目标栅极连接线与对应的目标栅极线的接触不良/连接失效，仍可使得目标栅极连接线接收的栅极驱动信号，通过目标栅极修补线、目标第一连接修补线传输至目标栅极线，如此，使得连接失效的目标栅极线继续维持有效状态，解决了显示面板中栅极线与栅极连接线的接触不良/连接失效的问题，提高显示面板的产品良率。
图5中所示的显示面板，除了设置于多条栅极连接线13一侧的纵向延伸的至少一条第一连接修补线14之外，在多条栅极连接线13的另一侧还设置有纵向延伸的至少一条第二连接修补线18，至少一条第一连接修补线14和至少一条第二连接修补线18设于多条栅极连接线13的相对两侧。如在多条栅极连接线13的左侧设置至少一条第一连接修补线14，在多条栅极连接线13的右侧设置至少一条第二连接修补线18。至少一条栅极修补线12与至少一条第二连接修补线18一一对应连接，每条第二连接修补线18上设有与多条栅极线11一一对应的多个第三连接修补点19。多条栅极连接线与至少一条第二连接修补线18同层设置。
具体地，至少一条栅极修补线12与至少一条第二连接修补线18通过第二过孔173一一对应连接，至少一条第二连接修补线18在多条栅极线11所属层中的正投影与多条栅极线11相交，且相交的位置设为第三连接修补点19。
可以理解地，在图1至图2所示的图中，每条栅极修补线12上通过第一过孔172连接有一条第一连接修补线，理解为图1至图2所示的显示面板是单驱。在图3中，每条栅极修补线12上通过第一过孔172连接有一条第一连接修补线14，同时通过第二过孔173连接有一条第二连接修补线18，理解为图3所示的显示面板是双驱。
对于图3所示的显示面板，若检测到多条栅极连接线13中的目标栅极连接线与对应的目标栅极线接触不良/连接失效，从至少一条栅极修补线12中确定目标栅极修补线，并将与目标栅极修补线连接的第一连接修补线确定为目标第一连接修补线，将与目标栅极修补线连接的第二连接修补线确定为目标第二连接修补线，熔融目标栅极修补线上与目标栅极连接线相对应的第一连接修补点、熔融目标第一连接修补线上与目标栅极线相对应的第二连接修补点，并熔融目标第二连接修补线上与目标栅极线相对应的第三连接修补点，使得目标栅极连接线通过目标栅极修补线、目标第一连接修补线、目标第二连接修补线与目标栅极线电性连接。如此，即使显示区中的目标栅极连接线与对应的目标栅极线的接触不良/连接失效，仍可使得目标栅极连接线接收的栅极驱动信号，通过目标栅极修补线、目标第一连接修补线、目标第二连接修补线传输至目标栅极线，如此，使得连接失效的目标栅极线继续维持有效状态，解决了显示面板中栅极线与栅极连接线的接触不良/连接失效的问题，提高显示面板的产品良率。
上述图1至图3中所示的显示面板解决了显示面板中栅极线与栅极连接线的接触不良/连接失效的问题，提高显示面板的产品良率。
本申请实施例还提供了一种显示面板的制作方法，该显示面板包括显示区10和非显示区20，如图4所示，该显示面板的制作方法包括如下步骤101～106。图5是本申请实施例提供的形成显示面板显示区的部分制程及对应的显示区的结构示意图，请结合图4和图5来参看该显示面板的制作方法。
101，在显示区提供一衬底基板，并在衬底基板上形成横向延伸的多条栅极线和至少一条栅极修补线。
在显示区提供一衬底基板31，在衬底基板31上形成第一金属薄膜，并通过第一道光罩制程（PEP1）在第一金属薄膜上形成第一金属层32，第一金属层32中包括横向延伸的多条栅极线11和横向延伸的至少一条栅极修补线12。优选地，为了减少布线的长度以及避免对显示区10的显示效果造成影响，至少一条栅极修补线12形成于多条栅极线11靠近非显示区20的一侧。
102，在第一金属层远离衬底基板的一侧形成第一绝缘层。
利用沉积工艺在第一金属层32远离衬底基板31的一侧形成第一绝缘层33，并利用第二道光罩制程（PEP2）在第一绝缘层33上形成多个连接过孔171。
103，在第一绝缘层远离衬底基板的一侧形成纵向延伸至非显示区的多条栅极连接线和纵向延伸的至少一条第一连接修补线，至少一条栅极修补线与至少一条第一连接修补线一一对应连接，每条栅极修补线上形成有与多条栅极连接线一一对应的多个第一连接修补点，每条第一连接修补线上形成有与多条栅极线一一对应的多个第二连接修补点。
在第一绝缘层33远离衬底基板31的一侧形成第二金属薄膜，并通过第三道光罩制程（PEP3）在第二金属薄膜上形成第二金属层34，第二金属层34中包括纵向延伸至非显示区20的多条栅极连接线13和纵向延伸的至少一条第一连接修补线14。第二金属层34中的多条栅极连接线13通过连接过孔171与第一金属层32中的多条栅极线11电性连接。
至少一条栅极修补线12与至少一条第一连接修补线14通过第一过孔172一一对应连接，每条栅极修补线上形成与多条栅极连接线13一一对应的多个第一连接修补点15，每条第一连接修补线上形成有与多条栅极线11一一对应的多个第二连接修补点16。具体地，多条栅极连接线13在栅极修补线12所属层上的正投影与栅极修补线12中的每条栅极修补线相交，且相交的位置形成为第一连接修补点15。至少一条第一连接修补线14在多条栅极线11所属层中的正投影与多条栅极线11相交，且相交的位置形成为第二连接修补点16。
优选地，为了避免对显示区10的显示效果造成影响，至少一条栅极修补线12形成于多条栅极线11的至少一侧。如至少一条栅极修补线12形成于多条栅极线11的左侧（对应于图1中的显示面板）、右侧（图中未示出）、左侧和右侧（对应于图2中的显示面板）。如对应于图2中所示的显示面板，在多条栅极连接线13的左侧和右侧形成至少一条第一连接修补线14。
104，在第二金属层远离衬底基板的一侧形成平坦层。
在第二金属层34远离衬底基板31的一侧通过第四道光罩制程（PEP4）形成平坦层35。
105，在平坦层远离衬底基板的一侧形成像素电极。
在平坦层35远离衬底基板31的一侧通过第五道光罩制程（PEP5）形成像素电极36。
需要注意的是，除了图5所示的制程外，显示面板的制作方法还包括其他制程，所形成的显示区也会包括更多层。如在第二金属层34远离衬底基板31的一侧形成第二绝缘层（图中未示出），在第二绝缘层上，通过第六道光罩制程形成第三金属层（图中未示出），所述第三金属层中包括形成的硅岛（图中未示出）。再在第三金属层上远离衬底基板的一侧形成平坦层35。
106，在点灯测试时，若检测到多条栅极线中的目标栅极线与对应的目标栅极连接线的连接失效，则从至少一条栅极修补线中确定目标栅极修补线，并将与目标栅极修补线连接的第一连接修补线确定为目标第一连接修补线，熔融目标栅极修补线上与目标栅极连接线相对应的第一连接修补点和目标第一连接修补线上与目标栅极线相对应的第二连接修补点，使得目标栅极连接线通过目标栅极修补线、目标第一连接修补线与目标栅极线电性连接。
其中，在产品制程中，通过检测机台检测是否有目标栅极线与对应的目标栅极连接线的连接失效。若存在，则确定目标栅极连接线的数量，目标栅极连接线的数量可能为1个，也可能为多个；若目标栅极连接线的数量不大于栅极修补线的数量，则从至少一条栅极修补线12中确定与目标栅极连接线数量相同的目标栅极修补线，并将与目标栅极修补线连接的第一连接修补线确定为目标第一连接修补线；若目标栅极连接线的数量大于栅极修补线12的数量，如目标栅极连接线的数量为5个，而栅极修补线12的数量为4个，意味着形成的栅极修补线12不足以修补全部连接失效的目标栅极线，则重新确定可以修补的目标栅极连接线和对应的目标栅极线，将所有的栅极修补线确定为目标栅极修补线，并将与目标栅极修补线连接的第一连接修补线确定为目标第一连接修补线。
具体地，重新确定可以修补的目标栅极连接线和对应的目标栅极线，可从连接失效的栅极线和栅极连接线中随机确定对应数量的连接失效的目标栅极线和目标栅极连接线；或者将靠近显示面板中央的对应数量的连接失效的栅极线作为目标栅极线，将与目标栅极线对应的栅极连接线作为目标栅极连接线，如此，以最大限定减少对显示区域的显示效果带来的影响，可以理解地，显示面板中央区域的一条栅极线与对应的栅极连接线失效对显示效果带来的影响大于显示面板四周区域的一条栅极线与对应的栅极连接线失效对显示效果带来的影响。
图6是本申请实施例提供的修补结构示意图，图7是本申请实施例提供的对应于图6所示的熔融结构示意图。如图6所示（图6对应于图2中的显示面板），假设第N条栅极线和对应的第N条栅极连接线的连接失效，则将第N条栅极线和对应的第N条栅极连接线确定为目标栅极线和目标栅极连接线。从至少一条栅极修补线12中确定一条目标栅极修补线，并将与目标栅极修补线连接的第一连接修补线确定为目标第一连接修补线。如确定了目标栅极修补线后，与目标栅极修补线连接的目标第一连接修补线位于显示面板的左边；或者确定了目标栅极修补线后，与目标栅极修补线连接的目标第一连接修补线位于显示面板的右边。需要注意的是，目标第一连接修补线位于显示面板左边所对应的目标栅极修补线与目标第一连接修补线位于显示面板右边所对应的目标栅极修补线是不同条目标栅极修补线。
若确定了目标栅极修补线后，目标第一连接修补线位于显示面板的左边，则目标第一连接修补线上与目标栅极线相对应的第二连接修补点位于显示面板的左边，如图6中的点1，目标栅极修补线上与目标栅极连接线相对应的第一连接修补点为图6中的点2。如图7所示，使用镭射使熔接合（Laser welding）制程，熔融点1和点2（点2在图7中未示出）。其中，熔融点2，使得目标栅极连接线与目标栅极修补线电性连接，熔融点1，使得与目标栅极修补线连接的目标第一连接修补线与目标栅极线电性连接。
若确定了目标栅极修补线后，目标第一连接修补线位于显示面板的右边，则目标第一连接修补线上与目标栅极线相对应的第二连接修补点位于显示面板的右边，如图6中的点3，目标栅极修补线上与目标栅极连接线相对应的第一连接修补线为图6中的点4。如图7所示，使用镭射使熔接合（Laser welding）制程，熔融点3和点4（点4在图7中未示出）。其中，熔融点4，使得目标栅极连接线与目标栅极修补线电性连接，熔融点3，使得与目标栅极修补线连接的目标第一连接修补线与目标栅极线电性连接。
需要注意的是，图6中所示的显示面板为单驱，熔融点1和点2，或者熔融点3和点4都可以实现修补目标栅极线与目标栅极连接线，使得目标栅极连接线通过目标栅极修补线、目标第一连接修补线与目标栅极线电性连接，目标栅极连接线接收的栅极驱动信号，通过目标栅极修补线、目标第一连接修补线传输至目标栅极线。需要注意的是，图6中的熔融点1和点2，熔融点3和点4是两个可以解决技术问题的不同实施方案。
本申请实施例还提供一种显示面板的做作方法，该显示面板包括显示区10和非显示区20，如图8所示，该显示面板的制作方法包括如下步骤201~206。图9是本申请实施例提供的形成显示面板显示区的部分制程及对应的显示区的结构示意图。请结合图8和图9来参看该显示面板的制作方法。
201，在显示区提供一衬底基板，并在衬底基板上形成横向延伸的多条栅极线和至少一条栅极修补线。
202，在第一金属层远离衬底基板的一侧形成第一绝缘层。
203，在第一绝缘层远离衬底基板的一侧形成纵向延伸至非显示区的多条栅极连接线、纵向延伸的至少一条第一连接修补线和至少一条第二连接修补线，至少一条第一连接修补线和至少一条第二连接修补线设于多条栅极连接线的相对两侧，至少一条栅极修补线与至少一条第一连接修补线、至少一条第二连接修补线一一对应连接，每条栅极修补线上形成有与多条栅极连接线一一对应的多个第一连接修补点，每条第一连接修补线上形成有与多条栅极线一一对应的多个第二连接修补点，每条第二连接修补线上形成有与多条栅极线一一对应的多个第三连接修补点。
具体地，在第一绝缘层33远离衬底基板31的一侧形成第二金属层34，并通过第三道光罩制程（PEP3）在第二金属层34中形成纵向延伸至非显示区20的多条栅极连接线13、纵向延伸的至少一条第一连接修补线14和纵向延伸的至少一条第二连接修补线18。至少一条第一连接修补线14与至少一条第二连接修补线18形成于多条栅极连接线13的相对两侧，至少一条栅极修补线12通过第一过孔172与至少一条第一连接修补线14一一对应连接，至少一条栅极修补线12通过第二过孔173与至少一条第二连接修补线18一一对应连接。第二金属层34中的多条栅极连接线13通过连接过孔171与第一金属层32中的多条栅极线11电性连接。需要注意的是，此处的第三道光罩与图5中所示的第三道光罩存在不同。
对应于图3中所示的显示面板，在多条栅极连接线13的左侧形成至少一条第一连接修补线14，在多条栅极连接线13的右侧形成至少一条第二连接修补线18。对应于图9中的显示区，在第二金属层34中多条栅极连接线13的左侧形成至少一条第一连接修补线14，在第二金属层34中多条栅极连接线13的右侧形成至少一条第二连接修补线18。
其中，每条栅极修补线12上设有与多条栅极连接线13一一对应的多个第一连接修补点15，每条第一连接修补线14上形成有与多条栅极线11一一对应的多个第二连接点16，每条第二连接修补线18上形成有与多条栅极线11一一对应的多个第三连接点19。具体地，多条栅极连接线13在栅极修补线12所属层上的正投影与栅极修补线12中的每条栅极修补线相交，且相交的位置形成为第一连接修补点15，至少一条第一连接修补线14在多条栅极线11所属层中的正投影与多条栅极线11相交，且相交的位置形成为第二连接修补点16，至少一条第二连接修补线18在多条栅极线11所属层中的正投影与多条栅极线11相交，且相交的位置形成为第三连接修补点19。
204，在第二金属层远离衬底基板的一侧形成平坦层。
205，在平坦层远离衬底基板的一侧形成像素电极。
206，在点灯测试时，若检测到多条栅极线中的目标栅极线与对应的目标栅极连接线的连接失效，则从至少一条栅极修补线中确定目标栅极修补线，并将与目标栅极修补线连接的第一连接修补线、第二连接修补线确定为目标第一连接修补线、目标第二连接修补线，熔融目标栅极修补线上与目标栅极连接线相对应的第一连接修补点、目标第一连接修补线上与目标栅极线相对应的第二连接修补点、目标第二连接修补线上与目标栅极线相对应的第三连接修补点，使得目标栅极连接线通过目标栅极修补线、目标第一连接修补线、目标第二连接修补线与目标栅极线电性连接。
其中，检测目标栅极线、目标栅极连接线的方式，确定目标栅极线、目标栅极连接线、目标栅极修补线、目标第一连接修补线、目标第二连接修补线的方式等与步骤106中的方式一致，在此不再赘述。
图10是本申请实施例提供的修补结构示意图，图11是本申请实施例提供的对应于图10所示的熔融示意图。如图10所示（图10对应于图3中的显示面板），假设第N条栅极线和对应的第N条栅极连接线的连接失效，则将第N条栅极线和对应的第N条栅极连接线确定为目标栅极线和目标栅极连接线。从至少一条栅极修补线12中确定一条目标栅极修补线，并将与目标栅极修补线连接的第一连接修补线、第二连接修补线确定为目标第一连接修补线、目标第二连接修补线。如确定了目标栅极修补线后，与目标栅极修补线连接的目标第一连接修补线位于显示面板的左边，与目标栅极修补线连接的目标第二连接修补线位于显示面板的右边。需要注意的是，该处的目标第一连接修补线和目标第二连接修补线与同一条目标栅极修补线上连接。
若确定了目标栅极修补线后，目标第一连接修补线位于显示面板的左边，则目标第一连接修补线上与目标栅极线相对应的第二连接修补点位于显示面板的左边，如图10中的点5。目标第二连接修补线位于显示面板的右边，则目标第二连接修补线上与目标栅极线相对应的第三连接修补点位于显示面板的右边，如图10中的点6。目标栅极修补线上与目标栅极连接线相对应的第一连接修补点为图10中的点7。如图11所示，使用镭射使熔接合（Laser welding）制程，熔融点5、点6和点7（点7在图11中未示出）。其中，熔融点7，使得目标栅极连接线与目标栅极修补线电性连接，熔融点5和点6，使得与目标栅极修补线连接的目标第一连接修补线、目标第二连接修补线与目标栅极线电性连接。
需要注意的是，图10中所示的显示面板为双驱，熔融点5、点6和点7实现修补目标栅极线与目标栅极连接线，使得目标栅极连接线通过目标栅极修补线、目标第一连接修补线、目标第二连接修补线与目标栅极线电性连接，目标栅极连接线接收的栅极驱动信号，通过目标栅极修补线、目标第一连接修补线、目标第二连接修补线传输至目标栅极线。
需要注意的是，步骤201至步骤206中与步骤101至步骤106中相同的步骤，请参看步骤101至步骤106中的详细描述，在此不再赘述。
上述显示面板的制作方法，可修补连接失效的目标栅极线和对应的目标栅极连接线，使得连接失效的目标栅极线继续位置有效状态，解决了显示面板中栅极线与栅极连接线的接触不良/连接失效的问题，提高显示面板的产品良率。
在上述实施例中，对各个实施例的描述都各有侧重，某个实施例中没有详述的部分，可以参见其他实施例的相关描述。
以上对本申请实施例所提供的一种显示面板和显示面板的制作方法进行了详细介绍，本文中应用了具体个例对本申请的原理及实施方式进行了阐述，以上实施例的说明只是用于帮助理解本申请的技术方案及其核心思想；本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本申请各实施例的技术方案的范围。

Claims (20)

  1. 一种显示面板，包括：
    显示区和位于所述显示区一侧的非显示区；
    所述显示区包括：横向延伸的多条栅极线和至少一条栅极修补线、纵向延伸至所述非显示区的多条栅极连接线、以及纵向延伸的至少一条第一连接修补线；
    所述至少一条栅极修补线与至少一条第一连接修补线一一对应连接，每条栅极修补线上设有与所述多条栅极连接线一一对应的多个第一连接修补点，每条第一连接修补线上设有与所述多条栅极线一一对应的多个第二连接修补点。
  2. 根据权利要求1所述的显示面板，其中，所述多条栅极线和所述至少一条栅极修补线同层设置，所述多条栅极连接线与所述至少一条第一连接修补线同层设置。
  3. 根据权利要求1所述的显示面板，其中，所述多条栅极连接线在所述栅极修补线所属层上的正投影与所述栅极修补线中的每条栅极修补线相交，且相交的位置设为第一连接修补点。
  4. 根据权利要求1所述的显示面板，其中，所述至少一条第一连接修补线在所述多条栅极线所属层中的正投影与所述多条栅极线相交，且相交的位置设为第二连接修补点。
  5. 根据权利要求1所述的显示面板，其中，所述至少一条栅极修补线设置于所述多条栅极线靠近所述非显示区的一侧。
  6. 根据权利要求1所述的显示面板，其中，所述至少一条第一连接修补线设置于所述多条栅极连接线的至少一侧。
  7. 根据权利要求1所述的显示面板，其中，所述显示区还包括纵向延伸的至少一条第二连接修补线；所述至少一条第一连接修补线和所述至少一条第二连接修补线设于所述多条栅极连接线的相对两侧；
    所述至少一条栅极修补线与所述至少一条第二连接修补线一一对应连接，每条第二连接修补线上设有与所述多条栅极线一一对应的多个第三连接修补点。
  8. 根据权利要求7所述的显示面板，其中，所述至少一条第二连接修补线在所述多条栅极线所属层中的正投影与所述多条栅极线相交，且相交的位置设为第三连接修补点。
  9. 根据权利要求7所述的显示面板，其中，所述至少一条栅极修补线与所述至少一条第一连接修补线通过第一过孔一一对应连接，所述至少一条栅极修补线与所述至少一条第二连接修补线通过第二过孔一一对应连接。
  10. 一种显示面板的制作方法，其中，所述显示面板包括显示区和位于所述显示区一侧的非显示区；所述显示面板的制作方法包括：
    在所述显示区上形成横向延伸的多条栅极线和至少一条栅极修补线，纵向延伸至所述非显示区的多条栅极连接线，以及纵向延伸的至少一条第一连接修补线；
    所述至少一条栅极修补线与至少一条第一连接修补线一一对应连接，每条栅极修补线上形成有与所述多条栅极连接线一一对应的多个第一连接修补点，每条第一连接修补线上形成有与所述多条栅极线一一对应的多个第二连接修补点；
    在点灯测试时，若检测到多条栅极线中的目标栅极线与对应的目标栅极连接线的连接失效，则从至少一条栅极修补线中确定目标栅极修补线，并将与所述目标栅极修补线连接的第一连接修补线确定为目标第一连接修补线，熔融所述目标栅极修补线上与目标栅极连接线相对应的第一连接修补点和所述目标第一连接修补线上与所述目标栅极线相对应的第二连接修补点，使得所述目标栅极连接线通过所述目标栅极修补线、所述目标第一连接修补线与所述目标栅极线电性连接。
  11. 根据权利要求10所述的显示面板的制作方法，其中，还包括：
    在所述显示区上形成纵向延伸的至少一条第二连接修补线；
    所述至少一条第一连接修补线和所述至少一条第二连接修补线设于所述多条栅极连接线的相对两侧；所述至少一条栅极修补线与所述至少一条第二连接修补线一一对应连接，每条第二连接修补线上设有与所述多条栅极线一一对应的多个第三连接修补点；
    在检测到多条栅极线的目标栅极线与对应的目标栅极连接线的连接失效后，还包括：将与所述目标栅极修补线连接的第二连接修补线确定为目标第二连接修补线，熔融目标第二连接修补线上与目标栅极线相对应的第三连接修补点，使得目标栅极连接线通过目标栅极修补线、目标第一连接修补线、目标第二连接修补线与目标栅极线电性连接。
  12. 根据权利要求10所述的显示面板的制作方法，其中，所述多条栅极线和所述至少一条栅极修补线同层设置，所述多条栅极连接线与所述至少一条第一连接修补线同层设置。
  13. 一种显示面板，包括：
    显示区和位于所述显示区一侧的非显示区；
    所述显示区包括：横向延伸的多条栅极线和至少一条栅极修补线、纵向延伸至所述非显示区的多条栅极连接线、以及纵向延伸的至少一条第一连接修补线；
    所述至少一条栅极修补线与至少一条第一连接修补线一一对应连接，每条栅极修补线上设有与所述多条栅极连接线一一对应的多个第一连接修补点，每条第一连接修补线上设有与所述多条栅极线一一对应的多个第二连接修补点；
    所述至少一条栅极修补线与所述至少一条第一连接修补线通过第一过孔一一对应连接。
  14. 根据权利要求13所述的显示面板，其中，所述多条栅极线和所述至少一条栅极修补线同层设置，所述多条栅极连接线与所述至少一条第一连接修补线同层设置。
  15. 根据权利要求13所述的显示面板，其中，所述多条栅极连接线在所述栅极修补线所属层上的正投影与所述栅极修补线中的每条栅极修补线相交，且相交的位置设为第一连接修补点。
  16. 根据权利要求13所述的显示面板，其中，所述至少一条第一连接修补线在所述多条栅极线所属层中的正投影与所述多条栅极线相交，且相交的位置设为第二连接修补点。
  17. 根据权利要求13所述的显示面板，其中，所述至少一条栅极修补线设置于所述多条栅极线靠近所述非显示区的一侧。
  18. 根据权利要求13所述的显示面板，其中，所述至少一条第一连接修补线设置于所述多条栅极连接线的至少一侧。
  19. 根据权利要求13所述的显示面板，其中，所述显示区还包括纵向延伸的至少一条第二连接修补线；所述至少一条第一连接修补线和所述至少一条第二连接修补线设于所述多条栅极连接线的相对两侧；
    所述至少一条栅极修补线与所述至少一条第二连接修补线一一对应连接，每条第二连接修补线上设有与所述多条栅极线一一对应的多个第三连接修补点。
  20. 根据权利要求19所述的显示面板，其中，所述至少一条第二连接修补线在所述多条栅极线所属层中的正投影与所述多条栅极线相交，且相交的位置设为第三连接修补点。
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