WO2022047916A1 - 显示装置及其制备方法 - Google Patents

显示装置及其制备方法 Download PDF

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Publication number
WO2022047916A1
WO2022047916A1 PCT/CN2020/122763 CN2020122763W WO2022047916A1 WO 2022047916 A1 WO2022047916 A1 WO 2022047916A1 CN 2020122763 W CN2020122763 W CN 2020122763W WO 2022047916 A1 WO2022047916 A1 WO 2022047916A1
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WO
WIPO (PCT)
Prior art keywords
layer
display device
disposed
substrate
electrode
Prior art date
Application number
PCT/CN2020/122763
Other languages
English (en)
French (fr)
Inventor
查宝
江淼
姚江波
陈黎暄
张鑫
Original Assignee
深圳市华星光电半导体显示技术有限公司
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Application filed by 深圳市华星光电半导体显示技术有限公司 filed Critical 深圳市华星光电半导体显示技术有限公司
Priority to US17/056,033 priority Critical patent/US11693280B2/en
Publication of WO2022047916A1 publication Critical patent/WO2022047916A1/zh

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Classifications

    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/133345—Insulating layers
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1339—Gaskets; Spacers; Sealing of cells
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136209—Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0412—Digitisers structurally integrated in a display
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0416—Control or interface arrangements specially adapted for digitisers
    • G06F3/0418—Control or interface arrangements specially adapted for digitisers for error correction or compensation, e.g. based on parallax, calibration or alignment
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/042—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by opto-electronic means
    • G06F3/0421—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by opto-electronic means by interrupting or reflecting a light beam, e.g. optical touch-screen
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/044—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/40—OLEDs integrated with touch screens
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/60—OLEDs integrated with inorganic light-sensitive elements, e.g. with inorganic solar cells or inorganic photodiodes
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/13338—Input devices, e.g. touch panels
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133509—Filters, e.g. light shielding masks
    • G02F1/133514—Colour filters
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/58—Arrangements comprising a monitoring photodetector
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2202/00—Materials and properties
    • G02F2202/10—Materials and properties semiconductor
    • G02F2202/103—Materials and properties semiconductor a-Si
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2202/00—Materials and properties
    • G02F2202/28—Adhesive materials or arrangements
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2203/00—Indexing scheme relating to G06F3/00 - G06F3/048
    • G06F2203/041—Indexing scheme relating to G06F3/041 - G06F3/045
    • G06F2203/04103—Manufacturing, i.e. details related to manufacturing processes specially suited for touch sensitive devices
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2203/00—Indexing scheme relating to G06F3/00 - G06F3/048
    • G06F2203/041—Indexing scheme relating to G06F3/041 - G06F3/045
    • G06F2203/04106—Multi-sensing digitiser, i.e. digitiser using at least two different sensing technologies simultaneously or alternatively, e.g. for detecting pen and finger, for saving power or for improving position detection

Definitions

  • the present application relates to the field of display technology, and in particular, to a display device and a preparation method thereof.
  • the present application provides a display device and a preparation method thereof, so as to solve the problem of signal crosstalk in the display device in the prior art and improve the reliability of the display device.
  • the present application provides a display device, comprising:
  • the touch sensor includes a transmitting electrode and a receiving electrode, the spacer layer is disposed between the photosensitive sensor and the receiving electrode, and the receiving electrode is disposed on the side of the spacer layer away from the photosensitive sensor ;as well as
  • the first array structure layer further includes a gate insulating layer, the gate is disposed on the first substrate, and the gate insulating layer covers the gate, so The emitter electrode and the semiconductor portion are arranged in the same layer and located on the gate insulating layer, the emitter electrode and the semiconductor portion are insulated from each other, the semiconductor portion and the gate are arranged in a one-to-one correspondence, and the The source electrode and the drain electrode are disposed on both sides of the semiconductor portion, and are electrically connected to the semiconductor portion.
  • the first array structure layer further includes a gate insulating layer, the emitter electrode and the gate electrode are arranged in the same layer and are located on the first substrate, and the gate electrode An insulating layer covers the emitter electrode and the gate, the semiconductor portion is arranged on the gate insulating layer, the semiconductor portion is arranged in a one-to-one correspondence with the gate, the source electrode and the drain electrode It is provided on both sides of the semiconductor portion, and is electrically connected to the semiconductor portion.
  • the spacer layer includes a first spacer layer, and the first spacer layer is disposed between the photosensitive sensor and the receiving electrode.
  • the spacer layer includes a second spacer layer, the second spacer layer is disposed on the first spacer layer, and the receiving electrode is disposed on the second spacer layered.
  • the dielectric constant of the first spacer layer and the dielectric constant of the second spacer layer are 1.3-5.
  • the thickness of the first spacer layer is 1000 nm-5000 nm
  • the thickness of the second spacer layer is 1000 nm-5000 nm.
  • the display device further includes a first passivation layer, and the first passivation layer is disposed between the photosensitive sensor and the first spacer layer.
  • the display device further includes a second passivation layer, and the second passivation layer is disposed between the second spacer layer and the receiving electrode.
  • the display device further includes a light shielding layer, and the light shielding layer is disposed on the first spacer layer and above the semiconductor portion.
  • the display device further includes a display structure and an adhesive layer, and the display structure is adhered to the first substrate through the adhesive layer.
  • the display structure further includes a third substrate and a second array layer, the third substrate is located on a side away from the adhesive layer, and the second array layer is disposed on the on the third substrate.
  • the display structure further includes a black matrix layer, the black matrix layer includes a first black matrix part and a second black matrix part, and the first black matrix part array is arranged on the On the second array structure layer, the second black matrix portion is disposed on both sides of the first black matrix portion.
  • the display structure further includes a first conductive layer, and the first conductive layer covers the second array structure layer and the first black matrix portion.
  • the display structure further includes a liquid crystal layer, and the liquid crystal layer is disposed on the first conductive layer and in the second black matrix portion.
  • the display structure further includes a second conductive layer, and the second conductive layer covers the liquid crystal layer.
  • the display structure further includes a color filter layer, and the color filter layer is disposed on the second conductive layer.
  • the display structure further includes a fourth substrate, the fourth substrate is disposed on the second black matrix portion and the color filter layer, and the fourth substrate passes through the The adhesive layer is adhered to the first substrate.
  • the present application also provides a method for preparing a display device, comprising:
  • a first array structure layer is disposed on the first substrate, wherein the first array structure layer includes a photosensitive sensor, a touch sensor and a spacer layer, and the photosensitive sensor includes a gate electrode, a semiconductor portion, a source electrode and a drain electrode , the touch sensor includes a transmitting electrode and a receiving electrode, the spacer layer is disposed between the photosensitive sensor and the receiving electrode, and the receiving electrode is disposed on the side of the spacer layer away from the photosensitive sensor; as well as
  • a second substrate is disposed on the first array structure layer.
  • the method further includes:
  • the display structure is adhered to the first substrate through an adhesive layer.
  • the present application provides a display device and a manufacturing method thereof.
  • the display device includes a first substrate, a first array structure layer disposed on the first substrate, and a second substrate disposed on the first array structure layer , wherein the first array structure layer includes a photosensitive sensor, a touch sensor and a spacer layer, the photosensitive sensor includes a gate electrode, a semiconductor portion, a source electrode and a drain electrode, and the touch sensor includes an emission electrode and a reception electrode,
  • the spacer layer is disposed between the photosensitive sensor and the receiving electrode, and the receiving electrode is disposed on a side of the spacer layer away from the photosensitive sensor.
  • the layer parasitic capacitance between the photosensitive sensor and the touch sensor is reduced, thereby reducing the signal crosstalk between the photosensitive sensor and the touch sensor, thereby improving the display device. reliability.
  • FIG. 1 is a cross-sectional view of a first structure of a display device provided by the present application.
  • FIG. 2 is a cross-sectional view of a second structure of the display device provided by the present application.
  • FIG. 3 is a flowchart of a method for manufacturing a display device provided by the present application.
  • FIG. 1 is a cross-sectional view of a first structure of a display device provided by the present application.
  • the present application provides a display device 10 .
  • the display device 10 includes a first substrate 100 , a first array structure layer 200 and a second substrate 300 .
  • the first array structure layer 200 is disposed on the first substrate 100 .
  • the first array structure layer 200 includes a photosensitive sensor 210 , a touch sensor 220 and a spacer layer 230 .
  • the photosensitive sensor 210 includes a gate insulating layer 211 , a gate electrode 212 , a semiconductor portion 213 , a source electrode 214 and a drain electrode 215 .
  • the touch sensor 220 includes a transmitting electrode 221 and a receiving electrode 222 .
  • the spacer layer 230 is disposed between the photosensitive sensor 210 and the receiving electrode 222 .
  • the receiving electrode 222 is disposed on a side of the spacer layer 230 away from the photosensitive sensor 210 .
  • the gate electrode 212 is disposed on the first substrate 100 .
  • the gate insulating layer 211 covers the gate 212 .
  • the emitter electrode 221 and the semiconductor portion 213 are disposed in the same layer and located on the gate insulating layer 211 .
  • the semiconductor portion 213 is amorphous silicon.
  • the emitter electrode 221 and the semiconductor portion 213 are insulated from each other.
  • the semiconductor portions 213 are provided in a one-to-one correspondence with the gate electrodes 212 .
  • the source electrode 214 and the drain electrode 215 are disposed on both sides of the semiconductor portion 213 and are electrically connected to the semiconductor portion 213 .
  • the circuit structure of the photosensitive sensor 210 may be 2T1C, 3T1C, 4T1C or 5T1C.
  • the circuit structure of the photosensitive sensor 210 is a photosensitive sensor of 2T1C, 2T includes a switching thin film transistor and an infrared thin film transistor, 1C for a capacitor.
  • the emitter electrode is disposed on the gate insulating layer, which increases the mutual capacitance of the touch sensor, thereby improving the sensitivity of the touch sensor.
  • the display device 10 further includes a first passivation layer 400 .
  • the first passivation layer 400 covers the gate insulating layer 211 , the emitter electrode 221 , the semiconductor portion 213 , the source electrode 214 and the drain electrode 215 .
  • the spacer layer 230 includes a first spacer layer 231 .
  • the first spacer layer 231 is disposed between the photosensitive sensor 210 and the receiving electrode 222 .
  • the first spacer layer 231 covers the first passivation layer 400 .
  • the first spacer layer 231 includes through holes 2311 .
  • the through hole 2311 penetrates through the first passivation layer 400 and the first spacer layer 231 to expose the drain electrode 215 .
  • the thickness of the first spacer layer 321 is 1000 nm to 5000 nm.
  • the thickness of the first spacer layer 231 is 1200 nanometers, 2000 nanometers, 2500 nanometers, 3200 nanometers, or 4500 nanometers.
  • the dielectric constant of the material of the first spacer layer 231 is 1.3-5. Specifically, the dielectric constant of the material of the first spacer layer 231 may be 1.4, 2.1, 3, or 4.5.
  • the material of the first spacer layer 231 may be soluble polytetrafluoroethylene.
  • the display device 10 further includes a common electrode layer 500 .
  • the common electrode layer 500 is disposed in the through hole 2311 and on the first spacer layer 231 .
  • the common electrode layer 500 is electrically connected to the drain electrode 215 through the through hole 2311, so that the drain electrode can be connected externally.
  • the material of the common electrode layer 500 is indium tin oxide.
  • the display device 10 further includes a light shielding layer 600 .
  • the light shielding layer 600 is disposed on the first spacer layer 231 and on the semiconductor portion 213 .
  • the spacer layer 230 may further include a second spacer layer 232 .
  • the second spacer layer 232 covers the first spacer layer 231 , the common electrode layer 500 and the light shielding layer 600 .
  • the dielectric constant of the material of the second spacer layer 232 is 1.3-5. Specifically, the dielectric constant of the material of the second spacer layer 232 may be 1.6, 2.5, 3 or 4.8.
  • the thickness of the second spacer layer 232 is 1000 nm to 5000 nm. Specifically, the thickness of the second spacer layer 232 is 1200 nanometers, 2000 nanometers, 2500 nanometers, 3200 nanometers, or 4500 nanometers.
  • the material of the second spacer layer 232 may be OCA optical glue.
  • the display device 10 further includes a second passivation layer 700 .
  • the second passivation layer 700 is disposed between the second spacer layer 232 and the receiving electrode 222 . Specifically, the second passivation layer 700 covers the second spacer layer 232 .
  • the receiving electrode 222 is disposed on the second passivation layer 700 .
  • the second substrate 300 is disposed to cover the receiving electrode 222 and the second passivation layer 700 .
  • the display device 10 further includes a display structure 800 and an adhesive layer 900 .
  • the display structure 900 is adhered to the first substrate 100 through the adhesive layer 900 .
  • the material of the adhesive layer 900 is OCA optical glue.
  • the display structure 900 includes a third substrate 910, a second array structure layer 920, a black matrix layer 930, a first conductive layer 940, a liquid crystal layer 950, a second conductive layer 960, a color filter layer 970 and a fourth substrate 980.
  • the second array structure layer 920 is disposed on the third substrate 910 .
  • the black matrix layer 930 includes a first black matrix part 931 and a second black matrix part 932 .
  • the first black matrix parts 931 are arranged in an array on the first array structure layer 920 .
  • the second black matrix portion 932 is disposed on both sides of the first black matrix portion 931 .
  • the first conductive layer 940 covers the second array structure layer 920 and the first black matrix portion 931 .
  • the liquid crystal layer 950 is disposed on the first conductive layer 940 and in the second black matrix portion 932 .
  • the second conductive layer 960 covers the liquid crystal layer 950 .
  • the color filter layer 970 is disposed on the second conductive layer 960 .
  • the fourth substrate 980 is disposed on the second black matrix portion 932 and the color filter layer 970 .
  • the fourth substrate 980 is adhered to the first substrate 100 through the adhesive layer 900 .
  • the display device provided in the present application may be a liquid crystal display device or an organic light emitting diode display device or the like.
  • the gap between the grid of the photosensitive sensor and the receiving electrode of the touch sensor is reduced.
  • the parasitic capacitance of the sensor reduces the signal crosstalk between the gate of the photosensitive sensor and the receiving electrode of the touch sensor, so that the photosensitive sensor and the touch sensor work at the same time, that is, the functions of short-range touch and remote control can be realized, which improves the Reliability of the display device;
  • the spacer layer is formed of a material with low dielectric constant and is arranged between the receiving electrode and the gate, further reducing the parasitic capacitance between the receiving electrode and the gate, which will further improve the reliability of the display device .
  • FIG. 2 is a cross-sectional view of a second structure of the display device provided by the present application. It should be noted that the difference between FIG. 2 and FIG. 1 is that the emitter electrode 221 and the gate electrode 212 are disposed in the same layer and located on the first substrate 100 .
  • the gate insulating layer 211 covers the emitter electrode 221 and the gate electrode 212 .
  • Other structures are shown in FIG. 1 and will not be repeated here.
  • FIG. 3 is a flowchart of a method for manufacturing a display device provided by the present application.
  • the present application also provides a preparation method of the display device 10, and the preparation method includes:
  • a first array structure layer 200 Disposing a first array structure layer 200 on the first substrate 100, wherein the first array structure layer 200 includes a photosensitive sensor 210, a touch sensor 220 and a spacer layer 230, and the photosensitive sensor 210 includes a gate 212 , a semiconductor part 213 , a source electrode 214 and a drain electrode 215 , the touch sensor 220 includes an emission electrode 221 and a reception electrode 222 , and the spacer layer 230 is arranged between the photosensitive sensor 210 and the reception electrode 222 , The receiving electrode 222 is disposed on a side of the spacer layer 230 away from the photosensitive sensor 210 .
  • a gate electrode material is provided on the first substrate 100 , and the gate electrode 212 is formed by exposure and etching.
  • the gate 212 material includes one or a combination of Al, Cu and Mo.
  • the gate 212 may be a single layer or a multi-layer.
  • a gate insulating layer 211 is formed on the first substrate 100 and the gate electrode 212 .
  • the material of the semiconductor portion 213 is provided on the gate insulating layer 211 , and the semiconductor portion 213 is formed by exposure and etching.
  • the material of the semiconductor portion 213 is amorphous silicon.
  • a metal layer is deposited on the gate insulating layer 211 and the semiconductor portion 213 , and the emitter electrode 221 , the source electrode 214 and the drain electrode 215 are formed by exposure and etching.
  • the emitter electrode 221 is disposed on the gate insulating layer 211 .
  • the source electrode 214 and the drain electrode 215 are disposed on both sides of the semiconductor portion 213 and are electrically connected to the semiconductor portion 213 .
  • the metal layer material includes one or several combinations of Al, Cu and Mo.
  • a metal layer is provided on the first substrate 100 , and the receiving electrode 222 and the gate electrode 212 are formed by exposure and etching.
  • a gate insulating layer 211 is formed on the first substrate 100 , the gate electrode 212 and the receiving electrode 222 .
  • the semiconductor portion 213 is formed on the gate insulating layer 211 .
  • a first passivation layer 400 is formed on the gate insulating layer 211 , the emitter electrode 221 , the semiconductor portion 213 , the source electrode 214 and the drain electrode 215 .
  • the first spacer layer 231 includes through holes 2311 .
  • the through hole 2311 penetrates through the first passivation layer 400 and the first spacer layer 231 to expose the drain electrode 215 .
  • the thickness of the first spacer layer 321 is 1000 nm to 5000 nm. Specifically, the thickness of the first spacer layer 231 is 1200 nanometers, 2000 nanometers, 2500 nanometers, 3200 nanometers, or 4500 nanometers.
  • the dielectric constant of the material of the first spacer layer 231 is 1.3-5. Specifically, the dielectric constant of the material of the first spacer layer 231 may be 1.4, 2.1, 3, or 4.5.
  • the material of the first spacer layer 231 may be soluble polytetrafluoroethylene.
  • the material of the common electrode layer 500 is disposed in the through hole 2311 and on the first spacer layer 231 , and the common electrode layer 500 is formed by exposure and etching.
  • the common electrode layer 500 is electrically connected to the drain electrode 215 through the through hole 2311, so that the drain electrode can be connected externally.
  • the material of the common electrode layer 500 is indium tin oxide.
  • a light shielding layer 600 is provided on the first spacer layer 231 .
  • the light shielding layer 600 is disposed on the semiconductor portion 213 .
  • the material of the second spacer layer 232 is provided on the first spacer layer 231 , the common electrode layer 500 and the light shielding layer 600 , and the second spacer layer 232 is formed by exposure and etching.
  • the dielectric constant of the material of the second spacer layer 232 is 1.3-5. Specifically, the dielectric constant of the material of the second spacer layer 232 may be 1.6, 2.5, 3 or 4.8.
  • the thickness of the second spacer layer 232 is 1000 nm to 5000 nm. Specifically, the thickness of the second spacer layer 232 is 1200 nanometers, 2000 nanometers, 2500 nanometers, 3200 nanometers, or 4500 nanometers.
  • the material of the second spacer layer 232 may be OCA optical glue.
  • the receiving electrode material is disposed on the second substrate 300, and the receiving electrode 222 is formed by exposure and etching.
  • a second passivation layer 700 is formed on the second substrate 300 and the receiving electrode 222 .
  • the second passivation layer 700 is adhered to the second spacer layer 232 .
  • the method further includes:
  • the display structure 800 is adhered to the first substrate 100 through the adhesive layer 900 .
  • the material of the adhesive layer 900 is OCA optical glue.
  • the display structure 900 includes a third substrate 910, a second array structure layer 920, a black matrix layer 930, a first conductive layer 940, a liquid crystal layer 950, a second conductive layer 960, a color filter layer 970 and a fourth substrate 980.
  • the second array structure layer 920 is disposed on the third substrate 910 .
  • the black matrix layer 930 includes a first black matrix part 931 and a second black matrix part 932 .
  • the first black matrix parts 931 are arranged in an array on the first array structure layer 920 .
  • the second black matrix portion 932 is disposed on both sides of the first black matrix portion 931 .
  • the first conductive layer 940 covers the first array structure layer 920 and the first black matrix portion 931 .
  • the liquid crystal layer 950 is disposed on the first conductive layer 940 and in the second black matrix portion 932 .
  • the second conductive layer 960 covers the liquid crystal layer 950 .
  • the color filter layer 970 is disposed on the second conductive layer 960 .
  • the fourth substrate 980 is disposed on the second black matrix portion 932 and the color filter layer 970 .
  • the fourth substrate 980 is adhered to the first substrate 100 through the adhesive layer 900 .
  • the emitter electrode can be formed with the gate or the source and the drain with only one mask, and only 6 masks are required.
  • the mask process can simultaneously integrate the display device with the photosensitive sensor and the touch sensor, and can realize short-range touch and remote light control functions, which is beneficial to improve the composite function of the display device and reduce the production cost.
  • the present application provides a display device and a manufacturing method thereof.
  • the display device includes a first substrate, a first array structure layer disposed on the first substrate, and a second substrate disposed on the first array structure layer , wherein the first array structure layer includes a photosensitive sensor, a touch sensor and a spacer layer, the photosensitive sensor includes a gate electrode, a semiconductor portion, a source electrode and a drain electrode, and the touch sensor includes an emission electrode and a reception electrode,
  • the spacer layer is disposed between the photosensitive sensor and the receiving electrode, and the receiving electrode is disposed on a side of the spacer layer away from the photosensitive sensor.
  • the layer parasitic capacitance between the photosensitive sensor and the touch sensor is reduced, thereby reducing the signal crosstalk between the photosensitive sensor and the touch sensor, thereby improving the display device. reliability.

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Abstract

一种显示装置（10）及其制备方法，包括第一基板（100）、设置于第一基板（100）上的第一阵列结构层（200）以及设置于第一阵列结构层（200）上的第二基板（300），第一阵列结构层（200）包括感光传感器（210）、触控传感器（220）和间隔层（230），触控传感器（220）包括接收电极（222），间隔层（230）设置于感光传感器（210）与接收电极（222）之间，接收电极（222）设置于间隔层（230）远离感光传感器（210）的一侧。

Description

显示装置及其制备方法 技术领域
本申请涉及显示技术领域，具体涉及一种有显示装置及其制备方法。
 背景技术
目前，将各种传感器集成在显示面板中是一个待发展的主流趋势，特别是触控传感器和感光传感器。但是，将触控传感器与感光传感器集成在显示面板中，感光传感器与触控传感器之间存在寄生电容，进而造成感光传感器与触控传感器的信号串扰。
 技术问题
本申请提供一种显示装置及其制备方法，以解决现有技术中显示装置中存在信号串扰的问题，提高显示装置的可靠性。
 技术解决方案
本申请提供一种显示装置，包括：
第一基板；
设置于所述第一基板上的第一阵列结构层，其中，所述第一阵列结构层包括感光传感器、触控传感器和间隔层，所述感光传感器包括栅极、半导体部、源极和漏极，所述触控传感器包括发射电极和接收电极，所述间隔层设置于所述感光传感器与所述接收电极之间，所述接收电极设置于所述间隔层远离所述感光传感器的一侧；以及
设置于所述第一阵列结构层上的第二基板。
在本申请所提供对显示装置中，所述第一阵列结构层还包括栅极绝缘层，所述栅极设置于所述第一基板上，所述栅极绝缘层覆盖所述栅极，所述发射电极以及所述半导体部同层设置，并位于所述栅极绝缘层上，所述发射电极与所述半导体部相互绝缘，所述半导体部与所述栅极一一对应设置，所述源极和所述漏极设置于所述半导体部的两侧、并与所述半导体部电连接。
在本申请所提供对显示装置中，所述第一阵列结构层还包括栅极绝缘层，所述发射电极和所述栅极同层设置，并位于所述第一基板上，所述栅极绝缘层覆盖所述发射电极以及所述栅极，所述半导体部设置于所述栅极绝缘层上，所述半导体部与所述栅极一一对应设置，所述源极和所述漏极设置于所述半导体部的两侧、并与所述半导体部电连接。
在本申请所提供对显示装置中，所述间隔层包括第一间隔分层，所述第一间隔分层设置于所述感光传感器与所述接收电极之间。
在本申请所提供对显示装置中，所述间隔层包括第二间隔分层，所述第二间隔分层设置于所述第一间隔分层上，所述接收电极设置于所述第二间隔分层上。
在本申请所提供对显示装置中，所述第一间隔分层的介电常数和所述第二间隔分层的介电常数为1.3-5。
在本申请所提供对显示装置中，所述第一间隔分层的厚度为1000纳米-5000纳米，所述第二间隔分层的厚度为1000纳米-5000纳米。
在本申请所提供对显示装置中，所述显示装置还包括第一钝化层，所述第一钝化层设置于所述感光传感器与所述第一间隔分层之间。
在本申请所提供对显示装置中，所述显示装置还包括第二钝化层，所述第二钝化层设置于所述第二间隔分层与所述接收电极之间。
在本申请所提供对显示装置中，所述显示装置还包括遮光层，所述遮光层设置于所述第一间隔分层上，并设置于所述半导体部之上。
在本申请所提供对显示装置中，所述显示装置还包括显示结构和粘合层，所述显示结构通过所述粘合层与所述第一基板粘合。
在本申请所提供对显示装置中，所述显示结构还包括第三基板和第二阵列层，所述第三基板位于远离所述粘合层的一侧，所述第二阵列层设置于所述第三基板上。
在本申请所提供对显示装置中，所述显示结构还包括黑色矩阵层，所述黑色矩阵层包括第一黑色矩阵部和第二黑色矩阵部，所述第一黑色矩阵部阵列设置于所述第二阵列结构层上，所述第二黑色矩阵部设置于所述第一黑色矩阵部的两侧。
在本申请所提供对显示装置中，所述显示结构还包括第一导电层，所述第一导电层覆盖所述第二阵列结构层以及所述第一黑色矩阵部。
在本申请所提供对显示装置中，所述显示结构还包括液晶层，所述液晶层设置于所述第一导电层上以及所述第二黑色矩阵部中。
在本申请所提供对显示装置中，所述显示结构还包括第二导电层，所述第二导电层覆盖所述液晶层。
在本申请所提供对显示装置中，所述显示结构还包括彩膜层，所述彩膜层设置于所述第二导电层上。
在本申请所提供对显示装置中，所述显示结构还包括第四基板，所述第四基板设置于所述第二黑色矩阵部以及所述彩膜层上，所述第四基板通过所述粘合层与所述第一基板粘合。
本申请还提供一种显示装置的制备方法，包括：
提供一第一基板；
在所述第一基板上设置第一阵列结构层，其中，所述第一阵列结构层包括感光传感器、触控传感器和间隔层，所述感光传感器包括栅极、半导体部、源极和漏极，所述触控传感器包括发射电极和接收电极，所述间隔层设置于所述感光传感器与所述接收电极之间，所述接收电极设置于所述间隔层远离所述感光传感器的一侧；以及
在所述第一阵列结构层上设置第二基板。
在本申请所提供的显示装置的制备方法中，所述在所述第一阵列结构层上设置第二基板的步骤之后，还包括：
将显示结构通过粘合层粘合至所述第一基板。
 有益效果
本申请提供一种显示装置及其制备方法，所述显示装置包括第一基板、设置于所述第一基板上的第一阵列结构层以及设置于所述第一阵列结构层上的第二基板，其中，所述第一阵列结构层包括感光传感器、触控传感器和间隔层，所述感光传感器包括栅极、半导体部、源极和漏极，所述触控传感器包括发射电极和接收电极，所述间隔层设置于所述感光传感器与所述接收电极之间，所述接收电极设置于所述间隔层远离所述感光传感器的一侧。通过将栅极以及接收电极设置于间隔层的两侧，减小了感光传感器与触控传感器之间层寄生电容，进而减小感光传感器与触控传感器之间的信号串扰，进而提高了显示装置的可靠性。
 附图说明
为了更清楚地说明本申请中的技术方案，下面将对实施方式描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施方式，对于本领域技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本申请提供的显示装置的第一种结构剖视图。
图2为本申请提供的显示装置的第二种结构剖视图。
图3为本申请提供的显示装置的制备方法的流程图。
 本发明的实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
请参阅图1，图1为本申请提供的显示装置的第一种结构剖视图。本申请提供一种显示装置10。所述显示装置10包括第一基板100、第一阵列结构层200以及第二基板300。
所述第一阵列结构层200设置于所述第一基板100上。所述第一阵列结构层200包括感光传感器210、触控传感器220和间隔层230。所述感光传感器210包括栅极绝缘层211、栅极212、半导体部213、源极214和漏极215。所述触控传感器220包括发射电极221和接收电极222。所述间隔层230设置于所述感光传感器210与所述接收电极222之间。所述接收电极222设置于所述间隔层230远离所述感光传感器210的一侧。具体的，所述栅极212设置于所述第一基板100上。所述栅极绝缘层211覆盖所述栅极212。所述发射电极221以及所述半导体部213同层设置，并位于所述栅极绝缘层211上。所述半导体部213为非晶硅。所述发射电极221与所述半导体部213相互绝缘。所述半导体部213与所述栅极212一一对应设置。所述源极214和所述漏极215设置于所述半导体部213的两侧，并与所述半导体部213电连接。所述感光传感器210的电路结构可以为2T1C、3T1C、4T1C或5T1C，在本申请中，所述感光传感器210的电路结构为2T1C的感光传感器，2T包括一个开关薄膜晶体管和一个红外薄膜晶体管，1C为一个电容器。
在本申请中，将发射电极设置于栅极绝缘层上，增大了触控传感器的互容电容，进而提高触控传感器的灵敏度。
在一实施例中，所述显示装置10还包括第一钝化层400。所述第一钝化层400覆盖所述栅极绝缘层211、所述发射电极221、所述半导体部213、所述源极214以及所述漏极215。
在一实施例中，所述间隔层230包括第一间隔分层231。所述第一间隔分层231设置于所述感光传感器210与所述接收电极222之间。具体的，所述第一间隔分层231覆盖所述第一钝化层400。所述第一间隔分层231包括通孔2311。所述通孔2311贯穿所述第一钝化层400以及所述第一间隔分层231以暴露所述漏极215。所述第一间隔分层321的厚度为1000纳米-5000纳米。具体的，所述第一间隔分层231的厚度为1200纳米、2000纳米、2500纳米、3200纳米或4500纳米等。所述第一间隔分层231材料的介电常数为1.3-5。具体的，所述第一间隔分层231材料的介电常数可以为1.4、2.1、3或4.5等。
在一实施例中，所述第一间隔分层231材料可以为可溶性聚四氟乙烯。
在一实施例中，所述显示装置10还包括公共电极层500。所述公共电极层500设置于所述通孔2311中以及所述第一间隔分层231上。所述公共电极层500通过所述通孔2311与所述漏极215电连接，便于将漏极外接。所述公共电极层500的材料为铟锡氧化物。
在一实施例中，所述显示装置10还包括遮光层600。所述遮光层600设置于所述第一间隔分层231上，并设置于所述半导体部213之上。
在一实施例中，所述间隔层230还可以包括第二间隔分层232。所述第二间隔分层232覆盖所述第一间隔分层231、所述公共电极层500以及所述遮光层600上。所述第二间隔分层232材料的介电常数为1.3-5。具体的，所述第二间隔分层232材料的介电常数可以为1.6、2.5、3或4.8。所述第二间隔分层232的厚度为1000纳米-5000纳米。具体的，所述第二间隔分层232的厚度为1200纳米、2000纳米、2500纳米、3200纳米或4500纳米等。
在一实施例中，所述第二间隔分层232材料可以为OCA光学胶。
在一实施例中，所述显示装置10还包括第二钝化层700。所述第二钝化层700设置于所述第二间隔分层232与所述接收电极222之间。具体的，所述第二钝化层700覆盖所述第二间隔分层232。所述接收电极222设置于所述第二钝化层700。
所述第二基板300设置于所述覆盖所述接收电极222以及所述第二钝化层700。
在一实施例中，所述显示装置10还包括显示结构800和粘合层900。所述显示结构900通过所述粘合层900与所述第一基板100粘合。所述粘合层900材料为OCA光学胶。具体的，所述显示结构900包括第三基板910、第二阵列结构层920、黑色矩阵层930、第一导电层940、液晶层950、第二导电层960、彩膜层970以及第四基板980。所述第二阵列结构层920设置于所述第三基板910上。所述黑色矩阵层930包括第一黑色矩阵部931和第二黑色矩阵部932。所述第一黑色矩阵部931阵列设置于所述第一阵列结构层920上。所述第二黑色矩阵部932设置于所述第一黑色矩阵部931的两侧。所述第一导电层940覆盖所述第二阵列结构层920以及所述第一黑色矩阵部931。所述液晶层950设置于所述第一导电层940上以及所述第二黑色矩阵部932中。所述第二导电层960覆盖所述液晶层950。所述彩膜层970设置于所述第二导电层960上。所述第四基板980设置于所述第二黑色矩阵部932以及所述彩膜层970上。所述第四基板980通过所述粘合层900与所述第一基板100粘合。
本申请所提供的显示装置可以为液晶显示装置或有机发光二极管显示装置等。
在本申请中，通过将触控传感器的接收电极设置在第二基板上，感光传感器的栅极设置在第一基板上，进而减小了感光传感器的栅极与触控传感器的接收电极之间的寄生电容，减小了感光传感器的栅极对触控传感器的接收电极的信号串扰，进而使得感光传感器和触控传感同时工作，即可以实现短程触控，远程管控的功能，进而提高了显示装置的可靠性；间隔层采用低介电常数的材料形成，设置在接收电极与栅极之间，进一步减小接收电极和栅极之间的寄生电容，将进一步提高了显示装置的可靠性。
请参阅图2，图2为本申请提供的显示装置的第二种结构剖视图。需要说明的是：图2与图1的不同之处为：所述发射电极221和所述栅极212同层设置，并位于所述第一基板100上。所述栅极绝缘层211覆盖所述发射电极221以及所述栅极212。其他结构如图1所示，此处不再赘述。
请参阅图3，图3为本申请提供的显示装置的制备方法的流程图。本申请还提供一种显示装置10的制备方法，所述制备方法包括：
21、提供一第一基板100。
22、在所述第一基板100上设置第一阵列结构层200，其中，所述第一阵列结构层200包括感光传感器210、触控传感器220和间隔层230，所述感光传感器210包括栅极212、半导体部213、源极214和漏极215，所述触控传感器220包括发射电极221和接收电极222，所述间隔层230设置于所述感光传感器210与所述接收电极222之间，所述接收电极222设置于所述间隔层230远离所述感光传感器210的一侧。
具体的，在所述第一基板100上设置栅极材料，曝光蚀刻形成栅极212。所述栅极212材料包括Al、Cu和Mo中的一种或几种组合。所述栅极212可以为单层或多层。在所述第一基板100以及所述栅极212上形成栅极绝缘层211。在所述栅极绝缘层211上设置半导体部213材料，曝光蚀刻形成半导体部213。所述半导体部213材料为非晶硅。在所述栅极绝缘层211以及所述半导体部213上沉积金属层，曝光蚀刻形成发射电极221、源极214和漏极215。所述发射电极221设置于所述栅极绝缘层211上。所述源极214和所述漏极215设置于所述半导体部213的两侧，并与所述半导体部213电连接。所述金属层材料包括Al、Cu和Mo中的一种或几种组合。
在另一实施例中，在所述第一基板100设置金属层，曝光蚀刻形成接收电极222以及栅极212。在所述第一基板100、所述栅极212以及所述接收电极222上形成栅极绝缘层211。在所述栅极绝缘层211上形成半导体部213。
然后，在所述栅极绝缘层211、所述发射电极221、所述半导体部213、所述源极214以及所述漏极215上形成第一钝化层400。
然后，在所述第一钝化层400上设置第一间隔分层231材料，曝光蚀刻形成第一间隔分层231。所述第一间隔分层231包括通孔2311。所述通孔2311贯穿所述第一钝化层400以及所述第一间隔分层231以暴露所述漏极215。所述第一间隔分层321的厚度为1000纳米-5000纳米。具体的，所述第一间隔分层231的厚度为1200纳米、2000纳米、2500纳米、3200纳米或4500纳米等。所述第一间隔分层231材料的介电常数为1.3-5。具体的，所述第一间隔分层231材料的介电常数可以为1.4、2.1、3或4.5等。
在一实施例中，所述第一间隔分层231材料可以为可溶性聚四氟乙烯。
然后，在所述通孔2311中以及所述第一间隔分层231上设置公共电极层500材料，曝光蚀刻形成公共电极层500。所述公共电极层500通过所述通孔2311与所述漏极215电连接，便于将漏极外接。所述公共电极层500的材料为铟锡氧化物。
然后，在所述第一间隔分层231上设置遮光层600。所述遮光层600设置于所述半导体部213之上。
然后，在所述第一间隔分层231、所述公共电极层500以及所述遮光层600上设置第二间隔分层232材料，曝光蚀刻形成第二间隔分层232。所述第二间隔分层232材料的介电常数为1.3-5。具体的，所述第二间隔分层232材料的介电常数可以为1.6、2.5、3或4.8。所述第二间隔分层232的厚度为1000纳米-5000纳米。具体的，所述第二间隔分层232的厚度为1200纳米、2000纳米、2500纳米、3200纳米或4500纳米等。
在一实施例中，所述第二间隔分层232材料可以为OCA光学胶。
23、在所述第一阵列结构层200上设置第二基板300。
在所述第二基板300上设置接收电极材料，曝光蚀刻形成接收电极222。在所述第二基板300以及所述接收电极222上形成第二钝化层700。将所述第二钝化层700与所述第二间隔分层232贴合。
在一实施例中，在所述第一阵列结构层200上设置第二基板300的步骤之后，还包括：
将所述显示结构800通过所述粘合层900粘合至所述第一基板100。所述粘合层900材料为OCA光学胶。具体的，所述显示结构900包括第三基板910、第二阵列结构层920、黑色矩阵层930、第一导电层940、液晶层950、第二导电层960、彩膜层970以及第四基板980。所述第二阵列结构层920设置于所述第三基板910上。所述黑色矩阵层930包括第一黑色矩阵部931和第二黑色矩阵部932。所述第一黑色矩阵部931阵列设置于所述第一阵列结构层920上。所述第二黑色矩阵部932设置于所述第一黑色矩阵部931的两侧。所述第一导电层940覆盖所述第一阵列结构层920以及所述第一黑色矩阵部931。所述液晶层950设置于所述第一导电层940上以及所述第二黑色矩阵部932中。所述第二导电层960覆盖所述液晶层950。所述彩膜层970设置于所述第二导电层960上。所述第四基板980设置于所述第二黑色矩阵部932以及所述彩膜层970。所述第四基板980通过所述粘合层900与所述第一基板100粘合。
在本申请中，通过将接收电极设置在第二基板上，栅极设置在第一基板上，发射电极可以与栅极或者源极以及漏极只需一道掩膜版形成，并且只需6道掩膜工序即可同步集成感光传感器和触控传感器的显示装置，即可实现短程触控，又可实现远程光控的功能，有利于提升显示装置的复合功能，并降低生产成本。
本申请提供一种显示装置及其制备方法，所述显示装置包括第一基板、设置于所述第一基板上的第一阵列结构层以及设置于所述第一阵列结构层上的第二基板，其中，所述第一阵列结构层包括感光传感器、触控传感器和间隔层，所述感光传感器包括栅极、半导体部、源极和漏极，所述触控传感器包括发射电极和接收电极，所述间隔层设置于所述感光传感器与所述接收电极之间，所述接收电极设置于所述间隔层远离所述感光传感器的一侧。通过将栅极以及接收电极设置于间隔层的两侧，减小了感光传感器与触控传感器之间层寄生电容，进而减小感光传感器与触控传感器之间的信号串扰，进而提高了显示装置的可靠性。
以上对本申请实施方式提供了详细介绍，本文中应用了具体个例对本申请的原理及实施方式进行了阐述，以上实施方式的说明只是用于帮助理解本申请。同时，对于本领域的技术人员，依据本申请的思想，在具体实施方式及应用范围上均会有改变之处，综上所述，本说明书内容不应理解为对本申请的限制。

Claims (20)

  1. 一种显示装置，其包括：
    第一基板；
    设置于所述第一基板上的第一阵列结构层，其中，所述第一阵列结构层包括感光传感器、触控传感器和间隔层，所述感光传感器包括栅极、半导体部、源极和漏极，所述触控传感器包括发射电极和接收电极，所述间隔层设置于所述感光传感器与所述接收电极之间，所述接收电极设置于所述间隔层远离所述感光传感器的一侧；以及
    设置于所述第一阵列结构层上的第二基板。
  2. 如权利要求1所述的显示装置，其中，所述第一阵列结构层还包括栅极绝缘层，所述栅极设置于所述第一基板上，所述栅极绝缘层覆盖所述栅极，所述发射电极以及所述半导体部同层设置，并位于所述栅极绝缘层上，所述发射电极与所述半导体部相互绝缘，所述半导体部与所述栅极一一对应设置，所述源极和所述漏极设置于所述半导体部的两侧，并与所述半导体部电连接。
  3. 如权利要求1所述的显示装置，其中，所述第一阵列结构层还包括栅极绝缘层，所述发射电极和所述栅极同层设置，并位于所述第一基板上，所述栅极绝缘层覆盖所述发射电极以及所述栅极，所述半导体部设置于所述栅极绝缘层上，所述半导体部与所述栅极一一对应设置，所述源极和所述漏极设置于所述半导体部的两侧，并与所述半导体部电连接。
  4. 如权利要求1所述的显示装置，其中，所述间隔层包括第一间隔分层，所述第一间隔分层设置于所述感光传感器与所述接收电极之间。
  5. 如权利要求4所述的显示装置，其中，所述间隔层还包括第二间隔分层，所述第二间隔分层设置于所述第一间隔分层上，所述接收电极设置于所述第二间隔分层上。
  6. 如权利要求5所述的显示装置，其中，所述第一间隔分层的介电常数和所述第二间隔分层的介电常数为1.3-5。
  7. 如权利要求5所述的显示装置，其中，所述第一间隔分层的厚度为1000纳米-5000纳米，所述第二间隔分层的厚度为1000纳米-5000纳米。
  8. 如权利要求5所述的显示装置，其中，所述显示装置还包括第一钝化层，所述第一钝化层设置于所述感光传感器与所述第一间隔分层之间。
  9. 如权利要求5所述的显示装置，其中，所述显示装置还包括第二钝化层，所述第二钝化层设置于所述第二间隔分层与所述接收电极之间。
  10. 如权利要求4所述的显示装置，其中，所述显示装置还包括遮光层，所述遮光层设置于所述第一间隔分层上，并设置于所述半导体部之上。
  11. 如权利要求1所述的显示装置，其中，所述显示装置还包括显示结构和粘合层，所述显示结构通过所述粘合层与所述第一基板粘合。
  12. 如权利要求11所述的显示装置，其中，所述显示结构还包括第三基板和第二阵列层，所述第三基板位于远离所述粘合层的一侧，所述第二阵列层设置于所述第三基板上。
  13. 如权利要求12所述的显示装置，其中，所述显示结构还包括黑色矩阵层，所述黑色矩阵层包括第一黑色矩阵部和第二黑色矩阵部，所述第一黑色矩阵部阵列设置于所述第二阵列结构层上，所述第二黑色矩阵部设置于所述第一黑色矩阵部的两侧。
  14. 如权利要求13所述的显示装置，其中，所述显示结构还包括第一导电层，所述第一导电层覆盖所述第二阵列结构层以及所述第一黑色矩阵部。
  15. 如权利要求14所述的显示装置，其中，所述显示结构还包括液晶层，所述液晶层设置于所述第一导电层上以及所述第二黑色矩阵部中。
  16. 如权利要求15所述的显示装置，其中，所述显示结构还包括第二导电层，所述第二导电层覆盖所述液晶层。
  17. 如权利要求16所述的显示装置，其中，所述显示结构还包括彩膜层，所述彩膜层设置于所述第二导电层上。
  18. 如权利要求17所述的显示装置，其中，所述显示结构还包括第四基板，所述第四基板设置于所述第二黑色矩阵部以及所述彩膜层上，所述第四基板通过所述粘合层与所述第一基板粘合。
  19. 一种显示装置的制备方法，其包括：
    提供一第一基板；
    在所述第一基板上设置第一阵列结构层，其中，所述第一阵列结构层包括感光传感器、触控传感器和间隔层，所述感光传感器包括栅极、半导体部、源极和漏极，所述触控传感器包括发射电极和接收电极，所述间隔层设置于所述感光传感器与所述接收电极之间，所述接收电极设置于所述间隔层远离所述感光传感器的一侧；以及
    在所述第一阵列结构层上设置第二基板。
  20. 如权利要求19所述的显示装置的制备方法中，其中，所述在所述第一阵列结构层上设置第二基板的步骤之后，还包括：
    将显示结构通过粘合层粘合至所述第一基板。
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