WO2022021020A1 - 显示面板及显示装置 - Google Patents

显示面板及显示装置 Download PDF

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Publication number
WO2022021020A1
WO2022021020A1 PCT/CN2020/104943 CN2020104943W WO2022021020A1 WO 2022021020 A1 WO2022021020 A1 WO 2022021020A1 CN 2020104943 W CN2020104943 W CN 2020104943W WO 2022021020 A1 WO2022021020 A1 WO 2022021020A1
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WIPO (PCT)
Prior art keywords
power supply
supply voltage
voltage line
area
base substrate
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PCT/CN2020/104943
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English (en)
French (fr)
Inventor
杜森
宋丽
于鹏飞
代洁
白露
Original Assignee
京东方科技集团股份有限公司
成都京东方光电科技有限公司
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Application filed by 京东方科技集团股份有限公司, 成都京东方光电科技有限公司 filed Critical 京东方科技集团股份有限公司
Priority to CN202080001365.XA priority Critical patent/CN114287061A/zh
Priority to PCT/CN2020/104943 priority patent/WO2022021020A1/zh
Priority to US17/292,754 priority patent/US20230157079A1/en
Publication of WO2022021020A1 publication Critical patent/WO2022021020A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/87—Passivation; Containers; Encapsulations
    • H10K59/873—Encapsulations

Definitions

  • the present disclosure relates to the field of display technology, and more particularly, to a display panel and a display device.
  • a flexible display panel which uses an organic light-emitting diode (OLED) as a light-emitting device and is signal-controlled by a thin film transistor, has become the mainstream direction of the current OLED industry.
  • OLED organic light-emitting diode
  • a chemical vapor deposition process is used for encapsulation to protect the light-emitting device and ensure that the light-emitting device and other structures inside the display panel do not undergo oxidation reaction with the outside world.
  • the encapsulation fails, for example, the encapsulation film is broken and a gap is formed, water and oxygen will enter the interior of the display panel along the gap, and the gap between the organic layer or the inorganic layer will become a water and oxygen pathway.
  • water oxygen invades the organic light-emitting material of the OLED, the organic light-emitting material is oxidized to fail and cannot emit light. With the continuous invasion of water and oxygen, the failure area gradually expands, and the display panel has poor display, which affects the life of the display panel.
  • Embodiments of the present disclosure provide a display panel and a display device, and the specific solutions are as follows:
  • An embodiment of the present disclosure provides a display panel, which includes: a base substrate, the base substrate has a display area and a frame area surrounding the display area; the frame area includes layers disposed on the substrate in sequence a first power supply voltage line and a first planarization layer on one side of the substrate;
  • the frame area has a first dam area surrounding the display area and a second dam area surrounding the first dam area;
  • the orthographic projection of the first power supply voltage line on the base substrate is located in the first dam area
  • At least a part of the first planarization layer in the orthographic projection of the base substrate is located in the first dam area and the second dam area, and the first planarization layer is located in the first dam area
  • the chemical layer covers at least the side surface of the first power supply voltage line
  • the first planarization layer has a first groove and a second groove, the first groove is located between the first bank area and the display area, and the second groove is located at the first between the dam area and the second dam area.
  • a side of the first groove away from the display area and a side of the first power supply voltage line close to the display area and the first power supply voltage are all opposite to each other.
  • the first power supply voltage line has a stepped structure at the top end along its extending direction, and the stepped surface of the stepped structure is located on the surface of the first power supply voltage line facing the one side of the display area;
  • the first groove has the same contour as the adjacent sides of the first power supply voltage line.
  • the ratio of the total width of the stepped structure in the first direction to the total height of the stepped structure in the second direction is greater than or equal to 5 and less than or equal to 10
  • the first direction is an extension direction of the first power supply voltage line
  • the second direction is perpendicular to the first direction.
  • the first power supply voltage line is close to the top end along its extending direction, and faces the side of the display area and the adjacent display area.
  • the included angle of the boundary is greater than 0 degrees and less than or equal to 30 degrees;
  • the first groove has the same contour as the adjacent sides of the first power supply voltage line.
  • the first planarization layer has a third groove
  • the orthographic projection of the third groove on the base substrate is located within the orthographic projection of the first power supply voltage line on the base substrate.
  • the pattern of the third groove is similar to the pattern of the first power supply voltage line.
  • the frame area further includes:
  • a second power supply voltage line electrically connected to the first power supply voltage line and located between the base substrate and the first power supply voltage line;
  • a second planarization layer located between the film layer where the second power supply voltage line is located and the film layer where the first power supply voltage line is located;
  • the orthographic projection of the second planarization layer on the base substrate is located in the first dam area and the second dam area.
  • the frame area further includes:
  • an anode overlap layer located on the side of the first planarization layer away from the base substrate
  • a pixel defining layer located on the side of the anode overlap layer away from the base substrate;
  • the orthographic projection of the anode bonding layer on the base substrate at least partially overlaps the orthographic projection of the first power supply voltage line on the base substrate;
  • the anode bonding layer is electrically connected to the first power supply voltage line through the third groove.
  • the orthographic projection of the pixel defining layer on the base substrate at least covers the boundary of the anode bonding layer.
  • an embodiment of the present disclosure further provides a display device, which includes any of the above-mentioned display panels provided by the embodiment of the present disclosure.
  • FIG. 1 is a schematic diagram of a partial structure of a display panel in the related art
  • FIG. 2 is a schematic structural diagram of a pixel circuit according to an embodiment of the present disclosure
  • FIG. 3 is a schematic cross-sectional structure diagram of a display area in a display panel according to an embodiment of the present disclosure
  • FIG. 4 is one of schematic top-view structural diagrams of a display panel according to an embodiment of the present disclosure
  • FIG. 5 is a partial top-view structural schematic diagram of the display panel shown in FIG. 4;
  • FIG. 6 is a schematic cross-sectional structure diagram of the display panel shown in FIG. 5 along the AA' direction;
  • FIG. 7 is a second schematic top-view structure diagram of a display panel according to an embodiment of the present disclosure.
  • FIG. 8 is a partial top-view structural schematic diagram of the display panel shown in FIG. 7;
  • FIG. 9 is a partial top-view structural schematic diagram of another display panel according to an embodiment of the present disclosure.
  • FIG. 10 is a partial top-view structural schematic diagram of still another display panel according to an embodiment of the present disclosure.
  • FIG. 11 is a schematic cross-sectional structure diagram of still another display panel according to an embodiment of the present disclosure.
  • the water and oxygen channels can be avoided by design or process, but in the frame area of the display panel, as shown in FIG. 1 , a power supply voltage electrically connected to the cathode layer (not shown in FIG. 1 ) is provided Line vss, power supply voltage line vss is generally a Ti-Al-Ti structure, in which Al is easily eroded by the anode etching solution in the subsequent process, forming side pits; Ag reacts, so that Ag ions exist in the anode etching solution, so that Al in the power supply voltage line reacts with the anode etching solution to replace elemental Ag. If Ag diffuses into the display area, it will cause local dark spots, resulting in poor display.
  • the edge of the power supply voltage line vss needs to be covered by the planarization layer pln, so at the cut-off end of the power supply voltage line vss (in the dashed box in Figure 1),
  • the flattening layer pln communicates with the flattening layer pln in the first dam area dam1 and the second dam area dam2 to form an unavoidable water and oxygen path, and V in FIG. 1 represents a groove in the flattening layer pln.
  • embodiments of the present disclosure provide a display panel and a display device to reduce the risk of water and oxygen intrusion of the display panel.
  • a display panel provided by an embodiment of the present disclosure includes: a base substrate, and the base substrate has a display area A1 and a frame area A2 surrounding the display area A1.
  • a light-emitting pixel array is included in the display area, and the light-emitting pixel array mainly includes a pixel circuit located on the base substrate and an organic light-emitting diode connected to the pixel circuit.
  • the pixel circuit is mainly composed of a plurality of transistors and capacitors, such as the pixel circuit shown in FIG. 2 .
  • the display area sequentially includes an active layer 11 , a first gate insulating layer 12 , a gate layer 13 , a second gate insulating layer 14 , a storage Electrode layer 15 , dielectric layer 16 , source-drain electrode layer 17 , second planarization layer 18 , power trace layer 19 , first planarization layer 20 , anode layer 21 , pixel defining layer 22 , light-emitting layer 23 and cathode layer 24 .
  • the transistor is a bottom-gate transistor as an example. The present disclosure does not limit the specific structure of the transistor, which may be a bottom-gate structure, a top-gate structure, or other structures.
  • the frame area A2 includes a first power supply voltage line VSS1 and a first planarization layer that are sequentially stacked on one side of the base substrate (not shown in FIG. 4 ).
  • Layer 20; the frame area A2 has a first dam area DAM1 surrounding the display area A1 and a second dam area DAM2 surrounding the first dam area DAM1.
  • the first dam area and the second dam area are used to protect the display panel.
  • the first power supply voltage line is used for electrical connection with the cathode layer, and the smaller the resistance of the first power supply voltage line, the better the effect. Therefore, making the first power supply voltage line into a ring structure surrounding the display area can make the resistance of the first power supply voltage line as small as possible.
  • the first power supply voltage line needs to be provided with an opening
  • the first power supply voltage line is provided with an opening on one side of the display panel where the chip is disposed, so that the first power supply voltage line has two cut-off ends.
  • the orthographic projection of the first power supply voltage line VSS1 on the base substrate 10 is located in the first bank area DAM1;
  • At least a part of the orthographic projection of the first planarization layer 20 on the base substrate 10 is located in the first dam area DAM1 and the second dam area DAM2, and the first planarization layer 20 located in the first dam area DAM1 at least covers the first dam area DAM1.
  • the first planarization layer 20 has a first groove V11 and a second groove V12, the first groove V11 is located between the first bank area DAM1 and the display area A1, and the second groove V12 is located between the first bank area DAM1 and the display area A1. Between the two dam areas DAM2.
  • the first planarization layer has a first groove and a second groove, and the first groove is located between the first embankment area and the display area, so that the first embankment area and the display area are located between the first embankment area and the display area.
  • a water and oxygen barrier is formed therebetween, and the second groove is located between the first dam area and the second dam area, so as to avoid the formation of a water and oxygen passage between the first dam area and the second dam area.
  • the orthographic projection of the first power supply voltage line on the base substrate is located in the first dam area, so that the side surfaces of the first power supply voltage line can be covered by the first planarization layer located in the first dam area to avoid the first power supply voltage line risk of being further etched by subsequent processes, on the other hand, arranging the first supply voltage line in the first dam area, since the first planarization layer has a second groove between the first dam area and the second dam area, The first planarization layer located at the top of the first power supply voltage line can be prevented from being connected to the first planarization layer in the second dam area, thereby improving the water and oxygen blocking capability of the display panel.
  • the end faces of a power supply voltage line VSS1 in the line extending direction are opposite to each other. That is, a part of the first groove V11 is located between the two end faces of the first power supply voltage line VSS1, and extends from one end of the first power supply voltage line VSS1 to the other, thereby increasing the distance between the two ends of the first power supply voltage line VSS1.
  • the length of the water-blocking and oxygen-blocking passages between them can improve the water-blocking and oxygen-blocking ability of the display panel.
  • the top of the first power supply voltage line VSS1 has a stepped structure along its extending direction, and the stepped surface of the stepped structure is located on the first power supply voltage line.
  • VSS1 faces the side of the display area; the outline of the first groove V11 is the same as that of the adjacent side of the first power supply voltage line VSS1. Therefore, the path of water vapor intrusion at the end face of the first power supply voltage line VSS1 is prolonged, and the risk of water vapor intrusion into the display area is reduced.
  • the longer the width of the step surface of the step structure the longer the path of water vapor intrusion.
  • the ratio of the total width L of the stepped structure in the first direction to the total height H of the stepped structure in the second direction is greater than or equal to 5 and less than or equal to 10, wherein the first direction is the extending direction of the first power supply voltage line VSS1, and the second direction is perpendicular to the first direction.
  • the ratio of the total width L of the stepped structure in the first direction to the total height H of the stepped structure in the second direction is greater than 7 and less than 9.
  • H1 205.6 nm
  • H2 239.4nm
  • L 3567nm
  • the ratio of the total width L of the step structure in the first direction to the total height H of the step structure in the second direction is equal to 3567/445, which is not limited here.
  • the first power supply voltage line VSS1 is close to the top end along its extending direction and faces the side of the display area and the display adjacent to it.
  • the included angle ⁇ of the boundaries of the regions is greater than 0 degrees and less than 90 degrees; the contours of the first groove V11 and the adjacent sides of the first power supply voltage line VSS1 are the same. Therefore, the path of water and oxygen intrusion at the end face of the first power supply voltage line VSS1 is prolonged, and the risk of water and oxygen intrusion into the display area is reduced.
  • the first planarization layer has a third groove V13 ; the orthographic projection of the third groove V13 on the base substrate is located in the first A power supply voltage line VSS1 is in the orthographic projection of the base substrate.
  • the provision of the third groove V13 can facilitate the subsequent electrical connection between the first power supply voltage line VSS1 and the cathode layer, and on the other hand, can increase the water and oxygen blocking capability of the region corresponding to the first power supply voltage line VSS1.
  • the pattern of the third groove V13 is similar to the pattern of the first power supply voltage line VSS1. In this way, the area of the third groove V13 can be made as large as possible.
  • the first planarization layer has a fourth groove V14 .
  • the fourth groove V14 is disposed around the second dam area DAM2, and the fourth groove V14 is used to prevent water and oxygen from entering the second dam area DAM2 from the outside.
  • the frame area further includes:
  • a second power supply voltage line VSS2 electrically connected to the first power supply voltage line VSS1 and located between the base substrate 10 and the first power supply voltage line VSS1;
  • a second planarization layer 18 located between the film layer where the second power supply voltage line VSS2 is located and the film layer where the first power supply voltage line VSS1 is located;
  • the orthographic projection of the second planarization layer 18 on the base substrate 10 is located in the first bank area DAM1 and the second bank area MAM2 .
  • the above-mentioned display panel has a double-layer power supply voltage line structure, and the overall resistance of the power supply voltage line can be reduced by using the two layers of power supply voltage lines.
  • the orthographic projection of the second planarization layer 18 on the base substrate 10 and the orthographic projection of the second power supply voltage line VSS2 on the base substrate 10 do not overlap, so that the first power supply voltage line VSS1 and the second power supply voltage line VSS1 do not overlap.
  • the voltage line VSS2 is in direct contact for electrical connection.
  • the second planarization layer 18 has a fifth groove V21 , and the first groove V11 and the third groove V13 are in the base substrate 10 .
  • the orthographic projections of are all located in the orthographic projection of the fifth groove V21 on the base substrate 10 .
  • the second planarization layer 18 is prevented from forming water-oxygen passages at the regions corresponding to the first grooves V11 and the third grooves V13.
  • the second planarization layer 18 further has a sixth groove V22 and a seventh groove V23, and the sixth groove V22 is in the base substrate
  • the orthographic projection of 10 overlaps with the orthographic projection of the second groove V12 on the base substrate 10
  • the orthographic projection of the seventh groove V23 on the base substrate 10 overlaps with the orthographic projection of the fourth groove V14 on the base substrate 10 .
  • the sixth groove V22 is used to form a water and oxygen barrier between the first dam area DAM1 and the second dam area DAM2.
  • the seventh groove V23 is used to prevent water and oxygen from entering the second dam area DAM2 from the outside.
  • the first power supply voltage line is provided in the same layer as the power supply wiring layer in the display area
  • the second power supply voltage line is provided in the same layer as the source-drain electrode layer in the display area.
  • the frame area further includes:
  • the anode overlap layer is located on the side of the first planarization layer away from the base substrate, and the anode overlap layer is arranged in the same layer as the anode layer; the pixel defining layer is located on the side of the anode overlap layer away from the base substrate; the anode overlap layer
  • the orthographic projection on the base substrate at least partially overlaps with the orthographic projection of the first power supply voltage line on the base substrate; the anode overlapping layer is electrically connected to the first power supply voltage line through the third groove.
  • the first power supply voltage line and the cathode layer are overlapped by the anode bonding layer, which can reduce the resistance on the one hand, and avoid the direct connection between the first power supply voltage line and the cathode layer on the other hand.
  • the process difficulty is increased because the via hole is too deep.
  • the orthographic projection of the pixel defining layer on the base substrate at least covers the boundary of the anode overlap layer. Prevent the backplane circuit from being damaged by static electricity through the anode overlap layer with high conductivity at the cut-off point of the anode overlap layer.
  • the display panel provided by the embodiment of the present disclosure is a display panel.
  • the display panel also includes a thin film encapsulation layer, and the thin film encapsulation layer is composed of a laminated structure of an organic layer and an inorganic layer, which is not limited herein.
  • the base substrate may be formed of any suitable insulating material with flexibility.
  • the base substrate may be made of materials such as polyimide (PI), polycarbonate (PC), polyethersulfone (PES), polyethylene terephthalate (PET), polyethylene naphthalate Ester (PEN), polyarylate (PAR) or glass fiber reinforced plastic (FRP) and other polymer materials.
  • an embodiment of the present disclosure further provides a display device, which includes a driver chip and any of the above-mentioned display panels provided by the embodiment of the present disclosure.
  • the display device can be any flexible product or component with display function, such as a mobile phone and a tablet computer.
  • display device reference may be made to the above-mentioned embodiments of the display panel, and repeated descriptions will not be repeated.
  • the first planarization layer has a first groove and a second groove, and the first groove is located between the first embankment area and the display area, so that the first embankment area and the display area are located between the first embankment area and the display area.
  • a water and oxygen barrier is formed between the display areas, and the second groove is located between the first embankment area and the second embankment area to avoid the formation of a water and oxygen passage between the first embankment area and the second embankment area.
  • the orthographic projection of the first power supply voltage line on the base substrate is located in the first dam area, so that the side surfaces of the first power supply voltage line can be covered by the first planarization layer located in the first dam area to avoid the first power supply voltage line risk of being further etched by subsequent processes, on the other hand, arranging the first supply voltage line in the first dam area, since the first planarization layer has a second groove between the first dam area and the second dam area, The first planarization layer located at the top of the first power supply voltage line can be prevented from being connected to the first planarization layer in the second dam area, thereby improving the water and oxygen blocking capability of the display panel.

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Abstract

本公开公开了一种显示面板及显示装置，显示面板包括：衬底基板，衬底基板具有显示区域和包围显示区域的边框区域；边框区域包括依次层叠设置在衬底基板一侧的第一电源电压线和第一平坦化层；边框区域具有围绕显示区域的第一堤坝区和围绕第一堤坝区的第二堤坝区；第一电源电压线在衬底基板的正投影位于第一堤坝区内；第一平坦化层至少位于第一堤坝区内和第二堤坝区内，且位于第一堤坝区内的第一平坦化层至少包覆第一电源电压线的侧面；第一平坦化层具有第一凹槽和第二凹槽，第一凹槽位于第一堤坝区和显示区域之间，第二凹槽位于第一堤坝区和第二堤坝区之间。

Description

显示面板及显示装置 技术领域
本公开涉及显示技术领域，尤指一种显示面板及显示装置。
背景技术
目前，以有机发光二极管(Organic Light-Emitting Diode，OLED)为发光器件、由薄膜晶体管进行信号控制的显示面板(flexible display panel)已成为目前OLED行业的主流方向。
在显示面板中，显示基板形成以后会采用化学气相沉积工艺进行封装以保护发光器件，确保发光器件以及显示面板内部其它结构不与外界发生氧化反应。一旦封装失效，例如封装膜层发生断裂、产生缝隙，水氧会沿着缝隙进入显示面板内部，有机层或无机层的缝隙都会成为水氧通路。水氧入侵OLED的有机发光材料后，导致有机发光材料氧化失效，无法发光。随着水氧不断入侵，导致失效区域逐渐扩大，显示面板出现显示不良，影响显示面板的寿命。
发明内容
本公开实施例提供一种显示面板及显示装置，具体方案如下：
本公开实施例提供的一种显示面板，其中，包括：衬底基板，所述衬底基板具有显示区域和包围所述显示区域的边框区域；所述边框区域包括依次层叠设置在所述衬底基板一侧的第一电源电压线和第一平坦化层；
所述边框区域具有围绕所述显示区域的第一堤坝区和围绕所述第一堤坝区的第二堤坝区；
所述第一电源电压线在所述衬底基板的正投影位于所述第一堤坝区内；
所述第一平坦化层在所述衬底基板的正投影至少一部分位于所述第一堤坝区内和所述第二堤坝区内，且位于所述第一堤坝区内的所述第一平坦化层 至少包覆所述第一电源电压线的侧面；
所述第一平坦化层具有第一凹槽和第二凹槽，所述第一凹槽位于所述第一堤坝区和所述显示区域之间，所述第二凹槽位于所述第一堤坝区和所述第二堤坝区之间。
可选地，在本公开实施例提供的显示面板中，所述第一凹槽远离所述显示区域的侧面与所述第一电源电压线靠近所述显示区域的侧面以及所述第一电源电压线在其延伸方向的端面均相对。
可选地，在本公开实施例提供的显示面板中，所述第一电源电压线在沿其延伸方向的顶端具有台阶结构，且所述台阶结构的台阶面位于所述第一电源电压线面向所述显示区域一侧；
所述第一凹槽与所述第一电源电压线的相邻侧边的轮廓相同。
可选地，在本公开实施例提供的显示面板中，所述台阶结构在第一方向的总宽度和所述台阶结构在第二方向的总高度的比值大于或等于5且小于或等于10，其中，所述第一方向为所述第一电源电压线的延伸方向，所述第二方向与所述第一方向垂直。
可选地，在本公开实施例提供的显示面板中，所述第一电源电压线在靠近沿其延伸方向的顶端、且面向所述显示区域一侧的侧边和与其邻近的所述显示区域的边界的夹角大于0度且小于或等于30度；
所述第一凹槽与所述第一电源电压线的相邻侧边的轮廓相同。
可选地，在本公开实施例提供的显示面板中，所述第一平坦化层具有第三凹槽；
所述第三凹槽在所述衬底基板的正投影位于所述第一电源电压线在所述衬底基板的正投影内。
可选地，在本公开实施例提供的显示面板中，所述第三凹槽的图形与所述第一电源电压线的图形相似。
可选地，在本公开实施例提供的显示面板中，所述边框区域还包括：
与所述第一电源电压线电连接、且位于所述衬底基板和所述第一电源电 压线之间第二电源电压线；
位于所述第二电源电压线所在膜层与所述第一电源电压线所在膜层之间的第二平坦化层；
所述第二平坦化层在所述衬底基板的正投影位于所述第一堤坝区内和所述第二堤坝区内。
可选地，在本公开实施例提供的显示面板中，所述边框区域还包括：
位于所述第一平坦化层背离所述衬底基板一侧的阳极搭接层；
位于阳极搭接层背离所述衬底基板一侧的像素限定层；
所述阳极搭接层在所述衬底基板的正投影与所述第一电源电压线在所述衬底基板的正投影至少部分重叠；
所述阳极搭接层通过所述第三凹槽与所述第一电源电压线电连接。
可选地，在本公开实施例提供的显示面板中，所述像素限定层在所述衬底基板的正投影至少覆盖所述阳极搭接层的边界。
相应地，本公开实施例还提供了一种显示装置，其中，包括本公开实施例提供的上述任一种显示面板。
附图说明
图1为相关技术中显示面板的局部结构示意图；
图2为本公开实施例提供的一种像素电路的结构示意图；
图3为本公开实施例提供的一种显示面板中显示区域的剖面结构示意图；
图4为本公开实施例提供的一种显示面板的俯视结构示意图之一；
图5为图4所示显示面板的局部俯视结构示意图；
图6为图5所示显示面板沿AA’方向的剖面结构示意图；
图7为本公开实施例提供的一种显示面板的俯视结构示意图之二；
图8为图7所示显示面板的局部俯视结构示意图；
图9为本公开实施例提供的另一种显示面板的局部俯视结构示意图；
图10为本公开实施例提供的又一种显示面板的局部俯视结构示意图；
图11为本公开实施例提供的又一种显示面板的剖面结构示意图。
具体实施方式
在具体实施时，水氧通道都可以通过设计或工艺进行规避，但在显示面板的边框区域中，如图1所示，设置有与阴极层(图1中未视出)电连接的电源电压线vss，电源电压线vss一般为Ti-Al-Ti结构，其中Al在后续的工艺过程中容易被阳极刻蚀液侵蚀，形成侧面凹坑；另一方面，阳极刻蚀液容易与阳极中的Ag发生反应，使阳极刻蚀液中存在Ag离子，从而电源电压线中的Al与阳极刻蚀液反应后能够置换出单质Ag，Ag如果扩散到显示区会造成局部暗点，造成显示不良。因此，为了规避电源电压线vss被后续工艺进一步刻蚀的风险，需要利用平坦化层pln包覆电源电压线vss的边缘，因此在电源电压线vss的截止端(图1中虚线框内)，平坦化层pln与第一堤坝区dam1和第二堤坝区dam2中的平坦化层pln连通形成了无法避免的水氧通路，图1中V表示平坦化层pln中的凹槽。
有鉴于此，本公开实施例提供了一种显示面板及显示装置，以降低显示面板水氧入侵的风险。
为使本公开的上述目的、特征和优点能够更为明显易懂，下面将结合附图和实施例对本公开做进一步说明。然而，示例实施方式能够以多种形式实施，且不应被理解为限于在此阐述的实施方式；相反，提供这些实施方式使得本公开更全面和完整，并将示例实施方式的构思全面地传达给本领域的技术人员。在图中相同的附图标记表示相同或类似的结构，因而将省略对它们的重复描述。本公开中所描述的表达位置与方向的词，均是以附图为例进行的说明，但根据需要也可以做出改变，所做改变均包含在本公开保护范围内。本公开的附图仅用于示意相对位置关系不代表真实比例。
需要说明的是，在以下描述中阐述了具体细节以便于充分理解本公开。但是本公开能够以多种不同于在此描述的其它方式来实施，本领域技术人员可以在不违背本公开内涵的情况下做类似推广。因此本公开不受下面公开的 具体实施方式的限制。说明书后续描述为实施本公开的较佳实施方式，然所述描述乃以说明本公开的一般原则为目的，并非用以限定本公开的范围。本公开的保护范围当视所附权利要求所界定者为准。
下面结合附图，对本公开实施例提供的显示面板及显示装置进行具体说明。
如图4所示，本公开实施例提供的一种显示面板，包括：衬底基板，衬底基板具有显示区域A1和包围显示区域A1的边框区域A2。
在具体实施时，在显示区域中包括发光像素阵列，发光像素阵列主要包括位于衬底基板上的像素电路以及与该像素电路连接的有机发光二极管。像素电路主要由多个晶体管和电容组成，例如图2所示的像素电路。
在一些实施例中，如图3所示，显示区域依次包括位于衬底基板10上的有源层11、第一栅极绝缘层12、栅极层13、第二栅极绝缘层14、存储电极层15、介质层16、源漏电极层17、第二平坦化层18、电源走线层19、第一平坦化层20、阳极层21、像素限定层22、发光层23和阴极层24。图4中以晶体管为底栅型晶体管为例，本公开对晶体管的具体结构不作限定，可以是底栅型结构，也可以是顶栅型结构，还可以是其它结构。
在本公开实施例提供的显示面板中，如图4所示，边框区域A2包括依次层叠设置在衬底基板(图4中未视出)一侧的第一电源电压线VSS1和第一平坦化层20；边框区域A2具有围绕显示区域A1的第一堤坝区DAM1和围绕第一堤坝区DAM1的第二堤坝区DAM2。
在具体实施时，第一堤坝区和第二堤坝区用于显示面板起防护作用。第一电源电压线用于与阴极层的电连接，第一电源电压线的电阻越小，效果越好。因此将第一电源电压线做成围绕显示区域的环形结构可以使第一电源电压线的电阻尽量的小，但是在实际应用中，考虑到面板的整体设计，需要将第一电源电压线设置开口，例如第一电源电压线在显示面板设置芯片的一侧设置开口，从而使第一电源电压线具有两个截止端。为了避免第一电源电压线被后续工艺进一步刻蚀的风险，需要利用第一平坦化层包覆第一电源电压 线的边缘，为了避免第一电源电压线截止端处的第一平坦化层与堤坝区中的有机层连通形成水氧通路。在本公开实施例提供的显示面板中，如图4至图6所示：
第一电源电压线VSS1在衬底基板10的正投影位于第一堤坝区DAM1内；
第一平坦化层20在衬底基板10的正投影至少一部分位于第一堤坝区DAM1内和第二堤坝区DAM2内，且位于第一堤坝区DAM1内的第一平坦化层20至少包覆第一电源电压线VSS1的侧面；
第一平坦化层20具有第一凹槽V11和第二凹槽V12，第一凹槽V11位于第一堤坝区DAM1和显示区域A1之间，第二凹槽V12位于第一堤坝区DAM1和第二堤坝区DAM2之间。
本公开实施例提供的上述显示面板，第一平坦化层具有第一凹槽和第二凹槽，第一凹槽位于第一堤坝区和显示区域之间，从而在第一堤坝区和显示区域之间形成阻水氧屏障，第二凹槽位于第一堤坝区和第二堤坝区之间，避免第一堤坝区和第二堤坝区之间形成水氧通路。第一电源电压线在衬底基板的正投影位于第一堤坝区内，从而可以利用位于第一堤坝区内的第一平坦化层包覆第一电源电压线的侧面，避免第一电源电压线被后续工艺进一步刻蚀的风险，另方面，将第一电源电压线设置在第一堤坝区内，由于第一平坦化层在第一堤坝区和第二堤坝区之间具有第二凹槽，可以避免位于第一电源电压线顶端的第一平坦化层与第二堤坝区内的第一平坦化层连通，从而提高显示面板的阻水氧能力。
可选地，在本公开实施例提供的显示面板中，如图7和图8所示，第一凹槽V11远离显示区域A1的侧面与第一电源电压线VSS1靠近显示区域A1的侧面以及第一电源电压线VSS1在其线延伸方向的端面均相对。即第一凹槽V11的一部分位于在第一电源电压线VSS1的两个端面之间，且由第一电源电压线VSS1的一端延伸至另一部，从而增加第一电源电压线VSS1两端之间的阻水氧通路的长度，提高显示面板的阻水氧能力。
可选地，在本公开实施例提供的显示面板中，如图9所示，第一电源电 压线VSS1在沿其延伸方向的顶端具有台阶结构，且台阶结构的台阶面位于第一电源电压线VSS1面向显示区域一侧；第一凹槽V11与第一电源电压线VSS1的相邻侧边的轮廓相同。从而延长了第一电源电压线VSS1端面处水汽入侵的路径，降低水汽入侵显示区域的风险。
在具体实施时，台阶结构的台阶面宽度越长，水汽入侵的路径越长。可选地，在本公开实施例提供的显示面板中，如图9所示，台阶结构在第一方向的总宽度L和台阶结构在第二方向的总高度H的比值大于或等于5且小于或等于10，其中，第一方向为第一电源电压线VSS1的延伸方向，第二方向与第一方向垂直。
进一步地，在本公开实施例中，台阶结构在第一方向的总宽度L和台阶结构在第二方向的总高度H的比值大于7且小于9，例如，在图9中，H1＝205.6nm，H2＝239.4nm，L＝3567nm，台阶结构在第一方向的总宽度L和台阶结构在第二方向的总高度H的比值等于3567/445，在此不作限定。
可选地，在本公开实施例提供的显示面板中，如图10所示，第一电源电压线VSS1在靠近沿其延伸方向的顶端、且面向显示区域一侧的侧边和与其邻近的显示区域的边界的夹角θ大于0度且小于90度；第一凹槽V11与第一电源电压线VSS1的相邻侧边的轮廓相同。从而延长了第一电源电压线VSS1端面处水氧入侵的路径，降低水氧入侵显示区域的风险。
在具体实施时，在图10中，夹角θ越小，水汽入侵的路径越长，但是工艺越难，因此，将阻水汽效果和工艺难度结合考虑，将夹角θ设置为5度至30度之间，例如θ＝22度，在此不作限定。
可选地，在本公开实施例提供的显示面板中，如图4至图10所示，第一平坦化层具有第三凹槽V13；第三凹槽V13在衬底基板的正投影位于第一电源电压线VSS1在衬底基板的正投影内。设置第三凹槽V13一方面可以方便第一电源电压线VSS1后续与阴极层实现电连接，一方面可以增加第一电源电压线VSS1对应区域的阻水氧能力。
可选地，在本公开实施例提供的显示面板中，如图4至图10所示，第三 凹槽V13的图形与第一电源电压线VSS1的图形相似。这样可以将第三凹槽V13的面积做的尽可能大。
可选地，在本公开实施例提供的显示面板中，如图4至图10所示，第一平坦化层具有第四凹槽V14。第四凹槽V14围绕第二堤坝区DAM2设置，第四凹槽V14用于阻止水氧由外界进入到第二堤坝区DAM2。
可选地，在本公开实施例提供的显示面板中，如图11所示，边框区域还包括：
与第一电源电压线VSS1电连接、且位于衬底基板10和第一电源电压线VSS1之间第二电源电压线VSS2；
位于第二电源电压线VSS2所在膜层与第一电源电压线VSS1所在膜层之间的第二平坦化层18；
第二平坦化层18在衬底基板10的正投影位于第一堤坝区内DAM1和第二堤坝区MAM2内。
上述显示面板为双层电源电压线结构，通过两层电源电压线可以降低电源电压线的整体电阻。
在本公开中，第二平坦化层18在衬底基板10的正投影与第二电源电压线VSS2在衬底基板10的正投影不交叠，从而使第一电源电压线VSS1与第二电源电压线VSS2直接接触实现电连接。
可选地，在本公开实施例提供的显示面板中，如图11所示，第二平坦化层18具有第五凹槽V21，第一凹槽V11和第三凹槽V13在衬底基板10的正投影均位于第五凹槽V21在衬底基板10的正投影内。从而避免第二平坦化层18在第一凹槽V11和第三凹槽V13对应的区域处形成水氧通路。
可选地，在本公开实施例提供的显示面板中，如图11所示，第二平坦化层18还具有第六凹槽V22和第七凹槽V23，第六凹槽V22在衬底基板10的正投影与第二凹槽V12在衬底基板10的正投影重叠，第七凹槽V23在衬底基板10的正投影与第四凹槽V14在衬底基板10的正投影重叠。其中，第六凹槽V22用于在第一堤坝区DAM1和第二堤坝区DAM2之间形成阻水氧屏障。 第七凹槽V23用于阻止水氧由外界进入到第二堤坝区DAM2。
可选地，在本公开实施了提供的显示面板，第一电源电压线与显示区域中的电源走线层同层设置，第二电源电压线与显示区域中的源漏电极层同层设置。
可选地，在本公开实施例提供的显示面板中，边框区域还包括：
位于第一平坦化层背离衬底基板一侧的阳极搭接层，该阳极搭接层与阳极层同层设置；位于阳极搭接层背离衬底基板一侧的像素限定层；阳极搭接层在衬底基板的正投影与第一电源电压线在衬底基板的正投影至少部分重叠；阳极搭接层通过第三凹槽与第一电源电压线电连接。本公开实施例提供的上述显示面板，利用阳极搭接层使第一电源电压线与阴极层进行搭接，一方面可以减小电阻，另一方面，避免第一电源电压线与阴极层直接进行电连接时由于过孔太深导致工艺难度增加。
可选地，在本公开实施例提供的显示面板中，像素限定层在衬底基板的正投影至少覆盖阳极搭接层的边界。防止在阳极搭接层的截止处，静电通过高导电率的阳极搭接层击伤背板电路。
可选地，本公开实施例提供的显示面板为显示面板。显示面板中还包括薄膜封装层，薄膜封装层由有机层和无机层的叠层结构组成，在此不作限定。
在具体实施时，在本公开实施例提供的显示面板中，衬底基板可以由具有柔性的任意合适的绝缘材料形成。例如，衬底基板可以由诸如聚酰亚胺(PI)、聚碳酸酯(PC)、聚醚砜(PES)、聚对苯二甲酸乙二醇酯(PET)、聚萘二甲酸乙二醇酯(PEN)、多芳基化合物(PAR)或玻璃纤维增强塑料(FRP)等聚合物材料形成。
基于同一发明构思，本公开实施例还提供了一种显示装置，包括驱动芯片和本公开实施例提供的上述任一种显示面板。该显示装置可以为手机、平板电脑等任何具有显示功能的柔性产品或部件。该显示装置的实施可以参见上述显示面板的实施例，重复之处不再赘述。
本公开实施例提供的显示面板及显示装置，第一平坦化层具有第一凹槽 和第二凹槽，第一凹槽位于第一堤坝区和显示区域之间，从而在第一堤坝区和显示区域之间形成阻水氧屏障，第二凹槽位于第一堤坝区和第二堤坝区之间，避免第一堤坝区和第二堤坝区之间形成水氧通路。第一电源电压线在衬底基板的正投影位于第一堤坝区内，从而可以利用位于第一堤坝区内的第一平坦化层包覆第一电源电压线的侧面，避免第一电源电压线被后续工艺进一步刻蚀的风险，另方面，将第一电源电压线设置在第一堤坝区内，由于第一平坦化层在第一堤坝区和第二堤坝区之间具有第二凹槽，可以避免位于第一电源电压线顶端的第一平坦化层与第二堤坝区内的第一平坦化层连通，从而提高显示面板的阻水氧能力。
显然，本领域的技术人员可以对本公开进行各种改动和变型而不脱离本公开的精神和范围。这样，倘若本公开的这些修改和变型属于本公开权利要求及其等同技术的范围之内，则本公开也意图包含这些改动和变型在内。

Claims (10)

  1. 一种显示面板，其中，包括：衬底基板，所述衬底基板具有显示区域和包围所述显示区域的边框区域；所述边框区域包括依次层叠设置在所述衬底基板一侧的第一电源电压线和第一平坦化层；
    所述边框区域具有围绕所述显示区域的第一堤坝区和围绕所述第一堤坝区的第二堤坝区；
    所述第一电源电压线在所述衬底基板的正投影位于所述第一堤坝区内；
    所述第一平坦化层在所述衬底基板的正投影至少一部分位于所述第一堤坝区内和所述第二堤坝区内，且位于所述第一堤坝区内的所述第一平坦化层至少包覆所述第一电源电压线的侧面；
    所述第一平坦化层具有第一凹槽和第二凹槽，所述第一凹槽位于所述第一堤坝区和所述显示区域之间，所述第二凹槽位于所述第一堤坝区和所述第二堤坝区之间。
  2. 如权利要求1所述的显示面板，其中，所述第一凹槽远离所述显示区域的侧面与所述第一电源电压线靠近所述显示区域的侧面以及所述第一电源电压线在其延伸方向的端面均相对。
  3. 如权利要求2所述的显示面板，其中，所述第一电源电压线具有台阶结构，且所述台阶结构的台阶面位于所述第一电源电压线靠近所述显示区域一侧；
    所述第一凹槽与所述第一电源电压线的相邻侧边的轮廓相同。
  4. 如权利要求3所述的显示面板，其中，所述台阶结构在第一方向的总宽度和所述台阶结构在第二方向的总高度的比值大于或等于5且小于或等于10，其中，所述第一方向为所述第一电源电压线的延伸方向，所述第二方向与所述第一方向垂直。
  5. 如权利要求2所述的显示面板，其中，所述第一电源电压线在靠近沿其延伸方向的顶端、且面向所述显示区域一侧的侧边和与其邻近的所述显示 区域的边界的夹角大于0度且小于或等于30度；
    所述第一凹槽与所述第一电源电压线的相邻侧边的轮廓相同。
  6. 如权利要求1所述的显示面板，其中，所述第一平坦化层具有第三凹槽；
    所述第三凹槽在所述衬底基板的正投影位于所述第一电源电压线在所述衬底基板的正投影内。
  7. 如权利要求1所述的显示面板，其中，所述边框区域还包括：
    与所述第一电源电压线电连接、且位于所述衬底基板和所述第一电源电压线之间第二电源电压线；
    位于所述第二电源电压线所在膜层与所述第一电源电压线所在膜层之间的第二平坦化层；
    所述第二平坦化层在所述衬底基板的正投影位于所述第一堤坝区内和所述第二堤坝区内。
  8. 如权利要求6所述的显示面板，其中，
    所述边框区域还包括：
    位于所述第一平坦化层背离所述衬底基板一侧的阳极搭接层；
    位于阳极搭接层背离所述衬底基板一侧的像素限定层；
    所述阳极搭接层在所述衬底基板的正投影与所述第一电源电压线在所述衬底基板的正投影至少部分重叠；
    所述阳极搭接层通过所述第三凹槽与所述第一电源电压线电连接。
  9. 如权利要求8所述的显示面板，其中，
    所述像素限定层在所述衬底基板的正投影至少覆盖所述阳极搭接层的侧面。
  10. 一种显示装置，其中，包括驱动芯片和如权利要求1-9任一项所述的显示面板。
PCT/CN2020/104943 2020-07-27 2020-07-27 显示面板及显示装置 WO2022021020A1 (zh)

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