WO2021258277A1 - 一种基于GaAs HBT工艺的功放芯片偏置电路 - Google Patents

一种基于GaAs HBT工艺的功放芯片偏置电路 Download PDF

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WO2021258277A1
WO2021258277A1 PCT/CN2020/097617 CN2020097617W WO2021258277A1 WO 2021258277 A1 WO2021258277 A1 WO 2021258277A1 CN 2020097617 W CN2020097617 W CN 2020097617W WO 2021258277 A1 WO2021258277 A1 WO 2021258277A1
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hbt
tube
output
bias
voltage
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PCT/CN2020/097617
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English (en)
French (fr)
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李斌
马渊博
吴朝晖
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华南理工大学
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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current
    • G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
    • G05F1/565—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
    • G05F1/567—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for temperature compensation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/30—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters

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  • the invention relates to radio frequency chip technology, in particular to a power amplifier chip bias circuit based on GaAs HBT technology.
  • 5G power amplifier chips mainly use GaAs HBT process with good electron mobility and channel electron density to increase power density and reduce chip area. But at the same time, it also aggravated the self-heating effect inside the chip, resulting in serious temperature drift. Therefore, optimizing the circuit structure, especially optimizing the bias circuit with temperature drift suppression function, is one of the effective means to solve the thermal stability of the GaAs HBT process power amplifier chip.
  • optimizing the circuit structure especially optimizing the bias circuit with temperature drift suppression function, is one of the effective means to solve the thermal stability of the GaAs HBT process power amplifier chip.
  • off-chip voltage regulator structures or on-chip temperature sensing structures can be used. However, such methods increase power consumption and increase area costs.
  • a more effective method is to use an on-chip bias circuit that suppresses temperature drift to provide a bias voltage or bias current that is not affected by temperature as much as possible.
  • a variety of on-chip circuit structures have been proposed.
  • This circuit is simple and has low power consumption, which is conducive to on-chip integration.
  • the accuracy is low, the load capacity is low, and the output voltage is stabilized.
  • Voltage diode clamping is not suitable for larger area power tubes; there are high-order temperature-compensated bandgap reference circuits that use diodes instead of BJT tubes, and there are bias circuits that achieve temperature detection and compensation amplification through a structure similar to differential voltage.
  • This circuit improves the accuracy while reducing the temperature coefficient, but it also faces the challenge of increasingly integrated mobile communication devices.
  • the circuit combining the current converter and the PTAT current realizes the dB linear gain control of temperature compensation and reduces the area, but the output voltage level is single and cannot provide multi-layer temperature coefficient voltage compensation to prevent the bias voltage from being too large. breakdown.
  • the purpose of the present invention is to provide a power amplifier chip bias circuit based on GaAs HBT technology to solve the above-mentioned problems in the prior art.
  • the power amplifier chip bias circuit based on GaAs HBT process of the present invention integrates a temperature compensation unit, a multi-stage positive temperature coefficient voltage unit and a quasi-current mirror bias unit in the same chip;
  • the temperature compensation unit It includes a diode and a first resistor.
  • the anode of the diode is connected to the power supply voltage, the cathode is grounded through the first resistor, and the other is connected to the multi-stage positive temperature coefficient voltage unit as an output terminal;
  • the coefficient voltage unit includes a number of HBT tubes made by the GaAs HBT process.
  • Each HBT tube has its own base and collector short-circuited, and is connected in series between the output terminal of the temperature compensation unit and the ground; the set of each HBT tube One electrode is led out as a multi-stage voltage output terminal; the quasi-current mirror bias unit includes a positive temperature coefficient second resistor and a current mirror; one end of the positive temperature coefficient second resistor serves as the quasi-current mirror bias unit The voltage input of the quasi-current mirror is connected to the input side of the current mirror; the output side of the current mirror is used to output a bias current; the voltage input of the quasi-current mirror bias unit is connected to the multi-stage voltage output One of the ends.
  • the power amplifier chip bias circuit based on GaAs HBT technology of the present invention has the advantages of simple structure, easy on-chip integration, and low power consumption. Effectively respond to the challenges brought by increasingly integrated mobile communication devices. And in view of the shortcomings of a single type of GaAs process transistor, this circuit can still obtain an accurate current bias. So that it can meet the demanding requirements of mobile device power amplifier chips in terms of volume, power consumption, and long-term sustainable work with very low complexity and high reliability in implementation, and has good promotion value.
  • the current mirror includes a first input-side HBT tube and a first output-side HBT tube; the base and collector of the first input-side HBT tube are short-circuited and then connected to the positive temperature coefficient second resistor, and the emitter is grounded
  • the base of the first output-side HBT tube is connected to the base of the first input-side HBT tube, the collector is externally connected with a reference voltage, and the emitter is used to externally output the bias current.
  • the purpose is to provide a way to achieve zero temperature coefficient bias current.
  • the current mirror also includes a capacitor, and the capacitor is connected in parallel between the respective emitters of the first input-side HBT tube and the first output-side HBT tube.
  • the purpose is to avoid the applied external circuit signal leakage.
  • the current mirror can also provide another implementation, including a second input side HBT tube, a third input side HBT tube, a second output side HBT tube, and a third output side HBT tube; the second input side HBT tube After the collector and base of the HBT tube are short-connected, the positive temperature coefficient second resistor is connected, and the emitter is connected to the emitter of the third input-side HBT tube; the emitter of the third input-side HBT tube is short-circuited with the base, The collector is grounded; the bases of the second output-side HBT tube and the third output-side HBT tube are both connected to the base of the second input-side HBT tube, the collectors are externally connected to a reference voltage, and the emitters are used to The bias current is output externally.
  • the purpose is to provide another implementation of the current mirror.
  • the current mirror also includes a capacitor, and the capacitor is connected between the emitter of the second output side HBT tube and the ground. The purpose is to avoid the applied external circuit signal leakage.
  • FIG. 1 is a schematic diagram of the structure of the bias circuit of the power amplifier chip according to the present invention.
  • Fig. 2 is a schematic structural diagram of another embodiment of the quasi-current mirror bias unit of the present invention.
  • FIG. 3 is a schematic diagram of the structure of the power amplifier chip bias circuit of the present invention applied to an external circuit.
  • FIG. 4 is a simulation effect diagram of the third-order voltage output by the multi-step positive temperature coefficient voltage unit of the present invention as a function of temperature.
  • Fig. 5 is a simulation effect diagram of the current change with temperature in the quasi-current mirror bias unit of the present invention.
  • Vc-power supply voltage, D1-diode, R1-first resistance Vc-power supply voltage, D1-diode, R1-first resistance.
  • R2-Positive temperature coefficient second resistance M A0 -first input side HBT tube, M B0 -first output side HBT tube, M A1 -second input side HBT tube, M A2 -third input side HBT tube, M B1 -the second output side HBT tube, MB2 -the third output side HBT tube; C1-capacitance, V REF -reference voltage, I bias -bias current.
  • R3- ballast resistance RF in -radio frequency input signal, RF out -radio frequency output signal.
  • the bias circuit of a power amplifier chip based on GaAs HBT process includes a temperature compensation unit integrated on the same chip, a multi-stage positive temperature coefficient voltage unit and a quasi-current mirror bias unit .
  • the temperature compensation unit is composed of a diode D1 and a first resistor R1 connected in series.
  • the anode of the diode D1 is connected to the power supply voltage Vc; the cathode is used as the output terminal of the temperature compensation unit, and is grounded after passing through the first resistor R1.
  • the multi-stage positive temperature coefficient voltage unit includes several HBT tubes made by the GaAs HBT process, specifically: the base and collector of the first HBT tube M1 are short-circuited and then connected to the cathode of the diode D1, and serve as the first stage
  • the voltage output is the first output voltage V1.
  • the base and collector of the second HBT tube M2 are short-circuited, they are connected to the emitter of the first HBT tube M1 and output as a second-level voltage, that is, the second output voltage V2.
  • the base and collector of the third HBT tube M3 are short-circuited, they are connected to the emitter of the second HBT tube M2, and are output as a third-level voltage, that is, the third output voltage V3.
  • each HBT tube in the multi-stage positive temperature coefficient voltage unit is respectively short-circuited and used as the voltage output of the corresponding order.
  • the collector of the latter-stage HBT tube will be connected to the emitter of the previous-stage HBT tube ; Until the emitter of the i-th HBT tube Mi of the last stage is grounded.
  • the output of the last order is the i-th output voltage Vi.
  • the quasi-current mirror bias unit includes a current mirror and a positive temperature coefficient second resistor R2 that is located on the input side of the current mirror.
  • the current mirror provides at least two implementation modes in the present invention:
  • the current mirror includes a capacitor C1, a first input-side HBT tube M A0, and a first output-side HBT tube M B0 .
  • the first input-side HBT tube M A0 serves as the input side
  • the first output-side HBT tube M B0 serves as the output side.
  • the positive temperature coefficient second resistor R2 is connected, and the emitter is grounded.
  • the base of the first output-side HBT tube M B0 is connected to the base of the first input-side HBT tube M A0
  • the collector is externally connected to the reference voltage V REF
  • the emitter is used to externally output the bias current I bias .
  • the capacitor C1 is connected between the emitter of the first output side HBT tube M B0 and the ground.
  • the current mirror includes a capacitor C1, a second input side HBT tube M A1 , a third input side HBT tube M A2 , a second output side HBT tube M B1, and a third output side HBT tube M B2 .
  • the second input side HBT tube M A1 and the third input side HBT tube M A2 constitute the input side
  • the second output side HBT tube M B1 and the third output side HBT tube M B2 constitute the output side.
  • Third input-side pipe M A2 HBT base and emitter short-circuited the collector is grounded.
  • the second output side HBT tube M B1 and the third output side HBT tube M B2 are connected in parallel. After the bases are common, connect to the base of the second input side HBT tube M A1 .
  • the reference voltage V REF is connected to the emitter. After the point, the bias current I bias is output externally.
  • the capacitor C1 is connected between the emitter of the third output side HBT tube MB2 and the ground. According to needs, by adding the third input-side HBT tube M A2 , the current can be adjusted without affecting the temperature coefficient of the current.
  • the third input side HBT tube MA2 is equivalent to a resistance device without temperature coefficient, which pulls up the voltage when the bias current is output.
  • the present invention can also obtain different bias currents by adjusting the sizes of the output side HBT tubes M B1 and M B2.
  • the quasi-current mirror bias unit can be set at more than one channel, and is connected to one or more of the multi-level voltage output terminals through respective positive temperature coefficient second resistors R2 as required.
  • different bias currents can be obtained.
  • the two-level output voltages that meet the requirements in the multi-level positive temperature coefficient unit, such as V1 and V3 can be used at the same time to connect two different standards.
  • the current mirror bias unit provides two currents of different sizes, and the remaining output voltage Vi is suspended.
  • the present invention cannot enumerate all possible connection modes, but those skilled in the art can make required changes to various connection modes based on common knowledge and conventional technical means without creative work.
  • the specific application of the bias circuit of the power amplifier chip of the present invention can be as shown in FIG.
  • the area of the diode D1 and the resistance value of the first resistor R1 are used to adjust the voltage drop of the first HBT tube M1 to the ith HBT tube Mi, so as to obtain multi-stage bias voltages with different positive temperature coefficients. And use the positive temperature coefficient second resistor R2 with different temperature coefficients and the current mirror to provide a bias current close to zero temperature coefficient for a single-structure power amplifier circuit based on GaAs technology. Effectively reduce area and power consumption, and improve thermal stability.
  • the current I d of the diode is: Among them, q is the electron charge, k is Boltzmann's constant, T is the operating temperature and the unit is Kelvin, n is the recombination factor, V d is the junction voltage drop, and I S is the reverse saturation current. Its magnitude is: Among them, S is the junction area, A is a constant, and ⁇ B is the Schottky barrier voltage.
  • the base and collector of the HBT tube in the multi-stage positive temperature coefficient voltage unit are each short-circuited to form a series branch.
  • each HBT tube is equivalent to a resistance value
  • the equivalent resistance can be adjusted by the corresponding size.
  • N voltages with different positive temperature coefficients are generated at the collector of each HBT tube It is proportional to the equivalent resistance Reqi.
  • V d is the voltage drop of the diode.
  • the collector voltage of the HBT tube is related to the junction area S and the resistance R1, and the voltage increases with the increase in temperature, and has a positive temperature coefficient.
  • the collector voltage of other HBT tubes can also be calculated, and its magnitude is: Among them, R S is the sum of all equivalent resistances of the series branch.
  • the impedance of the positive temperature coefficient second resistor R2 increases as the temperature rises.
  • the size ratio of the input side and the output side of the HBT tube is 1:m, and the required ratio of output current can be generated, which is biased at the input end of the external application circuit. Ignoring the voltage drop on the input side, the final output current is:
  • the invention adopts an on-chip bias circuit that suppresses temperature drift, and based on the size of the diode D1 and the resistance change of the first resistor R1, the current at the cathode of the diode is connected to the HBT tube series branch equivalent to the resistor.
  • the voltage with the positive temperature coefficient is obtained by fine-tuning, and the current with almost zero temperature coefficient is obtained on the output side of the current mirror through the second resistor R2 with the positive temperature coefficient.
  • This circuit has a simple structure, is convenient for on-chip integration, has low power consumption, and effectively meets the challenges brought by increasingly integrated mobile communication devices.
  • the diode-connected HBT tube is used to replace the traditional resistor, which reduces the area and power loss, and at the same time obtains the N-stage bias voltage with different positive temperature coefficients through the collectors of multiple HBT tubes.
  • This circuit can be used in a variety of biasing schemes.
  • This circuit can be used to bias voltage-controlled power amplifier circuits such as MOS or HMET to reduce gain drift.
  • the gate voltage of these power amplifier tubes decreases with increasing temperature. It is also possible to use multi-layer temperature compensation to optimize the stacked power amplifier circuit, so as to avoid the possibility of breakdown due to excessive input voltage of one of the power amplifier tubes.
  • the quasi-current mirror bias circuit uses the positive temperature coefficient second resistor R2 to convert the voltage into current, which can be biased at the input end of a current-controlled transistor, such as BJT and HBT transistors, so as to obtain precise output current control.
  • a current-controlled transistor such as BJT and HBT transistors
  • the present invention can still obtain accurate current bias.
  • the present invention effectively meets the requirements of mobile equipment for high integration, high power output, high stability, and low cost, so that its realization can meet the needs of mobile equipment power amplifier chips with low complexity and high reliability. , Power consumption, long-term sustainable work and other demanding requirements, have good promotion value.

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Abstract

本发明公开了一种基于GaAs HBT工艺的功放芯片偏置电路，涉及新一代信息技术。针对现有技术中温度补偿手段对体积、功率等负面影响的问题提出本方案。利用二极管和第一电阻获得温度感应电阻，同时串接若干HBT管以代替传统电阻，在每一HBT管均引出一路偏置电压，实现多阶正温度系数电压输出。进一步将此电压通过电流镜和正温系数第二电阻转化，为功放芯片提供温漂抑制的偏置电流。有效应对了移动设备对高集成度、高功率输出、高稳定性、低成本的需求。使得其在实现上能以很低的复杂度与较高的可靠性满足移动设备功放芯片在体积、功耗、长期可持续工作等方面的苛刻要求，具有良好的推广价值。

Description

一种基于GaAs HBT工艺的功放芯片偏置电路 技术领域
本发明涉及射频芯片技术，尤其涉及一种基于GaAs HBT工艺的功放芯片偏置电路。
背景技术
5G时代的逐步到来对可移动终端设备的射频前端诸多芯片带来了更为严峻的挑战，尤其是功放芯片，作为通信系统中最重要的射频模块之一，位于发射机的末端，其性能直接影响信号的传输距离和传输质量。然而无论使用何种工艺设计功放芯片，其输出性能均受到外部温度以及自热效应严重的影响。在外部，生存条件极端的寒冷地区，温度最低可达-20℃，在内部，受大输出功率、高功率密度和高工作频段影响，放大单元之间热耦合严重，工作温度最高可达130℃。如此巨大的工作温度区间，导致功放芯片工作点漂移严重，并且随着温度变化，输出功率、输出效率以及线性度等性能也会随之下降，严重影响了功放芯片的稳定性。因此急需能够有效抑制温度漂移对电路影响的方法，获得能够在-20℃-130℃的温度范围内稳定输出的功放芯片。目前，国内外已从材料工艺、电路结构、封装工艺、芯片应用等方面提出较多提高热稳定的方法。
目前，5G功放芯片主要采用具有良好电子迁移率和沟道电子密度的GaAs HBT工艺，以提高功率密度，降低芯片面积。但与此同时也加剧了芯片内部的自热效应，导致温度漂移严重。因此，从电路结构方面进行优化尤其是对具有温漂抑制功能的偏置电路进行优化，是解决GaAs HBT工艺功放芯片热稳定性的有效手段之一。为了抑制温度变化引起的功放增益变化以及线性度下降等问题，可使用片外稳压结构或是片上温度传感结构，但是此类方法在增大了功耗的同时也增加了面积成本，因此更 为有效的办法是利用片上抑制温漂偏置电路，提供尽量不受温度影响的偏置电压或是偏置电流。目前，已提出了多种片上电路结构，有利用稳压二极管自动补偿温度漂移的电路，此电路简单且功耗低，利于片上集成，但精度较低，带负载能力低，输出端电压被稳压二极管钳制，不适用于较大面积的功率管；有利用二极管代替BJT管的高阶温度补偿带隙基准电路，有通过类似于差分电压结构实现温度探测和补偿放大的偏置电路，这两种电路提高了精度的同时降低了温度系数，但同样都面临了集成度越来越高的移动通信设备的挑战，面积和功耗的消耗限制了此类电路的普适性；还有将指数电流转换器与PTAT电流相结合的电路，实现了温度补偿的dB线性增益控制，也降低了面积，但输出电压层次单一，不能提供多层温度系数的电压补偿，防止偏置电压过大导致的击穿。通过分析上述解决方案，现亟需一种易于集成的、面积和功耗小型化的、能够提供多阶温度系数补偿的片上温度补偿偏置电路。
发明内容
本发明目的在于提供一种基于GaAs HBT工艺的功放芯片偏置电路，以解决上述现有技术存在的问题。
本发明所述的一种基于GaAs HBT工艺的功放芯片偏置电路，在同一芯片内集成有温度补偿单元、多阶式正温度系数电压单元以及准电流镜偏置单元；所述的温度补偿单元包括二极管和第一电阻，所述的二极管正极连接电源电压，负极一路经过第一电阻接地，另一路作为输出端连接至所述多阶式正温度系数电压单元；所述的多阶式正温度系数电压单元包括GaAs HBT工艺制作的若干HBT管，各HBT管均为各自的基极和集电极短接，且依次串联在温度补偿单元输出端与地之间；每一所述HBT管的集电极分别引出一路作为多阶式的电压输出端；所述的准电流镜偏置单元包括正温系数第二电阻和电流镜；所述的正温系数第二电阻一端作为所述准电流镜偏置单元的电压输入，另一端连接所述电流镜 的输入侧；所述电流镜输出侧用于输出偏置电流；所述准电流镜偏置单元的电压输入连接所述多阶式的电压输出端之一。
本发明所述的一种基于GaAs HBT工艺的功放芯片偏置电路，其优点在于，结构简单，便于片上集成，功耗小。有效应对了集成度越来越高的移动通信设备所带来的挑战。并且针对GaAs工艺三极管类型单一的不足，本电路仍然可以获得准确的电流偏置。使得其在实现上能以很低的复杂度与较高的可靠性满足移动设备功放芯片在体积、功耗、长期可持续工作等方面的苛刻要求，具有良好的推广价值。所述的电流镜包括第一输入侧HBT管和第一输出侧HBT管；所述第一输入侧HBT管的基极和集电极短接后连接所述正温系数第二电阻，发射极接地；所述第一输出侧HBT管的基极连接所述第一输入侧HBT管的基极，集电极外接基准电压、发射极用于对外输出所述的偏置电流。目的在于提供一种零温度系数偏置电流的实现方式。
所述的电流镜还包括电容，所述的电容并接在所述第一输入侧HBT管和第一输出侧HBT管各自的发射极之间。目的在于避免所应用的外部电路信号泄漏。
所述的电流镜还可以提供另一种实现方式，包括第二输入侧HBT管、第三输入侧HBT管、第二输出侧HBT管和第三输出侧HBT管；所述的第二输入侧HBT管集电极和基极短接后连接所述正温系数第二电阻，发射极连接第三输入侧HBT管的发射极；所述的第三输入侧HBT管发射极与基极短接，集电极接地；所述的第二输出侧HBT管和第三输出侧HBT管的基极均连接所述第二输入侧HBT管基极，集电极均外接基准电压，发射极共点后用于对外输出所述的偏置电流。目的在于提供另一种电流镜的实现方式。
所述的电流镜还包括电容，所述的电容接在所述第二输出侧HBT管发射极与地之间。目的在于避免所应用的外部电路信号泄漏。
附图说明
图1是本发明所述功放芯片偏置电路的结构示意图。
图2是本发明所述准电流镜偏置单元另一实施例的结构示意图。
图3是本发明所述功放芯片偏置电路应用于外部电路的结构示意图。
图4是本发明所述多阶式正温度系数电压单元输出的其中三阶电压随温度变化的仿真效果图。
图5是本发明所述准电流镜偏置单元中电流随温度变化的仿真效果图。
附图标记：
Vc-电源电压、D1-二极管、R1-第一电阻。
M1-第一HBT管、M2-第二HBT管、M3-第三HBT管、Mi-第i HBT管；V1-第一输出电压、V2-第二输出电压、V3-第三输出电压、Vi-第i输出电压。
R2-正温系数第二电阻；M A0-第一输入侧HBT管、M B0-第一输出侧HBT管、M A1-第二输入侧HBT管、M A2-第三输入侧HBT管、M B1-第二输出侧HBT管、M B2-第三输出侧HBT管；C1-电容、V REF-基准电压、I bias-偏置电流。
R3-镇流电阻；RF in-射频输入信号、RF out-射频输出信号。
具体实施方式
如图1所示，本发明所述的一种基于GaAs HBT工艺的功放芯片偏置电路，包括集成在同一芯片上的温度补偿单元、多阶式正温度系数电压单元以及准电流镜偏置单元。
所述的温度补偿单元由串接的二极管D1和第一电阻R1组成。二极管D1的正极连接电源电压Vc；负极作为温度补偿单元的输出端，且经过所述第一电阻R1后接地。
所述的多阶式正温度系数电压单元包括由GaAs HBT工艺制成的若 干HBT管，具体为：第一HBT管M1基极和集电极短接后连接二极管D1的负极，并作为第一阶电压输出，即第一输出电压V1。第二HBT管M2基极和集电极短接后连接第一HBT管M1的发射极，并作为第二阶电压输出，即第二输出电压V2。第三HBT管M3基极和集电极短接后连接第二HBT管M2的发射极，并作为第三阶电压输出，即第三输出电压V3。多阶式正温度系数电压单元中每一HBT管的集电极和基极均各自短接并作为对应阶数的电压输出，后一阶的HBT管集电极会连接前一阶HBT管的发射极；直至最后一阶的第i HBT管Mi发射极接地。最后一阶的输出即第i输出电压Vi。
所述的准电流镜偏置单元包括电流镜和前置在所述电流镜输入侧的正温系数第二电阻R2。其中电流镜本发明至少提供两种实施方式：
实施例一，电流镜包括电容C1、第一输入侧HBT管M A0和第一输出侧HBT管M B0。所述的第一输入侧HBT管M A0作为输入侧，第一输出侧HBT管M B0作为输出侧。第一输入侧HBT管M A0基极和集电极短接后连接所述正温系数第二电阻R2，发射极接地。第一输出侧HBT管M B0的基极连接第一输入侧HBT管M A0的基极，集电极外接基准电压V REF，发射极用于对外输出偏置电流I bias。所述的电容C1接在第一输出侧HBT管M B0发射极和地之间。
实施例二，如图2所示，电流镜包括电容C1、第二输入侧HBT管M A1、第三输入侧HBT管M A2、第二输出侧HBT管M B1和第三输出侧HBT管M B2。第二输入侧HBT管M A1和第三输入侧HBT管M A2组成输入侧，第二输出侧HBT管M B1和第三输出侧HBT管M B2组成输出侧。第二输入侧HBT管M A1基极和集电极短接后连接所述的正温系数第二电阻R2，发射极连接第三输入侧HBT管M A2的发射极。第三输入侧HBT管M A2基极和发射极短接，集电极接地。第二输出侧HBT管M B1和第三输出侧HBT管M B2并联，基极共点后连接第二输入侧HBT管M A1基极， 集电极共点后外接基准电压V REF，发射极共点后对外输出偏置电流I bias。所述的电容C1接在第三输出侧HBT管M B2发射极和地之间。根据需要，通过增加所述的第三输入侧HBT管M A2，可以做到在调整电流大小的同时不影响电流的温度系数。此处的第三输入侧HBT管M A2等效于一个没有温度系数的电阻器件，将偏置电流输出时的电压拉高。本发明还可以通过调整输出侧HBT管M B1和M B2的尺寸，获得不同的偏置电流。
本领域技术人员在电路设计的时候，所述的准电流镜偏置单元可以设置一路以上，根据需要分别通过各自的正温系数第二电阻R2接入多阶电压输出端中的一个或者多个输出端，从而得到不同的偏置电流。具体地，例如需要为二堆叠式的功放芯片提供两路不同的偏置电流，可同时利用多阶正温度系数单元中满足要求的两阶输出电压，如V1和V3，连接两个不同的准电流镜偏置单元提供两路不同大小的电流，其余输出电压Vi悬空。本发明无法穷举所有可能的连接方式，但本领域技术人员基于公知常识和惯用技术手段，可以在无需给出创造性劳动下，即可对各种连接方式作出所需变换。
本发明所述功放芯片偏置电路的具体应用可以如图3所示，功放管作为应用电路的核心器件，其偏置电流由准电流镜偏置单元提供。
利用二极管D1的面积和第一电阻R1的阻值调整第一HBT管M1至第i HBT管Mi的压降，从而获得多阶不同正温度系数的偏置电压。并利用不同温度系数的正温系数第二电阻R2和电流镜，为结构单一的基于GaAs工艺的功放电路提供接近零温度系数的偏置电流。有效降低面积和功耗，提高热稳定性。
本发明的工作具体原理如下：
二极管的电流I d为：
Figure PCTCN2020097617-appb-000001
其中，q为电子电荷、k为波尔茨曼常数、T为工作温度且单位为开尔文、n为复合因子、V d为结压 降、I S为反向饱和电流，其大小为：
Figure PCTCN2020097617-appb-000002
其中，S是结面积，A是常量，φB是肖特基势垒电压。
多阶式正温度系数电压单元中的HBT管基极与集电极各自短接后构成一个串联支路，总数为N时，每一个HBT管等效为一个阻值为
Figure PCTCN2020097617-appb-000003
的等效电阻，其等效阻值可由对应尺寸调节。在各HBT管的集电极产生N个正温度系数不同的电压
Figure PCTCN2020097617-appb-000004
与等效电阻R eqi成正比。结合二极管电流公式，对第一HBT管M1的集电极电压进行分析可知V1大小为：V 1＝I dR 1＝V c-V d。其中V d是二极管的压降。当温度从T 1上升到T n时，V1的温度变化ΔV1为
Figure PCTCN2020097617-appb-000005
由此可知，HBT管的集电极电压与结面积S和电阻R1有关，且电压随温度升高而升高，具有正温度系数。同样的，根据电阻分压的关系，也可以算出其他HBT管的集电极电压，其大小为：
Figure PCTCN2020097617-appb-000006
其中，R S为串联支路所有等效电阻之和。
在准电流镜偏置电流中，正温系数第二电阻R2的阻抗随温度上升而增加。根据电流镜的公式，利用输入侧与输出侧HBT管的尺寸比1：m，可以产生所需比例的输出电流，偏置于外部应用电路的输入端。忽略输入侧上的压降，则最终输出电流的大小为：
Figure PCTCN2020097617-appb-000007
本发明采用片上抑制温漂的偏置电路，基于二极管D1的尺寸和第一电阻R1的阻值变化，将二极管负极处电流接入等效为电阻的HBT管串联支路。通过微调获得正温度系数的电压，并通过正温系数第二电阻R2，在电流镜输出侧获得几乎零温度系数的电流。此电路结构简单，便于片 上集成，功耗小，有效应对了集成度越来越高的移动通信设备所带来的挑战。
用二极管连接式的HBT管代替传统电阻，降低面积与功率损耗的同时，也通过多个HBT管的集电极获得N阶不同正温度系数的偏置电压。此电路可运用在多种偏置方案中，可利用此电路偏置如MOS或HMET等电压控制型功放电路，从而降低增益的漂移，该些功放管的栅极电压随温度上升而降低。也可利用多层的温度补偿优化堆叠式功放电路，从而避免其中某个功放管的输入电压过高而击穿的可能。
准电流镜偏置电路利用正温系数第二电阻R2将电压转化为电流，可偏置于电流控制型三极管的输入端，例如BJT和HBT管，从而获得精准的输出端电流控制。并且针对GaAs工艺三极管类型单一的不足，本发明仍然可以获得准确的电流偏置。
本发明有效应对了移动设备对高集成度、高功率输出、高稳定性、低成本的需求，使得其在实现上能以很低的复杂度与较高的可靠性满足移动设备功放芯片在体积、功耗、长期可持续工作等方面的苛刻要求，具有良好的推广价值。
仿真测试
将多阶式正温度系数电压单元中的HBT管总数设置为N＝3，并且令Vref＝Vc＝5V、R1＝2KΩ、R2＝2.2KΩ、R3＝250Ω、采用正温度系数的第一输出电压V1连接准电流镜偏置单元、电流镜输入侧与输出侧尺寸比为1:2、C1＝7pF、仿真测试温度控制在-20℃～120℃，得到如图4所示的电压-温度曲线以及得到如图5所示的电流-温度曲线。其中图4纵坐标为三阶正温度系数电压，V1至V3电压大小随温度变化依次减弱，分别为0.8V/℃、0.5V/℃、0.11V/℃。在图5中可以得知，偏置电流温度系数仅仅为0.014ppm/℃，在实际技术应用中可保证稳定的功率输出，达到产品 应用需求的温漂抑制效果。
对于本领域的技术人员来说，可根据以上描述的技术方案以及构思，做出其它各种相应的改变以及形变，而所有的这些改变以及形变都应该属于本发明权利要求的保护范围之内。

Claims (5)

  1. 一种基于GaAs HBT工艺的功放芯片偏置电路，在同一芯片内集成有温度补偿单元、多阶式正温度系数电压单元以及准电流镜偏置单元；
    其特征在于，
    所述的温度补偿单元包括二极管(D1)和第一电阻(R1)，所述的二极管(D1)正极连接电源电压(Vc)，负极一路经过第一电阻(R1)接地，另一路作为输出端连接至所述多阶式正温度系数电压单元；
    所述的多阶式正温度系数电压单元包括GaAs HBT工艺制作的若干HBT管，各HBT管均为各自的基极和集电极短接，且依次串联在温度补偿单元输出端与地之间；每一所述HBT管的集电极分别引出一路作为多阶式的电压输出端；
    所述的准电流镜偏置单元包括正温系数第二电阻(R2)和电流镜；所述的正温系数第二电阻(R2)一端作为所述准电流镜偏置单元的电压输入，另一端连接所述电流镜的输入侧；所述电流镜输出侧用于输出偏置电流(I bias)；
    所述准电流镜偏置单元的电压输入连接所述多阶式的电压输出端之一。
  2. 根据权利要求1所述基于GaAs HBT工艺的功放芯片偏置电路，其特征在于，所述的电流镜包括第一输入侧HBT管(M A0)和第一输出侧HBT管(M B0)；所述第一输入侧HBT管(M A0)的基极和集电极短接后连接所述正温系数第二电阻(R2)，发射极接地；所述第一输出侧HBT管(M B0)的基极连接所述第一输入侧HBT管(M A0)的基极，集电极外接基准电压(V REF)、发射极用于对外输出所述的偏置电流(I bias)。
  3. 根据权利要求2所述基于GaAs HBT工艺的功放芯片偏置电路， 其特征在于，所述的电流镜还包括电容(C1)，所述的电容(C1)并接在所述第一输入侧HBT管(M A0)和第一输出侧HBT管(M B0)各自的发射极之间。
  4. 根据权利要求1所述基于GaAs HBT工艺的功放芯片偏置电路，其特征在于，所述的电流镜包括第二输入侧HBT管(M A1)、第三输入侧HBT管(M A2)、第二输出侧HBT管(M B1)和第三输出侧HBT管(M B2)；
    所述的第二输入侧HBT管(M A1)集电极和基极短接后连接所述正温系数第二电阻(R2)，发射极连接第三输入侧HBT管(M A2)的发射极；
    所述的第三输入侧HBT管(M A2)发射极与基极短接，集电极接地；
    所述的第二输出侧HBT管(M B1)和第三输出侧HBT管(M B2)的基极均连接所述第二输入侧HBT管(M A1)基极，集电极均外接基准电压(V REF)，发射极共点后用于对外输出所述的偏置电流(I bias)。
  5. 根据权利要求4所述基于GaAs HBT工艺的功放芯片偏置电路，其特征在于，所述的电流镜还包括电容(C1)，所述的电容(C1)接在所述第二输出侧HBT管(M B1)发射极与地之间。
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