WO2021243532A1 - 电容检测电路、触控芯片和电子设备 - Google Patents

电容检测电路、触控芯片和电子设备 Download PDF

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WO2021243532A1
WO2021243532A1 PCT/CN2020/093850 CN2020093850W WO2021243532A1 WO 2021243532 A1 WO2021243532 A1 WO 2021243532A1 CN 2020093850 W CN2020093850 W CN 2020093850W WO 2021243532 A1 WO2021243532 A1 WO 2021243532A1
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Prior art keywords
circuit
capacitance
current
cca
measured
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PCT/CN2020/093850
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English (en)
French (fr)
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余倩
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深圳市汇顶科技股份有限公司
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Priority to PCT/CN2020/093850 priority Critical patent/WO2021243532A1/zh
Priority to US17/477,993 priority patent/US11714510B2/en
Publication of WO2021243532A1 publication Critical patent/WO2021243532A1/zh

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/94—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the way in which the control signals are generated
    • H03K17/96—Touch switches
    • H03K17/962—Capacitive touch switches
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R27/00—Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
    • G01R27/02—Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant
    • G01R27/26—Measuring inductance or capacitance; Measuring quality factor, e.g. by using the resonance method; Measuring loss factor; Measuring dielectric constants ; Measuring impedance or related variables
    • G01R27/2605—Measuring capacitance
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/044—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/044—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
    • G06F3/0446—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means using a grid-like structure of electrodes in at least two directions, e.g. using row and column electrodes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K2217/00—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00
    • H03K2217/94—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00 characterised by the way in which the control signal is generated
    • H03K2217/96—Touch switches
    • H03K2217/9607—Capacitive touch switches
    • H03K2217/96071—Capacitive touch switches characterised by the detection principle

Definitions

  • the embodiments of the present application relate to the field of capacitance detection, and more specifically, to a capacitance detection circuit, a touch chip, and an electronic device.
  • Capacitive sensors are widely used in electronic products to realize touch detection.
  • the capacitance value changes with the touch of a user's finger.
  • the capacitance detection circuit can read the capacitance change, thereby judging the user's operation based on the capacitance change, and achieving a better human-computer interaction experience.
  • the capacitance value of the touch screen is also increasing. How to effectively extract the small capacitance change without increasing the cost of the capacitance detection circuit has become an urgent problem to be solved.
  • the embodiments of the present application provide a capacitance detection circuit, a touch chip, and an electronic device, which can effectively extract small capacitance changes without increasing the cost of the capacitance detection circuit.
  • a capacitance detection circuit including:
  • the first input terminal and the second input terminal of the CCA circuit are respectively connected to the capacitor to be measured and the offset capacitor, the third input terminal of the CCA circuit is connected to the coding voltage, and the first output terminal of the CCA circuit is connected to the The second output terminal outputs the first current and the second current respectively, wherein the cancellation capacitance is smaller than the initial value of the capacitance to be measured;
  • PGA circuit two input terminals of the PGA circuit are respectively connected to the first output terminal and the second output terminal of the CCA circuit;
  • the ratio between the first current and the second current is set to be equal to the ratio between the initial value of the capacitance to be measured and the cancellation capacitance, so that when the capacitance to be measured is the initial value When the value is 0, the output of the PGA circuit is 0, and the output of the PGA circuit is associated with the capacitance change of the capacitance to be measured when the capacitance to be measured changes relative to the initial value.
  • the output stage of the CCA circuit includes a first circuit unit and a second circuit unit.
  • the first circuit unit includes a first P-channel Metal Oxide Semiconductor (PMOS) tube and a first N-channel Metal Oxide Semiconductor (PMOS) tube, so The drain of the first PMOS tube, the drain of the first NMOS tube, and the first output terminal of the CCA circuit are connected.
  • the second circuit unit includes a second PMOS tube and a second NMOS tube, the drain of the second PMOS tube, the drain of the second NMOS tube, and the second output terminal of the CCA circuit are connected .
  • the gate voltages of the first PMOS tube and the second PMOS tube are the same, and the gate voltages of the first NMOS tube and the second NMOS tube are the same.
  • the ratio between the aspect ratio of the first PMOS tube and the first NMOS tube and the aspect ratio of the second PMOS tube and the second NMOS tube is obtained.
  • the first current and the second circuit unit are obtained.
  • the ratio between the two currents are obtained.
  • the ratio between the first current and the second current output by the CCA circuit is adjustable
  • the cancellation capacitor is an adjustable capacitor, wherein, by adjusting the The ratio between the first current and the second current and/or the cancellation capacitance makes the output of the PGA circuit 0 when the capacitance to be measured is the initial value.
  • the ratio between the first current and the second current is between 5:1 and 10:1.
  • the PGA circuit includes a differential amplifier, and a feedback capacitor and a feedback resistor connected across the input terminal and the output terminal of the differential amplifier.
  • the coding voltage is a square wave signal or a sine wave signal.
  • a touch control chip including the capacitance detection circuit in the first aspect or any possible implementation of the first aspect.
  • an electronic device including:
  • the touch control chip in the second aspect or any possible implementation of the second aspect is not limited
  • the capacitance detection circuit is provided with a CCA circuit and a PGA circuit connected to the CCA circuit.
  • the input terminals of the CCA circuit are respectively connected with the capacitor to be measured and the cancellation capacitor, and the output terminals of the CCA circuit respectively output corresponding first current and second current.
  • the cancellation capacitance is smaller than the initial value of the capacitance to be measured, and the ratio between the first current and the second current is set to be equal to the ratio between the initial value of the capacitance to be measured and the cancellation capacitance.
  • the capacitance change of the capacitance to be measured can be obtained through the output signal of the PGA circuit, and since a smaller cancellation capacitance can be used to offset the initial value of the larger capacitance to be measured, the cost of the capacitance detection circuit is also reduced.
  • Figure 1 is based on a fully differential capacitance detection circuit.
  • Figure 2 is a capacitance detection circuit based on cancellation capacitance.
  • Fig. 3 is a schematic diagram of a capacitance detection circuit according to an embodiment of the present application.
  • FIG. 4 is a schematic diagram of a possible circuit structure of the CCA circuit of an embodiment of the present application.
  • FIG. 5 is a schematic diagram of a possible circuit structure of the CCA circuit of an embodiment of the present application.
  • the voltage input to the touch screen is often selected to be larger.
  • the detected capacitance value of the touch screen also becomes larger. In this case, the capacitance detection circuit is easily saturated. In order to prevent saturation of the capacitance detection circuit, a higher dynamic range of the circuit is required, which will cause the power consumption of the capacitance detection circuit to increase exponentially.
  • a large part of the data read by the capacitance detection circuit is the large capacitance of the touch screen itself, and this part of the data is redundant data that does not carry effective information for the capacitance change caused by the touch.
  • some methods can be used to circumvent the need for a large dynamic range.
  • the front end of the circuit performs full differential on the data of adjacent read channels.
  • the adjacent touch screen capacitors are connected to the positive and negative ends of the differential, and the differential operation amplifier is used to amplify the current or charge of the differential mode at both ends, thereby suppressing the common mode signal, interference and noise. Since the interference signals received by adjacent channels are basically the same, and the capacitance of the touch screen on the adjacent channels is also similar, the interference signal and the capacitance signal of the touch screen itself will be effectively suppressed as a common mode.
  • the dynamics of the capacitance detection circuit The scope requirements have also been reduced a lot.
  • V CM is the front-end circuit Gm
  • the capacitance C T needs to be equal to C S1 , so that the canceled voltage can be the common mode voltage of the front-end circuit.
  • the capacitance of the touch screen itself becomes larger and larger, the capacitance C T required for offset also increases, and the area of the chip where the capacitance detection circuit is located increases accordingly, resulting in high chip cost.
  • the present application provides a capacitance detection circuit, which can use a smaller cancellation capacitance to cancel a larger touch screen capacitance, so as to effectively extract a small amount of capacitance change without increasing the cost of the capacitance detection circuit.
  • FIG. 3 is a possible circuit structure of the capacitance detection circuit of the embodiment of the present application.
  • the capacitance detection circuit 300 includes a common mode control amplifier (CCA) circuit 310 and a programmable gain amplifier (Programmable Gain Amplifier, PGA) circuit 320.
  • CCA common mode control amplifier
  • PGA programmable gain amplifier
  • the first input terminal and the second input terminal of the CCA circuit 310 are respectively connected to the capacitor to be measured 331 and the cancellation capacitor 332, the third input terminal of the CCA circuit 310 is connected to the coding voltage, and the first output terminal and the second output terminal of the CCA circuit 310 are connected to the coding voltage.
  • the output terminals respectively output the first current I1 and the second current I2.
  • the coding voltage may be a square wave signal or a sine wave signal, for example.
  • the two input terminals of the PGA circuit 320 are respectively connected to the first output terminal and the second output terminal of the CCA circuit 310.
  • the cancellation capacitance 332 is smaller than the initial value of the capacitance 331 to be measured.
  • the ratio between the first current I1 and the second current I2 is set to be equal to the ratio between the initial value of the capacitance to be measured 331 and the cancellation capacitance 332, so that the PGA circuit 320 is the initial value of the capacitance to be measured.
  • the output of is 0, and the output of the PGA circuit 320 when the capacitance to be measured changes relative to the initial value is associated with the capacitance change of the capacitance to be measured.
  • the output of the PGA circuit 320 described in the embodiment of the application is 0, which may mean that the signal value output by the PGA circuit 320 is 0; or that the signal value output by the PGA circuit 320 is within the allowable value. Within the range, it can be considered that the output is basically 0.
  • the ratio between the first current I1 and the second current I2 output by the CCA circuit 310 is set to be equal to the ratio between the initial value of the capacitance to be measured 331 and the cancellation capacitance 332.
  • the cancellation capacitance 332 can be made smaller than the initial value of the capacitance to be measured 331; on the other hand, due to the difference between the first current I1 and the second current I2
  • the ratio between the measured capacitance 331 and the offset capacitance 332 is equal to the ratio between the initial value of the measured capacitance 331 and the offset capacitance 332.
  • the output of the PGA circuit 320 is 0, and when the measured capacitance 331 is relative to the initial value
  • the output of the PGA circuit 320 is correlated with the capacitance change of the capacitor 331 to be measured.
  • the capacitance change of the capacitance to be measured 331 can be obtained according to the output signal of the PGA circuit 320, and since a smaller cancellation capacitance 332 can be used to cancel the initial value of the larger capacitance to be measured 331, the capacitance detection circuit is also reduced. the cost of.
  • the initial value of the capacitance 331 to be measured may be, for example, between the horizontal and vertical electrodes of the touch screen when the finger is not touching the touch screen.
  • the two input ports of the CCA circuit 310 are respectively connected to the capacitor to be measured 331 and the cancellation capacitor 332.
  • the two output ports of the CCA circuit 310 can output common mode currents I1 and I2, so that the voltage on the capacitor to be measured 331 and the cancellation capacitor 332 is equal to the common mode voltage.
  • C S is the initial value of the capacitance 331 to be measured, or a basic value, for example, the capacitance of the touch screen itself.
  • C S is the initial value of the capacitance 331 to be measured, or a basic value, for example, the capacitance of the touch screen itself.
  • the current ratio of current I1 and the current I2 is set to M: N
  • FIG. 4 shows a possible circuit structure of the CCA circuit 310.
  • VNI and VN2 in FIG. 4 are the voltages corresponding to the first input terminal and the second input terminal of the CCA circuit 310 in FIG. 3;
  • VP is the voltage corresponding to the third input terminal, namely V DRV in FIG. 3;
  • VO1 and VO2 These are the voltages corresponding to the two output terminals of the CCA circuit 310 in FIG. 3, and the corresponding currents are the above-mentioned I1 and I2, respectively.
  • the output stage of the CCA circuit 310 includes a first circuit unit 311 and a second circuit unit 312.
  • the first circuit unit 311 includes a first PMOS tube 3111 and a first NMOS tube 3112, the drain of the first PMOS tube 3111, the drain of the first NMOS tube 3112, and the first output terminal of the CCA circuit 310 ( VO1) is connected.
  • the second circuit unit 312 includes a second PMOS tube 3121 and a second NMOS tube 3122, the drain of the second PMOS tube 3121, the drain of the second NMOS tube 3122, and the second output terminal (VO2) of the CCA circuit 310 Connected.
  • the gate voltages of the first PMOS tube 3111 and the second PMOS tube 3121 are the same, and the gate voltages of the first NMOS tube 3112 and the second NMOS tube 3122 are the same.
  • the first transistor circuit 311 is used to output the first current I1
  • the second transistor circuit 312 is used to output the second current I2.
  • the first circuit unit 311 and the second circuit unit 312 of the output stage of the CCA circuit 310 can be configured, for example, the width/length ratio (Width/Length, W/ L), or configure the number of the first circuit unit 311 and the second circuit unit 312, etc., to control the magnitude of the first current I1 and the second current I2 output by the CCA circuit 310.
  • the ratio between obtains the ratio between the first current I1 and the second current I2.
  • the aspect ratios of the first PMOS tube 3111 and the first NMOS tube 3112 are both M:1
  • the aspect ratios of the second PMOS tube 3121 and the second NMOS tube 3122 are both N:1
  • the ratio between the number of first circuit units 311 and the number of second circuit units 312 included in the CCA circuit 310 is obtained.
  • the output stage of the CCA circuit 310 includes M first circuit units 311 connected in parallel and N second circuit units 312 connected in parallel, then the first circuit unit 311 and the second circuit unit 312 output respectively
  • the ratio between the first current I1 and the second current I2 can be set according to the characteristics of the touch screen and the requirements for the offset capacitance.
  • the capacitance value C C of the cancellation capacitor 332 may be 1/5 to 1/15, such as 1/10, of the initial value C S of the capacitor 331 to be measured.
  • the ratio between the first current I1 and the second current I2 output by the CCA circuit 310 may be adjustable.
  • the cancellation capacitor 332 may also be an adjustable capacitor. Wherein, by adjusting the ratio I1:I2 between the first current I1 and the second current I2, and/or adjusting the capacitance value C C of the cancellation capacitor 332, the capacitance value of the capacitor under test 331 can be made equal to the initial value C S The voltage V OUT output by the lower PGA circuit 320 is zero.
  • Multiple gears can be set at the output stage of the CCA circuit 310.
  • multiple gear positions are set for the first circuit unit 311 and the second circuit unit 312, wherein the width-to-length ratios of the MOS tubes corresponding to different gear positions are different; for another example, as shown in FIG. 5, the current gear is selected by the gear switch.
  • the number of first circuit units 311 and the number of second circuit units 312 that need to be connected in parallel, for example, when M first circuit units 311 and N second circuit units 312 are selected, I1:I2 M:N.
  • the voltage signal V OUT output by the PGA circuit 320 can be substantially zero.
  • the capacitance change of the capacitance to be measured 331 caused by the touch can be known.
  • the PGA circuit 320 includes, for example, a differential amplifier PGA, and a feedback capacitor C F and a feedback resistor R F connected between the input terminal and the output terminal of the differential amplifier PGA.
  • the embodiments of the present application also provide a touch control chip, which includes the above-mentioned capacitance detection circuit in the various embodiments of the present application.
  • the embodiments of the present application also provide an electronic device, which includes: a touch screen; and the touch chip in the various embodiments of the present application described above.
  • the electronic devices in the embodiments of the present application may be portable or mobile computing devices such as terminal devices, mobile phones, tablet computers, notebook computers, desktop computers, gaming devices, in-vehicle electronic devices, or wearable smart devices, and Electronic databases, automobiles, bank automated teller machines (Automated Teller Machine, ATM) and other electronic equipment.
  • the wearable smart device includes full-featured, large-sized, complete or partial functions that can be realized without relying on smart phones, such as smart watches or smart glasses, etc., and only focus on a certain type of application function, and need to cooperate with other devices such as smart phones Use, such as various types of smart bracelets, smart jewelry and other equipment for physical sign monitoring.

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  • Theoretical Computer Science (AREA)
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Abstract

一种电容检测电路、触控芯片和电子设备，能够有效提取电容变化量且不增加电路成本。电容检测电路（300）包括：CCA电路（310），CCA电路（310）的第一输入端和第二输入端分别连接待测电容（331）和抵消电容（332），CCA电路（310）的第三输入端连接打码电压，CCA电路（310）的第一输出端和第二输出端分别输出第一电流和第二电流，该抵消电容（332）小于该待测电容（331）的初始值；PGA电路（320），PGA电路（320）的两个输入端分别与CCA电路（310）的两个输出端相连；其中，该第一电流与该第二电流之间的比例被设置为等于待测电容（331）的初始值和抵消电容（332）之间的比例，以在待测电容（331）为该初始值时PGA电路（320）的输出为0，以及在待测电容（331）相对于该初始值变化时PGA电路（320）的输出与该待测电容（331）的电容变化量相关联。

Description

电容检测电路、触控芯片和电子设备 技术领域
本申请实施例涉及电容检测领域，并且更具体地，涉及一种电容检测电路、触控芯片和电子设备。
背景技术
电容式传感器广泛应用于电子产品中，用来实现触摸检测。在电容式传感器中，电容值会随着用户手指的触摸而发生变化。通过电容检测电路可以读取电容的变化，从而基于电容的变化判断用户的操作，达到更好的人机交互体验。随着触摸屏尺寸的增加和屏体技术的更新，触摸屏的电容值也在增大，如何有效地提取微小的电容变化量并且不增加电容检测电路的成本，成为亟待解决的问题。
发明内容
本申请实施例提供一种电容检测电路、触控芯片和电子设备，能够有效地提取微小的电容变化量，并且不增加电容检测电路的成本。
第一方面，提供了一种电容检测电路，包括：
CCA电路，所述CCA电路的第一输入端和第二输入端分别连接待测电容和抵消电容，所述CCA电路的第三输入端连接打码电压，所述CCA电路的第一输出端和第二输出端分别输出第一电流和第二电流，其中，所述抵消电容小于所述待测电容的初始值；
PGA电路，所述PGA电路的两个输入端分别与所述CCA电路的所述第一输出端和所述第二输出端相连；
其中，所述第一电流与所述第二电流之间的比例被设置为等于所述待测电容的初始值和所述抵消电容之间的比例，以在所述待测电容为所述初始值时所述PGA电路的输出为0，以及在所述待测电容相对于所述初始值变化时所述PGA电路的输出与所述待测电容的电容变化量相关联。
在一种可能的实现方式中，所述CCA电路的输出级包括第一电路单元和第二电路单元。所述第一电路单元包括第一P沟道金属氧化物半导体(P-channel Metal Oxide Semiconductor，PMOS)管和第一N沟道金属氧化 物半导体(N-channel Metal Oxide Semiconductor，PMOS)管，所述第一PMOS管的漏极、所述第一NMOS管的漏极、以及所述CCA电路的所述第一输出端相连。所述第二电路单元包括第二PMOS管和第二NMOS管，所述第二PMOS管的漏极、所述第二NMOS管的漏极、以及所述CCA电路的所述第二输出端相连。所述第一PMOS管和所述第二PMOS管的栅极电压相同，所述第一NMOS管和所述第二NMOS管的栅极电压相同。
在一种可能的实现方式中，通过设置所述第一PMOS管和第一NMOS管的宽长比，与所述第二PMOS管和所述第二NMOS管的宽长比之间的比例，得到所述第一电流与所述第二电流之间的比例。
在一种可能的实现方式中，通过设置所述CCA电路中包括的所述第一电路单元的数量与所述第二电路单元的数量之间的比例，得到所述第一电流与所述第二电流之间的比例。
在一种可能的实现方式中，所述CCA电路输出的所述第一电流和所述第二电流之间的比例是可调的，所述抵消电容为可调电容，其中，通过调节所述第一电流和所述第二电流之间的比例和/或所述抵消电容，使得所述待测电容为所述初始值时所述PGA电路的输出为0。
在一种可能的实现方式中，所述第一电流与所述第二电流之间的比例位于5：1至10：1之间。
在一种可能的实现方式中，所述PGA电路包括差分放大器、以及跨接在所述差分放大器的输入端和输出端之间的反馈电容和反馈电阻。
在一种可能的实现方式中，所述打码电压为方波信号或者正弦波信号。
第二方面，提供了一种触控芯片，包括第一方面或第一方面的任意可能的实现方式中的电容检测电路。
第三方面，提供了一种电子设备，包括：
触摸屏；以及，
第二方面或第二方面的任意可能的实现方式中的触控芯片。
基于上述技术方案，电容检测电路中设置有CCA电路和与CCA电路相连的PGA电路。该CCA电路的输入端分别与待测电容和抵消电容相连，该CCA电路的输出端分别输出对应的第一电流和第二电流。抵消电容小于待测电容的初始值，且该第一电流和该第二电流之间的比例被设置为等于待测电容的初始值和抵消电容之间的比例。从而在待测电容为该初始值时，该 PGA电路的输出为0，而在待测电容相对于该初始值变化时，该PGA电路的输出与该待测电容的电容变化量相关联。因此，通过该PGA电路的输出的信号即可获取待测电容的电容变化量，并且由于可以采用较小的抵消电容抵消较大的待测电容的初始值，也降低了电容检测电路的成本。
附图说明
图1是基于全差分的电容检测电路。
图2是基于抵消电容的电容检测电路。
图3是本申请实施例的电容检测电路的示意图。
图4是本申请实施例的CCA电路的一种可能的电路结构的示意图。
图5是本申请实施例的CCA电路的一种可能的电路结构的示意图。
具体实施方式
下面将结合附图，对本申请中的技术方案进行描述。
对于电容式传感器来说，触摸屏本身的电容值越大，提取触摸所引起的微小的电容变化量越难。为了加大电容变化量的检测的灵敏度，输入到触摸屏的电压往往选取的更大。在检测电容变化量时，检测到的触摸屏的电容值也同样变大。在这种情况下，电容检测电路很容易饱和。为了防止电容检测电路发生饱和，需要更高的电路动态范围，这会导致电容检测电路的功耗成倍增加。
而且，电容检测电路读取到的数据中很大一部分是触摸屏本身的大电容，这部分数据对于触摸所引起的电容变化而言是不携带有效信息的冗余数据。为了达到更低功耗和更高信噪比的电容检测电路，以及提高存储有效信息的效率，目前可以采用一些方式来规避大动态范围的需求。
一种方式是，电路前端对相邻读取通道的数据进行全差分。这样，在差分的正负两端分别接相邻的触摸屏电容，通过差分运算放大器来放大两端差模的电流或者电荷，从而抑制共模的信号、干扰以及噪声。由于相邻通道受到的干扰信号是基本一样的，且相邻通道上的触摸屏本身电容也相近，那么干扰信号和触摸屏本身的电容信号就会作为共模而得到有效的抑制，电容检测电路的动态范围的要求也就降低了很多。但是，由于这种差分电路要求对相邻通道同时读取数据，往往需要分时做两次差分以获得所有相邻通道的差， 保存并且还原所有通道的电容变化量。例如图1所示，假设差分运算放大器对三个检测通道进行差分，需要分时进行两次差分，才能得到全部检测通道对应的电容变化量。可见，分时读取数据会损失触摸屏信号读取的刷新率，所以在高刷新率的电子设备中是很难接受的，并且，差分数据在触摸检测的定位算法中的使用也有待验证。
另外一种方式是，对触摸屏本身的大电容进行抵消。在该方案中，在电容检测电路读取电容值之前，抵消电路会针对触摸屏本身电容进行抵消，在电压、电荷或者电流域减去触摸屏本身电容。减去触摸屏大电容后，触摸引起的微小的电容变化量会被作为有效信号读取出来。例如图2所示，当待测电容C S1接打码电压V dd时，用于抵消电荷量的电容C T接地，则待测电容C S1与电容C T上的电荷量分别为C S1×V dd和0。在进行电荷抵消时，待测电容C S1与电容C T的上极板相连，总的电荷量为C S1×V dd＝(C S1+C T)×V CM，其中V CM是前端电路Gm的输入端的共模电压，即1/2V dd。那么，电容C T需要等于C S1，才可以使抵消后的电压为前端电路的共模电压。随着触摸屏本身电容越来越大，所需要的用于抵消的电容C T也随之增大，电容检测电路所在芯片的面积随之增大，就导致芯片成本很高。
为此，本申请提供了一种电容检测电路，能够利用较小的抵消电容抵消较大的触摸屏电容，以在有效地提取微小的电容变化量的同时不增加电容检测电路的成本。
图3是本申请实施例的电容检测电路的一种可能的电路结构。如图3所示，该电容检测电路300包括共模控制放大器(Common mode Control Amplifier，CCA)电路310和可编程增益放大器(Programmable Gain Amplifier，PGA)电路320。
其中，CCA电路310的第一输入端和第二输入端分别连接待测电容331和抵消电容332，CCA电路310的第三输入端连接打码电压，CCA电路310的第一输出端和第二输出端分别输出第一电流I1和第二电流I2。
该打码电压例如可以是方波信号或者正弦波信号。
其中，PGA电路320的两个输入端分别与CCA电路310的该第一输出端和该第二输出端相连。
抵消电容332小于该待测电容331的初始值。
该第一电流I1与该第二电流I2之间的比例被设置为等于该待测电容331 的初始值和抵消电容332之间的比例，以在该待测电容为该初始值时PGA电路320的输出为0，以及在该待测电容相对于该初始值变化时PGA电路320的输出与该待测电容的电容变化量相关联。
应理解，在实际应用中，本申请实施例中所描述的PGA电路320的输出为0，可以指PGA电路320输出的信号值为0；或者指PGA电路320输出的该信号值在所允许的范围内，可认为输出基本为0。
该实施例中，CCA电路310输出的第一电流I1和第二电流I2之间的比例被设置为等于待测电容331的初始值和抵消电容332之间的比例。一方面，可以通过设置该第一电流I1和该第二电流I2之间的比例，使抵消电容332小于待测电容331的初始值；另一方面，由于第一电流I1和第二电流I2之间的比例等于待测电容331的初始值和抵消电容332之间的比例，因此当待测电容331等于该初始值时，PGA电路320的输出为0，而当待测电容331相对于该初始值变化时，PGA电路320的输出与待测电容331的电容变化量相关联。这样，根据PGA电路320的输出的信号即可获取待测电容331的电容变化量，并且由于可以采用较小的抵消电容332抵消较大的待测电容331的初始值，也降低了电容检测电路的成本。
当电容检测电路300应用在触摸领域时，例如应用在互容检测的触摸屏中，那么待测电容331的初始值，例如可以是手指未触摸该触摸屏时，该触摸屏的横向电极和纵向电极之间的电容值；而待测电容331的电容变化量，例如可以是有手指触摸该触摸屏时，该触摸屏的横向电极和纵向电极之间的互电容值相对于该初始值的电容变化量，该电容变化量是由手指触摸引入的。
下面结合图3，对CCA电路310的工作原理进行详细说明。
如图3所示，CCA电路310的两个输入端口分别连接待测电容331和抵消电容332。CCA电路310的两个输出端口可以输出共模电流I1和I2，以使待测电容331和抵消电容332上的电压等于共模电压。当CCA电路310的另一输入端口连接打码电压V DRV时，如果抵消电容332的电容值C C等于待测电容331的电容值C S，即C C＝C S，则待测电容331上的共模电流i s＝sC s×V DRV，抵消电容332上的共模电流i c＝sC c×V DRV。电流i s和i c会由CCA电路310流出或者流入，后级的PGA电路320看不到共模电流，所以PGA电路320的输出接近于0。其中，C S为待测电容331的初始值，或者说是基础值，例如可以是触摸屏本身的电容。当待测电容331的电容值在初始值 C S的基础上发生变化时，例如由C S变化至C S+△C，则会产生差模电流，该电流会输入至PGA电路320，PGA电路320的差分输出端的电压变化就反映了待测电容331的电容变化量△C。通过PGA电路320输出的电压信号V OUT，就可以获取待测电容331的电容变化量△C。
进一步地，当电流I1和电流I2的电流比例设置为M：N时，待测电容331的初始值C S与抵消电容332的电容值C C之间的比例就可以为M：N。当N＜M时，可以实现用N/M倍的抵消电容332去抵消触摸屏本身的大电容C S，即，使用C C＝(N/M)×C S抵消C S。假设M＝10N，则只有1/10的C S需要做到芯片内部，实现了利用小面积低成本的芯片去抵消触摸屏的大电容负载。
本申请实施例对CCA电路310的具体结构不做限定，能够实现上述功能的其他共模控制电路均适用于本申请。图4所示为CCA电路310的一种可能的电路结构。图4中的VNI和VN2即为图3中CCA电路310的第一输入端和第二输入端对应的电压；VP为第三输入端对应的电压，即图3中的V DRV；VO1和VO2分别为图3中CCA电路310的两个输出端对应的电压，对应的电流分别为上述I1和I2。
如图4所示，CCA电路310的输出级包括第一电路单元311和第二电路单元312。其中，第一电路单元311包括第一PMOS管3111和第一NMOS管3112，该第一PMOS管3111的漏极、该第一NMOS管3112的漏极、以及CCA电路310的第一输出端(VO1)相连。第二电路单元312包括第二PMOS管3121和第二NMOS管3122，该第二PMOS管3121的漏极、该第二NMOS管3122的漏极、以及CCA电路310的第二输出端(VO2)相连。其中，第一PMOS管3111和第二PMOS管3121的栅极电压相同，第一NMOS管3112和第二NMOS管3122的栅极电压相同。
第一晶体管电路311用于输出第一电流I1，第二晶体管电路312用于输出第二电流I2。可以通过配置CCA电路310的输出级的第一电路单元311和第二电路单元312，例如配置第一电路单元311和第二电路单元312中的MOS管的宽长比(Width/Length，W/L)，或者配置第一电路单元311和第二电路单元312的数量等，来控制CCA电路310输出的第一电流I1和第二电流I2的大小。
例如，通过设置第一电路单元331中的第一PMOS管3111和第一NMOS 管3112的宽长比，与第二电路单元312中的第二PMOS管3121和第二NMOS管3122的宽长比之间的比例，得到第一电流I1与第二电流I2之间的比例。
假设第一PMOS管3111和第一NMOS管3112的宽长比均为M：1，第二PMOS管3121和第二NMOS管3122的宽长比均为N：1，则第一电流I1和第二电流I2之间的比例I1：I2＝M：N。
又例如，通过设置CCA电路310中包括的第一电路单元311的数量与第二电路单元312的数量之间的比例，得到第一电流I1与第二电流I2之间的比例。
例如图5所示，假设设置CCA电路310的输出级中包括并联的M个第一电路单元311以及并联的N个第二电路单元312，那么第一电路单元311和第二电路单元312分别输出的第一电流I1与第二电流I2之间的比例I1：I2＝M：N。
第一电流I1与第二电流I2之间的比例可以根据触摸屏的特性和对抵消电容的要求等进行设置，例如I1：I2可以位于5：1至15：1之间比如I1：I2＝10：1。相应地，抵消电容332的电容值C C可以是待测电容331的初始值C S的1/5至1/15比如1/10。
本申请实施例中，CCA电路310输出的第一电流I1和第二电流I2之间的比例可以是可调的。抵消电容332也可以为可调电容。其中，通过调节第一电流I1和第二电流I2之间的比例I1：I2，和/或调节抵消电容332的电容值C C，可以使得待测电容331的电容值等于初始值C S的情况下PGA电路320输出的电压V OUT为0。
可以在CCA电路310的输出级设置多个档位。例如，针对第一电路单元311和第二电路单元312分别设置多个档位，其中不同档位对应的MOS管的宽长比不同；又例如，如图5所示，通过档位开关选择当前需要并联连接的第一电路单元311的数量和第二电路单元312的数量，比如当选择M个第一电路单元311和N个第二电路单元312时，I1：I2＝M：N。因此，在初始时，通过对CCA电路310的档位调节，和/或对抵消电容332的电容值进行调节，可以使PGA电路320输出的电压信号V OUT为基本0。之后，在进行电容检测时，如果有手指触摸，则根据PGA电路320输出的电压信号V OUT的变化，就可以知道该触摸所引起的待测电容331的电容变化量。
如图3所示，PGA电路320例如包括差分放大器PGA、以及跨接在差 分放大器PGA的输入端和输出端之间的反馈电容C F和反馈电阻R F。
本申请实施例还提供一种触控芯片，包括上述本申请各种实施例中的电容检测电路。
本申请实施例还提供了一种电子设备，该电子设备包括：触摸屏；以及，上述本申请各种实施例中的触控芯片。
作为示例而非限定，本申请实施例中的电子设备可以为终端设备、手机、平板电脑、笔记本电脑、台式机电脑、游戏设备、车载电子设备或穿戴式智能设备等便携式或移动计算设备，以及电子数据库、汽车、银行自动柜员机(Automated Teller Machine，ATM)等其他电子设备。该穿戴式智能设备包括功能全、尺寸大、可不依赖智能手机实现完整或部分的功能，例如：智能手表或智能眼镜等，以及只专注于某一类应用功能，需要和其它设备如智能手机配合使用，如各类进行体征监测的智能手环、智能首饰等设备。
需要说明的是，在不冲突的前提下，本申请描述的各个实施例和/或各个实施例中的技术特征可以任意的相互组合，组合之后得到的技术方案也应落入本申请的保护范围。
应理解，本申请实施例中的具体的例子只是为了帮助本领域技术人员更好地理解本申请实施例，而非限制本申请实施例的范围，本领域技术人员可以在上述实施例的基础上进行各种改进和变形，而这些改进或者变形均落在本申请的保护范围内。
以上所述，仅为本申请的具体实施方式，但本申请的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本申请揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本申请的保护范围之内。因此，本申请的保护范围应以所述权利要求的保护范围为准。

Claims (10)

  1. 一种电容检测电路，其特征在于，包括：
    共模控制放大器CCA电路，所述CCA电路的第一输入端和第二输入端分别连接待测电容和抵消电容，所述CCA电路的第三输入端连接打码电压，所述CCA电路的第一输出端和第二输出端分别输出第一电流和第二电流，其中，所述抵消电容小于所述待测电容的初始值；
    可编程增益放大器PGA电路，所述PGA电路的两个输入端分别与所述CCA电路的所述第一输出端和所述第二输出端相连；
    其中，所述第一电流与所述第二电流之间的比例被设置为等于所述待测电容的初始值和所述抵消电容之间的比例，以在所述待测电容为所述初始值时所述PGA电路的输出为0，以及在所述待测电容相对于所述初始值变化时所述PGA电路的输出与所述待测电容的电容变化量相关联。
  2. 根据权利要求1所述的电容检测电路，其特征在于，所述CCA电路的输出级包括第一电路单元和第二电路单元，
    所述第一电路单元包括第一PMOS管和第一NMOS管，所述第一PMOS管的漏极、所述第一NMOS管的漏极、以及所述CCA电路的所述第一输出端相连，
    所述第二电路单元包括第二PMOS管和第二NMOS管，所述第二PMOS管的漏极、所述第二NMOS管的漏极、以及所述CCA电路的所述第二输出端相连，
    所述第一PMOS管和所述第二PMOS管的栅极电压相同，所述第一NMOS管和所述第二NMOS管的栅极电压相同。
  3. 根据权利要求2所述的电容检测电路，其特征在于，通过设置所述第一PMOS管和第一NMOS管的宽长比，与所述第二PMOS管和所述第二NMOS管的宽长比之间的比例，得到所述第一电流与所述第二电流之间的比例。
  4. 根据权利要求2所述的电容检测电路，其特征在于，通过设置所述CCA电路中包括的所述第一电路单元的数量与所述第二电路单元的数量之间的比例，得到所述第一电流与所述第二电流之间的比例。
  5. 根据权利要求1至4中任一项所述的电容检测电路，所述CCA电路输出的所述第一电流和所述第二电流之间的比例是可调的，所述抵消电容为 可调电容，其中，通过调节所述第一电流和所述第二电流之间的比例和/或所述抵消电容，使得所述待测电容为所述初始值时所述PGA电路的输出为0。
  6. 根据权利要求1至5中任一项所述的电容检测电路，其特征在于，所述第一电流与所述第二电流之间的比例位于5：1至10：1之间。
  7. 根据权利要求1至6中任一项所述的电容检测电路，其特征在于，所述PGA电路包括差分放大器、以及跨接在所述差分放大器的输入端和输出端之间的反馈电容和反馈电阻。
  8. 根据权利要求1至7中任一项所述的电容检测电路，其特征在于，所述打码电压为方波信号或者正弦波信号。
  9. 一种触摸芯片，其特征在于，包括前述权利要求1至8中任一项所述的电容检测电路。
  10. 一种电子设备，其特征在于，包括：
    触摸屏；以及，
    根据权利要求9所述的触控芯片。
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