WO2021238675A1 - 一种集成有温度传感器的igbt芯片 - Google Patents

一种集成有温度传感器的igbt芯片 Download PDF

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Publication number
WO2021238675A1
WO2021238675A1 PCT/CN2021/093711 CN2021093711W WO2021238675A1 WO 2021238675 A1 WO2021238675 A1 WO 2021238675A1 CN 2021093711 W CN2021093711 W CN 2021093711W WO 2021238675 A1 WO2021238675 A1 WO 2021238675A1
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Prior art keywords
gate
temperature sensor
metal
solder joint
polysilicon
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PCT/CN2021/093711
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English (en)
French (fr)
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黄伯宁
杨文韬
王军鹤
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华为技术有限公司
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Priority to EP21813902.0A priority Critical patent/EP4145509A4/en
Publication of WO2021238675A1 publication Critical patent/WO2021238675A1/zh
Priority to US17/994,053 priority patent/US20230087724A1/en

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    • H—ELECTRICITY
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    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/0203—Particular design considerations for integrated circuits
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    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
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    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
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    • H01L27/0629—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with diodes, or resistors, or capacitors
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01K—MEASURING TEMPERATURE; MEASURING QUANTITY OF HEAT; THERMALLY-SENSITIVE ELEMENTS NOT OTHERWISE PROVIDED FOR
    • G01K7/00—Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements
    • G01K7/01—Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements using semiconducting elements having PN junctions
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    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
    • H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
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    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
    • H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
    • H01L29/7395—Vertical transistors, e.g. vertical IGBT
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    • H01L29/861—Diodes
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01K—MEASURING TEMPERATURE; MEASURING QUANTITY OF HEAT; THERMALLY-SENSITIVE ELEMENTS NOT OTHERWISE PROVIDED FOR
    • G01K7/00—Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements
    • G01K7/16—Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements using resistive elements
    • G01K7/22—Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements using resistive elements the element being a non-linear resistance, e.g. thermistor
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    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
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Definitions

  • This application relates to the technical field of power devices, and in particular to an IGBT chip integrated with a temperature sensor.
  • IGBT insulated gate bipolar transistor
  • a temperature sensor such as a thermistor
  • the IGBT chip can be packaged together. Since the distance between the temperature sensor and the IGBT chip is relatively close, the temperature of the IGBT chip can be obtained through the temperature sensor. However, because there is still a certain distance between the temperature sensor and the IGBT chip, the heat of the IGBT chip is partially conducted to the temperature sensor and the response speed is slow, which will cause the temperature sensor to reduce the accuracy of the temperature monitoring of the IGBT chip.
  • the temperature sensor can be directly integrated in the IGBT chip.
  • the response time constant during temperature monitoring is very small, and the measured temperature can be obtained more quickly and accurately.
  • the distance between the signal line on the IGBT chip and the metal lead of the temperature sensor is relatively close, which easily interferes with the monitoring signal transmitted on the metal lead of the temperature sensor, which leads to temperature transmission. The accuracy of the sensor is low, so the temperature of the IGBT chip is still not accurately obtained.
  • the embodiment of the present application provides an IGBT chip integrated with a temperature sensor, which can improve the accuracy of temperature monitoring of the IGBT chip.
  • the IGBT chip includes a cell area, an emitter solder joint, a gate solder joint, a gate interdigital structure, a temperature sensor module, and Conductive shielding structure; wherein the cell area is composed of multiple IGBT cells; emitter solder joints are arranged on the cell area and are electrically connected to the emitters of the multiple IGBT cells; gate solder joints and gate fingers The structures are all located inside the cell area, and the gate interdigital structure is connected between the gate solder joints and the gates of multiple IGBT cells; the temperature sensing module includes a temperature sensor, an anode solder joint, a cathode solder joint, and The temperature sensor, the metal lead between the anode solder joint and the cathode solder joint.
  • the temperature sensor and part of the metal lead are located inside the grid interdigital structure and insulated from the grid interdigital structure; the conductive shielding structure is set at least on the metal lead The part in the gate interdigital structure is insulated from the gate interdigital structure, and is insulated from the metal lead and the gate interdigital structure, and the conductive shielding structure is electrically connected to the emitter solder joint.
  • the IGBT chip since the IGBT chip includes a cell area, an emitter solder joint, a gate solder joint, a gate interdigital structure and a temperature sensing module, the gate interdigital structure passes through the cell area.
  • the temperature sensor and at least part of the metal leads of the temperature sensing module are located inside the gate interdigital structure, so the true temperature of the IGBT chip can be monitored by the temperature sensor, thereby improving the accuracy of temperature monitoring.
  • the IGBT chip also includes a conductive shielding structure
  • the conductive shielding structure is arranged at least between the gate interdigital structure and the gate interdigital structure on the metal lead, and the conductive shielding structure is electrically connected to the emitter solder joint ,
  • the emitter solder joint is usually grounded, so the transmission signal in the metal lead and the transmission signal in the gate interdigital structure can be shielded by the conductive shielding structure to prevent the transmission signal in the metal lead and the gate interdigital structure Crosstalk is generated between the transmitted signals, so as to ensure the accuracy of sampling and monitoring of the temperature sensor module.
  • the gate interdigital structure includes a first polysilicon trace, a first metal trace, and a first contact hole, and the first polysilicon trace and the first metal trace are separated by a dielectric layer, The first polysilicon trace and the first metal trace are electrically connected through the first contact hole; the conductive shielding structure is arranged at least between the portion of the metal lead located in the gate interdigital structure and the first metal trace Metal wire.
  • the structure is simple and the cost is low.
  • the first metal wiring, the metal lead and the conductive shielding structure are etched from the same layer of metal. In this way, the production efficiency of the first metal wiring, the metal lead, and the conductive shielding structure is relatively high.
  • the gate interdigital structure includes a first polysilicon trace, a first metal trace, and a first contact hole, and the first polysilicon trace and the first metal trace are separated by a dielectric layer, The first polysilicon trace and the first metal trace are electrically connected through a first contact hole;
  • the conductive shielding structure includes a second polysilicon trace, a second metal trace, and a second contact hole, and the second polysilicon trace The silicon trace and the second metal trace are separated by a dielectric layer, and the second polysilicon trace and the second metal trace are electrically connected through a second contact hole, and the second polysilicon trace is at least in the metal Between the portion of the lead located in the gate interdigital structure and the first polysilicon wiring, and the second metal wiring is located at least between the portion of the metal lead located in the gate interdigital structure and the first metal wiring, The conductive shielding structure is electrically connected to the emitter solder joint through the second metal wiring.
  • the conductive shielding structure of this structure forms the shielding channel with
  • a portion of the gate interdigital structure between the conductive shielding structure and the emitter solder joint is provided with a first break point, and the electrical connection line between the conductive shield structure and the emitter solder joint is passed through the second Within a breakpoint.
  • the IGBT chip further includes a gate wiring and a terminal area.
  • the gate wiring is arranged on the edge of the cell area, and the terminal area is arranged on the periphery of the cell area; a metal ring line is arranged in the terminal area, and the metal ring line It is arranged around a circumference of the cell area, and the metal ring wire is electrically connected to the emitter solder joint; the part of the gate trace between the conductive shielding structure and the metal ring wire is provided with a second break point, the conductive shielding structure and the metal ring wire It is electrically connected, and the electrical connection line between the conductive shielding structure and the metal ring wire passes through the second break point.
  • the conductive shielding structure is electrically connected to the emitter solder joint by means of the metal loop wire in the terminal area, and the structure is simple and easy to implement.
  • a third break point is provided on the portion of the gate trace between the metal ring wire and the emitter solder joint, and the electrical connection line between the metal ring wire and the emitter solder joint is passed through the third break point. Point within.
  • the temperature sensor includes at least one first polysilicon diode, the at least one first polysilicon diode is arranged in series, and the metal lead includes an anode lead and a cathode lead to form a series structure of at least one first polysilicon diode.
  • the P-type area at one end is electrically connected to the anode solder joint through the anode lead
  • the N-type area at the other end of the series structure of at least one first polysilicon diode is electrically connected to the cathode solder joint through the cathode lead.
  • the polysilicon diode has a small volume and is easy to integrate on a small-sized IGBT chip.
  • the temperature sensor further includes at least one second polysilicon diode, the at least one second polysilicon diode is arranged in series, and the N-type region at one end of the series structure of the at least one second polysilicon diode passes through The anode lead is electrically connected to the anode welding spot, and the P-type region at the other end of the series structure of at least one second polysilicon diode is electrically connected to the cathode welding spot through the cathode lead.
  • the at least one second polysilicon diode and the at least one first polysilicon diode are in anti-parallel connection, which can prevent the temperature sensor from being broken down when a reverse voltage is applied.
  • the gate interdigital structure passes through the center of the cell region, and the temperature sensor is disposed in the central portion of the gate interdigital structure.
  • the temperature sensor is located in the center of the cell area, and the temperature at the center of the cell area is the highest, so the highest temperature of the cell area can be monitored by the temperature sensor, thereby improving the accuracy of temperature monitoring.
  • the metal leads extend along the length of the gate interdigital structure, and the metal leads are all located inside the gate interdigital structure.
  • the metal wire will not interfere with the emitter metal of the IGBT cell in the cell area, so the metal wire will not occupy the effective area of the cell area. In this way, the number of IGBT cells in the cell area will not be changed. Under the premise of, the area of the IGBT chip can be made smaller, which can meet the miniaturization design requirements of the IGBT chip.
  • the conductive shielding structure has a ring shape, and the conductive shielding structure is arranged around a circumference of the metal lead.
  • the conductive shielding structure can prevent the external signal of the conductive shielding structure from interfering with the transmission signal in the metal lead by the circumferential direction of the metal lead, thereby ensuring the accuracy of sampling and monitoring of the temperature sensor module.
  • the anode welding spot and the cathode welding spot are arranged at the edge portion of the cell region. Since there is usually a certain gap between the solder joint and the IGBT cell to avoid the signal at the solder joint from affecting the IGBT cell, if the anode solder joint and the cathode solder joint are arranged in the middle part of the cell area, the anode A gap is required around the solder joint and the cathode solder joint. Therefore, the area of the IGBT chip is relatively large, which is not conducive to the miniaturization of the IGBT chip.
  • the anode solder joint and the cathode solder joint are arranged at the edge part of the cell area, the anode solder joint and the cathode solder joint only need to reserve a gap on three sides, which is beneficial to reduce the area of the IGBT chip.
  • FIG. 1 is a schematic structural diagram of an IGBT chip integrated with a temperature sensor provided by some embodiments of the application;
  • Figure 2 is a cross-sectional view of the IGBT chip integrated with a temperature sensor shown in Figure 1 along the D-D section;
  • FIG. 3 is a cross-sectional view of the gate interdigital structure of the IGBT chip integrated with a temperature sensor shown in FIG. 1 along the E-E section;
  • Fig. 4 is an enlarged view of area I in the IGBT chip with integrated temperature sensor shown in Fig. 1;
  • FIG. 5 is a schematic diagram of a cross-sectional structure along A-A of the gate interdigital structure and the temperature sensor module in the IGBT chip integrated with the temperature sensor shown in FIG. 4;
  • FIG. 6 is a schematic diagram of another cross-sectional structure along A-A of the gate interdigital structure and the temperature sensor module in the IGBT chip integrated with the temperature sensor shown in FIG. 4;
  • Fig. 7 is an enlarged view of area II in the IGBT chip with integrated temperature sensor shown in Fig. 1;
  • FIG. 8 is a schematic diagram of a cross-sectional structure along B-B of the gate interdigital structure and the temperature sensor module in the IGBT chip integrated with the temperature sensor shown in FIG. 7;
  • FIG. 9 is a schematic structural diagram of an IGBT chip integrated with a temperature sensor provided by still other embodiments of the application.
  • Fig. 10 is an enlarged view of area III in the IGBT chip with integrated temperature sensor shown in Fig. 9;
  • FIG. 11 is a cross-sectional view of the IGBT chip integrated with a temperature sensor shown in FIG. 10 along the C-C section;
  • FIG. 12 is a schematic structural diagram of an IGBT chip integrated with a temperature sensor provided by still other embodiments of the application.
  • FIG. 13 is a schematic structural diagram of an IGBT chip integrated with a temperature sensor provided by still other embodiments of the application;
  • FIG. 14 is a schematic structural diagram of a temperature sensing module in an IGBT chip integrated with a temperature sensor provided by some embodiments of the application;
  • 15 is a schematic diagram of another structure of a temperature sensor module in an IGBT chip integrated with a temperature sensor provided by some embodiments of the application.
  • first”, “second”, and “third” are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features. Thus, the features defined with “first”, “second”, and “third” may explicitly or implicitly include one or more of these features.
  • This application relates to an IGBT chip integrated with a temperature sensor. The following briefly describes the concepts involved in this application:
  • Cell area the working area of the IGBT chip, composed of multiple IGBT cells, is the main area where the IGBT chip generates junction temperature, and the temperature sensor is integrated in the cell area;
  • Terminal area a circle around the cell area to ensure the voltage resistance of the IGBT chip
  • Pad A window opened on the passivation layer on the surface of the IGBT chip, and a lead is connected to it during packaging, and the lead is connected to the pin on the package shell through the lead to draw out the potential;
  • Gate bus In order to reduce the series resistance of the polysilicon gate of multiple IGBT cells, usually parallel polysilicon and metal wires are used to draw the potential of the gate solder joint to the gate solder joint. Farther, in order to reduce the difference between the gate potentials of each IGBT cell in the cell area, so that the multiple IGBT cells in the cell area can be fully turned on.
  • the gate wiring is generally arranged at the edge of the cell area;
  • Gate finger structure In order to reduce the series resistance of the polysilicon gate of multiple IGBT cells, usually parallel polysilicon traces and metal traces are used to draw the potential of the gate solder joint to the gate solder The point is farther away to reduce the difference between the gate potentials of each IGBT cell in the cell area, so that the multiple IGBT cells in the cell area can be fully turned on.
  • the gate interdigital structure is generally located inside the cell area.
  • the temperature sensor is integrated inside the cell area. Specifically, the temperature sensor can be integrated inside the gate interdigital structure in the cell area. In this way, on the one hand, since the gate interdigital structure is located inside the cell area, and the temperature inside the cell area is relatively high, the temperature sensor can monitor the true temperature of the IGBT chip, thereby improving the accuracy of temperature monitoring. On the other hand, since the temperature sensor is integrated inside the gate interdigital structure in the cell area, the temperature sensor does not occupy the effective area of the cell area, which is conducive to the realization of the miniaturized design of the IGBT chip. However, when the temperature sensor module is integrated inside the gate interdigital structure, the distance between the gate interdigital structure and the metal lead of the temperature sensor is very close.
  • the IGBT chip When the IGBT chip is turned on, it is loaded on the gates of multiple cells.
  • the voltage (V GE ) between the emitter and the emitter gradually rises, which will produce larger dV/dt and dI/dt on the gate interdigital structure, and then couple with the equivalent inductance on the metal lead of the temperature sensor
  • EMI electromagnetic interference
  • this application provides an IGBT chip integrated with a temperature sensor, which is used in electric vehicles, elevators, variable frequency home appliances, industrial control, new energy, smart grid and other fields.
  • FIG. 1 is a schematic structural diagram of an IGBT chip integrated with a temperature sensor provided by some embodiments of the application.
  • the IGBT chip includes a cell area 1, an emitter solder joint 2, a gate solder joint 3, a gate interdigital structure 4, a temperature sensor module 5, and a conductive shielding structure 6.
  • Fig. 2 is a cross-sectional view of the IGBT chip integrated with a temperature sensor shown in Fig. 1 along the D-D section.
  • the cell region 1 is composed of multiple IGBT cells.
  • IGBT cell structures such as a planar gate structure and a trench gate structure.
  • Figure 2 shows only one of them. It cannot be considered as limiting this application.
  • the gate 11 of the IGBT cell is arranged on the oxide layer 13, and the material of the gate 11 of the IGBT cell is polysilicon, the material of the emitter of the IGBT cell is metal, and the emitters of multiple IGBT cells can be interconnected to form A whole layer of metal 12 is separated from the gate 11 of the IGBT cell by a dielectric layer 9.
  • the emitter solder joint 2 is arranged on the cell region 1 and is electrically connected to the emitters of the multiple IGBT cells in the cell region 1.
  • the emitter solder joint 2 is a window opened on the surface passivation layer of the metal 12.
  • the gate solder joint 3 and the gate interdigital structure 4 are both located inside the cell region 1.
  • the material of the gate solder joint 3 is metal.
  • the gate interdigital structure 4 can extend along a straight line or a curve, and the number of the gate interdigital structure 4 can be one or more than two.
  • the gate interdigital structure 4 can divide the cell region 1 into multiple parts. There is no specific limitation here. FIG. 1 only shows an example in which the number of the gate interdigital structure 4 is one, and the gate interdigital structure 4 extends along a straight line and divides the cell region 1 into two parts, and it should not be considered as limiting the application. . Wherein, when the grid interdigital structure 4 divides the cell area 1 into multiple parts, optionally, the cell area 1 of each part is provided with an emitter solder joint 2.
  • the gate interdigital structure 4 is connected between the gate solder joint 3 and the gate 11 of a plurality of IGBT cells.
  • the connection relationship between the gate interdigital structure 4, the gate solder joints 3 and the gates 11 of the multiple IGBT cells may be as follows:
  • FIG. 3 is the gate of the IGBT chip integrated with a temperature sensor shown in FIG.
  • the gate interdigital structure 4 includes a first polysilicon trace 41, a first metal trace 42 and a first contact hole 43.
  • the first polysilicon trace 41 is connected to the gate 11 of the IGBT cell in the cell region 1, the first metal trace 42 is electrically connected to the gate pad 3, and the first metal trace 42 is connected to the first polysilicon.
  • the crystalline silicon traces 41 are separated by the dielectric layer 9, and the first polycrystalline silicon trace 41 and the first metal trace 42 are electrically connected through the first contact hole 43.
  • the first contact hole 43 includes a hole body and a conductive material filled in the hole body.
  • the conductive material includes but is not limited to metals such as aluminum and tungsten.
  • the gate interdigital structure 4 introduces the potential of the gate solder joint 3 to various positions on the first polysilicon wiring 41 through the first metal wiring 42 and further introduces it through the first polysilicon wiring 41
  • the gates 11 of the multiple IGBT cells ensure that the potentials loaded on the gates 11 of the multiple IGBT cells are approximately equal, thereby enabling the multiple IGBT cells in the cell region 1 to be fully turned on.
  • the first polysilicon trace 41 and the gate 11 of the IGBT cell in the cell region 1 may both be arranged on the oxide layer 13. In this way, when the first polysilicon trace 41 and the gate 11 of the IGBT cell are made, the first polysilicon trace 41 and the gate 11 of the IGBT cell in the cell region 1 can be made of the same layer of polysilicon. By etching, the production efficiency of the first polysilicon trace 41 and the gate 11 of the IGBT cell in the cell region 1 can be improved.
  • the first metal trace 42 and the gate solder joint 3 may be directly electrically connected, or may be electrically connected through other intermediate structures, which is not specifically limited here.
  • the first metal trace in the gate interdigital structure 4 is directly electrically connected to the gate solder joint 3.
  • FIG. 13 is a schematic structural diagram of an IGBT chip integrated with a temperature sensor provided by other embodiments of the application. As shown in FIG. 13, the first metal trace and the gate in the gate interdigital structure 4 The electrode pads 3 are electrically connected by metal wires in the gate wires 7.
  • the temperature sensing module 5 includes a temperature sensor 51, an anode solder joint 52, a cathode solder joint 53 and a metal lead 54.
  • the metal lead 54 is connected between the temperature sensor 51, the anode solder joint 52 and the cathode solder joint 53.
  • the metal lead 54 includes an anode lead 541 and a cathode lead 542.
  • the anode lead 541 is connected between the anode solder joint 52 and the temperature sensor 51
  • the cathode lead 542 is connected between the temperature sensor 51 and the cathode solder joint 53.
  • the temperature sensor 51 and at least part of the metal lead 54 are located inside the gate interdigital structure 4 and insulated from the gate interdigital structure 4.
  • the conductive shielding structure 6 is set at least on the metal lead 54 between the gate interdigital structure 4 and the gate interdigital structure 4, and is insulated from the metal lead 54 and the gate interdigital structure 4, as shown in the figure As shown in 7, the conductive shielding structure 6 is electrically connected to the emitter solder joint 2.
  • the IGBT chip since the IGBT chip includes a cell area 1, an emitter solder joint 2, a gate solder joint 3, a gate interdigital structure 4 and a temperature sensing module 5, the gate interdigital The structure 4 passes through the inside of the cell area 1, and the temperature sensor 51 and at least part of the metal lead 54 of the temperature sensing module 5 are located inside the gate interdigital structure 4. Therefore, the true temperature of the IGBT chip can be monitored by the temperature sensor 51, Thereby, the accuracy of temperature monitoring can be improved.
  • the IGBT chip also includes a conductive shielding structure 6, the conductive shielding structure 6 is arranged at least on the metal lead 54 between the part of the gate interdigital structure 4 and the gate interdigital structure 4, and the conductive shielding structure 6 and The emitter solder joint 2 is electrically connected, and the emitter solder joint 2 is usually grounded. Therefore, the transmission signal in the metal lead 54 and the transmission signal in the gate interdigital structure 4 can be shielded by the conductive shielding structure 6 to prevent the metal lead Crosstalk occurs between the transmission signal in 54 and the transmission signal in the gate interdigital structure 4, so as to ensure the accuracy of sampling and monitoring of the temperature sensor module 5.
  • the conductive shielding structure 6 may be electrically connected to one of the emitter solder joints 2, or may be electrically connected to the two or more emitter solder joints 2.
  • the number of emitter solder joints 2 on the IGBT chip is two, and the conductive shielding structure 6 may be electrically connected to one of the emitter solder joints 2, or it may be connected to both emitter solder joints 2. Electric connection.
  • FIG. 7 only shows an example in which the conductive shielding structure 6 and the two emitter solder joints 2 are electrically connected, and does not limit the application.
  • the IGBT chip further includes a gate wiring 7 which is arranged at the edge of the cell region 1.
  • the gate wiring 7 may be arranged at the cell region 1.
  • the one-side edge, the opposite two-side edges, the three-side edge or the peripheral edge of the cell region 1 are not specifically limited here.
  • FIG. 1 only shows an example in which the gate wiring 7 is arranged on the peripheral edge of the cell region 1 and does not limit the application.
  • the gate trace 7 in the IGBT chip with integrated temperature sensor shown in Fig. 1 is the same as the gate trace 7 in the IGBT chip with integrated temperature sensor shown in Fig. 10.
  • Fig. 11 is the integrated temperature sensor shown in Fig.
  • the gate wiring 7 includes a third polysilicon wiring 71, a third metal wiring 72 and a third contact hole 73.
  • the third polysilicon trace 71 is connected to the gate 11 of the IGBT cell in the cell region 1, the third metal trace 72 is electrically connected to the gate solder joint 3, and the third metal trace 72 is connected to the third polysilicon.
  • the crystalline silicon traces 71 are separated by the dielectric layer 9, and the third polycrystalline silicon trace 71 and the third metal trace 72 are electrically connected through the third contact hole 73.
  • the third contact hole 73 includes a hole body and a conductive material filled in the hole body.
  • the conductive material includes but is not limited to metals such as aluminum and tungsten.
  • the gate wiring 7 introduces the potential of the gate solder joint 3 to various positions on the third polysilicon wiring 71 through the third metal wiring 72, and further introduces the polysilicon through the third polysilicon wiring 71.
  • the gates of each IGBT cell ensure that the potentials loaded on the gates 11 of the multiple IGBT cells are approximately equal, thereby enabling the multiple IGBT cells in the cell region 1 to be fully turned on.
  • the third polysilicon trace 71 and the gate 11 of the IGBT cell in the cell region 1 are both arranged on the oxide layer 13. In this way, when the third polysilicon trace 71 and the gate 11 of the IGBT cell are made, the third polysilicon trace 71 and the gate 11 of the IGBT cell in the cell region 1 can be made of the same layer of polysilicon. By etching, the production efficiency of the third polysilicon trace 71 and the gate 11 of the IGBT cell can be improved.
  • the structure of the conductive shielding structure 6 can have the following two optional implementation modes:
  • FIG. 5 is a cross-sectional structure diagram of the gate interdigital structure and the temperature sensor module in the IGBT chip integrated with the temperature sensor shown in FIG. 4 along AA
  • FIG. 8 is shown in FIG. 7
  • FIGS. 5 and 8 the conductive shielding structure 6 is set at least between the portion of the metal lead (including the anode lead 541 and the cathode lead 542) located in the gate interdigital structure 4 and the first metal trace 42 metal wire.
  • the structure is simple and the cost is low.
  • the first metal wiring 42, the metal lead (including the anode lead 541 and the cathode lead 542 ), and the conductive shielding structure 6 are all disposed on the dielectric layer 9.
  • the first metal trace 42, the metal lead, and the conductive shielding structure 6 are fabricated, the first metal trace 42, the metal lead, and the conductive shielding structure 6 can be etched from the same layer of metal, thereby improving the first metal trace.
  • FIG. 6 is a schematic diagram of another cross-sectional structure along AA of the gate interdigital structure and the temperature sensor module in the IGBT chip integrated with the temperature sensor shown in FIG. 4, as shown in FIG. 6,
  • the conductive shielding structure 6 includes a second polysilicon trace 61, a second metal trace 62 and a second contact hole 63.
  • the second polysilicon wiring 61 and the second metal wiring 62 are separated by the dielectric layer 9, and the second polysilicon wiring 61 and the second metal wiring 62 are electrically connected through the second contact hole 63.
  • the second contact hole 63 includes a hole body and a conductive material filled in the hole body.
  • the conductive material includes but is not limited to metals such as aluminum and tungsten.
  • the second polysilicon trace 61 is located at least between the portion of the metal lead (including the anode lead 541 and the cathode lead 542) located in the gate interdigital structure 4 and the first polysilicon trace 41, and the second metal trace 62 is located at least between the portion of the metal lead located in the gate interdigital structure 4 and the first metal trace 42, and the conductive shielding structure 6 is electrically connected to the emitter solder joint 2 through the second metal trace 62.
  • the conductive shielding structure 6 of this structure has a high shielding channel height, which can effectively prevent crosstalk between the transmission signal in the metal lead and the transmission signal in the gate interdigital structure 4, thereby ensuring the sampling of the temperature sensor module 5. And monitoring accuracy.
  • the second polysilicon wiring 61 and the first polysilicon wiring 41 may both be disposed on the oxide layer 13. In this way, when the second polysilicon wiring 61 and the first polysilicon wiring 41 are fabricated, the second polysilicon wiring 61 and the first polysilicon wiring 41 can be obtained by etching the same layer of polysilicon. This can improve the production efficiency of the second polysilicon wiring 61 and the first polysilicon wiring 41.
  • the conductive shielding structure 6 and the metal lead 54 are both located in the gate interdigital structure 4, and the emitter solder joint 2 is located outside the gate interdigital structure 4, in order to realize the conductive shielding structure 6 and the emitter solder joint 2
  • the electrical connection 100 between the conductive shielding structure 6 and the emitter solder joint 2 needs to pass through the gate interdigital structure 4 or the gate wiring 7, and is connected to the gate interdigital structure 4 and the gate 7 Insulation.
  • the electrical connection between the conductive shielding structure 6 and the emitter solder joint 2 can be achieved through the following two embodiments:
  • the portion of the gate interdigital structure 4 located between the conductive shielding structure 6 and the emitter solder joint 2 is provided with a first break point a, the conductive shielding structure 6 and the emitter
  • the electrical connection line 100 between the solder joints 2 passes through the first break point a.
  • This structure is simple, easy to implement, and can achieve insulation between the electrical connection line 100 and the gate interdigital structure 4.
  • the first break point a may penetrate the first polysilicon trace 41, the first metal trace 42 and the first contact hole 43 of the gate interdigital structure 4 along the thickness direction of the IGBT to be electrically connected to
  • the line 100 and the oxide layer 13 are separated by the dielectric layer 9. It can also penetrate only the first metal trace 42 and the first contact hole 43 along the thickness direction of the IGBT, and the electrical connection line 100 is connected to the first polysilicon trace. 41 is separated by the dielectric layer 9, which is not specifically limited here.
  • the electrical connection line 100, the metal part of the conductive shielding structure 6, the emitter solder joint 2 and the first metal trace 42 of the gate interdigital structure 4 are etched from the same layer of metal. In this way, the production efficiency of the electrical connection line 100, the metal part of the conductive shielding structure 6, the emitter solder joint 2 and the first metal trace 42 of the gate interdigital structure 4 is relatively high.
  • FIG. 9 is a schematic structural diagram of an IGBT chip integrated with a temperature sensor provided by still other embodiments of the application.
  • the difference between the IGBT chip shown in Fig. 9 and the IGBT chip shown in Fig. 1 is that the electrical connection path between the conductive shielding structure 6 and the emitter solder joint 2 is different.
  • the size and location of the solder joints 2, the size and location of the grid solder joints 3, the structure and location of the grid interdigital structure 4, the temperature sensor module 5, the grid wiring 7, and the terminal area 8 are all the same .
  • the IGBT chip further includes a terminal area 8, and the terminal area 8 is arranged on the periphery of the cell area 1.
  • the terminal area 8 is provided with a metal ring wire 81, the metal ring wire 81 is arranged around a circumference of the cell area 1, and the metal ring wire 81 is electrically connected to the emitter solder joint 2.
  • Fig. 10 is an enlarged view of area III in the IGBT chip with integrated temperature sensor shown in Fig. 9.
  • the portion of the gate trace 7 between the conductive shielding structure 6 and the metal ring line 81 is provided with a second break point b
  • the conductive shielding structure 6 is electrically connected to the metal ring line 81
  • the conductive shielding structure 6 The electrical connection line 200 with the metal ring wire 81 passes through the second break point b.
  • the conductive shielding structure 6 is electrically connected to the emitter solder joint 2 via the metal ring wire 81 of the terminal area 8.
  • This structure is simple and easy to implement, and can realize the insulation between the electrical connection line 200 and the gate wiring 7.
  • the second break point b may penetrate the third polysilicon trace 71, the third metal trace 72, and the third contact hole 73 of the gate trace 7 along the thickness direction of the IGBT, and the electrical connection line 200 is separated from the oxide layer 13 by the dielectric layer 9. It can also penetrate only the third metal trace 72 and the third contact hole 73 along the thickness direction of the IGBT, and the electrical connection line 200 and the third polysilicon trace 71 They are separated by the dielectric layer 9, which is not specifically limited here.
  • the electrical connection line 200, the metal part of the conductive shielding structure 6, the metal ring line 81, and the third metal trace 72 of the gate trace 7 are etched from the same layer of metal. In this way, the production efficiency of the electrical connection line 200, the metal part of the conductive shielding structure 6, the metal ring line 81, and the third metal wiring 72 of the gate wiring 7 is relatively high.
  • a third break point c is provided on the portion of the gate trace 7 between the metal ring wire 81 and the emitter solder joint 2.
  • the electrical connection line 300 between the metal ring wire 81 and the emitter welding point 2 passes through the third break point c.
  • the third break point c may penetrate the third polysilicon trace 71, the third metal trace 72, and the third contact hole 73 of the gate trace 7 along the thickness direction of the IGBT, and the electrical connection line 300 and the oxide layer 13 (See FIG. 11) are separated by a dielectric layer 9. It is also possible to penetrate only the third metal trace 72 and the third contact hole 73 along the thickness direction of the IGBT, and the electrical connection line 300 and the third polysilicon trace 71 They are separated by the dielectric layer 9, which is not specifically limited here.
  • the temperature sensor 51 may include a thermistor through which the temperature sensor 51 implements temperature monitoring.
  • the temperature sensor 51 may also include a polysilicon diode. The temperature sensor 51 implements temperature monitoring through the polysilicon diode, which is not specifically limited herein.
  • FIG. 14 is a schematic structural diagram of a temperature sensing module in an IGBT chip integrated with a temperature sensor provided by some embodiments of the application.
  • the temperature sensor 51 includes at least one first polysilicon diode 511, and the at least one first polysilicon diode 511 is arranged in series to form one end of the series structure of the at least one first polysilicon diode 511
  • the P-type area is electrically connected to the anode solder joint 52 through the anode lead 541, and the N-type area at the other end of the series structure of at least one first polysilicon diode 511 is electrically connected to the cathode solder joint 53 through the cathode lead 542.
  • the temperature sensor 51 can realize temperature monitoring through at least one first polysilicon diode 511.
  • the polysilicon diode has a small volume and is easy to be integrated on an IGBT chip with a smaller size.
  • the temperature sensor 51 when the temperature sensor 51 includes a polysilicon diode and the temperature is monitored through the polysilicon diode, as shown in FIG. 5, the temperature sensor 51 and the first polysilicon trace 41 may both be arranged on the oxide layer 13,
  • the temperature sensor 51 and the metal lead including the anode lead 541 and the cathode lead 542) can be separated by the dielectric layer 9, and the temperature sensor 51 and the anode lead 541 and between the temperature sensor 51 and the cathode lead 542 can pass through contact holes. Electric connection.
  • the number of the first polysilicon diodes 511 included in the temperature sensor 51 may be 1, 2, 3, etc., which is not specifically limited here. In some embodiments, the number of first polysilicon diodes 511 included in the temperature sensor 51 is 2-6. For example, as shown in FIG. 14, the number of first polysilicon diodes 511 included in the temperature sensor 51 is four.
  • the temperature sensor 51 includes not only at least one first polysilicon diode 511, but also at least one second polysilicon diode 512.
  • the at least one second polysilicon diode 512 is arranged in series to form at least one first polysilicon diode.
  • the N-type region at one end of the series structure of the two polysilicon diodes 512 is electrically connected to the anode solder joint 52 through the anode lead 541 to form a P-type at the other end of the series structure of at least one second polysilicon diode 512
  • the zone is electrically connected to the cathode solder joint 53 through the cathode lead 542.
  • the at least one second polysilicon diode 512 and the at least one first polysilicon diode 511 are in anti-parallel connection, which can prevent the temperature sensor 51 from being broken down when a reverse voltage is applied.
  • the number of second polysilicon diodes 512 included in the temperature sensor 51 may be 1, 2, 3, etc., which is not specifically limited herein.
  • the anode welding point 52 and the cathode welding point 53 may be arranged in the middle part of the cell area 1 or may be arranged in the edge part of the cell area 1, which is not specifically limited here. In some embodiments, as shown in FIG. 1, the anode welding point 52 and the cathode welding point 53 are arranged at the edge portion of the cell region 1.
  • the anode solder joint 52 and the cathode solder joint 53 are arranged in the middle part of the cell area 1 , The anode solder joint 52 and the cathode solder joint 53 need to reserve a gap, so the area of the IGBT chip is relatively large, which is not conducive to the miniaturization design of the IGBT chip.
  • anode solder joint 52 and the cathode solder joint 53 are arranged at the edge of the cell area 1, the anode solder joint 52 and the cathode solder joint 53 only need to reserve a gap on three sides, which is beneficial to reduce the IGBT chip area.
  • the gate solder joint 3 can be arranged in the middle part of the cell area 1, or can be arranged in the edge part of the cell area 1, which is not specifically limited here. In some embodiments, as shown in FIG. 1, the gate solder joint 3 is arranged at the edge portion of the cell region 1. In this way, it is only necessary to reserve a gap on the three sides of the gate solder joint 3, which is beneficial to reduce the area of the IGBT chip.
  • the anode welding point 52, the cathode welding point 53 and the gate welding point 3 are all located at the edge of the cell area 1, the anode welding point 52, the cathode welding point 53 and the gate welding point 3 can be located in the same part of the cell area 1.
  • One edge portion can also be located on two opposite edge portions of the cell region 1, which is not specifically limited here.
  • the anode solder joint 52, the cathode solder joint 53 and the gate solder joint 3 are located on the same edge portion of the cell region 1.
  • the anode welding point 52 and the cathode welding point 53 are located on an edge portion of the cell region 1
  • the gate welding point 3 is located on the edge portion of the cell region 1 opposite to the edge portion. On the other edge part.
  • the metal leads 54 may extend along the length of the gate interdigital structure 4 and are all disposed inside the gate interdigital structure 4, or a part may be located in the gate interdigital structure 4, and the other part may extend along the gate interdigital structure 4
  • the direction intersecting or perpendicular to the length of the finger structure 4 extends from the side of the gate interdigital structure 4, which is not specifically limited here.
  • the metal leads 54 extend along the length of the gate interdigital structure 4 and are all disposed inside the gate interdigital structure 4. In this way, the metal lead 54 will not interfere with the emitter metal of the IGBT cell in the cell area, so the metal lead 54 will not occupy the effective area of the cell area 1. In this way, the IGBT cell in the cell area will not be changed. Under the premise of the number of cells, the area of the IGBT chip can be made smaller, which can meet the miniaturization design requirements of the IGBT chip.
  • the gate interdigital structure 4 passes through the center position of the cell region 1, and the temperature sensor 51 is disposed in the portion of the gate interdigital structure 4 located at the center position.
  • the temperature sensor 51 is located at the center of the cell area 1, and the temperature at the center of the cell area 1 is the highest. Therefore, the highest temperature of the cell area 1 can be monitored by the temperature sensor 51, thereby improving the temperature monitoring accuracy.
  • the conductive shielding structure 6 may be linear or ring-shaped, which is not specifically limited here. In some embodiments, as shown in FIGS. 1, 4 and 7, the conductive shielding structure 6 has a ring shape, and the conductive shielding structure 6 is arranged around a circumference of the metal lead 54. In this way, the conductive shielding structure 6 can prevent the external signal of the conductive shielding structure 6 from interfering with the transmission signal in the metal lead 54 by the circumferential direction of the metal lead 54, so the accuracy of sampling and monitoring of the temperature sensor module 5 can be ensured.

Abstract

本申请提供一种集成有温度传感器的IGBT芯片，涉及功率器件技术领域，能够提高IGBT芯片的温度监测的准确性。该集成有温度传感器的IGBT芯片包括元胞区、发射极焊点、栅极焊点、栅极叉指结构、温度传感模块和导电屏蔽结构；发射极焊点与多个IGBT元胞的发射极电连接；栅极叉指结构连接于栅极焊点与多个IGBT元胞的栅极之间；温度传感模块包括温度传感器、阳极焊点、阴极焊点和金属引线，温度传感器和至少部分金属引线位于栅极叉指结构的内部并与栅极叉指结构绝缘；导电屏蔽结构至少设置于金属引线的位于栅极叉指结构内的部分与栅极叉指结构之间，并与发射极焊点电连接。本申请提供的集成有温度传感器的IGBT芯片用于电动汽车或者电梯。

Description

一种集成有温度传感器的IGBT芯片
本申请要求于2020年05月27日提交国家知识产权局、申请号为202010465356.8、发明名称为“一种集成有温度传感器的IGBT芯片”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及功率器件技术领域，尤其涉及一种集成有温度传感器的IGBT芯片。
背景技术
在电动汽车、电梯等应用领域，绝缘栅双极晶体管(insulated gate bipolar transistor，IGBT)模块要尽可能实现小型化、高功率密度、低结温，并且对IGBT模块的可靠性要求极高，这就需要对IGBT模块内IGBT芯片的温度进行实时、准确的监测。
为了监测IGBT芯片的温度，一方面可以将温度传感器(比如热敏电阻)和IGBT芯片封装在一起。由于温度传感器与IGBT芯片之间的距离较近，因此能够通过温度传感器获得IGBT芯片的温度。但是，由于温度传感器与IGBT芯片之间还是会存在一定距离，IGBT芯片的热量部分传导至温度传感器且响应速度较慢，这就会导致温度传感器对IGBT芯片温度监测的准确度降低。另一方面可以将温度传感器直接集成在IGBT芯片内。由于温度传感器直接集成在IGBT芯片内，因此温度监测时响应时间常数很小，能够更加快速、精准地获得被测温度。但是，在将温度传感器集成在IGBT芯片内，IGBT芯片上的信号线路与温度传感器的金属引线之间的距离较近，容易对温度传感器的金属引线上传输的监测信号产生干扰，从而导致温度传感的准确度较低，因此仍不能准确获得IGBT芯片的温度。
发明内容
本申请的实施例提供一种集成有温度传感器的IGBT芯片，能够提高IGBT芯片的温度监测的准确性。
为达到上述目的，本申请一些实施例提供一种集成有温度传感器的IGBT芯片，该IGBT芯片包括元胞区、发射极焊点、栅极焊点、栅极叉指结构、温度传感模块和导电屏蔽结构；其中，元胞区由多个IGBT元胞构成；发射极焊点设置于元胞区上，并与多个IGBT元胞的发射极电连接；栅极焊点和栅极叉指结构均位于元胞区的内部，栅极叉指结构连接于栅极焊点与多个IGBT元胞的栅极之间；温度传感模块包括温度传感器、阳极焊点、阴极焊点以及连接于温度传感器、阳极焊点和阴极焊点之间的金属引线，温度传感器和部分金属引线位于栅极叉指结构的内部并与该栅极叉指结构绝缘；导电屏蔽结构至少设置于金属引线的位于栅极叉指结构内的部分与栅极叉指结构之间，并与该金属引线和该栅极叉指结构均绝缘，且导电屏蔽结构与发射极焊点电连接。
在本申请实施例提供的IGBT芯片中，由于该IGBT芯片包括元胞区、发射极焊点、栅极焊点、栅极叉指结构和温度传感模块，栅极叉指结构经过元胞区的内部，且温度传感模块的温度传感器和至少部分金属引线位于栅极叉指结构的内部，因此通过 温度传感器可以监测到IGBT芯片的真实温度，从而能够提高温度监测的准确性。同时由于该IGBT芯片还包括导电屏蔽结构，该导电屏蔽结构至少设置于金属引线上位于栅极叉指结构内的部分与栅极叉指结构之间，且导电屏蔽结构与发射极焊点电连接，发射极焊点通常接地，因此可以通过导电屏蔽结构对金属引线内的传输信号与栅极叉指结构内的传输信号之间进行屏蔽，防止金属引线内的传输信号与栅极叉指结构内的传输信号之间产生串扰，从而保证温度传感模块的采样和监测的准确性。
可选地，栅极叉指结构包括第一多晶硅走线、第一金属走线和第一接触孔，第一多晶硅走线与第一金属走线之间通过介质层隔开，第一多晶硅走线与第一金属走线之间通过第一接触孔电连接；导电屏蔽结构为至少设置于金属引线的位于栅极叉指结构内的部分与第一金属走线之间的金属线。此结构简单，成本较低。
可选地，第一金属走线、金属引线和导电屏蔽结构由同一层金属刻蚀得到。这样，第一金属走线、金属引线和导电屏蔽结构的制作效率较高。
可选地，栅极叉指结构包括第一多晶硅走线、第一金属走线和第一接触孔，第一多晶硅走线与第一金属走线之间通过介质层隔开，第一多晶硅走线与第一金属走线之间通过第一接触孔电连接；导电屏蔽结构包括第二多晶硅走线、第二金属走线和第二接触孔，第二多晶硅走线与第二金属走线之间通过介质层隔开，第二多晶硅走线与第二金属走线之间通过第二接触孔电连接，第二多晶硅走线至少位于金属引线的位于栅极叉指结构内的部分与第一多晶硅走线之间，第二金属走线至少位于金属引线的位于栅极叉指结构内的部分与第一金属走线之间，导电屏蔽结构通过第二金属走线与发射极焊点电连接。此结构的导电屏蔽结构形成的屏蔽通道的高度较高，能够有效防止金属引线内的传输信号与栅极叉指结构内的传输信号之间产生串扰，从而保证温度传感模块的采样和监测的准确性。
可选地，栅极叉指结构的位于导电屏蔽结构与发射极焊点之间的部分上设有第一断点，导电屏蔽结构与发射极焊点之间的电连接线穿设于该第一断点内。此结构简单，容易实现。
可选地，IGBT芯片还包括栅极走线和终端区，栅极走线设置于元胞区的边缘，终端区设置于元胞区的外围一周；终端区内设有金属环线，该金属环线围绕元胞区的一周设置，且该金属环线与发射极焊点电连接；栅极走线的位于导电屏蔽结构与金属环线之间的部分上设有第二断点，导电屏蔽结构与金属环线电连接，且该导电屏蔽结构与金属环线之间的电连接线穿设于第二断点内。这样，导电屏蔽结构借助终端区的金属环线与发射极焊点电连接，此结构简单，容易实现。
可选地，栅极走线的位于金属环线与发射极焊点之间的部分上上设有第三断点，金属环线与发射极焊点之间的电连接线穿设于该第三断点内。此结构简单，容易实现。
可选地，温度传感器包括至少一个第一多晶硅二极管，该至少一个第一多晶硅二极管串联设置，金属引线包括阳极引线和阴极引线，构成至少一个第一多晶硅二极管的串联结构的一端端部的P型区通过阳极引线与阳极焊点电连接，构成至少一个第一多晶硅二极管的串联结构的另一端端部的N型区通过阴极引线与阴极焊点电连接。这样，温度传感器可以通过至少一个第一多晶硅二极管实现温度监测，多晶硅二极管的体积较小，便于集成在尺寸较小的IGBT芯片上。
可选地，温度传感器还包括至少一个第二多晶硅二极管，该至少一个第二多晶硅二极管串联设置，构成至少一个第二多晶硅二极管的串联结构的一端端部的N型区通过阳极引线与阳极焊点电连接，构成至少一个第二多晶硅二极管的串联结构的另一端端部的P型区通过阴极引线与阴极焊点电连接。这样，至少一个第二多晶硅二极管与至少一个第一多晶硅二极管反向并联，能够避免温度传感器在加入反向电压时被击穿。
可选地，栅极叉指结构经过元胞区的中心位置，温度传感器设置于栅极叉指结构的位于中心位置的部分内。这样，温度传感器处于元胞区的中心位置，而元胞区的中心位置处的温度最高，因此可以通过温度传感器监测到元胞区的最高温度，由此提高了温度监测的准确性。
可选地，金属引线沿着栅极叉指结构的长度方向延伸，且该金属引线全部位于栅极叉指结构的内部。这样，金属引线不会与元胞区内IGBT元胞的发射极金属之间产生干涉，因此金属引线不会占用元胞区的有效面积，这样，在不改变元胞区内IGBT元胞的数量的前提下，IGBT芯片的面积可以制作得较小，由此可以满足IGBT芯片的小型化设计需求。
可选地，导电屏蔽结构呈环形，导电屏蔽结构围绕金属引线的一周设置。这样，导电屏蔽结构可以由金属引线的四周方向阻止导电屏蔽结构的外部信号对金属引线内的传输信号产生干扰，因此能够保证温度传感模块的采样和监测的准确性。
可选地，阳极焊点和阴极焊点设置于元胞区的边缘部分。由于焊点与IGBT元胞之间通常留有一定的间隙以避免焊点处的信号对IGBT元胞产生影响，因此若将阳极焊点和阴极焊点设置于元胞区的中间部分，则阳极焊点和阴极焊点的四周都需要预留间隙，因此IGBT芯片的面积较大，不利于IGBT芯片的小型化设计。而若将阳极焊点和阴极焊点设置于元胞区的边缘部分，则阳极焊点和阴极焊点只需三边预留间隙即可，因此有利于减小IGBT芯片的面积。
附图说明
图1为本申请一些实施例提供的集成有温度传感器的IGBT芯片的结构示意图；
图2为图1所示集成有温度传感器的IGBT芯片沿D-D截面的剖视图；
图3为图1所示集成有温度传感器的IGBT芯片的栅极叉指结构沿E-E截面的剖视图；
图4为图1所示集成有温度传感器的IGBT芯片中区域I的放大图；
图5为图4所示集成有温度传感器的IGBT芯片中栅极叉指结构和温度传感模块沿A-A的一种截面结构示意图；
图6为图4所示集成有温度传感器的IGBT芯片中栅极叉指结构和温度传感模块沿A-A的另一种截面结构示意图；
图7为图1所示集成有温度传感器的IGBT芯片中区域II的放大图；
图8为图7所示集成有温度传感器的IGBT芯片中栅极叉指结构和温度传感模块沿B-B的一种截面结构示意图；
图9为本申请又一些实施例提供的集成有温度传感器的IGBT芯片的结构示意图；
图10为图9所示集成有温度传感器的IGBT芯片中区域III的放大图；
图11为图10所示集成有温度传感器的IGBT芯片沿C-C截面的剖视图；
图12为本申请又一些实施例提供的集成有温度传感器的IGBT芯片的结构示意图；
图13为本申请又一些实施例提供的集成有温度传感器的IGBT芯片的结构示意图；
图14为本申请一些实施例提供的集成有温度传感器的IGBT芯片中温度传感模块的一种结构示意图；
图15为本申请一些实施例提供的集成有温度传感器的IGBT芯片中温度传感模块的另一种结构示意图。
具体实施方式
在本申请的描述中，术语“第一”、“第二”、“第三”仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”、“第三”的特征可以明示或者隐含地包括一个或者更多个该特征。
本申请涉及集成有温度传感器的IGBT芯片，以下对本申请涉及到的概念进行简单说明：
元胞区：为IGBT芯片的工作区域，由多个IGBT元胞构成，是IGBT芯片产生结温的主要区域，温度传感器集成在该元胞区内；
终端区：围绕元胞区的一周，为保证IGBT芯片的耐压性能的区域；
焊点(pad)：在IGBT芯片表面的钝化层上开的窗口，封装时在其上连接引线，并通过该引线与封装外壳上的引脚连接，由此引出电位；
栅极走线(gate bus)：为了降低多个IGBT元胞的多晶硅栅极的串联电阻，通常用相互平行的多晶硅走线和金属走线将栅极焊点的电位引到离栅极焊点较远处，以减小元胞区内各个IGBT元胞的栅极电位之间的差异，使得元胞区内的多个IGBT元胞均能够充分开启。栅极走线一般设置于元胞区的边缘；
栅极叉指结构(gate finger)：为了降低多个IGBT元胞的多晶硅栅极的串联电阻，通常用相互平行的多晶硅走线和金属走线将栅极焊点的电位引到离栅极焊点较远处，以减小元胞区内各个IGBT元胞的栅极电位之间的差异，使得元胞区内的多个IGBT元胞均能够充分开启。栅极叉指结构一般位于元胞区的内部。
将温度传感器集成在元胞区的内部，具体地，可以将温度传感器集成在元胞区内的栅极叉指结构的内部。这样，一方面由于栅极叉指结构位于元胞区的内部，而元胞区的内部的温度较高，因此温度传感器可以监测到IGBT芯片的真实温度，从而能够提高温度监测的准确性。另一方面，由于温度传感器集成在元胞区内的栅极叉指结构的内部，因此温度传感器未占用元胞区的有效面积，有利于实现IGBT芯片的小型化设计。但是，当温度传感模块集成在栅极叉指结构的内部时，栅极叉指结构与温度传感器的金属引线之间的距离很近，当IGBT芯片开启时，加载至多个元胞的栅极和发射极之间的电压(V GE)逐渐上升，会在栅极叉指结构上产生较大的dV/dt和dI/dt，进而与温度传感器的金属引线上的等效电感之间发生耦合作用，从而在温度传感器所处的回路中引入电磁干扰(electromagnetic interference，EMI)效应，最终EMI效应产生的电流波动和电压波动与温度传感器的采样信号发生串扰，影响温度传感器的采样和监测准确性。
为了避免上述问题，本申请提供一种集成有温度传感器的IGBT芯片，该IGBT芯片应用于电动汽车、电梯、变频家电、工业控制、新能源、智能电网等领域。
图1为本申请一些实施例提供的集成有温度传感器的IGBT芯片的结构示意图。如图1所示，IGBT芯片包括元胞区1、发射极焊点2、栅极焊点3、栅极叉指结构4、温度传感模块5和导电屏蔽结构6。
图2为图1所示集成有温度传感器的IGBT芯片沿D-D截面的剖视图。如图2所示，元胞区1由多个IGBT元胞构成，IGBT元胞的结构有多种，比如平面栅结构，又比如沟槽栅结构，图2仅示出了其中一种，并不能认为对本申请构成限定。IGBT元胞的栅极11设置于氧化层13上，且IGBT元胞的栅极11的材料为多晶硅，IGBT元胞的发射极的材料为金属，多个IGBT元胞的发射极可以互连形成一整层金属12，该层金属12与IGBT元胞的栅极11之间通过介质层9隔开。
发射极焊点2设置于元胞区1上并与元胞区1的多个IGBT元胞的发射极电连接。可选地，发射极焊点2为开设于金属12的表面钝化层上的窗口。
如图1所示，栅极焊点3和栅极叉指结构4均位于元胞区1的内部。栅极焊点3的材料为金属。栅极叉指结构4可以沿着直线延伸或者曲线延伸，且栅极叉指结构4的数量可以有一条或者两条以上，栅极叉指结构4可以将元胞区1分隔成多个部分，在此不做具体限定。图1仅给出了栅极叉指结构4的数量为一条，且该栅极叉指结构4沿直线延伸并将元胞区1分隔成两个部分的示例，并不能认为对本申请构成了限定。其中，当栅极叉指结构4将元胞区1分隔成多个部分时，可选地，每个部分的元胞区1均设有发射极焊点2。
栅极叉指结构4连接于栅极焊点3与多个IGBT元胞的栅极11之间。具体地，栅极叉指结构4、栅极焊点3和多个IGBT元胞的栅极11之间的连接关系可以为：图3为图1所示集成有温度传感器的IGBT芯片的栅极叉指结构4沿E-E截面的剖视图。如图3所示，栅极叉指结构4包括第一多晶硅走线41、第一金属走线42和第一接触孔43。第一多晶硅走线41与元胞区1内的IGBT元胞的栅极11相接，第一金属走线42与栅极焊点3电连接，第一金属走线42与第一多晶硅走线41之间通过介质层9隔开，且第一多晶硅走线41与第一金属走线42之间通过第一接触孔43电连接。其中，第一接触孔43包括孔本体以及填充于该孔本体内的导电材料，该导电材料包括但不限于铝、钨等金属。这样，栅极叉指结构4通过第一金属走线42将栅极焊点3的电位引入到第一多晶硅走线41上的各个位置，并进一步通过第一多晶硅走线41引入多个IGBT元胞的栅极11，由此保证了加载至多个IGBT元胞的栅极11上的电位近似相等，由此使得元胞区1内的多个IGBT元胞均能够充分开启。
在上述实施例中，第一多晶硅走线41和元胞区1内的IGBT元胞的栅极11可以均设置在氧化层13上。这样，在制作该第一多晶硅走线41和IGBT元胞的栅极11时，第一多晶硅走线41和元胞区1内的IGBT元胞的栅极11可以由同一层多晶硅刻蚀得到，由此能够提高第一多晶硅走线41和元胞区1内的IGBT元胞的栅极11的制作效率。
第一金属走线42与栅极焊点3之间可以直接电连接，也可以通过其他中间结构电连接，在此不做具体限定。在一些实施例中，如图1所示，栅极叉指结构4内的第一 金属走线与栅极焊点3直接电连接。在另一些实施例中，图13为本申请又一些实施例提供的集成有温度传感器的IGBT芯片的结构示意图，如图13所示，栅极叉指结构4内的第一金属走线与栅极焊点3之间通过栅极走线7内的金属走线电连接。
图4为图1所示集成有温度传感器的IGBT芯片中区域I的放大图，图7为图1所示集成有温度传感器的IGBT芯片中区域II的放大图。如图4和图7所示，温度传感模块5包括温度传感器51、阳极焊点52、阴极焊点53和金属引线54。金属引线54连接于该温度传感器51、该阳极焊点52和该阴极焊点53之间。金属引线54包括阳极引线541和阴极引线542，阳极引线541连接于阳极焊点52与温度传感器51之间，阴极引线542连接于温度传感器51与阴极焊点53之间。温度传感器51和至少部分金属引线54位于栅极叉指结构4的内部并与栅极叉指结构4绝缘。导电屏蔽结构6至少设置于金属引线54上位于栅极叉指结构4内的部分与该栅极叉指结构4之间，并与金属引线54和栅极叉指结构4均绝缘，且如图7所示，导电屏蔽结构6与发射极焊点2电连接。
在本申请实施例提供的IGBT芯片中，由于该IGBT芯片包括元胞区1、发射极焊点2、栅极焊点3、栅极叉指结构4和温度传感模块5，栅极叉指结构4经过元胞区1的内部，且温度传感模块5的温度传感器51和至少部分金属引线54位于栅极叉指结构4的内部，因此通过温度传感器51可以监测到IGBT芯片的真实温度，从而能够提高温度监测的准确性。同时由于该IGBT芯片还包括导电屏蔽结构6，该导电屏蔽结构6至少设置于金属引线54上位于栅极叉指结构4内的部分与栅极叉指结构4之间，且导电屏蔽结构6与发射极焊点2电连接，发射极焊点2通常接地，因此可以通过导电屏蔽结构6对金属引线54内的传输信号与栅极叉指结构4内的传输信号之间进行屏蔽，防止金属引线54内的传输信号与栅极叉指结构4内的传输信号之间产生串扰，从而保证温度传感模块5的采样和监测的准确性。
当IGBT芯片上发射极焊点2的数量为两个以上时，导电屏蔽结构6可以与其中一个发射极焊点2电连接，也可以与该两个以上的发射极焊点2均电连接，在此不做具体限定。示例的，如图7所示，IGBT芯片上发射极焊点2的数量为两个，导电屏蔽结构6可以与其中一个发射极焊点2电连接，也可以与两个发射极焊点2均电连接。图7仅给出了导电屏蔽结构6与两个发射极焊点2均电连接的示例，并不对本申请构成限定。
在一些实施例中，如图1所示，IGBT芯片还包括栅极走线7，该栅极走线7设置于元胞区1的边缘，具体地，该栅极走线7可以设置于元胞区1的一侧边缘、相对两侧边缘、三侧边缘或者一周边缘，在此不做具体限定。图1仅给出了栅极走线7设置于元胞区1的一周边缘的示例，并不对本申请构成限定。图1所示集成有温度传感器的IGBT芯片中的栅极走线7与图10所示集成有温度传感器的IGBT芯片中的栅极走线7相同，图11为图10所示集成有温度传感器的IGBT芯片沿C-C截面的剖视图。如图10和图11所示，该栅极走线7包括第三多晶硅走线71、第三金属走线72和第三接触孔73。第三多晶硅走线71与元胞区1内的IGBT元胞的栅极11相接，第三金属走线72与栅极焊点3电连接，第三金属走线72与第三多晶硅走线71之间通过介质层9隔开，且第三多晶硅走线71与第三金属走线72之间通过第三接触孔73电连接。 其中，第三接触孔73包括孔本体和填充于该孔本体内的导电材料，该导电材料包括但不限于铝、钨等金属。这样，栅极走线7通过第三金属走线72将栅极焊点3的电位引入到第三多晶硅走线71上的各个位置，并进一步通过第三多晶硅走线71引入多个IGBT元胞的栅极，由此保证了加载至多个IGBT元胞的栅极11上的电位近似相等，由此使得元胞区1内的多个IGBT元胞均能够充分开启。
在上述实施例中，可选地，第三多晶硅走线71和元胞区1内的IGBT元胞的栅极11均设置在氧化层13上。这样，在制作该第三多晶硅走线71和IGBT元胞的栅极11时，第三多晶硅走线71和元胞区1内的IGBT元胞的栅极11可以由同一层多晶硅刻蚀得到，由此能够提高第三多晶硅走线71和IGBT元胞的栅极11的制作效率。
为了实现金属引线54与栅极叉指结构4之间的信号屏蔽，导电屏蔽结构6的结构可以有以下两种可选地实现方式：
第一种可选地实现方式，图5为图4所示集成有温度传感器的IGBT芯片中栅极叉指结构和温度传感模块沿A-A的一种截面结构示意图，图8为图7所示集成有温度传感器的IGBT芯片中栅极叉指结构和温度传感模块沿B-B的一种截面结构示意图。如图5和图8所示，导电屏蔽结构6为至少设置于金属引线(包括阳极引线541和阴极引线542)的位于栅极叉指结构4内的部分与第一金属走线42之间的金属线。此结构简单，成本较低。
可选地，如图5和图8所示，第一金属走线42、金属引线(包括阳极引线541和阴极引线542)和导电屏蔽结构6均设置于介质层9上。这样，在制作第一金属走线42、金属引线和导电屏蔽结构6时，第一金属走线42、金属引线和导电屏蔽结构6可以由同一层金属刻蚀得到，由此能够提高第一金属走线42、金属引线和导电屏蔽结构6的制作效率。
第二种可选地实现方式，图6为图4所示集成有温度传感器的IGBT芯片中栅极叉指结构和温度传感模块沿A-A的另一种截面结构示意图，如图6所示，导电屏蔽结构6包括第二多晶硅走线61、第二金属走线62和第二接触孔63。第二多晶硅走线61与第二金属走线62之间通过介质层9隔开，第二多晶硅走线61与第二金属走线62之间通过第二接触孔63电连接。其中，第二接触孔63包括孔本体和填充于该孔本体内的导电材料，该导电材料包括但不限于铝、钨等金属。第二多晶硅走线61至少位于金属引线(包括阳极引线541和阴极引线542)的位于栅极叉指结构4内的部分与第一多晶硅走线41之间，第二金属走线62至少位于金属引线的位于栅极叉指结构4内的部分与第一金属走线42之间，导电屏蔽结构6通过第二金属走线62与发射极焊点2电连接。此结构的导电屏蔽结构6形成的屏蔽通道的高度较高，能够有效防止金属引线内的传输信号与栅极叉指结构4内的传输信号之间产生串扰，从而保证温度传感模块5的采样和监测的准确性。
可选地，第二多晶硅走线61和第一多晶硅走线41可以均设置于氧化层13上。这样，在制作第二多晶硅走线61和第一多晶硅走线41时，第二多晶硅走线61和第一多晶硅走线41可以由同一层多晶硅刻蚀得到，由此能够提高第二多晶硅走线61和第一多晶硅走线41的制作效率。
由于导电屏蔽结构6和金属引线54均位于栅极叉指结构4内，而发射极焊点2 位于栅极叉指结构4的外部，因此为了实现导电屏蔽结构6与发射极焊点2之间的电连接，导电屏蔽结构6与发射极焊点2之间的电连接线100需穿过栅极叉指结构4或者栅极走线7，并与栅极叉指结构4和栅极走线7绝缘。具体地，可以通过以下两种实施例实现导电屏蔽结构6与发射极焊点2之间的电连接：
第一种实施例，如图7所示，栅极叉指结构4的位于导电屏蔽结构6与发射极焊点2之间的部分上设有第一断点a，导电屏蔽结构6与发射极焊点2之间的电连接线100穿设于该第一断点a内。此结构简单，容易实现，并能够实现电连接线100与栅极叉指结构4之间的绝缘。
在上述实施例中，第一断点a可以沿着IGBT的厚度方向贯穿栅极叉指结构4的第一多晶硅走线41、第一金属走线42和第一接触孔43，电连接线100与氧化层13之间通过介质层9隔开，也可以沿着IGBT的厚度方向仅贯穿第一金属走线42和第一接触孔43，电连接线100与第一多晶硅走线41之间通过介质层9隔开，在此不做具体限定。
在一些实施例中，电连接线100、导电屏蔽结构6的金属部分、发射极焊点2以及栅极叉指结构4的第一金属走线42由同一层金属刻蚀得到。这样，电连接线100、导电屏蔽结构6的金属部分、发射极焊点2以及栅极叉指结构4的第一金属走线42的制作效率较高。
第二种实施例，图9为本申请又一些实施例提供的集成有温度传感器的IGBT芯片的结构示意图。图9所示IGBT芯片与图1所示IGBT芯片的不同之处在于导电屏蔽结构6与发射极焊点2之间的电连接路径不同，其他诸如元胞区1的结构及设置位置、发射极焊点2的大小及设置位置、栅极焊点3的大小及设置位置、栅极叉指结构4的结构及设置位置、温度传感模块5、栅极走线7以及终端区8等均相同。如图9所示，IGBT芯片还包括终端区8，终端区8设置于元胞区1的外围一周。终端区8内设有金属环线81，该金属环线81围绕元胞区1的一周设置，且金属环线81与发射极焊点2电连接。图10为图9所示集成有温度传感器的IGBT芯片中区域III的放大图。如图10所示，栅极走线7的位于导电屏蔽结构6与金属环线81之间的部分上设有第二断点b，导电屏蔽结构6与金属环线81电连接，且导电屏蔽结构6与金属环线81之间的电连接线200穿设于该第二断点b内。这样，导电屏蔽结构6借助终端区8的金属环线81与发射极焊点2电连接，此结构简单，容易实现，并能够实现电连接线200与栅极走线7之间的绝缘。
在上述实施例中，第二断点b可以沿着IGBT的厚度方向贯穿栅极走线7的第三多晶硅走线71、第三金属走线72和第三接触孔73，电连接线200与氧化层13之间通过介质层9隔开，也可以沿着IGBT的厚度方向仅贯穿第三金属走线72和第三接触孔73，电连接线200与第三多晶硅走线71之间通过介质层9隔开，在此不做具体限定。
在一些实施例中，电连接线200、导电屏蔽结构6的金属部分、金属环线81以及栅极走线7的第三金属走线72由同一层金属刻蚀得到。这样，电连接线200、导电屏蔽结构6的金属部分、金属环线81以及栅极走线7的第三金属走线72的制作效率较高。
为了实现金属环线81与发射极焊点2之间的电连接，可选地，栅极走线7的位于 金属环线81与发射极焊点2之间的部分上设有第三断点c，金属环线81与发射极焊点2之间的电连接线300穿设于该第三断点c内。该第三断点c可以沿着IGBT的厚度方向贯穿栅极走线7的第三多晶硅走线71、第三金属走线72和第三接触孔73，电连接线300与氧化层13(参见图11)之间通过介质层9隔开，也可以沿着IGBT的厚度方向仅贯穿第三金属走线72和第三接触孔73，电连接线300与第三多晶硅走线71之间通过介质层9隔开，在此不做具体限定。
温度传感器51可以包括热敏电阻，温度传感器51通过该热敏电阻实现温度监测，温度传感器51也可以包括多晶硅二极管，温度传感器51通过该多晶硅二极管实现温度监测，在此不做具体限定。
图14为本申请一些实施例提供的集成有温度传感器的IGBT芯片中温度传感模块的一种结构示意图。如图14所示，温度传感器51包括至少一个第一多晶硅二极管511，该至少一个第一多晶硅二极管511串联设置，构成至少一个第一多晶硅二极管511的串联结构的一端端部的P型区通过阳极引线541与阳极焊点52电连接，构成至少一个第一多晶硅二极管511的串联结构的另一端端部的N型区通过阴极引线542与阴极焊点53电连接。这样，温度传感器51可以通过至少一个第一多晶硅二极管511实现温度监测，多晶硅二极管的体积较小，便于集成在尺寸较小的IGBT芯片上。
在一些实施例中，当温度传感器51包括多晶硅二极管并通过该多晶硅二极管实现温度监测时，如图5所示，温度传感器51和第一多晶硅走线41可以均设置于氧化层13上，温度传感器51与金属引线(包括阳极引线541和阴极引线542)之间可以通过介质层9隔开，且温度传感器51与阳极引线541之间以及温度传感器51与阴极引线542之间可以通过接触孔电连接。
温度传感器51包括的第一多晶硅二极管511的数量可以为1个、2个、3个等等，在此不做具体限定。在一些实施例中，温度传感器51包括的第一多晶硅二极管511的数量为2个～6个。示例的，如图14所示，温度传感器51包括的第一多晶硅二极管511的数量为4个。
图15为本申请一些实施例提供的集成有温度传感器的IGBT芯片中温度传感模块的另一种结构示意图。如图15所示，温度传感器51不仅包括至少一个第一多晶硅二极管511，还包括至少一个第二多晶硅二极管512，该至少一个第二多晶硅二极管512串联设置，构成至少一个第二多晶硅二极管512的串联结构的一端端部的N型区通过阳极引线541与阳极焊点52电连接，构成至少一个第二多晶硅二极管512的串联结构的另一端端部的P型区通过阴极引线542与阴极焊点53电连接。这样，至少一个第二多晶硅二极管512与至少一个第一多晶硅二极管511反向并联，能够避免温度传感器51在加入反向电压时被击穿。
在上述实施例中，温度传感器51包括的第二多晶硅二极管512的数量可以为1个、2个、3个等等，在此不做具体限定。
阳极焊点52和阴极焊点53可以设置于元胞区1的中间部分，也可以设置于元胞区1的边缘部分，在此不做具体限定。在一些实施例中，如图1所示，阳极焊点52和阴极焊点53设置于元胞区1的边缘部分。由于焊点与IGBT元胞之间通常留有一定的间隙以避免焊点处的信号对IGBT元胞产生影响，因此若将阳极焊点52和阴极焊点 53设置于元胞区1的中间部分，则阳极焊点52和阴极焊点53的四周都需要预留间隙，因此IGBT芯片的面积较大，不利于IGBT芯片的小型化设计。而若将阳极焊点52和阴极焊点53设置于元胞区1的边缘部分，则阳极焊点52和阴极焊点53只需三边预留间隙即可，因此有利于减小IGBT芯片的面积。
同理地，栅极焊点3可以设置于元胞区1的中间部分，也可以设置于元胞区1的边缘部分，在此不做具体限定。在一些实施例中，如图1所示，栅极焊点3设置于元胞区1的边缘部分。这样，只需在栅极焊点3的三边预留间隙即可，因此有利于减小IGBT芯片的面积。
当阳极焊点52、阴极焊点53和栅极焊点3均位于元胞区1的边缘部分时，阳极焊点52、阴极焊点53和栅极焊点3可以位于元胞区1的同一个边缘部分上，也可以位于元胞区1的相对两个边缘部分上，在此不做具体限定。在一些实施例中，如图12或图13所示，阳极焊点52、阴极焊点53和栅极焊点3位于元胞区1的同一个边缘部分上。在另一些实施例中，如图1所示，阳极焊点52和阴极焊点53位于元胞区1的一个边缘部分上，栅极焊点3位于元胞区1的与该一个边缘部分相对的另一个边缘部分上。
金属引线54可以沿着栅极叉指结构4的长度方向延伸，并全部设置于栅极叉指结构4的内部，也可以一部分位于栅极叉指结构4内，另一部分沿着与栅极叉指结构4的长度方向相交或者垂直的方向由栅极叉指结构4的侧边伸出，在此不做具体限定。
在一些实施例中，如图1所示，金属引线54沿着栅极叉指结构4的长度方向延伸，并全部设置于栅极叉指结构4的内部。这样，金属引线54不会与元胞区内IGBT元胞的发射极金属之间产生干涉，因此金属引线54不会占用元胞区1的有效面积，这样，在不改变元胞区内IGBT元胞的数量的前提下，IGBT芯片的面积可以制作得较小，由此可以满足IGBT芯片的小型化设计需求。
在一些实施例中，如图1所示，栅极叉指结构4经过元胞区1的中心位置，温度传感器51设置于栅极叉指结构4的位于该中心位置的部分内。这样，温度传感器51处于元胞区1的中心位置，而元胞区1的中心位置处的温度最高，因此可以通过温度传感器51监测到元胞区1的最高温度，由此提高了温度监测的准确性。
导电屏蔽结构6可以呈线状或者环状，在此不做具体限定。在一些实施例中，如图1、图4和图7所示，导电屏蔽结构6呈环形，且该导电屏蔽结构6围绕金属引线54的一周设置。这样，导电屏蔽结构6可以由金属引线54的四周方向阻止导电屏蔽结构6的外部信号对金属引线54内的传输信号产生干扰，因此能够保证温度传感模块5的采样和监测的准确性。
在本说明书的描述中，具体特征、结构、材料或者特点可以在任何的一个或多个实施例或示例中以合适的方式结合。
最后应说明的是：以上实施例仅用以说明本申请的技术方案，而非对其限制；尽管参照前述实施例对本申请进行了详细的说明，本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本申请各实施例技术方案的精神和范围。

Claims (11)

  1. 一种集成有温度传感器的IGBT芯片，其特征在于，包括：
    元胞区，由多个IGBT元胞构成；
    发射极焊点，设置于所述元胞区上，并与所述多个IGBT元胞的发射极电连接；
    栅极焊点和栅极叉指结构，位于所述元胞区的内部，所述栅极叉指结构连接于所述栅极焊点与所述多个IGBT元胞的栅极之间；
    温度传感模块，包括温度传感器、阳极焊点、阴极焊点以及连接于所述温度传感器、所述阳极焊点和所述阴极焊点之间的金属引线，所述温度传感器和至少部分所述金属引线位于所述栅极叉指结构的内部并与所述栅极叉指结构绝缘；
    导电屏蔽结构，至少设置于所述金属引线的位于所述栅极叉指结构内的部分与所述栅极叉指结构之间，并与所述金属引线和所述栅极叉指结构均绝缘，且所述导电屏蔽结构与所述发射极焊点电连接。
  2. 根据权利要求1所述的集成有温度传感器的IGBT芯片，其特征在于，所述栅极叉指结构包括第一多晶硅走线、第一金属走线和第一接触孔，所述第一多晶硅走线与所述第一金属走线之间通过介质层隔开，所述第一多晶硅走线与所述第一金属走线之间通过所述第一接触孔电连接；
    所述导电屏蔽结构为至少设置于所述金属引线的位于所述栅极叉指结构内的部分与所述第一金属走线之间的金属线。
  3. 根据权利要求1所述的集成有温度传感器的IGBT芯片，其特征在于，所述栅极叉指结构包括第一多晶硅走线、第一金属走线和第一接触孔，所述第一多晶硅走线与所述第一金属走线之间通过介质层隔开，所述第一多晶硅走线与所述第一金属走线之间通过所述第一接触孔电连接；
    所述导电屏蔽结构包括第二多晶硅走线、第二金属走线和第二接触孔，所述第二多晶硅走线与所述第二金属走线之间通过所述介质层隔开，所述第二多晶硅走线与所述第二金属走线之间通过所述第二接触孔电连接，所述第二多晶硅走线至少位于所述金属引线的位于所述栅极叉指结构内的部分与所述第一多晶硅走线之间，所述第二金属走线至少位于所述金属引线的位于所述栅极叉指结构内的部分与所述第一金属走线之间，所述导电屏蔽结构通过所述第二金属走线与所述发射极焊点电连接。
  4. 根据权利要求1～3中任一项所述的集成有温度传感器的IGBT芯片，其特征在于，所述栅极叉指结构的位于所述导电屏蔽结构与所述发射极焊点之间的部分上设有第一断点，所述导电屏蔽结构与所述发射极焊点之间的电连接线穿设于所述第一断点内。
  5. 根据权利要求1～3中任一项所述的集成有温度传感器的IGBT芯片，其特征在于，还包括栅极走线和终端区，所述栅极走线设置于所述元胞区的边缘，所述终端区设置于所述元胞区的外围一周；
    所述终端区内设有金属环线，所述金属环线围绕所述元胞区的一周设置，且所述金属环线与所述发射极焊点电连接；
    所述栅极走线的位于所述导电屏蔽结构与所述金属环线之间的部分上设有第二断点，所述导电屏蔽结构与所述金属环线电连接，且所述导电屏蔽结构与所述金属环线 之间的电连接线穿设于所述第二断点内。
  6. 根据权利要求1～5中任一项所述的集成有温度传感器的IGBT芯片，其特征在于，所述温度传感器包括至少一个第一多晶硅二极管，所述至少一个第一多晶硅二极管串联设置，所述金属引线包括阳极引线和阴极引线，构成所述至少一个第一多晶硅二极管的串联结构的一端端部的P型区通过所述阳极引线与所述阳极焊点电连接，构成所述至少一个第一多晶硅二极管的串联结构的另一端端部的N型区通过所述阴极引线与所述阴极焊点电连接。
  7. 根据权利要求6所述的集成有温度传感器的IGBT芯片，其特征在于，所述温度传感器还包括至少一个第二多晶硅二极管，所述至少一个第二多晶硅二极管串联设置，构成所述至少一个第二多晶硅二极管的串联结构的一端端部的N型区通过所述阳极引线与所述阳极焊点电连接，构成所述至少一个第二多晶硅二极管的串联结构的另一端端部的P型区通过所述阴极引线与所述阴极焊点电连接。
  8. 根据权利要求1～7中任一项所述的集成有温度传感器的IGBT芯片，其特征在于，所述栅极叉指结构经过所述元胞区的中心位置，所述温度传感器设置于所述栅极叉指结构的位于所述中心位置的部分内。
  9. 根据权利要求1～8中任一项所述的集成有温度传感器的IGBT芯片，其特征在于，所述金属引线沿着所述栅极叉指结构的长度方向延伸，且所述金属引线全部位于所述栅极叉指结构的内部。
  10. 根据权利要求1～9中任一项所述的集成有温度传感器的IGBT芯片，其特征在于，所述导电屏蔽结构呈环形，所述导电屏蔽结构围绕所述金属引线的一周设置。
  11. 根据权利要求1～10中任一项所述的集成有温度传感器的IGBT芯片，其特征在于，所述阳极焊点和所述阴极焊点设置于所述元胞区的边缘部分。
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