WO2021233380A1 - 显示面板及其制备方法 - Google Patents

显示面板及其制备方法 Download PDF

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Publication number
WO2021233380A1
WO2021233380A1 PCT/CN2021/094886 CN2021094886W WO2021233380A1 WO 2021233380 A1 WO2021233380 A1 WO 2021233380A1 CN 2021094886 W CN2021094886 W CN 2021094886W WO 2021233380 A1 WO2021233380 A1 WO 2021233380A1
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WIPO (PCT)
Prior art keywords
base substrate
layer
light
away
orthographic projection
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PCT/CN2021/094886
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English (en)
French (fr)
Inventor
舒适
王雷
徐传祥
岳阳
李翔
姚琪
Original Assignee
京东方科技集团股份有限公司
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Publication of WO2021233380A1 publication Critical patent/WO2021233380A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30—Devices specially adapted for multicolour light emission
    • H10K59/38—Devices specially adapted for multicolour light emission comprising colour filters or colour changing media [CCM]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • G09F9/301—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements flexible foldable or roll-able electronic displays, e.g. thin LCD, OLED
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/85—Arrangements for extracting light from the devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/86—Arrangements for improving contrast, e.g. preventing reflection of ambient light
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment

Definitions

  • the present disclosure relates to the field of display technology, and in particular to a display panel and a manufacturing method of the display panel.
  • the purpose of the present disclosure is to overcome the above-mentioned shortcomings of the prior art and provide a display panel and a manufacturing method of the display panel.
  • a display panel including:
  • the backplane includes a base substrate, and a photoelectric sensing structure and a light-emitting structure disposed on the base substrate, and the light-emitting structure includes a light-emitting layer;
  • the packaging structure is provided on the side of the photoelectric sensing structure and the light emitting structure away from the base substrate;
  • the phase retarder is arranged on the side of the package structure away from the back plate;
  • the linear polarizer is arranged on the side of the phase retarder away from the back plate;
  • the color film layer is arranged on the side of the linear polarizer away from the back plate.
  • the color film layer includes a plurality of color resist regions. The orthographic projection of the color resist regions on the back plate and the light emitting The orthographic projections of the layers on the backplane coincide;
  • the phase retarder is located at least between the plurality of color resist regions, and at least fills the gaps between the plurality of color resist regions; the orthographic projection of the linear polarizer on the backplane and the The orthographic projections of the phase retarder on the back plate coincide.
  • the photoelectric sensing structure includes:
  • the first thin film transistor is arranged on the base substrate;
  • the photosensor device is arranged on a side of the first thin film transistor away from the base substrate, and is electrically connected to the first thin film transistor;
  • the light emitting structure includes:
  • the second thin film transistor is arranged on the base substrate
  • a light emitting device arranged on a side of the second thin film transistor away from the base substrate and electrically connected to the second thin film transistor, and the light emitting device includes the light emitting layer;
  • the orthographic projection of the photoelectric sensor device on the base substrate and the orthographic projection of the light-emitting layer on the base substrate do not overlap.
  • the display panel further includes:
  • the first protective layer is provided on the side of the first thin film transistor and the second thin film transistor away from the base substrate;
  • the first planarization layer is provided on a side of the first protection layer away from the base substrate;
  • the insulating layer is provided on the side of the first planarization layer away from the base substrate;
  • the connecting electrode is provided on the side of the insulating layer away from the base substrate;
  • the photoelectric sensor device is arranged on a side of the insulating layer away from the base substrate;
  • the second protective layer is provided on the side of the connection electrode and the photoelectric sensor device away from the base substrate;
  • the second planarization layer is provided on a side of the second protection layer away from the base substrate, and a third via hole is provided on the second planarization layer.
  • the light emitting device further includes:
  • the first electrode is provided on a side of the second planarization layer away from the base substrate;
  • the first pixel intermediate layer is disposed on the side of the first electrode away from the base substrate, and the transmittance of the first pixel intermediate layer to light with a wavelength of less than 600nm is higher than that of light with a wavelength of greater than 600nm Transmittance, the first pixel intermediate layer is provided with a first via hole, the first via hole is connected to the first electrode, and the orthographic projection of the photosensor device on the base substrate is at least Partly located in the orthographic projection of the first pixel intermediate layer on the base substrate;
  • the light-emitting layer is disposed in the first via hole on the first pixel intermediate layer;
  • the second electrode is arranged on the side of the light-emitting layer away from the base substrate.
  • the light emitting device further includes:
  • the first electrode is provided on a side of the second planarization layer away from the base substrate;
  • the first pixel intermediate layer is provided on the side of the first electrode away from the base substrate, and the transmittance of the pixel intermediate layer to light with a wavelength of less than 600nm is higher than that of light with a wavelength of greater than 600nm
  • the first pixel intermediate layer is provided with a first via hole, the first via hole is connected to the first electrode, and the orthographic projection of the photoelectric sensor device on the base substrate is at least partially located
  • the first pixel intermediate layer is in an orthographic projection on the base substrate;
  • the second pixel intermediate layer is provided on a side of the first pixel intermediate layer away from the base substrate, and the orthographic projection of the first pixel intermediate layer on the base substrate is on the second
  • the pixel intermediate layer is in the orthographic projection on the base substrate, the second pixel intermediate layer is provided with a second via hole, and the orthographic projection of the second via hole on the base substrate is on the base substrate.
  • the first via is in an orthographic projection on the base substrate;
  • the light-emitting layer is disposed in the second via hole on the second pixel intermediate layer;
  • the second electrode is arranged on the side of the light-emitting layer away from the base substrate.
  • the display panel further includes:
  • the third pixel intermediate layer is provided on the side of the linear polarizer far away from the base substrate, and the transmittance of the third pixel intermediate layer to light with a wavelength of less than 600nm is higher than that of light with a wavelength of greater than 600nm Transmittance; the orthographic projection of the third pixel intermediate layer on the base substrate coincides with the orthographic projection of the phase retarder on the base substrate, and the photosensor device is on the substrate.
  • the orthographic projection on the base substrate is at least partially located within the orthographic projection of the third pixel intermediate layer on the base substrate.
  • the photoelectric sensor device includes:
  • the third electrode is provided on the side of the insulating layer away from the base substrate, and is electrically connected to the first thin film transistor;
  • the photoelectric conversion layer is provided on the side of the third electrode away from the base substrate;
  • the fourth electrode is arranged on the side of the photoelectric conversion layer away from the base substrate.
  • the phase retarder is a quarter wave plate.
  • the phase retarder is a polymer liquid crystal layer
  • the thickness is greater than or equal to 1 ⁇ m and less than or equal to 3 ⁇ m
  • the transmittance is greater than or equal to 95%.
  • the linear polarizer is a coated linear polarizer with a thickness greater than or equal to 1 ⁇ m and less than or equal to 10 ⁇ m, a transmittance greater than or equal to 30% and less than or equal to 45%, and a degree of polarization is greater than Equal to 85% and less than or equal to 99%.
  • the display panel further includes:
  • the touch sensing structure is arranged between the packaging structure and the phase retarder.
  • a method for manufacturing a display panel including:
  • the backplane includes a base substrate, and a photoelectric sensing structure and a light-emitting structure disposed on the base substrate, the light-emitting structure including a light-emitting layer;
  • phase retarder material layer Patterning the phase retarder material layer and the linear polarizer material layer, so that the phase retarder material layer forms a phase retarder, and the linear polarizer material layer forms a linear polarizer;
  • a color film layer is formed on the side of the linear polarizer away from the back plate, the color film layer includes a plurality of color resist areas, and the orthographic projection of the color resist areas on the back plate and the light-emitting layer The orthographic projections on the backplane coincide;
  • the phase retarder is located at least between the plurality of color resist regions, and at least fills the gaps between the plurality of color resist regions; the orthographic projection of the linear polarizer on the backplane and the The orthographic projections of the phase retarder on the back plate coincide.
  • a phase retarder is provided on the side of the package structure away from the back plate, a wired polarizer is provided on the side of the phase retarder away from the back plate, and the side of the linear polarizer is provided on the side away from the back plate.
  • the color film layer includes a plurality of color resist regions, the orthographic projection of the color resist region on the backplane coincides with the orthographic projection of the light-emitting layer on the backplane, and the phase retarder is located at least between the plurality of color resist regions, at least Fill the gaps between the multiple color resist regions; the orthographic projection of the linear polarizer on the backplane coincides with the orthographic projection of the phase retarder on the backplane.
  • the phase retarder and linear polarizer are used to replace the black matrix in the color film layer to form a unidirectional light transmission effect; the reflected light of the fingerprint can be transmitted through the phase retarder and linear polarizer to the photoelectric sensor structure. Fingerprint recognition function; after the ambient light enters the backplane, it can block the reflected light reflected by the metal layer in the backplane from the ambient light, avoiding the impact on the display effect; on the other hand, no phase is set above the light-emitting layer
  • the retarder and the linear polarizer solve the problems of low brightness and high power consumption of the display panel due to the low transmittance of the phase retarder and the linear polarizer.
  • Figure 1 is a schematic diagram of the optical path of fingerprint recognition in a display panel in the related art
  • FIG. 2 is a schematic structural diagram of an exemplary embodiment of a display panel of the present disclosure
  • FIG. 3 is a schematic structural diagram of the display panel in FIG. 2 after forming a first pixel intermediate layer
  • FIG. 4 is a schematic diagram of the structure after forming a second pixel intermediate layer on the basis of FIG. 3;
  • FIG. 5 is a schematic structural diagram of another exemplary embodiment of a display panel of the present disclosure.
  • Fig. 6 is a schematic diagram of a light path preventing ambient light in the display panel of the present disclosure
  • FIG. 7 is a schematic structural diagram of another exemplary embodiment of a display panel of the present disclosure.
  • FIG. 8 is a schematic block diagram of an exemplary embodiment of a method for manufacturing a display panel of the present disclosure.
  • Photoelectric sensor device 31, fourth electrode; 32, photoelectric conversion layer; 33, third electrode;
  • optical fingerprint recognition uses the light emitted by the OLED to be reflected by the fingerprint 11 and then enter the display panel or pass through the display panel to be received by the photoelectric sensing structure.
  • the display panel only the anode (first electrode 41) )
  • the shielded part, light can pass through, and the color film layer 9 in COE (CF on Encapsulation, the color film layer on the encapsulation layer) shields the unshielded parts with the black matrix 91, so it is completely sealed.
  • COE CF on Encapsulation, the color film layer on the encapsulation layer
  • This exemplary embodiment first provides a display panel, referring to the schematic structural diagrams of an exemplary embodiment of the display panel of the present disclosure shown in FIGS. 2, 3, and 4; the display panel may include a backplane, a packaging structure 5, and a phase delay.
  • the backplane includes a base substrate 1, and a photoelectric sensing structure and a light-emitting structure disposed on the base substrate 1, and the light-emitting structure includes a light-emitting layer 44;
  • the package structure 5 is provided on the side of the photoelectric sensing structure and the light emitting structure away from the base substrate;
  • the phase retarder 6 is provided on the side of the package structure 5 away from the back plate;
  • the linear polarizer 7 Set on the side of the phase retarder 6 away from the back plate;
  • the color film layer 9 is set on the side of the linear polarizer 7 away from the back plate, the color film layer 9 includes a plurality of color resist regions 92.
  • the orthographic projection of the color resist area 92 on the backplane coincides with the orthographic projection of the light-emitting layer 44 on the backplane; wherein, the phase retarder 6 is at least located in a plurality of the color resisters. Between the regions 92, at least fill the gaps between the multiple color resist regions 92; the orthographic projection of the linear polarizer 7 on the back plate and the phase retarder 6 on the back plate The orthographic projections coincide.
  • the display panel uses the phase retarder 6 and the linear polarizer 7 to replace the black matrix 91 in the color film layer 9 to form a one-way light transmission effect; both the reflected light of the fingerprint 11 can pass through the phase retarder 6 and the linear polarizer 7
  • the photoelectric sensing structure realizes the function of fingerprint identification; after the ambient light enters the backplane, it can block the reflection light reflected by the metal layer in the backplane from the ambient light from exiting, so as to avoid the influence on the display effect.
  • the phase retarder and the linear polarizer are not arranged above the light-emitting layer, which solves the problem of low brightness and high power consumption of the display panel due to the low transmittance of the phase retarder 6 and the linear polarizer 7.
  • the backplane may include a base substrate 1, and a photoelectric sensing structure and a light emitting structure provided on the base substrate 1.
  • the base substrate 1 may be a flexible base substrate, and of course, a rigid base substrate may also be used.
  • the photo sensor structure may include a first thin film transistor 22 and a photo sensor device 3, the first thin film transistor 22 is provided on the base substrate 1; the photo sensor device 3 is provided on the side of the first thin film transistor 22 away from the base substrate 11 , And electrically connected to the first thin film transistor 22.
  • the light emitting structure may include a second thin film transistor 23 and a light emitting device 4.
  • the second thin film transistor 23 is provided on the base substrate 1; The two thin film transistors 23 are electrically connected.
  • a first thin film transistor 22 and a second thin film transistor 23 are provided on the base substrate 1.
  • the first thin film transistor 22 and the second thin film transistor 23 can be top-gate or bottom-gate, or The double gate type, in this example embodiment, the first thin film transistor 22 is a top gate type.
  • the second thin film transistor 23 is of a double gate type. The above-mentioned thin film transistor adopts the structure in the prior art, therefore, it will not be repeated here.
  • a first protective layer 131 is provided on the side of the first thin film transistor 22 and the second thin film transistor 23 away from the base substrate 1, and a first planarization layer 121 is provided on the side of the first protective layer 131 away from the base substrate 1.
  • the material of the first planarization layer 121 is an organic resin material, and the first planarization layer 121 can improve the problem of high dark current of the photosensor device 3.
  • An insulating layer 14 is provided on the side of the first planarization layer 121 away from the base substrate 1, and a connecting electrode 15 and a photosensor device 3 are provided on the side of the insulating layer 14 away from the base substrate 1.
  • the connecting electrode 15 passes through the first
  • the via holes on the protective layer 131, the first planarization layer 121 and the insulating layer 14 are electrically connected to the source and drain 21 of the second thin film transistor 23.
  • the photoelectric sensor device 3 may be an amorphous silicon photoelectric sensor device, that is, the photoelectric sensor device 3 may be a PIN photodiode.
  • the photo sensor device 3 includes a fourth electrode 31, a photoelectric conversion layer 32 and a third electrode 33, and the photoelectric conversion layer 32 is located between the fourth electrode 31 and the third electrode 33.
  • the third electrode 33 of the photo sensor device 3 is electrically connected to the source and drain 21 of the first thin film transistor 22 through the first protective layer 131, the first planarization layer 121, and the via hole on the insulating layer 14, so as to pass through the first thin film transistor. 22 controls the photoelectric sensor device 3 switch.
  • the photoelectric conversion layer 32 is used to receive the reflected light reflected by the fingerprint 11, and convert the reflected light into an electrical signal, which is transmitted to the processor for processing and identifying the fingerprint 11.
  • a second protective layer 132 is provided on the side of the connection electrode 15 and the photosensor device 3 away from the base substrate 1, and a second planarization layer 122 is provided on the side of the second protective layer 132 away from the base substrate 1.
  • a third via hole 123 is provided on the second planarization layer 122 (in the figure, since the first pixel intermediate layer 42 has been formed in the third via hole 123, it is indicated by an arrow at the hole wall of the third via hole 123).
  • a light emitting device 4 is provided on a side of the second planarization layer 122 away from the base substrate 1.
  • the light emitting device 4 may include a first electrode 41, a first pixel intermediate layer 42, a second pixel intermediate layer 43, a light emitting layer 44, a second electrode 45 and spacers 46.
  • the first electrode 41 may be an anode
  • the first electrode 41 is provided on the side of the second planarization layer 122 away from the base substrate 1
  • the first electrode 41 passes through the third via hole on the second planarization layer 122 123 and the via holes on the second protection layer 132 are electrically connected to the connection electrode 15, and are connected to the second thin film transistor 23 through the connection electrode 15 to control the switching of the light emitting device 4 through the second thin film transistor 23.
  • a first pixel intermediary layer 42 is provided on the side of the first electrode 41 away from the base substrate 1.
  • the first pixel intermediary layer 42 has a higher transmittance for light with a wavelength of less than 600 nm than that for light with a wavelength of greater than 600 nm.
  • the transmittance of light with a wavelength of less than 600nm through the first pixel intermediary layer 42 is relatively high, and the transmittance of light with a wavelength greater than 600nm through the first pixel intermediary layer 42 is relatively low, so the light through the first pixel intermediary layer 42 has a low transmittance.
  • the color of the light of a pixel intermediate layer 42 is blue, cyan or green; referring to FIG. 3, a first via 421 is provided on the first pixel intermediate layer 42, and the first via 421 is connected to the first The electrode 41, that is, the first via 421 is located above the first electrode 41, so that the first electrode 41 is partially exposed.
  • a second pixel intermediate layer 43 is provided on the side of the first pixel intermediate layer 42 away from the base substrate 1, and the orthographic projection of the first pixel intermediate layer 42 on the base substrate 1 is on the first In the orthographic projection of the two pixel intermediate layer 43 on the base substrate 1, that is, the second pixel intermediate layer 43 completely covers the first pixel intermediate layer 42, and the edge of the second pixel intermediate layer 43 protrudes from the first pixel intermediate layer.
  • the edge of the pixel intermediate layer 42 is greater than or equal to 0.5 ⁇ m; the second pixel intermediate layer 43 is provided with a second via 431, and the orthographic projection of the second via 431 on the base substrate 1 is on the first via 421
  • the position of the second via 431 is the same as the position of the first via 421, but the radial size of the second via 431 is smaller than the radial size of the first via 421, so It is ensured that the second pixel intermediate layer 43 can completely cover the first pixel intermediate layer 42 and expose the first electrode 41 at the first via 421 and the second via 431.
  • the second pixel intermediate layer 43 can protect the first pixel intermediate layer 42.
  • the orthographic projection of the photoelectric sensor device 3 on the base substrate 1 is at least partially within the orthographic projection of the first pixel intermediate layer 42 on the base substrate 1, that is, the first pixel intermediate layer 42 partially or completely covers the underlying photoelectric sensor device 3.
  • the first pixel intermediate layer 42 shields the photoelectric sensor device 3, which solves the problem of excessive noise in the photoelectric sensor device 3 when the fingerprint 11 is recognized under strong ambient light.
  • the second via 431 is provided with a light-emitting layer 44, which is in contact with the first electrode 41, and transmits electrical signals to the light-emitting layer 44 through the first electrode 41; the orthographic projection and photoelectricity of the light-emitting layer 44 on the base substrate 1
  • the orthographic projection of the conversion layer 32 on the base substrate 1 does not overlap each other, that is, the orthographic projection of the photoelectric sensor device 3 on the base substrate 1 and the orthographic projection of the light-emitting layer 44 on the base substrate 1 do not overlap.
  • a spacer 46 is provided on the side of the second pixel intermediate layer 43 away from the base substrate 1.
  • the spacer 46 is used to support the mask during the evaporation of the light-emitting layer 44; in the light-emitting layer 44, the second pixel
  • the side of the intermediate layer 43 and the spacer 46 away from the base substrate 1 is provided with a second electrode 45, and the second electrode 45 may be a cathode.
  • the specific structure of the light-emitting device 4 is not limited to the above description.
  • the transmittance of the intermediate layer 42 to light with a wavelength of less than 600nm is higher than the transmittance of light with a wavelength of greater than 600nm, that is, the transmittance of light with a wavelength of less than 600nm through the first pixel intermediate layer 42 is higher, greater than 600nm
  • the transmittance of the light passing through the first pixel intermediate layer 42 is low, so the color of the light passing through the first pixel intermediate layer 42 is blue, cyan or green; on the first pixel intermediate layer 42
  • a first via 421 is provided, and the first via 421 is connected to the first electrode, that is, the first via 421 is located above the first electrode 41, so that the first electrode 41 is partially exposed.
  • the orthographic projection of the photoelectric sensor device 3 on the base substrate 1 is at least partially within the orthographic projection of the first pixel intermediate layer 42 on the base substrate 1, that is, the first pixel intermediate layer 42 partially or completely covers the underlying photoelectric sensor device 3.
  • the problem of excessive noise of the photoelectric sensor device 3 when fingerprint 11 is recognized under strong ambient light is solved.
  • the light-emitting layer 44 is provided in the first via hole 421 on the first pixel intermediate layer 42; the second electrode is provided on the side of the light-emitting layer 44 away from the base substrate 1. The rest of the structure settings remain unchanged, so I won’t repeat them here.
  • a packaging structure 5 is provided on the side of the second electrode 45 of the light emitting device 4 away from the base substrate 1.
  • the packaging structure 5 may adopt TFE (Thin-Film Encapsulation).
  • the photoelectric sensing structure is disposed between the base substrate 1 and the light-emitting structure.
  • the photoelectric sensing structure may also be provided on the side of the base substrate 1 away from the light-emitting structure; specifically, the backplane may include the base substrate 1, and the light-emitting structure is provided on the base substrate 1. ;
  • the specific structure of the light-emitting structure is the same as the above, and will not be repeated here.
  • the photoelectric sensing structure has its own separate wire.
  • the display panel may further include a touch sensing structure (not shown in the figure), and the touch sensing structure is provided between the packaging structure 5 and the phase retarder 6.
  • the touch sensing structure is used to receive a user's touch to generate a touch signal.
  • a phase retarder 6 is provided on the side of the package structure 5 away from the base substrate 1.
  • the phase retarder 6 is located at least between the plurality of color resist regions 92, and at least fills the plurality of color resist regions 92.
  • the gap between the phase retarder 6 on the base substrate 1 at least fills the gap between the orthographic projection of the light-emitting layer 44 on the base substrate 1, that is, the phase retarder 6 can be located in multiple
  • the color resistance regions 92 are filled with the gaps between the multiple color resistance regions 92; it can also slightly protrude from the color resistance regions 92 to cover the edges of the color resistance regions; that is, the first phase retarder 6 is provided with Through holes, the light emitted by the light-emitting layer 44 can be emitted through the first through hole.
  • the orthographic projection of the light-emitting layer 44 on the base substrate 1 coincides with the orthographic projection of the first through hole on the base substrate 1. It is the edge of the orthographic projection of the first through hole on the base substrate 1 that is within the orthographic projection of the light-emitting layer 44 on the base substrate 1. Based on the error, it may be that the edge of the orthographic projection of the first through hole on the base substrate 1 protrudes about approximately 4 microns, or the edge of the orthographic projection of the first through hole on the base substrate 1 is indented by approximately 4 microns; in some other example embodiments, it may be that the edge of the orthographic projection of the first through hole on the base substrate 1 is opposite to the edge of the through hole on the first pixel intermediate layer 42 on the base substrate 1.
  • the edge of the projection protrudes about 4 microns, or the edge of the orthographic projection of the first through hole on the base substrate 1 is relative to the edge of the orthographic projection of the via hole on the first pixel intermediate layer 42 on the base substrate 1
  • the indentation is about 4 microns.
  • the phase retarder 6 is a quarter wave plate, and the phase retarder 6 may be a polymer liquid crystal layer with a thickness greater than or equal to 1 ⁇ m and less than or equal to 3 ⁇ m, and a transmittance greater than or equal to 95%.
  • a wired polarizer 7 is provided on the side of the phase retarder 6 away from the base substrate 1.
  • the orthographic projection of the linear polarizer 7 on the base substrate 1 and the phase retarder 6 on the base substrate 1 The orthographic projection coincides; that is, a second through hole is provided on the linear polarizer 7, and the orthographic projection of the light-emitting layer 44 on the base substrate 1 coincides with the orthographic projection of the second through hole on the base substrate 1, so that the light-emitting layer
  • the light emitted by 44 can be emitted through the first through hole and the second through hole, or the edge of the orthographic projection of the second through hole on the base substrate 1 is within the orthographic projection of the light-emitting layer 44 on the base substrate 1.
  • the position and size of the second through hole on the linear polarizer 7 are exactly the same as the position and size of the first through hole on the phase retarder 6, which will not be repeated here.
  • the linear polarizer 7 is a coated linear polarizer with a thickness of 1 ⁇ m or more and 10 ⁇ m or less, a transmittance of 30% or more and 45% or less, and a polarization degree of 85% or more and 99% or less.
  • the phase retarder 6 and the coated linear polarizer can be used to prevent the metal layer in the backplane from reflecting ambient light from affecting the display effect, for example, the metal layer in the backplane or metal traces (source and drain) 21 and so on) reflected light.
  • the linear polarizer 7 is modulated into linear polarized light in the same direction as the optical axis, and after the quarter wave plate, it is modulated into circularly polarized light in a certain direction, which is routed by the metal layer or metal (source and drain). 21, etc.) After reflection, the reverse circularly polarized light is formed due to the half-wave loss.
  • the film group formed by the phase retarder 6 and the coated linear polarizer is light permeable in one direction. Therefore, the light emitted by the light-emitting layer 44 reaches the fingerprint 11, and the reflected light of the fingerprint 11 can pass through and enter the back plate or The back plate is shot down to the photoelectric sensor structure, so the reflected light of the fingerprint can be transmitted through the phase retarder 6 and the linear polarizer 7 to the photoelectric sensor structure to realize the function of fingerprint recognition; it can also block the metal in the back plate.
  • the reflected light reflected by the ambient light is emitted by the layer to avoid the influence on the display effect, and it is also compatible with COE.
  • the third pixel intermediate layer 8 can be provided on the side of the linear polarizer 7 away from the base substrate 1. Referring to FIG. 7, the orthographic projection of the third pixel intermediate layer 8 on the base substrate 1 coincides with the orthographic projection of the phase retarder 6 on the base substrate 1, that is, the third pixel intermediate layer 8 is provided with The third through hole, the orthographic projection of the light-emitting layer 44 on the base substrate 1 coincides with the orthographic projection of the third through hole on the base substrate 1, or it may be the orthographic projection of the third through hole on the base substrate 1.
  • the edge of the projection is in the orthographic projection of the light-emitting layer 44 on the base substrate 1, so that the light emitted by the light-emitting layer 44 can be emitted through the first through hole, the second through hole, and the third through hole.
  • the position and size of the pixel intermediate layer 8 and the position and size of the second through hole on the linear polarizer 7 are exactly the same as the position and size of the first through hole on the phase retarder 6, which will not be repeated here.
  • the transmittance of the third pixel intermediate layer 8 to light with a wavelength of less than 600nm is higher than the transmittance of light with a wavelength of greater than 600nm, that is, the transmittance of light with a wavelength of less than 600nm through the pixel intermediate layer is higher, and the wavelength is greater than
  • the transmittance of light of 600 nm through the pixel intermediary layer is low, so the color of the light that passes through the third pixel intermediary layer 8 is blue, cyan, or green.
  • the orthographic projection of the photoelectric sensing structure on the base substrate 1 is at least partially located within the orthographic projection of the third pixel intermediate layer 8 on the base substrate 1, that is, the third pixel intermediate layer 8 partially or completely covers the underlying photoelectric sensor Structure 3 solves the problem of excessive noise in photoelectric sensor structure 3 when fingerprints are recognized under strong ambient light.
  • a color film layer 9 is provided on the side of the linear polarizer 7 away from the base substrate 1.
  • the color film layer 9 includes a plurality of color resist regions 92, and the color resist regions 92 are
  • the orthographic projection on the backplane coincides with the orthographic projection of the light-emitting layer 44 on the backplane.
  • the glass cover plate 10 is attached through OCA (Optically Clear Adhesive).
  • the color filter layer 9 is provided on the side of the third pixel intermediary layer 8 away from the base substrate 1, on the color filter layer 9 No black matrix is set.
  • the glass cover plate 10 is attached by OCA.
  • this exemplary embodiment also provides a display device, which includes the above-mentioned display panel, and the specific structure of the display panel has been described in detail above, so it will not be repeated here.
  • the specific type of the display device is not particularly limited.
  • the types of display devices commonly used in the field can be used, such as OLED displays, mobile devices such as mobile phones, wearable devices such as watches, VR devices, etc., according to those skilled in the art
  • the specific purpose of the display device is selected accordingly, which will not be repeated here.
  • the display device also includes other necessary components and components. Taking the display as an example, specific examples include a housing, a circuit board, a power cord, etc. The specific usage requirements shall be supplemented accordingly, which will not be repeated here.
  • the beneficial effects of the display device provided by the embodiments of the present disclosure are the same as the beneficial effects of the display panel provided by the above-mentioned embodiments, and will not be repeated here.
  • this example embodiment also provides a method for manufacturing a display panel. As shown in FIG. 8, the method for manufacturing the display panel may include the following steps:
  • a backplane in step S10, includes a base substrate 1, and a photoelectric sensing structure and a light-emitting structure disposed on the base substrate 1, and the light-emitting structure includes a light-emitting layer 44.
  • Step S20 forming an encapsulation structure 5 on the side of the photoelectric sensing structure and the light-emitting structure away from the base substrate 1.
  • Step S30 forming a phase retarder material layer on the side of the packaging structure 5 away from the back plate.
  • Step S40 forming a linear polarizer material layer on the side of the phase retarder material layer away from the back plate.
  • Step S50 patterning the phase retarder material layer and the linear polarizer material layer, so that the phase retarder material layer forms a phase retarder 6, and the linear polarizer material layer forms a linear polarizer 7.
  • a color film layer 9 is formed on the side of the linear polarizer 7 away from the back plate.
  • the color film layer 9 includes a plurality of color resist areas 92, and the color resist areas 92 are on the back plate.
  • the orthographic projection of the light-emitting layer 44 coincides with the orthographic projection of the light-emitting layer 44 on the backplane.
  • phase retarder 6 is located at least between the plurality of color resist regions 92, and at least fills the gaps between the plurality of color resist regions 92; the linear polarizer 7 is located on the back plate The orthographic projection coincides with the orthographic projection of the phase retarder 6 on the back plate.
  • the liquid crystal polymer solution is spin-coated, knife-coated, printed, etc., to form a uniform film layer on the side of the package structure 5 away from the back plate and cured to form a phase retarder material layer;
  • a uniform film layer is formed on the side of the phase retarder material layer away from the back plate and cured to form a linear polarizer material layer, and it is oriented under the induction of liquid crystal to make the entire film
  • the layer has polarizing properties.
  • the phase retarder material layer and the linear polarizer material layer are subjected to the same photolithography or dry etching to form the phase retarder material into the phase retarder 6 and the linear polarizer material layer to form the linear polarizer 7.
  • the thickness of the film layer formed by coating is relatively thin, while the thickness of the film layer formed by the stretching method is too thick to meet the requirements.
  • the terms “a”, “a”, “the” and “said” are used to indicate that there are one or more elements/components/etc.; the terms “including”, “including” and “have” are used to It means open-ended inclusion and means that in addition to the listed elements/components/etc., there may be other elements/components/etc.; the terms “first”, “second” and “third” “, etc. are only used as markers, not as a restriction on the number of objects.

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Abstract

一种显示面板及其制备方法。该显示面板包括背板、封装结构（5）、相位延迟片（6）、线偏光片（7）和彩膜层（9）；背板包括衬底基板（1）及设在衬底基板（1）之上的光电传感结构和发光结构，发光结构包括发光层（44）；封装结构（5）设于光电传感结构和发光结构的远离衬底基板（1）的一面；相位延迟片（6）设于封装结构（5）的远离背板的一面；线偏光片（7）设于相位延迟片（6）的远离背板的一面；彩膜层（9）设于线偏光片（7）的远离背板的一面，彩膜层（9）包括多个色阻区（92），色阻区（92）在背板上的正投影与发光层（44）在背板上的正投影重合；相位延迟片（6）至少位于多个色阻区（92）之间，至少填充满多个色阻区（92）之间的间隙；线偏光片（7）在背板上的正投影与相位延迟片（6）在背板上的正投影重合。

Description

显示面板及其制备方法
交叉引用
本公开要求于2020年5月22日提交的申请号为202010441698.6名称为“显示面板及其制备方法”的中国专利申请的优先权，该中国专利申请的全部内容通过引用全部并入本文。
技术领域
本公开涉及涉及显示技术领域，尤其涉及一种显示面板和显示面板的制备方法。
背景技术
目前OLED面板相对于LCD最显著的特点是全固态显示(不含液晶)，在弯曲甚至折叠能力上有明显优势。
为了提高OLED产品弯折性能，需要持续减薄模组厚度。为了解决该问题，人们采用了将触控结构整合在封装层上(TOT/Touch on TFE)和彩膜层整合在封装层上(COE/CF on Encapsulation)的方法，大幅降低了模组厚度；但是，采用该方法后会导致无法进行指纹识别的缺陷。
所述背景技术部分公开的上述信息仅用于加强对本公开的背景的理解，因此它可以包括不构成对本领域普通技术人员已知的现有技术的信息。
公开内容
本公开的目的在于克服上述现有技术的不足，提供一种显示面板和显示面板的制备方法。
根据本公开的一个方面，提供一种显示面板，包括：
背板，包括衬底基板，以及设置在所述衬底基板之上的光电传感结构和发光结构，所述发光结构包括发光层；
封装结构，设于所述光电传感结构和所述发光结构的远离所述衬底基板的一面；
相位延迟片，设于所述封装结构的远离所述背板的一面；
线偏光片，设于所述相位延迟片的远离所述背板的一面；
彩膜层，设于所述线偏光片的远离所述背板的一面，所述彩膜层包括多个色阻区，所述色阻区在所述背板上的正投影与所述发光层在所述背板上的正投影重合；
其中，所述相位延迟片至少位于多个所述色阻区之间，至少填充满多个所述色阻区之间的间隙；所述线偏光片在所述背板上的正投影与所述相位延迟片在所述背板上的正投影重合。
在本公开的一种示例性实施例中，
所述光电传感结构包括：
第一薄膜晶体管，设于所述衬底基板之上；
光电传感器件，设于所述第一薄膜晶体管的远离所述衬底基板的一面，并与所述第一薄膜晶体管电连接；
所述发光结构包括：
第二薄膜晶体管，设于所述衬底基板之上；
发光器件，设于所述第二薄膜晶体管的远离所述衬底基板的一面，并与所述第二薄膜晶体管电连接，所述发光器件包括所述发光层；
所述光电传感器件在所述衬底基板上的正投影与所述发光层在所述衬底基板上的正投影不交叠。
在本公开的一种示例性实施例中，所述显示面板还包括：
第一保护层，设于所述第一薄膜晶体管和所述第二薄膜晶体管的远离所述衬底基板的一面；
第一平坦化层，设于所述第一保护层的远离所述衬底基板的一面；
绝缘层，设于所述第一平坦化层的远离所述衬底基板的一面；
连接电极，设于所述绝缘层的远离所述衬底基板的一面；
所述光电传感器件设于所述绝缘层的远离所述衬底基板的一面；
第二保护层，设于所述连接电极和所述光电传感器件的远离所述衬底基板的一面；
第二平坦化层，设于所述第二保护层的远离所述衬底基板的一面，所述第二平坦化层上设置有第三过孔。
在本公开的一种示例性实施例中，所述发光器件还包括：
第一电极，设于所述第二平坦化层的远离所述衬底基板的一面；
第一像素介定层，设于所述第一电极的远离所述衬底基板的一面，所述第一像素介定层对于波长小于600nm的光线的透过率高于波长大于600nm的光线的透过率，所述第一像素介定层上设置有第一过孔，所述第一过孔连通至所述第一电极，所述光电传感器件在所述衬底基板上的正投影至少部分位于所述第一像素介定层在所述衬底基板上的正投影内；
所述发光层设于所述第一像素介定层上的所述第一过孔内；
第二电极，设于所述发光层的远离所述衬底基板的一面。
在本公开的一种示例性实施例中，所述发光器件还包括：
第一电极，设于所述第二平坦化层的远离所述衬底基板的一面；
第一像素介定层，设于所述第一电极的远离所述衬底基板的一面，所述像素介定层对于波长小于600nm的光线的透过率高于波长大于600nm的光线的透过率，所述第一像素介定层上设置有第一过孔，所述第一过孔连通至所述第一电极，所述光电传感器件在所述衬底基板上的正投影至少部分位于所述第一像素介定层在所述衬底基板上的正投影内；
第二像素介定层，设于所述第一像素介定层的远离所述衬底基板的一面，所述第一像素介定层在所述衬底基板上的正投影在所述第二像素介定层在所述衬底基板上的正投影内，所述第二像素介定层上设置有第二过孔，所述第二过孔在所述衬底基板上的正投影在所述第一过孔在所述衬底基板上的正投影内；
所述发光层设于所述第二像素介定层上的所述第二过孔内；
第二电极，设于所述发光层的远离所述衬底基板的一面。
在本公开的一种示例性实施例中，所述显示面板还包括：
第三像素介定层，设于所述线偏光片的远离所述衬底基板的一面，所述第三像素介定层对于波长小于600nm的光线的透过率高于波长大于600nm的光线的透过率；所述第三像素介定层在所述衬底基板上的正投影与所述相位延迟片在所述衬底基板上的正投影重合，且所述光电传感器件在所述衬底基板上的正投影至少部分位于所述第三像素介定层在所述衬底基板上的正投影内。
在本公开的一种示例性实施例中，所述光电传感器件包括：
第三电极，设于所述绝缘层的远离所述衬底基板的一面，并与所述第一薄膜晶体管电连接；
光电转换层，设于所述第三电极的远离所述衬底基板的一面；
第四电极，设于所述光电转换层的远离所述衬底基板的一面。
在本公开的一种示例性实施例中，所述相位延迟片为四分之一波片。
在本公开的一种示例性实施例中，所述相位延迟片为聚合物液晶层，厚度大于等于1μm且小于等于3μm，透过率大于等于95％。
在本公开的一种示例性实施例中，所述线偏光片为涂布型线偏光片，厚度大于等于1μm且小于等于10μm，透过率大于等于30％且小于等于45％，偏振度大于等于85％且小于等于99％。
在本公开的一种示例性实施例中，所述显示面板还包括：
触控传感结构，设于所述封装结构与所述相位延迟片之间。
根据本公开的一个方面，提供一种显示面板的制备方法，包括：
提供一背板，所述背板包括衬底基板，以及设置在所述衬底基板之上的光电传感结构和发光结构，所述发光结构包括发光层；
在所述光电传感结构和所述发光结构的远离所述衬底基板的一面形成封装结构；
在所述封装结构的远离所述背板的一面形成相位延迟片材料层；
在所述相位延迟片材料层的远离所述背板的一面形成线偏光片材料层；
对所述相位延迟片材料层和线偏光片材料层进行图案化处理，使所述相位延迟片材料层形成相位延迟片，所述线偏光片材料层形成线偏光片；
在所述线偏光片的远离所述背板的一面形成彩膜层，所述彩膜层包括多个色阻区，所述色阻区在所述背板上的正投影与所述发光层在所述背板上的正投影重合；
其中，所述相位延迟片至少位于多个所述色阻区之间，至少填充满多个所述色阻区之间的间隙；所述线偏光片在所述背板上的正投影与所述相位延迟片在所述背板上的正投影重合。
本公开的的显示面板，在封装结构的远离背板的一面设置有相位延迟片，在相位延迟片的远离背板的一面设置有线偏光片，在线偏光片的远离所述背板的一面设置有彩膜层，彩膜层包括多个色阻区，色阻区在背板上的正投影与发光层在背板上的正投影重合，相位延迟片至少位于多个色阻区之间，至少填充满多个色阻区之间的间隙；线偏光片在背板上的正投影与相位延迟片在背板上的正投影重合。一方面，通过相位延迟片和线偏光片代替彩膜层中的黑矩阵，形成单向透光效果；既能使指纹的反射光透过相位延迟片和线偏光片射至光电传感结构实现指纹识别的功能；在环境光射入背板后，又能阻挡背板中的金属层对环境光反射的反射光射出，避免对显示效果的影响；又一方面，在发光层上方未设置相位延迟片和线偏光片，解决了由于相位延迟片和线偏光片透过率较低导致的显示面板的亮度较低、功耗较高的问题。
应当理解的是，以上的一般描述和后文的细节描述仅是示例性和解释性的，并不能限制本公开。
附图说明
此处的附图被并入说明书中并构成本说明书的一部分，示出了符合本公开的实施例，并与说明书一起用于解释本公开的原理。显而易见地，下面描述中的附图仅仅是本公开的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1是相关技术中显示面板中指纹识别的光路示意图；
图2是本公开显示面板一示例实施方式的结构示意图；
图3是图2中的显示面板形成第一像素介定层后的结构示意图；
图4是在图3的基础上形成第二像素介定层后的结构示意图；
图5是本公开显示面板另一示例实施方式的结构示意图；
图6是本公开显示面板中阻止环境光的光路示意图；
图7是本公开显示面板又一示例实施方式的结构示意图；
图8是本公开显示面板的制备方法一示例实施方式的示意框图。
图中主要元件附图标记说明如下：
1、衬底基板；21、源漏极；22、第一薄膜晶体管；23、第二薄膜晶体管；
3、光电传感器件；31、第四电极；32、光电转换层；33、第三电极；
4、发光器件；41、第一电极；42、第一像素介定层；421、第一过孔；43、第二像素介定层；431、第二过孔；44、发光层；45、第二电极；46、隔垫物；
5、封装结构；
6、相位延迟片；7、线偏光片；8、第三像素介定层；
9、彩膜层；91、黑矩阵；92、阻色区；
10、玻璃盖板；11、指纹；
121、第一平坦化层；122、第二平坦化层；123、第三过孔；
131、第一保护层；132、第二保护层；
14、绝缘层；15、连接电极。
具体实施方式
现在将参考附图更全面地描述示例实施方式。然而，示例实施方式能够以多种形式实施，且不应被理解为限于在此阐述的实施方式；相反，提供这些实施方式使得本公开将全面和完整，并将示例实施方式的构思全面地传达给本领域的技术人员。图中相同的附图标记表示相同或类似的结构，因而将省略它们的详细描述。
参照图1所示的相关技术中显示面板中指纹识别的光路示意图。相关技术中，光学指纹识别是利用OLED发出的光经指纹11反射后再进入显示面板内或穿过显示面板被光电传感结构接收，但是，在显示面板中只有未被阳极(第一电极41)遮挡的部分，光才能透过，而COE(CF on Encapsulation，彩膜层在封装层上)中的彩膜层9把未遮挡的部分都用黑矩阵91遮挡住了，所以完全封死了指纹反射光返回的路径，因此无法进行指纹识别。
本示例实施方式首先提供了一种显示面板，参照图2、图3和图4所示的本公开显示面板一示例实施方式的结构示意图；该显示面板可以 包括背板、封装结构5、相位延迟片6、线偏光片7以及彩膜层9；背板包括衬底基板1，以及设置在所述衬底基板1之上的光电传感结构和发光结构，所述发光结构包括发光层44；封装结构5设于所述光电传感结构和所述发光结构的远离所述衬底基板的一面；相位延迟片6设于所述封装结构5的远离所述背板的一面；线偏光片7设于所述相位延迟片6的远离所述背板的一面；彩膜层9设于所述线偏光片7的远离所述背板的一面，所述彩膜层9包括多个色阻区92，所述色阻区92在所述背板上的正投影与所述发光层44在所述背板上的正投影重合；其中，所述相位延迟片6至少位于多个所述色阻区92之间，至少填充满多个所述色阻区92之间的间隙；所述线偏光片7在所述背板上的正投影与所述相位延迟片6在所述背板上的正投影重合。
该显示面板通过相位延迟片6和线偏光片7代替彩膜层9中的黑矩阵91，形成单向透光效果；既能使指纹11的反射光透过相位延迟片6和线偏光片7射至光电传感结构实现指纹识别的功能；在环境光射入背板后，又能阻挡背板中的金属层对环境光反射的反射光射出，避免对显示效果的影响。在发光层上方未设置相位延迟片和线偏光片，解决了由于相位延迟片6和线偏光片7透过率较低导致的显示面板的亮度较低、功耗较高的问题。
在本示例实施方式中，背板可以包括衬底基板1，以及设置在衬底基板1之上的光电传感结构以及发光结构。
衬底基板1可以为柔性衬底基板，当然也可以采用刚性衬底基板。
光电传感结构可以包括第一薄膜晶体管22和光电传感器件3，第一薄膜晶体管22设于衬底基板1之上；光电传感器件3设于第一薄膜晶体管22的远离衬底基板11的一面，并与第一薄膜晶体管22电连接。
发光结构可以包括第二薄膜晶体管23和发光器件4，第二薄膜晶体管23设于衬底基板1之上；发光器件4设于第二薄膜晶体管23的远离衬底基板1的一面，并与第二薄膜晶体管23电连接。
具体地：在衬底基板1之上设置有第一薄膜晶体管22和第二薄膜晶体管23，第一薄膜晶体管22和第二薄膜晶体管23可以是顶栅型也可以是底栅型，还可以是双栅型，在本示例实施方式中，第一薄膜晶体管 22为顶栅型。第二薄膜晶体管23是双栅型。上述薄膜晶体管采用现有技术中的结构，因此，在此不再赘述。
在第一薄膜晶体管22和第二薄膜晶体管23的远离衬底基板1的一面设置有第一保护层131，在第一保护层131的远离衬底基板1的一面设置有第一平坦化层121，第一平坦化层121的材质是有机树脂材料，第一平坦化层121能够改善光电传感器件3暗电流偏高的问题。
在第一平坦化层121的远离衬底基板1的一面设置有绝缘层14，在绝缘层14的远离衬底基板1的一面设置有连接电极15和光电传感器件3，连接电极15通过第一保护层131、第一平坦化层121和绝缘层14上的过孔与第二薄膜晶体管23的源漏极21电连接。光电传感器件3可以为非晶硅光电传感器件，即光电传感器件3可以为PIN光电二极管。光电传感器件3包括第四电极31、光电转换层32和第三电极33，光电转换层32位于第四电极31和第三电极33之间。光电传感器件3的第三电极33通过第一保护层131、第一平坦化层121和绝缘层14上的过孔与第一薄膜晶体管22的源漏极21电连接，以通过第一薄膜晶体管22控制光电传感器件3开关。光电转换层32用于接收指纹11反射的反射光线，并将反射光线转化成电信号传输给处理器进行处理识别指纹11。
在连接电极15和光电传感器件3的远离衬底基板1的一面设置有第二保护层132，在第二保护层132的远离衬底基板1的一面设置有第二平坦化层122，在第二平坦化层122上设置有第三过孔123(图中由于第三过孔123中已形成有第一像素介定层42，因此通过箭头指示在第三过孔123的孔壁处)。在第二平坦化层122的远离衬底基板1的一面设置有发光器件4。发光器件4可以包括第一电极41、第一像素介定层42、第二像素介定层43、发光层44、第二电极45以及隔垫物46。
具体来说：第一电极41可以为阳极，第一电极41设于第二平坦化层122的远离衬底基板1的一面，第一电极41通过第二平坦化层122上的第三过孔123和第二保护层132上的过孔与连接电极15电连接，通过连接电极15连接至第二薄膜晶体管23，以通过第二薄膜晶体管23控制发光器件4开关。
在第一电极41的远离衬底基板1的一面设置有第一像素介定层42， 第一像素介定层42对于波长小于600nm的光线的透过率高于波长大于600nm的光线的透过率，即波长小于600nm的光线透过第一像素介定层42的透过率较高，波长大于600nm的光线透过第一像素介定层42的透过率较低，因此光线透过第一像素介定层42的光线的颜色为蓝色、青色或绿色；参照图3所示，在第一像素介定层42上设置有第一过孔421，第一过孔421连通至第一电极41，即第一过孔421位于第一电极41上方，使第一电极41部分裸露。
参照图4所示，在第一像素介定层42的远离衬底基板1的一面设置有第二像素介定层43，第一像素介定层42在衬底基板1上的正投影在第二像素介定层43在衬底基板1上的正投影内，即第二像素介定层43将第一像素介定层42完全覆盖，且第二像素介定层43的边沿突出于第一像素介定层42的边沿大于等于0.5μm；在第二像素介定层43上设置有第二过孔431，第二过孔431在衬底基板1上的正投影在第一过孔421在衬底基板1上的正投影内，即第二过孔431的位置与第一过孔421的位置相同，但是第二过孔431的径向尺寸小于第一过孔421的径向尺寸，以保证第二像素介定层43能够将第一像素介定层42完全覆盖，且使第一过孔421和第二过孔431处的第一电极41裸露。第二像素介定层43能够保护第一像素介定层42。
光电传感器件3在衬底基板1上的正投影至少部分位于第一像素介定层42在衬底基板1上的正投影内，即第一像素介定层42部分或完全覆盖下方光电传感器件3，第一像素介定层42对光电传感器件3进行遮挡，解决了强环境光下识别指纹11时，光电传感器件3噪声过大的问题。
在第二过孔431内设置有发光层44，发光层44与第一电极41接触，通过第一电极41给发光层44传输电信号；发光层44在衬底基板1上的正投影与光电转换层32在衬底基板1上的正投影互不交叠，即光电传感器件3在衬底基板1上的正投影与发光层44在衬底基板1上的正投影不交叠。在第二像素介定层43的远离衬底基板1的一面设置有隔垫物46，隔垫物46用于在蒸镀发光层44的过程中支撑掩模板；在发光层44、第二像素介定层43和隔垫物46的远离衬底基板1的一面设置有第二电极 45，第二电极45可以为阴极。
另外，发光器件4的具体结构不限于上述说明，例如，参照图5所示，可以不设置第二像素介定层43，也就是仅设置有一层第一像素介定层42，该第一像素介定层42对于波长小于600nm的光线的透过率高于波长大于600nm的光线的透过率，即波长小于600nm的光线透过第一像素介定层42的透过率较高，大于600nm的光线透过第一像素介定层42的透过率较低，因此光线透过第一像素介定层42的光线的颜色为蓝色、青色或绿色；在第一像素介定层42上设置有第一过孔421，且第一过孔421连通至第一电极，即第一过孔421位于第一电极41上方，使第一电极41部分裸露。光电传感器件3在衬底基板1上的正投影至少部分位于第一像素介定层42在衬底基板1上的正投影内，即第一像素介定层42部分或完全覆盖下方光电传感器件3，解决了强环境光下识别指纹11时，光电传感器件3噪声过大的问题。发光层44设于第一像素介定层42上的第一过孔421内；第二电极设于发光层44的远离衬底基板1的一面。其余部分的结构设置不变，因此，此处不再赘述。
请继续参照图2所示，在发光器件4的第二电极45的远离衬底基板1的一面设置有封装结构5。封装结构5可以采用TFE(Thin-Film Encapsulation，薄膜封装)。
需要说明的是，上述一些示例实施方式中，光电传感结构设置在衬底基板1和发光结构之间。在另外一些示例实施方式中，光电传感结构还可以设置在衬底基板1的远离发光结构的一面；具体地，背板可以包括衬底基板1，设于衬底基板1之上的发光结构；设于衬底基板1的远离发光结构一面的光电传感结构。发光结构的具体结构与上述相同，此处不再赘述。光电传感结构有其单独的导线。
在另外一些示例实施方式中，显示面板还可以包括触控传感结构(图中未示出)，触控传感结构设于封装结构5与相位延迟片6之间。触控传感结构用于接收用户的触摸而生成触控信号。
在本示例实施方式中，在封装结构5的远离衬底基板1的一面设置有相位延迟片6，相位延迟片6至少位于多个色阻区92之间，至少填充满多个色阻区92之间的间隙，即相位延迟片6在衬底基板1上的正投影 至少填充发光层44在衬底基板1上的正投影之间的间隙，也就是说，相位延迟片6可以位于多个色阻区92之间，填充满多个色阻区92之间的间隙；也可以稍微突出于色阻区92，将色阻区的边缘部分覆盖；即在相位延迟片6上设置有第一通孔，使发光层44发出的光能够通过该第一通孔射出，发光层44在衬底基板1上的正投影与该第一通孔在衬底基板1上的正投影重合，也可以是该第一通孔在衬底基板1上的正投影的边缘在发光层44在衬底基板1上的正投影内。基于误差原因，可以是该第一通孔在衬底基板1上的正投影的边沿相对于第二像素介定层43上的第二过孔在衬底基板1上的正投影的边沿突出大约4微米，或是该第一通孔在衬底基板1上的正投影的边沿相对于第二像素介定层43上的第二过孔在衬底基板1上的正投影的边沿缩进大约4微米；在另一些示例实施方式中，可以是该第一通孔在衬底基板1上的正投影的边沿相对于第一像素介定层42上的过孔在衬底基板1上的正投影的边沿突出大约4微米，或是该第一通孔在衬底基板1上的正投影的边沿相对于第一像素介定层42上的过孔在衬底基板1上的正投影的边沿缩进大约4微米。
相位延迟片6为四分之一波片，相位延迟片6可以为聚合物液晶层，厚度大于等于1μm且小于等于3μm，透过率大于等于95％。
在本示例实施方式中，在相位延迟片6的远离衬底基板1的一面设置有线偏光片7，线偏光片7在衬底基板1上的正投影与相位延迟片6在衬底基板1上的正投影重合；即在线偏光片7上设置有第二通孔，发光层44在衬底基板1上的正投影与该第二通孔在衬底基板1上的正投影重合，使发光层44发出的光能够通过第一通孔和第二通孔射出，也可以是该第二通孔在衬底基板1上的正投影的边缘在发光层44在衬底基板1上的正投影内，第二通孔在线偏光片7上的位置、大小和第一通孔在相位延迟片6上的位置、大小完全一样，在此，不再赘述。线偏光片7为涂布型线偏光片，厚度大于等于1μm且小于等于10μm，透过率大于等于30％且小于等于45％，偏振度大于等于85％且小于等于99％。
参照图6所示，相位延迟片6和涂布型线偏光片可以用来防止背板内金属层反射环境光射出影响显示效果，例如，背板内的金属层或金属走线(源漏极21等等)的反射光。环境光入射后经过线偏光片7被调制 成与光轴同向的线偏光，经过四分之一波片后被调制成某一方向的圆偏光，被金属层或金属走线(源漏极21等等)反射后由于半波损失形成了反向的圆偏光，再次经过四分之一波片后被调制成与线偏光片7光轴垂直的线偏光，因此反射光线被阻挡无法出射。部分位置还可以由彩膜层来遮挡降低对环境光反射率。
而相位延迟片6和涂布型线偏光片形成的膜组单向是可透光的，因此，发光层44发出的光射至指纹11，指纹11反射光可以透过并进入背板内或背板下射至光电传感结构，因此，既能使指纹的反射光透过相位延迟片6和线偏光片7射至光电传感结构实现指纹识别的功能；又能阻挡背板中的金属层对环境光反射的反射光射出，避免对显示效果的影响，还能兼容COE。
另外，需要说明的是，在上述设置两层像素介定层(第一像素介定层42和第二像素介定层43)和设置一层第一像素介定层42的两种情况下，均可以在线偏光片7的远离衬底基板1的一面设置第三像素介定层8。参照图7所示，第三像素介定层8在衬底基板1上的正投影与相位延迟片6在衬底基板1上的正投影重合，即在第三像素介定层8上设置有第三通孔，发光层44在衬底基板1上的正投影与该第三通孔在衬底基板1上的正投影重合，也可以是该第三通孔在衬底基板1上的正投影的边缘在发光层44在衬底基板1上的正投影内，使发光层44发出的光能够通过第一通孔、第二通孔和第三通孔射出，第三通孔在第三像素介定层8上的位置、大小，第二通孔在线偏光片7上的位置、大小和第一通孔在相位延迟片6上的位置、大小完全一样，在此，不再赘述。第三像素介定层8对于波长小于600nm的光线的透过率高于波长大于600nm的光线的透过率，即波长小于600nm的光线透过像素介定层的透过率较高，波长大于600nm的光线透过像素介定层的透过率较低，因此光线透过第三像素介定层8的光线的颜色为蓝色、青色或绿色。光电传感结构在衬底基板1上的正投影至少部分位于第三像素介定层8在衬底基板1上的正投影内，即第三像素介定层8部分或完全覆盖下方光电传感结构3，解决了强环境光下识别指纹时，光电传感结构3噪声过大的问题。
请继续参照图2、图5或图7所示，在线偏光片7的远离衬底基板1 的一面设置彩膜层9，该彩膜层9包括多个色阻区92，色阻区92在背板上的正投影与发光层44在背板上的正投影重合。在彩膜层9的远离衬底基板1的一面通过OCA(Optically Clear Adhesive，光学透明胶)贴合玻璃盖板10。
当然，如图7所示，在设置有第三像素介定层8的情况下，彩膜层9设置在第三像素介定层8的远离衬底基板1的一面，该彩膜层9上也不设置黑矩阵。在彩膜层9的远离衬底基板1的一面通过OCA贴合玻璃盖板10。
进一步的，本示例实施方式还提供了一种显示装置，该显示装置包括上述所述的显示面板，显示面板的具体结构上述已经进行了详细说明，因此，此处不再赘述。
而该显示装置的具体类型不受特别的限制，本领域常用的显示装置类型均可，具体例如OLED显示器、手机等移动装置、手表等可穿戴设备、VR装置等等，本领域技术人员可根据该显示设备的具体用途进行相应地选择，在此不再赘述。
需要说明的是，该显示装置除了显示面板以外，还包括其他必要的部件和组成，以显示器为例，具体例如外壳、电路板、电源线，等等，本领域技术人员可根据该显示装置的具体使用要求进行相应地补充，在此不再赘述。
与现有技术相比，本公开实施例提供的显示装置的有益效果与上述实施例提供的显示面板的有益效果相同，在此不做赘述。
进一步的，本示例实施方式还提供了一种显示面板的制备方法，参照图8所示，该显示面板的制备方法可以包括以下步骤：
步骤S10，提供一背板，所述背板包括衬底基板1，以及设置在所述衬底基板1之上的光电传感结构和发光结构，所述发光结构包括发光层44。
步骤S20，在所述光电传感结构和所述发光结构的远离所述衬底基板1的一面形成封装结构5。
步骤S30，在所述封装结构5的远离所述背板的一面形成相位延迟片材料层。
步骤S40，在所述相位延迟片材料层的远离所述背板的一面形成线偏光片材料层。
步骤S50，对所述相位延迟片材料层和线偏光片材料层进行图案化处理，使所述相位延迟片材料层形成相位延迟片6，所述线偏光片材料层形成线偏光片7。
步骤S60，在所述线偏光片7的远离所述背板的一面形成彩膜层9，所述彩膜层9包括多个色阻区92，所述色阻区92在所述背板上的正投影与所述发光层44在所述背板上的正投影重合。
其中，所述相位延迟片6至少位于多个所述色阻区92之间，至少填充满多个所述色阻区92之间的间隙；所述线偏光片7在所述背板上的正投影与所述相位延迟片6在所述背板上的正投影重合。
在本示例实施方式中，将液晶聚合物溶液通过旋涂、刮涂、打印等方式在封装结构5的远离背板的一面形成均匀的膜层并固化形成相位延迟片材料层；将二向色性染料通过旋涂、刮涂、打印等方式在相位延迟片材料层的远离背板的一面形成均匀的膜层并固化形成线偏光片材料层，并在液晶诱导下对进行取向，使整个膜层具有起偏特性。然后对相位延迟片材料层和线偏光片材料层通过同一次光刻或干刻，使相位延迟片材料形成相位延迟片6，线偏光片材料层形成线偏光片7。
涂布形成的膜层厚度较薄，而拉伸法形成的膜层的厚度较厚无法满足要求。
上述所描述的特征、结构或特性可以以任何合适的方式结合在一个或更多实施方式中，如有可能，各实施例中所讨论的特征是可互换的。在上面的描述中，提供许多具体细节从而给出对本公开的实施方式的充分理解。然而，本领域技术人员将意识到，可以实践本公开的技术方案而没有所述特定细节中的一个或更多，或者可以采用其它的方法、组件、材料等。在其它情况下，不详细示出或描述公知结构、材料或者操作以避免模糊本公开的各方面。
虽然本说明书中使用相对性的用语，例如“上”“下”来描述图标的一个组件对于另一组件的相对关系，但是这些术语用于本说明书中仅出于方便，例如根据附图中所述的示例的方向。能理解的是，如果将图 标的装置翻转使其上下颠倒，则所叙述在“上”的组件将会成为在“下”的组件。当某结构在其它结构“上”时，有可能是指某结构一体形成于其它结构上，或指某结构“直接”设置在其它结构上，或指某结构通过另一结构“间接”设置在其它结构上。
本说明书中，用语“一个”、“一”、“该”和“所述”用以表示存在一个或多个要素/组成部分/等；用语“包含”、“包括”和“具有”用以表示开放式的包括在内的意思并且是指除了列出的要素/组成部分/等之外还可存在另外的要素/组成部分/等；用语“第一”、“第二”和“第三”等仅作为标记使用，不是对其对象的数量限制。
应可理解的是，本公开不将其应用限制到本说明书提出的部件的详细结构和布置方式。本公开能够具有其他实施方式，并且能够以多种方式实现并且执行。前述变形形式和修改形式落在本公开的范围内。应可理解的是，本说明书公开和限定的本公开延伸到文中和/或附图中提到或明显的两个或两个以上单独特征的所有可替代组合。所有这些不同的组合构成本公开的多个可替代方面。本说明书所述的实施方式说明了已知用于实现本公开的最佳方式，并且将使本领域技术人员能够利用本公开。

Claims (12)

  1. 一种显示面板，其中，包括：
    背板，包括衬底基板，以及设置在所述衬底基板之上的光电传感结构和发光结构，所述发光结构包括发光层；
    封装结构，设于所述光电传感结构和所述发光结构的远离所述衬底基板的一面；
    相位延迟片，设于所述封装结构的远离所述背板的一面；
    线偏光片，设于所述相位延迟片的远离所述背板的一面；
    彩膜层，设于所述线偏光片的远离所述背板的一面，所述彩膜层包括多个色阻区，所述色阻区在所述背板上的正投影与所述发光层在所述背板上的正投影重合；
    其中，所述相位延迟片至少位于多个所述色阻区之间，至少填充满多个所述色阻区之间的间隙；所述线偏光片在所述背板上的正投影与所述相位延迟片在所述背板上的正投影重合。
  2. 根据权利要求1所述的显示面板，其中，
    所述光电传感结构包括：
    第一薄膜晶体管，设于所述衬底基板之上；
    光电传感器件，设于所述第一薄膜晶体管的远离所述衬底基板的一面，并与所述第一薄膜晶体管电连接；
    所述发光结构包括：
    第二薄膜晶体管，设于所述衬底基板之上；
    发光器件，设于所述第二薄膜晶体管的远离所述衬底基板的一面，并与所述第二薄膜晶体管电连接，所述发光器件包括所述发光层；
    所述光电传感器件在所述衬底基板上的正投影与所述发光层在所述衬底基板上的正投影不交叠。
  3. 根据权利要求2所述的显示面板，其中，所述显示面板还包括：
    第一保护层，设于所述第一薄膜晶体管和所述第二薄膜晶体管的远离所述衬底基板的一面；
    第一平坦化层，设于所述第一保护层的远离所述衬底基板的一面；
    绝缘层，设于所述第一平坦化层的远离所述衬底基板的一面；
    连接电极，设于所述绝缘层的远离所述衬底基板的一面；
    所述光电传感器件设于所述绝缘层的远离所述衬底基板的一面；
    第二保护层，设于所述连接电极和所述光电传感器件的远离所述衬底基板的一面；
    第二平坦化层，设于所述第二保护层的远离所述衬底基板的一面，所述第二平坦化层上设置有第三过孔。
  4. 根据权利要求3所述的显示面板，其中，所述发光器件还包括：
    第一电极，设于所述第二平坦化层的远离所述衬底基板的一面；
    第一像素介定层，设于所述第一电极的远离所述衬底基板的一面，所述第一像素介定层对于波长小于600nm的光线的透过率高于波长大于600nm的光线的透过率，所述第一像素介定层上设置有第一过孔，所述第一过孔连通至所述第一电极，所述光电传感器件在所述衬底基板上的正投影至少部分位于所述第一像素介定层在所述衬底基板上的正投影内；
    所述发光层设于所述第一像素介定层上的所述第一过孔内；
    第二电极，设于所述发光层的远离所述衬底基板的一面。
  5. 根据权利要求3所述的显示面板，其中，所述发光器件还包括：
    第一电极，设于所述第二平坦化层的远离所述衬底基板的一面；
    第一像素介定层，设于所述第一电极的远离所述衬底基板的一面，所述像素介定层对于波长小于600nm的光线的透过率高于波长大于600nm的光线的透过率，所述第一像素介定层上设置有第一过孔，所述第一过孔连通至所述第一电极，所述光电传感器件在所述衬底基板上的正投影至少部分位于所述第一像素介定层在所述衬底基板上的正投影内；
    第二像素介定层，设于所述第一像素介定层的远离所述衬底基板的一面，所述第一像素介定层在所述衬底基板上的正投影在所述第二像素介定层在所述衬底基板上的正投影内，所述第二像素介定层上设置有第二过孔，所述第二过孔在所述衬底基板上的正投影在所述第一过孔在所述衬底基板上的正投影内；
    所述发光层设于所述第二像素介定层上的所述第二过孔内；
    第二电极，设于所述发光层的远离所述衬底基板的一面。
  6. 根据权利要求4或5所述的显示面板，其中，所述显示面板还包 括：
    第三像素介定层，设于所述线偏光片的远离所述衬底基板的一面，所述第三像素介定层对于波长小于600nm的光线的透过率高于波长大于600nm的光线的透过率；所述第三像素介定层在所述衬底基板上的正投影与所述相位延迟片在所述衬底基板上的正投影重合，且所述光电传感器件在所述衬底基板上的正投影至少部分位于所述第三像素介定层在所述衬底基板上的正投影内。
  7. 根据权利要求3所述的显示面板，其中，所述光电传感器件包括：
    第三电极，设于所述绝缘层的远离所述衬底基板的一面，并与所述第一薄膜晶体管电连接；
    光电转换层，设于所述第三电极的远离所述衬底基板的一面；
    第四电极，设于所述光电转换层的远离所述衬底基板的一面。
  8. 根据权利要求1-5、7任意一项所述的显示面板，其中，所述相位延迟片为四分之一波片。
  9. 根据权利要求8所述的显示面板，其中，所述相位延迟片为聚合物液晶层，厚度大于等于1μm且小于等于3μm，透过率大于等于95％。
  10. 根据权利要求1-5、7任意一项所述的显示面板，其中，所述线偏光片为涂布型线偏光片，厚度大于等于1μm且小于等于10μm，透过率大于等于30％且小于等于45％，偏振度大于等于85％且小于等于99％。
  11. 根据权利要求1-5、7任意一项所述的显示面板，其中，所述显示面板还包括：
    触控传感结构，设于所述封装结构与所述相位延迟片之间。
  12. 一种显示面板的制备方法，其中，包括：
    提供一背板，所述背板包括衬底基板，以及设置在所述衬底基板之上的光电传感结构和发光结构，所述发光结构包括发光层；
    在所述光电传感结构和所述发光结构的远离所述衬底基板的一面形成封装结构；
    在所述封装结构的远离所述背板的一面形成相位延迟片材料层；
    在所述相位延迟片材料层的远离所述背板的一面形成线偏光片材料 层；
    对所述相位延迟片材料层和线偏光片材料层进行图案化处理，使所述相位延迟片材料层形成相位延迟片，所述线偏光片材料层形成线偏光片；
    在所述线偏光片的远离所述背板的一面形成彩膜层，所述彩膜层包括多个色阻区，所述色阻区在所述背板上的正投影与所述发光层在所述背板上的正投影重合；
    其中，所述相位延迟片至少位于多个所述色阻区之间，至少填充满多个所述色阻区之间的间隙；所述线偏光片在所述背板上的正投影与所述相位延迟片在所述背板上的正投影重合。
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