WO2021218281A1 - Si衬底AlN模板的制备方法及Si衬底GaN外延结构的制备方法 - Google Patents

Si衬底AlN模板的制备方法及Si衬底GaN外延结构的制备方法 Download PDF

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WO2021218281A1
WO2021218281A1 PCT/CN2021/075952 CN2021075952W WO2021218281A1 WO 2021218281 A1 WO2021218281 A1 WO 2021218281A1 CN 2021075952 W CN2021075952 W CN 2021075952W WO 2021218281 A1 WO2021218281 A1 WO 2021218281A1
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substrate
aln
preparing
nucleation layer
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刘志宏
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西安电子科技大学
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    • H—ELECTRICITY
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    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
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    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
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    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02494—Structure
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    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
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Definitions

  • the invention belongs to the technical field of semiconductors, and specifically relates to a method for preparing an AlN template on a Si substrate and a method for preparing a GaN epitaxial structure on a Si substrate.
  • the third-generation semiconductor material GaN has the advantages of wide band gap, high critical breakdown field strength, high electron mobility, and high saturated electron drift speed. It has great development potential in the field of microwave and millimeter wave high-power electronic devices and can be widely used Used in aerospace, radar, 5G communications and other fields.
  • GaN epitaxial wafers There are two types of GaN epitaxial wafers: homoepitaxial and heteroepitaxial. Since the cost of GaN homoepitaxial is very high, the current commonly used technology is heteroepitaxial.
  • Commonly used substrates for GaN heteroepitaxial epitaxy include sapphire, SiC, and Si. Compared with other substrates, Si substrates are larger in size, lower in cost, and can be compared with Si-based CMOS (Complementary Metal Oxide Semiconductor) processes. The advantages of compatibility, the current research on GaN epitaxial wafers based on Si substrates is one of the hot spots in the world.
  • the typical GaN epitaxial layer structure based on Si substrate is AlN nucleation layer, graded AlGaN transition layer or AlN/GaN superlattice transition layer, GaN buffer layer, III nitride device heterojunction structure.
  • the Al atoms and Ga atoms in the AlN nucleation layer and the III-nitride transition layer in the GaN epitaxial wafer based on the Si substrate will diffuse to the Si substrate, forming p-type doping on the Si substrate , Resulting in the presence of p-type conductive channels on the surface of the Si substrate.
  • GaN epitaxial wafers based on Si substrates and microwave devices fabricated on GaN epitaxial wafers based on Si substrates bring high electromagnetic losses and reduce the characteristics of GaN microwave devices. Therefore, in order to improve the characteristics of GaN microwave devices to meet the application requirements of GaN microwave devices in aerospace, radar, 5G communications and other fields, it is necessary to reduce the RF loss of GaN epitaxial wafers on Si substrates.
  • the p-type doped channel on the surface of the Si substrate and the n-type inversion channel on the Si/AlN interface still exist, and the problem has not been solved.
  • partial removal of the Si substrate will introduce a relatively large thermal resistance, affect the heat dissipation of the device, and also bring difficulties to the production of the substrate through hole and the back metal of the radio frequency device.
  • ion implantation technology is used to implant element ions with a relative atomic mass less than 5 at the AlN/Si interface.
  • H ions can destroy the lattice structure of the Si substrate and block the diffusion of Al and Ga atoms to the Si substrate, thereby reducing the carrier concentration at the AlN/Si interface and reducing the radio frequency loss of the GaN material on the Si substrate (JC Roberts,et al.,III-Nitride semiconductor structures computing spatially patterned implanted species[P]2017).
  • This patent does not propose to deal with the background carrier concentration in III-nitride materials, and the background carrier concentration in III-nitride materials is also an important part of causing electromagnetic losses in GaN devices on Si substrates.
  • ion implantation is performed after the epitaxial growth of the AlGaN transition layer. Because the nitride layer is too thick, if the relative atomic mass of the implanted ions is greater than 5, the implantation depth is limited and cannot be implanted into the AlN/Si interface. It is necessary to limit the implanted ion species to elements with a relative atomic weight of less than 5, which reduces the number and selection of implanted ion species.
  • ion implantation is carried out after the epitaxial growth of the AlGaN transition layer, and the surface of the material will adsorb impurity ions.
  • impurity ions will diffuse into the GaN buffer layer and the device heterojunction structure, thereby affecting the performance of the device.
  • the present invention provides a method for preparing an AlN template on a Si substrate and a method for preparing a GaN epitaxial structure on a Si substrate.
  • the technical problem to be solved by the present invention is realized through the following technical solutions:
  • a method for preparing AlN template on Si substrate including:
  • Ions are implanted into the Si substrate through the AlN nucleation layer.
  • growing an AlN nucleation layer on the Si substrate includes:
  • the AlN nucleation layer is grown on the Si substrate using MBE, MOCVD, HVPE or PVD methods.
  • implanting ions into the Si substrate through the AlN nucleation layer further includes:
  • Ions are implanted into the Si substrate through the AlN nucleation layer, and ions are implanted into the AlN nucleation layer.
  • implanting ions into the Si substrate through the AlN nucleation layer and implanting ions into the AlN nucleation layer includes:
  • An ion implantation method is used to implant ions into the Si substrate through the AlN nucleation layer, and an ion implantation method is used to implant ions into the AlN nucleation layer.
  • the implantation dose of the ions is 1 ⁇ 10 10 cm -2 -1 ⁇ 10 16 cm -2
  • the implantation energy is 10 KeV-100 KeV.
  • the ions implanted into the Si substrate are one or more of Ar, N, H, O, F, As, and P ions, and the ions implanted into the AlN nucleation layer
  • the ions are one or more of Ar, N, Fe, C, F, and Mg ions.
  • the resistivity of the Si substrate is 0.01-10000 ⁇ cm.
  • the thickness of the Si substrate is 100-1500 ⁇ m.
  • the thickness of the AlN nucleation layer is 10-500 nm.
  • An embodiment of the present invention also provides a method for preparing a GaN epitaxial structure on a Si substrate, including:
  • An AlN template on a Si substrate prepared by the method for preparing an AlN template on a Si substrate according to any one of the above embodiments;
  • a group III nitride radio frequency device heterojunction structure is grown on the GaN buffer layer.
  • the Si substrate and the AlN nucleation layer are injected into the Si substrate and the AlN nucleation layer through the AlN nucleation layer.
  • the carrier concentration at the Si/AlN interface and the carrier concentration in the AlN nucleation layer can reduce the radio frequency loss of the AlN template on the Si substrate and improve the characteristics of the GaN microwave device made using the AlN template on the Si substrate. Meet the application requirements of GaN microwave devices in aerospace, radar, 5G communications and other fields.
  • GaN is prepared on the AlN template of the Si substrate, so that the designed GaN epitaxial wafer has more degrees of freedom.
  • FIG. 1 is a schematic flowchart of a method for preparing an AlN template on a Si substrate according to an embodiment of the present invention
  • FIGS. 2a-2c are schematic diagrams of a method for preparing an AlN template on a Si substrate according to an embodiment of the present invention
  • 3a to 3d are process schematic diagrams of a method for preparing a GaN epitaxial structure of a Si substrate provided by an embodiment of the present invention.
  • Figure 1 is a schematic flow diagram of a method for preparing an AlN template on a Si substrate provided by an embodiment of the present invention
  • Figures 2a-2c are a Si substrate provided by an embodiment of the present invention.
  • This embodiment provides a method for preparing an AlN template on a Si substrate.
  • the method for preparing an AlN template on a Si substrate includes steps 1 to 3, wherein:
  • Step 1 As shown in Fig. 2a, a Si substrate 10 is selected.
  • the resistivity of the Si substrate 10 is 0.01-10000 ⁇ cm.
  • the crystal orientation of the Si substrate 10 is (111) crystal orientation.
  • the thickness of the Si substrate 10 is 100-1500 ⁇ m, and the thickness of the Si substrate 10 is 100-1500 ⁇ m to ensure its heat dissipation effect.
  • the thickness of the Si substrate 10 is too thin, not only does it have little effect on performance improvement, but also If the thickness of the Si substrate 10 is too thin, it may cause reliability problems.
  • the thickness of the Si substrate 10 is too thick, it will not only increase the cost, but also cause heat dissipation due to the low thermal conductivity of Si. problem.
  • Step 2 As shown in FIG. 2b, an AlN nucleation layer 20 is grown on the Si substrate 10.
  • MBE Molecular beam epitaxy, molecular beam epitaxy
  • MOCVD Metal-organic Chemical Vapor Deposition
  • HVPE Hydro-organic Vapor Phase Epitaxy, hydride vapor phase epitaxy
  • PVD Physical Vapor Deposition
  • the thickness of the AlN nucleation layer 20 is 10-500 nm.
  • Step 3 As shown in FIG. 2c, ions are implanted into the Si substrate 10 through the AlN nucleation layer 20.
  • an ion implantation method is used to implant ions into the Si substrate 10 through the AlN nucleation layer 20.
  • the ions implanted into the Si substrate 10 are one or more of Ar, N, H, O, F, As, and P ions.
  • the Si substrate 10 can be implanted at the same time. It can also be injected into the Si substrate 10 in batches, preferably into the Si substrate 10 in batches.
  • this embodiment can also implant ions into the AlN nucleation layer, and the step of implanting ions into the AlN nucleation layer can be performed on the Si substrate 10 through the AlN nucleation layer 20. It is performed before the ion implantation, or after the ion implantation into the Si substrate 10 through the AlN nucleation layer 20, which is not specifically limited in this embodiment.
  • an ion implantation method is used to implant ions into the AlN nucleation layer 20.
  • the ions implanted into the AlN nucleation layer 20 are one or more of Ar, N, Fe, C, F, and Mg ions.
  • the AlN nucleation layer 20 can be implanted at the same time. It can also be injected into the AlN nucleation layer 20 in batches, preferably into the AlN nucleation layer 20 in batches.
  • the carrier concentration at the AlN/Si interface and the carrier concentration of the AlN nucleation layer can be reduced, and the technical effect of reducing the RF loss of the AlN template on the Si substrate can be achieved, thereby increasing the microwave power of the Si-based GaN
  • the present invention is to deposit an AlN nucleation layer on a Si substrate and perform ion implantation, and the types of implanted ions can be expanded. Not only elements with a relative atomic weight of less than 5 can be selected, but also elements with a relatively large atomic mass such as Ar and N can be injected.
  • the ion implantation dose is 1 ⁇ 10 10 cm -2 -1 ⁇ 10 16 cm -2
  • the implant energy is 10KeV-100KeV.
  • the ion implantation dose is set to 1 ⁇ 10 10 cm -2 -1 ⁇ 10 16 cm -2
  • the implanted energy is 10KeV-100KeV, which can ensure that the implanted ions can enter the Si substrate and destroy the crystal structure of Si, so as to reduce the carrier concentration at the AlN/Si interface, thereby achieving The purpose of reducing the RF loss of the AlN template on the Si substrate.
  • the present invention implants ions into the AlN nucleation layer and at the same time also implants ions into the Si substrate.
  • concentration of carriers and AlN nucleation layer at the Si/AlN interface can reduce the radio frequency loss of the AlN template on the Si substrate and improve the characteristics of GaN microwave devices to meet the needs of GaN microwave devices in aerospace, radar, 5G communications and other fields.
  • GaN is prepared on the AlN template of Si substrate, so that the designed GaN epitaxial wafer has more degrees of freedom.
  • the present invention provides a specific preparation method of an AlN template on a Si substrate on the basis of the foregoing embodiments.
  • the specific preparation method of an AlN template on the Si substrate includes:
  • Step 1 As shown in Fig. 2a, a Si substrate 10 is selected.
  • the Si substrate 1 has a thickness of 675 ⁇ m, a resistivity of 5000 ⁇ cm, and a crystal orientation of (111).
  • Step 2 As shown in FIG. 2b, an AlN nucleation layer 20 is grown on the Si substrate 10.
  • an AlN nucleation layer 20 of 200 nm is epitaxially grown on the selected Si substrate 10 by MOCVD.
  • Step 3 As shown in FIG. 2c, ions are implanted into the Si substrate 10 through the AlN nucleation layer 20.
  • the Si substrate 10 on which the AlN nucleation layer 20 has been deposited is ion implanted, the implanted ions are Ar, the implanted dose is 1 ⁇ 10 14 cm -2 , the implanted energy is 10 MeV, and the Si substrate AlN is completed.
  • the production of templates are ion implanted, the implanted ions are Ar, the implanted dose is 1 ⁇ 10 14 cm -2 , the implanted energy is 10 MeV, and the Si substrate AlN is completed.
  • the present invention provides another specific method for preparing an AlN template of a Si substrate on the basis of the foregoing embodiments.
  • the specific method for preparing an AlN template of the Si substrate includes:
  • Step 1 As shown in Fig. 2a, a Si substrate 10 is selected.
  • the Si substrate 1 has a thickness of 675 ⁇ m, a resistivity of 5000 ⁇ cm, and a crystal orientation of (111).
  • Step 2 As shown in FIG. 2b, an AlN nucleation layer 20 is grown on the Si substrate 10.
  • an AlN nucleation layer 20 of 200 nm is epitaxially grown on the selected Si substrate 10 by MOCVD.
  • Step 3 As shown in FIG. 2c, ions are implanted into the Si substrate 10 through the AlN nucleation layer 20.
  • the Si substrate 10 on which the AlN nucleation layer 20 has been deposited is subjected to ion implantation, the implanted ions are N, the implanted dose is 1 ⁇ 10 15 cm -2 , and the implanted energy is 5 MeV.
  • Step 4 As shown in FIG. 2c, ions are implanted into the AlN nucleation layer 20.
  • the deposited AlN nucleation layer 20 is ion implanted, the implanted ions are Fe, the implanted dose is 1 ⁇ 10 14 cm -2 , and the implanted energy is 300 KeV to complete the production of the AlN template on the Si substrate.
  • the present invention provides yet another specific method for preparing an AlN template of a Si substrate on the basis of the foregoing embodiments.
  • the specific method for preparing an AlN template of the Si substrate includes:
  • Step 1 As shown in Fig. 2a, a Si substrate 10 is selected.
  • the Si substrate 1 has a thickness of 1150 ⁇ m, a resistivity of 5000 ⁇ cm, and a crystal orientation of (111).
  • Step 2 As shown in FIG. 2b, an AlN nucleation layer 20 is grown on the Si substrate 10.
  • an AlN nucleation layer 20 of 200 nm is epitaxially grown on the selected Si substrate 10 by MBE.
  • Step 3 As shown in FIG. 2c, ions are implanted into the Si substrate 10 through the AlN nucleation layer 20.
  • the Si substrate 10 on which the AlN nucleation layer 20 has been deposited is subjected to ion implantation, the implanted ions are F, the implanted dose is 1 ⁇ 10 16 cm -2 , and the implanted energy is 5 MeV.
  • Step 4 As shown in FIG. 2c, ions are implanted into the AlN nucleation layer 20.
  • the deposited AlN nucleation layer 20 is subjected to ion implantation, the implanted ions are Ar, the implanted dose is 1 ⁇ 10 14 cm -2 , and the implanted energy is 300 KeV to complete the production of the AlN template on the Si substrate.
  • Example 2 Example 3, and Example 4 only express three implementation modes of the present invention, and cannot therefore be understood as a limitation on the patent scope of the present invention. It should be pointed out that for those of ordinary skill in the art, without departing from the concept of the present invention, several modifications and improvements can be made, and these all fall within the protection scope of the present invention.
  • This embodiment further provides a method for preparing a GaN epitaxial structure on a Si substrate on the basis of the above embodiments.
  • the method for preparing a GaN epitaxial structure on a Si substrate includes:
  • Step 1 prepare the Si substrate AlN template by using the method for preparing the Si substrate AlN template in the above embodiment.
  • the Si substrate AlN template includes Si substrate 10 and AlN nucleation sequentially from bottom to top. Layer 20.
  • Step 2 As shown in FIG. 3b, a group III nitride transition layer 30 is grown on the AlN nucleation layer 20.
  • a group III nitride transition layer 30 is grown on the AlN nucleation layer 20 by using MOCVD.
  • Step 5 As shown in FIG. 3c, a GaN buffer layer 40 is grown on the III-nitride transition layer 30.
  • a GaN buffer layer 40 is grown on the III-nitride transition layer 30 using MOCVD.
  • Step 6 As shown in FIG. 3d, a group III nitride radio frequency device heterojunction structure 50 is grown on the GaN buffer layer 40.
  • the III-nitride radio frequency device heterojunction structure 50 is grown on the GaN buffer layer 40 by using MOCVD.
  • an AlN insertion layer can also be grown on the GaN buffer layer 40, and then the AlGaN barrier layer 50 can be grown on the AlN insertion layer, for example, using MOCVD in AlN An AlGaN barrier layer 50 is grown on the insertion layer.
  • the present invention After preparing the AlN nucleation layer on the Si substrate, the present invention performs ion implantation into the AlN nucleation layer and the Si substrate.
  • the types of ions implanted in this way can be expanded.
  • the load on the Si/AlN interface can be reduced.
  • the carrier concentration and the carrier concentration of the AlN nucleation layer reduce the RF loss of the AlN template on the Si substrate and improve the characteristics of GaN microwave devices to meet the application of GaN microwave devices in aerospace, radar, 5G communications and other fields It is required to prepare GaN on the Si substrate AlN template, so that the designed GaN epitaxial wafer has more degrees of freedom.
  • first and second are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features. Thus, the features defined with “first” and “second” may explicitly or implicitly include one or more of these features.
  • “plurality” means two or more than two, unless specifically defined otherwise.

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Abstract

本发明公开了一种Si衬底AlN模板的制备方法及Si衬底GaN外延结构的制备方法，该Si衬底AlN模板的制备方法包括：选取Si衬底；在Si衬底上生长AlN成核层；通过所述AlN成核层向所述Si衬底注入离子。本发明在Si衬底上制备AlN成核层之后，便通过AlN成核层向Si衬底进行离子注入和向AlN成核层注入离子，这种方式所注入的离子种类可以得到扩展，还可以降低Si/AlN界面处载流子的浓度和AlN成核层里的载流子浓度，从而降低Si衬底AlN模板的射频损耗，提高使用此Si衬底AlN模板制作的GaN微波器件的特性，以满足GaN微波器件在航空航天、雷达、移动通信等领域的应用需求。另外，使用所述Si衬底AlN模板制备GaN器件外延结构，其设计具有更多自由度。

Description

Si衬底AlN模板的制备方法及Si衬底GaN外延结构的制备方法 技术领域
本发明属于半导体技术领域，具体涉及一种Si衬底AlN模板的制备方法及Si衬底GaN外延结构的制备方法。
背景技术
第三代半导体材料GaN具有宽的禁带宽度、高临界击穿场强、高电子迁移率、高饱和电子漂移速度的优点，在微波毫米波大功率电子器件领域极具发展潜力，可广泛应用于航空航天、雷达、5G通信等领域。GaN外延片有同质外延和异质外延两种，由于GaN同质外延成本十分高昂，目前常用的技术是异质外延。GaN异质外延常用的衬底有蓝宝石、SiC和Si等，其中Si衬底相比其他衬底具有尺寸大、成本低且可以与Si基CMOS(Complementary Metal Oxide Semiconductor，互补金属氧化物半导体)工艺兼容的优点，目前基于Si衬底的GaN外延片的研究是国际上的热点之一。
目前基于Si衬底的典型GaN外延层结构AlN成核层、渐变AlGaN过渡层或者AlN/GaN超晶格过渡层、GaN缓冲层、III族氮化物器件异质结结构。在外延生长过程中，基于Si衬底的GaN外延片中的AlN成核层和III族氮化物过渡层中的Al原子和Ga原子会向Si衬底扩散，对Si衬底形成p型掺杂，导致Si衬底表面存在p型导电沟道。另外，由于AlN成核层中的极化电荷的存在，在Si/AlN界面比较存在n型反型导电沟道。AlN成核层中的高缺陷密度也会造成较高的背景载流子浓度。这几种因素使基于Si衬 底的GaN外延片以及在基于Si衬底的GaN外延片上制作的微波器件带来很高的电磁损耗，降低了GaN微波器件的特性。因此，为了提高GaN微波器件的特性，以满足GaN微波器件在航空航天、雷达、5G通信等领域的应用需求，降低Si衬底GaN外延片的射频损耗很有必要。
目前，文献公开报道的降低Si衬底上GaN外延片的射频损耗的主要措施有：一、优化AlN成核层的厚度和生长条件，采用比较薄的AlN成核层(T.T.Luong et al.,RF loss mechanisms in GaN-based high-electron-mobility-transistor on silicon:Role of an inversion channel at the AlN/Si interface[J],Phys.Status.Solidi.A,2017:1600944)。但是采用比较薄的AlN成核层会对之后III族氮化物的过渡层、GaN缓冲和器件的异质接结构的质量造成影响。另外，Si衬底表面的p型掺杂沟道和Si/AlN界面的n型反型沟道仍然存在，问题并没有解决。二，采取局部移除衬底的办法，将射频器件下面的Si衬底移除(L.Pattison et al.,Improving GaN on Si Power Amplifiers through reduction of parasitic conduction layer[C],Proc.9th European Microwave Integrated Circuits Conf.,2014:92)。但是，局部移除Si衬底会引入比较大的热阻，影响器件的散热，另外也对射频器件的衬底通孔和背金属的制作带来困难。
另外，国外有人在专利中提出了在完成Si衬底上的AlN成核层、AlGaN过渡层的生长之后，采用离子注入技术，在AlN/Si界面处注入相对原子质量低于5的元素离子，比如H离子，以破坏Si衬底的晶格结构，阻挡Al、Ga原子向Si衬底的扩散，从而降低AlN/Si界面处的载流子浓度，降低Si衬底GaN材料的射频损耗(J.C.Roberts,et al.,III–Nitride semiconductor structures comprising spatially patterned implanted species[P]2017)。这个专利 中并没有提出对III-族氮化物材料中的背景载流子浓度进行处理，而III-族氮化物材料中的背景载流子浓度也是引起Si衬底GaN器件电磁损耗的重要一部分。并且，在外延生长AlGaN过渡层之后再进行离子注入，会因为氮化物层太厚导致如果注入的离子相对原子质量大于5时，其注入深度受限，从而无法注入到AlN/Si界面处，所以需要将注入的离子种类限制为相对原子量小于5的元素，这减少了对注入的离子种类的数量和选择，并且，离子注入在外延生长AlGaN过渡层后进行，材料的表面会吸附杂质离子，在继续外延生长GaN缓冲层和之后的器件异质结结构时，杂质离子会扩散进入GaN的缓冲层和器件异质结结构，从而影响器件的性能。
发明内容
为了解决现有技术中存在的上述问题，本发明提供了一种Si衬底AlN模板的制备方法及Si衬底GaN外延结构的制备方法。本发明要解决的技术问题通过以下技术方案实现：
一种Si衬底AlN模板的制备方法，包括：
选取Si衬底；
在所述Si衬底上生长AlN成核层；
通过所述AlN成核层向所述Si衬底注入离子。
在本发明的一个实施例中，在所述Si衬底上生长AlN成核层，包括：
利用MBE、MOCVD、HVPE或PVD方法在所述Si衬底上生长所述AlN成核层。
在本发明的一个实施例中，通过所述AlN成核层向所述Si衬底注入离子，还包括：
通过所述AlN成核层向所述Si衬底注入离子，并向所述AlN成核层注入 离子。
在本发明的一个实施例中，通过所述AlN成核层向所述Si衬底注入离子，并向所述AlN成核层注入离子，包括：
利用离子注入方法通过所述AlN成核层向所述Si衬底注入离子，并利用离子注入方法向所述AlN成核层注入离子。
在本发明的一个实施例中，所述离子的注入剂量为1×10 10cm -2-1×10 16cm -2，注入的能量为10KeV-100KeV。
在本发明的一个实施例中，向所述Si衬底注入的离子为Ar、N、H、O、F、As、P离子中的一种或者几种，向所述AlN成核层注入的离子为Ar、N、Fe、C、F、Mg离子中的一种或者几种。
在本发明的一个实施例中，所述Si衬底的电阻率为0.01-10000Ω·cm。
在本发明的一个实施例中，所述Si衬底的厚度为100-1500μm。
在本发明的一个实施例中，所述AlN成核层的厚度为10-500nm。
本发明一个实施例还提供一种Si衬底GaN外延结构的制备方法，包括：
利用上述任一项实施例所述的Si衬底AlN模板的制备方法制备的Si衬底AlN模板；
在所述Si衬底AlN模板的所述AlN成核层上生长III族氮化物过渡层；
在所述III族氮化物过渡层上生长GaN缓冲层；
在所述GaN缓冲层上生长III族氮化物射频器件异质结结构。
本发明的有益效果：
本发明在Si衬底上制备AlN成核层之后，便通过AlN成核层向Si衬底和AlN成核层进行离子注入，这种方式所注入的离子种类可以得到扩展，此外，还可以降低Si/AlN界面处载流子的浓度和AlN成核层里的载流子浓度，从而 降低Si衬底AlN模板的射频损耗，提高使用此Si衬底AlN模板制作的GaN微波器件的特性，以满足GaN微波器件在航空航天、雷达、5G通信等领域的应用需求。另外，在Si衬底AlN模板上制备GaN，使得所设计得GaN外延片有更多自由度。
以下将结合附图及实施例对本发明做进一步详细说明。
附图说明
图1是本发明实施例提供的一种Si衬底AlN模板的制备方法的流程示意图；
图2a-图2c是本发明实施例提供的一种Si衬底AlN模板的制备方法的过程示意图；
图3a-图3d是本发明实施例提供的一种Si衬底的GaN外延结构的制备方法的过程示意图。
具体实施方式
下面结合具体实施例对本发明做进一步详细的描述，但本发明的实施方式不限于此。
实施例一
请参见图1、图2a-图2c，图1是本发明实施例提供的一种Si衬底AlN模板的制备方法的流程示意图；图2a-图2c是本发明实施例提供的一种Si衬底AlN模板的制备方法的过程示意图。本实施例提供一种Si衬底AlN模板的制备方法，该Si衬底AlN模板的制备方法包括步骤1-步骤3，其中：
步骤1、如图2a所示，选取Si衬底10。
优选地，Si衬底10的电阻率为0.01-10000Ω·cm。
优选地，Si衬底10的晶向为(111)晶向。
优选地，Si衬底10的厚度为100-1500μm，Si衬底10的厚度为100-1500μm既可以保证其散热效果，当Si衬底10的厚度过薄时不仅对性能改善作用不大，而且Si衬底10的厚度过薄可能会带来可靠性的问题，当Si衬底10的厚度过厚时，不仅会使得成本增加，且还会因为Si的热导率不高从而带来散热的问题。
步骤2、如图2b所示，在Si衬底10上生长AlN成核层20。
具体地，利用MBE(Molecular beam epitaxy，分子束外延)、MOCVD(Metal-organic Chemical Vapor Deposition，金属有机化合物化学气相沉淀)、HVPE(Hydride Vapor Phase Epitaxy，氢化物气相外延)或PVD(Physical Vapor Deposition，物理气相沉积)方法在Si衬底10上生长AlN成核层20，Si衬底10和AlN成核层20组成Si衬底AlN模板。
优选地，AlN成核层20的厚度为10-500nm。
步骤3、如图2c所示，通过AlN成核层20向Si衬底10注入离子。
具体地，利用离子注入方法通过AlN成核层20向Si衬底10注入离子。
优选地，向Si衬底10注入的离子为Ar、N、H、O、F、As、P离子中的一种或者几种，在注入的离子为多种时可以同时向Si衬底10注入，也可以分批次注入，优选地为分批次向Si衬底10注入。
另外，为了进一步地降低Si衬底AlN模板的射频损耗，本实施例还可以向AlN成核层注入离子，向AlN成核层注入离子的步骤可以在通过AlN成核层20向Si衬底10注入离子之前执行，也可以在通过AlN成核层20向Si衬底10注入离子之后执行，本实施例对此不做具体限定。
进一步地，利用离子注入方法向AlN成核层20注入离子。
优选地，向AlN成核层20注入的离子为Ar、N、Fe、C、F、Mg离子中的一种或者几种，在注入的离子为多种时可以同时向AlN成核层20注入，也 可以分批次注入，优选地为分批次向AlN成核层20注入。
由此，既可以降低AlN/Si界面处的载流子浓度和AlN成核层的载流子浓度，达到降低Si衬底AlN模板的射频损耗的技术效果，从而可以能提高Si基GaN微波功率器件的射频性能，以满足GaN微波器件在航空航天、雷达、5G通信等领域的应用需求；本发明是在Si衬底上淀积AlN成核层后进行离子注入，注入离子的种类得以扩展，不仅可以选择相对原子量小于5的元素，还可以选择注入Ar、N等相对原子质量较大的元素。此外，在Si衬底AlN模板上淀积GaN时，设计外延层会有更多自由度。
进一步地，离子的注入剂量为1×10 10cm -2-1×10 16cm -2，注入的能量为10KeV-100KeV，在本实施例设定离子的注入剂量为1×10 10cm -2-1×10 16cm -2、注入的能量为10KeV-100KeV，可以保证注入的离子能够进入Si衬底，并破坏Si的晶体结构，达到降低AlN/Si界面处的载流子浓度，从而达到降低Si衬底AlN模板的射频损耗的目的。
本发明在Si衬底上制备AlN成核层之后，便向AlN成核层中注入离子，同时还向Si衬底注入离子，这种方式所注入的离子种类可以得到扩展，此外，还可以降低Si/AlN界面处载流子和AlN成核层的浓度，从而降低Si衬底AlN模板的射频损耗，提高GaN微波器件的特性，以满足GaN微波器件在航空航天、雷达、5G通信等领域的应用需求，在Si衬底AlN模板上制备GaN，使得所设计得GaN外延片有更多自由度。
实施例二
本发明在上述实施例的基础上提供一种Si衬底AlN模板的具体制备方法，该Si衬底AlN模板的具体制备方法包括：
步骤1、如图2a所示，选取Si衬底10。
具体地，Si衬底1的厚度为675μm、电阻率为5000Ω·cm、晶向为(111)晶向。
步骤2、如图2b所示，在Si衬底10上生长AlN成核层20。
具体地，在选取的Si衬底10上采用MOCVD外延生长200nm的AlN成核层20。
步骤3、如图2c所示，通过AlN成核层20向Si衬底10注入离子。
具体地，将完成淀积AlN成核层20的Si衬底10进行离子注入，注入的离子为Ar，注入的剂量为1×10 14cm -2，注入的能量为10MeV,完成Si衬底AlN模板的制作。
实施例三
本发明在上述实施例的基础上提供另一种Si衬底AlN模板的具体制备方法，该Si衬底AlN模板的具体制备方法包括：
步骤1、如图2a所示，选取Si衬底10。
具体地，Si衬底1的厚度为675μm、电阻率为5000Ω·cm、晶向为(111)晶向。
步骤2、如图2b所示，在Si衬底10上生长AlN成核层20。
具体地，在选取的Si衬底10上采用MOCVD外延生长200nm的AlN成核层20。
步骤3、如图2c所示，通过AlN成核层20向Si衬底10注入离子。
具体地，将完成淀积AlN成核层20的Si衬底10进行离子注入，注入的离子为N，注入的剂量为1×10 15cm -2，注入的能量为5MeV。
步骤4、如图2c所示，向AlN成核层20注入离子。
具体地，将完成淀积AlN成核层20进行离子注入，注入的离子为Fe，注 入的剂量为1×10 14cm -2，注入的能量为300KeV，完成Si衬底AlN模板的制作。
实施例四
本发明在上述实施例的基础上提供又一种Si衬底AlN模板的具体制备方法，该Si衬底AlN模板的具体制备方法包括：
步骤1、如图2a所示，选取Si衬底10。
具体地，Si衬底1的厚度为1150μm、电阻率为5000Ω·cm、晶向为(111)晶向。
步骤2、如图2b所示，在Si衬底10上生长AlN成核层20。
具体地，在选取的Si衬底10上采用MBE外延生长200nm的AlN成核层20。
步骤3、如图2c所示，通过AlN成核层20向Si衬底10注入离子。
具体地，将完成淀积AlN成核层20的Si衬底10进行离子注入，注入的离子为F，注入的剂量为1×10 16cm -2，注入的能量为5MeV。
步骤4、如图2c所示，向AlN成核层20注入离子。
将完成淀积AlN成核层20进行离子注入，注入的离子为Ar，注入的剂量为1×10 14cm -2，注入的能量为300KeV，完成Si衬底AlN模板的制作。
实施例二、实施例三和实施例四仅表达了本发明的三种实施方式，并不能因此而理解为对本发明专利范围的限制。应当指出的是，对于本领域的普通技术人员来说，在不脱离本发明构思的前提下，还可以做出若干变形和改进，这些都属于本发明的保护范围。
实施例五
本实施例在上述实施例的基础上还提供一种Si衬底GaN外延结构的制备方法，该Si衬底GaN外延结构的制备方法包括：
步骤1、如图3a所示，利用上述实施例制备Si衬底AlN模板的制备方法 制备Si衬底AlN模板，该Si衬底AlN模板自下而上依次包括有Si衬底10和AlN成核层20。
步骤2、如图3b所示，在AlN成核层20上生长III族氮化物过渡层30。
具体地，利用MOCVD在AlN成核层20上生长III族氮化物过渡层30。
步骤5、如图3c所示，在III族氮化物过渡层30上生长GaN缓冲层40。
具体地，利用MOCVD在III族氮化物过渡层30上生长GaN缓冲层40。
步骤6、如图3d所示，在GaN缓冲层40上生长III族氮化物射频器件异质结结构50。
具体地，利用MOCVD在GaN缓冲层40上生长III族氮化物射频器件异质结结构50。
另外，在AlGaN过渡层30上生长GaN缓冲层40之后，还可以先在GaN缓冲层40上生长一层AlN插入层，之后再在AlN插入层上生长AlGaN势垒层50，例如利用MOCVD在AlN插入层上生长AlGaN势垒层50。
本发明在Si衬底上制备AlN成核层之后，向AlN成核层和Si衬底进行离子注入，这种方式所注入的离子种类可以得到扩展，此外，还可以降低Si/AlN界面处载流子的浓度和AlN成核层的载流子浓度，从而降低Si衬底AlN模板的射频损耗，提高GaN微波器件的特性，以满足GaN微波器件在航空航天、雷达、5G通信等领域的应用需求，在Si衬底AlN模板上制备GaN，使得所设计得GaN外延片有更多自由度。
在本发明的描述中，术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个该特征。在本发明的描述中，“多个”的含义是两个或两个以上， 除非另有明确具体的限定。
在本说明书的描述中，参考术语“一个实施例”、“一些实施例”、“示例”、“具体示例”、或“一些示例”等的描述意指结合该实施例或示例描述的具体特征、结构、材料或者特数据点包含于本发明的至少一个实施例或示例中。在本说明书中，对上述术语的示意性表述不必须针对的是相同的实施例或示例。而且，描述的具体特征、结构、材料或者特数据点可以在任何的一个或多个实施例或示例中以合适的方式结合。此外，本领域的技术人员可以将本说明书中描述的不同实施例或示例进行接合和组合。
以上内容是结合具体的优选实施方式对本发明所作的进一步详细说明，不能认定本发明的具体实施只局限于这些说明。对于本发明所属技术领域的普通技术人员来说，在不脱离本发明构思的前提下，还可以做出若干简单推演或替换，都应当视为属于本发明的保护范围。

Claims (10)

  1. 一种Si衬底AlN模板的制备方法，其特征在于，包括：
    选取Si衬底；
    在所述Si衬底上生长AlN成核层；
    通过所述AlN成核层向所述Si衬底注入离子。
  2. 根据权利要求1所述的Si衬底AlN模板的制备方法，其特征在于，在所述Si衬底上生长AlN成核层，包括：
    利用MBE、MOCVD、HVPE或PVD方法在所述Si衬底上生长所述AlN成核层。
  3. 根据权利要求1所述的Si衬底AlN模板的制备方法，其特征在于，通过所述AlN成核层向所述Si衬底注入离子，还包括：
    通过所述AlN成核层向所述Si衬底注入离子，并向所述AlN成核层注入离子。
  4. 根据权利要求3所述的Si衬底AlN模板的制备方法，其特征在于，通过所述AlN成核层向所述Si衬底注入离子，并向所述AlN成核层注入离子，包括：
    利用离子注入方法通过所述AlN成核层向所述Si衬底注入离子，并利用离子注入方法向所述AlN成核层注入离子。
  5. 根据权利要求4所述的Si衬底AlN模板的制备方法，其特征在于，所述离子的注入剂量为1×10 10cm -2-1×10 16cm -2，注入的能量为10KeV-100MeV。
  6. 根据权利要求4所述的Si衬底AlN模板的制备方法，其特征在于，向所述Si衬底注入的离子为Ar、N、H、O、F、As、P离子中的一种或者几种，向所述AlN成核层注入的离子为Ar、N、Fe、C、F、Mg离子中的一种或者几种。
  7. 根据权利要求1所述的Si衬底AlN模板的制备方法，其特征在于，所述Si衬底的电阻率为0.01-10000Ω·cm。
  8. 根据权利要求1所述的Si衬底AlN模板的制备方法，其特征在于，所述Si衬底的厚度为100-1500μm。
  9. 根据权利要求1所述的Si衬底AlN模板的制备方法，其特征在于，所述AlN成核层的厚度为10-500nm。
  10. 一种Si衬底GaN外延结构的制备方法，其特征在于，包括：
    利用权利要求1至8任一项所述的Si衬底AlN模板的制备方法制备的Si衬底AlN模板；
    在所述Si衬底AlN模板的所述AlN成核层上生长III族氮化物过渡层；
    在所述III族氮化物过渡层上生长GaN缓冲层；
    在所述GaN缓冲层上生长III族氮化物射频器件异质结结构。
PCT/CN2021/075952 2020-04-30 2021-02-08 Si衬底AlN模板的制备方法及Si衬底GaN外延结构的制备方法 WO2021218281A1 (zh)

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