WO2021217296A1 - 显示基板以及显示装置 - Google Patents

显示基板以及显示装置 Download PDF

Info

Publication number
WO2021217296A1
WO2021217296A1 PCT/CN2020/087000 CN2020087000W WO2021217296A1 WO 2021217296 A1 WO2021217296 A1 WO 2021217296A1 CN 2020087000 W CN2020087000 W CN 2020087000W WO 2021217296 A1 WO2021217296 A1 WO 2021217296A1
Authority
WO
WIPO (PCT)
Prior art keywords
sub
effective light
emitting area
pixel
power line
Prior art date
Application number
PCT/CN2020/087000
Other languages
English (en)
French (fr)
Inventor
舒晓青
马宏伟
董向丹
Original Assignee
京东方科技集团股份有限公司
成都京东方光电科技有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 京东方科技集团股份有限公司, 成都京东方光电科技有限公司 filed Critical 京东方科技集团股份有限公司
Priority to PCT/CN2020/087000 priority Critical patent/WO2021217296A1/zh
Priority to CN202080000601.6A priority patent/CN113853682A/zh
Priority to EP20926363.1A priority patent/EP4145525A4/en
Priority to US17/425,000 priority patent/US20220320235A1/en
Publication of WO2021217296A1 publication Critical patent/WO2021217296A1/zh

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • H10K59/1315—Interconnections, e.g. wiring lines or terminals comprising structures specially adapted for lowering the resistance
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30—Devices specially adapted for multicolour light emission
    • H10K59/35—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
    • H10K59/352—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels the areas of the RGB subpixels being different
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30—Devices specially adapted for multicolour light emission
    • H10K59/35—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
    • H10K59/353—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels characterised by the geometrical arrangement of the RGB subpixels

Definitions

  • At least one embodiment of the present disclosure relates to a display substrate and a display device.
  • Organic light-emitting diodes have the advantages of self-luminescence, high efficiency, bright colors, light and thin, power-saving, rollable, and wide operating temperature range, and have been gradually applied to large-area displays, lighting, and vehicle-mounted displays.
  • a two-layer power supply line structure can be adopted, and the power supply line close to the light emitting layer of the organic light emitting diode forms a grid pattern to reduce the voltage drop of the power supply line.
  • At least one embodiment of the present disclosure provides a display substrate and a display device.
  • At least one embodiment of the present disclosure provides a display substrate, including: a base substrate, a first power line on the base substrate, and a pixel definition on a side of the first power line away from the base substrate Floor.
  • the first power supply line includes a plurality of first sub-power supply lines extending in a first direction and a plurality of second sub-power supply lines located between every two adjacent first sub-power supply lines.
  • the sub-power supply line is configured to connect two adjacent first sub-power supply lines;
  • the pixel defining layer includes a plurality of openings to define effective light-emitting regions of a plurality of sub-pixels, and the plurality of sub-pixels include sub-pixels of the first color ,
  • the first color sub-pixel includes a first effective light-emitting area.
  • At least one of the first sub-power lines includes at least one first break, and the first effective light-emitting area is located at the at least one first break so that the first sub-power line does not pass through the first direction The
  • the first effective light-emitting area and the first sub-power supply line having the first break are substantially not overlapped.
  • the display substrate further includes: a plurality of second power lines extending along the first direction and located on a side of the first power line close to the base substrate.
  • the second power line and the first power line are connected through a via in an insulating layer between the first power line and the second power line.
  • the plurality of sub-pixels further include second-color sub-pixels, and the second-color sub-pixels include a second effective light-emitting area; at least one of the first sub-power lines includes at least one first sub-pixel. Two fractures, the second effective light-emitting area is located at the at least one second fracture so that the first sub power line does not penetrate the second effective light-emitting area along the first direction.
  • the second effective light-emitting area and the first sub-power supply line having the second break are substantially not overlapped.
  • one of the first color sub-pixel and the second color sub-pixel is a blue sub-pixel, and the other is a red sub-pixel.
  • the plurality of sub-pixels are divided into a plurality of repeating units, and each repeating unit includes the first color sub-pixel, the second color sub-pixel, and two third color sub-pixels.
  • Pixels, each of the third color sub-pixels includes a third effective light-emitting area, and in each of the repeating units, the first color sub-pixels and the second color sub-pixels are arranged along the first direction, and two The third color sub-pixels are arranged along a second direction that intersects the first direction, and the first connection line between the center of the first color sub-pixel and the center of the second color sub-pixel is connected to the two second-color sub-pixels.
  • the plurality of sub-pixels includes a third-color sub-pixel, and the third-color sub-pixel includes a third effective light-emitting area; at least one of the first sub-power lines includes at least one third A fracture, the third effective light-emitting area is located at the at least one third fracture so that the first sub power line does not penetrate the third effective light-emitting area along the first direction.
  • the third effective light-emitting area and the first sub-power supply line having the third break are substantially not overlapped.
  • the display substrate further includes: a connecting portion, which is provided in the same layer as the first power line and made of the same material;
  • the second electrode is located on the side of the organic light-emitting layer facing the base substrate, and the second electrode is electrically connected to the connecting portion.
  • the display substrate further includes a strip portion, which extends along the first direction, and is provided in the same layer as the first power line and made of the same material.
  • the third effective light-emitting area overlaps the strip portion and the connecting portion, and the strip portion is located close to the third effective light-emitting area.
  • the strip-shaped portion and the connecting portion are located on the same side of a straight line passing through the center of the third effective light-emitting area and extending along the first direction.
  • the connecting portion and the strip portion are an integral structure.
  • the display substrate includes a spacer block, which extends along the first direction, is provided in the same layer as the first power line and has the same material.
  • the orthographic projection of the third effective light-emitting area on the base substrate overlaps the orthographic projection of the spacer block on the base substrate, and the strip portion and the connecting portion are located passing through the The center of the third effective light-emitting area is on one side of a straight line extending along the first direction, and the spacer is located on the other side of the straight line.
  • the overlapping portion of each of the third effective light-emitting areas and the spacer is the first overlapping portion
  • the third effective The portion where the light-emitting region overlaps the connecting portion and the strip portion is a second overlapping portion
  • the area ratio of the first overlapping portion to the second overlapping portion is approximately 0.9-1.1.
  • the third effective light-emitting areas of the two third-color sub-pixels are symmetrically distributed with respect to the first line, and are arranged along the line perpendicular to the substrate.
  • the portion where the spacer block, the connecting portion, and the strip portion overlap the third effective light-emitting area of one of the third color sub-pixels is a third overlapping portion, and the spacer block ,
  • the connecting portion and the overlapping portion of the third effective light-emitting area of the strip-shaped portion and the other third color sub-pixel is a fourth overlapping portion, and the third overlapping portion and the fourth overlapping portion
  • the overlapping portions are approximately symmetrically distributed with respect to the first connecting line.
  • the spacer is a portion of the first sub-power supply line and the third effective light-emitting area overlapping in a direction perpendicular to the base substrate.
  • the first overlapping portion and the second overlapping portion are distributed symmetrically in the center.
  • the second sub-power supply line and the strip portion are an integral structure, and the strip portion and the connecting portion are spaced apart; along a line perpendicular to the base substrate Direction, the first sub-power line overlaps the third effective light-emitting area, and the strip portion and the connecting portion are located at the center of the third effective light-emitting area and extend along the first direction.
  • the first sub power line is located on the other side of the straight line.
  • the first sub-power supply line further includes a protruding portion, and the protruding portion is located on the main body of the first sub-power supply line close to the connection that is connected to the third color sub-pixel.
  • the third effective light-emitting area overlaps with the orthographic projections of the first sub-power cord body, the protruding portion, and the connecting portion on the base substrate, and the third effective The center of the orthographic projection of the light-emitting area on the base substrate is located within the orthographic projection of the protrusion on the base substrate.
  • the area of the first effective light-emitting region is greater than the area of one of the third effective light-emitting regions, and the area of the second effective light-emitting region is greater than one.
  • the area of the third effective light-emitting area is greater than the area of the third effective light-emitting area.
  • the orthographic projection of the effective light-emitting area of each sub-pixel on the base substrate and the orthographic projection of the second sub power line on the base substrate are not intersected. Stacked.
  • the orthographic projection of the first sub power line on the base substrate and the orthographic projection of the second power line on the base substrate at least partially overlap.
  • At least one embodiment of the present disclosure provides a display substrate, including: a base substrate; an active semiconductor layer located on the base substrate; a first insulating layer located on the active semiconductor layer away from the base substrate One side; a first conductive layer, located on the side of the first insulating layer away from the active semiconductor layer; a second insulating layer, located on the side of the first conductive layer away from the first insulating layer; The second conductive layer is located on the side of the second insulating layer away from the first conductive layer; the third insulating layer is located on the side of the second conductive layer away from the second insulating layer; the third conductive layer, Is located on the side of the third insulating layer away from the second conductive layer; the fourth insulating layer is located on the side of the third conductive layer away from the third insulating layer; and the fourth conductive layer is located on the first The side of the fourth insulating layer away from the third conductive layer, wherein the fourth conductive layer includes a first power line, and the first power
  • the third conductive layer includes a plurality of second power lines extending in the first direction, the second power lines are connected to the first power lines through via holes in the fourth insulating layer; and a pixel defining layer , Located on a side of the first power line away from the base substrate, the pixel defining layer includes a plurality of openings to define the effective light-emitting area of a plurality of sub-pixels, the plurality of sub-pixels include sub-pixels of the first color, so The first color sub-pixel includes a first effective light-emitting area. At least one of the first sub-power lines includes at least one first break, and the first effective light-emitting area is located at the at least one first break so that the first sub-power line does not pass through the first direction The first effective light-emitting area.
  • At least one embodiment of the present disclosure provides a display device including any of the above-mentioned display substrates.
  • FIG. 1 is a schematic diagram of a partial plane structure of a display substrate
  • FIG. 2 is a schematic diagram of a partial plane structure of a display substrate provided according to an example of an embodiment of the present disclosure
  • Fig. 3 is a schematic partial cross-sectional view taken along the line AA shown in Fig. 2;
  • Fig. 4 is a schematic partial cross-sectional view taken along line BB shown in Fig. 2;
  • FIG. 5 is a schematic diagram of a partial planar structure of a second power cord according to an embodiment of the present disclosure
  • 6A is a schematic diagram of a pixel circuit of a first color sub-pixel according to an embodiment of the present disclosure
  • 6B-6E are schematic diagrams of various layers of a pixel circuit provided by an embodiment of the present disclosure.
  • FIG. 7 is a schematic diagram of a partial plane structure of a display substrate provided by another example of an embodiment of the present disclosure.
  • FIG. 8 is a schematic diagram of a partial planar structure of a display substrate provided by another example of an embodiment of the present disclosure.
  • FIG. 9 is a schematic diagram of a partial structure of a pixel arrangement in the display substrate shown in FIG. 8;
  • FIG. 10A is a schematic diagram of a partial plane structure of a display substrate provided according to another example of an embodiment of the present disclosure.
  • FIG. 10B is a schematic diagram of a partial planar structure of a display substrate provided according to another example of an embodiment of the present disclosure.
  • FIG. 10C is a schematic diagram of a partial planar structure of a display substrate provided according to another example of an embodiment of the present disclosure.
  • FIG. 11 is a cross-sectional view taken along line CC in the display substrate shown in FIG. 10A.
  • FIG. 12 is a cross-sectional view taken along the line DD in the display substrate shown in FIG. 10A.
  • FIG. 1 is a schematic diagram of a partial planar structure of a display substrate.
  • the display substrate includes a base substrate 10, a first power line 20 having a grid-like pattern, and an organic light emitting element 30 located on a side of the first power line 20 away from the base substrate 10.
  • the first power supply line 20 includes a first sub-power supply line 21 extending in a first direction, and a plurality of second sub-power supply lines 22 located between every two adjacent first sub-power supply lines 21.
  • the second sub-power supply lines 22 is configured to connect two adjacent first sub power lines 21 so that the shape of the first power line 20 is a grid pattern.
  • the display substrate further includes a plurality of connecting portions 23 provided on the same layer as the first power line 20, and each connecting portion 23 is configured to connect the anode of the organic light emitting element 30 located on the side away from the base substrate 10 with the anode located close to it.
  • the light emission control transistor on the side of the base substrate 10.
  • the display substrate further includes a second power line, a data line, and a gate line (not shown in the figure) located between the first power line 20 and the base substrate 10.
  • the data line and the second power line are located on the same layer, and the second power line is electrically connected to the organic light-emitting element through the light-emitting control transistor, so as to provide a power signal for the organic light-emitting element.
  • the extension direction of the second power line may be the same as the extension direction of the first sub-power line, for example, both extend along the first direction.
  • the via hole in the insulating layer between 20 and the second power line realizes electrical connection with the second power line.
  • the above-mentioned display substrate can reduce the voltage drop of the second power line by providing the first power line having a grid pattern shape and electrically connecting the first power line and the second power line, thereby improving the uniformity of the display device.
  • the side of the first power line 20 away from the base substrate 10 is further provided with a pixel defining layer (not shown), and the openings included in the pixel defining layer are used to define the organic light emitting elements of each color.
  • the effective light-emitting area is provided with a light-emitting layer in the effective light-emitting area.
  • FIG. 1 schematically shows light-emitting regions 31 of organic light-emitting elements of various colors.
  • the organic light emitting element 30 of each color may include a blue organic light emitting element 32, a green organic light emitting element 33, and a red organic light emitting element 34.
  • the inventor of the present application found that: as shown in FIG. 1, the effective light-emitting area 31 of the organic light-emitting element 30 of each color overlaps with the first sub-power line 21 of the first power line 20. As a result, the light-emitting layer and other film layers in the effective light-emitting area of the organic light-emitting element 30 cover the first power line 20, which causes the surface of the light-emitting layer away from the base substrate to be uneven, which in turn affects the display effect of the pixel and causes the appearance of color. Partially bad.
  • the overlapping portion of the effective light-emitting area and the first sub-power line is only located on one side of the center line of the effective light-emitting area extending along the first direction, which leads to the problem of asymmetry on both sides of the effective light-emitting area, which easily leads to color shift .
  • the ratio of the overlapping area of the effective light-emitting area of the green organic light-emitting element 33 and the connecting portion 23 to the area of the green effective light-emitting area is A
  • the overlapping area of the effective light-emitting area of the red organic light-emitting device 34 and the connecting portion 23 is equivalent to the effective red light emission.
  • the area ratio of the regions is B
  • the ratio of the overlapping area of the effective light-emitting area of the blue organic light-emitting element 32 and the connecting portion 23 to the area of the blue effective light-emitting area is C, A is greater than B, and A is greater than C.
  • the overlapping area of the effective light-emitting area of the connecting portion and the green organic light-emitting element occupies a relatively large area, resulting in the color shift phenomenon of the green organic light-emitting element
  • the color shift is more obvious than the other two colors of organic light-emitting elements.
  • Embodiments of the present disclosure provide a display substrate and a display device.
  • the display substrate includes a base substrate, a first power line on the base substrate, and a pixel defining layer on a side of the first power line away from the base substrate.
  • the first power line includes a plurality of first sub power lines extending in a first direction and a plurality of second sub power lines located between every two adjacent first sub power lines, and the second sub power lines are configured as Connecting two adjacent first sub power lines;
  • the pixel defining layer includes a plurality of openings to define the effective light-emitting area of the plurality of sub-pixels, the plurality of sub-pixels include the first color sub-pixels, and the first color sub-pixels include the first effective light-emitting area .
  • the at least one first sub-power line includes at least one first break, and the first effective light-emitting area is located at the at least one first break so that the first sub-power line does not penetrate the first effective light-emitting area along the first direction.
  • the light-emitting layer of the first color sub-pixel can be improved. The flatness, and then solve the problem of poor color cast.
  • FIG. 2 is a schematic diagram of a partial plane structure of a display substrate provided according to an example of an embodiment of the present disclosure.
  • the display substrate includes a base substrate 100 and a first power line 200 on the base substrate 100.
  • the first power line 200 includes a plurality of first sub power lines 210 extending in a first direction (ie, the X direction), and a plurality of second sub power lines located between every two adjacent first sub power lines 210 220.
  • the second sub power line 220 is configured to connect two adjacent first sub power lines 210, so that the shape of the first power line 200 is a roughly grid pattern.
  • the first sub-power supply line 210 and the second sub-power supply line 220 are formed in the same patterning process using one mask for the same metal material.
  • FIG. 3 is a schematic partial cross-sectional view taken along the line AA shown in FIG. 2
  • FIG. 4 is a schematic partial cross-sectional view taken along the line BB shown in FIG. 2.
  • a pixel defining layer 400 is provided on the side of the first power line 200 away from the base substrate 100.
  • the pixel defining layer 400 includes a plurality of openings 401 to define the effective light-emitting area of a plurality of sub-pixels.
  • the plurality of sub-pixels includes a first color sub-pixel 310, and the first color sub-pixel 310 includes a first effective light-emitting area 311.
  • each color sub-pixel includes a first electrode, an organic light-emitting layer, and a second electrode that are sequentially stacked in a direction perpendicular to the base substrate.
  • the first color sub-pixel 310 includes a first electrode 314, an organic light-emitting layer 312, and a second electrode 313 located on the side of the organic light-emitting layer 312 facing the base substrate 100, which are sequentially stacked. And the part where the second electrodes 313 are in contact with each other can drive the organic light emitting layer 312 to emit light.
  • the portion where the first electrode 314, the organic light emitting layer 312, and the second electrode 313 are in contact with each other is the effective portion where the first color sub-pixel 310 can emit light, that is, the first effective light emitting region 311.
  • the shape of the sub-pixel may refer to the shape of the portion where the first electrode, the organic light emitting layer, and the second electrode are in contact with each other.
  • the area of the second electrode may be slightly larger than the area of the light-emitting layer, or the area of the light-emitting layer may be slightly larger than the area of the second electrode, which is not particularly limited in the embodiments of the present disclosure.
  • the light-emitting layer here may include the electroluminescent layer itself and other functional layers located on both sides of the electroluminescent layer, such as a hole injection layer, a hole transport layer, an electron injection layer, and an electron transport layer.
  • the shape of the pixel may also be defined by the shape of the opening of the pixel defining layer.
  • the second electrode of the light emitting diode may be disposed under the pixel defining layer, and the pixel defining layer includes an opening for defining the pixel, and the opening exposes a part of the second electrode.
  • the opening of the pixel defining layer defines the shape of each color sub-pixel.
  • the orthographic projection of the pixel defining layer 400 on the base substrate 100 overlaps with the orthographic projection of the first power line 200 on the base substrate 100, and the second defined by the pixel defining layer 400 overlaps. At least part of the orthographic projection of an effective light-emitting area 311 on the base substrate 100 does not overlap with the orthographic projection of the first power line 200 closest to the first effective light-emitting area 311 on the base substrate 100.
  • the first effective light-emitting area 311 includes a center line extending in the X direction, and the first power line 200 with the shortest distance from the center line of the two first power lines 200 located on both sides of the center line and extending in the X direction is the above "The first power line 200 closest to the first effective light-emitting area 311".
  • the first power line 200 closest to the first effective light-emitting area 311 is a continuous power line, the continuous power line will run through the first effective light-emitting area.
  • At least one first sub-power line 210 included in the first power line 200 includes a first break 211, that is, the first sub-power line 210 extending along the first direction of the first power line 200 is not Continuous power cord.
  • the first effective light-emitting area 311 is located at the first break 211 so that the first sub power line 210 does not penetrate the first effective light-emitting area 311 along the first direction.
  • the description of "the first effective light-emitting area is located at the first fracture" and "the first sub-power line does not penetrate the first effective light-emitting area in the first direction" described in the embodiments of the present disclosure both refer to the positional relationship of the above features on the plane. For example, in the plan view shown in FIG. 2, the first effective light-emitting area is located at the first fracture, and the first sub power line does not penetrate the first effective light-emitting area along the first direction.
  • the first effective light-emitting area may overlap with the first fracture and the first sub power line located on at least one side of the first fracture, that is, , Remove a part of the structure where the first sub power line 21 shown in FIG. 1 overlaps the effective light-emitting area of the blue organic light-emitting element 32 or the red organic light-emitting element 34 to form a first fracture.
  • the overlapping area of the power line and the effective light-emitting area can improve the flatness of the organic light-emitting layer at the first fracture, which is beneficial to reduce color shift.
  • the first effective light-emitting area and the first sub-power supply line do not substantially overlap, that is, the first effective light-emitting area 311 and the first sub-power line do not overlap substantially.
  • the center line extending along the first direction of the power line 210 overlaps, but the overlap position is provided with a first break 211, so the first effective light-emitting area 311 and the first sub-power line 210 basically do not overlap, which can improve the first
  • the flatness of the organic light-emitting layer 312 and other film layers arranged in the effective light-emitting region 311 can prevent the color shift of the first color sub-pixel 310 during the display process.
  • the above and subsequent "substantially no overlap” means that the ratio of the area where the effective light-emitting area overlaps with the first sub-power line to the area of the effective light-emitting area does not exceed 5%. That is, compared to the situation where the first effective light-emitting area overlaps with the first sub-power supply line shown in FIG. 1, the embodiment of the present disclosure completely removes the overlapping position of the first sub-power supply line and the first effective display area. In order to form the first fracture, the first effective light-emitting area and the first sub-power supply line do not substantially overlap, which can prevent the color shift of the first color sub-pixels during the display process.
  • the shape of the first effective light-emitting area 311 may be a rectangle, and the extension direction of any side of the rectangle intersects the first direction.
  • the first effective light-emitting area 311 includes two first vertices opposite to each other and two second vertices opposite to each other.
  • the orthographic projections of the two first vertices on the plane where the first sub power line 210 is located are located on the first sub power line.
  • the orthographic projections of the two second vertices on the plane where the first sub-power line 210 is located are on the same side of the first sub-power line 210.
  • the shape of the first effective light-emitting area may be a rounded figure, such as a rounded rectangle. That is, the corners of the first effective light emitting area are rounded.
  • the corners of the opening may form a rounded shape, so that the shape of the first effective light-emitting area formed may be a rounded shape.
  • the above-mentioned "vertex" can refer to the vertices of the four vertices of a standard rectangle with an included angle of 90°, or can refer to the points located on the four rounded corners of the rounded rectangle, and each rounded corner has an apex.
  • the first effective light-emitting area 311 has a certain distance from the first sub power line 210 located on one side of it and next to it, and is located in the second direction.
  • the first sub power line 210 on the other side of an effective light-emitting area 311 and adjacent thereto is provided with a first break 211. Therefore, the first effective light-emitting area 311 does not overlap with the first sub power lines 210 located on both sides thereof.
  • the above-mentioned first sub-power line 210 adjacent to the first effective light-emitting area 311 means that there is no other first sub-power line 210 between the first sub-power line 210 and the first effective light-emitting area 311.
  • the maximum size of the first effective light-emitting area 311 along the second direction may be greater than the distance between two adjacent first sub power lines 210.
  • One is provided with a first break 211 so that the first effective light-emitting area 311 is located at the first break 211, which can prevent the first effective light-emitting area 311 from overlapping the first sub power line 210.
  • the embodiment of the present disclosure does not specifically limit the maximum size of the first effective light-emitting area 311 along the second direction.
  • the maximum size of the first effective light-emitting area 311 along the second direction may also be less than or equal to two adjacent first light-emitting areas. The distance between the sub power lines 210.
  • the orthographic projection of the first effective light-emitting area 311 on the base substrate 100 and the orthographic projection of the second sub-power line 220 on the base substrate 100 also do not overlap.
  • the maximum dimension of the first effective light-emitting area 311 along the first direction is smaller than the distance between the two second sub power lines 220 adjacent to each other on both sides of the first effective light-emitting area 311, so that the first effective light-emitting area 311 and the second sub-power line 220 The power cord 220 does not overlap.
  • the orthographic projection of the first effective light-emitting area 311 of the first color sub-pixel 310 on the base substrate 100 does not overlap with the first power line 200 to ensure the first effective
  • the flatness of the organic light-emitting layer 312 and other film layers in the light-emitting area 311 prevents the color shift of the first color sub-pixels.
  • the first color sub-pixel 310 may be a red sub-pixel, a blue sub-pixel, or a green sub-pixel.
  • FIG. 5 is a schematic diagram of a partial planar structure of a second power cord according to an embodiment of the present disclosure.
  • the display substrate further includes a plurality of second power lines 500 located on the side of the first power line 200 close to the base substrate 100.
  • the second power line 500 extends along the first direction and is configured to provide a power signal to each sub-pixel.
  • the orthographic projection of the first sub power line 210 on the base substrate 100 and the orthographic projection of the second power line 500 on the base substrate 100 at least partially overlap, and the second power source
  • the line 500 may be electrically connected to the first power line 200 through a via 351 in the insulating layer 101 (ie, the fourth insulating layer 101 described later) between the first power line 200 and the second power line 500.
  • the position of the first sub power line 210 except for the breakage may be substantially coincident with the second power line 500.
  • the display substrate further includes a data line 600 provided in the same layer as the second power line 500, the data line 600 extends along the first direction and is configured to provide data signals for each sub-pixel.
  • the data line 600 and the second power line 500 may be formed by the same patterning process.
  • the "same layer” here and later refers to the relationship between multiple film layers formed by the same material after the same step (for example, one-step patterning process).
  • the “same layer” here does not always mean that multiple film layers have the same thickness or that multiple film layers have the same height in the cross-sectional view.
  • FIG. 6A is a schematic diagram of a pixel circuit of a first color sub-pixel provided according to an embodiment of the present disclosure.
  • the pixel circuit 31 of the first color sub-pixel 310 may include a driving transistor T1, a data writing transistor T2, a threshold compensation transistor T3, a first light emission control transistor T4, a second light emission control transistor T5, and a first reset transistor.
  • the driving transistor T1 includes a gate, a first electrode, and a second electrode, and is configured to provide the first color organic light emitting element 3100 with a driving current for driving the first color organic light emitting element 3100 to emit light.
  • the first pole of the data writing transistor T2 is electrically connected to the first pole of the driving transistor T1, and is configured to write the data signal into the storage capacitor C under the control of the scan signal;
  • the second pole of the data writing transistor T2 Is configured to be electrically connected to the data line 600 to receive the data signal, the gate of the data writing transistor T2 is configured to be electrically connected to the scan signal line Ga to receive the scan signal;
  • the first pole of the storage capacitor C is connected to the first power supply terminal VDD (For example, the second power line 500) is electrically connected, and the second electrode of the capacitor C is electrically connected to the gate of the driving transistor T1, and is configured to store a data signal.
  • the first electrode of the threshold compensation transistor T3 is electrically connected to the second electrode of the driving transistor T1
  • the second electrode of the threshold compensation transistor T3 is electrically connected to the gate of the driving transistor T1
  • the gate of the threshold compensation transistor T3 is configured to
  • the scan signal line Ga is electrically connected to receive the compensation control signal
  • the first electrode of the first reset transistor T6 is configured to be electrically connected to the reset power terminal Vinit to receive the reset signal
  • the second electrode of the first reset transistor T6 is connected to the drive transistor T1.
  • the gate is electrically connected, the gate of the first reset transistor T6 is configured to be electrically connected to the reset control signal line Rst to receive the reset control signal; the first pole of the second reset transistor T7 is configured to be electrically connected to the reset power terminal Vinit to Receiving the reset signal, the second electrode of the second reset transistor T7 is electrically connected to the first electrode of the first color organic light emitting element 3100, and the gate of the second reset transistor T7 is configured to be electrically connected to the reset control signal line Rst to receive the reset Control signal; the first electrode of the first light-emitting control transistor T4 is electrically connected to the first power supply terminal VDD, the second electrode of the first light-emitting control transistor T4 is electrically connected to the first electrode of the driving transistor T1, and the first electrode of the first light-emitting control transistor T4 The gate is configured to be electrically connected to the light emission control signal line EM to receive the light emission control signal; the first electrode of the second light emission control transistor T5 is electrically connected to the second electrode of the driving transistor
  • the transistors used in the embodiments of the present disclosure may be thin film transistors or field effect transistors or other switching devices with the same characteristics.
  • the thin film transistors may include oxide semiconductor thin film transistors, amorphous silicon thin film transistors, or polysilicon thin film transistors. .
  • the source and drain of the transistor can be symmetrical in structure, so the source and drain can be indistinguishable in physical structure.
  • one pole is directly described as the first pole and the other pole is the second pole. Therefore, all or part of the transistors in the embodiments of the present disclosure have the first pole and the second pole.
  • the first pole and the second pole are interchangeable as needed.
  • the pixel circuit of the sub-pixel can be a structure including other numbers of transistors in addition to the 7T1C (that is, seven transistors and one capacitor) structure shown in FIG. 6A.
  • a 7T2C structure, a 6T1C structure, a 6T2C structure, or a 9T2C structure which is not limited in the embodiment of the present disclosure.
  • FIGS. 6B-6E are schematic diagrams of various layers of a pixel circuit provided by some embodiments of the present disclosure. The positional relationship of each circuit in the pixel circuit on the backplane will be described below with reference to FIGS. 6B-6E.
  • the example shown in FIGS. 6B-6E takes the pixel circuit 31 adjacent to four sub-pixels as an example, and the positions of the transistors of the pixel circuit included in one sub-pixel are illustrated.
  • the components included in the pixel circuit in other sub-pixels are similar to the The positions of the transistors included in the sub-pixels are approximately the same. As shown in FIG.
  • the pixel circuit 31 of the sub-pixel includes a driving transistor T1, a data writing transistor T2, a threshold compensation transistor T3, a first light emission control transistor T4, a second light emission control transistor T5, and a first light emission control transistor T1 shown in FIG. 6A.
  • FIG. 6B shows the active semiconductor layer 031 of the pixel circuit in the display substrate.
  • the active semiconductor layer 031 can be formed by patterning a semiconductor material.
  • the active semiconductor layer 031 can be used to make the aforementioned driving transistor T1, data writing transistor T2, threshold compensation transistor T3, first light emission control transistor T4, second light emission control transistor T5, first reset transistor T6, and second reset transistor T7 The active layer.
  • the active semiconductor layer 031 includes the active layer pattern (channel region) and doped region pattern (source and drain doped region) of each transistor of each sub-pixel, and the active layer pattern and doped region of each transistor in the same pixel circuit Miscellaneous area patterns are integrated.
  • the active layer may include an integrally formed low-temperature polysilicon layer, and the source region and the drain region may be conductive through doping or the like to achieve electrical connection of each structure. That is, the active semiconductor layer of each transistor of each sub-pixel is an overall pattern formed of p-silicon, and each transistor in the same pixel circuit includes a doped region pattern (that is, a source region and a drain region) and an active layer Pattern, the active layers of different transistors are separated by doped structures.
  • the active semiconductor layer 031 can be made of amorphous silicon, polysilicon, oxide semiconductor materials, or the like. It should be noted that the aforementioned source region and drain region may be regions doped with n-type impurities or p-type impurities.
  • the active semiconductor layers in the pixel circuits of the sub-pixels of different colors arranged in the Y direction have no connection relationship and are disconnected from each other.
  • the active semiconductor layers in the pixel circuits of the sub-pixels arranged in the X direction may be integrally provided, or may be disconnected from each other.
  • 6B-6E also show the scanning signal line Ga, the reset control signal line Rst, the reset power line Init of the reset power terminal Vinit, the light emission control signal line EM, and the data line electrically connected to the pixel circuit 31 of each color sub-pixel. 600.
  • the first power line 200 and the second power line 500 are electrically connected to each other.
  • the gate metal layer of the pixel circuit may include a first conductive layer and a second conductive layer.
  • a first insulating layer (the first insulating layer 160 shown in FIG. 3) is formed on the above-mentioned active semiconductor layer 031 to insulate the above-mentioned active semiconductor layer 031 from the gate metal layer formed subsequently.
  • 6B shows the first conductive layer 032 included in the display substrate. The first conductive layer 032 is disposed on the side of the first insulating layer 160 away from the active semiconductor layer 031 so as to be insulated from the active semiconductor layer 031.
  • the first conductive layer 032 may include the second electrode CC2 of the capacitor C2, the scan signal line Ga, the reset control signal line Rst, the light emission control signal line EM, and the driving transistor T1, the data writing transistor T2, the threshold compensation transistor T3, the first light emission The gates of the control transistor T4, the second light emission control transistor T5, the first reset transistor T6, and the second reset transistor T7.
  • the gate of the data writing transistor T2 may be the part where the scan signal line Ga overlaps the active semiconductor layer 031;
  • the gate of the first light emission control transistor T4 may be the light emission control signal line EM and The first part where the active semiconductor layer 031 overlaps
  • the gate of the second light emission control transistor T5 may be the second part where the light emission control signal line EM overlaps the active semiconductor layer 031;
  • the gate of the first reset transistor T6 may be The first part where the reset control signal line Rst overlaps the active semiconductor layer 031, the gate of the second reset transistor T7 may be the second part where the reset control signal line Rst overlaps the active semiconductor layer 031;
  • the threshold compensation transistor T3 may It is a thin film transistor with a double-gate structure.
  • the first gate of the threshold compensation transistor T3 may be the part where the scan signal line Ga overlaps the active semiconductor layer 031, and the second gate of the threshold compensation transistor T3 may be the slave scan signal A portion where the protruding structure P where the line Ga protrudes and the active semiconductor layer 031 overlap.
  • the gate of the driving transistor T1 may be the second electrode CC2 of the capacitor C.
  • each dashed rectangular frame in FIG. 6B shows each part where the first conductive layer 032 and the active semiconductor layer 031 overlap.
  • the active semiconductor layers on both sides of each channel region are conductive through processes such as ion doping to form the first electrode and the second electrode of each transistor.
  • the scan signal line Ga, the reset control signal line Rst, and the light emission control signal line EM all extend in the second direction, and the scan signal line Ga, the reset control signal line Rst, and the light emission control signal line EM extend along the first direction. Arranged in one direction.
  • the scanning signal line Ga is located between the reset control signal line Rst and the light emission control signal line EM.
  • the second electrode CC2 of the capacitor C (that is, the gate of the driving transistor T1) is located between the scan signal line Ga and the light emission control signal line EM.
  • the protruding structure P protruding from the scanning signal line Ga is located on the side of the scanning signal line Ga away from the light emission control signal line EM.
  • the gate of the data writing transistor T2, the gate of the threshold compensation transistor T3, and the gate of the first reset transistor T6 are all located on the first side of the gate of the driving transistor T1.
  • the gate of the first light emission control transistor T4, the gate of the second light emission control transistor T5, and the gate of the second reset transistor T7 are all located on the second side of the gate of the driving transistor T1.
  • the first side and the second side of the gate of the driving transistor T1 of the pixel circuit of the sub-pixel are opposite sides of the gate of the driving transistor T1 in the first direction.
  • the gate of the data writing transistor T2 and the gate of the first light emission control transistor T4 are both located on the third side of the gate of the driving transistor T1.
  • the first gate of the threshold compensation transistor T3, the gate of the second light emission control transistor T5, and the gate of the second reset transistor T7 are all located on the fourth side of the gate of the driving transistor T1.
  • the third side and the fourth side of the gate of the driving transistor T1 of the pixel circuit of the sub-pixel are opposite sides of the gate of the driving transistor T1 in the second direction.
  • a second insulating layer (the second insulating layer 150 shown in FIG. 3) is formed on the above-mentioned first conductive layer 032 for combining the above-mentioned first conductive layer 032 with the second conductive layer 033 formed subsequently.
  • insulation. 6C shows the second conductive layer 033 of the pixel circuit.
  • the second conductive layer 033 includes the first electrode CC1 of the capacitor C, the reset power line Init, and the light shielding portion S.
  • the first pole CC1 of the capacitor C and the second pole CC2 of the capacitor C at least partially overlap to form the capacitor C.
  • the active semiconductor layer between the two channels of the dual-gate threshold compensation transistor T3 is in a floating state when the threshold compensation transistor T3 is turned off, and is susceptible to jumps due to the influence of the surrounding line voltage. Therefore, the leakage current of the threshold compensation transistor T3 will be affected, and the luminous brightness will be affected.
  • the light shielding part S and the active semiconductor layer between the two channels of the threshold compensation transistor T3 are designed to form a capacitance, and the light shielding part S can be connected to the second channel.
  • a power line 200 obtains a constant voltage, so the voltage of the active semiconductor layer in a floating state can be kept stable.
  • a third insulating layer (the third insulating layer 140 shown in FIG. 3) is formed on the above-mentioned second conductive layer 033 for combining the above-mentioned second conductive layer 033 with the third conductive layer 034 formed subsequently. insulation.
  • FIG. 6E shows the third conductive layer 034 of the pixel circuit.
  • the third conductive layer 034 includes a data line 600 and a second power line 500. The above-mentioned data line 600 and the second power line 500 both extend along the first direction.
  • the third conductive layer 034 further includes a first connection portion 341, a second connection portion 342, and a third connection portion 510.
  • 6D and 6E also show exemplary positions of a plurality of via holes.
  • the third conductive layer 034 passes through the plurality of via holes shown and a plurality of film layers located between the third conductive layer 034 and the base substrate. connect.
  • the data line 600 is electrically connected to the second electrode of the data writing transistor T2 through a via 381 penetrating the first insulating layer 160, the second insulating layer 150, and the third insulating layer 140.
  • the second power line 500 is electrically connected to the first electrode of the first light-emitting control transistor T4 through a via 382 penetrating the first insulating layer 160, the second insulating layer 150, and the third insulating layer 140.
  • the second power line 500 and the data line 600 are alternately arranged along the second direction.
  • the second power line 500 is electrically connected to the first electrode CC1 of the storage capacitor through a via 3832 penetrating the third insulating layer 140.
  • the second power line 500 is electrically connected to the light shielding portion S through a via 3833 penetrating the second insulating layer 150 to provide the light shielding portion S with a constant voltage.
  • first connection portion 341 is electrically connected to the second electrode of the threshold compensation transistor T3 through a via 384 penetrating through the first insulating layer 160, the second insulating layer 150 and the third insulating layer 140, and the other of the first connection portion 341 One end is electrically connected to the gate of the driving transistor T1 (that is, the second electrode CC2 of the capacitor C) through a via 385 penetrating through the second insulating layer 150 and the third insulating layer 140.
  • One end of the second connecting portion 342 is electrically connected to the reset power line Init through a via 386 in the third insulating layer 140, and the other end of the second connecting portion 342 is electrically connected to the reset power line Init through the first insulating layer 160, the second insulating layer 150, and the first insulating layer.
  • the via 387 in the three insulating layer 140 is electrically connected to the first electrode of the second reset transistor T7.
  • the third connection portion 5 is electrically connected to the second electrode of the second light-emitting control transistor T5 through a via 352 penetrating the first insulating layer 160, the second insulating layer 150, and the third insulating layer 140.
  • a fourth insulating layer (the fourth insulating layer 101 shown in FIG. 3) is formed on the above-mentioned third conductive layer 034 for forming the third conductive layer 034 and subsequent formation to obtain the fourth conductive layer 035 (FIG. 2 Shown) insulated.
  • the fourth insulating layer 101 includes a via 351, and the first sub power line 210 included in the fourth conductive layer 035 is electrically connected to the second power line 500 through the via 351.
  • FIG. 6E also shows a schematic diagram of the positional relationship between the effective light-emitting area of each color sub-pixel and the pixel circuit shown in FIG. 2.
  • the film layer farthest from the base substrate shown in FIG. 6E is the film layer where the second power line is located
  • FIG. 2 shows the film layer where the first power line is located and each color
  • FIG. 3 shows the organic light-emitting element, the first power line, and a part of the insulating layer of the first color sub-pixel in the structure shown in FIG.
  • FIG. 4 is the organic light-emitting element of the first color sub-pixel in the structure shown in FIG. 2, the first power line, part of the insulating layer, and the second power supply in the structure shown in FIG. 6E
  • the display substrate further includes a fourth connecting portion 230 provided on the same layer as the first power line 200.
  • the material of the fourth connection part 230 is the same as the material of the first power cord 200.
  • the fourth connection part 230 and the first power line 200 may be formed by the same patterning process.
  • the flat layer 102 is provided on the side of the fourth conductive layer 035 away from the third conductive layer 034, and the second electrode of the organic light-emitting element of each sub-pixel can be provided on the side of the flat layer 102 away from the base substrate 100, and the organic
  • the second electrode of the light-emitting element is electrically connected to the fourth connection portion 230 through the via hole in the flat layer 102, and the fourth connection portion 230 is electrically connected to the third connection portion 510 through the via hole in the fourth insulating layer 101, thereby realizing organic
  • the second electrode of the light-emitting element is electrically connected to the second electrode of the second light-emitting control transistor T5.
  • a passivation layer may also be provided between the flat layer and the fourth conductive layer.
  • the electrical connection of the first power line and the second power line can reduce the voltage drop of the second power line, thereby improving the image uniformity of the display device.
  • FIG. 7 is a schematic diagram of a partial planar structure of a display substrate provided by another example of an embodiment of the present disclosure.
  • the positional relationship between the first color sub-pixel 310 and the first sub-power supply line 210 in the display substrate provided by the embodiment of the present disclosure may be the same as that of the first color sub-pixel 310 and the first sub-power supply line shown in FIG.
  • the positional relationship of the line 210 is the same.
  • the plurality of sub-pixels included in the display substrate provided in this example further includes a second-color sub-pixel 320, and the second-color sub-pixel 320 includes a second effective light-emitting area 321.
  • the second color sub-pixel 320 includes a first electrode, an organic light-emitting layer, and a second electrode on the side of the organic light-emitting layer facing the base substrate 100 that are sequentially stacked.
  • the first electrode, the organic light-emitting layer, and the second electrode are in contact with each other.
  • the part can drive the organic light-emitting layer to emit light.
  • the second electrode of the second color sub-pixel may be disposed under the pixel defining layer, and the pixel defining layer includes an opening for defining the pixel, and the opening exposes a part of the second electrode.
  • both sides of the organic light-emitting layer are in contact with the first electrode and the second electrode, respectively, so that the contact part of the organic light-emitting layer with the first electrode and the second electrode is the effective part of the second color sub-pixel that can emit light, That is, the second effective light-emitting area 321.
  • At least one first sub-power line 210 included in the first power line 200 includes at least one second break 212, and the second effective light-emitting area 321 is located at the second break 212 so that the first sub-power line 210
  • the second effective light-emitting area 321 is not penetrated in the first direction.
  • “the second effective light-emitting area is located at the second fracture” and "the first sub-power line does not penetrate the second effective light-emitting area along the first direction” both refer to the positional relationship of the above features on the plane.
  • the second effective light-emitting area is located at the second break, and the first sub power line does not penetrate the second effective light-emitting area along the first direction.
  • the second effective light-emitting area may overlap with the second fracture and the first sub power line located on at least one side of the second fracture, that is, , Remove a part of the structure where the first sub power line 21 shown in FIG. 1 overlaps the effective light-emitting area of the blue organic light-emitting element 32 or the red organic light-emitting element 34 to form a second fracture.
  • the overlapping area of the power line and the second effective light-emitting area can improve the flatness of the organic light-emitting layer at the second fracture position, which is beneficial to reduce color shift.
  • the second effective light-emitting area 321 and the first sub power line 210 do not substantially overlap.
  • the second effective light-emitting area 321 overlaps with the center line of the first sub-power line 210 extending in the first direction, but the overlapping position is provided with a second break 212, so the second effective light-emitting area 321 and the first sub-power source
  • the lines 210 basically do not overlap, which can improve the flatness of the organic light-emitting layer and other film layers disposed in the second effective light-emitting region 321, so as to prevent the color shift of the second color sub-pixel 320 during the display process.
  • the embodiment of the present disclosure completely removes the overlapping position of the first sub-power supply line and the second effective display area.
  • the second effective light-emitting area and the first sub-power supply line do not substantially overlap, which can prevent the color shift of the second color sub-pixels during the display process.
  • the shape of the second effective light-emitting area 321 may be a rectangle, and the extension direction of any side of the rectangle intersects the first direction.
  • the second effective light-emitting area 321 includes two third vertices opposite to each other and two fourth vertices opposite to each other.
  • the orthographic projections of the two third vertices on the plane where the first sub power line 210 is located are located on the first sub power line.
  • the orthographic projections of the two fourth vertices on the plane where the first sub-power line 210 is located are on the same side of the first sub-power line 210.
  • the shape of the second effective light-emitting area may be a rounded figure, such as a rounded rectangle. That is, the corners of the second effective light emitting area are rounded.
  • the corners of the opening may be rounded, and the second effective light-emitting area may be rounded.
  • the above-mentioned "vertex" may refer to a vertex of the four vertices of a standard rectangle with an included angle of 90°, or may refer to a point located on the four rounded corners of a rounded rectangle, and each rounded corner has a vertex.
  • the second effective light-emitting area 321 has a certain distance from the first sub power line 210 located on one side of it and next to it, and is located in the second direction.
  • the first sub-power line 210 on the other side of the two effective light-emitting areas 321 and adjacent to it is provided with a second break 212. Therefore, the second effective light-emitting area 321 does not cross the first sub-power line 210 located on both sides thereof. Stacked.
  • the above-mentioned first sub-power line 210 adjacent to the second effective light-emitting area 321 means that there is no other first sub-power line 210 between the first sub-power line 210 and the second effective light-emitting area 321.
  • the maximum size of the second effective light-emitting area 321 along the second direction may be greater than the distance between two adjacent first sub power lines 210.
  • One is provided with a second cutout 212, so that the second effective light-emitting area 321 is located at the second cutout 212, which can prevent the second effective light-emitting area 321 from overlapping the first sub power line 210.
  • the embodiment of the present disclosure does not specifically limit the maximum size of the second effective light-emitting area 321 along the second direction.
  • the maximum size of the second effective light-emitting area 321 along the second direction may be less than or equal to two adjacent first subunits. The distance between power lines 210.
  • the orthographic projection of the second effective light-emitting area 321 on the base substrate 100 and the orthographic projection of the second sub-power line 220 on the base substrate 100 also do not overlap.
  • the maximum dimension of the second effective light-emitting area 321 along the first direction is smaller than the distance between the two second sub power lines 220 adjacent to each other on both sides, so that the second effective light-emitting area 321 and the second sub power line 220 The power cord 220 does not overlap.
  • the orthographic projection of the second effective light-emitting area 321 of the second color sub-pixel 320 on the base substrate 100 does not overlap with the first power line 200 to ensure the second effective
  • the flatness of the light-emitting layer and other film layers in the light-emitting area 321 prevents the color shift of the second color sub-pixels during the display process.
  • one of the first color sub-pixel 310 and the second color sub-pixel 320 is a blue sub-pixel, and the other is a red sub-pixel.
  • the first color sub-pixel 310 may be a red sub-pixel
  • the second color sub-pixel 320 may be a blue sub-pixel
  • the area of the first effective light-emitting area 311 of the first color sub-pixel 310 is smaller than that of the second color sub-pixel 320
  • the area of the second effective light-emitting area 321 is to prolong the service life of the display substrate.
  • the pixel circuit structure included in the second color sub-pixel provided by the embodiment of the present disclosure is the same as the pixel circuit structure included in the first color sub-pixel, and details are not described herein again.
  • FIG. 8 is a schematic diagram of a partial plane structure of a display substrate provided by another example of an embodiment of the present disclosure.
  • the positional relationship between the first color sub-pixel 310 and the first sub-power supply line 210 and the positional relationship between the second color sub-pixel 320 and the first sub-power supply line 210 in this example may be the same as the example shown in FIG. 2 , It can also be the same as the example shown in FIG. 7, and this example does not limit this.
  • This example schematically shows that the positional relationship between the second color sub-pixel 320 and the first sub power line 210 may be the same as the example shown in FIG. 7. As shown in FIG.
  • the plurality of sub-pixels further include a third-color sub-pixel 330, and the third-color sub-pixel 330 includes a third effective light-emitting area 331.
  • the opening included in the pixel defining layer may be used to define the third effective light emitting area 331.
  • At least one first sub power line 210 includes a third break 213, and the third effective light-emitting area 331 is located at the third break 213 so that the first sub power line 210 does not pass through the third effective in the first direction.
  • Light emitting area 331 The "third effective light-emitting area located at the third fracture” and “the first sub-power line does not penetrate the third effective light-emitting area along the first direction" described in the embodiments of the present disclosure both refer to the positional relationship of the above features on the plane.
  • the third effective light-emitting area is located at the third break, and the first sub power line does not penetrate the third effective light-emitting area along the first direction.
  • the third effective light-emitting area may overlap with the third fracture and the first sub power line located on at least one side of the third fracture, that is, , Remove a part of the structure where the first sub-power line 21 and the effective light-emitting area of the green organic light-emitting element 33 shown in FIG.
  • the overlapped area can improve the flatness of the organic light-emitting layer at the third fracture position, which is beneficial to reduce the color shift.
  • the third effective light-emitting area and the first sub power line 210 do not substantially overlap.
  • the third effective light-emitting area 331 overlaps with the center line of the first sub-power line 210 extending in the first direction, but a third break 213 is provided at the overlapping position, so the third effective light-emitting area 331 and the first sub-power source
  • the lines 210 basically do not overlap, which can improve the flatness of the organic light-emitting layer and other film layers disposed in the third effective light-emitting region 331, thereby preventing the color shift of the third color sub-pixel 330 during the display process.
  • the embodiment of the present disclosure removes all the overlapping positions of the first sub-power supply line and the third effective display area.
  • the third effective light-emitting area does not overlap with the first sub-power line, which can prevent the color shift of the third color sub-pixels during the display process.
  • the orthographic projection of the third effective light-emitting area 331 on the base substrate 100 and the orthographic projection of the second sub-power line 220 on the base substrate 100 also do not overlap.
  • the maximum size of the third effective light-emitting area 331 along the first direction is smaller than the distance between the two second sub power lines 220 adjacent to each other on both sides of the third effective light-emitting area 331 so that the third effective light-emitting area 331 and the second sub power line 220 The power cord 220 does not overlap.
  • the orthographic projection of the third effective light-emitting area 331 of the third color sub-pixel 330 on the base substrate 100 does not overlap with the first power line 200 to ensure the third effective
  • the flatness of the organic light-emitting layer and other film layers in the light-emitting area 331 prevents the color shift of the third color sub-pixels during the display process.
  • one of the first color sub-pixel 310 and the second color sub-pixel 320 is a blue sub-pixel, the other is a red sub-pixel, and the third-color sub-pixel 330 is a green sub-pixel.
  • the area of the first effective light-emitting area 311 of each first-color sub-pixel 310 and the area of the second effective light-emitting area 321 of each second-color sub-pixel 320 are both larger than the third effective light-emitting area of each third-color sub-pixel 330
  • the area of the area 331 is to increase the life span of the display device.
  • the pixel circuit structure included in the third color sub-pixel provided by the embodiment of the present disclosure is the same as the pixel circuit structure included in the first color sub-pixel, which will not be repeated here.
  • FIG. 9 is a schematic diagram of a partial structure of the pixel arrangement in the display substrate shown in FIG. 8.
  • the multiple sub-pixels are divided into multiple repeating units 110, and each repeating unit includes one first-color sub-pixel 310, one second-color sub-pixel 320, and two third-color sub-pixels 330.
  • the first color sub-pixel 310 and the second color sub-pixel 320 are arranged along a first direction (X direction), and the two third color sub-pixels 330 are arranged along a second direction (Y direction) intersecting the first direction.
  • a plurality of repeating units 110 are arranged along the second direction to form a plurality of repeating unit groups 1100, the plurality of repeating unit groups 1100 are arranged along the first direction, and adjacent repeating unit groups 1100 in the plurality of repeating unit groups 1100 are along the second direction Stagger each other.
  • the second power line 200 in the second The sub-power line 220 is arranged in a curved shape, so that the effective light-emitting area of each color sub-pixel and the second sub-power line 220 do not overlap.
  • the first color sub-pixel 310 and the second color sub-pixel 320 are alternately arranged, and the plurality of third-color sub-pixels 330 are arranged along the first direction.
  • the plurality of first sub-power lines 210 include first sub-power lines 210 located in odd-numbered columns and first sub-power lines 210 located in even-numbered columns.
  • the first sub power lines 210 located in the odd-numbered columns include a first break 211 and a second break 212, and the first break 211 and the second break 212 are alternately arranged along the first direction.
  • the first sub power line 210 located in the even-numbered column only includes the third break 213.
  • the embodiments of the present disclosure are not limited to this, and it is also possible that the first sub power lines in the odd-numbered columns only include the third break, and the first sub-power lines in the even-numbered columns include the first break and the second break.
  • the first color sub-pixels 310 and the second color sub-pixels 320 are alternately arranged. Therefore, the first sub-pixels 310 and 320 are located on the first sub-power supply lines 210 in adjacent odd-numbered columns.
  • the one fracture 211 and the second fracture 212 are alternately arranged along the second direction.
  • a plurality of third-color sub-pixels 330 are arranged along the second direction, and therefore, the third breaks 213 on the first sub power lines 210 in adjacent even-numbered columns are arranged along the second direction. .
  • each color sub-pixel can be arranged in other pixel arrangements such as real RGB pixel arrangement, diamond pixel arrangement, etc., as long as the first power line
  • the first sub-power supply line in does not pass through the effective light-emitting area of each color sub-pixel along the first direction.
  • the embodiment of the present disclosure can ensure the flatness of the light-emitting layer and other film layers of each color sub-pixel by removing part of the first power line on the side of the effective light-emitting area of each color sub-pixel facing the base substrate, thereby preventing the color sub-pixel from being colored. Partial.
  • FIG. 10A is a schematic partial plan view of a display substrate according to another example of an embodiment of the present disclosure
  • FIG. 11 is a cross-sectional view taken along line CC in the display substrate shown in FIG. 10A
  • FIG. The cross-sectional view taken along the line DD in the display substrate shown in 10A. 11 and 12 omit the film layer between the second power line and the base substrate.
  • the positional relationship between the first color sub-pixel 310 and the first sub-power supply line 210 and the positional relationship between the second color sub-pixel 320 and the first sub-power supply line 210 in this example may be the same as the example shown in FIG. 2 , It can also be the same as the example shown in FIG. 7, and this example does not limit this.
  • This example schematically shows that the positional relationship between the second color sub-pixel 320 and the first sub-power supply line 210 may be the same as the example shown in FIG. 7, and the arrangement of the pixels in this example is the same as that of the pixels shown in FIG. The arrangement is the same.
  • the third color sub-pixel 330 includes a first electrode 334, an organic light-emitting layer 332, and a second electrode 334 on the side of the organic light-emitting layer 332 facing the base substrate 100 that are sequentially stacked.
  • the portion where the electrode 333, the first electrode 334, the organic light-emitting layer 332, and the second electrode 333 are in contact with each other can drive the organic light-emitting layer 332 to emit light.
  • the second electrode 333 is electrically connected to the fourth connection portion 230, and the orthographic projection of the third effective light-emitting area 331 on the base substrate 100 overlaps with the orthographic projection of the fourth connection portion 230 on the base substrate 100.
  • the shapes and areas of the third effective light-emitting regions 331 of the two third-color sub-pixels 330 in each repeating unit 110 are the same.
  • the first connection line 111 extends along the first direction.
  • the third effective light-emitting area 331 of the two third color sub-pixels 330 is relative to the first connection line 111. Symmetrical distribution.
  • the first-color sub-pixel and the second-color sub-pixel are blue and red sub-pixels, respectively, and the third-color sub-pixel is a green sub-pixel.
  • the area of the effective light-emitting area of each first-color sub-pixel and each second-color sub-pixel is larger than the area of the effective light-emitting area of each third-color sub-pixel.
  • the overlapping parts of the organic light-emitting layer and the connection part in the effective light-emitting area of the first color sub-pixel and the second color sub-pixel may also have unevenness, it will not cause too obvious color shift.
  • the area of the effective light-emitting area of the third color sub-pixel is smaller, and the area of the effective light-emitting area overlapped with the connection portion accounts for a larger proportion of the area of the effective light-emitting area. Therefore, the unevenness of the overlapping portion of the organic light-emitting layer and the connecting portion in the effective light-emitting area of the third-color sub-pixel will cause the third-color sub-pixel to easily produce obvious color shift.
  • the two third-color sub-pixels are symmetrically distributed, but the overlapping portion of the connecting portion and the effective light-emitting area of the two third-color sub-pixels is not symmetrically distributed with respect to the first connecting line. Therefore, when the two third-color sub-pixels in each repeating unit emit light at the same time, the light-emitting effects of the two third-color sub-pixels are different due to the different relative positional relationship between the connecting portion and the effective light-emitting area of each third-color sub-pixel , So that the image display effect.
  • the display substrate further includes a stripe portion 232, and the stripe portion 232 extends along It extends in the first direction, and is arranged on the same layer as the first power line 200 and made of the same material.
  • the third effective light emitting area 331 overlaps the strip portion 232 and the fourth connecting portion 230, and the strip portion 232 is located at the second sub power line closest to the third effective light emitting area 331
  • the strip portion 232 and the fourth connecting portion 230 are located on the same side of a straight line passing through the center of the third effective light-emitting area 331 and extending along the first direction.
  • the above-mentioned second sub-power line 220 closest to the third effective light-emitting area refers to the second sub-power line 220 located on both sides of the third effective light-emitting area 331 along the first direction with the shortest distance from the geometric center of the third effective light-emitting area The second sub power line 220.
  • the strip portion 232 and the fourth connecting portion 230 may be an integral structure.
  • a spacer 240 is further provided on the side of the second electrode 333 of the third color sub-pixel 330 facing the base substrate 100, and the third effective light-emitting area 331 of the third color sub-pixel 330 is on the base substrate 100.
  • the strip portion 232 and the fourth connecting portion 230 are located on one side of a straight line passing through the center of the third effective light-emitting area 331 and extending in the first direction, and the spacer 240 is located on the other side of the straight line.
  • the spacer and the strip portion are provided, and the spacer and the strip portion are respectively located on opposite sides of the third effective light-emitting area along the second direction, so that the third effective light-emitting area can be increased in the second direction.
  • the spacer and the strip portion are provided, and the spacer and the strip portion are respectively located on opposite sides of the third effective light-emitting area along the second direction, so that the third effective light-emitting area can be increased in the second direction.
  • each third effective light-emitting area 331 and the spacer 240 is the first overlapping portion 2341
  • the third effective light-emitting area 331 and the fourth connecting portion 230 have a strip shape.
  • the overlapping portion of the portion 232 is the second overlapping portion 2342
  • the area ratio of the first overlapping portion 2341 and the second overlapping portion 2342 is approximately 0.9-1.1.
  • the areas of the first overlapping portion 2341 and the second overlapping portion 2342 are approximately the same, thereby further increasing the symmetry of the third effective light-emitting area in the second direction.
  • the third effective light-emitting areas 331 of the two third-color sub-pixels 330 are symmetrically distributed with respect to the first line, and along the direction perpendicular to the base substrate 100, the spacers
  • the part where the fourth connecting portion 230 and the strip-shaped portion 232 overlap with the third effective light-emitting area 331 of a third color sub-pixel is the third overlapping portion 2343, the spacer 240, the fourth connecting portion 230, and the strip
  • the portion where the portion 232 overlaps with the third effective light-emitting area 331 of the other third color sub-pixel is the fourth overlap portion 2344.
  • the third overlap portion 2343 and the fourth overlap portion 2344 are approximately symmetrical with respect to the first connection line. distributed. Therefore, when the two third-color sub-pixels in each repeating unit emit light at the same time, the light-emitting effects of the two third-color sub-pixels are also basically the same.
  • the spacer 240 may be the overlapping portion of the first sub power line 210 and the third effective light-emitting area 331 in a direction perpendicular to the base substrate 100 to save manufacturing process.
  • the position of the strip portion 232 is set according to the position of the first sub-power line 210 and the overlapping portion of the fourth connecting portion 230 and the third effective light-emitting area 331.
  • the first sub-power supply line when the spacer is a part of the first sub-power supply line, the first sub-power supply line includes a first sub-power supply line with a break and a first sub-power supply line without a break, a first sub-power supply line with a break and a first sub-power supply line without a break.
  • the first sub power lines are alternately arranged along the Y direction.
  • the first sub-power supply line with a break is provided with a first break 211 and a second break 212, and the first break 211 and the second break 212 are arranged in an overlapping manner along the X direction.
  • the pixel circuit of each sub-pixel includes one fourth connecting portion 230, and the plurality of fourth connecting portions 230 included in the plurality of sub-pixels are arranged in an array along the first direction and the second direction.
  • the plurality of fourth connecting portions 230 are arranged at equal intervals along the first direction, and the plurality of fourth connecting portions 230 are also arranged at equal intervals along the second direction.
  • the overlapping parts of the first sub-power supply line, the strip-shaped portion, and the fourth connecting portion and the two third effective light-emitting regions may only be approximately symmetrically distributed. Therefore, the symmetrical distribution mentioned in the embodiments of the present disclosure all refer to an approximately symmetrical distribution. For example, “approximately” can mean within one or more standard deviations, or within 10% or 5% of the stated value.
  • a spacer 240 overlapping one third effective light-emitting area 331, and a fourth connecting portion 230 and a strip portion 232 overlapping another third effective light-emitting area 331 It is symmetrically distributed with respect to the first line.
  • the position of the strip portion is set according to the positional relationship between the first sub-power supply line and the fourth connection portion and the third effective light-emitting area, so that when two third-color sub-pixels in each repeating unit emit light simultaneously Have roughly the same luminous effect to avoid affecting the final display effect.
  • the first overlapping portions 2341 and the second overlapping portions 2342 are distributed symmetrically in the center.
  • the embodiments of the present disclosure ensure that the light-emitting layers in the effective light-emitting area of the two third-color sub-pixels in the same repeating unit are symmetrically distributed, while also ensuring that the light-emitting layer in the effective light-emitting area of each third-color sub-pixel It is symmetrical to the center to ensure the uniformity of the light emission of each third color sub-pixel and improve the color cast and other defects.
  • Figures 11-12 schematically show that the first sub-power line (i.e., spacer) at the position overlapping with the third effective light-emitting area will cause the second electrode, organic light-emitting layer and other film layers in the third effective light-emitting area to appear
  • the first sub-power line i.e., spacer
  • bumps can appear in another position of the organic light-emitting layer in the third effective light-emitting area, and the two bumps are set to be approximately equal in area, for example Or, for example, after the center is symmetrical, the uniformity of the light emission of the third color sub-pixels can be ensured.
  • the protrusions shown in FIGS. 11-12 are only schematic, and the edges of the protrusions in the actual product may be smooth curves instead of the right-angled fold lines as shown.
  • FIG. 10B is a schematic diagram of a partial plane structure of a display substrate provided according to another example of an embodiment of the present disclosure.
  • the difference from the example shown in FIG. 10A is that the strip portion 232 in the example shown in FIG.
  • An electrical connection occurs between the 232 and the fourth connecting portion 230, which affects the normal display of the third color sub-pixels.
  • the first sub power line 210 overlaps the third effective light-emitting area 331, and the strip portion 232 and the fourth connecting portion 230 are located at the center of the third effective light-emitting area 331 and along the first On one side of the straight line extending in the direction, the first sub power line 210 is located on the other side of the above-mentioned straight line, which can increase the symmetry of each third effective light-emitting area in the second direction and reduce the color shift.
  • the third effective light-emitting area 331 overlaps with the first sub power line 210, the fourth connection portion 230, and the strip portion 232, and each third effective light-emitting area 331 overlaps
  • the overlapping portions of the first sub power line 210, the fourth connecting portion 230, and the strip portion 232 are the fifth overlapping portion 245, the sixth overlapping portion 246, and the seventh overlapping portion 247, respectively.
  • the edge of the sixth overlapping portion 246 close to the fifth overlapping portion 245 and the edge of the seventh overlapping portion 247 close to the fifth overlapping portion 245 are located on the same straight line extending in the first direction.
  • the area of the fifth overlapping portion 245 may be approximately equal to the sum of the areas of the sixth overlapping portion 246 and the seventh overlapping portion 247, thereby reducing the color shift of each third-color sub-pixel.
  • the sixth overlapping portion 246 and the seventh overlapping portion 247 of one third color sub-pixel and the fifth overlapping portion 245 of another third color sub-pixel are substantially relative to the first line 111.
  • the symmetrical distribution can ensure that the light-emitting layers of the effective light-emitting areas of the two third-color sub-pixels in the same repeating unit are symmetrically distributed, so that when the two third-color sub-pixels in each repeating unit emit light at the same time, the two third-color sub-pixels are reduced.
  • the difference in the light-emitting effects of the three-color sub-pixels reduces the color shift.
  • the areas of the sixth overlapping portion 246 and the seventh overlapping portion 247 of one third color sub-pixel and the fifth overlapping portion 245 of another third color sub-pixel are approximately the same, which can ensure that the When the two third-color sub-pixels in each repeating unit emit light at the same time, the difference in the light-emitting effects of the two third-color sub-pixels is reduced, thereby reducing the color shift.
  • the strip portion may also be a structure independent of the fourth connecting portion or the second sub-power cord, as long as the same structure can be ensured.
  • the light-emitting layers of the effective light-emitting areas of the two third-color sub-pixels in the repeating unit are distributed symmetrically. When the two third-color sub-pixels in each repeating unit emit light at the same time, the light-emitting effect of the two third-color sub-pixels is reduced The difference can be.
  • FIG. 10C is a schematic diagram of a partial plane structure of a display substrate provided according to another example of an embodiment of the present disclosure.
  • the difference from the example shown in FIG. 10A is that the display substrate in the example shown in FIG.
  • the protruding portion 2101 and the fourth connecting portion 230 are spaced apart to prevent the protruding portion 2101 and the fourth connecting portion 230 from being electrically connected, which affects the normal display of the third color sub-pixels.
  • the orthographic projection of the third effective light-emitting area 331 on the base substrate 100 overlaps with the orthographic projections of the first sub power line main body 2102, the protrusion 2101, and the fourth connecting portion 230 on the base substrate 100, and The center of the orthographic projection of the third effective light-emitting area 331 on the base substrate 100 is located within the orthographic projection of the protrusion 2101 on the base substrate 100.
  • the orthographic projection of the straight line passing through the center of the third effective light-emitting area 331 and extending in the first direction on the base substrate 100 overlaps with the orthographic projection of the protrusion 2101 on the base substrate 100, so that each of the The symmetry of the three effective light-emitting areas in the second direction reduces color shift.
  • Another embodiment of the present disclosure provides a display device including any of the above-mentioned display substrates.
  • the first power line can be improved. The problem of poor color cast during the display of color sub-pixels.
  • the display device may be a display device such as an organic light-emitting diode display device, and any product or component with a display function, such as a television, digital camera, mobile phone, watch, tablet computer, notebook computer, navigator, etc., including the display device. Examples are not limited to this.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Electroluminescent Light Sources (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

一种显示基板以及显示装置。显示基板包括衬底基板、第一电源线以及像素限定层。第一电源线包括多条第一子电源线以及位于相邻第一子电源线之间的多条第二子电源线，第二子电源线被配置为连接相邻第一子电源线；像素限定层包括多个开口以限定多个子像素的有效发光区，多个子像素包括第一颜色子像素，第一颜色子像素包括第一有效发光区。第一子电源线包括第一断口，第一有效发光区位于第一断口处以使第一子电源线没有沿第一方向贯穿第一有效发光区。本公开实施例中通过在第一电源线设置第一断口，可以改善第一颜色子像素的发光层的平坦度，进而解决色偏不良的问题。

Description

显示基板以及显示装置 技术领域
本公开至少一个实施例涉及一种显示基板以及显示装置。
背景技术
有机发光二极管具有自发光、高效率、色彩鲜艳、轻薄省电、可卷曲以及使用温度范围宽等优点，已经逐步应用于大面积显示、照明以及车载显示等领域。为了提高有机发光二极管显示装置的均一性，可以采用两层电源线的结构，靠近有机发光二极管发光层一侧的电源线形成网格状图案，以减小电源线的压降。
发明内容
本公开的至少一实施例提供一种显示基板以及显示装置。
本公开至少一实施例提供一种显示基板，包括：衬底基板、位于所述衬底基板上的第一电源线以及位于所述第一电源线远离所述衬底基板的一侧的像素限定层。所述第一电源线包括沿第一方向延伸的多条第一子电源线以及位于每相邻的两条所述第一子电源线之间的多条第二子电源线，所述第二子电源线被配置为连接相邻的两条所述第一子电源线；所述像素限定层包括多个开口以限定多个子像素的有效发光区，所述多个子像素包括第一颜色子像素，所述第一颜色子像素包括第一有效发光区。至少一条所述第一子电源线包括至少一个第一断口，所述第一有效发光区位于所述至少一个第一断口处以使所述第一子电源线没有沿所述第一方向贯穿所述第一有效发光区。
例如，在本公开的实施例中，沿垂直于所述衬底基板的方向，所述第一有效发光区与具有所述第一断口的所述第一子电源线基本没有交叠。
例如，在本公开的实施例中，显示基板还包括：多条第二电源线，沿所述第一方向延伸，位于所述第一电源线靠近所述衬底基板的一侧。所述第二电源线与所述第一电源线通过位于所述第一电源线与所述第二电源线之间的绝缘层中的过孔连接。
例如，在本公开的实施例中，所述多个子像素还包括第二颜色子像素，所述第二颜色子像素包括第二有效发光区；至少一条所述第一子电源线包括至少一个第二断口，所述第二有效发光区位于所述至少一个第二断口处以使所述第一子电源线没有沿所述第一方向贯穿所述第二有效发光区。
例如，在本公开的实施例中，沿垂直于所述衬底基板的方向，所述第二有效发光区与具有所述第二断口的所述第一子电源线基本没有交叠。
例如，在本公开的实施例中，所述第一颜色子像素和所述第二颜色子像素之一为蓝色子像素，另一个为红色子像素。
例如，在本公开的实施例中，所述多个子像素划分为多个重复单元，各所述重复单元包括所述第一颜色子像素、所述第二颜色子像素以及两个第三颜色子像素，各所述第 三颜色子像素包括第三有效发光区，各所述重复单元中，所述第一颜色子像素和所述第二颜色子像素沿所述第一方向排列，两个所述第三颜色子像素沿与所述第一方向相交的第二方向排列，所述第一颜色子像素中心和所述第二颜色子像素中心之间的第一连线与两个所述第三颜色子像素中心之间的第二连线相交，所述多个重复单元沿所述第二方向排列以形成多个重复单元组，所述多个重复单元组沿所述第一方向排列，且所述多个重复单元组中的相邻重复单元组沿所述第二方向彼此错开。
例如，在本公开的实施例中，所述多个子像素包括第三颜色子像素，所述第三颜色子像素包括第三有效发光区；至少一条所述第一子电源线包括至少一个第三断口，所述第三有效发光区位于所述至少一个第三断口处以使所述第一子电源线没有沿所述第一方向贯穿所述第三有效发光区。
例如，在本公开的实施例中，沿垂直于所述衬底基板的方向，所述第三有效发光区与具有所述第三断口的所述第一子电源线基本没有交叠。
例如，在本公开的实施例中，显示基板还包括：连接部，与所述第一电源线同层设置且材料相同；所述第三颜色子像素包括依次层叠设置的第一电极、有机发光层以及第二电极，所述第二电极位于所述有机发光层面向所述衬底基板的一侧，所述第二电极与所述连接部电连接。
例如，在本公开的实施例中，所述的显示基板还包括条状部，沿所述第一方向延伸，与所述第一电源线同层设置且材料相同。沿垂直于所述衬底基板的方向，所述第三有效发光区与所述条状部以及所述连接部均交叠，所述条状部位于靠近所述第三有效发光区的所述第二子电源线与所述连接部之间，且所述条状部和所述连接部位于经过所述第三有效发光区的中心且沿所述第一方向延伸的直线的同一侧。
例如，在本公开的实施例中，所述连接部和所述条状部为一体结构。
例如，在本公开的实施例中，显示基板包括：垫块，沿所述第一方向延伸，与所述第一电源线同层设置且材料相同。所述第三有效发光区在所述衬底基板上的正投影与所述垫块在所述衬底基板上的正投影有交叠，所述条状部和所述连接部位于经过所述第三有效发光区的中心且沿所述第一方向延伸的直线的一侧，所述垫块位于所述直线的另一侧。
例如，在本公开的实施例中，沿垂直于所述衬底基板的方向，各所述第三有效发光区与所述垫块交叠的部分为第一交叠部，所述第三有效发光区与所述连接部和所述条状部交叠的部分为第二交叠部，所述第一交叠部与所述第二交叠部的面积比大致为0.9～1.1。
例如，在本公开的实施例中，各所述重复单元中，两个所述第三颜色子像素的第三有效发光区相对于所述第一连线对称分布，且沿垂直于所述衬底基板的方向，所述垫块、所述连接部以及所述条状部与一个所述第三颜色子像素的第三有效发光区交叠的部分为第三交叠部，所述垫块、所述连接部以及所述条状部与另一个所述第三颜色子像素的第三有效发光区交叠的部分为第四交叠部，所述第三交叠部和所述第四交叠部相对于所述第一连线大致对称分布。
例如，在本公开的实施例中，所述垫块为所述第一子电源线与所述第三有效发光区的沿垂直于所述衬底基板的方向交叠的部分。
例如，在本公开的实施例中，各所述第三颜色子像素中，所述第一交叠部和所述第二交叠部呈中心对称分布。
例如，在本公开的实施例中，所述第二子电源线和所述条状部为一体结构，且所述条状部与所述连接部间隔设置；沿垂直于所述衬底基板的方向，所述第一子电源线与所述第三有效发光区交叠，所述条状部和所述连接部位于经过所述第三有效发光区的中心且沿所述第一方向延伸的直线的一侧，所述第一子电源线位于所述直线的另一侧。
例如，在本公开的实施例中，所述第一子电源线还包括突出部，所述突出部位于所述第一子电源线主体的靠近与所述第三颜色子像素连接的所述连接部的一侧，且位于靠近所述第三有效发光区的所述第二子电源线与所述连接部之间，所述突出部与所述连接部间隔设置；所述第三有效发光区在所述衬底基板上的正投影与所述第一子电源线主体、所述突出部以及所述连接部在所述衬底基板上的正投影均有交叠，且所述第三有效发光区在所述衬底基板上的正投影的中心位于所述突出部在所述衬底基板上的正投影内。
例如，在本公开的实施例中，各所述重复单元中，所述第一有效发光区的面积大于一个所述第三有效发光区的面积，且所述第二有效发光区的面积大于一个所述第三有效发光区的面积。
例如，在本公开的实施例中，各所述子像素的有效发光区在所述衬底基板上的正投影与所述第二子电源线在所述衬底基板上的正投影均没有交叠。
例如，在本公开的实施例中，所述第一子电源线在所述衬底基板上的正投影与所述第二电源线在所述衬底基板上的正投影至少部分交叠。
本公开至少一实施例提供一种显示基板，包括：衬底基板；有源半导体层，位于所述衬底基板上；第一绝缘层，位于所述有源半导体层远离所述衬底基板的一侧；第一导电层，位于所述第一绝缘层远离所述有源半导体层的一侧；第二绝缘层，位于所述第一导电层远离所述第一绝缘层的一侧；第二导电层，位于所述第二绝缘层远离所述第一导电层的一侧；第三绝缘层，位于所述第二导电层远离所述第二绝缘层的一侧；第三导电层，位于所述第三绝缘层远离所述第二导电层的一侧；第四绝缘层，位于所述第三导电层远离所述第三绝缘层的一侧；第四导电层，位于所述第四绝缘层远离所述第三导电层的一侧，其中，所述第四导电层包括第一电源线，所述第一电源线包括沿第一方向延伸的多条第一子电源线以及位于每相邻的两条所述第一子电源线之间的多条第二子电源线，所述第二子电源线被配置为连接相邻的两条所述第一子电源线，所述第三导电层包括沿所述第一方向延伸的多条第二电源线，所述第二电源线通过所述第四绝缘层中的过孔与所述第一电源线连接；以及像素限定层，位于所述第一电源线远离所述衬底基板的一侧，所述像素限定层包括多个开口以限定多个子像素的有效发光区，所述多个子像素包括第一颜色子像素，所述第一颜色子像素包括第一有效发光区。至少一条所述第一子电源线包括至少一个第一断口，所述第一有效发光区位于所述至少一个第一断口处以使 所述第一子电源线没有沿所述第一方向贯穿所述第一有效发光区。
本公开的至少一实施例提供一种显示装置，包括上述任一种显示基板。
附图说明
为了更清楚地说明本公开实施例的技术方案，下面将对实施例的附图作简单地介绍，显而易见地，下面描述中的附图仅仅涉及本公开的一些实施例，而非对本公开的限制。
图1为一种显示基板的局部平面结构示意图；
图2为根据本公开一实施例的一示例提供的显示基板的局部平面结构示意图；
图3为沿图2所示的AA线所截的局部截面示意图；
图4为沿图2所示的BB线所截的局部截面示意图；
图5为根据本公开一实施例提供的第二电源线的局部平面结构示意图；
图6A为根据本公开一实施例提供的第一颜色子像素的像素电路的示意图；
图6B-图6E为本公开一实施例提供的一种像素电路的各层的示意图；
图7为本公开一实施例的另一示例提供的显示基板的局部平面结构示意图；
图8为本公开一实施例的另一示例提供的显示基板的局部平面结构示意图；
图9为图8所示显示基板中的像素排列的局部结构示意图；
图10A为根据本公开一实施例的另一示例提供的显示基板的局部平面结构示意图；
图10B为根据本公开一实施例的另一示例提供的显示基板的局部平面结构示意图；
图10C为根据本公开一实施例的另一示例提供的显示基板的局部平面结构示意图；
图11为沿图10A所示的显示基板中的CC线所截的截面图；以及
图12为沿图10A所示的显示基板中的DD线所截的截面图。
具体实施方式
为使本公开实施例的目的、技术方案和优点更加清楚，下面将结合本公开实施例的附图，对本公开实施例的技术方案进行清楚、完整地描述。显然，所描述的实施例是本公开的一部分实施例，而不是全部的实施例。基于所描述的本公开的实施例，本领域普通技术人员在无需创造性劳动的前提下所获得的所有其它实施例，都属于本公开保护的范围。
除非另外定义，本公开使用的技术术语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分不同的组成部分。“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后面列举的元件或者物件及其等同，而不排除其他元件或者物件。
图1为一种显示基板的局部平面结构示意图。如图1所示，该显示基板包括衬底基板10、具有网格状图案的第一电源线20以及位于第一电源线20远离衬底基板10的一侧的有机发光元件30。第一电源线20包括沿第一方向延伸的第一子电源线21，以及位于 每两条相邻的第一子电源线21之间的多条第二子电源线22，第二子电源线22被配置为将两条相邻的第一子电源线21连接起来，以使第一电源线20的形状为网格图案。显示基板还包括与第一电源线20同层设置的多个连接部23，每个连接部23被配置为连接位于其远离衬底基板10的一侧的有机发光元件30的阳极与位于其靠近衬底基板10一侧的发光控制晶体管。显示基板还包括位于第一电源线20与衬底基板10之间的第二电源线、数据线以及栅线(图中未示出)。数据线和第二电源线位于同一层，第二电源线通过发光控制晶体管与有机发光元件电连接，从而为有机发光元件提供电源信号。第二电源线的延伸方向可以与第一子电源线的延伸方向相同，例如均沿第一方向延伸。第一电源线20包括的沿第一方向延伸的第一子电源线21在衬底基板10上的正投影与第二电源线有交叠以使第一电源线20可以通过位于第一电源线20与第二电源线之间的绝缘层中的过孔实现与第二电源线的电连接。上述显示基板通过设置具有网格图案形状的第一电源线，且将第一电源线与第二电源线电连接可以降低第二电源线的压降，从而改善显示装置的均一性。
图1所示的显示基板中，第一电源线20远离衬底基板10的一侧还设置有像素限定层(未示出)，像素限定层中包括的开口用于限定各颜色有机发光元件中的有效发光区，有效发光区中设置有发光层。图1示意性地示出了各颜色的有机发光元件的发光区31。各颜色有机发光元件30可以包括蓝色有机发光元件32、绿色有机发光元件33以及红色有机发光元件34。
在研究中，本申请的发明人发现：如图1所示，各颜色有机发光元件30的有效发光区31均与第一电源线20的第一子电源线21有交叠。由此，有机发光元件30中的有效发光区内的发光层等膜层因覆盖了第一电源线20而导致发光层远离衬底基板的表面不平坦，进而会影响像素的显示效果，出现色偏等不良。也就是，有效发光区与第一子电源线交叠的部分仅位于有效发光区沿第一方向延伸的中心线的一侧，导致该有效发光区出现两侧不对称的问题，容易导致色偏。
此外，绿色有机发光元件33的有效发光区与连接部23交叠面积与绿色有效发光区的面积之比为A，红色有机发光元件34的有效发光区与连接部23交叠面积与红色有效发光区的面积之比为B，蓝色有机发光元件32的有效发光区与连接部23交叠面积与蓝色有效发光区的面积之比为C，A大于B，且A大于C。因此，除了第一子电源线对绿色有机发光元件的色偏产生的影响以外，因连接部与绿色有机发光元件的有效发光区的交叠面积占比较大，使得绿色有机发光元件的色偏现象会比另外两种颜色的有机发光元件的色偏现象更明显。
本公开的实施例提供一种显示基板以及显示装置。该显示基板包括衬底基板，位于衬底基板上的第一电源线以及位于第一电源线远离衬底基板的一侧的像素限定层。第一电源线包括沿第一方向延伸的多条第一子电源线以及位于每相邻的两条第一子电源线之间的多条第二子电源线，第二子电源线被配置为连接相邻的两条第一子电源线；像素限定层包括多个开口以限定多个子像素的有效发光区，多个子像素包括第一颜色子像素， 第一颜色子像素包括第一有效发光区。至少一条第一子电源线包括至少一个第一断口，第一有效发光区位于至少一个第一断口处以使第一子电源线没有沿第一方向贯穿第一有效发光区。本公开实施例中通过在第一电源线设置第一断口以使第一子电源线没有沿第一方向贯穿第一颜色子像素的第一有效发光区，可以改善第一颜色子像素的发光层的平坦度，进而解决色偏不良的问题。
下面结合附图对本公开实施例提供的显示基板以及显示装置进行描述。
图2为根据本公开实施例的一示例提供的显示基板的局部平面结构示意图。如图2所示，显示基板包括衬底基板100以及位于衬底基板100上的第一电源线200。第一电源线200包括沿第一方向(即X方向)延伸的多条第一子电源线210，以及位于每两条相邻的第一子电源线210之间的多条第二子电源线220，第二子电源线220被配置为将两条相邻的第一子电源线210连接起来，以使第一电源线200的形状为大致的网格图案。例如，第一子电源线210和第二子电源线220为对同一金属材料采用一个掩模在同一步图案化工艺中形成。
图3为沿图2所示的AA线所截的局部截面示意图，图4为沿图2所示的BB线所截的局部截面示意图。如图2-图4所示，在第一电源线200远离衬底基板100的一侧设置有像素限定层400，像素限定层400包括多个开口401以限定多个子像素的有效发光区。多个子像素包括第一颜色子像素310，第一颜色子像素310包括第一有效发光区311。
例如，各颜色子像素包括沿垂直于衬底基板的方向依次层叠设置的第一电极、有机发光层以及第二电极。例如，第一颜色子像素310包括依次层叠设置的第一电极314、有机发光层312以及位于有机发光层312面向衬底基板100一侧的第二电极313，第一电极314、有机发光层312以及第二电极313彼此接触的部分能够驱动有机发光层312进行发光。因此，第一电极314、有机发光层312以及第二电极313彼此接触的部分为第一颜色子像素310能够发光的有效部分，即第一有效发光区311。在本公开的实施例中，子像素的形状可以是指第一电极、有机发光层以及第二电极彼此接触的部分的形状。例如，对于每个子像素，第二电极的面积可以稍大于发光层的面积，或者也可以是发光层的面积稍大于第二电极的面积，本公开的实施例对此没有特别限定。例如，这里的发光层可以包括电致发光层本身以及位于电致发光层两侧的其他功能层，例如，空穴注入层、空穴传输层、电子注入层以及电子传输层等等。在有些实施例中，像素的形状也可以由像素限定层的开口的形状来定义。例如，对于发光二极管的第二电极可以设置在像素限定层的下方，像素限定层包括用于限定像素的开口，该开口露出第二电极的一部分。当有机发光层形成在上述像素限定层中的开口中时，有机发光层的两侧分别与第一电极和第二电极接触，从而该有机发光层与第一电极以及第二电极接触部分能够驱动有机发光层进行发光。因此，在这种情况下，像素限定层的开口定义了各颜色子像素的形状。
例如，如图2-图4所示，像素限定层400在衬底基板100上的正投影与第一电源线200在衬底基板100上的正投影有交叠，像素限定层400限定的第一有效发光区311在衬底基板100上的正投影的至少部分与最靠近第一有效发光区311的第一电源线200在衬 底基板100上的正投影没有交叠。第一有效发光区311包括沿X方向延伸的中心线，位于该中心线两侧的且沿X方向延伸的两条第一电源线200中距该中心线距离最短的第一电源线200为上述“最靠近第一有效发光区311的第一电源线200”。例如，上述“最靠近第一有效发光区311的第一电源线200”如果是一条连续的电源线，则该连续的电源线会贯穿第一有效发光区。
如图2和图3所示，第一电源线200包括的至少一条第一子电源线210包括第一断口211，即第一电源线200沿第一方向延伸的第一子电源线210是不连续的电源线。第一有效发光区311位于第一断口211处以使第一子电源线210没有沿第一方向贯穿第一有效发光区311。本公开实施例描述的“第一有效发光区位于第一断口处”以及“第一子电源线没有沿第一方向贯穿第一有效发光区”均指上述特征在平面上的位置关系。例如，在图2所示的平面图中，第一有效发光区位于第一断口处，且第一子电源线没有沿第一方向贯穿第一有效发光区。
例如，在本公开实施例的一示例中，沿垂直于衬底基板的方向，第一有效发光区可以与第一断口以及位于第一断口至少一侧的第一子电源线有交叠，即，将图1所示的第一子电源线21与蓝色有机发光元件32或者红色有机发光元件34的有效发光区交叠的部分结构中去掉一部分以形成第一断口，通过减小第一子电源线与有效发光区的交叠面积，可以提高该第一断口处的有机发光层的平坦性，有利于减少色偏。
例如，在本公开实施例的另一示例中，沿垂直于衬底基板的方向，第一有效发光区与第一子电源线基本没有交叠，即第一有效发光区311与该第一子电源线210的沿第一方向延伸的中心线有交叠，但交叠位置设置有第一断口211，所以第一有效发光区311与第一子电源线210基本没有交叠，可以提高第一有效发光区311内设置的有机发光层312等膜层的平坦性，从而防止第一颜色子像素310在显示过程中发生色偏。上述以及后续的“基本没有交叠”指有效发光区与第一子电源线交叠的面积与该有效发光区的面积比不超过5％。也就是，相对于图1所示的第一有效发光区与第一子电源线有交叠的情况，本公开实施例通过将第一子电源线与第一有效显示区交叠的位置完全去掉以形成第一断口，从而第一有效发光区与第一子电源线基本没有交叠，可以防止第一颜色子像素在显示过程中发生色偏。
例如，如图2所示，第一有效发光区311的形状可以为矩形，且矩形的任一边的延伸方向均与第一方向相交。第一有效发光区311中包括彼此相对的两个第一顶点和彼此相对的两个第二顶点，两个第一顶点在第一子电源线210所在平面上的正投影位于第一子电源线210的两侧，两个第二顶点在第一子电源线210所在平面上的正投影位于第一子电源线210的同一侧。图2所示的第一有效发光区的形状可以包括严格的由两条线段形成的尖角，但在一些实施例中，第一有效发光区的形状可以为圆角图形，例如圆角矩形。也就是，第一有效发光区的角被倒圆。例如，形成像素限定层的开口时，开口的角落处的部分则可能会形成圆角形状，从而形成的第一有效发光区形状可能为圆角形状。上述“顶点”可以指具有90°夹角的标准矩形的四个顶点中的顶点，也可以指圆角矩形中 的位于四个圆角上的点，各圆角具有一个顶点。
例如，如图2所示，沿与第一方向垂直的第二方向(Y方向)，第一有效发光区311与位于其一侧且与其紧邻的第一子电源线210具有一定距离，位于第一有效发光区311另一侧的且与其紧邻的第一子电源线210设置有第一断口211。由此，第一有效发光区311与位于其两侧的第一子电源线210均没有交叠。上述与第一有效发光区311紧邻的第一子电源线210指该第一子电源线210与第一有效发光区311之间没有其他第一子电源线210。
例如，第一有效发光区311的沿第二方向的最大尺寸可以大于相邻两条第一子电源线210之间的距离，此时，通过在相邻两条第一子电源线210的至少之一设置第一断口211，以使第一有效发光区311位于第一断口211处，可以防止第一有效发光区311与第一子电源线210有交叠。当然，本公开实施例对第一有效发光区311沿第二方向的最大尺寸不作具体限定，例如，第一有效发光区311沿第二方向的最大尺寸也可以小于或者等于相邻两条第一子电源线210之间的距离。
例如，如图2所示，第一有效发光区311在衬底基板100上的正投影与第二子电源线220在衬底基板100上的正投影也没有交叠。例如，第一有效发光区311沿第一方向的最大尺寸小于位于其两侧且彼此相邻的两条第二子电源线220之间的距离，以使第一有效发光区311与第二子电源线220没有交叠。
根据本公开实施例的一示例提供的显示基板中，第一颜色子像素310的第一有效发光区311在衬底基板100上的正投影与第一电源线200没有交叠以保证第一有效发光区311内的有机发光层312等膜层的平坦度，从而防止第一颜色子像素出现色偏。
例如，第一颜色子像素310可以为红色子像素、蓝色子像素或者绿色子像素。
例如，图5为根据本公开一实施例提供的第二电源线的局部平面结构示意图。如图2-图5所示，显示基板还包括位于第一电源线200靠近衬底基板100一侧的多条第二电源线500。第二电源线500沿第一方向延伸，且被配置为给各子像素提供电源信号。
例如，如图2-图5所示，第一子电源线210在衬底基板100上的正投影与第二电源线500在衬底基板100上的正投影至少部分交叠，且第二电源线500可以通过位于第一电源线200与第二电源线500之间的绝缘层101(即后续描述的第四绝缘层101)中的过孔351实现与第一电源线200的电连接。例如，第一子电源线210的除了断口以外的位置可以与第二电源线500大致重合。
例如，如图5所示，显示基板还包括与第二电源线500同层设置的数据线600，数据线600沿第一方向延伸，且被配置为各子像素提供数据信号。例如，数据线600可与第二电源线500采用同一步图案化工艺形成。这里以及后续出现的“同层”指同一材料在经过同一步骤(例如一步图案化工艺)后形成的多个膜层之间的关系。这里的“同层”并不总是指多个膜层的厚度相同或者多个膜层在截面图中的高度相同。
例如，图6A为根据本公开实施例提供的第一颜色子像素的像素电路的示意图。如图6A所示，第一颜色子像素310的像素电路31可以包括驱动晶体管T1、数据写入晶体管 T2、阈值补偿晶体管T3、第一发光控制晶体管T4、第二发光控制晶体管T5、第一复位晶体管T6、第二复位晶体管T7以及存储电容C。
例如，驱动晶体管T1包括栅极、第一极和第二极，且被配置为对第一颜色有机发光元件3100提供驱动第一颜色有机发光元件3100发光的驱动电流。
例如，数据写入晶体管T2的第一极与驱动晶体管T1的第一极电连接，且被配置为在扫描信号的控制下将数据信号写入存储电容C；数据写入晶体管T2的第二极被配置为与数据线600电连接以接收数据信号，数据写入晶体管T2的栅极被配置为与扫描信号线Ga电连接以接收扫描信号；存储电容C的第一极与第一电源端VDD(例如第二电源线500)电连接，电容C的第二极与驱动晶体管T1的栅极电连接，且被配置为存储数据信号。
例如，阈值补偿晶体管T3的第一极与驱动晶体管T1的第二极电连接，阈值补偿晶体管T3的第二极与驱动晶体管T1的栅极电连接，阈值补偿晶体管T3的栅极被配置为与扫描信号线Ga电连接以接收补偿控制信号；第一复位晶体管T6的第一极被配置为与复位电源端Vinit电连接以接收复位信号，第一复位晶体管T6的第二极与驱动晶体管T1的栅极电连接，第一复位晶体管T6的栅极被配置为与复位控制信号线Rst电连接以接收复位控制信号；第二复位晶体管T7的第一极被配置为与复位电源端Vinit电连接以接收复位信号，第二复位晶体管T7的第二极与第一颜色有机发光元件3100的第一电极电连接，第二复位晶体管T7的栅极被配置为与复位控制信号线Rst电连接以接收复位控制信号；第一发光控制晶体管T4的第一极与第一电源端VDD电连接，第一发光控制晶体管T4的第二极与驱动晶体管T1的第一极电连接，第一发光控制晶体管T4的栅极被配置为与发光控制信号线EM电连接以接收发光控制信号；第二发光控制晶体管T5的第一极与驱动晶体管T1的第二极电连接，第二发光控制晶体管T5的第二极与第一颜色有机发光元件3100的第二电极电连接，第二发光控制晶体管T5的栅极被配置为与发光控制信号线EM电连接以接收发光控制信号；第一颜色有机发光元件3100的第一电极与第二电源端VSS电连接。
需要说明的是，本公开的实施例中采用的晶体管可以为薄膜晶体管或场效应晶体管或其他特性相同的开关器件，薄膜晶体管可以包括氧化物半导体薄膜晶体管、非晶硅薄膜晶体管或多晶硅薄膜晶体管等。晶体管的源极、漏极在结构上可以是对称的，所以其源极、漏极在物理结构上可以是没有区别的。在本公开的实施例中，为了区分晶体管，除作为控制极的栅极，直接描述了其中一极为第一极，另一极为第二极，所以本公开的实施例中全部或部分晶体管的第一极和第二极根据需要是可以互换的。
需要说明的是，在本公开实施例中，子像素的像素电路除了可以为图6A所示的7T1C(即七个晶体管和一个电容)结构之外，还可以为包括其他数量的晶体管的结构，如7T2C结构、6T1C结构、6T2C结构或者9T2C结构，本公开实施例对此不作限定。
图6B-图6E为本公开一些实施例提供的一种像素电路的各层的示意图。下面结合附图6B-图6E描述像素电路中的各个电路在背板上的位置关系。图6B-图6E所示的示例以 四个子像素相邻的像素电路31为例，且以一个子像素包括的像素电路的各晶体管的位置进行示意，其他子像素中像素电路包括的部件与该子像素包括的各晶体管的位置大致相同。如图6B所示，该子像素的像素电路31包括图6A所示的驱动晶体管T1、数据写入晶体管T2、阈值补偿晶体管T3、第一发光控制晶体管T4、第二发光控制晶体管T5、第一复位晶体管T6和第二复位晶体管T7、电容C。
例如，图6B示出了该显示基板中像素电路的有源半导体层031。有源半导体层031可采用半导体材料图案化形成。有源半导体层031可用于制作上述的驱动晶体管T1、数据写入晶体管T2、阈值补偿晶体管T3、第一发光控制晶体管T4、第二发光控制晶体管T5、第一复位晶体管T6和第二复位晶体管T7的有源层。有源半导体层031包括各子像素的各晶体管的有源层图案(沟道区)和掺杂区图案(源漏掺杂区)，且同一像素电路中的各晶体管的有源层图案和掺杂区图案一体设置。
需要说明的是，有源层可以包括一体形成的低温多晶硅层，源极区域和漏极区域可以通过掺杂等进行导体化以实现各结构的电连接。也就是每个子像素的各晶体管的有源半导体层为由p-硅形成的整体图案，且同一像素电路中的各晶体管包括掺杂区图案(即源极区域和漏极区域)和有源层图案，不同晶体管的有源层之间由掺杂结构隔开。
例如，有源半导体层031可采用非晶硅、多晶硅、氧化物半导体材料等制作。需要说明的是，上述的源极区域和漏极区域可为掺杂有n型杂质或p型杂质的区域。
例如，沿Y方向排列的不同颜色子像素的像素电路中的有源半导体层没有连接关系，彼此断开。沿X方向排列的子像素的像素电路中的有源半导体层可以为一体设置，也可以彼此断开。
图6B-图6E还示出了电连接到各个颜色子像素的像素电路31的扫描信号线Ga、复位控制信号线Rst、复位电源端Vinit的复位电源线Init、发光控制信号线EM、数据线600、第一电源线200以及第二电源线500。第一电源线200和第二电源线500彼此电连接。
例如，像素电路的栅极金属层可以包括第一导电层和第二导电层。在上述的有源半导体层031上形成有第一绝缘层(图3所示的第一绝缘层160)，用于将上述的有源半导体层031与后续形成的栅极金属层绝缘。图6B示出了该显示基板包括的第一导电层032，第一导电层032设置在第一绝缘层160远离有源半导体层031的一侧，从而与有源半导体层031绝缘。第一导电层032可以包括电容C的第二极CC2、扫描信号线Ga、复位控制信号线Rst、发光控制信号线EM以及驱动晶体管T1、数据写入晶体管T2、阈值补偿晶体管T3、第一发光控制晶体管T4、第二发光控制晶体管T5、第一复位晶体管T6和第二复位晶体管T7的栅极。
例如，如图6B所示，数据写入晶体管T2的栅极可以为扫描信号线Ga与有源半导体层031交叠的部分；第一发光控制晶体管T4的栅极可以为发光控制信号线EM与有源半导体层031交叠的第一部分，第二发光控制晶体管T5的栅极可以为发光控制信号线EM与有源半导体层031交叠的第二部分；第一复位晶体管T6的栅极可以为复位控制信 号线Rst与有源半导体层031交叠的第一部分，第二复位晶体管T7的栅极可以为复位控制信号线Rst与有源半导体层031交叠的第二部分；阈值补偿晶体管T3可为双栅结构的薄膜晶体管，阈值补偿晶体管T3的第一个栅极可为扫描信号线Ga与有源半导体层031交叠的部分，阈值补偿晶体管T3的第二个栅极可为从扫描信号线Ga突出的突出结构P与有源半导体层031交叠的部分。如图6A和图6B所示，驱动晶体管T1的栅极可为电容C的第二极CC2。
需要说明的是，图6B中的各虚线矩形框示出了第一导电层032与有源半导体层031交叠的各个部分。作为各个晶体管的沟道区，在每个沟道区两侧的有源半导体层通过离子掺杂等工艺导体化以形成各个晶体管的第一极和第二极。
例如，如图6B所示，扫描信号线Ga、复位控制信号线Rst和发光控制信号线EM均沿第二方向延伸，且扫描信号线Ga、复位控制信号线Rst和发光控制信号线EM沿第一方向排布。扫描信号线Ga位于复位控制信号线Rst和发光控制信号线EM之间。
例如，在第一方向上，电容C的第二极CC2(即驱动晶体管T1的栅极)位于扫描信号线Ga和发光控制信号线EM之间。从扫描信号线Ga突出的突出结构P位于扫描信号线Ga的远离发光控制信号线EM的一侧。
例如，如图6B所示，在第一方向上，数据写入晶体管T2的栅极、阈值补偿晶体管T3的栅极和第一复位晶体管T6的栅极均位于驱动晶体管T1的栅极的第一侧，第一发光控制晶体管T4的栅极、第二发光控制晶体管T5的栅极以及第二复位晶体管T7的栅极均位于驱动晶体管T1的栅极的第二侧。例如，图6B所示的示例中，子像素的像素电路的驱动晶体管T1的栅极的第一侧和第二侧为在第一方向上驱动晶体管T1的栅极的彼此相对的两侧。
例如，在一些实施例中，如图6B所示，在第二方向上，数据写入晶体管T2的栅极和第一发光控制晶体管T4的栅极均位于驱动晶体管T1的栅极的第三侧，阈值补偿晶体管T3的第一个栅极、第二发光控制晶体管T5的栅极和第二复位晶体管T7的栅极均位于驱动晶体管T1的栅极的第四侧。例如，图6B所示的示例中，子像素的像素电路的驱动晶体管T1的栅极的第三侧和第四侧为在第二方向上驱动晶体管T1的栅极的彼此相对的两侧。
例如，在上述的第一导电层032上形成有第二绝缘层(如图3所示的第二绝缘层150)，用于将上述的第一导电层032与后续形成的第二导电层033绝缘。图6C示出了该像素电路的第二导电层033，第二导电层033包括电容C的第一极CC1、复位电源线Init以及遮光部S。电容C的第一极CC1与电容C的第二极CC2至少部分重叠以形成电容C。
例如，如图6C所示，双栅型阈值补偿晶体管T3两段沟道之间的有源半导体层在阈值补偿晶体管T3关闭时处于浮置(floating)状态，易受周围线路电压的影响而跳变，从而会影响阈值补偿晶体管T3的漏电流，进而影响发光亮度。为了保持阈值补偿晶体管T3两段沟道之间的有源半导体层电压稳定，设计遮光部S与阈值补偿晶体管T3两段沟道之间的有源半导体层形成电容，遮光部S可以连接至第一电源线200以获得恒定电压， 因此处于浮置状态的有源半导体层的电压可以保持稳定。遮光部S与双栅型阈值补偿晶体管T3两段沟道之间的有源半导体层交叠，还可以防止两个栅极之间的有源半导体层被光照而改变特性，例如防止该部分有源半导体层的电压发生变化，以防止产生串扰。
例如，在上述的第二导电层033上形成有第三绝缘层(如图3所示的第三绝缘层140)，用于将上述的第二导电层033与后续形成的第三导电层034绝缘。图6E示出了该像素电路的第三导电层034，第三导电层034包括数据线600以及第二电源线500。上述数据线600以及第二电源线500均沿第一方向延伸。
例如，第三导电层034还包括第一连接部341、第二连接部342和第三连接部510。图6D和图6E还示出了多个过孔的示例性位置，第三导电层034通过所示的多个过孔与位于该第三导电层034与衬底基板之间的多个膜层连接。例如，数据线600通过贯穿第一绝缘层160、第二绝缘层150和第三绝缘层140的过孔381与数据写入晶体管T2的第二极电连接。第二电源线500通过贯穿第一绝缘层160、第二绝缘层150和第三绝缘层140的过孔382与第一发光控制晶体管T4的第一极电连接。第二电源线500和数据线600沿第二方向交替设置。第二电源线500通过贯穿第三绝缘层140的过孔3832与存储电容的第一极CC1电连接。第二电源线500通过贯穿第二绝缘层150的过孔3833与遮光部S电连接以为遮光部S提供恒定电压。第一连接部341的一端通过贯穿第一绝缘层160、第二绝缘层150和第三绝缘层140中的过孔384与阈值补偿晶体管T3的第二极电连接，第一连接部341的另一端通过贯穿第二绝缘层150和第三绝缘层140中的过孔385与驱动晶体管T1的栅极(即电容C的第二极CC2)电连接。第二连接部342的一端通过贯穿第三绝缘层140中的过孔386与复位电源线Init电连接，第二连接部342的另一端通过贯穿第一绝缘层160、第二绝缘层150和第三绝缘层140中的过孔387与第二复位晶体管T7的第一极电连接。第三连接部5通过贯穿第一绝缘层160、第二绝缘层150和第三绝缘层140中的过孔352与第二发光控制晶体管T5的第二极电连接。
例如，在上述的第三导电层034上形成有第四绝缘层(如图3所示的第四绝缘层101)用于将第三导电层034与后续形成得到第四导电层035(图2所示)绝缘。如图6D和图4所示，第四绝缘层101包括过孔351，第四导电层035包括的第一子电源线210通过过孔351与第二电源线500电连接。
图6E还示出了图2所示的各颜色子像素的有效发光区与像素电路的位置关系示意图。为了方便示出各膜层位置关系，图6E所示的距离衬底基板最远的膜层为第二电源线所在的膜层，图2示出了第一电源线所在膜层与各颜色子像素的有机发光元件的有效发光区的位置关系示意图。图3为图2所示结构中的第一颜色子像素的有机发光元件、第一电源线、部分绝缘层以及图6E所示的结构中第二电源线及其面向衬底基板一侧各膜层沿AA线所截的局部截面示意图，图4为图2所示结构中的第一颜色子像素的有机发光元件、第一电源线、部分绝缘层以及图6E所示的结构中第二电源线及其面向衬底基板一侧各膜层沿BB线所截的局部截面示意图。
例如，如图2-图6E示，显示基板还包括与第一电源线200同层设置的第四连接部 230。例如，第四连接部230的材料与第一电源线200的材料相同。例如，第四连接部230可与第一电源线200采用同一步图案化工艺形成。
例如，第四导电层035远离第三导电层034的一侧设置有平坦层102，各个子像素的有机发光元件的第二电极可设置在平坦层102远离衬底基板100的一侧，且有机发光元件的第二电极通过平坦层102中的过孔与第四连接部230电连接，第四连接部230通过第四绝缘层101中的过孔与第三连接部510电连接，从而实现有机发光元件的第二电极与第二发光控制晶体管T5的第二极电连接。本公开实施例不限于此，例如在平坦层与第四导电层之间还可以设置钝化层。
本公开实施例提供的显示基板中，第一电源线与第二电源线电连接可以降低第二电源线的压降，从而改善显示装置的画面均一性。
例如，图7为本公开实施例的另一示例提供的显示基板的局部平面结构示意图。如图7所示，本公开实施例提供的显示基板中的第一颜色子像素310与第一子电源线210的位置关系可以与图2所示的第一颜色子像素310与第一子电源线210的位置关系相同。本示例提供的显示基板包括的多个子像素还包括第二颜色子像素320，第二颜色子像素320包括第二有效发光区321。例如，第二颜色子像素320包括依次层叠设置的第一电极、有机发光层以及位于有机发光层面向衬底基板100一侧的第二电极，第一电极、有机发光层以及第二电极彼此接触的部分能够驱动有机发光层进行发光。例如，第二颜色子像素的第二电极可以设置在像素限定层的下方，像素限定层包括用于限定像素的开口，该开口露出第二电极的一部分，当有机发光层形成在上述像素限定层中的开口中时，有机发光层的两侧分别与第一电极和第二电极接触，从而该有机发光层与第一电极以及第二电极接触部分为第二颜色子像素能够发光的有效部分，即第二有效发光区321。
例如，如图7所示，第一电源线200包括的至少一条第一子电源线210包括至少一个第二断口212，第二有效发光区321位于第二断口212处以使第一子电源线210没有沿第一方向贯穿第二有效发光区321。本公开实施例描述的“第二有效发光区位于第二断口处”以及“第一子电源线没有沿第一方向贯穿第二有效发光区”均指上述特征在平面上的位置关系。例如，在图7所示的平面图中，第二有效发光区位于第二断口处，且第一子电源线没有沿第一方向贯穿第二有效发光区。
例如，在本公开实施例的一示例中，沿垂直于衬底基板的方向，第二有效发光区可以与第二断口以及位于第二断口至少一侧的第一子电源线有交叠，即，将图1所示的第一子电源线21与蓝色有机发光元件32或者红色有机发光元件34的有效发光区交叠的部分结构中去掉一部分以形成第二断口，通过减小第一子电源线与第二有效发光区的交叠面积，可以提高该第二断口位置处的有机发光层的平坦性，有利于减少色偏。
例如，在本公开实施例的另一示例中，沿垂直于衬底基板的方向，第二有效发光区321与第一子电源线210基本没有交叠。第二有效发光区321与该第一子电源线210的沿第一方向延伸的中心线有交叠，但交叠位置设置有第二断口212，所以第二有效发光区321与第一子电源线210基本没有交叠，可以提高第二有效发光区321内设置的有机发光 层等膜层的平坦性，以防止第二颜色子像素320在显示过程中发生色偏。也就是，相对于图1所示的第二有效发光区与第一子电源线有交叠的情况，本公开实施例通过将第一子电源线与第二有效显示区交叠的位置完全去掉以形成第二断口，从而第二有效发光区与第一子电源线基本没有交叠，可以防止第二颜色子像素在显示过程中发生色偏。
例如，如图7所示，第二有效发光区321的形状可以为矩形，且矩形的任一边的延伸方向均与第一方向相交。第二有效发光区321中包括彼此相对的两个第三顶点和彼此相对的两个第四顶点，两个第三顶点在第一子电源线210所在平面上的正投影位于第一子电源线210的两侧，两个第四顶点在第一子电源线210所在平面上的正投影位于第一子电源线210的同一侧。图7所示的第二有效发光区的形状可以包括严格的由两条线段形成的尖角，但在一些实施例中，第二有效发光区的形状可以为圆角图形，例如圆角矩形。也就是，第二有效发光区的角被倒圆。例如，形成像素限定层的开口时，开口的角落处的部分则可能会形成圆角形状，从而形成的第二有效发光区形状可能为圆角形状。上述“顶点”可以指具有90°夹角的标准矩形的四个顶点中的顶点，也可以指圆角矩形中的位于四个圆角上的点，各圆角具有一个顶点。
例如，如图7所示，沿与第一方向垂直的第二方向(Y方向)，第二有效发光区321与位于其一侧且与其紧邻的第一子电源线210具有一定距离，位于第二有效发光区321另一侧的且与其紧邻的第一子电源线210设置有第二断口212，由此，第二有效发光区321与位于其两侧的第一子电源线210均没有交叠。上述与第二有效发光区321紧邻的第一子电源线210指该第一子电源线210与第二有效发光区321之间没有其他第一子电源线210。
例如，第二有效发光区321的沿第二方向的最大尺寸可以大于相邻两条第一子电源线210之间的距离，此时，通过在相邻两条第一子电源线210的至少之一设置第二断口212，以使第二有效发光区321位于第二断口212处，可以防止第二有效发光区321与第一子电源线210有交叠。当然，本公开实施例对第二有效发光区321沿第二方向的最大尺寸不作具体限定，例如，第二有效发光区321沿第二方向的最大尺寸可以小于或者等于相邻两条第一子电源线210之间的距离。
例如，如图7所示，第二有效发光区321在衬底基板100上的正投影与第二子电源线220在衬底基板100上的正投影也没有交叠。例如，第二有效发光区321的沿第一方向的最大尺寸小于位于其两侧且彼此相邻的两条第二子电源线220之间的距离以使第二有效发光区321与第二子电源线220没有交叠。
根据本公开实施例的一示例提供的显示基板中，第二颜色子像素320的第二有效发光区321在衬底基板100上的正投影与第一电源线200没有交叠以保证第二有效发光区321内发光层等膜层的平坦度，从而防止第二颜色子像素在显示过程中发生色偏。
例如，第一颜色子像素310和第二颜色子像素320之一为蓝色子像素，另一个为红色子像素。
例如，第一颜色子像素310可以为红色子像素，第二颜色子像素320可以为蓝色子 像素，且第一颜色子像素310的第一有效发光区311的面积小于第二颜色子像素320的第二有效发光区321的面积以延长显示基板的使用寿命。
例如，本公开实施例提供的第二颜色子像素包括的像素电路结构与第一颜色子像素包括的像素电路结构相同，在此不再赘述。
例如，图8为本公开实施例的另一示例提供的显示基板的局部平面结构示意图。本示例中的第一颜色子像素310与第一子电源线210之间的位置关系以及第二颜色子像素320与第一子电源线210之间的位置关系可以与图2所示的示例相同，也可以与图7所示的示例相同，本示例对此不做限制。本示例示意性地示出第二颜色子像素320与第一子电源线210之间的位置关系可以与图7所示的示例相同。如图8所示，多个子像素还包括第三颜色子像素330，第三颜色子像素330包括第三有效发光区331。像素限定层包括的开口可以用于限定第三有效发光区331。
例如，如图8所示，至少一条第一子电源线210包括第三断口213，第三有效发光区331位于第三断口213处以使第一子电源线210没有沿第一方向贯穿第三有效发光区331。本公开实施例描述的“第三有效发光区位于第三断口处”以及“第一子电源线没有沿第一方向贯穿第三有效发光区”均指上述特征在平面上的位置关系。例如，在图8所示的平面图中，第三有效发光区位于第三断口处，且第一子电源线没有沿第一方向贯穿第三有效发光区。
例如，在本公开实施例的一示例中，沿垂直于衬底基板的方向，第三有效发光区可以与第三断口以及位于第三断口至少一侧的第一子电源线有交叠，即，将图1所示的第一子电源线21与绿色有机发光元件33的有效发光区交叠的部分结构中去掉一部分以形成第三断口，通过减少第一子电源线与第三有效发光区的交叠面积，可以提高该第三断口位置处的有机发光层的平坦性，有利于减少色偏。
例如，在本公开实施例的另一示例中，沿垂直于衬底基板的方向，第三有效发光区与第一子电源线210基本没有交叠。第三有效发光区331与该第一子电源线210的沿第一方向延伸的中心线有交叠，但交叠位置设置有第三断口213，所以第三有效发光区331与第一子电源线210基本没有交叠，可以提高第三有效发光区331内设置的有机发光层等膜层的平坦性，从而防止第三颜色子像素330在显示过程中发生色偏。也就是，相对于图1所示的第三有效发光区与第一子电源线有交叠的情况，本公开实施例通过将第一子电源线与第三有效显示区交叠的位置全部去掉以形成第三断口，从而第三有效发光区与第一子电源线没有交叠，可以防止第三颜色子像素在显示过程中发生色偏。
例如，如图8所示，第三有效发光区331在衬底基板100上的正投影与第二子电源线220在衬底基板100上的正投影也没有交叠。例如，第三有效发光区331的沿第一方向的最大尺寸小于位于其两侧且彼此相邻的两条第二子电源线220之间的距离以使第三有效发光区331与第二子电源线220没有交叠。
根据本公开实施例的一示例提供的显示基板中，第三颜色子像素330的第三有效发光区331在衬底基板100上的正投影与第一电源线200没有交叠以保证第三有效发光区 331内有机发光层等膜层的平坦度，从而防止第三颜色子像素在显示过程中发生色偏。
例如，第一颜色子像素310和第二颜色子像素320之一为蓝色子像素，另一个为红色子像素，第三颜色子像素330为绿色子像素。
例如，每个第一颜色子像素310的第一有效发光区311面积和每个第二颜色子像素320的第二有效发光区321面积均大于每个第三颜色子像素330的第三有效发光区331的面积以提高显示装置的寿命。
例如，本公开实施例提供的第三颜色子像素包括的像素电路结构与第一颜色子像素包括的像素电路结构相同，在此不再赘述。
例如，图9为图8所示显示基板中的像素排列的局部结构示意图。如图8-图9所示，多个子像素划分为多个重复单元110，各重复单元包括一个第一颜色子像素310、一个第二颜色子像素320以及两个第三颜色子像素330。各重复单元110中，第一颜色子像素310和第二颜色子像素320沿第一方向(X方向)排列，两个第三颜色子像素330沿与第一方向相交的第二方向(Y方向)排列，第一颜色子像素310的中心和第二颜色子像素320的中心之间的第一连线111与两个第三颜色子像素330的中心之间的第二连线112相交。多个重复单元110沿第二方向排列以形成多个重复单元组1100，多个重复单元组1100沿第一方向排列，且多个重复单元组1100中的相邻重复单元组1100沿第二方向彼此错开。
例如，如图8-图9所示，根据各重复单元110中第一颜色子像素310、第二颜色子像素320以及第三颜色子像素330的排列方式，第一电源线200中的第二子电源线220设置为曲线形，以使各颜色子像素的有效发光区与第二子电源线220均没有交叠。
例如，如图8-图9所示，沿第一方向，第一颜色子像素310和第二颜色子像素320交替排列，多个第三颜色子像素330沿第一方向排列。
例如，如图8-图9所示，多条第一子电源线210包括位于奇数列的第一子电源线210和位于偶数列的第一子电源线210。位于奇数列的第一子电源线210包括第一断口211和第二断口212，且第一断口211和第二断口212沿第一方向交替排列。位于偶数列的第一子电源线210仅包括第三断口213。本公开实施例不限于此，还可以是奇数列的第一子电源线仅包括第三断口，偶数列的第一子电源线包括第一断口和第二断口。
例如，如图8-图9所述，沿第二方向，第一颜色子像素310和第二颜色子像素320交替排列，因此，分别位于相邻奇数列的第一子电源线210上的第一断口211和第二断口212沿第二方向交替排列。
例如，如图8-图9所示，多个第三颜色子像素330沿第二方向排列，因此，位于相邻偶数列的第一子电源线210上的第三断口213沿第二方向排列。
本公开实施例不限于各颜色子像素为图9所示的排列方式，例如，各颜色子像素可以排列为real RGB像素排列、钻石(diamond)像素排列等其他像素排列方式，只要第一电源线中的第一子电源线沿第一方向没有贯穿各颜色子像素的有效发光区即可。
本公开实施例通过去除各颜色子像素有效发光区面向衬底基板一侧的部分第一电源 线，可以保证各颜色子像素的发光层等膜层的平坦度，进而防止各颜色子像素发生色偏。
例如，图10A为根据本公开实施例的另一示例提供的显示基板的局部平面结构示意图，图11为沿图10A所示的显示基板中的CC线所截的截面图，图12为沿图10A所示的显示基板中的DD线所截的截面图。图11和图12省略了第二电源线与衬底基板之间的膜层。本示例中的第一颜色子像素310与第一子电源线210之间的位置关系以及第二颜色子像素320与第一子电源线210之间的位置关系可以与图2所示的示例相同，也可以与图7所示的示例相同，本示例对此不做限制。本示例示意性地示出第二颜色子像素320与第一子电源线210之间的位置关系可以与图7所示的示例相同，且本示例中像素的排列方式与图9所示的像素排列方式相同。
例如，如图10A、图11-图12所示，第三颜色子像素330包括依次层叠设置的第一电极334、有机发光层332以及位于有机发光层332面向衬底基板100一侧的第二电极333，第一电极334、有机发光层332以及第二电极333彼此接触的部分能够驱动有机发光层332进行发光。第二电极333与第四连接部230电连接，且第三有效发光区331在衬底基板100上的正投影与第四连接部230在衬底基板100上的正投影有交叠。
例如，如图9和图10A所示，各重复单元110中的两个第三颜色子像素330的第三有效发光区331的形状以及面积均相等。
例如，如图9和图10A所示，第一连线111沿第一方向延伸，各重复单元110中，两个第三颜色子像素330的第三有效发光区331相对于第一连线111对称分布。
本示例中，第一颜色子像素和第二颜色子像素分别为蓝色子像素和红色子像素，第三颜色子像素为绿色子像素。每个第一颜色子像素和每个第二颜色子像素的有效发光区的面积均大于每个第三颜色子像素的有效发光区的面积。虽然第一颜色子像素和第二颜色子像素的有效发光区均与连接部有交叠，但是上述两种颜色子像素的有效发光区的面积较大，则有效发光区与连接部交叠面积占有效发光区的面积比例较小。因此，第一颜色子像素和第二颜色子像素的有效发光区内的有机发光层等膜层与连接部交叠部分虽然也会有不平坦的问题，但是不会产生太明显的色偏现象。而第三颜色子像素的有效发光区的面积较小，则该有效发光区与连接部交叠面积占有效发光区的面积比例较大。因此，第三颜色子像素的有效发光区内的有机发光层等膜层与连接部交叠部分的不平坦性会使得第三颜色子像素容易产生明显的色偏现象。
此外，各重复单元中，两个第三颜色子像素是对称分布，但是连接部与两个第三颜色子像素的有效发光区交叠的部分不是相对于第一连线对称分布。因此，当各重复单元中的两个第三颜色子像素同时发光时，由于连接部与各第三颜色子像素的有效发光区的相对位置关系不同而导致两个第三颜色子像素发光效果不同，从而影像显示效果。
如图10A所示，为了解决各重复单元中两个对称的第三颜色子像素发光效果不同的问题，本公开实施例的一示例中，显示基板还包括条状部232，条状部232沿第一方向延伸，且与第一电源线200同层设置且材料相同。沿垂直于衬底基板100的方向，第三有效发光区331与条状部232以及第四连接部230均交叠，条状部232位于最靠近第三有 效发光区331的第二子电源线220与第四连接部230之间，且条状部232和第四连接部230位于经过第三有效发光区331的中心且沿第一方向延伸的直线的同一侧。上述最靠近第三有效发光区的第二子电源线220指沿第一方向位于第三有效发光区331两侧的第二子电源线220中距该第三有效发光区的几何中心距离最短的第二子电源线220。
例如，条状部232和第四连接部230可以为一体结构。
例如，在第三颜色子像素330的第二电极333面向衬底基板100的一侧还设置了垫块240，且第三颜色子像素330的第三有效发光区331在衬底基板100上的正投影与垫块240在衬底基板100上的正投影有交叠。例如，条状部232和第四连接部230位于经过第三有效发光区331的中心且沿第一方向延伸的直线的一侧，垫块240位于上述直线的另一侧。本公开实施例通过设置垫块以及条状部，且垫块和条状部分别位于第三有效发光区的中心的沿第二方向相对的两侧，可以增加第三有效发光区在第二方向上的对称性。
例如，沿垂直于衬底基板100的方向，各第三有效发光区331与垫块240交叠的部分为第一交叠部2341，第三有效发光区331与第四连接部230和条状部232交叠的部分为第二交叠部2342，第一交叠部2341与第二交叠部2342的面积比大致为0.9～1.1。例如，第一交叠部2341与第二交叠部2342的面积大致相等，从而进一步增加第三有效发光区在第二方向上的对称性。
例如，如图10A所示，各重复单元中，两个第三颜色子像素330的第三有效发光区331相对于第一连线对称分布，且沿垂直于衬底基板100的方向，垫块240、第四连接部230以及条状部232与一个第三颜色子像素的第三有效发光区331交叠的部分为第三交叠部2343，垫块240、第四连接部230以及条状部232与另一个第三颜色子像素的第三有效发光区331交叠的部分为第四交叠部2344，第三交叠部2343和第四交叠部2344相对于第一连线大致对称分布。由此，在各重复单元中的两个第三颜色子像素同时发光时，两个第三颜色子像素的发光效果也基本相同。
例如，如图10A所示，垫块240可以为第一子电源线210与第三有效发光区331的沿垂直于衬底基板100的方向交叠的部分以节省制作工艺。为了使得例如各重复单元中的两个第三有效发光区331中的两个有机发光层332与第一子电源线210、条状部232以及第四连接部230交叠的部分对称分布，可以根据第一子电源线210以及第四连接部230与第三有效发光区331交叠的部分的位置设置条状部232的位置。例如，在垫块为第一子电源线的一部分时，第一子电源线包括具有断口的第一子电源和没有断口的第一子电源线，具有断口的第一子电源线和没有断口的第一子电源线沿Y方向交替排列。并且，上述具有断口的第一子电源线上设置有第一断口211和第二断口212，第一断口211和第二断口212沿X方向交叠排列。
例如，各子像素的像素电路中包括一个第四连接部230，且多个子像素包括的多个第四连接部230沿第一方向和第二方向阵列排布。例如，多个第四连接部230沿第一方向等间距排布，且多个第四连接部230沿第二方向也等间距排布。
当然，在实际工艺中，第一子电源线、条状部以及第四连接部和两个第三有效发光 区交叠的部分可能仅是大致对称分布。因此，本公开实施例中提到的对称分布均指大致对称分布，例如，“大致”能够表示在一个或多个标准偏差内，或者在所述值的10％或者5％内。
例如，如图10A所示，各重复单元中，与一个第三有效发光区331交叠的垫块240和与另一个第三有效发光区331交叠的第四连接部230以及条状部232相对于第一连线对称分布。
本公开实施例通过根据第一子电源线和第四连接部与第三有效发光区的位置关系而设置条状部的位置，在各重复单元中的两个第三颜色子像素同时发光时可以具有大致相同的发光效果，以避免影响最终显示效果。
例如，如图10A所示，各第三颜色子像素330中，第一交叠部2341和第二交叠部2342呈中心对称分布。
本公开实施例通过在保证同一重复单元中的两个第三颜色子像素的有效发光区内的发光层呈对称分布的同时，还保证了每个第三颜色子像素的有效发光区的发光层呈中心对称，以保证每个第三颜色子像素发光的均匀性，改善色偏等不良。
图11-图12示意性地示出与第三有效发光区交叠位置的第一子电源线(即垫块)会使得第三有效发光区内的第二电极、有机发光层等膜层出现不平坦的凸起，通过与第一子电源线同层设置条状部，可以在第三有效发光区内的有机发光层的另一个位置出现凸起，两个凸起设置为例如面积大致相等，或者例如中心对称后，可以保证第三颜色子像素发光的均匀性。图11-图12所示的凸起仅为示意性的，实际产品中的凸起的边缘可能会是平滑曲线而非图示的直角折线。
例如，图10B为根据本公开实施例的另一示例提供的显示基板的局部平面结构示意图。与图10A所示示例不同之处在于，图10B所示的示例中的条状部232与第二子电源线220一体设置，条状部232与第四连接部230间隔设置以防止条状部232与第四连接部230之间发生电连接，影响第三颜色子像素的正常显示。沿垂直于衬底基板100的方向，第一子电源线210与第三有效发光区331交叠，条状部232和第四连接部230位于经过第三有效发光区331的中心且沿第一方向延伸的直线的一侧，第一子电源线210位于上述直线的另一侧，可以增加各第三有效发光区在第二方向上的对称性，降低色偏。
例如，沿垂直于衬底基板100的方向，第三有效发光区331与第一子电源线210、第四连接部230以及条状部232均有交叠，且各第三有效发光区331与第一子电源线210、第四连接部230以及条状部232交叠的部分分别为第五交叠部245、第六交叠部246以及第七交叠部247。第六交叠部246靠近第五交叠部245的边与第七交叠部247靠近第五交叠部245的边位于沿第一方向延伸的同一直线上。
例如，对于一个第三颜色子像素，第五交叠部245的面积可大致等于第六交叠部246和第七交叠部247的面积和，从而降低各第三颜色子像素的色偏。
例如，同一重复单元中，一个第三颜色子像素的第六交叠部246和第七交叠部247与另一个第三颜色子像素的第五交叠部245相对于第一连线111基本对称分布，可以保 证同一重复单元中的两个第三颜色子像素的有效发光区的发光层呈对称分布，从而在各重复单元中的两个第三颜色子像素同时发光时，降低两个第三颜色子像素的发光效果的差异性，进而降低色偏。
例如，同一重复单元中，一个第三颜色子像素的第六交叠部246和第七交叠部247与另一个第三颜色子像素的第五交叠部245的面积大致相等，可以保证在各重复单元中的两个第三颜色子像素同时发光时，降低两个第三颜色子像素的发光效果的差异性，进而降低色偏。
本公开实施例不限于条状部与第四连接部或者第二子电源线为一体结构，条状部也可以为与第四连接部或者第二子电源线彼此独立的结构，只要可以保证同一重复单元中的两个第三颜色子像素的有效发光区的发光层呈对称分布，在各重复单元中的两个第三颜色子像素同时发光时，降低两个第三颜色子像素的发光效果的差异性即可。
例如，图10C为根据本公开实施例的另一示例提供的显示基板的局部平面结构示意图。与图10A所示示例不同之处在于，图10C所示的示例中的显示基板没有设置条状部，且第一子电源线210还包括突出部2101，突出部2101位于第一子电源线主体2102的靠近与第三颜色子像素330连接的第四连接部230的一侧，且位于靠近第三有效发光区331的第二子电源线220与第四连接部230之间。突出部2101与第四连接部230间隔设置，以防止突出部2101与第四连接部230发生电连接，影响第三颜色子像素的正常显示。
例如，第三有效发光区331在衬底基板100上的正投影与第一子电源线主体2102、突出部2101以及第四连接部230在衬底基板100上的正投影均有交叠，且第三有效发光区331在衬底基板100上的正投影的中心位于突出部2101在衬底基板100上的正投影内。也就是经过第三有效发光区331的中心且沿第一方向延伸的直线在衬底基板100上的正投影与突出部2101在衬底基板100上的正投影有交叠，从而可以增加各第三有效发光区在第二方向上的对称性，降低色偏。
本公开另一实施例提供一种显示装置，包括上述任一种显示基板。本公开实施例中的显示装置中，通过在第一电源线设置第一断口以使第一颜色子像素的第一有效发光区与第一电源线没有交叠或者部分交叠，可以改善第一颜色子像素在显示过程中发生的色偏不良的问题。
例如，该显示装置可以为有机发光二极管显示装置等显示器件以及包括该显示装置的电视、数码相机、手机、手表、平板电脑、笔记本电脑、导航仪等任何具有显示功能的产品或者部件，本实施例不限于此。
有以下几点需要说明：
(1)本公开的实施例附图中，只涉及到与本公开实施例涉及到的结构，其他结构可参考通常设计。
(2)在不冲突的情况下，本公开的同一实施例及不同实施例中的特征可以相互组合。
以上所述仅是本公开的示范性实施方式，而非用于限制本公开的保护范围，本公开的保护范围由所附的权利要求确定。

Claims (24)

  1. 一种显示基板，包括：
    衬底基板；
    第一电源线，位于所述衬底基板上，所述第一电源线包括沿第一方向延伸的多条第一子电源线以及位于每相邻的两条所述第一子电源线之间的多条第二子电源线，所述第二子电源线被配置为连接相邻的两条所述第一子电源线；
    像素限定层，位于所述第一电源线远离所述衬底基板的一侧，所述像素限定层包括多个开口以限定多个子像素的有效发光区，所述多个子像素包括第一颜色子像素，所述第一颜色子像素包括第一有效发光区；
    其中，至少一条所述第一子电源线包括至少一个第一断口，所述第一有效发光区位于所述至少一个第一断口处以使所述第一子电源线没有沿所述第一方向贯穿所述第一有效发光区。
  2. 根据权利要求1所述的显示基板，其中，沿垂直于所述衬底基板的方向，所述第一有效发光区与具有所述第一断口的所述第一子电源线基本没有交叠。
  3. 根据权利要求1或2所述的显示基板，还包括：
    多条第二电源线，沿所述第一方向延伸，位于所述第一电源线靠近所述衬底基板的一侧，
    其中，所述第二电源线与所述第一电源线通过位于所述第一电源线与所述第二电源线之间的绝缘层中的过孔连接。
  4. 根据权利要求3所述的显示基板，其中，所述多个子像素还包括第二颜色子像素，所述第二颜色子像素包括第二有效发光区；
    至少一条所述第一子电源线包括至少一个第二断口，所述第二有效发光区位于所述至少一个第二断口处以使所述第一子电源线没有沿所述第一方向贯穿所述第二有效发光区。
  5. 根据权利要求4所述的显示基板，其中，沿垂直于所述衬底基板的方向，所述第二有效发光区与具有所述第二断口的所述第一子电源线基本没有交叠。
  6. 根据权利要求4或5所述的显示基板，其中，所述第一颜色子像素和所述第二颜色子像素之一为蓝色子像素，另一个为红色子像素。
  7. 根据权利要求4-6任一项所述的显示基板，其中，所述多个子像素划分为多个重复单元，各所述重复单元包括所述第一颜色子像素、所述第二颜色子像素以及两个第三颜色子像素，各所述第三颜色子像素包括第三有效发光区，
    各所述重复单元中，所述第一颜色子像素和所述第二颜色子像素沿所述第一方向排列，两个所述第三颜色子像素沿与所述第一方向相交的第二方向排列，所述第一颜色子像素中心和所述第二颜色子像素中心之间的第一连线与两个所述第三颜色子像素中心之间的第二连线相交，
    所述多个重复单元沿所述第二方向排列以形成多个重复单元组，所述多个重复单元组沿所述第一方向排列，且所述多个重复单元组中的相邻重复单元组沿所述第二方向彼此错开。
  8. 根据权利要求7所述的显示基板，其中，所述多个子像素包括第三颜色子像素，所述第三颜色子像素包括第三有效发光区；
    至少一条所述第一子电源线包括至少一个第三断口，所述第三有效发光区位于所述至少一个第三断口处以使所述第一子电源线没有沿所述第一方向贯穿所述第三有效发光区。
  9. 根据权利要求8所述的显示基板，其中，沿垂直于所述衬底基板的方向，所述第三有效发光区与具有所述第三断口的所述第一子电源线基本没有交叠。
  10. 根据权利要求7所述的显示基板，还包括：连接部，与所述第一电源线同层设置且材料相同；
    所述第三颜色子像素包括依次层叠设置的第一电极、有机发光层以及第二电极，所述第二电极位于所述有机发光层面向所述衬底基板的一侧，所述第二电极与所述连接部电连接。
  11. 根据权利要求10所述的显示基板，还包括：
    条状部，沿所述第一方向延伸，与所述第一电源线同层设置且材料相同；
    其中，沿垂直于所述衬底基板的方向，所述第三有效发光区与所述条状部以及所述连接部均交叠，所述条状部位于靠近所述第三有效发光区的所述第二子电源线与所述连接部之间，且所述条状部和所述连接部位于经过所述第三有效发光区的中心且沿所述第一方向延伸的直线的同一侧。
  12. 根据权利要求11所述的显示基板，其中，所述连接部和所述条状部为一体结构。
  13. 根据权利要求11或12所述的显示基板，包括：
    垫块，沿所述第一方向延伸，与所述第一电源线同层设置且材料相同；
    其中，所述第三有效发光区在所述衬底基板上的正投影与所述垫块在所述衬底基板上的正投影有交叠，所述条状部和所述连接部位于经过所述第三有效发光区的中心且沿所述第一方向延伸的直线的一侧，所述垫块位于所述直线的另一侧。
  14. 根据权利要求13所述的显示基板，其中，沿垂直于所述衬底基板的方向，各所述第三有效发光区与所述垫块交叠的部分为第一交叠部，所述第三有效发光区与所述连接部和所述条状部交叠的部分为第二交叠部，所述第一交叠部与所述第二交叠部的面积比大致为0.9～1.1。
  15. 根据权利要求13或14所述的显示基板，其中，各所述重复单元中，两个所述第三颜色子像素的第三有效发光区相对于所述第一连线对称分布，且沿垂直于所述衬底基板的方向，所述垫块、所述连接部以及所述条状部与一个所述第三颜色子像素的第三有效发光区交叠的部分为第三交叠部，所述垫块、所述连接部以及所述条状部与另一个所述第三颜色子像素的第三有效发光区交叠的部分为第四交叠部，所述第三交叠部和所 述第四交叠部相对于所述第一连线大致对称分布。
  16. 根据权利要求13-15任一项所述的显示基板，其中，所述垫块为所述第一子电源线与所述第三有效发光区的沿垂直于所述衬底基板的方向交叠的部分。
  17. 根据权利要求14所述的显示基板，其中，各所述第三颜色子像素中，所述第一交叠部和所述第二交叠部呈中心对称分布。
  18. 根据权利要求11所述的显示基板，其中，所述第二子电源线和所述条状部为一体结构，且所述条状部与所述连接部间隔设置；
    沿垂直于所述衬底基板的方向，所述第一子电源线与所述第三有效发光区交叠，所述条状部和所述连接部位于经过所述第三有效发光区的中心且沿所述第一方向延伸的直线的一侧，所述第一子电源线位于所述直线的另一侧。
  19. 根据权利要求10所述的显示基板，其中，所述第一子电源线还包括突出部，所述突出部位于所述第一子电源线主体的靠近与所述第三颜色子像素连接的所述连接部的一侧，且位于靠近所述第三有效发光区的所述第二子电源线与所述连接部之间，所述突出部与所述连接部间隔设置；
    所述第三有效发光区在所述衬底基板上的正投影与所述第一子电源线主体、所述突出部以及所述连接部在所述衬底基板上的正投影均有交叠，且所述第三有效发光区在所述衬底基板上的正投影的中心位于所述突出部在所述衬底基板上的正投影内。
  20. 根据权利要求9-19任一项所述的显示基板，其中，各所述重复单元中，所述第一有效发光区的面积大于一个所述第三有效发光区的面积，且所述第二有效发光区的面积大于一个所述第三有效发光区的面积。
  21. 根据权利要求1-17、以及19任一项所述的显示基板，其中，各所述子像素的有效发光区在所述衬底基板上的正投影与所述第二子电源线在所述衬底基板上的正投影均没有交叠。
  22. 根据权利要求3-21任一项所述的显示基板，其中，所述第一子电源线在所述衬底基板上的正投影与所述第二电源线在所述衬底基板上的正投影至少部分交叠。
  23. 一种显示基板，包括：
    衬底基板；
    有源半导体层，位于所述衬底基板上；
    第一绝缘层，位于所述有源半导体层远离所述衬底基板的一侧；
    第一导电层，位于所述第一绝缘层远离所述有源半导体层的一侧；
    第二绝缘层，位于所述第一导电层远离所述第一绝缘层的一侧；
    第二导电层，位于所述第二绝缘层远离所述第一导电层的一侧；
    第三绝缘层，位于所述第二导电层远离所述第二绝缘层的一侧；
    第三导电层，位于所述第三绝缘层远离所述第二导电层的一侧；
    第四绝缘层，位于所述第三导电层远离所述第三绝缘层的一侧；
    第四导电层，位于所述第四绝缘层远离所述第三导电层的一侧，其中，所述第四导 电层包括第一电源线，所述第一电源线包括沿第一方向延伸的多条第一子电源线以及位于每相邻的两条所述第一子电源线之间的多条第二子电源线，所述第二子电源线被配置为连接相邻的两条所述第一子电源线，所述第三导电层包括沿所述第一方向延伸的多条第二电源线，所述第二电源线通过所述第四绝缘层中的过孔与所述第一电源线连接；以及
    像素限定层，位于所述第一电源线远离所述衬底基板的一侧，所述像素限定层包括多个开口以限定多个子像素的有效发光区，所述多个子像素包括第一颜色子像素，所述第一颜色子像素包括第一有效发光区；
    其中，至少一条所述第一子电源线包括至少一个第一断口，所述第一有效发光区位于所述至少一个第一断口处以使所述第一子电源线没有沿所述第一方向贯穿所述第一有效发光区。
  24. 一种显示装置，包括权利要求1-23任一项所述的显示基板。
PCT/CN2020/087000 2020-04-26 2020-04-26 显示基板以及显示装置 WO2021217296A1 (zh)

Priority Applications (4)

Application Number Priority Date Filing Date Title
PCT/CN2020/087000 WO2021217296A1 (zh) 2020-04-26 2020-04-26 显示基板以及显示装置
CN202080000601.6A CN113853682A (zh) 2020-04-26 2020-04-26 显示基板以及显示装置
EP20926363.1A EP4145525A4 (en) 2020-04-26 2020-04-26 DISPLAY SUBSTRATE AND DISPLAY DEVICE
US17/425,000 US20220320235A1 (en) 2020-04-26 2020-04-26 Display substrate and display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2020/087000 WO2021217296A1 (zh) 2020-04-26 2020-04-26 显示基板以及显示装置

Publications (1)

Publication Number Publication Date
WO2021217296A1 true WO2021217296A1 (zh) 2021-11-04

Family

ID=78373217

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2020/087000 WO2021217296A1 (zh) 2020-04-26 2020-04-26 显示基板以及显示装置

Country Status (4)

Country Link
US (1) US20220320235A1 (zh)
EP (1) EP4145525A4 (zh)
CN (1) CN113853682A (zh)
WO (1) WO2021217296A1 (zh)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114937686A (zh) * 2022-05-19 2022-08-23 京东方科技集团股份有限公司 显示基板及其驱动方法、显示装置
WO2023185630A1 (zh) * 2022-03-30 2023-10-05 京东方科技集团股份有限公司 显示基板

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011158707A (ja) * 2010-02-01 2011-08-18 Casio Computer Co Ltd アクティブマトリクス型表示パネル用基板とこれを用いた液晶表示パネル
JP2011164219A (ja) * 2010-02-05 2011-08-25 Panasonic Corp 表示パネル及びその製造方法
CN105388677A (zh) * 2015-12-25 2016-03-09 电子科技大学 一种电致变色显示器件及其驱动方法
CN109360851A (zh) * 2018-11-30 2019-02-19 武汉天马微电子有限公司 一种显示面板和一种显示装置

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102205401B1 (ko) * 2014-01-14 2021-01-21 삼성디스플레이 주식회사 유기발광표시장치
US10854684B2 (en) * 2016-02-18 2020-12-01 Boe Technology Group Co., Ltd. Pixel arrangement structure and driving method thereof, display substrate and display device
US10224386B2 (en) * 2016-09-23 2019-03-05 Apple Inc. Display with power supply mesh
KR102384774B1 (ko) * 2017-03-27 2022-04-11 삼성디스플레이 주식회사 유기 발광 표시 장치
KR20200115944A (ko) * 2019-03-29 2020-10-08 삼성디스플레이 주식회사 유기발광표시장치
CN110265458B (zh) * 2019-06-27 2021-12-03 京东方科技集团股份有限公司 阵列基板及其制作方法、显示面板及显示装置

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011158707A (ja) * 2010-02-01 2011-08-18 Casio Computer Co Ltd アクティブマトリクス型表示パネル用基板とこれを用いた液晶表示パネル
JP2011164219A (ja) * 2010-02-05 2011-08-25 Panasonic Corp 表示パネル及びその製造方法
CN105388677A (zh) * 2015-12-25 2016-03-09 电子科技大学 一种电致变色显示器件及其驱动方法
CN109360851A (zh) * 2018-11-30 2019-02-19 武汉天马微电子有限公司 一种显示面板和一种显示装置

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP4145525A4 *

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023185630A1 (zh) * 2022-03-30 2023-10-05 京东方科技集团股份有限公司 显示基板
CN114937686A (zh) * 2022-05-19 2022-08-23 京东方科技集团股份有限公司 显示基板及其驱动方法、显示装置
CN114937686B (zh) * 2022-05-19 2022-12-02 京东方科技集团股份有限公司 显示基板及其驱动方法、显示装置

Also Published As

Publication number Publication date
CN113853682A (zh) 2021-12-28
EP4145525A4 (en) 2023-05-24
US20220320235A1 (en) 2022-10-06
EP4145525A1 (en) 2023-03-08

Similar Documents

Publication Publication Date Title
WO2021018304A1 (zh) 显示基板以及显示装置
US11552131B2 (en) Electroluminescent display panel and display device
CN111584757B (zh) 显示母板和显示基板的制作方法
US7164230B2 (en) Dual panel-type organic electroluminescent display device and method for fabricating the same
WO2021184306A1 (zh) 显示基板以及显示装置
US20230157102A1 (en) Display substrate and display device
WO2021217295A1 (zh) 显示基板以及显示装置
US11991910B2 (en) Display substrate and display device
WO2021184305A1 (zh) 显示基板以及显示装置
WO2021217296A1 (zh) 显示基板以及显示装置
US20240087528A1 (en) Display substrate and display device
US11915634B2 (en) Display substrate and display device
WO2022052229A1 (zh) 像素电路、显示基板和显示装置
WO2023123239A9 (zh) 显示面板和电子设备
US20240065066A1 (en) Display panel and display device
US20230200155A1 (en) Display substrate and display device
US20240237446A1 (en) Display substrate and display device
US20220045154A1 (en) Display panel and display device
CN116884950A (zh) 显示基板及显示装置
CN114899211A (zh) 显示基板以及显示装置

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 20926363

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

ENP Entry into the national phase

Ref document number: 2020926363

Country of ref document: EP

Effective date: 20221128