WO2021197169A1 - 显示屏、电子设备及裂纹检测方法 - Google Patents

显示屏、电子设备及裂纹检测方法 Download PDF

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Publication number
WO2021197169A1
WO2021197169A1 PCT/CN2021/082787 CN2021082787W WO2021197169A1 WO 2021197169 A1 WO2021197169 A1 WO 2021197169A1 CN 2021082787 W CN2021082787 W CN 2021082787W WO 2021197169 A1 WO2021197169 A1 WO 2021197169A1
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WO
WIPO (PCT)
Prior art keywords
detection
line
display screen
value
layer
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PCT/CN2021/082787
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English (en)
French (fr)
Inventor
李星
杨东
周楠
屈维
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荣耀终端有限公司
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Publication of WO2021197169A1 publication Critical patent/WO2021197169A1/zh

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/87—Passivation; Containers; Encapsulations
    • H10K59/871—Self-supporting sealing arrangements
    • H10K59/8722—Peripheral sealing arrangements, e.g. adhesives, sealants

Definitions

  • the present disclosure relates to the field of electronic technology, and in particular to a display screen, electronic equipment and a crack detection method.
  • the display screens used in electronic devices have also undergone a transition from function to intelligence, which satisfies people’s expectations that the display screen has high brightness, high contrast, wide color gamut, fast response, large viewing angle and Low power consumption and other performance display quality requirements.
  • the screen may crack due to damage, chipping or cracking, etc., causing the display screen to malfunction or even fail. In this way, the process capability, yield, and reliability of the display screen are low. Therefore, it is urgent to propose a complete crack detection scheme for screen crack detection of the display screen, so as to clarify the cause of the failure of the display screen and make targeted improvements.
  • the present invention provides a display screen, electronic equipment and a crack detection method, which can perform crack detection on the full screen of the display screen, and can prevent the circuit used for crack detection from reducing the display aperture ratio of the display screen, and can also avoid being used for crack detection
  • the circuit will cause interference to the original circuit in the display screen and the risk of electrostatic discharge, which improves the process capability, yield and reliability of the display screen.
  • a first aspect of the present invention provides a display screen.
  • the display screen includes an array substrate and a packaging substrate arranged on one side of the array substrate.
  • the display screen further includes a first detection layer; Side, or, the first detection layer is disposed on one side of the packaging substrate; the first detection layer includes a first detection circuit, the first detection circuit includes a plurality of first detection lines, and the first detection line is configured to transmit the first detection signal .
  • the first detection circuit of the first detection layer is not arranged in the same layer with other circuits between the array substrate and the packaging substrate (for example, data driving signal lines or scan driving signal lines, etc.), so there will be no interference between the array substrate and the packaging substrate.
  • the wiring space between the two leads to squeezing, which avoids the line congestion between the array substrate and the package substrate due to the increase of lines for crack detection, thereby avoiding affecting the display aperture ratio of the display screen, and avoiding the crack detection line from affecting the original There are lines that cause interference, which improves the yield and reliability of the display.
  • the display screen is an LCD display screen, the increase in the cost of the backlight caused by the reduction of the display aperture ratio is avoided, thereby saving power and cost.
  • the display is an OLED display
  • it avoids the inability to realize the under-screen fingerprint recognition scheme due to the reduction of the display aperture ratio, which is beneficial for the display to achieve functions that require the display aperture ratio (for example, under-screen fingerprint recognition).
  • the above arrangement also avoids the risk of Electro-Static Discharge (ESD) due to the short distance between the first detection circuit of the first detection layer and the data driving signal line or the scan driving signal line, which causes the display screen to malfunction.
  • ESD Electro-Static Discharge
  • the display screen includes a display area and a frame area, and both the display area and the frame area pass at least one section of the first detection line.
  • the first detection line is made to cover all areas of the display screen as much as possible, ensuring that cracks in each area or even all areas of the display screen can be detected, and the accuracy of detection is improved.
  • each first detection line includes a plurality of first detection line segments connected in sequence, and the extension direction of each first detection line segment is not completely the same; there are two adjacent ones in at least one direction.
  • the width of the gap between the first detection lines is equal. In this way, the first detection line is better laid on the full screen, so that the detection range is larger, and the detection of each area of the display screen is more uniform.
  • the first detection layer further includes a plurality of first detection pins, and two ends of each first detection line are respectively connected to two of the plurality of first detection pins.
  • a detection pin is connected, and the first detection line can be externally connected through the first detection pin.
  • the display screen further includes a second detection layer; the second detection layer and the first detection layer are disposed on the same side of the array substrate or the same side of the packaging substrate; the second detection layer includes The second detection circuit, the second detection circuit includes an input line and a plurality of output lines, one end of the input line is connected to one end of the output line, the input line and the output line are configured to transmit the second detection signal; the output line is perpendicular to the display screen The orthographic projection in the direction of, intersects the orthographic projection of the at least one first detection line in the direction perpendicular to the display screen.
  • the first detection line that is abnormal based on the first detection value will affect the second detection line of the second detection layer that crosses it, so that the second detection line of the second detection layer can be implemented on the substrate of the display screen.
  • the location of the crack that appears is located.
  • the lengths of the multiple output lines are equal to ensure that the impedances of the output lines are the same.
  • each output line includes multiple output line segments connected in sequence, and the extension directions of the output line segments are not completely the same. This can increase the laying length of the output line on the substrate, and make each output line cross the first detection line as much as possible, so that the detection range of the second detection line of the second detection layer is larger and the positioning accuracy is higher. .
  • the output line is arranged in a stepped shape, so that the laying length of the output line is longer and the laying range is larger, so that more crack positions can be located.
  • the materials of the first detection circuit and the second detection circuit are transparent conductive materials to avoid blocking and affecting the aperture ratio of the display screen.
  • the display screen further includes an insulating layer disposed between the first detection layer and the second detection layer, the insulating layer is configured to isolate the first detection circuit from the second detection circuit, To avoid crosstalk between the first detection circuit and the second detection circuit.
  • a second aspect of the present invention provides an electronic device.
  • the electronic device includes a display screen and a control device coupled with the display screen.
  • the control device includes a first detection circuit and a processor coupled to the first detection circuit.
  • the first detection circuit is connected with each first detection line of the first detection circuit in the display screen.
  • the first detection circuit is configured to respectively send a first detection signal to each first detection line, and obtain a first detection value from each first detection line.
  • the processor is configured to determine whether the first detection value of each first detection line is abnormal, and when the first detection value is abnormal, determine that the substrate of the display screen where the corresponding first detection line is located has a crack, So as to realize the crack detection of the display screen.
  • the control device further includes a second detection circuit.
  • the second detection circuit is connected to the input line and each output line of the second detection circuit in the display screen.
  • the second detection circuit is configured to send a second detection signal to the input line and obtain the second detection value from each output line.
  • the processor is coupled to the second detection circuit, and the processor is further configured to determine whether the second detection value of each output line is abnormal, and if the second detection value is abnormal, determine that the second detection value is abnormal There is a first detection line where the first detection value is abnormal in the area where the output line of the output line is located, and it is determined that there is a crack in the area where the output line is located. In this way, based on the detection of cracks, the location of the cracks is realized.
  • the third aspect of the present invention provides a crack detection method, which is applied to the electronic device as described in any one of the above.
  • the crack detection method includes: sending a first detection signal to a first detection circuit. Receive the first detection value of each first detection line in the first detection circuit, and determine whether the first detection value is abnormal; if it is, it is determined that the substrate where the first detection line is located has a crack. Through the above crack detection method, the crack detection of the substrate of the display screen is realized.
  • the crack detection method further includes: The input line in the second detection line sends a second detection signal. Receive the second detection value of the output line in the second detection line, and determine whether the second detection value is abnormal; if so, it is determined that the area where the output line with the second detection value is abnormal has the first detection value abnormality A detection line, and it is determined that there is a crack in the area where the output line is located. In this way, it is possible to locate the location of the crack on the basis of detecting the existence of the crack.
  • FIG. 1 is a cross-sectional view of a display screen according to an embodiment of the disclosure
  • FIG. 2 is a cross-sectional view of another display screen according to an embodiment of the disclosure.
  • 3A is a cross-sectional view of still another display screen according to an embodiment of the disclosure.
  • 3B is a cross-sectional view of still another display screen according to an embodiment of the disclosure.
  • FIG. 4A is a top view of a display screen according to an embodiment of the disclosure.
  • FIG. 4B is a top view of another display screen according to an embodiment of the disclosure.
  • FIG. 4C is a top view of still another display screen according to an embodiment of the disclosure.
  • 4D is a top view of still another display screen according to an embodiment of the disclosure.
  • FIG. 5 is a top view of still another display screen according to an embodiment of the disclosure.
  • FIG. 6 is a cross-sectional view of still another display screen according to an embodiment of the disclosure.
  • FIG. 7 is a flowchart of a crack detection method according to an embodiment of the disclosure.
  • FIG. 8 is a structural block diagram of an electronic device according to an embodiment of the disclosure.
  • FIG. 9 is a cross-sectional view of still another display screen according to an embodiment of the disclosure.
  • FIG. 10 is a cross-sectional view of still another display screen according to an embodiment of the disclosure.
  • FIG. 11A is a cross-sectional view of still another display screen according to an embodiment of the disclosure.
  • FIG. 11B is a cross-sectional view of still another display screen according to an embodiment of the disclosure.
  • FIG. 12 is a top view of still another display screen according to an embodiment of the disclosure.
  • FIG. 13 is a top view of still another display screen according to an embodiment of the disclosure.
  • FIG. 14 is a top view of still another display screen according to an embodiment of the disclosure.
  • FIG. 15 is a top view of still another display screen according to an embodiment of the disclosure.
  • FIG. 16 is a flowchart of another crack detection method according to an embodiment of the disclosure.
  • FIG. 17 is a structural block diagram of another electronic device according to an embodiment of the disclosure.
  • azimuth terms such as “upper”, “lower”, “left”, “right”, etc. may include but are not limited to the directions defined relative to the schematic placement of the components in the drawings. It should be understood that these directions sexual terms can be relative concepts, and they are used for relative description and clarification, and they can change accordingly according to the changes in the orientation of the parts in the drawings.
  • the expressions “coupled” and “connected” and their extensions may be used.
  • the term “connected” may be used when describing some embodiments to indicate that two or more components are in direct physical or electrical contact with each other.
  • the term “coupled” may be used when describing some embodiments to indicate that two or more components have direct physical or electrical contact.
  • the term “coupled” or “communicatively coupled” may also mean that two or more components are not in direct contact with each other, but still cooperate or interact with each other.
  • the embodiments disclosed herein are not necessarily limited to the content of this document.
  • the methods of crack detection on the display screen mainly include peripheral circuit resistance/voltage drop detection, automatic optical inspection (Automated Optical Inspection, AOI), or adding a screen crack detection circuit to the original circuit in the display screen ( Panel Crack Detect, PCD).
  • peripheral circuit resistance/voltage drop detection automatic optical inspection
  • AOI Automatic Optical Inspection
  • PCD Panel Crack Detect
  • peripheral circuit resistance/voltage drop detection refers to setting up crack detection circuits in the peripheral area outside the display area of the display screen.
  • the detection method of peripheral circuit resistance/voltage drop detection can only detect cracks around the display screen, and the detection circuit described above is likely to cause electrostatic discharge (ESD) with the data drive signal line or the scan drive signal line. risk.
  • ESD electrostatic discharge
  • the screen crack detection circuit (PCD) is added to the original circuit in the display screen.
  • the screen crack detection circuit will squeeze the layout space of the original circuit, making the circuit in the display screen crowded.
  • the crack detection circuit not only affects the driving efficiency of the original circuit, but also reduces the display aperture ratio of the display, which leads to an increase in the energy consumption of the display (for a display that needs to provide a backlight, such as a liquid crystal display) or to the display
  • the under-screen fingerprint recognition scheme with high aperture ratio is not feasible.
  • the display screen includes an array substrate 101 and a packaging substrate 102 disposed on one side of the array substrate 101.
  • the array substrate 101 may include a base substrate 1010 and a circuit structure and signal lines provided on the base substrate 1010.
  • the circuit structure includes, for example, at least one of a pixel drive circuit including a thin film transistor (TFT), a data drive circuit, a scan drive circuit, etc.
  • the signal line includes, for example, a data drive signal line, a scan drive signal line, or other leads, etc. At least one of them is not specifically limited in the embodiments of the present disclosure.
  • the base substrate 1010 may be a glass substrate or a flexible substrate, where the flexible substrate may be, for example, a flexible polyimide (PI) substrate, which is not specifically limited in the embodiment of the present disclosure.
  • PI flexible polyimide
  • the packaging substrate 102 is disposed on one side of the array substrate 101 and is used for packaging the array substrate 101 to prevent external impurities, water and oxygen, etc. from entering the inside of the display screen.
  • the display screen is a liquid crystal display (LCD).
  • the packaging substrate 102 may be, for example, a glass substrate (Cover Glass, CG).
  • an electrode layer for example, a pixel electrode layer including a pixel electrode, a common electrode layer including a common electrode
  • an alignment layer for example, a liquid crystal layer, and other structures are also provided between the array substrate 101 and the packaging substrate 102, so that the liquid crystal display can realize images. Display function.
  • the display module including the display also includes a backlight module located on the backlight surface of the liquid crystal display (that is, the surface of the liquid crystal display opposite to the surface for displaying images) (Back Light Unit, BLU).
  • the backlight module can provide a light source to the liquid crystal display, so that each sub-pixel in the liquid crystal display can emit light, thereby realizing image display.
  • the display screen is an Organic Light-Emitting Diode (OLED) display screen.
  • the packaging substrate 102 may be a rigid substrate, such as a glass substrate; or, the packaging substrate 102 may also be a flexible substrate, such as a packaging film, and the packaging film may be, for example, a PET (polyethylene terephthalate) polyester film.
  • the encapsulation film includes, for example, an organic layer and an inorganic layer that are alternately stacked, and the inorganic layer is disposed on the outermost side of the encapsulation film.
  • an electrode layer for example, an anode layer including an anode of the light-emitting device, a cathode layer including a cathode of the light-emitting device
  • a color light-emitting layer of the light-emitting device are also provided between the array substrate 101 and the packaging substrate 102 to make the OLED display The screen realizes the image display.
  • the OLED display screen is provided with a color light-emitting layer, the OLED display screen can realize self-luminescence after receiving the working voltage. Therefore, there is no need to provide a backlight module in a display module with an OLED display screen.
  • the OLED display can be an active-matrix organic light-emitting diode (AMOLED) display or a passive-matrix organic light-emitting diode (PMOLED) display Some embodiments of the present disclosure do not specifically limit this.
  • AMOLED active-matrix organic light-emitting diode
  • PMOLED passive-matrix organic light-emitting diode
  • the display screen further includes a first detection layer 110.
  • the first detection layer 110 is disposed on the side of the array substrate 101 away from the packaging substrate 102; or, as shown in FIGS. 3A and 3B, the first detection layer 110 is disposed on a side of the packaging substrate 102. side.
  • the first detection layer 110 includes a first detection circuit, and the first detection circuit is used for crack detection on the display screen.
  • the first detection circuit of the first detection layer 110 is not arranged in the same layer as other circuits between the array substrate 101 and the packaging substrate 102 (for example, data drive signal lines or scan drive signal lines, etc.), and therefore will not interfere with the array substrate 101.
  • the wiring space between the substrate and the package substrate 102 causes squeezing, which avoids the line congestion between the array substrate 101 and the package substrate 102 due to the addition of lines for crack detection, thereby avoiding affecting the display aperture ratio of the display screen, and The interference of the crack detection circuit to the original circuit is avoided, thereby improving the yield and reliability of the display screen.
  • the display screen is an LCD display screen
  • the increase in the cost of the backlight caused by the reduction of the display aperture ratio is avoided, thereby saving power and cost.
  • the display is an OLED display, it avoids the inability to realize the under-screen fingerprint recognition scheme due to the reduction of the display aperture ratio, which is beneficial for the display to achieve functions that require the display aperture ratio (for example, under-screen fingerprint recognition). accomplish.
  • the above arrangement also avoids the risk of Electro-Static Discharge (ESD) due to the short distance between the first detection circuit of the first detection layer 110 and the data driving signal line or the scan driving signal line, thereby making the display screen unresponsive.
  • ESD Electro-Static Discharge
  • the display screen is a liquid crystal display screen, and the first detection layer 110 is disposed on the side of the array substrate 101 away from the packaging substrate 102.
  • the display screen is an OLED display screen
  • the packaging substrate 102 of the display screen is a packaging film
  • the first detection layer 110 is disposed on the side of the array substrate 101 away from the packaging substrate 102.
  • the first detection layer 110 is disposed on one side of the packaging substrate 102 of the display screen.
  • the display screen is a liquid crystal display screen or an OLED display screen, which is not limited in the embodiment of the present disclosure.
  • FIGS. 3A and 3B only illustrate that the display screen 10 is a liquid crystal display screen as an example.
  • the first detection layer 110 may be disposed on the side of the packaging substrate 102 close to the array substrate 101.
  • a color filter layer for example, a red filter layer, a green filter layer, or a blue filter layer, etc.
  • a color filter layer may be further provided on the side of the packaging substrate 102 close to the array substrate for filtering light. Not limited.
  • the first detection layer 110 may also be disposed on the side of the packaging substrate 102 away from the array substrate 101.
  • the first detection layer 110 is provided on the side of the array substrate 101 away from the packaging substrate 102 as an example for illustration.
  • the first detection layer 110 includes a first detection line
  • the first detection line includes a plurality of first detection lines 111.
  • the plurality of first detection lines 111 are configured to transmit first detection signals. In this way, it is possible to detect the first detection line 111, obtain the first detection value of each first detection line 111, and determine whether the substrate on which the corresponding first detection line 111 is located has a crack according to the first detection value. For example, if the first detection value is abnormal, it is determined that the substrate on which the first detection line corresponding to the first detection value is located has a crack; if the first detection value is not abnormal, it is determined that the first detection value corresponds to the first detection value. The substrate on which the line is located does not have cracks.
  • the first detection signal is a current signal or a voltage signal, which is not limited in some embodiments of the present disclosure.
  • the multiple first detection lines 111 are dispersed as much as possible, and the first detection lines 111 are spread as much as possible on the substrate where they are located.
  • the display screen includes a display area 130 and a frame area 140.
  • the frame area 140 is located around the display area 130.
  • both the display area 130 and the frame area 140 have at least a section of the first detection line 111 passing through.
  • the first detection line 111 is made to cover all areas of the display screen as much as possible, and it is ensured that cracks in all areas and even all areas of the display screen can be detected, so as to use the full screen (full screen including display area 130 and frame area 140) layout
  • the first detection line 111 performs crack detection on the full screen of the display screen 10 to improve the detection accuracy.
  • each first detection line 111 is not closed, and there is no intersection between the first detection lines 111. In this way, mutual interference between the first detection lines 111 can be avoided, so that the detection results of the first detection lines 111 are more accurate.
  • each first detection line 111 includes a plurality of first detection line segments connected in sequence (refer to the first detection line segment S1, the first detection line segment S2, the first detection line segment S3, and the first detection line segment S1 in FIG. 4A.
  • the extension directions of the first detection line segments are not completely the same. In this way, the laying length of the first detection line 111 on the substrate can be increased, thereby increasing the detection range of the first detection line 111.
  • a plurality of first detection lines 111 are arranged at intervals, and each first detection line 111 forms an L-shaped pattern (as shown in FIG. 4A) or a U-shaped pattern. Graphics (as shown in Figure 4B and Figure 4C). In this way, the multiple first detection lines 111 are better laid out in full screen.
  • the width of the gap d between two adjacent first detection lines 111 in at least one direction is the same or approximately the same, so that the first detection lines 111 can be more evenly distributed on the display screen 10 Therefore, the uniformity of the crack detection of the display screen 10 is better.
  • the width of the gap d between two adjacent first detection lines 111 is equal or substantially equal.
  • the width of the gap d between two adjacent first detection lines 111 in at least one direction may also be unequal, for example, the width of the gap between two adjacent first detection lines 111 periodically increases or changes. Small, etc., the embodiments of the present disclosure are not limited thereto.
  • the layout of the multiple first detection lines 111 in the first detection line of the first detection layer 110 will be exemplarily introduced below. It should be understood that the arrangement forms of the plurality of first detection lines 111 include but are not limited to the following.
  • each first detection line 111 includes a first sub-detection line 111a, a second sub-detection line 111b, and a third sub-detection line 111c, and the first sub-detection line 111a and the second sub-detection line 111a
  • the detection line 111b is L-shaped.
  • the first sub-detection line 111a and the second sub-detection line 111b are parallel or substantially parallel to each other and spaced apart from each other.
  • One end of the first sub-detection line 111a is connected to one end of the second sub-detection line 111b through the third sub-detection line 111c.
  • the first sub-detection line 111a includes a first detection line segment S1 and a first detection line segment S2 that are sequentially connected
  • the second sub-detection line 111b includes a first detection line segment S3 and a first detection line segment S4 that are sequentially connected.
  • the first detection line segment S1 and the first detection line segment S4 extend in the same or substantially the same direction
  • the first detection line segment S2 and the first detection line segment S3 extend in the same or substantially the same direction.
  • each first detection line 111 gradually decreases.
  • each first detection line 111 forms an L-shaped pattern, and each first detection line 111 has a corner.
  • the corner points to a certain corner of the display screen 10, such as the upper left corner or the upper right corner.
  • the first detection lines 111 whose corners point to the upper left corner and the first detection lines 111 whose corners point to the upper right corner are alternately arranged at intervals. In this way, the two adjacent first detection lines 111 form a semi-enclosed setting state for the area restricted by the two.
  • the first detection line 111 can be better laid in full screen, the detection area is enlarged, and the crack detection effect is better.
  • each first detection line 111 forms a U-shaped pattern, and the lengths of the plurality of first detection lines 111 are equal or substantially equal, and are arranged side by side along the first direction X.
  • Each first detection line 111 includes three first detection line segments sequentially connected. Among the three first detection line segments, two first detection line segments with the same or substantially the same direction have the same length and the same or substantially the same extension direction.
  • each first detection line 111 also forms a U-shaped pattern.
  • the n-th first detection line 111 is arranged around the n-1th detection line 111, and the length of the n-th first detection line 111 is greater than the length of the n-1th detection line 111 .
  • n is 2, 3,..., N
  • N is the total number of the first detection lines 111.
  • Each first detection line 111 includes three first detection line segments. Among the three first detection line segments, two first detection line segments with the same or substantially the same direction have the same length and the same or substantially the same extension direction.
  • each first detection line 111 is not closed, and each first detection line 111 has an intersection (for example, the intersection 150 shown in FIG. 4D).
  • Each first detection line 111 may include a plurality of sequentially connected first detection line segments (for example, output line segments P1 to P7), and the extension directions of the first detection line segments are not completely the same. In this way, the laying length of the first detection line 111 on the substrate can be increased, so that the detection range of the first detection line of the first detection layer 110 is larger.
  • the first detection layer 110 further includes a plurality of first detection pins 1100, and two ends of each first detection line 111 are respectively connected to two first detection pins of the plurality of first detection pins 1100.
  • the feet 1100 are connected.
  • each first detection line 111 can be externally connected through each first detection pin 1100 (for example, connected to the first detection circuit outside the display screen 10).
  • the display screen 10 has a display area 130 and a frame area 140.
  • the display screen 10 may have a frame area 140 on only one side, or may have a frame area 140 on both sides, or may have a frame area 140 on three sides, or may have a frame area 140 on all four sides (as shown in FIG. 5).
  • Each first detection pin 1100 is disposed in the frame area 140 on at least one side of the display screen 10. The embodiment of the present disclosure does not limit this.
  • all four sides of the display screen 10 have frame areas 140, and all the first detection pins 1100 are arranged in the frame area 140 on the lower side of the display screen 10.
  • each of the first detection pins 1100 may also be all disposed in the frame area 140 on other sides (for example, the upper side, the left side, or the right side), which is not limited in the embodiment of the present disclosure.
  • the first detection pin 1100 can be fixed on the substrate where the first detection circuit 110 is located by bonding.
  • the first detection pin 1100 can be passed through an anisotropic conductive film (Anisotropic Conductive Film, ACF) for bonding.
  • ACF anisotropic Conductive Film
  • the material of the first detection circuit of the first detection layer 110 is a transparent conductive material, so that the first detection layer 110 can transmit light, which can prevent the first detection circuit of the first detection layer 110 from blocking the display screen 10 and affecting the display aperture ratio .
  • the material of the first detection circuit of the first detection layer 110 may be indium tin oxide (ITO), indium zinc oxide (IZO), zinc gallium oxide (GZO), or aluminum-doped zinc oxide (AZO), etc. .
  • ITO indium tin oxide
  • IZO indium zinc oxide
  • GZO zinc gallium oxide
  • AZO aluminum-doped zinc oxide
  • a first protection layer 1301 may be provided on the side of the first detection layer 110 away from the substrate on which it is provided.
  • the material of the first protection layer 1301 may be a transparent insulating material, for example, the material of the first protection layer 1301 is silicon oxide (SiOx).
  • the crack detection method includes: S100-S300.
  • S100 Send a first detection signal to the first detection line of the first detection layer 110.
  • the first detection circuit 210 sends a first detection signal (for example, a voltage signal or a current signal) to each first detection line 111 in the first detection line of the first detection layer 110 through the first detection pin 1100.
  • the first detection circuit 210 may input the first detection signal to one of the first detection pins 1100 connected to each first detection line 111 one by one or simultaneously in a sequence from left to right or from right to left.
  • S200 Receive the first detection value of each first detection line 111 in the first detection line of the first detection layer 110, and determine whether the first detection value is abnormal.
  • the first detection circuit 210 receives a first detection value (for example, a resistance value, a voltage value, or a current value) of each first detection line 111 in the first detection line of the first detection layer 110.
  • the first detection circuit 210 sends the first detection value of each first detection line 111 to the processor 220 (as shown in FIG. 8), and the processor 220 determines whether each first detection value is abnormal.
  • the processor 220 determines whether each first detection value is abnormal. For example, it may determine whether each first detection value matches the first set value. If it matches, the first detection value is not abnormal; if it does not match, the first detection value is abnormal.
  • the first set value may be a certain value or a value interval, which is not limited in the embodiment of the present disclosure.
  • the processor 220 determines whether each first detection value matches the first set value, which may be to determine whether the first detection value is equal to the first set value. If they are equal, the first detection value matches the first set value; if they are not equal, the first detection value does not match the first set value.
  • judging whether the first detection value is equal to the first set value can be determined by calculating the difference between the first detection value and the first set value, if the difference between the first detection value and the first set value is Zero, or the absolute value of the difference between the two is less than or equal to the allowable setting value, then the first detection value is equal to the first setting value; if the difference between the first detection value and the first setting value is not Zero and the absolute value of the difference between the two is greater than the allowable set value, then the first detection value and the first set value are not equal.
  • the processor 220 determines whether each first detection value matches the first set value, which may be whether the first detection value is within the first set value. Within range. If it is, the first detection value matches the first set value; if it is not, the first detection value does not match the first set value.
  • the first detection signal is a current signal
  • the first detection value is a resistance value
  • the first set value is a certain value.
  • the first detection circuit 210 inputs current signals to the input detection pins 111a of the first detection lines 111 one by one in the order from left to right. After that, the first detection circuit 210 receives the resistance value of each first detection line 111 in the first detection line of the first detection layer 110.
  • each first detection line 111 maintains a path, and the resistance value of each first detection line 111 is its normal resistance value in the path state (that is, the first set value) .
  • the first detection line 111 at the position of the crack may be broken or damaged, causing the resistance value of the first detection line 111 to be abnormal (for example, the resistance value of the first detection line 111 is greater than that of the first detection line 111). Setting value).
  • the first detection circuit 210 sends the resistance value of each first detection line 111 to the processor 220, and the processor 220 determines whether each resistance value is equal to the first set value. If the resistance value is equal to the first set value, it means that there is no abnormality in the resistance value, that is, there is no crack at the position where the first detection line 111 corresponding to the resistance value is located; if the resistance value is greater than the first set value (ie, the first Whether the detection value is not equal to the set value), it means that the resistance value is abnormal, that is, the substrate of the first detection line 111 corresponding to the resistance value has a crack.
  • the display screen further includes a second detection layer 120.
  • the second detection layer 120 is disposed on the side of the array substrate 101 away from the packaging substrate 102, or the second detection layer 120 is disposed on one side of the packaging substrate 102, and the second detection layer 120 and the first detection layer 110 are disposed on the array substrate 101 on the same side or on the same side of the package substrate 102.
  • the first detection layer 110 is disposed on the side of the array substrate 101 away from the packaging substrate 102, and the second detection layer 120 It is also arranged on the side of the array substrate 101 away from the packaging substrate 102, and the second detection layer 120 is arranged on the side of the first detection layer 110 away from the array substrate 101.
  • the first detection layer 110 is provided on one side of the packaging substrate 102, and the second detection layer 120 is also provided on the packaging substrate 102 where the first detection layer 110 is located.
  • the second detection layer 120 is disposed on the side of the first detection layer 110 away from the packaging substrate 102.
  • the second detection layer 120 includes a second detection line, and the orthographic projection of the second detection line in the direction perpendicular to the display screen 10 intersects the orthographic projection of the at least one first detection line 111 in the direction perpendicular to the display screen 10, So that when the first detection line 111 is abnormal (for example, the first detection line 111 is broken or damaged), the coupling capacitance of the second detection line of the second detection layer 120 that crosses it can be affected, so that The second detection circuit is abnormal.
  • the first detection layer 110 can detect which specific first detection line 111 has an abnormal first detection value to detect whether there is a crack in the substrate on which it is located.
  • the first detection line 111 that is abnormal based on the first detection value will respond to it.
  • the second detection value of the second detection circuit of the intersecting second detection layer 120 affects the second detection value, so that the position of the crack appearing on the substrate of the display screen 10 can be located by the second detection circuit.
  • the second detection layer 120 and the first detection layer 110 are arranged on the same side of the same substrate, and the second detection layer 120 will not affect the display aperture ratio of the display screen 10, and will not cause interference and static electricity to the original circuit. Electro-Static discharge (ESD) risk.
  • ESD Electro-Static discharge
  • the second detection circuit of the second detection layer 120 includes an input line 121 and a plurality of output lines 122. One end of the input line 121 is connected to one end of the output line 122, and the input line 121 is connected to the output line 122.
  • the output line 122 is configured to transmit the second detection signal. In this way, by inputting the second detection signal to the input line 121, and then detecting each output line 122 connected to the input line 121, the second detection value of each output line 122 can be obtained, and the corresponding detection value can be determined according to each second detection value. Whether the output line 122 is abnormal.
  • the second detection signal may be, for example, a current signal or a voltage signal, which is not limited in the embodiment of the present disclosure.
  • the number of input lines 121 may be at least one, and when the number of input lines 121 is one, multiple output lines 122 may share one input line 121.
  • the orthographic projection of the output line 122 in the direction perpendicular to the display screen 10 intersects the orthographic projection of the at least one first detection line 111 in the direction perpendicular to the display screen 10, so that the first detection line 111 is abnormal.
  • the coupling capacitance of the output line 122 that crosses the output line 122 may be affected, so that the output line 122 is abnormal.
  • a certain first detection line 111 if a certain first detection line 111 is abnormal, it will cause the coupling capacitance of the output line 122 that crosses it to change, resulting in the second detection value of the output line 122 that crosses the first detection line 111 (For example, resistance value, voltage value or current value) is abnormal. In this way, it can be determined that the output line 122 where the second detection value is abnormal and the first detection line 111 that causes the second detection value to be abnormal (that is, the first detection line that crosses the output line and the first detection value is abnormal) There is a crack in the area where the line 111) crosses.
  • the second detection circuit includes an input line 121 and a plurality of output lines 122.
  • the input line 121 is arranged at the position of the bisector of the display screen 10, and the output lines 122 are arranged on both sides of the input line 121.
  • the number can be equal, so that the second detection circuit of the second detection layer 120 has better uniformity when locating the position of the crack in the full screen area.
  • the number of output lines 122 provided on both sides of the input line 121 may also be unequal, which is not limited in the embodiment of the present disclosure.
  • the second detection circuit of the second detection layer 120 includes a plurality of output lines 122, and the length of each output line 122 is equal, so that the impedance of each output line 122 can be ensured to be the same. In this way, when there is no abnormality in each output line 122 and all are connected to the same input line 121, the value of the output signal of each output line 122 is the same.
  • each output line 122 includes a plurality of output line segments (for example, output line segments D1 to D7) connected in sequence, and the extension directions of the output line segments are not completely the same. In this way, the laying length of the output line 122 on the substrate can be increased, and each output line 122 can cross the first detection line 111 as much as possible, so that the detection range of the second detection line of the second detection layer 120 is larger, Higher positioning accuracy.
  • the shape of the output line is not limited, and the length of each output line 122 is equal.
  • the output line 122 is in a sawtooth shape, and the sawtooth of the sawtooth output line is rectangular.
  • the size and extension direction of the sawtooth of each sawtooth-shaped output line 122 may be the same or different, which is not limited in the embodiment of the present disclosure.
  • the full-screen laying includes laying in both the display area 130 and the frame area 140.
  • the second detection circuit of the second detection layer 120 includes one input line 121 and two output lines 122, and one end of each output line 122 is connected to the same end of the input line 121.
  • the input line 121 is arranged at the bisector position of the display screen 10, and the two output lines 122 are respectively located on both sides of the input line 121. In this way, each output line 122 shares the same input line 121, which can ensure that the input of each output line 122 is the same.
  • the output wires 122 are arranged in a stepped shape, so that the laying length of the output wires 122 is longer and the laying range is larger, so that more crack positions can be located.
  • the second detection layer 120 further includes a plurality of second detection pins 1200.
  • the input line 121 is far away from the output line 122 and is connected to the output line 122 with a second detection pin 1200.
  • Each output line 122 is far away from the input line.
  • One end of the connection 121 is also provided with a second detection pin 1200.
  • the second detection pins 1200 are all arranged in the frame area 140 on the same side of the display screen 10.
  • the second detection pins 1200 may be dispersedly arranged in at least two frame areas therein, which is not limited in the embodiment of the present disclosure.
  • the second detection pin 1200 can be fixed on the substrate where the second detection circuit 120 is located by bonding, for example, the second detection pin 1200 can be detected by an anisotropic conductive film (ACF). Pin 1200 is used for bonding.
  • ACF anisotropic conductive film
  • the material of the second detection circuit of the second detection layer 120 is a transparent conductive material. In this way, the second detection layer 120 can transmit light, and the influence of the second detection layer 120 on the display aperture ratio of the display screen 10 can be reduced.
  • the material of the second detection circuit of the second detection layer 120 may be indium tin oxide (ITO), indium zinc oxide (IZO), zinc gallium oxide (GZO), or aluminum-doped zinc oxide (AZO), etc. .
  • ITO indium tin oxide
  • IZO indium zinc oxide
  • GZO zinc gallium oxide
  • AZO aluminum-doped zinc oxide
  • the material of the insulating layer 1302 is an insulating transparent material, for example, the material of the insulating layer 1302 is silicon oxide (SiOx).
  • the thickness of the insulating layer 1302 is relatively thin, so that the first detection circuit of the first detection layer 110 and the second detection circuit of the second detection layer 120 can have a coupling effect.
  • the thickness of the insulating layer 1302 is 10-100 nanometers.
  • the display screen 10 further includes a second detection layer 120 disposed on the side of the second detection layer 120 away from the first detection layer 110.
  • the material of the second protection layer 1303 is an insulating transparent material, for example, the material of the second protection layer 1303 is silicon oxide (SiOx).
  • the crack detection method further includes: S400-S600.
  • S400 Send a second detection signal to the second detection layer 120.
  • the second detection circuit 230 sends a second detection signal (for example, a voltage signal or a current signal) to the input line 121 in the second detection layer 120.
  • a second detection signal for example, a voltage signal or a current signal
  • S500 Receive a second detection value of the output line 122 in the second detection circuit of the second detection layer 120, and determine whether the second detection value is abnormal.
  • the second detection circuit 230 receives the second detection value (for example, the resistance value, the voltage value, or the current value) of each output line 122 in the second detection layer 120 one by one.
  • the second detection circuit 230 sends the second detection value of each output line 122 to the processor 220, and the processor 220 determines whether each second detection value is abnormal.
  • the processor 220 determines whether each second detection value is abnormal. For example, it may determine whether each second detection value matches the second set value. If it matches, the second detection value is not abnormal; if it does not match, the second detection value is abnormal.
  • the second set value may be a certain value or a value interval, which is not limited in the embodiment of the present disclosure.
  • the processor 220 determines whether each second detection value matches the second set value. For example, it may be to determine whether the second detection value matches the second set value. equal. If they are equal, the second detection value matches the second set value; if they are not equal, the second detection value does not match the second set value.
  • judging whether the second detection value is equal to the second set value can be determined by calculating the difference between the second detection value and the second set value, if the difference between the second detection value and the second set value is Zero, or the absolute value of the difference between the two is less than or equal to the allowable setting value, then the second detection value is equal to the second setting value; if the difference between the second detection value and the second setting value is not Zero and the absolute value of the difference between the two is greater than the allowable set value, then the second detection value and the second set value are not equal.
  • the processor 220 determines whether each second detection value matches the second set value, which may be to determine whether the second detection value is within the second set value. Within range. If it is, the second detection value matches the second set value; if it is not, the second detection value does not match the second set value.
  • the region where the output line 122 corresponding to the second detection value is not abnormal does not exist in the first detection line 111 where the first detection value is abnormal.
  • the position information of each output line 122 of the second detection circuit may be pre-stored (for example, pre-stored in the processor 220).
  • the area where the output line 122 with the second detection value is abnormal can be obtained according to the position of each output line 122 pre-stored.
  • the second detection signal is a current signal
  • the second detection value is a voltage value
  • the second set value is a certain value.
  • the second detection circuit 230 inputs a current signal to the input line 121 of the second detection circuit of the second detection layer 120. After that, the second detection circuit 230 receives the voltage value of each output line 122 in the second detection circuit of the second detection layer 120 one by one or at the same time.
  • each first detection line 111 has no abnormality
  • the voltage value of each output line 122 is the normal voltage value in its on-state (that is, the second setting value).
  • the first detection line 111 at the position of the crack may be broken or damaged, resulting in an abnormality in the first detection line 111, which is different from the abnormal first detection line 111 and the output line intersecting it.
  • the change of the coupling capacitance between 122 will cause the voltage value of the output line 122 to be abnormal (for example, the voltage value of the output line 122 is greater than the second set value).
  • the second detection circuit 230 After the second detection circuit 230 receives the voltage value of each output line 122 in the second detection circuit of the second detection layer 120, it sends the voltage value of each output line 122 to the processor 220, and the processor 220 determines whether each voltage value is It is equal to the second set value.
  • the voltage value is equal to the second set value, there is no abnormality in the voltage value, that is, there is no abnormal first detection line 111 in the area where the output line 122 corresponding to the voltage value (ie, the second detection value) is located; If the value is greater than the second set value, the voltage value (that is, the second detection value) is abnormal, that is, there is an abnormal first detection line 111 in the area where the output line 122 corresponding to the voltage value is located, and according to the pre-stored output The position information of the line 122 determines that there is a crack in the area where the output line 122 is located.
  • S400-S600 may be executed after or before S100-S300, or may be executed simultaneously with S100-S300, which is not limited in the embodiments of the present disclosure.
  • the electronic device 1 can be a terminal device with a display interface such as a mobile phone, a TV, a monitor, a tablet computer, a car computer, etc., or a smart display wearable device such as a smart watch, a smart bracelet, or a communication device such as a server, a memory, and a base station. Or smart cars, etc.
  • a terminal device with a display interface such as a mobile phone, a TV, a monitor, a tablet computer, a car computer, etc.
  • a smart display wearable device such as a smart watch, a smart bracelet, or a communication device such as a server, a memory, and a base station. Or smart cars, etc.
  • the embodiments of the present disclosure do not specifically limit the specific form of the above-mentioned electronic device.
  • the electronic device 1 includes a display screen 10 and a control device 20 coupled with the display screen 10.
  • control device 20 includes a first detection circuit 210 and a processor 220 coupled to the first detection circuit 210.
  • the first detection circuit 210 is connected to a plurality of first detection lines 111 of the first detection layer 110 in the display screen 10.
  • the first detection circuit 210 is connected to the plurality of first detection lines 111 of the first detection layer 110 through the first detection pins 1100.
  • the first detection circuit 210 is configured to respectively send a first detection signal to each of the first detection lines 111 and obtain a first detection value from each of the first detection lines 111.
  • the first detection signal may be a voltage signal or a current signal.
  • the processor 220 is configured to determine whether the first detection value of each first detection line 111 is abnormal, and when the first detection value is abnormal, determine whether the corresponding first detection line 111 is located on the display screen 10 There are cracks in the substrate.
  • the first detection value may be one of a resistance value, a voltage value, or a current value, which is not limited in the embodiment of the present disclosure.
  • the first detection value is abnormal, for example, the first detection value does not match the set value.
  • the resistance value of the first detection value as an example, if the resistance value on a certain first detection line 111 does not match the set value (for example, the resistance value is greater than the set value), it is determined that the resistance value is abnormal, that is, its The corresponding first detection line 111 is abnormal.
  • the resistance value of the abnormal first detection line 111 is greater than the set value, indicating that the first detection line 111 is broken, that is, there is a crack at the position where the first detection line 111 is located.
  • the processor 220 may be a central processing unit (Central Processing Unit, CPU), or other general-purpose processors, digital signal processors (Digital Signal Processor, DSP), application specific integrated circuits (Application Specific Integrated Circuit, ASIC), on-site Field-Programmable Gate Array (FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components, etc.
  • the general-purpose processor may be a microprocessor or the processor may also be any conventional processor.
  • the control device 20 of the electronic device 1 further includes a second detection circuit 230.
  • the second detection circuit 230 is connected to the input line 121 and each output line 122 of the second detection circuit of the second detection layer 120 in the display screen 10.
  • the second detection layer 120 further includes a plurality of second detection pins 1200
  • the second detection circuit 230 passes through the second detection pin 1200 and the input line 121 and each output of the second detection circuit of the second detection layer 120.
  • the line 122 is connected.
  • the second detection circuit 230 is configured to send a second detection signal to the input line 121 and obtain the second detection value from each output line 122.
  • the second detection signal may be a voltage signal or a current signal.
  • the processor 220 is also configured to determine whether the second detection value of each output line 122 is abnormal, and if the second detection value is abnormal, determine that the area where the output line 122 where the second detection value is abnormal exists.
  • the first detection line 111 where the first detection value is abnormal and it is determined that there is a crack in the area where the output line 122 is located.
  • the first detection value may be one of a resistance value, a voltage value, or a current value, which is not limited in the embodiment of the present disclosure.
  • the second detection value is abnormal, for example, the second detection value does not match the set value.
  • the second detection value as the voltage value, for example, if the voltage value on a certain output line 122 does not match the set value (for example, the voltage value is greater than the set value), it is determined that the voltage value is abnormal, that is, the voltage value The corresponding output line 122 is abnormal.
  • the voltage value of the abnormal output line 122 is greater than the set value, indicating that the output line 122 is affected by the coupling capacitance generated by the abnormal first detection line 111. That is, there is an abnormal first detection line 111 in the area where the output line 122 corresponding to the voltage value is located, and it is determined that there is a crack in the area where the output line 122 is located.
  • control device 20 may be a main control chip of the electronic device 1, and the main control chip is used for overall control of the realization of various functions of the electronic device 1.
  • the function of the control device 20 (for example, the function of the first detection circuit 210 or the second detection circuit 230) can be realized by setting corresponding functional modules in the main control chip.
  • control device 20 may also be an external test device, and the test program is loaded into the processor of the test device.
  • test equipment may include a separate detection circuit, for example.
  • single-board detection that is, the first detection layer 110, or the first detection layer 110 and the second detection layer 120 are arranged on a separate array substrate or a package substrate; or, after bonding an IC chip (Integrated Circuit Chip)
  • the first detection layer 110, or the first detection layer 110 and the second detection layer 120 are provided on the array substrate or the packaging substrate of the display screen; or, the first detection layer 110 is provided on the array substrate or the packaging substrate of the display module, or The first detection layer 110 and the second detection layer 120.
  • the placement positions of the first detection layer 110 and the second detection layer 120 are as described above, and will not be repeated here.
  • each first detection line 111 can be directly connected to the substrate through each first detection pin 1100
  • the detection circuit is, for example, a lighting test fixture
  • the first detection signal is sent to each first detection line 111, and after the first detection value is obtained from each first detection line 111, it is determined Whether the first detection value of each first detection line 111 is abnormal to determine whether there is a crack in the position of each first detection line 111.
  • each first detection pin 1100 corresponding to each first detection line 111 can be connected to a detection circuit (for example, a lighting test fixture) through a flexible printed circuit (FPC) .
  • a detection circuit for example, a lighting test fixture
  • FPC flexible printed circuit
  • Some embodiments of the present disclosure also provide a computer-readable storage medium (for example, a non-transitory computer-readable storage medium), the computer-readable storage medium stores computer program instructions, and the computer program instructions run on a processor At this time, the processor is caused to execute one or more steps in the crack detection method described in any one of the foregoing embodiments.
  • a computer-readable storage medium for example, a non-transitory computer-readable storage medium
  • the foregoing computer-readable storage medium may include, but is not limited to: magnetic storage devices (for example, hard disks, floppy disks, or magnetic tapes, etc.), optical disks (for example, CD (Compact Disk), DVD (Digital Versatile Disk, Digital universal disk), etc.), smart cards and flash memory devices (for example, EPROM (Erasable Programmable Read-Only Memory), cards, sticks or key drives, etc.).
  • Various computer-readable storage media described in this disclosure may represent one or more devices and/or other machine-readable storage media for storing information.
  • the term "machine-readable storage medium" may include, but is not limited to, wireless channels and various other media capable of storing, containing, and/or carrying instructions and/or data.

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Abstract

一种显示屏（10）、电子设备及裂纹检测方法，其中，显示屏（10）包括阵列基板（101）和设置于阵列基板（101）一侧的封装基板（102），显示屏（10）还包括第一检测层（110）。第一检测层（110）设置于阵列基板（101）远离封装基板（102）的一侧，或者，第一检测层（110）设置于封装基板（102）的一侧。第一检测层（110）包括第一检测线路，第一检测线路包括多条第一检测线（111），第一检测线（111）被配置为传输第一检测信号。这样，可以对显示屏（10）的全屏进行裂纹检测，并且，可以避免用于裂纹检测的线路降低显示屏（10）的显示开口率，也可以避免用于裂纹检测的线路对显示屏（10）内的原有线路产生干扰以及静电释放风险，提高了显示屏（10）的制程能力、良率和可靠性。

Description

显示屏、电子设备及裂纹检测方法
本申请要求于2020年3月31日提交中国专利局、申请号为202010246678.3、申请名称为“显示屏、电子设备及裂纹检测方法”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本公开涉及电子技术领域，尤其涉及一种显示屏、电子设备及裂纹检测方法。
背景技术
随着电子技术的进步和发展，应用于电子设备的显示屏也经历了由功能到智能的转变，满足了人们对显示屏具有高亮度、高对比度、宽色域、快速响应、极大视角和低功耗等性能的显示画质的需求。
目前，显示屏在制备生产、运输或者使用的过程中，其屏幕可能会因为损伤、崩缺或者破裂等而产生裂纹，使得显示屏出现故障甚至失效。这样，使得显示屏的制程能力、良率和可靠性较低。因此，亟需提出完善的裂纹检测方案对显示屏进行屏裂检测，以明确显示屏失效原因，并进行针对性地改善。
发明内容
本发明提供一种显示屏、电子设备及裂纹检测方法，能够对显示屏的全屏进行裂纹检测，并且，可以避免用于裂纹检测的线路降低显示屏的显示开口率，也可以避免用于裂纹检测的线路对显示屏内的原有线路产生干扰以及静电释放风险，提高了显示屏的制程能力、良率和可靠性。
为达到上述目的，本发明采用如下技术方案：
本发明的第一方面提供一种显示屏，显示屏包括阵列基板和设置于阵列基板一侧的封装基板，显示屏还包括第一检测层；第一检测层设置于阵列基板远离封装基板的一侧，或者，第一检测层设置于封装基板的一侧；第一检测层包括第一检测线路，第一检测线路包括多条第一检测线，第一检测线被配置为传输第一检测信号。
这样，第一检测层的第一检测线路不与阵列基板和封装基板之间的其他线路(例如数据驱动信号线或者扫描驱动信号线等)同层设置，因此不会对阵列基板和封装基板之间的布线空间造成挤压，避免了由于增加用于裂纹检测的线路而造成阵列基板和封装基板之间的线路拥挤，从而避免了影响显示屏的显示开口率，并且避免了裂纹检测线路对原有线路产生干扰，进而提高了显示屏的良率和可靠性。并且，在显示屏为LCD显示屏的情况下，避免了由于显示开口率降低造成的背光成本增加，从而节约电能和成本。在显示屏为OLED显示屏的情况下，避免了由于显示开口率降低造成的屏下指纹识别方案无法实现，从而有利于显示屏实现对显示开口率有要求的功能(例如屏下指纹识别)的实现。此外，上述设置也避免了第一检测层的第一检测线路与数据驱动信号线或扫描驱动信号线由于距离较近而产生静电释放(Electro-Static discharge， ESD)风险，从而使得显示屏的故障率更低、可靠性更高。
结合第一方面，在一种可能的设计中，显示屏包括显示区和边框区，显示区和边框区均第一检测线的至少一段经过。这样，使得第一检测线尽量布满显示屏的各个区域，保证了显示屏的各个区域乃至全部区域存在裂纹均能够被检测到，提高检测的准确度。
结合第一方面，在一种可能的设计中，每条第一检测线包括依次相连的多个第一检测线段，各第一检测线段的延伸方向不完全相同；至少有一个方向的相邻两条第一检测线之间的间隙宽度相等。这样，使得第一检测线更好的铺设全屏，以使检测范围更大，并且对显示屏各个区域的检测比较均一。
结合第一方面，在一种可能的设计中，第一检测层还包括多个第一检测引脚，每条第一检测线的两端分别与多个第一检测引脚中的两个第一检测引脚相连，通过第一检测引脚可以将第一检测线进行外接。
结合第一方面，在一种可能的设计中，显示屏还包括第二检测层；第二检测层与第一检测层设置于阵列基板的同一侧或者封装基板的同一侧；第二检测层包括第二检测线路，第二检测线路包括输入线和多条输出线，输入线的一端与输出线的一端连接，输入线与输出线被配置为传输第二检测信号；输出线在垂直于显示屏的方向上的正投影与至少一条第一检测线在垂直于显示屏的方向上的正投影相交叉。这样，基于第一检测值出现异常的第一检测线会对与其相交叉的第二检测层的第二检测线路产生影响，从而第二检测层的第二检测线路可以实现对显示屏的基板上所出现的裂纹位置进行定位。
可选的，多条所述输出线的长度相等，以确保各输出线的阻抗相同。
可选的，每条输出线包括依次相连的多个输出线段，各输出线段的延伸方向不完全相同。这样可以增加输出线在基板上的铺设长度，并使每条输出线尽可能多的与第一检测线形成交叉，使得第二检测层的第二检测线路的检测范围更大、定位精度更高。
可选的，输出线呈阶梯状设置，以使输出线的铺设长度更长、铺设范围更大，从而能够对更多位置的裂纹位置进行定位。
可选的，第一检测线路和第二检测线路的材料为透明导电材料，以避免造成遮挡而影响显示屏的开口率。
结合第一方面，在一种可能的设计中，显示屏还包括设置于第一检测层和第二检测层之间的绝缘层，绝缘层被配置为隔离第一检测线路和第二检测线路，以避免第一检测线路和第二检测线路发生串扰。
本发明的第二方面提供一种电子设备，电子设备包括：显示屏、与显示屏耦接的控制装置。控制装置包括：第一检测电路、与第一检测电路耦接的处理器。第一检测电路与显示屏中的第一检测线路的各条第一检测线连接。第一检测电路被配置为，分别向各条第一检测线发送第一检测信号，并从各条第一检测线中获取第一检测值。处理器被配置为，判断各条第一检测线的第一检测值是否出现异常，并在第一检测值出现异常的情况下，确定相应的第一检测线所在的显示屏的基板存在裂纹，从而实现对显示屏的裂纹检测。
结合第二方面，在一种可能的设计中，在显示屏还包括第二检测线路的情况下， 控制装置还包括第二检测电路。第二检测电路与显示屏中的第二检测线路的输入线和各输出线连接。第二检测电路被配置为，向输入线发送第二检测信号，并从各输出线中获取第二检测值。处理器与第二检测电路耦接，处理器还被配置为，判断各条输出线的第二检测值是否出现异常，并在第二检测值出现异常的情况下，确定第二检测值出现异常的输出线所在的区域存在第一检测值出现异常的第一检测线，并确定该输出线所在的区域存在裂纹。这样，在检测裂纹的基础上实现了对出现裂纹位置的定位。
本发明的第三方面提供一种裂纹检测方法，该裂纹检测方法应用于如以上任一项所述的电子设备。该裂纹检测方法包括：向第一检测线路发送第一检测信号。接收第一检测线路中的每条第一检测线的第一检测值，并判断第一检测值是否出现异常；若是，则确定该第一检测线所在的基板存在裂纹。通过上述裂纹检测方法，实现了对显示屏的基板的裂纹检测。
结合第三方面，在一种可能的设计中，在电子设备的控制装置还包括第二检测电路、电子设备的显示屏还包括第二检测线路的情况下，该裂纹检测方法还包括：向第二检测线路中的输入线发送第二检测信号。接收第二检测线路中的输出线的第二检测值，并判断第二检测值是否出现异常；若是，则确定第二检测值出现异常的输出线所在的区域存在第一检测值出现异常的第一检测线，并确定该输出线所在的区域存在裂纹。从而实现了在检测到裂纹存在的基础上，对出现裂纹的位置进行定位。
附图说明
为了更清楚地说明本公开中的技术方案，下面将对本公开一些实施例中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本公开的一些实施例的附图，对于本领域普通技术人员来讲，还可以根据这些附图获得其他的附图。此外，以下描述中的附图可以视作示意图，并非对本公开实施例所涉及的产品的实际尺寸、方法的实际流程等的限制。
图1为本公开实施例的一种显示屏的剖视图；
图2为本公开实施例的另一种显示屏的剖视图；
图3A为本公开实施例的再一种显示屏的剖视图；
图3B为本公开实施例的又一种显示屏的剖视图；
图4A为本公开实施例的一种显示屏的俯视图；
图4B为本公开实施例的另一种显示屏的俯视图；
图4C为本公开实施例的再一种显示屏的俯视图；
图4D为本公开实施例的又一种显示屏的俯视图；
图5为本公开实施例的又一种显示屏的俯视图；
图6为本公开实施例的又一种显示屏的剖视图；
图7为本公开实施例的一种裂纹检测方法的流程图；
图8为本公开实施例的一种电子设备的结构框图；
图9为本公开实施例的又一种显示屏的剖视图；
图10为本公开实施例的又一种显示屏的剖视图；
图11A为本公开实施例的又一种显示屏的剖视图；
图11B为本公开实施例的又一种显示屏的剖视图；
图12为本公开实施例的又一种显示屏的俯视图；
图13为本公开实施例的又一种显示屏的俯视图；
图14为本公开实施例的又一种显示屏的俯视图；
图15为本公开实施例的又一种显示屏的俯视图；
图16为本公开实施例的另一种裂纹检测方法的流程图；
图17为本公开实施例的另一种电子设备的结构框图。
具体实施方式
下面将结合附图，对本公开一些实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本公开一部分实施例，而不是全部的实施例。基于本公开所提供的实施例，本领域普通技术人员所获得的所有其他实施例，都属于本公开保护的范围。
除非另作定义，本公开使用的技术术语或者科学术语应当为本领域技术人员所理解的通常意义。本公开说明书以及权利要求书中使用的术语“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分不同的组成部分。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个该特征。在本公开实施例的描述中，除非另有说明，“多个”的含义是两个或两个以上。
此外，本公开中，“上”、“下”、“左”、“右”等方位术语可以包括但不限于相对附图中的部件示意置放的方位来定义的，应当理解到，这些方向性术语可以是相对的概念，它们用于相对于的描述和澄清，其可以根据附图中部件附图所放置的方位的变化而相应地发生变化。
在描述一些实施例时，可能使用了“耦接”和“连接”及其衍伸的表达。例如，描述一些实施例时可能使用了术语“连接”以表明两个或两个以上部件彼此间有直接物理接触或电接触。又如，描述一些实施例时可能使用了术语“耦接”以表明两个或两个以上部件有直接物理接触或电接触。然而，术语“耦接”或“通信耦合”也可能指两个或两个以上部件彼此间并无直接接触，但仍彼此协作或相互作用。这里所公开的实施例并不必然限制于本文内容。
相关技术中，对显示屏进行裂纹检测的方式主要包括周边线路阻值/压降侦测、自动光学检测(Automated Optical Inspection，AOI)或者在显示屏内的原有线路中增加屏幕裂纹检测线路(Panel Crack Detect，PCD)。
其中，周边线路阻值/压降侦测是指在显示屏的显示区外的周边区域设置裂纹检测线路。然而，周边线路阻值/压降侦测的检测方法仅能对显示屏周边进行裂纹检测，并且上述检测线路容易与数据驱动信号线或扫描驱动信号线产生静电释放(Electro-Static discharge，ESD)风险。
此外，在显示屏内的原有线路中增加屏幕裂纹检测线路(PCD)，屏幕裂纹检测线路会对原有线路的布置空间造成挤压，使得显示屏内的线路拥挤。这样，裂纹检测线路不仅影响原有线路的驱动效力，而且降低显示屏的显示开口率，从而导致显示屏的能耗上升(对于需要提供背光的显示屏，例如液晶显示屏而言)或者对显示开口率要求很高的屏下指纹识别方案不可行。
基于此，本公开一些实施例提供一种显示屏，如图1所示，显示屏包括阵列基板 101和设置于阵列基板101一侧的封装基板102。示例性地，阵列基板101可以包括衬底基板1010以及设置于衬底基板1010上的电路结构和信号线。电路结构例如包括包括薄膜晶体管(Thin Film Transistor，TFT)的像素驱动电路、数据驱动电路、扫描驱动电路等中的至少一种，信号线例如包括数据驱动信号线、扫描驱动信号线或者其他引线等中的至少一种，本公开实施例对此不作具体限定。
衬底基板1010可以为玻璃基板或者柔性基板，其中，柔性基板例如可以是柔性聚酰亚胺(PI)基板，本公开实施例对此不作具体限定。
封装基板102设置于阵列基板101的一侧，用于对阵列基板101进行封装，以起到避免外界杂质、水氧等侵入显示屏内部的作用。
在一些示例中，如图1所示，显示屏为液晶显示屏(Liquid Crystal Display，LCD)。在此情况下，封装基板102例如可以是玻璃基板(Cover Glass，CG)。
通常，阵列基板101和封装基板102之间还设置有电极层(例如包括像素电极的像素电极层、包括公共电极的公共电极层)、取向层、液晶层等结构，以使液晶显示屏实现图像显示功能。
此外，在显示屏为液晶显示屏的情况下，包括显示屏的显示模组还包括位于液晶显示屏的背光面(即液晶显示屏中与用于显示画面的表面相对的表面)的背光模组(Back Light Unit，BLU)。背光模组可以向液晶显示屏提供光源，以使液晶显示屏中的各个亚像素能够发光，进而实现图像显示。
在另一些示例中，如图2所示，显示屏为有机发光二极管(OrganicLight-Emitting Diode，OLED)显示屏。在此情况下，封装基板102可以是刚性基板，例如玻璃基板；或者，封装基板102也可以是柔性基板，例如封装薄膜，封装薄膜例如可以是PET(Poly ethylene terephthalate)聚酯薄膜。其中，封装薄膜例如包括层叠交替设置的有机层和无机层，且无机层设置于封装薄膜的最外侧。
通常，阵列基板101和封装基板102之间还设置有电极层(例如包括发光器件的阳极的阳极层、包括发光器件的阴极的阴极层)、发光器件的彩色发光层等结构，以使OLED显示屏实现图像显示。
由于OLED显示屏中设置有彩色发光层，所以OLED显示屏在接收到工作电压后，可以实现自发光。因此，具有OLED显示屏的显示模组中无需再设置背光模组。
此外，OLED显示屏可以为主动矩阵有机电激发光二极管(Active-matrix organic light-emitting diode，AMOLED)显示屏或者被动矩阵有机电激发光二极管(Passive-matrix organic light-emitting diode，PMOLED)显示屏，本公开一些实施例对此不作具体限定。
在一些实施例中，显示屏还包括第一检测层110。如图1和图2所示，第一检测层110设置于阵列基板101远离封装基板102的一侧；或者，如图3A和图3B所示，第一检测层110设置于封装基板102的一侧。第一检测层110包括第一检测线路，第一检测线路用于对显示屏进行裂纹检测。
这样，第一检测层110的第一检测线路不与阵列基板101和封装基板102之间的其他线路(例如数据驱动信号线或者扫描驱动信号线等)同层设置，因此不会对阵列基板101和封装基板102之间的布线空间造成挤压，避免了由于增加用于裂纹检测的 线路而造成阵列基板101和封装基板102之间的线路拥挤，从而避免了影响显示屏的显示开口率，并且避免了裂纹检测线路对原有线路产生干扰，进而提高了显示屏的良率和可靠性。
并且，在显示屏为LCD显示屏的情况下，避免了由于显示开口率降低造成的背光成本增加，从而节约电能和成本。在显示屏为OLED显示屏的情况下，避免了由于显示开口率降低造成的屏下指纹识别方案无法实现，从而有利于显示屏实现对显示开口率有要求的功能(例如屏下指纹识别)的实现。
此外，上述设置也避免了第一检测层110的第一检测线路与数据驱动信号线或扫描驱动信号线由于距离较近而产生静电释放(Electro-Static discharge，ESD)风险，从而使得显示屏的故障率更低、可靠性更高。
在一些示例中，如图1所示，显示屏为液晶显示屏，第一检测层110设置于其阵列基板101远离封装基板102的一侧。如图2所示，显示屏为OLED显示屏，显示屏的封装基板102为封装薄膜，第一检测层110设置于其阵列基板101远离封装基板102的一侧。
在另一些示例中，如图3A和图3B所示，第一检测层110设置于显示屏的封装基板102的一侧。其中，显示屏为液晶显示屏或者OLED显示屏，本公开实施例对此不作限定，图3A和图3B仅以显示屏10为液晶显示屏为例进行示意。
如图3A所示，第一检测层110可以设置在封装基板102靠近阵列基板101的一侧。此外，封装基板102靠近阵列基板的一侧可能还设置有彩色滤光层(例如红色滤光层、绿色滤光层或者蓝色滤光层等)，以进行滤光，本公开实施例对此不作限定。
如图3B所示，第一检测层110还可以设置在封装基板102远离阵列基板101的一侧。
需要说明的是，在以下实施例中，均以第一检测层110设置于阵列基板101远离封装基板102的一侧表为例进行示意。
在一些实施例中，如图4A、图4B和图4C所示，第一检测层110包括第一检测线路，第一检测线路包括多条第一检测线111。多条第一检测线111被配置为传输第一检测信号。这样，可以实现对第一检测线111进行检测，并获取各第一检测线111的第一检测值，根据第一检测值判断其对应的第一检测线111所在的基板是否具有裂纹。例如，若第一检测值出现异常，则确定该第一检测值对应的第一检测线所在的基板具有裂纹；若第一检测值没有出现异常，则确定该第一检测值对应的第一检测线所在的基板不具有裂纹。
示例性地，第一检测信号为电流信号或者电压信号，本公开一些实施例对此不作限定。
示例性地，如图4A所示，在对多条第一检测线111进行布置时，尽可能使多条第一检测线111分散，并尽可能的将第一检测线111铺满其所在基板的全部区域。显示屏包括显示区130和边框区140，例如，以图4A中矩形虚线框为界限，边框区140位于显示区130的四周。并且，显示区130和边框区140均有第一检测线111的至少一段经过。这样，使得第一检测线111尽量布满显示屏的各个区域，保证了显示屏的各个区域乃至全部区域存在裂纹均能够被检测到，以利用全屏(全屏包括显示区130 和边框区140)布置的第一检测线111对显示屏10的全屏进行裂纹检测，提高检测的准确度。
在一些实施例中，如图4A、图4B和图4C所示，每条第一检测线111所形成的图像不是封闭的，且各第一检测线111之间没有交点。这样，可以避免各第一检测线111之间互相干扰，使得各第一检测线111检测结果更加准确。
在一些实施例中，每条第一检测线111包括依次相连的多个第一检测线段(参考图4A中的第一检测线段S1、第一检测线段S2、第一检测线段S3、第一检测线段S4和第一检测线段S5)，各第一检测线段的延伸方向不完全相同。这样可以增加第一检测线111在基板上的铺设长度，从而增大第一检测线111的检测范围。
在一些实施例中，如图4A、图4B、图4C所示，多条第一检测线111间隔设置，每条第一检测线111形成L形图形(如图4A所示)、或者U形图形(如图4B、图4C所示)。这样使得多条第一检测线111更好的铺设全屏。
在一些实施例中，至少有一个方向的相邻两条第一检测线111之间的间隙d的宽度相等或者大致相等，这样可以使第一检测线111在显示屏10上比较均匀地全屏分布，从而对显示屏10的裂纹检测的均一性更好。示例性地，如图4A所示，沿第二方向Y，相邻两条第一检测线111之间的间隙d的宽度相等或者大致相等。
此外，至少有一个方向的相邻两条第一检测线111之间的间隙d的宽度也可以不相等，例如相邻两条第一检测线111之间的间隙宽度周期性的变大或变小，等等，本公开实施例不限于此。
下面对第一检测层110的第一检测线路中多条第一检测线111的布置形式进行示例性地介绍。应当理解的是，多条第一检测线111的布置形式包括但不限于以下几种。
示例性地，如图4A所示，每条第一检测线111包括第一子检测线111a、和第二子检测线111b和第三子检测线111c，第一子检测线111a和第二子检测线111b呈L形。第一子检测线111a与第二子检测线111b相互平行或大致平行且相互间隔设置，第一子检测线111a的一端通过第三子检测线111c与第二子检测线111b的一端连接。
如图4A所示，第一子检测线111a包括依次相连的第一检测线段S1和第一检测线段S2，第二子检测线111b包括依次相连的第一检测线段S3和第一检测线段S4。第一检测线段S1和第一检测线段S4延伸方向相同或大致相同，第一检测线段S2和第一检测线段S3延伸方向相同或大致相同。
在由显示屏10的左右两边向其平分线延伸的方向上(如图4A中虚线箭头所示)，每条第一检测线111的长度逐渐减小。
如图4A所示，每条第一检测线111形成L形图形，每条第一检测线111具有一个拐角。拐角指向显示屏10的某一个角，例如左上方的角或者右上方的角。拐角指向左上方的角的第一检测线111与拐角指向右上方的角的第一检测线111交替间隔布置。这样，相邻的两条第一检测线111对二者所限制的区域形成半包围设置状态。可以使第一检测线111更好的全屏铺设，增大检测区域，使得裂纹检测效果更好。
示例性地，如图4B所示，每条第一检测线111形成U形图形，多条第一检测线111的长度相等或大致相等，且沿第一方向X并列设置。每条第一检测线111包括依次相连三个第一检测线段，三个第一检测线段中，方向相同或大致相同的两个第一检 测线段的长度相等，且延伸方向相同或大致相同。
示例性地，如图4C所示，每条第一检测线111也形成U形图形。多条第一检测线111中，第n条第一检测线111围绕第n-1条检测线111设置，且第n条第一检测线111的长度大于第n-1条检测线111的长度。其中，n为2，3，…，N，N为第一检测线111的总数。每条第一检测线111包括三个第一检测线段，三个第一检测线段中，方向相同或大致相同的两个第一检测线段的长度相等，且延伸方向相同或大致相同。
在一些实施例中，如图4D所示，每条第一检测线111所形成的图像不是封闭的，且各第一检测线111之间具有交点(例如图4D中示出的交点150)。每条第一检测线111可以包括多个依次相连的第一检测线段(例如输出线段P1～P7)，各第一检测线段的延伸方向不完全相同。这样可以增加第一检测线111在基板上的铺设长度，使得第一检测层110的第一检测线路的检测范围更大。
如图5所示，第一检测层110还包括多个第一检测引脚1100，每条第一检测线111的两端分别与多个第一检测引脚1100中的两个第一检测引脚1100相连。这样，各第一检测线111可以通过各第一检测引脚1100进行外接(例如接入到显示屏10外部的第一检测电路)。
如图5所示，显示屏10具有显示区130和边框区140。示例性地，显示屏10可以只有一边具有边框区140，也可以两边具有边框区140，也可以三边具有边框区140，也可以四边都具有边框区140(如图5所示)。各第一检测引脚1100设置于显示屏10至少一边的边框区140中。本公开实施例对此不作限定。
例如，如图5所示，显示屏10的四边都具有边框区140，各第一检测引脚1100全部设置于显示屏10下侧一边的边框区140中。当然，各第一检测引脚1100也可以全部设置于其他边的边框区140中(例如上侧一边、左侧一边或者右侧一边)，本公开实施例对此不作限定。
此外，第一检测引脚1100可通过邦定(bonding)的方式固定于第一检测电路110所在的基板上，例如，第一检测引脚1100可通过异方性导电胶膜(Anisotropic Conductive Film，ACF)进行邦定。
第一检测层110的第一检测线路的材料为透明导电材料，这样第一检测层110可以透光，可以避免第一检测层110的第一检测线路对显示屏10造成遮挡而影响显示开口率。
示例性地，第一检测层110的第一检测线路的材料可以是铟锡氧化物(ITO)、铟锌氧化物(IZO)、锌镓氧化物(GZO)或者掺铝氧化锌(AZO)等。
如图6所示，为了保护第一检测层110的第一检测线路，可以在第一检测层110远离其所设置的基板的一侧设置第一保护层1301。
第一保护层1301的材料可以为透明绝缘材料，例如第一保护层1301的材料为氧化硅(SiOx)。
以上是对第一检测层110的第一检测线路的布置的介绍，本公开一些实施例还提供一种裂纹检测方法。
如图7所示，该裂纹检测方法包括：S100～S300。
S100：向第一检测层110的第一检测线路发送第一检测信号。
示例性地，第一检测电路210通过第一检测引脚1100向第一检测层110的第一检测线路中的各第一检测线111发送第一检测信号(例如电压信号或者电流信号)。其中，第一检测电路210可以按照从左向右或者从右向左的顺序，逐一或者同时向各第一检测线111所连接的第一检测引脚1100中的一个输入第一检测信号。
S200：接收第一检测层110的第一检测线路中的每条第一检测线111的第一检测值，并判断第一检测值是否出现异常。
示例性地，第一检测电路210接收第一检测层110的第一检测线路中的每条第一检测线111的第一检测值(例如电阻值、电压值或者电流值)。第一检测电路210将各第一检测线111的第一检测值发送到处理器220(如图8所示)，处理器220判断各第一检测值是否异常。
处理器220判断各第一检测值是否异常，例如，可以是判断各第一检测值是否与第一设定值匹配。若匹配，则第一检测值没有出现异常；若不匹配，则第一检测值出现异常。
其中，第一设定值可以是一个确定数值，也可以是一个数值区间，本公开实施例对此不作限定。
例如，在第一设定值为一个确定数值的情况下，处理器220判断各第一检测值是否与第一设定值匹配，可以是判断第一检测值是否与第一设定值相等。若相等，则第一检测值与第一设定值匹配；若不相等，则第一检测值与第一设定值不匹配。
示例性地，判断第一检测值是否与第一设定值相等可以是通过计算第一检测值与第一设定值差值进行判断，若第一检测值与第一设定值差值为零、或者两者之间的差值的绝对值小于或等于允许的设定值，则第一检测值与第一设定值相等；若第一检测值与第一设定值差值不为零且两者之间的差值的绝对值大于允许的设定值，则第一检测值与第一设定值不相等。
又如，在第一设定值为一个数值区间的情况下，处理器220判断各第一检测值是否与第一设定值匹配，可以是判断第一检测值是否在第一设定值的范围内。若在，则第一检测值与第一设定值匹配；若不在，则第一检测值与第一设定值不匹配。
S300：若第一检测值出现异常，则确定该第一检测线111所在的基板存在裂纹。
此外，若第一检测值未出现异常，则确定该第一检测线111所在的位置不存在裂纹。
示例性地，以第一检测信号为电流信号、第一检测值为电阻值、第一设定值是一个确定数值为例。第一检测电路210按照从左向右的顺序，逐一向各第一检测线111的输入检测引脚111a输入电流信号。之后，第一检测电路210接收第一检测层110的第一检测线路中的每条第一检测线111的电阻值。
需要说明的是，在屏幕没有裂纹的情况下，各第一检测线111保持通路，各第一检测线111的电阻值为其在通路状态下的正常电阻值(也即第一设定值)。在屏幕出现裂纹的情况下，裂纹位置处的第一检测线111可能会出现断裂或者损坏，导致该第一检测线111的电阻值出现异常(例如该第一检测线111的电阻值大于第一设定值)。
第一检测电路210将各第一检测线111的电阻值发送到处理器220，处理器220判断各电阻值是否与第一设定值相等。若电阻值等于第一设定值，则说明该电阻值没 有出现异常，即该电阻值对应的第一检测线111所在的位置没有出现裂纹；若电阻值大于第一设定值(即第一检测值是否与其设定值不相等)，则说明该电阻值出现异常，即该电阻值对应的第一检测线111的基板存在裂纹。
在一些实施例中，如图9、图10、图11A和图11B所示，显示屏还包括第二检测层120。第二检测层120设置于阵列基板101远离封装基板102的一侧，或者，第二检测层120设置于封装基板102的一侧，且第二检测层120与第一检测层110设置于阵列基板101同一侧或者封装基板102的同一侧。
例如，如图9(显示屏为液晶显示屏)和图10(显示屏为OLED显示屏)所示，第一检测层110设置于阵列基板101远离封装基板102的一侧，第二检测层120也设置于阵列基板101远离封装基板102的一侧，且第二检测层120设置于第一检测层110远离阵列基板101的一侧。
如图11A和图11B所示(显示屏均为液晶显示屏)，第一检测层110设置于封装基板102的一侧，第二检测层120也设置于第一检测层110所在的封装基板102的一侧，且第二检测层120设置于第一检测层110远离封装基板102的一侧。
第二检测层120包括第二检测线路，第二检测线路在垂直于显示屏10的方向上的正投影与至少一条第一检测线111在垂直于显示屏10的方向上的正投影相交叉，以使在第一检测线111出现异常(例如第一检测线111出现断裂或者损坏)的情况下，可以对与其相交叉的第二检测层120的第二检测线路的耦合电容产生影响，从而使得该第二检测线路出现异常。
通过第一检测层110可以检测出具体哪条第一检测线111的第一检测值出现异常以检测出其所在基板是否存在裂纹，基于第一检测值出现异常的第一检测线111会对与其相交叉的第二检测层120的第二检测线路的第二检测值产生影响，从而通过第二检测线路可以实现对显示屏10的基板上所出现的裂纹位置进行定位。
并且，第二检测层120与第一检测层110设置于同一基板的同一侧，第二检测层120也不会影响显示屏10的显示开口率降，并且不会对原有线路产生干扰和静电释放(Electro-Static discharge，ESD)风险。
在一些实施例中，如图12所示，第二检测层120的第二检测线路包括输入线121和多条输出线122，输入线121的一端与输出线122的一端连接，输入线121与输出线122被配置为传输第二检测信号。这样，通过向输入线121输入第二检测信号，然后对与输入线121相连的各输出线122进行检测，可以得到各输出线122的第二检测值，根据各第二检测值判断其对应的输出线122是否存在异常。其中，第二检测信号例如可以是电流信号或者电压信号，本公开实施例对此不作限定。需要说明的是，输入线121的数量可以是至少一条，在输入线121的数量为一条的情况下，多条输出线122可以共用一条输入线121。
由此，输出线122在垂直于显示屏10的方向上的正投影与至少一条第一检测线111在垂直于显示屏10的方向上的正投影相交叉，以使第一检测线111出现异常的情况下，可以对与其相交叉的输出线122的耦合电容产生影响，从而使得该输出线122出现异常。
示例性地，若某一第一检测线111出现异常，会引起与其相交叉的输出线122的 耦合电容发生变化，从而导致与该第一检测线111相交叉的输出线122的第二检测值(例如电阻值、电压值或者电流值)出现异常。这样，可以确定第二检测值出现异常的输出线122与导致其第二检测值出现异常的第一检测线111(也即与该输出线相交叉的且第一检测值出现异常的第一检测线111)的交叉位置所在的区域存在裂纹。
示例性地，如图12所示，第二检测线路包括一条输入线121和多条输出线122，输入线121设置于显示屏10的平分线位置，设置于输入线121两侧的输出线122的数量可以相等，这样使得第二检测层120的第二检测线路对全屏区域内的裂纹的位置进行定位时的均一性更好。当然，设置于输入线121两侧的输出线122的数量也可以不相等，本公开实施例对此不作限定。
如图12所示，第二检测层120的第二检测线路包括多条输出线122，各条输出线122的长度相等，这样可以确保各输出线122的阻抗相同。这样，在各输出线122均没有异常且均与同一输入线121连接的情况下，各输出线122的输出信号的值相同。
如图12所示，每条输出线122包括依次相连的多个输出线段(例如输出线段D1～D7)，各输出线段的延伸方向不完全相同。这样可以增加输出线122在基板上的铺设长度，并使每条输出线122尽可能多的与第一检测线111形成交叉，使得第二检测层120的第二检测线路的检测范围更大、定位精度更高。
本公开一些实施例对输出线的形状不作限定，以各输出线122的长度相等为限。
示例性地，如图12所示，输出线122呈锯齿状，并且锯齿状输出线的锯齿为矩形。各锯齿状输出线122的锯齿的大小和延伸方向可以相同或不相同，本公开实施例对此不作限定。
示例性地，如图13所示，在各输出线122的长度相等的情况下，各输出线122所包括的依次相连的多个输出线段的个数以及各输出线段的延伸方向无特定规律设置。这样有助于实现第二检测层120全屏铺设。其中，全屏铺设包括在显示区130和边框区140均进行铺设。
在一些实施例中，如图14所示，第二检测层120的第二检测线路包括一条输入线121和两条输出线122，各输出线122的一端均与输入线121的同一端连接。输入线121设置于显示屏10的平分线位置，两条输出线122分别位于输入线121的两侧。这样，各输出线122共用同一输入线121，可以确保各输出线122的输入相同。
如图14所示，输出线122呈阶梯状设置，这样使得输出线122的铺设长度更长、铺设范围更大，从而能够对更多位置的裂纹位置进行定位。
如图15所示，第二检测层120还包括多个第二检测引脚1200，输入线121远离与输出线122连接的一端设置有第二检测引脚1200，各输出线122远离与输入线121连接的一端也设置有第二检测引脚1200。
例如，如图15所示，各第二检测引脚1200全部设置于显示屏10同一侧的边框区140中。当然，在包括多个边框区140的情况下，第二检测引脚1200可以分散设置在其中的至少两个边框区内，本公开实施例对此不作限定。
此外，第二检测引脚1200可通过邦定(bonding)的方式固定于第二检测电路120所在的基板上，例如，可通过异方性导电胶膜(Anisotropic Conductive Film，ACF)对第二检测引脚1200进行邦定。
第二检测层120的第二检测线路的材料为透明导电材料。这样第二检测层120可以透光，可以减轻第二检测层120对显示屏10的显示开口率的影响。
示例性地，第二检测层120的第二检测线路的材料可以是铟锡氧化物(ITO)、铟锌氧化物(IZO)、锌镓氧化物(GZO)或者掺铝氧化锌(AZO)等。
如图9、图10、图11A和图11B所示，为了隔离第一检测层110的第一检测线路与第二检测层120的第二检测线路，可以在第一检测层110与第二检测层120之间设置绝缘层1302。
绝缘层1302的材料为绝缘透明材料，例如，绝缘层1302的材料为氧化硅(SiOx)。并且，绝缘层1302的厚度较薄，以使第一检测层110的第一检测线路和第二检测层120的第二检测线路之间可以产生耦合作用。例如，绝缘层1302的厚度为10～100纳米。
如图9、图10、图11A和图11B所示，为了保护第二检测层120的第二检测电路，显示屏10还包括设置于第二检测层120远离第一检测层110一侧的第二保护层1303。
第二保护层1303的材料为绝缘透明材料，例如，第二保护层1303的材料为氧化硅(SiOx)。
以上是对第二检测层120的第二检测线路的布置的介绍，基于此，使用第二检测线路进行裂纹检测时，如图16所示，其裂纹检测方法还包括：S400～S600。
S400：向第二检测层120发送第二检测信号。
示例性地，第二检测电路230向第二检测层120中的输入线121发送第二检测信号(例如电压信号或者电流信号)。
S500：接收第二检测层120的第二检测线路中的输出线122的第二检测值，并判断第二检测值是否出现异常。
示例性地，第二检测电路230逐一接收第二检测层120中的各输出线122的第二检测值(例如电阻值、电压值或者电流值)。第二检测电路230将各输出线122的第二检测值发送到处理器220，处理器220判断各第二检测值是否异常。
处理器220判断各第二检测值是否异常，例如，可以是判断各第二检测值是否与第二设定值匹配。若匹配，则第二检测值没有出现异常；若不匹配，则第二检测值出现异常。
其中，第二设定值可以是一个确定数值，也可以是一个数值区间，本公开实施例对此不作限定。
例如，在第二设定值为一个确定数值的情况下，处理器220判断各第二检测值是否与第二设定值匹配，例如，可以是判断第二检测值是否与第二设定值相等。若相等，则第二检测值与第二设定值匹配；若不相等，则第二检测值与第二设定值不匹配。
示例性地，判断第二检测值是否与第二设定值相等可以是通过计算第二检测值与第二设定值差值进行判断，若第二检测值与第二设定值差值为零、或者两者之间的差值的绝对值小于或等于允许的设定值，则第二检测值与第二设定值相等；若第二检测值与第二设定值差值不为零且两者之间的差值的绝对值大于允许的设定值，则第二检测值与第二设定值不相等。
又如，在第二设定值为一个数值区间的情况下，处理器220判断各第二检测值是 否与第二设定值匹配，可以是判断第二检测值是否在第二设定值的范围内。若在，则第二检测值与第二设定值匹配；若不在，则第二检测值与第二设定值不匹配。
S600：若第二检测值出现异常，则确定第二检测值出现异常的输出线122所在的区域存在第一检测值出现异常的第一检测线111，并确定该输出线122所在的区域存在裂纹。
此外，若第二检测值未出现异常，则确定第二检测值未出现异常对应的输出线122所在的区域不存在第一检测值出现异常的第一检测线111。
需要说明的是，在基板上设置第二检测层120的第二检测线路时，可以先对第二检测线路的各输出线122所在的位置信息进行预存(例如预存如处理器220中)。当利用第二检测线路的某一或某些输出线122的第二检测值出现异常时，可以根据预存的各输出线122所在的位置，获取第二检测值异常的输出线122所在的区域。
示例性地，以第二检测信号为电流信号、第二检测值为电压值、第二设定值为一个确定数值为例。第二检测电路230向第二检测层120的第二检测线路的输入线121输入电流信号。之后，第二检测电路230逐一或同时接收第二检测层120的第二检测线路中的每条输出线122的电压值。
此处，需要说明的是，在屏幕没有裂纹的情况下，则各第一检测线111没有异常，各输出线122的电压值为在其通路状态下的正常电压值(也即第二设定值)。在屏幕出现裂纹的情况下，裂纹位置处的第一检测线111可能会出现断裂或损伤，导致该第一检测线111出现异常，从而与出现异常第一检测线111和与其相交叉的输出线122之间的耦合电容发生变化，会使得该输出线122的电压值出现异常(例如该输出线122的电压值大于第二设定值)。
第二检测电路230接收第二检测层120的第二检测线路中的每条输出线122的电压值后，将各输出线122的电压值发送到处理器220，处理器220判断各电压值是否与第二设定值相等。若电压值等于第二设定值，则该电压值没有出现异常，即该电压值(即第二检测值)对应的输出线122所在的区域不存在出现异常的第一检测线111；若电压值大于第二设定值，则该电压值(即第二检测值)出现异常，即该电压值对应的输出线122所在的区域存在出现异常的第一检测线111，并根据预存的各输出线122的位置信息确定该输出线122所在的区域存在裂纹。
需要说明的是，在本公开一些实施例的裂纹检测方法中，S400～S600可以在S100～S300之后或者之前执行，也可以与S100～S300同时执行，本公开实施例对此不作限定。
如图8所示，本公开一些实施例还提供一种电子设备1。该电子设备1可以为手机、电视、显示器、平板电脑、车载电脑等具有显示界面的终端设备，或者为智能手表、智能手环等智能显示穿戴设备，或者为服务器、存储器、基站等通信设备，或者为智能汽车等。本公开实施例对上述电子设备的具体形式不做特殊限制。
如图8所示，电子设备1包括显示屏10以及与显示屏10耦接的控制装置20。
在电子设备1中，控制装置20包括第一检测电路210和与第一检测电路210耦接的处理器220。
其中，第一检测电路210与显示屏10中的第一检测层110的多条第一检测线111 相连。在第一检测层110还包括多个第一检测引脚1100的情况下，第一检测电路210通过第一检测引脚1100与第一检测层110的多条第一检测线111相连。
第一检测电路210被配置为，分别向各条第一检测线111发送第一检测信号，并从各条第一检测线111中获取第一检测值。
示例性地，第一检测信号可以为电压信号或者电流信号。
处理器220被配置为，判断各条第一检测线111的第一检测值是否出现异常，并在第一检测值出现异常的情况下，确定相应的第一检测线111所在的显示屏10的基板存在裂纹。
示例性地，第一检测值可以为电阻值、电压值或者电流值中的一种，本公开实施例对此不作限定。
第一检测值出现异常，例如是，第一检测值与设定值不匹配。以第一检测值为电阻值为例，若某一第一检测线111上的电阻值与设定值不匹配(例如该电阻值大于设定值)，则确定该电阻值出现异常，即其对应的第一检测线111出现异常。出现异常的第一检测线111的电阻值比设定值大，说明该第一检测线111出现断裂，即该第一检测线111所在的位置存在裂纹。
处理器220可以是中央处理单元(Central Processing Unit，CPU)，还可以是其他通用处理器、数字信号处理器(Digital Signal Processor，DSP)、专用集成电路(Application Specific Integrated Circuit，ASIC)、现场可编程门阵列(Field-Programmable Gate Array，FPGA)或者其他可编程逻辑器件、分立门或者晶体管逻辑器件、分立硬件组件等。其中，通用处理器可以是微处理器或者该处理器也可以是任何常规的处理器等。
如图17所示，电子设备1的控制装置20还包括第二检测电路230。第二检测电路230与显示屏10中的第二检测层120的第二检测线路的输入线121和各输出线122连接。在第二检测层120还包括多个第二检测引脚1200的情况下，第二检测电路230通过第二检测引脚1200与第二检测层120的第二检测线路的输入线121和各输出线122相连。
第二检测电路230被配置为，向输入线121发送第二检测信号，并从各输出线122中获取第二检测值。
示例性地，第二检测信号可以为电压信号或者电流信号。
处理器220还被配置为，判断各条输出线122的第二检测值是否出现异常，并在第二检测值出现异常的情况下，确定第二检测值出现异常的输出线122所在的区域存在第一检测值出现异常的第一检测线111，并确定该输出线122所在的区域存在裂纹。
示例性地，第一检测值可以为电阻值、电压值或者电流值中的一种，本公开实施例对此不作限定。
第二检测值出现异常，例如是，第二检测值与设定值不匹配。以第二检测值为电压值为例，若某一输出线122上的电压值与设定值不匹配(例如该电压值大于设定值)，则确定该电压值出现异常，即该电压值对应的输出线122出现异常。出现异常的输出线122的电压值比设定值大，说明该输出线122受到了出现异常的第一检测线111产生的耦合电容的影响。即该电压值对应的输出线122所在的区域存在出现异常的第一 检测线111，并确定该输出线122所在的区域存在裂纹。
示例性地，控制装置20可以是电子设备1的主控芯片,主控芯片用于对电子设备1的各项功能的实现进行整体控制。通过在主控芯片中设置相应的功能模块可以实现控制装置20的功能(例如实现第一检测电路210或者第二检测电路230的功能)。
此外，控制装置20也可以是外接的测试设备，测试设备的处理器中加载有测试程式。其中，测试设备例如可以包括单独的检测电路。
在此情况下，也可以单独对不包括主控芯片的基板、显示屏或者显示模组进行裂纹检测。
例如，单板检测，即在单独的阵列基板或者封装基板上设置第一检测层110、或第一检测层110及第二检测层120；或者，在绑定IC芯片(Integrated Circuit Chip)后的显示屏的阵列基板或者封装基板上设置第一检测层110、或第一检测层110及第二检测层120；或者，在显示模组的阵列基板或者封装基板上设置第一检测层110、或第一检测层110及第二检测层120。第一检测层110及第二检测层120的设置位置如以上所述，此处不再赘述。
在上述情况下，以仅在单独的阵列基板或者封装基板上设置第一检测层110的单板检测为例，可直接通过各第一检测引脚1100将各第一检测线111接入到基板外部的检测电路(检测电路例如为点亮测试治具)中，以实现向各条第一检测线111发送第一检测信号，并从各第一检测线111中获取第一检测值后，判断各条第一检测线111的第一检测值是否出现异常，以确定各第一检测线111的位置是否存在裂纹。
示例性地，在上述情况下，可以通过柔性电路板(Flexible Printed Circuit简称FPC)将各第一检测线111对应的各第一检测引脚1100接入检测电路(例如为点亮测试治具)。
本公开的一些实施例还提供了一种计算机可读存储介质(例如，非暂态计算机可读存储介质)，该计算机可读存储介质中存储有计算机程序指令，计算机程序指令在处理器上运行时，使得处理器执行如上述实施例中任一实施例所述的裂纹检测方法中的一个或多个步骤。
示例性地，上述计算机可读存储介质可以包括，但不限于：磁存储器件(例如，硬盘、软盘或磁带等)，光盘(例如，CD(Compact Disk，压缩盘)、DVD(Digital Versatile Disk，数字通用盘)等)，智能卡和闪存器件(例如，EPROM(Erasable Programmable Read-Only Memory，可擦写可编程只读存储器)、卡、棒或钥匙驱动器等)。本公开描述的各种计算机可读存储介质可代表用于存储信息的一个或多个设备和/或其它机器可读存储介质。术语“机器可读存储介质”可包括但不限于，无线信道和能够存储、包含和/或承载指令和/或数据的各种其它介质。
以上所述，仅为本发明的具体实施方式，但本发明的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本发明揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本发明的保护范围之内。因此，本发明的保护范围应以所述权利要求的保护范围为准。

Claims (16)

  1. 一种显示屏，所述显示屏包括阵列基板和设置于所述阵列基板一侧的封装基板，其特征在于，所述显示屏还包括第一检测层；
    所述第一检测层设置于所述阵列基板远离所述封装基板的一侧，或者，所述第一检测层设置于所述封装基板的一侧；
    所述第一检测层包括第一检测线路，所述第一检测线路包括多条第一检测线，所述第一检测线被配置为传输第一检测信号。
  2. 根据权利要求1所述的显示屏，其特征在于，所述显示屏包括显示区和边框区，所述显示区和所述边框区均有所述第一检测线的至少一段经过。
  3. 根据权利要求2所述的显示屏，其特征在于，每条所述第一检测线包括依次相连的多个第一检测线段，各所述第一检测线段的延伸方向不完全相同；
    至少有一个方向的相邻两条所述第一检测线之间的间隙宽度相等。
  4. 根据权利要求2所述的显示屏，其特征在于，每条所述第一检测线包括的第一子检测线、第二子检测线和第三子检测线，第一子检测线和第二子检测线呈L形；
    所述第一子检测线与所述第二子检测线相互平行且相互间隔设置，所述第一子检测线的一端通过所述第三子检测线与所述第二子检测线的一端连接。
  5. 根据权利要求1所述的显示屏，其特征在于，所述第一检测层还包括多个第一检测引脚，每条所述第一检测线的两端分别与所述多个第一检测引脚中的两个第一检测引脚相连。
  6. 根据权利要求1～5中任一项所述的显示屏，其特征在于，所述显示屏还包括第二检测层；所述第二检测层与所述第一检测层设置于所述阵列基板的同一侧或者所述封装基板的同一侧；
    所述第二检测层包括第二检测线路，所述第二检测线路包括输入线和多条输出线，所述输入线的一端与所述输出线的一端连接，所述输入线与所述输出线被配置为传输第二检测信号；
    所述输出线在垂直于所述显示屏的方向上的正投影与至少一条所述第一检测线在垂直于所述显示屏的方向上的正投影相交叉。
  7. 根据权利要求6所述的显示屏，其特征在于，多条所述输出线的长度相等。
  8. 根据权利要求6所述的显示屏，其特征在于，每条所述输出线包括依次相连的多个输出线段，各所述输出线段的延伸方向不完全相同。
  9. 根据权利要求6所述的显示屏，其特征在于，所述第二检测线路包括一条输入线和两条输出线，各条所述输出线的一端均与所述输入线的同一端连接；
    所述输入线设置于所述显示屏的平分线位置，所述两条输出线分别位于所述输入线的两侧。
  10. 根据权利要求9所述的显示屏，其特征在于，所述输出线呈阶梯状设置。
  11. 根据权利要求6所述的显示屏，其特征在于，所述第一检测线路和所述第二检测线路的材料为透明导电材料。
  12. 根据权利要求6所述的显示屏，其特征在于，所述显示屏还包括设置于所述第一检测层和所述第二检测层之间的绝缘层，所述绝缘层被配置为隔离所述第一检测 线路和所述第二检测线路。
  13. 一种电子设备，其特征在于，所述电子设备包括：
    权利要求1～12中任一项所述的显示屏；以及，
    与所述显示屏耦接的控制装置，所述控制装置包括：
    第一检测电路，所述第一检测电路与所述显示屏中的第一检测线路的各条第一检测线连接；所述第一检测电路被配置为，分别向各条所述第一检测线发送第一检测信号，并从各条所述第一检测线中获取第一检测值；
    与所述第一检测电路耦接的处理器，所述处理器被配置为，判断各条所述第一检测线的第一检测值是否出现异常，并在所述第一检测值出现异常的情况下，确定相应的第一检测线所在的显示屏的基板存在裂纹。
  14. 根据权利要求13所述的电子设备，其特征在于，在所述显示屏还包括第二检测层的情况下，所述控制装置还包括：
    第二检测电路，所述第二检测电路与所述显示屏中的第二检测线路的输入线和各输出线连接；所述第二检测电路被配置为，向所述输入线发送第二检测信号，并从各所述输出线中获取第二检测值；
    所述处理器与所述第二检测电路耦接，所述处理器还被配置为，判断各条所述输出线的所述第二检测值是否出现异常，并在所述第二检测值出现异常的情况下，确定第二检测值出现异常的输出线所在的区域存在第一检测值出现异常的第一检测线，并确定该输出线所在的区域存在裂纹。
  15. 一种裂纹检测方法，应用于权利要求13或14任一项所述的电子设备，其特征在于，所述裂纹检测方法包括：
    向第一检测线路发送第一检测信号；
    接收所述第一检测线路中的每条第一检测线的第一检测值，并判断所述第一检测值是否出现异常；
    若是，则确定该第一检测线所在的基板存在裂纹。
  16. 根据权利要求15所述的裂纹检测方法，其特征在于，在所述电子设备的控制装置还包括第二检测电路、所述电子设备的显示屏还包括第二检测层的第二检测线路的情况下，所述裂纹检测方法还包括：
    向所述第二检测线路中的输入线发送第二检测信号；
    接收所述第二检测线路中的输出线的第二检测值，并判断所述第二检测值是否出现异常；
    若是，则确定第二检测值出现异常的输出线所在的区域存在第一检测值出现异常的第一检测线，并确定该输出线所在的区域存在裂纹。
PCT/CN2021/082787 2020-03-31 2021-03-24 显示屏、电子设备及裂纹检测方法 WO2021197169A1 (zh)

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