WO2021189965A1 - Résonateur acoustique de volume à couches et son procédé de fabrication - Google Patents

Résonateur acoustique de volume à couches et son procédé de fabrication Download PDF

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Publication number
WO2021189965A1
WO2021189965A1 PCT/CN2020/135672 CN2020135672W WO2021189965A1 WO 2021189965 A1 WO2021189965 A1 WO 2021189965A1 CN 2020135672 W CN2020135672 W CN 2020135672W WO 2021189965 A1 WO2021189965 A1 WO 2021189965A1
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WIPO (PCT)
Prior art keywords
layer
cavity
electrode
micro
bulk acoustic
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PCT/CN2020/135672
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English (en)
Chinese (zh)
Inventor
黄河
罗海龙
李伟
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中芯集成电路（宁波）有限公司
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Publication of WO2021189965A1 publication Critical patent/WO2021189965A1/fr

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/15—Constructional features of resonators consisting of piezoelectric or electrostrictive material
    • H03H9/17—Constructional features of resonators consisting of piezoelectric or electrostrictive material having a single resonator
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/02—Details

Definitions

  • the invention relates to the field of semiconductor device manufacturing, in particular to a thin-film bulk acoustic wave resonator and a manufacturing method thereof.
  • the radio frequency filter is an important part of the radio frequency system. It can filter out the interference and noise outside the communication spectrum to meet the requirements of the radio frequency system and the communication protocol for the signal-to-noise ratio. Taking a mobile phone as an example, since each frequency band needs a corresponding filter, dozens of filters may need to be set in a mobile phone.
  • the thin film bulk acoustic wave resonator includes two thin film electrodes, and a piezoelectric thin film layer is arranged between the two thin film electrodes. Its working principle is to use the piezoelectric thin film layer to generate vibration under an alternating electric field.
  • the bulk acoustic wave propagating in the thickness direction of the electric film layer is transmitted to the interface between the upper and lower electrodes and the air to be reflected back, and then reflected back and forth inside the film to form an oscillation.
  • a standing wave oscillation is formed.
  • the traditionally manufactured cavity-type thin-film bulk acoustic resonator due to the limitation of the cavity formation process, cannot integrate micro devices in the substrate under the cavity, and can only achieve related functions by connecting the resonator with an external device, resulting in the device
  • the large volume and long leads make the integration of the resonator not high and cannot meet the demand for miniaturization of the device.
  • the invention discloses a thin film bulk acoustic wave resonator and a manufacturing method thereof, which can solve the problem of low integration of the thin film bulk acoustic wave resonator.
  • the present invention provides a thin film bulk acoustic wave resonator, including:
  • a carrier substrate including a first semiconductor layer and a first device layer
  • a first micro device the first micro device is embedded in the carrier substrate, and at least part of the first micro device is located in the first device layer;
  • the piezoelectric laminate structure covers the first cavity, and the piezoelectric laminate structure includes a first electrode, a piezoelectric layer, and a second electrode stacked in sequence from bottom to top; the first cavity is formed in the Located below the piezoelectric laminate structure before the piezoelectric laminate structure;
  • the first electrical connection structure connects the first micro-device and electrically leads the first micro-device.
  • the present invention also provides a method for manufacturing the film bulk acoustic resonator, which includes:
  • the piezoelectric laminate structure including a second electrode, a piezoelectric layer, and a first electrode arranged in sequence from bottom to top;
  • a carrier substrate is provided, the carrier substrate includes a first semiconductor layer and a first device layer, the first surface of the carrier substrate is embedded with a first micro device, and the side where the first device layer is The side where the first surface is located;
  • a first electrical connection structure is formed, and the first micro device is electrically connected to an external signal.
  • the first micro-device is formed in the carrier substrate in advance, which is separated from the manufacture of the resonator, and the process time is shortened.
  • the micro device can be fabricated separately, and does not need to be fabricated in the resonator manufacturing process, so that the resonator structure is prevented from being subjected to the process environment when the micro device is fabricated, and the stability of the resonator is improved. Since this structure bonds the carrier substrate to the dielectric layer by bonding, it is possible to pre-form the first micro-device in the carrier substrate.
  • micro devices are also formed in the cover substrate, which further improves the integration degree of the resonator.
  • the dielectric layer and the bonding surface of the carrier substrate are made of the same material, and can be directly bonded through atomic bonds, which improves the bonding strength and simplifies the process flow.
  • first conductive plug and the second conductive plug are located on the same side of the resonator, which facilitates the manufacturing process of the process.
  • the protrusions are arranged along the boundary of the effective resonance area to make the acoustic impedance mismatch between the inside of the effective resonance area and the area where the protrusions are located, effectively preventing the lateral leakage of sound waves, and improving the quality factor of the resonator;
  • the effective resonance area of the resonator is defined by the first groove and the second groove.
  • the first groove and the second groove respectively penetrate the first electrode and the second electrode, and the piezoelectric layer maintains a complete film layer. After etching, the structural strength of the resonator is ensured, and the yield of manufacturing the resonator is improved.
  • FIG. 1 shows a schematic diagram of the structure of a thin film bulk acoustic resonator of Embodiment 1. As shown in FIG. 1
  • FIGS. 2 to 11 show schematic structural diagrams corresponding to different steps of a method for manufacturing a thin-film bulk acoustic resonator according to the second embodiment.
  • first element, component, region, layer or section discussed below may be represented as a second element, component, region, layer or section.
  • Spatial relationship terms such as “under”, “below”, “below”, “below”, “above”, “above”, etc., in It can be used here for the convenience of description to describe the relationship between one element or feature shown in the figure and other elements or features. It should be understood that in addition to the orientations shown in the figures, the spatial relationship terms are intended to include different orientations of devices in use and operation. For example, if the device in the figure is turned over, then elements or features described as “under” or “below” or “under” other elements will be oriented “on” the other elements or features. Therefore, the exemplary terms “below” and “below” can include both an orientation of above and below. The device can be otherwise oriented (rotated by 90 degrees or other orientation) and the spatial descriptors used here are interpreted accordingly.
  • the method herein includes a series of steps, and the order of these steps presented herein is not necessarily the only order in which these steps can be performed, and some steps may be omitted and/or some other steps not described herein may be added to this method. If the components in a certain drawing are the same as those in other drawings, although these components can be easily identified in all the drawings, in order to make the description of the drawings more clear, this specification will not describe all the same components. The reference numbers are shown in each figure.
  • FIG. 1 shows a schematic structural diagram of a thin film piezoelectric acoustic resonator of Embodiment 1. Please refer to FIG. 1.
  • the thin film bulk acoustic wave resonator includes:
  • a carrier substrate which includes a first semiconductor layer 100A and a first device layer 100B;
  • a first micro device 1000, the first micro device 1000 is embedded in the carrier substrate, and at least part of the first micro device 1000 is located in the first device layer 100B;
  • the dielectric layer 102 is bonded to the first device layer 100B, the dielectric layer 102 encloses a first cavity 110a, and the first cavity 110a exposes the surface of the carrier substrate;
  • the piezoelectric laminate structure covers the first cavity 110a.
  • the piezoelectric laminate structure includes a first electrode 103, a piezoelectric layer 104, and a second electrode 105 that are sequentially stacked from bottom to top.
  • the first cavity 110a is formed before the piezoelectric laminate structure, and is located under the piezoelectric laminate structure;
  • the first electrical connection structure is connected to the first micro-device, and the first electrical connection structure is used to supply power to the first micro-device.
  • the first cavity 110a is formed before the piezoelectric laminate structure, and is located below the piezoelectric laminate structure for explanation as follows:
  • the manufacturing process of the resonator is: The substrate is etched to form a cavity, the sacrificial layer material is filled in the cavity, and a piezoelectric laminate structure is formed above the sacrificial layer material and the substrate. After the sacrificial layer is released, a lower cavity is formed, and the piezoelectric laminate structure is suspended below Above the cavity.
  • a capping layer may be formed on the upper surface of the piezoelectric laminate, and the cavity between the capping layer and the piezoelectric laminate structure is the upper cavity.
  • the first cavity of the present invention corresponds to the lower cavity.
  • the carrier substrate of this embodiment is bonded to the dielectric layer after the first cavity is formed.
  • the carrier substrate needs to provide better support for the patterning process of the second electrode of the resonator, the production and patterning of the bonding layer, the production/grinding of the capping layer, or the production of the second electrical connection structure. Since this structure bonds the carrier substrate to the dielectric layer by bonding, it is possible to pre-form the first micro-device in the carrier substrate.
  • the lower cavity is formed by the sacrificial layer method, and the micro device cannot be formed at the bottom of the lower cavity. Before bonding the carrier substrate, the first micro-device is formed in the carrier substrate in advance to shorten the process time.
  • the micro device can be fabricated separately, and does not need to be fabricated in the resonator manufacturing process, so that the resonator structure is prevented from being subjected to the process environment when the micro device is fabricated, and the stability of the resonator is improved.
  • the carrier substrate includes a first semiconductor layer 100A and a first device layer 100B.
  • the first device layer 100B is close to the side where the first cavity 110a is located, and the first micro device 1000 It is at least partially formed in the first device layer 100B.
  • the first micro-device 1000 includes: a diode, a triode, a MOS transistor, an electrostatic discharge protection device, a resistor, a capacitor, or an inductor.
  • the first micro device 1000 may all be located in the device layer 100B.
  • the first micro device 1000 is a triode or a MOS transistor, its source and drain levels It may be located in the first semiconductor layer 100A.
  • the material of the first semiconductor layer 100A includes silicon (Si), germanium (Ge), silicon germanium (SiGe), silicon carbon (SiC), silicon germanium carbon (SiGeC), indium arsenide (InAs), gallium arsenide (GaAs) , Indium Phosphide (InP) or other III/V compound semiconductors.
  • the material of the first device layer 100B includes silicon oxide, silicon nitride, silicon oxynitride, and silicon carbonitride. The first device layer 100B and the dielectric layer 102 are combined by bonding.
  • the material of the dielectric layer 102 may be any suitable dielectric material, including but not limited to silicon oxide, silicon nitride, silicon oxynitride, silicon carbonitride, or ethyl silicate.
  • atomic bonding can be used to directly bond.
  • a bonding layer can be formed on the bonding surface of the two.
  • the materials of the bonding layer include silicon oxide, silicon nitride, polysilicon, and ethyl silicate. Or organic cured film.
  • the first device layer 100B and the dielectric layer are both silicon oxide, and atomic bonds are used for bonding, the bonding structure is strong and the process flow is simple.
  • a bonding layer structure is formed between the dielectric layer 101 and the carrier substrate. It can be seen from the materials of the dielectric layer and the bonding layer that the materials of the two may be the same or different.
  • the first cavity 110a is a closed cavity, and the first cavity 110a may be formed by etching the dielectric layer 102 through an etching process.
  • the shape of the bottom surface of the first cavity 110a is a rectangle, but in other embodiments of the present invention, the shape of the first cavity 110a on the bottom surface of the first electrode 103 may also be a circle, an ellipse, or a polygon other than a rectangle. For example, pentagons, hexagons, etc.
  • a piezoelectric stack structure is provided above the first cavity 110a, and the piezoelectric stack structure includes a first electrode 103, a piezoelectric layer 104, and a second electrode 105 in order from bottom to top.
  • the first electrode 103 is located on the dielectric layer 102
  • the piezoelectric layer 104 is located on the first electrode 103
  • the second electrode 105 is located on the piezoelectric layer 104.
  • the first electrode 103, the piezoelectric layer 104, and the second electrode 105 above the first cavity 110a are provided with an overlapping area in the direction perpendicular to the carrier substrate 100 as an effective resonant area, and the boundary of the effective resonant area is located at all. In the area surrounded by the first cavity 110a.
  • the shape of the effective resonance region is an irregular polygon, such as a pentagon or hexagon without parallel opposite sides.
  • the piezoelectric layer 104 covers the first cavity 110a, and covering the first cavity 110a should be understood to mean that the piezoelectric layer 104 is a complete film layer and has not been etched. It does not mean that the piezoelectric layer 104 completely covers the first cavity 110a to form a sealed cavity. Of course, the piezoelectric layer 104 can completely cover the first cavity 110a to form a sealed cavity.
  • the piezoelectric layer is not etched to ensure that the piezoelectric laminated structure has a certain thickness, so that the resonator has a certain structural strength. Improve the yield of resonators.
  • an etch stop layer is further provided between the dielectric layer 102 and the first electrode 103, and its material includes but is not limited to silicon nitride (Si3N4) and silicon oxynitride (SiON).
  • the etch stop layer can be used to increase the structural stability of the final manufactured thin film bulk acoustic wave resonator.
  • the etch stop layer has a lower etching rate than the dielectric layer 102, and can be used to etch the dielectric layer.
  • the layer 102 prevents over-etching during the process of forming the first cavity 110a, and protects the surface of the first electrode 103 located thereunder from damage, thereby improving the performance and reliability of the device.
  • the upper part of the piezoelectric laminate structure includes a bonding layer 106, the bonding layer 106 encloses a second cavity 110b, and the second cavity 110b exposes the surface of the piezoelectric laminate structure.
  • the second cavity 110b is located above the first cavity 110a. It also includes a cover substrate, which is disposed on the bonding layer 106 and covers the second cavity 110b.
  • a second micro device 2000 is embedded in the cover substrate on the side close to the second cavity 110 b.
  • the cover substrate has a double-layer structure, and includes a second semiconductor layer 200A and a second device layer 200B.
  • the second device layer 100B is close to the side where the second cavity 110b is located, and the first micro device 1000 is at least partially formed in the second device layer 200B.
  • the type of the second micro-device 1000 and the positional relationship with the cover substrate refer to the related description of the type of the first micro-device 1000 and the positional relationship with the carrier substrate.
  • the optional material of the second semiconductor layer 200A refer to the first semiconductor layer 100A.
  • the material types of the second device layer 200B refer to the material types of the first device layer 100B, which will not be repeated here.
  • the bonding layer 106 can be made of conventional bonding materials, such as silicon oxide, silicon nitride, silicon oxynitride, ethyl silicate, etc., or a bonding agent such as a light-curing material or a heat-curing material, such as an adhesive film (DieAttachFilm, DAF) or dry film (DryFilm), the production and patterning process is relatively simple.
  • the material of the bonding layer and the material of the capping substrate 200 may be the same, and the two are an integral structure, and the second cavity 110b is formed by forming a space in the film layer (forming the bonding layer 106 and the capping substrate 200).
  • the resonator further includes a first electrical connection structure connected to the first micro device 1000 and a second electrical connection structure connected to the second micro device 2000.
  • the first electrical connection structure is a first conductive plug 1001
  • the second electrical connection structure is a second conductive plug 2001.
  • the first conductive plug 1001 extends from the bottom surface of the carrier substrate to the first micro device 1000.
  • the second conductive plug 2001 extends from the bottom surface of the carrier substrate to the second micro device 2000.
  • the first conductive plug may extend from the top surface of the cover substrate to the first micro device.
  • the second conductive plug also extends from the top surface of the cover substrate to the second micro device.
  • the two conductive plugs are electrically connected to the micro device from the same side of the resonator.
  • the main consideration is that when the conductive plug is made, the opposite side of the conductive plug needs to be supported with a certain strength.
  • the side of the conductive plug (carrier substrate or cover substrate) needs to be thinned, and the thickness is about 100 microns.
  • the opposite side of the conductive plug (carrier substrate or cover substrate) is not The thickness is about a few hundred microns to provide a certain strength support for the manufacturing process.
  • the first conductive plug and the second conductive plug may be disposed on opposite sides of the resonator.
  • it may further include a third electrical connection structure, such as a third conductive plug, which electrically connects the first micro-device and the second micro-device.
  • first electrode lead-out part also includes a first electrode lead-out part and a second electrode lead-out part.
  • the first electrode lead-out part is used to introduce electrical signals into the first electrode 103 in the effective resonance region
  • the second electrode lead-out portion is used to lead electrical signals into the first electrode 103 in the effective resonance region.
  • the second electrode 105 in the effective resonance region. After the first electrode 103 and the second electrode 105 are energized, a pressure difference is generated on the upper and lower surfaces of the piezoelectric layer 104, forming a standing wave oscillation.
  • the conductive interconnect structure 120 is used to short-circuit the first electrode and the second electrode outside the effective resonance region.
  • the effective resonance region also includes the area where the piezoelectric layer, the first electrode, and the second electrode overlap each other in the direction perpendicular to the piezoelectric layer.
  • the first electrode and the second electrode are energized, the pressure difference between the upper and lower surfaces of the piezoelectric layer outside the effective resonance region can also be generated, and standing wave oscillation is also generated.
  • the standing wave oscillation outside the effective resonance region is undesirable.
  • the first electrode and the second electrode outside the effective resonance area are short-circuited to make the upper and lower voltages of the piezoelectric layer outside the effective resonance area consistent, and no standing wave oscillation can be generated outside the effective resonance area, which improves the Q value of the resonator.
  • the specific structures of the first electrode lead-out part, the second electrode lead-out part and the conductive interconnection structure 120 are as follows:
  • the first electrode lead-out part includes:
  • a first through hole 140 which penetrates through the lower layer structure of the first electrode 103 outside the effective resonance region, exposing the first electrode 103; a first conductive interconnection layer 141, covering the first electrode 103
  • the inner surface of a through hole 140 and a part of the surface of the carrier substrate 100 on the outer periphery of the first through hole 140 are connected to the first electrode 103; an insulating layer 160 covers the first conductive interconnection layer 141 and The surface of the carrier substrate 100; the conductive bumps 142 are arranged on the surface of the carrier substrate 100 and are electrically connected to the first conductive interconnection layer 141.
  • the second electrode lead-out part includes:
  • the second through hole 150, the second through hole 150 penetrates the lower structure of the first electrode 103 outside the effective resonance area, exposing the first electrode 103; the second conductive interconnection layer 151 covers the first electrode 103 The inner surface of the two through holes 150 and a part of the surface of the carrier substrate 100 on the periphery of the second through hole 150 are connected to the first electrode 103; an insulating layer 160 covers the second conductive interconnection layer 151 and The surface of the carrier substrate 100; second conductive bumps 152 are arranged on the surface of the carrier substrate 100 and are electrically connected to the second conductive interconnection layer 151.
  • a protrusion 40 is provided at the boundary of the effective resonance region, and the protrusion 40 is provided on the upper surface or the lower surface of the piezoelectric laminated structure; or, the protrusion 40 is partially provided on the piezoelectric
  • the upper surface of the laminated structure is partially disposed on the lower surface of the piezoelectric laminated structure.
  • all the protrusions 40 are located on the lower surface of the piezoelectric laminate structure. All are located on the side where the first cavity 110a is located.
  • the area surrounded by the protrusion 40 is an effective resonance area, and the outside of the protrusion 40 is an ineffective resonance area.
  • the first electrode 103, the piezoelectric layer 104, and the second electrode 105 in the effective resonance area overlap each other in a direction perpendicular to the carrier substrate 100.
  • the protrusions 40 may all be located on the upper surface of the piezoelectric laminate structure, away from the side where the first cavity 110a is located.
  • the protrusions 40 may also be partly arranged on the upper surface of the piezoelectric laminated structure and partly arranged on the lower surface of the piezoelectric laminated structure.
  • the projection of the protrusion 40 on the supporting substrate 100 forms a closed ring, such as a closed irregular polygon, a circle, or an ellipse.
  • the protrusion 40 causes the internal effective resonance area and the area where the protrusion 40 is located to mismatch the acoustic impedance, which can effectively prevent the lateral leakage of sound waves and improve the quality factor of the resonator.
  • the projection of the protrusion 40 on the carrier substrate 100 may not be a completely closed pattern. It should be understood that when the projection of the protrusion 40 on the carrier substrate 100 is a closed pattern, it is more beneficial to prevent the lateral leakage of sound waves.
  • the material of the protrusion 40 may be a conductive material or a dielectric material.
  • the material of the protrusion 40 is a conductive material, it may be the same as the material of the first electrode 103 or the second electrode 105.
  • the material of the protrusion 40 is In the case of the dielectric material, it can be any one of silicon oxide, silicon nitride, silicon oxynitride, or silicon carbonitride, but is not limited to the above materials.
  • the surface of the piezoelectric laminate structure further includes a first groove 130a and a second groove 130b.
  • the first groove 130a is located on the lower surface of the piezoelectric laminate structure on the side where the first cavity 110a is located. , Penetrates the first electrode 103 and surrounds the outer circumference of the area where the protrusion 40 is located.
  • the second groove 130b is located on the upper surface of the piezoelectric laminate structure, penetrates the second electrode 105, and surrounds the outer circumference of the area where the protrusion 40 is located.
  • the two ends of the first groove 130a and the two ends of the second groove 130b are arranged opposite to each other, so that the projections of the first groove 130a and the second groove 130b on the carrier substrate 100 The two junctions meet or have a gap.
  • the projection of the protrusion 40 on the piezoelectric layer 104 is a closed polygon, and the inner edges of the first groove 130a and the second groove 130b are arranged along the outer boundary of the protrusion 40, that is, The outer boundary of the protrusion 40 coincides with the inner edges of the first groove 130a and the second groove 130b.
  • the projections of the first grooves 130a and the second grooves 130b on the carrier substrate 100 are closed patterns, consistent with the shape of the projections 40 projected on the carrier substrate 100, and are located on the outer periphery of the projections formed by the projections 40 .
  • the protrusions 40 are ring-shaped (when the protrusions 40 are all located on the lower or upper surface of the piezoelectric laminate structure, the protrusions 40 constitute a ring; when the protrusions 40 are located on both surfaces of the piezoelectric laminate structure, The projections of the two parts together form an overall ring).
  • the first groove 130a surrounds part of the outer circumference of the protrusion 40
  • the second groove 130b surrounds the outer circumference of the remaining part of the protrusion 40 (here When the second groove 130b surrounds the outer circumference of the protrusion 40 means that it surrounds the outer circumference of the surface of the piezoelectric laminate structure in the area of the protrusion 40, and does not directly surround the outer circumference of the protrusion 40).
  • the first groove 130a may surround the piezoelectric laminate structure.
  • the second groove 130b may surround the outer circumference of the protrusion 40 on the upper surface of the piezoelectric laminate structure.
  • the present invention is not limited to this, as long as the first groove 130a and the second groove 130b cooperate with each other to surround the outer circumference of the area where the protrusion 40 is located.
  • the protrusion 40 causes the acoustic impedance of the inner region of the protrusion to be mismatched with the acoustic impedance of the area where the protrusion is located, and defines the boundary of the effective resonance region of the resonator.
  • the first groove 130a and the second groove 130b separate the first electrode 103 and the second electrode 105, respectively, so that the resonator cannot meet the working conditions (the working condition is that the first electrode 103, the piezoelectric layer 104 and the second electrode 105 are in The thickness direction overlaps each other), which further defines the boundary of the effective resonance region of the resonator.
  • the protrusion 40 causes the acoustic impedance to be mismatched by the addition of the mass.
  • the first groove 130a and the second groove 130b make the electrode end face contact with the air to make the acoustic impedance mismatch, and both play a role in preventing the leakage of the transverse wave. Improve the Q value of the resonator.
  • only the first trench 130a or the second trench 130b may be provided separately. Since the first electrode 103 and the second electrode 105 need to introduce electrical signals, the first trench 130a or the second trench 130b is not suitable to form a closed ring, and at this time, the first groove 130a or the second groove 130b cannot completely surround the area where the protrusion 40 is located.
  • the first groove 130a or the second groove 130b may be formed into a nearly closed ring shape, and the non-closed area is used to introduce electrical signals. This arrangement can simplify the process flow and reduce the cost of the resonator.
  • the conductive interconnection structure 120 includes two parts. It is electrically connected to the first electrode lead-out part. The other part of the conductive interconnect structure 120 is disposed in the outer area of the first trench 130a, connects the first electrode 103 and the second electrode 105, and is electrically connected to the second electrode lead-out portion through the first electrode 103. Both parts of the conductive interconnection structure 120 are provided with a region covering part of the surface of the second electrode 105. This region increases the contact area with the second electrode 105, reduces the contact resistance, and can prevent local high temperature caused by excessive current.
  • the second electrode lead-out portion is not directly electrically connected to the second electrode, but is connected to the first electrode outside the effective resonance region, and is electrically connected to the second electrode of the effective resonance region through the conductive interconnection structure 120.
  • the first electrode lead-out part is electrically connected to the first electrode inside the effective resonance zone, giving the first electrode lead-out part inside the effective resonance zone.
  • One electrode is powered, and the first electrode lead part is electrically connected to the second electrode outside the effective resonance area through the first electrode outside the effective resonance area and the conductive interconnection structure 120, and is not connected to the second electrode inside the effective resonance area.
  • the second electrode lead-out portion is connected to the first electrode outside the effective resonance area and the second electrode inside the effective resonance area to realize power supply to the second electrode inside the effective resonance area.
  • Embodiment 2 provides a method for manufacturing a thin film bulk acoustic resonator, including the following steps:
  • S02 forming a piezoelectric laminate structure on the temporary substrate, the piezoelectric laminate structure including a second electrode, a piezoelectric layer, and a first electrode arranged in sequence from bottom to top;
  • S05 Provide a carrier substrate, the carrier substrate includes a first semiconductor layer and a first device layer, the first surface of the carrier substrate is embedded with a first micro device, and the side where the first device layer is located is the carrier The side where the first surface of the substrate is located;
  • S06 Bond the carrier substrate to the dielectric layer, cover the first cavity, and make the first surface face the first cavity;
  • S08 Form a first electrical connection structure to electrically connect the first micro-device with an external signal.
  • FIGS. 2 to 11 show schematic diagrams of the structure at different stages of a method for manufacturing a thin film piezoelectric acoustic resonator according to Embodiment 2 of the present invention. Please refer to FIGS. 2 to 11 to describe each step in detail.
  • step S01 is performed: a temporary substrate 300 is provided.
  • the temporary substrate 300 may be at least one of the materials mentioned below: silicon (Si), germanium (Ge), silicon germanium (SiGe), silicon carbon (SiC), silicon germanium (SiGeC), indium arsenide (InAs), gallium arsenide (GaAs), indium phosphide (InP), or other III/V compound semiconductors, can also be ceramic substrates such as alumina, quartz or glass substrates, etc.
  • step S02 forming a piezoelectric laminate structure on the temporary substrate 300, the piezoelectric laminate structure including a second electrode 105, a piezoelectric layer 104, and a first electrode arranged in sequence from bottom to top 103.
  • the materials of the second electrode 105 and the first electrode 103 can use any suitable conductive material or semiconductor material well known to those skilled in the art, wherein the conductive material can be a metal material with conductive properties, for example, made of molybdenum (Mo), aluminum (Al), copper (Cu), tungsten (W), tantalum (Ta), platinum (Pt), ruthenium (Ru), rhodium (Rh), iridium (Ir), chromium (Cr), titanium (Ti), gold (Au), osmium (Os), rhenium (Re), palladium (Pd) and other metals or laminates of the above metals, semiconductor materials such as Si, Ge, SiGe, SiC, SiGeC, etc.
  • the second electrode 105 and the first electrode 103 may be formed by physical vapor deposition or chemical vapor deposition methods such as magnetron sputtering, evaporation, or the like.
  • the material of the piezoelectric layer 104 can be aluminum nitride (AlN), zinc oxide (ZnO), lead zirconate titanate (PZT), lithium niobate (LiNbO3), quartz (Quartz), potassium niobate (KNbO3) or tantalic acid Piezoelectric materials with wurtzite crystal structure such as lithium (LiTaO3) and their combinations.
  • the piezoelectric layer 104 may further include rare earth metals, such as at least one of scandium (Sc), erbium (Er), yttrium (Y), and lanthanum (La).
  • the piezoelectric layer 104 may further include a transition metal, such as at least one of zirconium (Zr), titanium (Ti), manganese (Mn), and hafnium (Hf). kind.
  • the piezoelectric layer 104 can be deposited and formed by any suitable method known to those skilled in the art, such as chemical vapor deposition, physical vapor deposition, or atomic layer deposition.
  • the second electrode 105 and the first electrode 103 are made of metal molybdenum (Mo)
  • the piezoelectric layer 104 is made of aluminum nitride (AlN).
  • step S03 is performed: forming a dielectric layer 102 to cover the piezoelectric laminate structure.
  • the dielectric layer 102 is formed by physical vapor deposition or chemical vapor deposition.
  • the material of the dielectric layer 102 may be any suitable dielectric material, including but not limited to at least one of silicon oxide, silicon nitride, silicon oxynitride, silicon carbonitride, and the like.
  • step S05 is performed: the dielectric layer 102 is patterned to form a first cavity 110 a, and the first cavity 110 a penetrates the dielectric layer 102.
  • the dielectric layer 102 is etched by an etching process to form a first cavity 110a and expose the first electrode layer 103 at the bottom.
  • the etching process may be a wet etching process or a dry etching process. Dry etching includes but is not limited to reactive ion etching (RIE), ion beam etching, and plasma etching.
  • RIE reactive ion etching
  • the depth and shape of the first cavity 110a depend on the depth and shape of the cavity required for the bulk acoustic wave resonator to be manufactured, that is, the depth of the first cavity 110a can be determined by the thickness of the dielectric layer 102 formed.
  • the shape of the bottom surface of the first cavity 110a can be a rectangle or a polygon other than a rectangle, such as a pentagon, a hexagon, an octagon, etc., and can also be a circle or an ellipse.
  • step S05 is performed: providing a carrier substrate, the carrier substrate includes a first semiconductor layer 100A and a first device layer 100B, the first surface of the carrier substrate is embedded with the first micro device 1000, and the second The side where a device layer 100B is located is the side where the first surface of the carrier substrate is located.
  • the material of the first semiconductor layer 100A, the material of the first device layer 100B, the type of the first micro-device 1000 and the structural relationship with the carrier substrate refer to the related description of Embodiment 1, which will not be repeated here.
  • step S06 is performed: bonding the carrier substrate to the dielectric layer 102, covering the first cavity 110a, and making the first surface face the first cavity 110a.
  • the material of the dielectric layer and the bonding method of the dielectric layer and the carrier substrate refer to the related description of Embodiment 1.
  • step S07 is performed: removing the temporary substrate.
  • the method of removing the temporary substrate can be mechanical grinding.
  • the first electrical connection structure and connecting the first micro device before forming the first electrical connection structure and connecting the first micro device, it further includes: forming a bonding layer 106 on the piezoelectric laminate structure, the bonding layer 106 encloses a second cavity 110b, which exposes the surface of the piezoelectric laminate structure, and the second cavity 110b is located above the first cavity 110a.
  • a cover substrate is provided, the cover substrate includes a second semiconductor layer 200A and a second device layer 200B, a second micro device 2000 is embedded on the first surface of the cover substrate, and the second device layer 200B is located on the side The first surface of the cover substrate is located on the side.
  • the cover substrate is disposed on the bonding layer 106 to cover the second cavity 110b, and the first surface of the cover substrate faces the second cavity 110b.
  • the material of the bonding layer 106 the material of the second semiconductor layer 200A, the material of the second device layer 200B, the type of the second micro device 2000 and the structure relationship with the cover substrate, please refer to the related description of Embodiment 1, which will not be repeated here. .
  • step S08 is performed: forming a first electrical connection structure, and electrically connecting the first micro-device with an external signal.
  • This embodiment also includes: forming a second electrical connection structure to electrically connect the second micro device with an external signal.
  • the first electrical connection structure and the second electrical connection structure are the first conductive plug 1001 and the second conductive plug 2001 respectively.
  • forming the first conductive plug 1001 and the second conductive plug 2001 includes: forming a first through hole (not shown in the figure) penetrating the supporting substrate from the supporting substrate side and penetrating the through holes.
  • the carrier substrate and the second through hole of the upper structure of the carrier substrate (the upper structure in this embodiment includes the dielectric layer 102, the piezoelectric laminate structure, the bonding layer 106, and part of the second device layer 200B) (not shown in the figure) (Shown), the first through hole exposes the first micro device 1000, the second through hole exposes the second micro device 2000, and the first through hole 1000 and the second through hole expose the second micro device 2000.
  • a conductive material is formed in the hole 2000 to form the first conductive plug 1001 and the second conductive plug 2001.
  • the first through hole and the second through hole may be formed by a dry etching process, and the conductive material may be formed in the first through hole and the second through hole by using an electroplating or electroless plating process.
  • forming the first conductive plug 1001 and the second conductive plug 2001 includes: forming a third through hole penetrating the cover substrate from the cover substrate side, and penetrating the cover substrate and The fourth through hole of the structure under the cover substrate, the third through hole exposes the second micro device, the fourth through hole exposes the first micro device, and the third through hole And a conductive material is formed in the fourth through hole to form the second conductive plug and the first conductive plug.
  • the above two conductive plugs are both formed on the same side of the resonator (the side where the carrier substrate is located or the side where the cover substrate is located), and the reason for this arrangement is referred to the related description of Embodiment 1.
  • the conductive plug is formed before the side of the carrier substrate, and it also includes the support of the cover substrate to reduce the thickness of the carrier substrate; the conductive plug is formed before the side of the cover substrate, and also includes the support of the carrier substrate to reduce the thickness. Cover the substrate.
  • it further includes forming a first electrode lead-out part and a second electrode lead-out part, the first electrode lead-out part is connected to the first electrode 103, and the second electrode lead-out part is connected to the second electrode 105.
  • the first electrode lead-out portion and the second electrode lead-out portion are located on the side of the carrier substrate.
  • the first electrode lead-out portion and the second electrode lead portion are also located on the side of the cover substrate in a preferred solution.
  • forming the first electrode lead-out part includes:
  • a through hole is formed through the lower layer structure of the first electrode 103 by an etching process, the through hole exposes the first electrode 103, and a first conductive interconnection layer is formed in the through hole by an electroplating process or a physical vapor deposition process 141.
  • the first conductive interconnection layer 141 covers the inner surface of the through hole and a part of the surface of the carrier substrate 100 on the periphery of the through hole, and is connected to the first electrode 103;
  • An insulating layer 160 is formed on the surface of a conductive interconnection layer 141 by a deposition process; first conductive bumps 142 are formed on the surface of the carrier substrate, and the first conductive bumps 142 are electrically connected to the first conductive interconnection layer 141. connect.
  • Forming the second electrode lead-out portion includes:
  • An etching process is used to form a through hole penetrating the lower layer structure of the first electrode 103, the through hole exposes the second electrode 105, and a second conductive interconnection layer 151 is formed in the through hole through a deposition process or an electroplating process,
  • the second conductive interconnection layer 151 covers the inner surface of the through hole and a part of the surface of the carrier substrate on the periphery of the through hole, and is connected to the second electrode 105;
  • the insulating layer 160 is formed by a deposition process; a second conductive bump 152 is formed on the surface of the carrier substrate 100, and the second conductive bump 152 is electrically connected to the second conductive interconnect layer 151.

Landscapes

  • Physics & Mathematics (AREA)
  • Acoustics & Sound (AREA)
  • Piezo-Electric Or Mechanical Vibrators, Or Delay Or Filter Circuits (AREA)

Abstract

La présente invention concerne un résonateur acoustique de volume à couches et son procédé de fabrication. Le résonateur acoustique de volume à couches comprend : un substrat de support, le substrat de support comprenant une première couche semi-conductrice (100A) et une première couche de dispositif (100B) ; un premier micro-dispositif (1000), le premier micro-dispositif (1000) étant intégré dans le substrat de support, et au moins une partie du premier micro-dispositif (1000) étant située dans la première couche de dispositif (100B) ; une couche diélectrique (102), liée sur la première couche de dispositif (100B), la couche diélectrique (102) renferme pour former une première cavité (110a), la première cavité (110a) s'exposant à partir de la surface du substrat de support ; une structure de stratification piézoélectrique, recouvrant la première cavité (110a), la structure de stratification piézoélectrique comprenant, de bas en haut, une première électrode (103), une couche piézoélectrique (104) et une seconde électrode (105) empilées séquentiellement ; la première cavité (110a) étant formée avant la structure de stratification piézoélectrique et située au-dessous de la structure de stratification piézoélectrique ; et une première structure de connexion électrique, étant connectée au premier micro-dispositif (1000) et conduisant électriquement au premier micro-dispositif (1000).
PCT/CN2020/135672 2020-03-27 2020-12-11 Résonateur acoustique de volume à couches et son procédé de fabrication WO2021189965A1 (fr)

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