WO2021164195A1 - 自适应均衡器的步长调节方法、装置、信号接收机、系统 - Google Patents

自适应均衡器的步长调节方法、装置、信号接收机、系统 Download PDF

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WO2021164195A1
WO2021164195A1 PCT/CN2020/103606 CN2020103606W WO2021164195A1 WO 2021164195 A1 WO2021164195 A1 WO 2021164195A1 CN 2020103606 W CN2020103606 W CN 2020103606W WO 2021164195 A1 WO2021164195 A1 WO 2021164195A1
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adaptive equalizer
tap
tap coefficient
coefficient
detection period
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PCT/CN2020/103606
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English (en)
French (fr)
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梁小锋
刘先华
陈俊
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华为技术有限公司
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006—Arrangements for removing intersymbol interference
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006—Arrangements for removing intersymbol interference
    • H04L25/03159—Arrangements for removing intersymbol interference operating in the frequency domain

Definitions

  • This application relates to the field of data processing, and in particular to a method, device, signal receiver, and system for adjusting the step size of an adaptive equalizer.
  • the signal receiver in the data communication system is generally provided with an equalizer, which can process the received signal to compensate for channel distortion and eliminate inter-symbol interference (ISI).
  • ISI inter-symbol interference
  • the equalizer used in the signal receiver is generally an adaptive equalizer, which can adaptively adjust its own coefficients according to a preset fixed step based on the measurement results of the channel characteristics to adapt to Changes in channel characteristics.
  • the step size of the adaptive equalizer when adjusting its coefficient is a fixed value, the flexibility when adjusting the coefficient is poor, and the coefficient convergence performance of the adaptive equalizer is poor.
  • the present application provides a step size adjustment method, device, signal receiver, and system of an adaptive equalizer, which can solve the problem of poor coefficient convergence performance of the adaptive equalizer in related technologies.
  • the technical solutions are as follows:
  • a method for adjusting the step size of an adaptive equalizer may include: determining the rate of SOP (RSOP) of the channel of the data communication system, and the signal-to-noise ratio ( signal noise ratio, SNR); and adjust the step size of the adaptive equalizer according to the RSOP and the SNR, and the step size of the adjusted adaptive equalizer is positively correlated with the RSOP and negatively correlated with the SNR.
  • the step size of the adaptive equalizer refers to the step size that the adaptive equalizer refers to when adjusting its coefficients.
  • the solution provided in this application can adjust the step size of the adaptive equalizer based on the RSOP of the detected channel and the SNR of the channel, so that the coefficients of the adaptive equalizer can adapt to the polarization state of the data signal and the SNR of the channel in time
  • the change effectively improves the coefficient convergence performance of the adaptive equalizer, thereby improving the signal transmission performance of the data communication system.
  • the method may further include: performing low-pass filter processing on the RSOP and SNR respectively; correspondingly, when adjusting the step size, it can be adjusted according to the RSOP after the low-pass filter processing and the SNR after the low-pass filter processing.
  • the step size of the adaptive equalizer can achieve the purpose of noise reduction.
  • the process of adjusting the step size of the adaptive equalizer according to the RSOP and the SNR may include: determining a first product of a weight coefficient and the SNR, and determining the absolute value of the RSOP minus the first product. The first difference; after that, the second product of the first difference and the scale factor is added to the initial step size of the adaptive equalizer to obtain the adjusted step size of the adaptive equalizer.
  • the weight coefficient, the scale coefficient, and the initial step length are all preset fixed values, and the value ranges are all 0 to 1.
  • the weight coefficient may be of the order of 10 -1
  • the scale coefficient may be of the order of 10 -3
  • the initial step size may be of the order of 10 -4 or 10 -5 .
  • the manner of determining the RSOP of the channel in the data communication system may include:
  • the RSOP of the channel is determined according to the compensation signal output by the adaptive equalizer in the first detection period, where the compensation signal is the data signal transmitted by the adaptive equalizer to the data communication system
  • the signal output after processing; or, every second detection period determine the RSOP of the channel according to the coefficient of the adaptive equalizer; wherein, the second detection period is less than the first detection period. That is, in the solution provided in this application, the RSOP of the channel can be determined according to the compensation signal output by the adaptive equalizer or the coefficient of the adaptive equalizer.
  • the first detection period may be equal to the duration of one data frame transmitted by the data communication coefficient
  • the second detection period may be equal to the period during which the adaptive equalizer updates its coefficient. Since the period for the adaptive equalizer to update its coefficient is relatively short, the second detection period for updating the RSOP based on the coefficient can also be relatively short.
  • the first polarization state signal as the first row element and use the second polarization state signal as the second row element to construct an input matrix; multiply the input matrix and the pseudo-inverse matrix of the input matrix to obtain phase discrimination Matrix, the number of rows and columns of the phase detection matrix are both 2; determine the second difference between the element in the second row and the first column of the phase detection matrix and the element in the first row and second column; according to the second difference
  • the value determines the RSOP of the channel.
  • the real part of the second difference can be determined as RSOP.
  • the second difference between the element in the second row and the first column of the phase discrimination matrix and the element in the first row and second column can reflect the residual RSOP of the channel after the adaptive equalizer compensates the channel, when the RSOP of the channel is not When residual, the real part of the second difference is 0; when the RSOP of the channel has residual, the real part of the second difference is not 0. Therefore, in the solution of the present application, the real part of the second difference can be determined as the RSOP for adjusting the step size.
  • the manner of determining the SNR of the channel may include:
  • the SNR of the channel is determined according to the coefficient of the adaptive equalizer; or every first detection period, according to the hard judgment of the compensation signal output by the adaptive equalizer in the first detection period Error, determine the SNR of the channel; wherein, the second detection period is less than the first detection period. That is, in the solution provided in this application, the SNR of the channel can be determined according to the coefficient of the adaptive equalizer or the hard judgment error of the compensation signal output by the adaptive equalizer.
  • the adaptive equalizer may include: four filters, each filter having multiple taps, and correspondingly, the coefficients of the adaptive equalizer include: the tap coefficients of the multiple taps of each filter ;
  • the process of determining the SNR according to the coefficient of the adaptive equalizer every second detection period may include:
  • the tap coefficient sequence of the target tap of each filter is obtained, and the tap coefficient sequence includes multiple tap coefficients obtained by sampling the tap coefficient of the target tap in multiple coefficient update periods; calculate separately The oscillating power of each oscillating frequency point in the frequency domain of the tap coefficient sequence of each filter, the tap coefficient sequence includes multiple frequency points in the frequency domain, and there are at least two oscillating frequency points in the multiple frequency points; Add the oscillation power of the tap coefficient sequence of the filter at the at least two oscillation frequency points to obtain the total oscillation power; calculate the total power of the tap coefficient sequence of each filter in the frequency domain; add the four filters The total power of the tap coefficient sequence in the frequency domain is added to obtain the total power in the frequency domain; the SNR of the channel is determined to be 0 according to the power ratio of the total power of the oscillation and the total power of the frequency domain, where the coefficient update period is the adaptive The period of the equalizer updating coefficient, and the coefficient updating period is less than or equal to the second detection period.
  • the coefficient of the adaptive equalizer has a greater oscillation power at each oscillation frequency point in the frequency domain. Therefore, in the embodiment of the present application, the total power of the oscillation and the total power of the frequency domain can be calculated according to The ratio of determines the SNR of the channel.
  • the second detection period may be equal to the coefficient update period
  • the frequency domain includes N frequency points
  • the tap coefficient sequence of the target tap of each filter includes: N obtained by sampling in N+1 coefficient update periods. +1 tap coefficients.
  • the N+1 tap coefficients are arranged in the order of sampling time from far to near.
  • the N is an integer greater than 1; the tap coefficient sequence of each filter is calculated for each oscillation frequency point in the frequency domain
  • the process of oscillating power can include:
  • the tap coefficient sequence of each filter For the tap coefficient sequence of each filter, subtract the N+1 tap coefficient from the first tap coefficient to obtain the coefficient difference ⁇ of each tap coefficient sequence; determine the tap coefficient according to the coefficient difference ⁇
  • the oscillating power of each oscillating frequency point of the tap coefficient sequence in the frequency domain can be determined by multiplication based on the coefficient difference and the oscillation coefficient, without the need to perform Fourier transform on the tap coefficient sequence, thereby
  • the power consumption of data processing is effectively reduced, and the efficiency of data processing is improved.
  • the 4 oscillating frequency points can be respectively: Frequency points, the first Frequency points, the first Frequency points, and the first Frequency points; where t is the loop delay of the adaptive equalizer, Means round down, Indicates rounding up.
  • the frequency domain includes N frequency points
  • the tap coefficient sequence of each filter includes: N+1 tap coefficients obtained by sampling in N+1 coefficient update periods, and the N+1 tap coefficients are in accordance with The sampling time is arranged in order from farthest to nearest, and the N is an integer greater than 1.
  • the process of calculating the total power of the tap coefficient sequence of each filter in the frequency domain may include: For the tap coefficient sequence of each filter, the first The power of the N+1 tap coefficients is subtracted from the power of the first tap coefficient to obtain the power difference of each tap coefficient sequence; the third product of the power difference and the N is determined; the third product is compared with the previous The total power determined in a second detection period is added to obtain the total power in the frequency domain of the tap coefficient sequence of the filter in the current second detection period.
  • the total power of the tap coefficient sequence in the frequency domain can be determined through multiplication and addition based on the power difference of the tap coefficient sequence, without the need to perform Fourier transform on the tap coefficient sequence, which is effective
  • the power consumption of data processing is reduced, and the efficiency of data processing is improved.
  • the device may include at least one module, and the at least one module may be used to implement the method for adjusting the step size of the adaptive equalizer provided in the foregoing aspect.
  • a device for adjusting the step size of an adaptive equalizer may include a memory, a processor, and a computer program stored in the memory and running on the processor, and the processor executes the The computer program implements the step size adjustment method of the adaptive equalizer provided in the above-mentioned aspect.
  • a computer-readable storage medium stores instructions, which when run on a computer, cause the computer to execute the step size of the adaptive equalizer provided in the above-mentioned aspect. Adjustment method.
  • a computer program product containing instructions, which when the computer program product runs on a computer, causes the computer to execute the step size adjustment method of the adaptive equalizer provided in the above aspect.
  • a signal receiver includes: an adaptive equalizer, and the step adjustment device provided in the above aspect; wherein the adaptive equalizer is used to perform a For compensation, the step adjustment device is used to adjust the coefficients of the adaptive equalizer.
  • a data communication system in yet another aspect, includes: a signal transmitter and the signal receiver provided in the above aspect; the signal transmitter is used to send a data signal to the signal receiver through a channel; the signal receiving The machine is used to receive data signals and process the received data signals to recover the original signal.
  • the embodiments of the present application provide a step size adjustment method, device, signal receiver, and system for an adaptive equalizer.
  • the method can detect the RSOP and SNR of the channel, and can adjust the self-adjustment according to the RSOP and SNR
  • the step size of the equalizer is adapted, so that the adaptive equalizer can update its coefficients according to the adjusted step size.
  • the method provided in the embodiments of the present application can enable the coefficients of the adaptive equalizer to adapt to changes in the RSOP and SNR of the channel in time, and improve the coefficient convergence performance of the adaptive equalizer, thereby improving The signal transmission performance of the data communication system is improved.
  • FIG. 1 is a schematic structural diagram of an adaptive equalizer provided by an embodiment of the present application
  • FIG. 2 is a flowchart of a step size adjustment method of an adaptive equalizer provided by an embodiment of the present application
  • FIG. 3 is a schematic structural diagram of a step adjustment device provided by an embodiment of the present application.
  • FIG. 4 is a schematic structural diagram of a first low-pass filter provided by an embodiment of the present application.
  • Fig. 5 is a schematic structural diagram of a step adjustment module provided by an embodiment of the present application.
  • FIG. 6 is a schematic diagram of the data structure of a data signal transmitted in a data communication system provided by an embodiment of the present application.
  • FIG. 7 is a flowchart of a method for determining RSOP according to a compensation signal according to an embodiment of the present application
  • FIG. 8 is a schematic structural diagram of a first determining module provided by an embodiment of the present application.
  • FIG. 9 is a schematic structural diagram of a filter in an adaptive equalizer provided by an embodiment of the present application.
  • FIG. 10 is a flowchart of a method for determining RSOP according to coefficients of an adaptive equalizer according to an embodiment of the present application
  • FIG. 11 is a flowchart of a method for determining SNR according to coefficients of an adaptive equalizer according to an embodiment of the present application
  • FIG. 12 is a schematic structural diagram of a second determining module provided by an embodiment of the present application.
  • FIG. 13 is a flowchart of a method for determining SNR based on a hard judgment error according to an embodiment of the present application
  • FIG. 14 is a schematic structural diagram of an adaptive equalizer and a step size adjustment device provided by an embodiment of the present application.
  • 15 is a schematic structural diagram of another adaptive equalizer and step size adjustment device provided by an embodiment of the present application.
  • FIG. 16 is a schematic structural diagram of yet another adaptive equalizer and step size adjustment device provided by an embodiment of the present application.
  • FIG. 17 is a schematic structural diagram of an adaptive equalizer and step size adjustment device provided by an embodiment of the present application.
  • FIG. 18 is a schematic diagram of the step size of an adaptive equalizer according to an embodiment of the present application varying with RSOP and SNR;
  • FIG. 19 is a schematic diagram of BER changing with SNR according to an embodiment of the present application.
  • FIG. 20 is a schematic structural diagram of a step adjustment module provided by an embodiment of the present application.
  • FIG. 21 is a schematic structural diagram of a first determining module provided by an embodiment of the present application.
  • FIG. 22 is a schematic structural diagram of a second determining module provided by an embodiment of the present application.
  • Figure 23 is a schematic structural diagram of another step adjustment device provided by an embodiment of the present application.
  • FIG. 24 is a schematic structural diagram of a signal receiver provided by an embodiment of the present application.
  • FIG. 25 is a schematic structural diagram of a data communication system provided by an embodiment of the present application.
  • Fig. 1 is a schematic structural diagram of an adaptive equalizer provided by an embodiment of the present application.
  • the adaptive equalizer may include: a filter 01, a hard judgment error determination module 02, a conjugate calculation module 03, Multiplier 04 and coefficient update module 05.
  • the filter 01 can be a multiple in multiple out (MIMO) finite impulse response (finite impulse response) filter, and the filter 01 can be used to process the received data signal Din, and The processed compensation signal S is output.
  • MIMO multiple in multiple out
  • finite impulse response finite impulse response
  • the conjugate calculation module 03 is used to calculate the conjugate conj(Din) of the data signal Din.
  • the multiplier 04 is used to calculate the product of the conjugate conj (Din) of the data signal and the hard judgment error E.
  • the coefficient update module 05 can update the coefficients of the filter 01 by using a least mean square (LMS) algorithm according to the product output by the multiplier 04, and the coefficients of the filter 01 are the coefficients of the adaptive equalizer.
  • LMS least mean square
  • the LMS algorithm may be a normalized least mean square (NLMS, normalized least mean square) algorithm or a second order least mean square (second order least mean square, SLMS) algorithm, etc.
  • the coefficient update module 05 may periodically update the coefficient of the filter 01 according to a preset coefficient update cycle.
  • ⁇ (n-1) is the coefficient of the filter 01 in the n-1th coefficient update cycle
  • mu is the step size of the coefficient update, that is, the step size of the adaptive equalizer.
  • the state of polarization (SOP) of the channel will change, and the channel
  • the SOP and polarization mode dispersion (PMD) of the data signal transmitted in the data signal rapidly change, causing the signal receiver to lose lock.
  • a lightning shock will cause the SOP of the channel to reach hundreds of thousands per second (s) within a dozen milliseconds, or even a change of several million radians (rad), that is to say, the RSOP of the channel will reach hundreds of thousands to several million. rad/s.
  • an adaptive equalizer based on a fixed step size mu update coefficient will not be able to adapt to the rapid change of channel characteristics (such as SOP). For example, if the fixed step size is too small, the coefficients of the adaptive equalizer will converge slowly and cannot adapt to changes in channel characteristics in time. If the fixed step size is too large, the coefficients of the adaptive equalizer will have a large convergence error, and the channel distortion cannot be effectively compensated. Therefore, the coefficient convergence performance of the adaptive equalizer based on the fixed step size mu update coefficient is poor, which will affect the signal transmission performance of the data communication system.
  • the related art also provides an adaptive equalizer using Kalman filter.
  • the adaptive equalizer can update the coefficients of the Kalman filter based on the constructed channel model, so that the updated coefficients can adapt to changes in the SOP of the channel. .
  • the adaptive equalizer needs to establish an accurate channel model in the process of updating coefficients, and its application flexibility is poor.
  • This application provides a step size adjustment method of an adaptive equalizer, which can be used to adjust the step size that the adaptive equalizer refers to when updating its coefficients, so as to ensure that the coefficients of the adaptive equalizer can adapt to the channel in time
  • the change of RSOP and SNR improves the coefficient convergence performance of the adaptive equalizer.
  • the step size adjustment method can be applied to a step size adjustment device, and both the adaptive equalizer and the step size adjustment device can be set in the signal receiver of the data communication system. Referring to Figure 2, the method may include:
  • Step 101 Determine the RSOP of the channel in the data communication system.
  • the step adjustment device may determine the RSOP of the channel according to the compensation signal output by the adaptive equalizer in the first detection period every first detection period.
  • the compensation signal is a signal output after the adaptive equalizer processes the data signal transmitted in the data communication system.
  • the step adjustment device may also determine the RSOP of the channel according to the coefficient of the adaptive equalizer every second detection period.
  • the duration of the first detection period may be equal to the length of the data frame transmitted in the data communication system.
  • the second detection period may be greater than or equal to the coefficient update period for the adaptive equalizer to update its coefficients, and the second detection period is less than the first detection period.
  • the first detection period may be equal to 10 to 20 second detection periods.
  • the step adjustment device may periodically detect and update the RSOP of the channel based on the compensation signal output by the adaptive equalizer or the coefficient of the adaptive equalizer.
  • Step 102 Determine the SNR of the channel.
  • the step size adjustment device may determine the SNR of the channel of the data communication system according to the coefficient of the adaptive equalizer every second detection period.
  • the step size adjustment device may also determine the SNR of the channel of the data communication system according to the hard judgment error of the compensation signal output by the adaptive equalizer in the first detection period every first detection period.
  • the step size adjustment device may periodically detect and update the SNR of the data communication system channel based on the coefficient of the adaptive equalizer or the hard judgment error of the compensation signal output by the adaptive equalizer.
  • FIG. 3 is a schematic structural diagram of a step adjustment device provided by an embodiment of the present application.
  • the device may include: a first determination module 11 and a second determination module 12, and the first determination module 11 may be used To detect the RSOP of the channel, the second determining module 12 can be used to detect the SNR of the channel.
  • Step 103 Perform low-pass filtering processing on the RSOP and the SNR respectively.
  • the step adjustment device can perform low-pass filtering processing on the RSOP and the SNR respectively based on a preset low-pass filtering algorithm, so as to achieve the purpose of noise reduction.
  • the step size adjustment device may further include a first low pass filter (LPF) 13 and a second LPF 14.
  • the first LPF 13 may be used to perform low-pass filtering processing on RSOP
  • the second LPF 14 may be used to perform low-pass filtering processing on SNR.
  • the first LPF 13 and the second LPF 14 may both be alpha filters.
  • FIG. 4 is a schematic structural diagram of a first LPF provided by an embodiment of the present application.
  • the first LPF 13 may include: a first multiplier 131, a first register 132, The second multiplier 133 and the first adder 134.
  • the first multiplier 131 may be used to calculate the product of the RSOP output by the first determining module 11 and the coefficient ⁇ , 0 ⁇ 1.
  • the first register 132 is used to delay the result (ie L_RSOP) output by the adder 134 by one detection period and then provide it to the second multiplier 133.
  • the second multiplier 133 is used to calculate the product of the delayed L_RSOP and the coefficient (1- ⁇ ).
  • the low-pass filtered RSOP that is, L_RSOP
  • the structure and filtering principle of the second LPF 14 can refer to the first LPF 13, which will not be repeated here.
  • the alpha filter can weight the RSOP determined in the current detection cycle and the L_RSOP determined in the previous detection cycle (weights are ⁇ and 1- ⁇ , respectively) to determine the current detection cycle L_RSOP.
  • Step 104 Adjust the step size of the adaptive equalizer according to the RSOP after the low-pass filtering process and the SNR after the low-pass filtering process.
  • the step-length adjustment device may further include a step-length adjustment module 15, which can be based on the RSOP (ie L_RSOP) after low-pass filtering and the SNR (ie, L_RSOP) after low-pass filtering.
  • L_SNR adjust the step size of the adaptive equalizer.
  • the step size of the adjusted adaptive equalizer is positively related to the RSOP and negatively related to the SNR, that is, the larger the RSOP, the larger the adjusted step size; the larger the SNR, the smaller the adjusted step size .
  • the step size adjustment module 15 may first determine the first product of the weight coefficient w and the SNR; and then determine the first product obtained by subtracting the first product from the absolute value of the RSOP. A difference; then the second product of the first difference and the scale coefficient c is added to the initial step size mu0 of the adaptive equalizer to obtain the adjusted step size mu of the adaptive equalizer. That is, the adjusted step size mu can satisfy:
  • the adjusted step size mu can satisfy:
  • FIG. 5 is a schematic structural diagram of a step size adjustment module 15 provided by an embodiment of the present application.
  • the step size adjustment module 15 may include: an absolute value (ABS) calculation module 151, a third multiplication 152, a second adder 153, a fourth multiplier 154, and a third adder 155.
  • ABS calculation module 151 may be used to calculate the absolute value of L_RSOP output by the first LPF 13.
  • the third multiplier 152 is used to calculate the product of the L_SNR output by the second LPF 14 and the negative weight coefficient w (that is, -w).
  • the second adder 152 is used to add the absolute value of L_RSOP
  • the fourth multiplier 154 is used to calculate the second product of the first difference and the proportional coefficient c.
  • the third adder 155 is used to add the second product to the initial step size mu0 of the adaptive equalizer, thereby obtaining the adjusted step size mu of the adaptive equalizer.
  • the initial step size mu0, the weight coefficient w, and the scale coefficient c may all be fixed values pre-stored in the step size adjustment module 15, and the value of each parameter may be the developer Set according to application scenario requirements and experience.
  • the initial step size mu0 can be a value greater than 0 and less than 1, and can be a value of the order of 10 -4 or 10 -5 .
  • the weight coefficient w may be a value greater than 0 and less than 1, and may be a value of the order of 10 -1.
  • the proportional coefficient c can be a value greater than 0 and less than 1, and can be a value of the order of 10 -3.
  • the embodiment of the present application provides a step size adjustment method of an adaptive equalizer, which can detect the RSOP and SNR of the channel, and can adjust the step size of the adaptive equalizer according to the RSOP and SNR. This can enable the adaptive equalizer to update its coefficients according to the adjusted step size.
  • the method provided in the embodiments of the present application can enable the coefficients of the adaptive equalizer to adapt to changes in the RSOP and SNR of the channel in time, and improve the coefficient convergence performance of the adaptive equalizer, thereby improving The signal transmission performance of the data communication system is improved.
  • the step adjustment device may determine the RSOP of the channel according to the compensation signal output by the adaptive equalizer in the first detection period every first detection period. .
  • FIG. 6 is a schematic diagram of the data structure of a data signal transmitted in a data communication system provided by an embodiment of the present application.
  • the signal transmitter in the data communication system can send to the signal receiver in units of data frames.
  • Data signal where the data signal of each data frame can include training data (also called training sequence) and user data.
  • the training data can be randomly generated by the signal transmitter and used for the adaptive equalizer to perform preliminary calculations on its coefficients.
  • Updated data In the embodiment of the present application, the first detection period for the step adjustment device to update the RSOP may be equal to the length of a data frame, and the compensation signal referenced by the step adjustment device to update the RSOP may be an adaptive equalizer pair The output signal after processing the training data in a data frame.
  • the step adjustment device can determine the compensation signal in the training data based on the compensation signal of the training data output by the adaptive equalizer.
  • the RSOP of the channel within the duration of the frame.
  • the compensation signal output by the adaptive equalizer may include: a first polarization state signal and a second polarization state signal.
  • the process of the step adjustment device determining RSOP according to the compensation signal may include the following steps:
  • Step 1011a Construct an input matrix with the first polarization state signal as the first row element and the second polarization state signal as the second row element.
  • the step adjustment device can obtain the compensation signal output by the adaptive equalizer in a first detection period, the compensation signal includes a first polarization state signal x and a second polarization state signal y, and the two polarization state signals
  • the step adjustment device can arrange the two polarization state signals x and y in columns to construct an input matrix
  • the number of rows of the input matrix I is 2, and the number of columns is equal to length(x).
  • Step 1012a Multiply the input matrix and the pseudo-inverse matrix of the input matrix to obtain a phase detection matrix.
  • the step adjustment device may first calculate the pseudo-inverse matrix pinv(I) of the input matrix I, and the number of rows of the pseudo-inverse matrix pinv(I) is length(x) and the number of columns is 2. After that, the step adjustment device can multiply the input matrix I by the pseudo-inverse matrix pinv(I) to obtain the phase detection matrix A.
  • the number of rows and columns of the phase detection matrix A are both 2, and the phase detection matrix A can be expressed as:
  • u and v respectively represent the element in the first row and second column and the element in the first row and second column of the phase detection matrix A.
  • Step 1013a Determine the second difference between the element in the second row and the first column of the phase detection matrix and the element in the first row and the second column.
  • Step 1014a Determine the RSOP of the channel according to the second difference.
  • the RSOP of the channel within the duration of one data frame determined by the step adjustment device may be real( ⁇ A), where real() represents the real part.
  • the real( ⁇ A) can be used to reflect the size of the RSOP of the channel, that is, the real( ⁇ A) is determined as the RSOP for adjusting the step size.
  • FIG. 8 is a schematic structural diagram of a first determining module 11 provided by an embodiment of the present application.
  • the first determining module 11 may include: a pseudo-inverse matrix determining sub-module 111, a fifth multiplier 112, and a second Four adder 113 and real part calculation sub-module 114.
  • the pseudo-inverse matrix determining sub-module 111 can be used to determine the pseudo-inverse matrix pinv(I) of the input matrix I.
  • the fifth multiplier 112 can be used to calculate the product of the input matrix I and the pseudo-inverse matrix pinv(I) to obtain the phase detection matrix A.
  • the fourth adder 113 may be used to calculate the second difference between the element A(2,1) in the second row and first column of the phase detection matrix A and the element A(1,2) in the first row and second column. ⁇ A.
  • the real part calculation sub-module 114 may be used to calculate the real part of the second difference ⁇ A, that is, to calculate real( ⁇ A).
  • FIG. 9 is a schematic structural diagram of a filter in an adaptive equalizer provided by an embodiment of the present application.
  • the adaptive equalizer may include: four butterfly-connected filters 011 to 014, each Each filter has multiple taps.
  • the coefficients of the adaptive equalizer may include: tap coefficients of multiple taps of each of the four filters.
  • each filter can be an FIR filter.
  • the first filter 011 can be used to extract the signal of the first polarization state sent by the signal transmitter from the received signal of the first polarization state (that is, the X polarization state).
  • the coefficient of the first filter 011 can be expressed as ⁇ xx .
  • the second filter 012 can be used to extract the signal of the second polarization state (ie Y polarization state) sent by the signal transmitter from the received signal of the first polarization state, and the coefficients of the second filter 012 It can be expressed as ⁇ xy .
  • the third filter 013 may be used to extract the signal of the first polarization state sent by the signal transmitter from the received signal of the second polarization state, and the coefficient of the third filter 013 may be expressed as ⁇ yx .
  • the fourth filter 014 may be used to extract the signal of the second polarization state sent by the signal transmitter from the received signal of the second polarization state, and the coefficient of the fourth filter 014 may be expressed as ⁇ yy .
  • the number of taps of the four filters may be equal, for example, the number of taps may all be M (M is an integer greater than 1), then the coefficients of the four filters ⁇ xx , ⁇ xy , Both ⁇ yx and ⁇ yy can be arrays of length M, and each element in the array is a tap coefficient of one tap.
  • the step size adjustment device may also determine the RSOP of the channel according to the coefficient of the adaptive equalizer every second detection period.
  • the process of the step adjustment device determining the RSOP according to the coefficient of the adaptive equalizer may include the following steps:
  • Step 1011b every second detection period, obtain the tap coefficients of the center tap of each filter in two adjacent coefficient update periods.
  • the coefficient update period is a period for the adaptive equalizer to update coefficients, and each coefficient update period may also be referred to as a beat.
  • the step size adjustment device can obtain the tap coefficients of the center tap of each filter in the two most recent coefficient update periods every second detection period, and obtain two values of the center tap of each filter. Tap coefficients.
  • the second detection period may be greater than or equal to the coefficient update period.
  • the center tap may refer to the M/2th tap; if the number of taps M of the filter is odd, the center tap may refer to the (M) +1)/2 taps.
  • the step adjustment device can obtain the tap coefficients of the m-th tap of each filter in the last two beats every other beat. If the last two beats are the nth beat and the n-1th beat, the tap coefficient of the m-th tap of the first filter 011 acquired by the step adjustment device in the last two beats can be: ⁇ xx (m, n ) And ⁇ xx (m,n-1).
  • Step 1012b Calculate the third difference of the tap coefficient of the center tap of each filter in two adjacent coefficient update periods.
  • the third difference value may be a value obtained by subtracting the tap coefficient of the previous coefficient update period from the tap coefficient of the latest coefficient update period.
  • the third difference between the m-th tap of the first filter 011 in two adjacent coefficient update periods is: ⁇ xx (m, n)- ⁇ xx (m, n-1).
  • Step 1013b Determine the RSOP of the channel according to the average value of the third difference of the four filters.
  • the step adjustment device calculates the third difference of the four filters
  • the average value of the third difference of the four filters can be calculated, and then the absolute value of the average value can be determined as the RSOP of the channel.
  • the process of the step adjustment device determining the RSOP of the channel according to the coefficient of the adaptive equalizer may further include:
  • the tap coefficients of the center tap of each filter in the nearest N coefficient update periods are obtained, and the tap coefficient sequence of each filter is obtained.
  • the tap coefficient sequence includes N tap coefficients, N is 2 to the z power, and z is an integer greater than 1.
  • the step adjustment device may perform N-point fast Fourier transform (FFT) on the tap coefficient sequence of each filter, thereby converting the tap coefficient sequence of each filter to the frequency domain.
  • FFT N-point fast Fourier transform
  • the step adjustment device can obtain the frequency value of a certain frequency point (such as the first frequency point or the second frequency point) of the tap coefficient sequence of each filter in the frequency domain, and calculate the four obtained
  • the average value of the frequency value of the filter, the average value is the RSOP of the channel.
  • the step size adjustment device may determine the SNR of the channel of the data communication system according to the coefficient of the adaptive equalizer every second detection period.
  • the process of the step adjustment device determining the SNR according to the coefficient of the adaptive equalizer may include the following steps:
  • Step 1021a Obtain the tap coefficient sequence of the target tap of each filter every second detection period.
  • the sequence of tap coefficients of the target tap of each filter may include: a plurality of tap coefficients obtained by sampling the tap coefficients of the target tap of the filter in a plurality of coefficient update periods, wherein each The tap coefficient is sampled in a coefficient update cycle.
  • the sequence of tap coefficients may include N tap coefficients sampled in N coefficient update periods. Wherein, N is an integer greater than 1, and N can be 2 to the z power, and z is an integer greater than 1.
  • the target tap of each filter may be any tap among the multiple taps of the filter, and the sequence numbers of the target taps of each filter in the multiple taps are the same.
  • the target tap of each filter may be the first tap or the center tap.
  • Step 1022a Calculate the oscillating power of each oscillating frequency point in the frequency domain of the tap coefficient sequence of each filter.
  • the second determining module 12 in the step adjustment device may perform an N-point FFT on the tap coefficient sequence of each filter, thereby converting the tap coefficient sequence of each filter to the frequency domain.
  • the tap coefficient sequence of each filter includes N frequency points in the frequency domain, and there are at least two oscillation frequency points in the N frequency points.
  • the step size adjusting device can separately calculate the oscillation power of each of the at least two oscillation frequency points of the tap coefficient sequence of each filter.
  • t is the loop delay of the adaptive equalizer, Means round down, Indicates rounding up.
  • the loop delay refers to the sum of the delays of each module in the adaptive equalizer.
  • the 4 oscillation frequency points of each tap coefficient sequence in the frequency domain can be respectively: the 4th frequency point, the 5th frequency point, the 510th frequency point, and The 509th frequency point.
  • the second detection period may be equal to the coefficient update period.
  • the sequence of tap coefficients obtained by the step adjustment device in each second detection period may include N+1 tap coefficients.
  • FIG. 12 is a schematic structural diagram of a second determining module for determining SNR according to an embodiment of the present application.
  • the second determining module 12 may include: four buffers 121, as shown in FIG. Only one buffer 121 is schematically shown in.
  • each buffer 121 may be used to perform time-domain sampling on the tap coefficients of the target tap of a filter to obtain the tap coefficient sequence of the target tap of the filter.
  • the length of each buffer 121 may be N+1, that is, the buffer 121 can store N+1 tap coefficients.
  • the buffer 121 may be a first input first output (FIFO) buffer, and the buffer 121 may sequentially store the N+1 tap coefficient sequences included in the sequence of sampling times from far to near Tap coefficient.
  • FIFO first input first output
  • the first buffer 121 of the four buffers 121 may obtain the first tap of the first filter 011 every coefficient update period. Tap coefficients in the current coefficient update cycle and store them. Wherein, if N+1 tap coefficients have been stored in the buffer 121, the buffer 121 may delete the earliest stored tap coefficient among the N+1 tap coefficients that have been stored, and then the newly acquired tap coefficient The coefficient is deposited.
  • the first filter 121 in the first buffer 011 stored in the first tap coefficient of the tap sequence can include ⁇ xx (1,1) to ⁇ xx (1, N + 1 ) a total of N + 1 tap coefficient .
  • the first buffer 121 which will not be repeated here.
  • the process of determining the oscillation power of each oscillation frequency point of the tap coefficient sequence in the frequency domain in the above step 1022a may include the following steps:
  • Step a11 For the tap coefficient sequence of each filter, subtract the N+1th tap coefficient from the first tap coefficient to obtain the coefficient difference ⁇ of each tap coefficient sequence.
  • the coefficient difference ⁇ refers to the value obtained by subtracting the first tap coefficient from the N+1th tap coefficient. Since the N+1 tap coefficients in the tap coefficient sequence of each filter are arranged in the order of sampling time from farthest to nearest, the N+1th tap coefficient is also the coefficient obtained by the most recent sample. The first The tap coefficient is also the coefficient obtained by sampling the earliest among the N+1 tap coefficients.
  • the second determining module 12 may further include: 4 ⁇ J oscillating power calculation sub-modules 122, and only one oscillating power calculation sub-module 122 is schematically shown in FIG. 12, where J is N The number of oscillation frequency points included in each frequency point, J is an integer greater than 1 and less than N.
  • each oscillating power calculation sub-module 122 may be used to calculate the oscillating power of an oscillating frequency point in the frequency domain of a tap coefficient sequence of a filter.
  • each oscillating power calculation sub-module 122 may include: a coefficient difference calculation unit 1221, which may be used to calculate the N+1th tap coefficient stored in the buffer and the first The coefficient difference ⁇ of the tap coefficients.
  • Step a12 Determine the reference value of each oscillation frequency point of the tap coefficient sequence in the frequency domain according to the coefficient difference ⁇ .
  • the reference value d of the k-th frequency point of the N frequency points of the tap coefficient sequence can satisfy:
  • d' is the reference value determined in the previous second detection cycle
  • k is a positive integer not greater than N.
  • each oscillating power calculation sub-module 122 may further include: a second register 1222, a fifth adder 1223, and a sixth multiplier 1224.
  • the second register 1222 is used to delay the reference value output by the sixth multiplier 1224 by a second detection period and then output to the fifth adder 1223, that is, the second register 1222 can be used in each second detection period.
  • the fifth adder 1223 Provide the fifth adder 1223 with the reference value d'determined in the previous second detection period.
  • the fifth adder 1223 is used to calculate the sum of the coefficient difference ⁇ and the reference value d′ determined in the previous second detection period.
  • the sixth multiplier 1224 is used to multiply the sum of the coefficient difference ⁇ and the reference value d' ⁇ +d' by the oscillation coefficient of an oscillation frequency point, so as to obtain that in the current second detection period, the tap The reference value d of an oscillating frequency point of the coefficient sequence in the frequency domain.
  • the first oscillating power calculation sub-module 122 may be used to calculate the first oscillating power calculation sub-module 122.
  • the tap coefficient sequence ⁇ xx of the first tap of a filter 011 (1) The oscillation power of the first oscillation frequency point in the frequency domain.
  • the sixth multiplier 1224 in the first oscillating power calculation sub-module 122 can calculate the sum of the coefficient difference ⁇ and the reference value d', ⁇ +d', and the first oscillating frequency point Oscillation coefficient Multiply to get the reference value of the first oscillation frequency point.
  • Step a13 Determine the power of the reference value as the oscillating power of the tap coefficient sequence at the oscillating frequency point.
  • each oscillating power calculation sub-module 122 may calculate the power of the reference value, and determine the power of the reference value as the oscillating power of the tap coefficient sequence at the oscillating frequency point.
  • each oscillating power calculation sub-module 122 may further include: a power calculation unit 1225, and the power calculation unit 1225 may calculate the power of the reference value output by the sixth multiplier 1224 to obtain a The oscillating power of the tap coefficient sequence of the target tap of the filter at an oscillating frequency point.
  • the N+1 tap coefficients in the tap coefficient sequence of the first filter 011 acquired in the nth second detection period can be expressed as:
  • ⁇ xx,n (1,1:N+1) [ ⁇ xx,n-1 (1,2:N+1); ⁇ xx,n (1,N+1)];
  • ⁇ xx,n-1 (1,2:N+1) represents the second to second tap coefficients of the N+1 tap coefficients obtained in the n-1 second detection cycle (that is, the previous second detection cycle) N+1 tap coefficients
  • ⁇ xx,n (1,N+1) represents the N+1 tap coefficient obtained in the nth second detection period, that is, the coefficient obtained by the most recent sampling.
  • the N+1 tap coefficients in the tap coefficient sequence of the first filter 011 acquired in the n+1 second detection period can be expressed as:
  • ⁇ xx,n+1 (1,1:N+1) [ ⁇ xx,n (1,2:N+1); ⁇ xx,n+1 (1,N+1)];
  • the FFT result includes frequency values of N frequency points from 1 to N, and the power of the k-th frequency point among the N frequency points can be expressed as:
  • the total power of the N frequency points can be expressed as:
  • the coefficient difference between the N+1th tap coefficient and the first tap coefficient can be compared with the N-point FFT result of the nth second detection cycle After the addition, it is calculated by multiplying with the oscillation coefficient of the oscillation frequency point.
  • the calculation process only requires two addition operations and one multiplication operation, without the need for N-point FFT, which effectively reduces the power consumption of data processing. Improve the efficiency of data processing.
  • Step 1023a Add the oscillating power of the tap coefficient sequences of the four filters at at least two oscillating frequency points to obtain the total oscillating power.
  • the step adjustment device determines the oscillating power of each of the J oscillating frequency points of the tap coefficient sequence of each of the four filters
  • the determined A total of 4 ⁇ J oscillating powers are added to obtain the total oscillating power.
  • the total oscillating power P1 can be expressed as: Where P1 ij represents the oscillation power of the j-th oscillation frequency point in the J oscillation frequency points of the frequency domain of the tap coefficient sequence of the i-th filter, and i is a positive integer not greater than 4.
  • the second determining module 12 may further include a first summation sub-module 123, and the first summation sub-module 123 may perform calculation on the oscillating power output by the 4 ⁇ J oscillating power calculation sub-modules 122. Sum, get the total power of oscillation P1.
  • Step 1024a Calculate the total power of the tap coefficient sequence of each filter in the frequency domain.
  • the step-size adjusting device may add the power of each frequency point of the tap coefficient sequence in the frequency domain to obtain the total of the tap coefficient sequence in the frequency domain. power. For example, if the sequence of tap coefficients includes N coefficients, the step size adjusting device performs an N-point FFT on the N coefficients, and the obtained FFT result includes the frequency value of the N frequency points. The sum of the power of the frequency value of the N frequency points (that is, the sum of squares) is the total power of the tap coefficient sequence in the frequency domain.
  • the second determining module 12 in the step adjustment device may further include: four total power calculation sub-modules 124, and only one total power calculation sub-module 124 is schematically shown in FIG. 12 .
  • each total power calculation sub-module 124 can be used to calculate the total power of a filter tap coefficient sequence in the frequency domain.
  • the foregoing step 1024a may include the following steps:
  • Step a21 For the tap coefficient sequence of each filter, subtract the power of the N+1th tap coefficient from the power of the first tap coefficient to obtain the power difference of each tap coefficient sequence.
  • the power of each tap coefficient may be equal to the square of the tap coefficient.
  • 2 is the power of the first tap coefficient in the sequence of tap coefficients of the first filter 011.
  • each total power calculation sub-module 124 may include a power difference calculation unit 1241, and the power difference calculation unit 1241 may be used to calculate the power difference of a tap coefficient sequence of a filter.
  • Step a22 Determine the third product of the power difference and N.
  • each total power calculation sub-module 124 may further include a seventh multiplier 1242, and the seventh multiplier 1242 may multiply the power difference output by the power difference calculation unit 1241 by N to obtain a third product.
  • Step a23 Add the third product to the total power determined in the previous second detection period to obtain the total power in the frequency domain of the tap coefficient sequence of the filter in the current second detection period.
  • the third product can be compared with the total power determined in the previous second detection period. Plus, so as to obtain the total power of the filter's tap coefficient sequence in the frequency domain in the current second detection period.
  • each total power calculation sub-module 124 may further include: a third register 1243 and a sixth adder 1244.
  • the third register 1243 can be used to delay the total power output by the sixth adder 1244 for a second detection period and then output to the sixth adder 1244, that is, the third register 1243 can be used in every second detection period,
  • the sixth adder 1244 is provided with the total power determined in the previous second detection period.
  • the sixth adder 1244 can be used to add the third product output by the seventh multiplier 1242 to the total power determined in the previous second detection period output by the third register 1243 to obtain the current second detection period , The total power of the filter's tap coefficient sequence in the frequency domain.
  • Step 1025a Add the total power in the frequency domain of the tap coefficient sequences of the four filters to obtain the total power in the frequency domain.
  • the total power P2 in the frequency domain can satisfy: Where p2 i is the total power of the i-th filter's tap coefficient sequence in the frequency domain.
  • the second determining module 12 may further include a second summation sub-module 125, and the second summation sub-module 125 may sum the total power output by the four total power calculation sub-modules 124, Get the total power in the frequency domain.
  • Step 1026a Detect whether the power ratio of the total power of the oscillation to the total power of the frequency domain is greater than the ratio threshold.
  • step 1027a is executed; if the power ratio P1/P2 is not greater than the ratio threshold Pth, step 1028a is executed.
  • the ratio threshold Pth is pre-stored in the step adjustment device, and the ratio threshold Pth may be a number of the order of 10 ⁇ 1 that is greater than 0 and less than 1.
  • Step 1027a Determine the reciprocal of the difference between the power ratio and the ratio threshold as the SNR of the channel of the data communication system.
  • Step 1028a Determine that the SNR of the channel of the data communication system is infinite.
  • the step size adjustment device can determine that the SNR of the channel of the data communication system is the reciprocal of 0, that is, determine that the SNR is infinite.
  • the second determining module 12 in the step adjustment device may further include an SNR determining sub-module 126, and the SNR determining sub-module 126 may be used to determine the total amount of oscillation according to the first summation sub-module 123.
  • the power, and the total frequency domain power output by the second summation sub-module 125 determine the SNR.
  • the SNR determination submodule 126 may include: a first selector 1261, a fourth register 1262, a derivation submodule 1263, an eighth multiplier 1264, a seventh adder 1265, and a second selector 1266.
  • the first selector 1261 can output the total power to the negation submodule 1263.
  • the fourth register 1262 may be used to delay the total frequency domain power output by the first selector 1261 for a second detection period before outputting to the first selector 1261.
  • the inversion submodule 1263 may be used to calculate the reciprocal 1/P2 of the total frequency domain power P2 provided by the first selector 1261.
  • the inversion submodule 1263 may use coordinate rotation digital computer (CORDIC).
  • CORDIC coordinate rotation digital computer
  • the algorithm calculates the reciprocal 1/P2 of the total power P2 in the frequency domain.
  • the CORDIC algorithm has higher calculation efficiency and lower power consumption.
  • the eighth multiplier 1264 can multiply the total oscillating power P1 output by the second summation sub-module 123 by the reciprocal 1/P2 output by the reciprocal sub-module 1263 to obtain the total oscillating power P1 and the total power in the frequency domain.
  • the power ratio of P2 is P1/P2.
  • the seventh adder 1265 can add the power ratio P1/P2 to the pre-stored negative ratio threshold -Pth, thereby calculating the fourth difference between the power ratio P1/P2 and the ratio threshold Pth: P1/P2 -Pth.
  • the second selector 1266 can be used to determine whether the fourth difference is greater than 0, and if the fourth difference is greater than 0, it can output the inverse of the fourth difference: 1/(P1/P2-Pth), that is, you can The reciprocal of the fourth difference: 1/(P1/P2-Pth) is output as the SNR. If the fourth difference is not greater than 0, then 0 can be output as the noise-to-signal ratio, which refers to the ratio of noise to signal. That is, it can be determined that the SNR is infinite.
  • the ratio threshold Pth is the ratio of the total oscillating power under the normal condition of the channel to the total power in the frequency domain, and the total oscillating power under the normal condition of the channel can also be understood as the noise floor of the communication system.
  • the coefficient of the adaptive equalizer has a greater oscillation power at each oscillation frequency point in the frequency domain. Therefore, in the embodiment of the present application, the total power of the oscillation and the total power of the frequency domain can be calculated according to The ratio of determines the SNR of the channel.
  • the step size adjustment device may also, every first detection period, determine the hard error of the compensation signal output by the adaptive equalizer in the first detection period. , To determine the SNR of the channel of the data communication system. Referring to FIG. 13, the process of determining the SNR by the step size adjustment device according to the hard judgment error may include the following steps:
  • Step 1021b every first detection period, obtain the hard judgment error of the compensation signal output by the adaptive equalizer in the first detection period.
  • the adaptive equalizer includes a hard decision error determination module 02, which can make a hard decision on the compensation signal output by the filter 01 to obtain a hard decision
  • the difference obtained by subtracting the compensation signal from the hard judgment result can be calculated, and the difference is the hard judgment error.
  • the step adjustment device may obtain the hard judgment error output by the hard judgment error determining module 02 in the first detection period every first detection period.
  • Step 1022b Determine the power of the hard judgment error as the SNR of the channel of the data communication system.
  • the step adjustment device can calculate the square of the hard judgment error to obtain the power of the hard judgment error, and determine the power of the hard judgment error as the SNR of the channel of the data communication system.
  • the two methods of determining RSOP provided in step 101 above can be combined with the two methods of determining SNR provided in step 102 above.
  • the step adjustment device 10 may determine the RSOP according to the compensation signal, and determine the SNR according to the coefficient of the adaptive equalizer (that is, the coefficient of the filter 01).
  • the step adjustment device 10 may determine the RSOP according to the compensation signal, and determine the SNR according to the hard judgment error.
  • the step size adjusting device 10 may determine the RSOP according to the coefficient of the adaptive equalizer, and determine the SNR according to the coefficient.
  • the step size adjusting device 10 may determine the RSOP according to the coefficient of the adaptive equalizer, and determine the SNR according to the hard judgment error.
  • the embodiment of this application also simulates the situation where the step length of the adaptive equalizer changes with RSOP and SNR.
  • the simulation environment is as follows: PMD is 9.25 picoseconds per kilometer (ps/km), differential group delay (differential group delay) , DGD) is 27.76ps, polarization dependent loss (polarization dependent loss, PDL) is 2 decibels (dB), and the bandwidth of the filters in the signal transmitter and signal receiver are both 45 gigahertz (GHz).
  • the simulation result is shown in Fig. 18.
  • the abscissa in Fig. 18 is time t, the unit is beat, and the ordinate is the step length mu of the adaptive equalizer.
  • the time unit used in the simulation is the second detection period, and the second detection period is equal to one beat, that is, mu is updated every beat during the simulation.
  • FIG. 19 is a schematic diagram of a bit error ratio (BER) changing with SNR according to an embodiment of the present application
  • FIG. 19 respectively shows that when the step size mu of the adaptive equalizer is a fixed value, the BER
  • the curve that varies with the SNR and the step length mu of the adaptive equalizer is adjustable, that is, the curve of the BER varies with the SNR when the step length mu is adjusted using the method provided in the embodiment of the present application. Comparing the two curves in FIG. 19, it can be seen that when the SNR of the channel in the data communication system is constant, the BER after adjusting the step size mu by the method provided in the embodiment of the present application is smaller than the BER when mu is fixed.
  • the optimization of the BER after the step size mu is adjusted using the method provided in the embodiment of the present application is more obvious. It can be seen that after adjusting the step size of the adaptive equalizer based on the method provided in the embodiments of the present application, the signal transmission performance of the data communication system can be effectively improved.
  • step 102 and step 101 can be performed at the same time, or step 102 can be performed before step 101; or, step 103 can also be deleted according to the situation.
  • step 102 and step 101 can be performed at the same time, or step 102 can be performed before step 101; or, step 103 can also be deleted according to the situation.
  • Any person familiar with the technical field can easily think of a method of change within the technical scope disclosed in this application, which should be covered by the protection scope of this application, and therefore will not be repeated.
  • the embodiment of the present application provides a step size adjustment method of an adaptive equalizer, which can detect the RSOP and SNR of the channel, and can adjust the step size of the adaptive equalizer according to the RSOP and SNR. This can enable the adaptive equalizer to update its coefficients according to the adjusted step size.
  • the method provided in the embodiments of the present application can enable the coefficients of the adaptive equalizer to adapt to changes in the RSOP and SNR of the channel in time, and improve the coefficient convergence performance of the adaptive equalizer, thereby improving The signal transmission performance of the data communication system is improved.
  • the embodiment of the present application also provides a device for adjusting the step size of an adaptive equalizer, which can be used to adjust the step size of an adaptive equalizer such as the one shown in FIG. ⁇ (equalization micro controller, EMC).
  • the step length adjustment device can be used to implement the step length adjustment method provided in the foregoing method embodiment. As shown in Figure 3, the device may include:
  • the first determining module 11 is used to determine the RSOP of the channel in the data communication system.
  • the second determining module 12 is used to determine the SNR of the channel.
  • the step size adjustment module 15 is configured to adjust the step size of the adaptive equalizer according to the RSOP and the SNR, and the adjusted step size of the adaptive equalizer is positively correlated with the RSOP and negatively correlated with the SNR.
  • the functional realization of the first determining module 11 can refer to the related description of the above step 101
  • the functional realization of the second determining module 12 can refer to the related description of the above step 102
  • the functional realization of the step adjustment module 15 can refer to the above step. 104 related description.
  • the step adjustment module 15 may include:
  • the first multiplication sub-module 1501 is used to determine the first product of the weight coefficient and the SNR.
  • the first multiplication sub-module 1501 may be a multiplier, and the function implementation of the first multiplication sub-module 1501 may refer to the above description about the third multiplier 152.
  • the first difference determining sub-module 1502 is used to determine the first difference obtained by subtracting the first product from the absolute value of the RSOP.
  • the first difference determining sub-module 1502 may be an adder, and the function implementation of the first difference determining sub-module 1502 may refer to the above description about the second adder 153.
  • the step size calculation sub-module 1503 is configured to add the second product of the first difference and the scale factor to the initial step size of the adaptive equalizer to obtain the adjusted step size of the adaptive equalizer.
  • the step size calculation sub-module 1503 may include a multiplier and an adder, for example, may include a fourth multiplier 154 and a third adder 155 as shown in FIG. 5.
  • a multiplier and an adder for example, may include a fourth multiplier 154 and a third adder 155 as shown in FIG. 5.
  • the step calculation sub-module 1503 reference may be made to the foregoing description of the fourth multiplier 154 and the third adder 155.
  • the first determining module 11 may be used for:
  • the RSOP of the channel is determined according to the compensation signal output by the adaptive equalizer in the first detection period, where the compensation signal is the data signal transmitted by the adaptive equalizer to the data communication system The signal output after processing;
  • the RSOP of the channel is determined according to the coefficient of the adaptive equalizer; wherein, the second detection period is less than the first detection period.
  • the compensation signal includes: a first polarization state signal and a second polarization state signal; referring to FIG. 21, the first determining module 11 may include:
  • the input sub-module 1101 is used to construct an input matrix with the first polarization state signal as the first row element and the second polarization state signal as the second row element.
  • the input submodule 1101 For the functional realization of the input submodule 1101, reference may be made to the description of step 1011a in the foregoing method embodiment.
  • the second multiplication sub-module 1102 is configured to multiply the input matrix and the pseudo-inverse matrix of the input matrix to obtain a phase detection matrix.
  • the number of rows and the number of columns of the phase detection matrix are both 2.
  • the second multiplication submodule 1102 may include a multiplier, and the function implementation of the second multiplication submodule 1102 may refer to the description of step 1012a in the above method embodiment, and the pseudo-inverse matrix determination submodule 111 and the fifth multiplier 112. Related description.
  • the second difference determination submodule 1103 is used to determine the second difference between the element in the second row and the first column and the element in the first row and second column in the phase detection matrix.
  • the second difference determining sub-module 1103 may include an adder, and the functional implementation of the second difference determining sub-module 1103 may refer to the description of step 1013a in the foregoing method embodiment and the related description about the fourth adder 113.
  • the RSOP determination sub-module 1104 is used to determine the real part of the second difference as the RSOP of the channel.
  • RSOP determining submodule 1104 For the functional realization of the RSOP determining submodule 1104, reference may be made to the description of step 1014a in the foregoing method embodiment and the related description of the real part calculation submodule 114.
  • the second determining module 12 may be used for:
  • Every second detection period determine the SNR of the channel of the data communication system according to the coefficient of the adaptive equalizer
  • the SNR of the channel of the data communication system is determined according to the hard judgment error of the compensation signal output by the adaptive equalizer in the first detection period; wherein, the second detection period is less than the first detection period.
  • One detection cycle is
  • the adaptive equalizer includes: four filters, each filter has multiple taps, and the coefficients of the adaptive equalizer include: multiple taps of each filter coefficient.
  • the second determining module 12 may include:
  • the obtaining submodule 1201 is configured to obtain the tap coefficient sequence of the target tap of each filter every second detection period, and the tap coefficient sequence includes the tap coefficients obtained by sampling the tap coefficients of the target tap in multiple coefficient update periods.
  • step 1021a for the functional realization of the obtaining submodule 1201, reference may be made to the description of step 1021a in the foregoing method embodiment and the related description of the buffer 121.
  • the first calculation sub-module 1202 is configured to calculate the oscillating power of each oscillating frequency point in the frequency domain of the tap coefficient sequence of each filter.
  • the tap coefficient sequence includes multiple frequency points in the frequency domain, and the multiple frequency points There are at least two such oscillation frequency points in.
  • the first calculation sub-module 1202 may include 4 ⁇ J oscillating power calculation sub-modules 122.
  • the first addition sub-module 1203 is configured to add the oscillation power of the four tap coefficient sequences of the filter at at least two oscillation frequency points to obtain the total oscillation power.
  • step 1023a for the functional realization of the first summation submodule 1203, reference may be made to the description of step 1023a in the foregoing method embodiment and the related description about the first summation submodule 123.
  • the second calculation sub-module 1204 is used to calculate the total power of the tap coefficient sequence of each filter in the frequency domain.
  • the second calculation sub-module 1204 may include four total power calculation sub-modules 124.
  • the second addition sub-module 1205 adds the total power in the frequency domain of the four tap coefficient sequences of the filter to obtain the total power in the frequency domain.
  • step 1025a for the functional realization of the second summation submodule 1205, reference may be made to the description of step 1025a in the above method embodiment and the related description about the second summation submodule 125.
  • the SNR determining sub-module 1206 is configured to determine the SNR of the channel of the data communication system according to the power ratio of the total power of the oscillation to the total power of the frequency domain.
  • step 1026a For the functional realization of the SNR determining submodule 1206, reference may be made to the description of step 1026a to step 1028a in the foregoing method embodiment, and the related description about the SNR determining submodule 126.
  • the frequency domain includes N frequency points
  • the tap coefficient sequence of the target tap of each filter includes: N+1 tap coefficients obtained by sampling in N+1 coefficient update periods.
  • the tap coefficients are arranged in the order of sampling time from farthest to nearest, and the N is an integer greater than 1.
  • the first calculation sub-module 1202 may be used for:
  • the coefficient difference ⁇ determine the reference value of each oscillating frequency point of the tap coefficient sequence in the frequency domain, where the reference value d of the k-th frequency point of the N frequency points of the tap coefficient sequence satisfies:
  • d ( ⁇ +d')e j2 ⁇ k/N ; where d'is the reference value determined in the previous second detection period, and k is a positive integer not greater than N;
  • the power of the reference value is determined as the oscillation power of the tap coefficient sequence at the oscillation frequency point.
  • the 4 oscillating frequency points are: Frequency points, the first Frequency points, the first Frequency points, and the first Frequency points
  • the second calculation sub-module 1204 may be used for:
  • the third product is added to the total power determined in the previous second detection period to obtain the total power in the frequency domain of the tap coefficient sequence of the filter in the current second detection period.
  • the embodiment of the present application provides an adaptive equalizer step size adjustment device, which can detect the RSOP and SNR of the channel, and can adjust the step size of the adaptive equalizer according to the RSOP and SNR. This can enable the adaptive equalizer to update its coefficients according to the adjusted step size.
  • the device provided in the embodiment of the present application can make the coefficients of the adaptive equalizer adapt to changes in the RSOP and SNR of the channel in time, improve the coefficient convergence performance of the adaptive equalizer, and thereby improve The signal transmission performance of the data communication system is improved.
  • the step adjustment device in the embodiment of the present application can also be implemented by an application-specific integrated circuit (ASIC) or a programmable logic device (PLD).
  • ASIC application-specific integrated circuit
  • PLD programmable logic device
  • the above-mentioned PLD can be complicated.
  • Programmable logic device complex programmable logical device, CPLD
  • field-programmable gate array field-programmable gate array
  • FPGA field-programmable gate array
  • GAL general array logic
  • the step length adjustment method provided by the foregoing method embodiment can also be implemented by software.
  • each module in the step size adjustment device may also be a software module.
  • FIG. 23 is a schematic structural diagram of another step adjustment device provided by an embodiment of the present application.
  • the device may include: a processor 2401, a memory 2402, a network interface 2403, and a bus 2404.
  • the bus 2404 is used to connect the processor 2401, the memory 2402, and the network interface 2403.
  • the communication connection with other devices can be realized through the network interface 2403 (which can be wired or wireless).
  • a computer program 24021 is stored in the memory 2402, and the computer program 24021 is used to implement various application functions.
  • the processor 2401 may be a CPU, and the processor 2401 may also be other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field programmable gate arrays ( FPGA), GPU or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc.
  • DSP digital signal processors
  • ASIC application-specific integrated circuits
  • FPGA field programmable gate arrays
  • GPU GPU or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc.
  • the general-purpose processor may be a microprocessor or any conventional processor.
  • the memory 2402 may be a volatile memory or a non-volatile memory, or may include both volatile and non-volatile memory.
  • the non-volatile memory can be read-only memory (ROM), programmable read-only memory (programmable ROM, PROM), erasable programmable read-only memory (erasable PROM, EPROM), and electrically available Erase programmable read-only memory (electrically EPROM, EEPROM) or flash memory.
  • the volatile memory may be random access memory (RAM), which is used as an external cache.
  • RAM random access memory
  • SRAM static random access memory
  • DRAM dynamic random access memory
  • SDRAM synchronous dynamic random access memory
  • Double data rate synchronous dynamic random access memory double data date SDRAM, DDR SDRAM
  • enhanced SDRAM enhanced synchronous dynamic random access memory
  • SLDRAM synchronous connection dynamic random access memory
  • direct rambus RAM direct rambus RAM
  • bus 2404 may also include a power bus, a control bus, and a status signal bus.
  • bus 2404 may also include a power bus, a control bus, and a status signal bus.
  • various buses are marked as bus 2404 in the figure.
  • the processor 2401 is configured to execute a computer program stored in the memory 2402, and the processor 2401 executes the computer program 24021 to implement the steps in the foregoing method embodiments.
  • the embodiments of the present application also provide a computer-readable storage medium that stores instructions in the computer-readable storage medium, and when the instructions run on a computer, the computer executes the steps in the above method embodiments.
  • the embodiments of the present application also provide a computer program product containing instructions, which when the computer program product runs on a computer, cause the computer to execute the steps in the foregoing method embodiments.
  • FIG. 24 is a schematic structural diagram of a signal receiver provided by an embodiment of the present application.
  • the signal receiver may include: an adaptive equalizer 00, and an adaptive equalizer 00 connected to the adaptive equalizer 00 is implemented as described above
  • the step adjustment device 10 may be a device as shown in FIG. 3 or FIG. 23.
  • the adaptive equalizer 00 is used to compensate the received data signal, and the step adjustment device 10 is used to adjust the coefficients of the adaptive equalizer 00.
  • the signal receiver may also include modules for performing analog-to-digital conversion, chromatic dispersion compensation, and clock synchronization on the received data signal.
  • FIG. 25 is a schematic structural diagram of a data communication system provided by an embodiment of the present application.
  • the system may include: a signal receiver 100 and a signal transmitter 200.
  • the signal receiver 100 may be a receiver including the step adjustment device 10 as shown in FIG. 24.
  • the signal transmitter 200 and the signal receiver 100 may be connected by an optical fiber, that is, the solution provided in the embodiment of the present application may be applied to the field of optical digital signal processor (ODSP).
  • ODSP optical digital signal processor
  • the signal transmitter 200 is used to send data signals to the signal receiver 100 through a channel; the signal receiver 200 is used to receive data signals and process the received data signals (for example, an adaptive equalizer 00 is used to perform data signal processing on the data signal). Compensation) to restore the original signal.
  • an adaptive equalizer 00 is used to perform data signal processing on the data signal. Compensation
  • the above-mentioned embodiments may be implemented in whole or in part by software, hardware, firmware or any other combination.
  • the above-mentioned embodiments may be implemented in the form of a computer program product in whole or in part.
  • the computer program product includes one or more computer instructions.
  • the computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices.
  • the computer instructions may be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium.
  • the computer instructions may be transmitted from a website, computer, server, or data center.
  • the computer-readable storage medium may be any available medium that can be accessed by a computer or a data storage device such as a server or a data center that includes one or more sets of available media.
  • the usable medium may be a magnetic medium (for example, a floppy disk, a hard disk, a magnetic tape), an optical medium (for example, a DVD), or a semiconductor medium.
  • the semiconductor medium may be a solid state drive (SSD).

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  • Filters That Use Time-Delay Elements (AREA)

Abstract

本申请提供了一种自适应均衡器的步长调节方法、装置、信号接收机及系统，属于通信技术领域。该方案可以检测数据通信系统中信道的极化状态变化率和信噪比，并可以根据该极化状态变化率和信噪比调节自适应均衡器的步长，由此可以使得该自适应均衡器根据该调节后的步长更新其系数。相比于相关技术中的固定步长，本申请提供的方案可以使得自适应均衡器的系数能够及时适应信道的极化状态和信噪比的变化，改善了自适应均衡器的系数收敛性能，进而提高了数据通信系统的信号传输性能。

Description

自适应均衡器的步长调节方法、装置、信号接收机、系统
本申请要求于2020年2月17日提交的申请号为202010097621.1、发明名称为“自适应均衡器的步长调节方法、装置、信号接收机、系统”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及数据处理领域，特别涉及一种自适应均衡器的步长调节方法、装置、信号接收机、系统。
背景技术
数据通信系统中的信号接收机中一般设置有均衡器，该均衡器能够对接收到的信号进行处理，以补偿信道畸变，消除码间干扰(inter symbol interference，ISI)。
相关技术中，信号接收机中所采用的均衡器一般为自适应均衡器，该自适应均衡器能够基于对信道特性的测量结果，按照预设的固定步长自适应调节自身的系数，以适应信道特性的变化。
但是，由于自适应均衡器调节其系数时的步长为固定值，导致其调节系数时的灵活性较差，自适应均衡器的系数收敛性能较差。
发明内容
本申请提供了一种自适应均衡器的步长调节方法、装置、信号接收机及系统，可以解决相关技术中自适应均衡器的系数收敛性能较差的问题，技术方案如下：
一方面，提供了一种自适应均衡器的步长调节方法，该方法可以包括：确定数据通信系统的信道的极化状态变化率(rate of SOP，RSOP)，以及该信道的信噪比(signal noise ratio，SNR)；并根据该RSOP和该SNR调节自适应均衡器的步长，调节后的自适应均衡器的步长与该RSOP正相关，且与该SNR负相关。其中，自适应均衡器的步长是指自适应均衡器对其系数进行调节时所参考的步长。
由于本申请提供的方案可以基于检测到的信道的RSOP，以及信道的SNR，调节该自适应均衡器的步长，使得自适应均衡器的系数能够及时适应数据信号的极化状态和信道的SNR的变化，有效改善了自适应均衡器的系数收敛性能，进而提高了数据通信系统的信号传输性能。
可选的，该方法还可以包括：分别对该RSOP和SNR进行低通滤波处理；相应的，在调整步长时，可以根据低通滤波处理后的RSOP，以及低通滤波处理后的SNR调节自适应均衡器的步长。其中，该低通滤波处理可以实现降噪的目的。
可选的，根据该RSOP和该SNR调节该自适应均衡器的步长的过程可以包括：确定权重系数与该SNR的第一乘积，并确定该RSOP的绝对值减去该第一乘积得到的第一差值；之后，将该第一差值与比例系数的第二乘积，与该自适应均衡器的初始步长相加，即可得到调节后的自适应均衡器的步长。
其中，该权重系数、该比例系数以及该初始步长均为预先设定的固定值，且取值范围均为0到1。并且，该权重系数的量级可以为10 -1量级，该比例系数的量级可以为10 -3量 级，该初始步长的量级可以为10 -4或10 -5量级。
可选的，确定数据通信系统中信道的RSOP的方式可以包括：
每隔第一检测周期，根据该自适应均衡器在该第一检测周期输出的补偿信号，确定该信道的RSOP，其中，该补偿信号为该自适应均衡器对数据通信系统中传输的数据信号进行处理后输出的信号；或者，每隔第二检测周期，根据该自适应均衡器的系数，确定该信道的RSOP；其中，该第二检测周期小于该第一检测周期。也即是，本申请提供的方案中，可以根据自适应均衡器输出的补偿信号或者自适应均衡器的系数，确定该信道的RSOP。
其中，该第一检测周期可以等于数据通信系数传输的一个数据帧的时长，该第二检测周期可以等于该自适应均衡器更新其系数的周期。由于自适应均衡器更新其系数的周期相对较短，因此基于该系数更新RSOP的第二检测周期也可以相对较短。
可选的，该补偿信号可以包括：第一极化状态信号和第二极化状态信号；根据该补偿信号确定信道的RSOP的过程可以包括：
以该第一极化状态信号为第一行元素，并以该第二极化状态信号为第二行元素构建输入矩阵；将该输入矩阵与该输入矩阵的伪逆矩阵相乘，得到鉴相矩阵，该鉴相矩阵的行数和列数均为2；确定该鉴相矩阵中第二行第一列的元素与第一行第二列的元素的第二差值；根据该第二差值确定该信道的RSOP。例如，可以将该第二差值的实部确定为RSOP。
由于该鉴相矩阵中第二行第一列的元素与第一行第二列的元素的第二差值可以反映自适应均衡器对信道进行补偿后信道残留的RSOP，当该信道的RSOP没有残留时，第二差值的实部为0；当该信道的RSOP有残留时，第二差值的实部不为0。因此，在本申请方案中，可以将该第二差值的实部确定为用于调节步长的RSOP。
可选的，该确定信道的SNR的方式可以包括：
每隔第二检测周期，根据该自适应均衡器的系数，确定该信道的SNR；或者，每隔第一检测周期，根据该自适应均衡器在该第一检测周期输出的补偿信号的硬判误差，确定该信道的SNR；其中，该第二检测周期小于该第一检测周期。也即是，本申请提供的方案中，可以根据自适应均衡器的系数或者自适应均衡器输出的补偿信号的硬判误差，确定信道的SNR。
可选的，该自适应均衡器可以包括：四个滤波器，每个滤波器具有多个抽头，相应的，该自适应均衡器的系数即包括：每个滤波器的多个抽头的抽头系数；该每隔第二检测周期，根据该自适应均衡器的系数确定该SNR的过程可以包括：
每隔第二检测周期，分别获取每个滤波器的目标抽头的抽头系数序列，该抽头系数序列包括对该目标抽头的抽头系数在多个系数更新周期进行采样得到的多个抽头系数；分别计算每个滤波器的抽头系数序列在频域中每个震荡频点的震荡功率，该抽头系数序列在频域包括多个频点，该多个频点中存在至少两个震荡频点；将四个该滤波器的抽头系数序列在该至少两个震荡频点的震荡功率相加，得到震荡总功率；分别计算每个滤波器的抽头系数序列在频域的总功率；将四个该滤波器的抽头系数序列在频域的总功率相加，得到频域总功率；根据该震荡总功率与该频域总功率的功率比值确定信道的SNR为0，其中，该系数更新周期为该自适应均衡器更新系数的周期，且该系数更新周期小于或等于该第二检测周期。
由于当信道中的噪声较大时，自适应均衡器的系数在频域中各震荡频点的震荡功率就越大，因此，在本申请实施例中，可以根据震荡总功率与频域总功率的比值确定出信 道的SNR。
可选的，该第二检测周期可以等于系数更新周期，该频域包括N个频点，每个滤波器的目标抽头的抽头系数序列包括：在N+1个系数更新周期进行采样得到的N+1个抽头系数，该N+1个抽头系数按照采样时间由远到近的顺序排列，该N为大于1的整数；计算每个滤波器的抽头系数序列在频域中每个震荡频点的震荡功率的过程可以包括：
对于每个滤波器的抽头系数序列，将第N+1个抽头系数与第1个抽头系数相减，得到每个抽头系数序列的系数差值Δω；根据该系数差值Δω，确定该抽头系数序列在频域中每个震荡频点的参考值，其中，该抽头系数序列在该N个频点中第k个频点的参考值d满足：d＝(Δω+d')e j2πk/N；其中，d'为前一个第二检测周期确定出的参考值，k为不大于N的正整数；将该参考值的功率确定为该抽头系数序列在该震荡频点的震荡功率。
本申请提供的方案中，可以基于系数差值和震荡系数，通过乘法运算确定出抽头系数序列在频域中各个震荡频点的震荡功率，而无需对该抽头系数序列进行傅里叶变换，从而有效降低了数据处理的功耗，提高了数据处理的效率。
可选的，该N个频点中存在4个震荡频点，该4个震荡频点可以分别为：第
Figure PCTCN2020103606-appb-000001
个频点，第
Figure PCTCN2020103606-appb-000002
个频点，第
Figure PCTCN2020103606-appb-000003
个频点，以及第
Figure PCTCN2020103606-appb-000004
个频点；其中，t为该自适应均衡器的环路延时，
Figure PCTCN2020103606-appb-000005
表示向下取整，
Figure PCTCN2020103606-appb-000006
表示向上取整。
可选的，该频域包括N个频点，每个滤波器的抽头系数序列包括：在N+1个系数更新周期进行采样得到的N+1个抽头系数，该N+1个抽头系数按照采样时间由远到近的顺序排列，该N为大于1的整数；计算每个滤波器的抽头系数序列在频域的总功率的过程可以包括：对于每个滤波器的抽头系数序列，将第N+1个抽头系数的功率与第1个抽头系数的功率相减，得到每个抽头系数序列的功率差值；确定该功率差值与该N的第三乘积；将该第三乘积与前一个第二检测周期确定出的总功率相加，得到当前第二检测周期内该滤波器的抽头系数序列在频域的总功率。
本申请提供的方案中，可以基于抽头系数序列的功率差值，通过乘法运算和加法运算确定出抽头系数序列在频域的总功率，而无需对该抽头系数序列进行傅里叶变换，从而有效降低了数据处理的功耗，提高了数据处理的效率。
另一方面，提供了一种自适应均衡器的步长调节装置，该装置可以包括至少一个模块，且该至少一个模块可以用于实现上述方面所提供的自适应均衡器的步长调节方法。
又一方面，提供了一种自适应均衡器的步长调节装置，该装置可以包括：存储器，处理器及存储在该存储器上并可在该处理器上运行的计算机程序，该处理器执行该计算机程序时实现如上述方面所提供的自适应均衡器的步长调节方法。
再一方面，提供了一种计算机可读存储介质，该计算机可读存储介质中存储有指令，当该指令在计算机上运行时，使得计算机执行如上述方面所提供的自适应均衡器的步长调节方法。
再一方面，提供了一种包含指令的计算机程序产品，当该计算机程序产品在计算机上运行时，使得计算机执行上述方面所提供的自适应均衡器的步长调节方法。
再一方面，提供了一种信号接收机，该信号接收机包括：自适应均衡器，以及如上述方面所提供的步长调节装置；其中，该自适应均衡器用于对接收到的数据信号进行补偿，该步长调节装置用于调节该自适应均衡器的系数。
再一方面，提供了一种数据通信系统，该系统包括：信号发射机以及如上述方面所提供的信号接收机；该信号发射机用于通过信道向该信号接收机发送数据信号；该信号 接收机用于接收数据信号，并对接收到的数据信号进行处理，以恢复出原始信号。
综上所述，本申请实施例提供了一种自适应均衡器的步长调节方法、装置、信号接收机及系统，该方法可以检测信道的RSOP和SNR，并可以根据该RSOP和SNR调节自适应均衡器的步长，由此可以使得该自适应均衡器根据该调节后的步长更新其系数。相比于相关技术中的固定步长，本申请实施例提供的方法可以使得自适应均衡器的系数能够及时适应信道的RSOP和SNR的变化，改善了自适应均衡器的系数收敛性能，进而提高了数据通信系统的信号传输性能。
附图说明
图1是本申请实施例提供的一种自适应均衡器的结构示意图；
图2是本申请实施例提供的一种自适应均衡器的步长调节方法的流程图；
图3是本申请实施例提供的一种步长调节装置的结构示意图；
图4是本申请实施例提供的一种第一低通滤波器的结构示意图；
图5是本申请实施例提供的一种步长调节模块的结构示意图；
图6是本申请实施例提供的一种数据通信系统中传输的数据信号的数据结构示意图；
图7是本申请实施例提供的一种根据补偿信号确定RSOP的方法流程图；
图8是本申请实施例提供的一种第一确定模块的结构示意图；
图9是本申请实施例提供的一种自适应均衡器中的滤波器的结构示意图；
图10是本申请实施例提供的一种根据自适应均衡器的系数确定RSOP的方法流程图；
图11是本申请实施例提供的一种根据自适应均衡器的系数确定SNR的方法流程图；
图12是本申请实施例提供的一种第二确定模块的结构示意图；
图13是本申请实施例提供的一种根据硬判误差确定SNR的方法流程图；
图14是本申请实施例提供的一种自适应均衡器和步长调节装置的结构示意图；
图15是本申请实施例提供的另一种自适应均衡器和步长调节装置的结构示意图；
图16是本申请实施例提供的又一种自适应均衡器和步长调节装置的结构示意图；
图17是本申请实施例提供的在一种自适应均衡器和步长调节装置的结构示意图；
图18是本申请实施例提供的一种自适应均衡器的步长随RSOP和SNR变化的示意图；
图19是本申请实施例提供的一种BER随SNR变化的示意图；
图20是本申请实施例提供的一种步长调节模块的结构示意图；
图21是本申请实施例提供的一种第一确定模块的结构示意图；
图22是本申请实施例提供的一种第二确定模块的结构示意图；
图23是本申请实施例提供的另一种步长调节装置的结构示意图；
图24是本申请实施例提供的一种信号接收机的结构示意图；
图25是本申请实施例提供的一种数据通信系统的结构示意图。
具体实施方式
下面结合附图详细介绍本申请实施例提供的自适应均衡器的步长调节方法、装置、信号接收机、系统。
图1是本申请实施例提供的一种自适应均衡器的结构示意图，如图1所示，该自适应均衡器可以包括：滤波器01、硬判误差确定模块02、共轭计算模块03、乘法器04以及系数更新模块05。其中，该滤波器01可以为多入多出(multiple in multiple out，MIMO)有 限长脉冲响应(finite impulse response)滤波器，该滤波器01可以用于对接收到的数据信号Din进行处理，并输出处理后的补偿信号S。硬判误差确定模块02，用于通过判决器(slicer)对该补偿信号S进行硬判决得到硬判结果slicer(S)，并将该硬判结果slicer(S)与该补偿信号S相减，得到该补偿信号的硬判误差E：E＝slicer(S)-S。该共轭计算模块03用于计算该数据信号Din的共轭conj(Din)。该乘法器04用于计算该数据信号的共轭conj(Din)与该硬判误差E的乘积。该系数更新模块05可以根据该乘法器04输出的乘积，采用最小均方(LMS，least mean square)算法更新滤波器01的系数，该滤波器01的系数即为自适应均衡器的系数。其中，该LMS算法可以为归一化最小均方(NLMS，normalized least mean square)算法或者二阶最小均方(second order least means square，SLMS)算法等。
示例的，该系数更新模块05可以按照预设的系数更新周期，对该滤波器01的系数进行周期性地更新。其中，系数更新模块05在第n个系数更新周期确定出的系数ω(n)可以满足：ω(n)＝ω(n-1)+mu×E×conj(din)。其中，ω(n-1)为该滤波器01在第n-1个系数更新周期的系数，mu为系数更新的步长，即自适应均衡器的步长。
在一些特殊的信道环境下，例如闪电多发地区，数据通信系统中的架空光缆或埋地光缆遭到雷电电击时，会使得信道的极化状态(state of polarization，SOP)发生变化，并使得信道中传输的数据信号的SOP和偏振模色散(polarization mode dispersion，PMD)发生快速变化，导致信号接收机失锁。例如，雷电电击会导致信道的SOP在十几毫秒内达到每秒(s)几十万，甚至是几百万弧度(rad)的变化，即导致信道的RSOP会达到几十万至几百万rad/s。
因此，信道环境较为特殊的数据通信系统，对自适应均衡器的系数收敛性能提出了更高的要求。相关技术中，基于固定步长mu更新系数的自适应均衡器将无法适应信道的特性(比如SOP)的快速变化。例如，若该固定步长过小，则会导致自适应均衡器的系数收敛速度较慢，无法及时适应信道特性的变化。若该固定步长过大，则会导致自适应均衡器的系数的收敛误差较大，无法有效补偿信道畸变。因此基于固定步长mu更新系数的自适应均衡器的系数收敛性能较差，会影响数据通信系统的信号传输性能。
相关技术中还提供了一种采用卡尔曼滤波器的自适应均衡器，该自适应均衡器可以基于构建的信道模型更新卡尔曼滤波器的系数，使得更新后的系数可以适应信道的SOP的变化。但是，该自适应均衡器在更新系数的过程中，需要建立精确的信道模型，其应用灵活性较差。
本申请提供了一种自适应均衡器的步长调节方法，该方法可以用于调节自适应均衡器对其系数进行更新时所参考的步长，以确保自适应均衡器的系数能够及时适应信道的RSOP和SNR的变化，提高自适应均衡器的系数收敛性能。该步长调节方法可以应用于步长调节装置中，自适应均衡器以及该步长调节装置均可以设置于该数据通信系统的信号接收机中。参考图2，该方法可以包括：
步骤101、确定数据通信系统中信道的RSOP。
在本申请实施例中，步长调节装置可以每隔第一检测周期，根据该自适应均衡器在该第一检测周期输出的补偿信号，确定该信道的RSOP。其中，该补偿信号为该自适应均衡器对数据通信系统中传输的数据信号进行处理后输出的信号。
或者，该步长调节装置也可以每隔第二检测周期，根据该自适应均衡器的系数，确定该信道的RSOP。
其中，该第一检测周期的时长可以等于该数据通信系统中传输的数据帧的长度。该第二检测周期可以大于或等于该自适应均衡器更新其系数的系数更新周期，且该第二检测周期小于该第一检测周期。例如，该第一检测周期可以等于10至20个第二检测周期。
也即是，该步长调节装置可以基于自适应均衡器输出的补偿信号，或者该自适应均衡器的系数，对该信道的RSOP进行周期性的检测和更新。
步骤102、确定该信道的SNR。
在本申请实施例中，该步长调节装置可以每隔第二检测周期，根据该自适应均衡器的系数，确定该数据通信系统的信道的SNR。
或者，该步长调节装置也可以每隔第一检测周期，根据该自适应均衡器在该第一检测周期输出的补偿信号的硬判误差，确定该数据通信系统的信道的SNR。
也即是，该步长调节装置可以基于自适应均衡器的系数，或者该自适应均衡器输出的补偿信号的硬判误差，对该数据通信系统的信道的SNR进行周期性的检测和更新。
图3是本申请实施例提供的一种步长调节装置的结构示意图，如图3所述，该装置可以包括：第一确定模块11和第二确定模块12，该第一确定模块11可以用于检测信道的RSOP，该第二确定模块12可以用于检测信道的SNR。
步骤103、分别对该RSOP和该SNR进行低通滤波处理。
该步长调节装置可以基于预设的低通滤波算法，分别对RSOP和该SNR进行低通滤波处理，以达到降噪的目的。
示例的，如图3所示，该步长调节装置还可以包括第一低通滤波器(low pass filter，LPF)13和第二LPF 14。该第一LPF 13可以用于对RSOP进行低通滤波处理，该第二LPF 14可以用于对SNR进行低通滤波处理。其中，第一LPF 13和第二LPF 14可以均为阿尔法(alpha)滤波器。
图4是本申请实施例提供的一种第一LPF的结构示意图，以alpha滤波器为例，如图4所示，该第一LPF 13可以包括：第一乘法器131、第一寄存器132、第二乘法器133以及第一加法器134。其中，该第一乘法器131可以用于计算第一确定模块11输出的RSOP与系数α的乘积，0≤α≤1。该第一寄存器132用于将该加法器134输出的结果(即L_RSOP)延迟一个检测周期后提供至第二乘法器133。该第二乘法器133用于计算该延迟后的L_RSOP与系数(1-α)的乘积。该第一加法器134将第一乘法器131输出的乘积与第二乘法器133输出的乘积相加后，即可得到低通滤波处理后的RSOP，即L_RSOP。该第二LPF 14的结构和滤波原理可以参考第一LPF 13，此处不再赘述。
基于上文描述可知，该alpha滤波器可以对当前检测周期确定出的RSOP，以及上一个检测周期确定出的L_RSOP进行加权(权重分别为α和1-α)求和，从而确定出当前检测周期的L_RSOP。
步骤104、根据低通滤波处理后的RSOP，以及低通滤波处理后的SNR调节该自适应均衡器的步长。
如图3所示，该步长调节装置还可以包括步长调节模块15，该步长调节模块15可以根据低通滤波处理后的RSOP(即L_RSOP)，以及低通滤波处理后的SNR(即L_SNR)调节该自适应均衡器的步长。该调节后的自适应均衡器的步长与该RSOP正相关，且与该SNR负相关，即RSOP越大，该调节后的步长越大；SNR越大，该调节后的步长越小。
在本申请实施例中，步长调节模块15在调节步长的过程中，可以先确定权重系数w与该SNR的第一乘积；然后确定该RSOP的绝对值减去该第一乘积得到的第一差值；之后将 该第一差值与比例系数c的第二乘积，与该自适应均衡器的初始步长mu0相加，即可得到调节后的该自适应均衡器的步长mu。也即是，该调节后的步长mu可以满足：
mu＝mu0+(|RSOP|-w×SNR)×c。
可选的，若该RSOP和SNR还经过了低通滤波处理，则该调节后的步长mu可以满足：
mu＝mu0+(|L_RSOP|-w×L_SNR)×c。
图5是本申请实施例提供的一种步长调节模块15的结构示意图，如图5所示，该步长调节模块15可以包括：绝对值(absolute value，ABS)计算模块151、第三乘法器152、第二加法器153、第四乘法器154以及第三加法器155。其中，该ABS计算模块151可以用于计算第一LPF 13输出的L_RSOP的绝对值。第三乘法器152用于计算该第二LPF 14输出的L_SNR与负的权重系数w(即-w)的乘积。该第二加法器152用于将L_RSOP的绝对值|L_RSOP|与第三乘法器152输出的乘积相加，由此即可得到|L_RSOP|减去该第一乘积得到的第一差值：|L_RSOP|-w×L_SNR。该第四乘法器154用于计算该第一差值与比例系数c的第二乘积。该第三加法器155用于将该第二乘积与该自适应均衡器的初始步长mu0相加，由此即可得到调节后的该自适应均衡器的步长mu。
可选地，在本申请实施例中，该初始步长mu0、权重系数w以及比例系数c可以均为该步长调节模块15中预先存储的固定值，并且各个参数的取值可以是开发人员根据应用场景需求和经验设定的。其中，该初始步长mu0可以为大于0且小于1的数值，且可以为10 -4或10 -5量级的数值。该权重系数w可以为大于0且小于1的数值，且可以为10 -1量级的数值。该比例系数c可以为大于0且小于1的数值，且可以为10 -3量级的数值。
综上所述，本申请实施例提供了一种自适应均衡器的步长调节方法，该方法可以检测信道的RSOP和SNR，并可以根据该RSOP和SNR调节自适应均衡器的步长，由此可以使得该自适应均衡器根据该调节后的步长更新其系数。相比于相关技术中的固定步长，本申请实施例提供的方法可以使得自适应均衡器的系数能够及时适应信道的RSOP和SNR的变化，改善了自适应均衡器的系数收敛性能，进而提高了数据通信系统的信号传输性能。
在上述步骤101中，作为一种可选的实现方式，该步长调节装置可以每隔第一检测周期，根据该自适应均衡器在该第一检测周期输出的补偿信号，确定该信道的RSOP。
图6是本申请实施例提供的一种数据通信系统中传输的数据信号的数据结构示意图，如图6所示，该数据通信系统中的信号发射机能够以数据帧为单位向信号接收机发送数据信号，其中每个数据帧的数据信号可以包括训练数据(也称为训练序列)和用户数据，该训练数据可以为信号发射机随机生成的，用于供自适应均衡器对其系数进行初步更新的数据。在本申请实施例中，该步长调节装置更新该RSOP的第一检测周期可以等于一个数据帧的长度，并且，该步长调节装置更新该RSOP所参考的补偿信号可以为自适应均衡器对一个数据帧中的训练数据进行处理后输出的信号。也即是，在自适应均衡器每完成对一个数据帧中的训练数据的补偿后，该步长调节装置均可基于该自适应均衡器输出的该训练数据的补偿信号，确定在该一个数据帧的时长内该信道的RSOP。
可选的，该自适应均衡器输出的补偿信号可以包括：第一极化状态信号和第二极化状态信号。参考图7，上述步骤101中，该步长调节装置根据补偿信号确定RSOP的过程可以包括如下步骤：
步骤1011a、以第一极化状态信号为第一行元素，并以第二极化状态信号为第二行元 素构建输入矩阵。
步长调节装置可以获取自适应均衡器在一个第一检测周期内输出的补偿信号，该补偿信号包括第一极化状态信号x和第二极化状态信号y，并且该两个极化状态信号x和y的长度相等，即length(x)＝length(y)。步长调节装置可以将该两个极化状态信号x和y按列排布，从而构建输入矩阵
Figure PCTCN2020103606-appb-000007
该输入矩阵I的行数为2，列数等于length(x)。
步骤1012a、将该输入矩阵与该输入矩阵的伪逆矩阵相乘，得到鉴相矩阵。
在本申请实施例中，步长调节装置可以先计算该输入矩阵I的伪逆矩阵pinv(I)，该伪逆矩阵pinv(I)的行数为length(x)，列数为2。之后，步长调节装置可以将该输入矩阵I与该伪逆矩阵pinv(I)相乘，得到鉴相矩阵A。该鉴相矩阵A的行数和列数均为2，并且该鉴相矩阵A可以表示为：
Figure PCTCN2020103606-appb-000008
其中，u和v分别表示该鉴相矩阵A中第一行第二列的元素和第一行第二列的元素。
步骤1013a、确定该鉴相矩阵中第二行第一列的元素与第一行第二列的元素的第二差值。
该第二差值ΔA可以表示为：ΔA＝A(2,1)-A(1,2)＝-conj(v)-v。
步骤1014a、根据该第二差值确定该信道的RSOP。
在本申请实施例中，步长调节装置确定出的在一个数据帧的时长内的信道的RSOP可以为real(ΔA)，其中real()表示取实部。
由于该第二差值ΔA＝-conj(v)-v可以体现自适应均衡器对信道的RSOP进行补偿后残留的RSOP。当该信道的RSOP没有残留时，real(ΔA)为0；当该信道的RSOP有残留时，real(ΔA)不为0。因此，在本申请实施例中，可以采用该real(ΔA)反映信道的RSOP的大小，即将该real(ΔA)确定为用于调节步长的RSOP。
图8是本申请实施例提供的一种第一确定模块11的结构示意图，如图8所示，该第一确定模块11可以包括：伪逆矩阵确定子模块111、第五乘法器112、第四加法器113以及实部计算子模块114。其中，该伪逆矩阵确定子模块111可以用于确定输入矩阵I的伪逆矩阵pinv(I)。该第五乘法器112可以用于计算该输入矩阵I与该伪逆矩阵pinv(I)的乘积，得到鉴相矩阵A。该第四加法器113可以用于计算该鉴相矩阵A中第二行第一列的元素A(2,1)与第一行第二列的元素A(1,2)的第二差值ΔA。该实部计算子模块114可以用于计算该第二差值ΔA的实部，即计算real(ΔA)。
图9是本申请实施例提供的一种自适应均衡器中的滤波器的结构示意图，如图9所示，该自适应均衡器可以包括：四个蝶形连接的滤波器011至014，每个滤波器具有多个抽头。相应的，该自适应均衡器的系数可以包括：该四个滤波器中每个滤波器的多个抽头的抽头系数。其中，每个滤波器可以均为FIR滤波器。
该四个滤波器中，第一滤波器011可以用于从接收到的第一极化状态(即X极化状态)的信号中提取出信号发射机发送的第一极化状态的信号，该第一滤波器011的系数可以表示为ω xx。第二滤波器012可以用于从接收到的第一极化状态的信号中提取出信号发射机发送的第二极化状态(即Y极化状态)的信号，该第二滤波器012的系数可以表示为ω xy。第三滤波器013可以用于从接收到的第二极化状态的信号中提取出信号发射机发送的第一极化状态的信号，该第三滤波器013的系数可以表示为ω yx。第四滤波器014可以用于从接收到的第二极化状态的信号中提取出信号发射机发送的第二极化状态的信号，该第四 滤波器014的系数可以表示为ω yy。在本申请实施例中，该四个滤波器的抽头个数可以相等，例如抽头个数可以均为M(M为大于1的整数)，则该四个滤波器的系数ω xx、ω xy、ω yx和ω yy可以均为长度为M的数组，数组中的每个元素即为一个抽头的抽头系数。
在上述步骤101中，作为另一种可选的实现方式，该步长调节装置还可以每隔第二检测周期，根据该自适应均衡器的系数，确定该信道的RSOP。参考图10，上述步骤101中，该步长调节装置根据自适应均衡器的系数确定该RSOP的过程可以包括如下步骤：
步骤1011b、每隔第二检测周期，分别获取每个滤波器的中心抽头在相邻两个系数更新周期的抽头系数。
该系数更新周期为该自适应均衡器更新系数的周期，每个系数更新周期也可以称为一拍。在本申请实施例中，该步长调节装置可以每隔第二检测周期，获取每个滤波器的中心抽头在最近的两个系数更新周期的抽头系数，得到每个滤波器的中心抽头的两个抽头系数。其中，该第二检测周期可以大于或等于该系数更新周期。
可选地，若滤波器的抽头个数M为偶数，则该中心抽头可以是指第M/2个抽头；若滤波器的抽头个数M为奇数，则该中心抽头可以是指第(M+1)/2个抽头。
示例的，假设该第二检测周期等于该系数更新周期，即第二检测周期等于一拍，且每个滤波器的中心抽头为第m个抽头(m为不大于M的正整数)。则步长调节装置可以每隔一拍，获取每个滤波器的第m个抽头在最近两拍的抽头系数。若最近两拍为第n拍和第n-1拍，则该步长调节装置获取到的第一滤波器011的第m个抽头在最近两拍的抽头系数可以为：ω xx(m,n)和ω xx(m,n-1)。
步骤1012b、分别计算每个滤波器的中心抽头的抽头系数在相邻两个系数更新周期的第三差值。
在本申请实施例中，该第三差值可以为最近一个系数更新周期的抽头系数减去前一个系数更新周期的抽头系数得到的数值。例如，该第一滤波器011的第m个抽头在相邻两个系数更新周期的第三差值即为：ω xx(m,n)-ω xx(m,n-1)。
步骤1013b、根据四个滤波器的第三差值的均值，确定该信道的RSOP。
该步长调节装置计算得到四个滤波器的第三差值后，可以计算该四个滤波器的第三差值的均值，进而可以将该均值的绝对值确定为该信道的RSOP。
在上述步骤101中，作为又一种可选的实现方式，该步长调节装置根据该自适应均衡器的系数确定该信道的RSOP的过程还可以包括：
首先，每隔第二检测周期，分别获取每个滤波器的中心抽头在最近的N个系数更新周期的抽头系数，得到每个滤波器的抽头系数序列，该抽头系数序列包括N个抽头系数，N为2的z次幂，且z为大于1的整数。然后，步长调节装置可以对每个滤波器的抽头系数序列进行N点的快速傅里叶变换(fast Fourier transform，FFT)，从而将每个滤波器的抽头系数序列转换至频域。之后，步长调节装置可以获取每个滤波器的抽头系数序列在频域中某个频点(例如第一个频点或第二个频点)的频点值，并计算获取到的四个滤波器的频点值的均值，该均值即为信道的RSOP。
在上述步骤102中，作为一种可选的实现方式，该步长调节装置可以每隔第二检测周期，根据该自适应均衡器的系数，确定该数据通信系统的信道的SNR。参考图11，该步长调节装置根据自适应均衡器的系数确定SNR的过程可以包括如下步骤：
步骤1021a、每隔第二检测周期，分别获取每个滤波器的目标抽头的抽头系数序列。
在本申请实施例中，该每个滤波器的目标抽头的抽头系数序列可以包括：在多个系数更新周期对该滤波器的目标抽头的抽头系数进行采样得到的多个抽头系数，其中每个抽头系数是在一个系数更新周期进行采样得到的。例如，该抽头系数序列可以包括在N个系数更新周期采样得到的N个抽头系数。其中，N为大于1的整数，且N可以为2的z次幂，且z为大于1的整数。每个滤波器的目标抽头可以为该滤波器的多个抽头中的任一抽头，且各个滤波器的目标抽头的在该多个抽头中的序号相等。例如每个滤波器的目标抽头可以均为第一个抽头，或者均为中心抽头。
步骤1022a、分别计算每个滤波器的抽头系数序列在频域中每个震荡频点的震荡功率。
在本申请实施例中，步长调节装置中的第二确定模块12可以对每个滤波器的抽头系数序列进行N点FFT，从而将每个滤波器的抽头系数序列转换至频域。其中，该每个滤波器的抽头系数序列在频域包括N个频点，该N个频点中存在至少两个震荡频点。步长调节装置可以分别计算每个滤波器的抽头系数序列在该至少两个震荡频点中每个震荡频点的震荡功率。
在本申请实施例中，每个抽头系数序列在频域的N个频点中可以存在4个震荡频点(即J＝4)，且该4个震荡频点可以分别为：第
Figure PCTCN2020103606-appb-000009
个频点，第
Figure PCTCN2020103606-appb-000010
个频点，第
Figure PCTCN2020103606-appb-000011
个频点，以及第
Figure PCTCN2020103606-appb-000012
个频点。其中，t为该自适应均衡器的环路延时，
Figure PCTCN2020103606-appb-000013
表示向下取整，
Figure PCTCN2020103606-appb-000014
表示向上取整。该环路延时是指该自适应均衡器中各个模块的延时之和。
例如，假设N＝512，t＝30拍，则该每个抽头系数序列在频域的4个震荡频点可以分别为：第4个频点、第5个频点、第510个频点以及第509个频点。
可选的，该第二检测周期可以等于该系数更新周期。为了提高震荡功率的计算效率，该步长调整装置在每个第二检测周期获取到的抽头系数序列可以包括N+1个抽头系数。
图12是本申请实施例提供的一种用于确定SNR的第二确定模块的结构示意图，如图12所示，该第二确定模块12可以包括：四个缓存器(buffer)121，图12中仅示意性示出了一个缓存器121。其中，该每个缓存器121可以用于对一个滤波器的目标抽头的抽头系数进行时域采样，以获取该滤波器的目标抽头的抽头系数序列。并且，参考图12可以看出，该每个缓存器121的长度可以为N+1，即该缓存器121能够存储N+1个抽头系数。可选的，该缓存器121可以为先进先出(first input first output，FIFO)缓存器，且该缓存器121可以按照采样时间由远到近的顺序依次存储抽头系数序列包括的N+1个抽头系数。
示例的，假设每个滤波器的目标抽头为第一个抽头，则该四个缓存器121中的第一个缓存器121可以每隔系数更新周期，获取第一滤波器011的第一个抽头在当前系数更新周期的抽头系数并进行存储。其中，若该缓存器121中已存储了N+1个抽头系数，则缓存器121可以将已存储的N+1个抽头系数中最早存储的一个抽头系数删除，再将该最新获取到的抽头系数存入。该第一个缓存器121中存储的第一滤波器011的第一个抽头的抽头系数序列可以包括ω xx(1,1)至ω xx(1,N+1)共N+1个抽头系数。该四个缓存器121中其他三个缓存器121的工作原理可以参考该第一个缓存器121，此处不再赘述。
上述步骤1022a中确定抽头系数序列在频域中每个震荡频点的震荡功率的过程可以包括如下步骤：
步骤a11、对于每个滤波器的抽头系数序列，将第N+1个抽头系数与第1个抽头系数相减，得到每个抽头系数序列的系数差值Δω。
其中，该系数差值Δω是指该第N+1个抽头系数减去该第1个抽头系数得到的数值。由 于每个滤波器的抽头系数序列中的N+1个抽头系数按照采样时间由远到近的顺序排列，因此该第N+1个抽头系数也即是最近采样得到的系数，该第1个抽头系数也即是N+1个抽头系数中最早采样得到的系数。
可选的，参考图12，该第二确定模块12还可以包括：4×J个震荡功率计算子模块122，图12中仅示意性示出了一个震荡功率计算子模块122，其中J为N个频点中包括的震荡频点的个数，J为大于1且小于N的整数。其中，每个震荡功率计算子模块122可以用于计算一个滤波器的抽头系数序列在频域中的一个震荡频点的震荡功率。如图12所示，每个震荡功率计算子模块122可以包括：系数差值计算单元1221，该系数差值计算单元1221可以用于计算缓存器中存储的第N+1个抽头系数与第1个抽头系数的系数差值Δω。
示例的，假设每个滤波器的目标抽头为第一个抽头，则对于第一滤波器011的抽头系数序列，第一个震荡功率计算子模块122中的系数差值计算单元1221计算得到的系数差值Δω满足：Δω＝ω xx(1,N+1)-ω xx(1,1)。
步骤a12、根据该系数差值Δω，确定该抽头系数序列在频域中每个震荡频点的参考值。其中，该抽头系数序列在该N个频点中第k个频点的参考值d可以满足：
d＝(Δω+d')e j2πk/N；
其中，d'为前一个第二检测周期确定出的参考值，k为不大于N的正整数。
可选的，参考图12，该每个震荡功率计算子模块122还可以包括：第二寄存器1222、第五加法器1223和第六乘法器1224。其中，该第二寄存器1222用于将该第六乘法器1224输出的参考值延迟一个第二检测周期后输出至该第五加法器1223，即该第二寄存器1222可以在每个第二检测周期，向该第五加法器1223提供前一个第二检测周期确定出的参考值d'。该第五加法器1223用于计算该系数差值Δω与该前一个第二检测周期确定出的参考值d'之和。该第六乘法器1224用于将该系数差值Δω与该参考值d'之和Δω+d'，与一个震荡频点的震荡系数相乘，从而得到在当前第二检测周期内，该抽头系数序列在频域中的一个震荡频点的参考值d。
该J个震荡频点中第j(j为不大于J的正整数)个震荡频点的震荡系数可以表示为：
Figure PCTCN2020103606-appb-000015
其中k j为该第j个震荡频点在该N个频点中的序号。例如，假设J＝4，N＝512，且该4个震荡频点分别为：第4个频点、第5个频点、第510个频点以及第509个频点，即该4个震荡频点在512个频点中的序号分别为：k 1＝4、k 2＝5、k 3＝510和k 4＝509，则该4个震荡频点的震荡系数可以分别为：e j2π×4/512、e j2π×5/512、e j2π×510/512以及e j2π×509/512。
若每个滤波器的目标抽头均为第一个抽头，则该第二确定模块12包括的4×J个震荡功率计算子模块122中，第一个震荡功率计算子模块122可以用于计算第一滤波器011的第一个抽头的抽头系数序列ω xx(1)在频域中第一个震荡频点的震荡功率。如图12所示，该第一个震荡功率计算子模块122中的第六乘法器1224可以将系数差值Δω与该参考值d'之和Δω+d'，与第一个震荡频点的震荡系数
Figure PCTCN2020103606-appb-000016
相乘，得到该第一个震荡频点的参考值。
步骤a13、将该参考值的功率确定为该抽头系数序列在该震荡频点的震荡功率。
在本申请实施例中，每个震荡功率计算子模块122可以计算参考值的功率，并将该参考值的功率确定为抽头系数序列在该震荡频点的震荡功率。
可选的，如图12所示，该每个震荡功率计算子模块122还可以包括：功率计算单元1225，该功率计算单元1225可以计算第六乘法器1224输出的参考值的功率，从而得到一个滤波器的目标抽头的抽头系数序列在一个震荡频点的震荡功率。
基于上述步骤a11至a13所示的方法计算震荡功率的原理如下：
以每个滤波器的目标抽头为第一个抽头为例，在第n个第二检测周期获取到的第一滤波器011的抽头系数序列中的N+1个抽头系数可以表示为：
ω xx,n(1,1:N+1)＝[ω xx,n-1(1,2:N+1)；ω xx,n(1,N+1)]；
其中，ω xx,n-1(1,2:N+1)表示在第n-1个第二检测周期(即前一个第二检测周期)获取到的N+1个抽头系数中第2至N+1个抽头系数；ω xx,n(1,N+1)表示在该第n个第二检测周期获取到的第N+1个抽头系数，即最近采样得到的系数。
对该第n个第二检测周期获取到的抽头系数序列中，第1至N个抽头系数进行N点FFT，得到的FFT结果可以表示为：
ω xx,n_fft(1,1:N)＝fft(ω xx,n(1,1:N))。
在第n+1个第二检测周期获取到的第一滤波器011的抽头系数序列中的N+1个抽头系数可以表示为：
ω xx,n+1(1,1:N+1)＝[ω xx,n(1,2:N+1)；ω xx,n+1(1,N+1)]；
对该第n+1个第二检测周期获取到的抽头系数序列中第1至N个抽头系数进行N点FFT，得到的FFT结果可以表示为：
ω xx,n+1_fft(1,1:N)＝fft(ω xx,n+1(1,1:N))
＝fft(ω xx,n(1,2:N+1))
＝fft(ω xx,n(1,1:N)+ω xx,n(1,N+1)-ω xx,n(1,1))；
＝(ω xx,n_fft(1,1:N)+ω xx,n(1,N+1)-ω xx,n(1,1))×e j2π×[1:N]/N
该FFT结果包括1至N共N个频点的频点值，该N个频点中第k个频点的功率可以表示为：|ω xx,n+1_fft(1,k)| 2；该N个频点的总功率可以表示为：|ω xx,n+1_fft(1,1：N)| 2。
根据上述推导可知，在计算第n+1个第二检测周期获取到的抽头系数序列中，第1至N个抽头系数的N点FFT结果中每个震荡频点的频点值的过程中，可以将第n个第二检测周期获取到的抽头系数序列中，第N+1个抽头系数与第1个抽头系数的系数差值，与该第n个第二检测周期的N点FFT结果相加后，再与该震荡频点的震荡系数相乘计算得到，该计算过程仅需两次加法操作和一次乘法操作，而无需再进行N点的FFT，从而有效降低了数据处理的功耗，提高了数据处理的效率。
步骤1023a、将该四个滤波器的抽头系数序列在至少两个震荡频点的震荡功率相加，得到震荡总功率。
在本申请实施例中，步长调节装置在确定出该四个滤波器中每个滤波器的抽头系数序列在J个震荡频点中每个震荡频点的震荡功率后，可以将确定出的共4×J个震荡功率相加，得到震荡总功率。该震荡总功率P1可以表示为：
Figure PCTCN2020103606-appb-000017
其中P1 ij表示第i个滤波器的抽头系数序列在频域的J个震荡频点中第j个震荡频点的震荡功率，i为不大于4的正整数。
可选的，如图12所示，该第二确定模块12还可以包括第一求和子模块123，该第一求和子模块123可以对4×J个震荡功率计算子模块122输出的震荡功率进行求和，得到震荡总功率P1。
步骤1024a、分别计算每个滤波器的抽头系数序列在频域的总功率。
在本申请实施例中，对于每个滤波器的抽头系数序列，步长调节装置可以将该抽头系数序列在频域中各个频点的功率相加，从而得到该抽头系数序列在频域的总功率。例 如，若抽头系数序列包括N个系数，步长调节装置对该N个系数进行N点FFT，得到的FFT结果中包括N个频点的频点值。该N个频点的频点值的功率之和(即平方和)，即为该抽头系数序列在频域的总功率。
示例的，如图12所示，步长调节装置中的第二确定模块12还可以包括：四个总功率计算子模块124，图12中仅示意性的示出了一个总功率计算子模块124。其中，每个总功率计算子模块124可以用于计算一个滤波器的抽头系数序列在频域的总功率。
可选的，为了提高确定抽头系数序列在频域的总功率的效率，上述步骤1024a可以包括如下步骤：
步骤a21、对于每个滤波器的抽头系数序列，将第N+1个抽头系数的功率与第1个抽头系数的功率相减，得到每个抽头系数序列的功率差值。
在本申请实施例中，每个抽头系数的功率可以等于该抽头系数的平方。以每个滤波器的目标抽头为第一个抽头为例，该4个滤波器中第一滤波器011的抽头系数序列的功率差值可以表示为：Δp 1＝|ω xx(1,N+1|  2-|ω xx(1,1)| 2，其中，|ω xx(1,N+1)| 2即为该第一滤波器011的抽头系数序列中第N+1个抽头系数的功率，|ω xx(1,1)| 2即为该第一滤波器011的抽头系数序列中第一个抽头系数的功率。
参考图12，每个总功率计算子模块124可以包括功率差值计算单元1241，该功率差值计算单元1241可以用于计算一个滤波器的抽头系数序列的功率差值。
步骤a22、确定该功率差值与N的第三乘积。
参考图12，该每个总功率计算子模块124还可以包括第七乘法器1242，该第七乘法器1242可以将该功率差值计算单元1241输出的功率差值与N相乘，得到第三乘积。
步骤a23、将该第三乘积与前一个第二检测周期确定出的总功率相加，得到当前第二检测周期内该滤波器的抽头系数序列在频域的总功率。
在本申请实施例中，每个总功率计算子模块124每隔一个第二检测周期确定出一个第三乘积后，均可以将该第三乘积与前一个第二检测周期确定出的总功率相加，从而得到当前第二检测周期内，该滤波器的抽头系数序列在频域的总功率。
示例的，如图12所示，该每个总功率计算子模块124还可以包括：第三寄存器1243和第六加法器1244。该第三寄存器1243可以用于将该第六加法器1244输出的总功率延迟一个第二检测周期后输出至该第六加法器1244，即该第三寄存器1243可以在每个第二检测周期，向该第六加法器1244提供前一个第二检测周期确定出的总功率。该第六加法器1244可以用于将该第七乘法器1242输出的第三乘积与该第三寄存器1243输出的前一个第二检测周期确定出的总功率相加，得到当前第二检测周期内，该滤波器的抽头系数序列在频域的总功率。
步骤1025a、将该四个滤波器的抽头系数序列在频域的总功率相加，得到频域总功率。
该频域总功率P2可以满足：
Figure PCTCN2020103606-appb-000018
其中p2 i为第i个滤波器的抽头系数序列在频域的总功率。
示例的，如图12所示，该第二确定模块12还可以包括第二求和子模块125，该第二求和子模块125可以对4个总功率计算子模块124输出的总功率进行求和，得到频域总功率。
步骤1026a、检测该震荡总功率与该频域总功率的功率比值是否大于比值阈值。
若该功率比值P1/P2大于比值阈值Pth，则执行步骤1027a；若该功率比值P1/P2不大于比值阈值Pth，则执行步骤1028a。其中，该比值阈值Pth为该步长调节装置中预先存储的， 且该比值阈值Pth可以为大于0且小于1的10 -1量级的数。
步骤1027a、将该功率比值与该比值阈值的差值的倒数确定为该数据通信系统的信道的SNR。
若该功率比值P1/P2大于比值阈值Pth，则步长调节装置可以将该功率比值与该比值阈值Pth的差值的倒数确定为该数据通信系统的信道的SNR，即确定SNR＝1/(P1/P2-Pth)。
步骤1028a、确定该数据通信系统的信道的SNR为无穷大。
若该功率比值P1/P2不大于比值阈值Pth，则步长调节装置可以确定该数据通信系统的信道的SNR为0的倒数，即确定该SNR为无穷大。
可选的，如图12所示，步长调节装置中的第二确定模块12还可以包括SNR确定子模块126，该SNR确定子模块126可以用于根据第一求和子模块123输出的震荡总功率，以及第二求和子模块125输出的频域总功率确定SNR。
参考图12，该SNR确定子模块126可以包括：第一选择器1261、第四寄存器1262、求导子模块1263、第八乘法器1264、第七加法器1265以及第二选择器1266。其中，第一选择器1261可以向求倒子模块1263输出总功率。该第四寄存器1262可以用于将该第一选择器1261输出的频域总功率延迟一个第二检测周期后输出至该第一选择器1261。
该第一选择器1261可以统计已执行的第二检测周期的个数cnt，若检测到该个数cnt为L的整数倍，即mod(cnt,L)＝＝0，则可以输出该第二求和子模块125提供的频域总功率；若检测到该个数cnt不为L的整数倍，则可以输出该第四寄存器1262提供的频域总功率。也即是，该第一选择器1261每隔L个第二检测周期，输出一次该第二求和子模块125计算得到的频域总功率。其中，L为大于1的整数，例如L可以为20。由于频域总功率的波动通常较小，因此第一选择器1261可以每隔若干个第二检测周期更新一次频域总功率P2，以减小该求倒子模块1263计算该频域总功率P2的倒数的功耗。
该求倒子模块1263可以用于计算该第一选择器1261提供的频域总功率P2的倒数1/P2，例如，该求倒子模块1263可以采用坐标旋转数字计算(coordinate rotation digital computer，CORDIC)算法计算该频域总功率P2的倒数1/P2，该CORDIC算法的计算效率较高，功耗较低。该第八乘法器1264可以将该第二求和子模块123输出的震荡总功率P1与该求倒子模块1263输出的倒数1/P2相乘，从而得到该震荡总功率P1与该频域总功率P2的功率比值P1/P2。
该第七加法器1265可以将该功率比值P1/P2与预先存储的负的比值阈值-Pth相加，从而计算得到该功率比值P1/P2与该比值阈值Pth的第四差值：P1/P2-Pth。第二选择器1266可以用于判断该第四差值是否大于0，若该第四差值大于0则可以输出该第四差值的倒数：1/(P1/P2-Pth)，即可以将该第四差值的倒数：1/(P1/P2-Pth)作为SNR输出。若该第四差值不大于0，则可以输出0作为噪信比，该噪信比是指噪声与信号的比值。也即是，可以确定该SNR为无穷大。
其中，该比值阈值Pth为信道正常情况下的震荡总功率与频域总功率的比值的比值，信道正常情况下的震荡总功率也可以理解为通信系统的底噪。
由于当信道中的噪声较大时，自适应均衡器的系数在频域中各震荡频点的震荡功率就越大，因此，在本申请实施例中，可以根据震荡总功率与频域总功率的比值确定出信道的SNR。
在上述步骤102中，作为另一种可选的实现方式，该步长调节装置也可以每隔第一检 测周期，根据该自适应均衡器在该第一检测周期输出的补偿信号的硬判误差，确定该数据通信系统的信道的SNR。参考图13，该步长调节装置根据硬判误差确定SNR的过程可以包括如下步骤：
步骤1021b、每隔第一检测周期，获取自适应均衡器在该第一检测周期输出的补偿信号的硬判误差。
在本申请实施例中，如图1所示，该自适应均衡器中包括硬判误差确定模块02，该硬判误差确定模块02可以对滤波器01输出的补偿信号进行硬判决，得到硬判结果，进而可以计算该硬判结果减去该补偿信号得到的差值，该差值即为硬判误差。相应的，该步长调节装置可以每隔第一检测周期，获取该硬判误差确定模块02在该第一检测周期输出的硬判误差。
步骤1022b、将该硬判误差的功率确定为数据通信系统的信道的SNR。
步长调节装置可以计算该硬判误差的平方，得到该硬判误差的功率，并将该硬判误差的功率确定为数据通信系统的信道的SNR。
可选地，在本申请实施例中，上述步骤101提供的两种确定RSOP的方式，与上述步骤102提供的两种SNR的方式可以进行组合。例如，参考图14，该步长调节装置10可以根据补偿信号确定RSOP，并根据自适应均衡器的系数(即滤波器01的系数)确定SNR。或者，参考图15，该步长调节装置10可以根据补偿信号确定RSOP，并根据硬判误差确定SNR。又或者，参考图16，该步长调节装置10可以根据自适应均衡器的系数确定RSOP，并根据该系数确定SNR。再或者，参考图17，该步长调节装置10可以根据自适应均衡器的系数确定RSOP，并根据硬判误差确定SNR。
本申请实施例还对自适应均衡器的步长随RSOP和SNR变化的情况进行了仿真，仿真环境如下：PMD为9.25皮秒每千米(ps/km)、差分群延时(differential group delay，DGD)为27.76ps、偏振相关损耗(polarization dependent loss，PDL)为2分贝(dB)、信号发射机和信号接收机中的滤波器的带宽均为45吉赫兹(GHz)。
仿真结果如图18所示，图18中的横坐标为时间t，单位为拍，纵坐标为自适应均衡器的步长mu。本申请实施例对RSOP＝0千赫兹(kHz)时，SNR分别为19dB和100dB时的mu进行了仿真，并对RSOP＝200kHz时，SNR分别为19dB和100dB时的mu进行了仿真。其中，1Hz＝2πrad/s。并且仿真时所采用的时间单位为第二检测周期，且该第二检测周期等于一拍，即仿真时每拍更新一次mu。参考图18可以看出，当RSOP固定时，SNR越大，则mu越小。SNR固定时，RSOP越大，则mu越大。
图19是本申请实施例提供的一种比特出错概率(bit error ratio，BER)随SNR变化的示意图，并且，图19中分别示出了自适应均衡器的步长mu为固定值时，BER随SNR变化的曲线，以及自适应均衡器的步长mu可调，即采用本申请实施例提供的方法调节步长mu时，BER随SNR变化的曲线。对比图19中的两条曲线可以看出，当数据通信系统中信道的SNR一定时，采用本申请实施例提供的方法调节步长mu后的BER，小于mu固定时的BER。并且，随着SNR的提高，例如当SNR＝40dB时，采用本申请实施例提供的方法调节步长mu后的BER的优化更为明显。由此可知，基于本申请实施例提供的方法调节自适应均衡器的步长后，可以有效改善数据通信系统的信号传输性能。
可选地，本申请实施例提供的步长调节方法的步骤的先后顺序可以进行适当调整， 步骤也可以根据情况进行相应增减。例如，步骤102与步骤101可以同时执行，或者步骤102也可以在步骤101之前执行；又或者，步骤103也可以根据情况删除。任何熟悉本技术领域的技术人员在本申请揭露的技术范围内，可轻易想到变化的方法，都应涵盖在本申请的保护范围之内，因此不再赘述。
综上所述，本申请实施例提供了一种自适应均衡器的步长调节方法，该方法可以检测信道的RSOP和SNR，并可以根据该RSOP和SNR调节自适应均衡器的步长，由此可以使得该自适应均衡器根据该调节后的步长更新其系数。相比于相关技术中的固定步长，本申请实施例提供的方法可以使得自适应均衡器的系数能够及时适应信道的RSOP和SNR的变化，改善了自适应均衡器的系数收敛性能，进而提高了数据通信系统的信号传输性能。
本申请实施例还提供了一种自适应均衡器的步长调节装置，该装置可以用于对诸如图1所示的自适应均衡器的步长进行调节，该装置也可以称为均衡微控制器(equalization micro controller，EMC)。该步长调节装置可以用于实现上述方法实施例提供的步长调节方法。如图3所示，该装置可以包括：
第一确定模块11，用于确定数据通信系统中信道的RSOP。
第二确定模块12，用于确定该信道的SNR。
步长调节模块15，用于根据该RSOP和该SNR调节该自适应均衡器的步长，调节后的该自适应均衡器的步长与该RSOP正相关，且与该SNR负相关。
其中，该第一确定模块11的功能实现可以参考上述步骤101的相关描述，第二确定模块12的功能实现可以参考上述步骤102的相关描述，该步长调节模块15的功能实现可以参考上述步骤104的相关描述。
可选的，如图20所示，该步长调节模块15可以包括：
第一乘法子模块1501，用于确定权重系数与该SNR的第一乘积。该第一乘法子模块1501可以乘法器，该第一乘法子模块1501的功能实现可以参考上述关于第三乘法器152的描述。
第一差值确定子模块1502，用于确定该RSOP的绝对值减去该第一乘积得到的第一差值。该第一差值确定子模块1502可以为加法器，该第一差值确定子模块1502的功能实现可以参考上述关于第二加法器153的描述。
步长计算子模块1503，用于将该第一差值与比例系数的第二乘积，与该自适应均衡器的初始步长相加，得到调节后的该自适应均衡器的步长。
该步长计算子模块1503可以包括乘法器和加法器，例如可以包括如图5中所示的第四乘法器154和第三加法器155。该步长计算子模块1503的功能实现可以参考上述关于该第四乘法器154和第三加法器155的描述。
可选的，该第一确定模块11可以用于：
每隔第一检测周期，根据该自适应均衡器在该第一检测周期输出的补偿信号，确定该信道的RSOP，其中，该补偿信号为该自适应均衡器对数据通信系统中传输的数据信号进行处理后输出的信号；
或者，每隔第二检测周期，根据该自适应均衡器的系数，确定该信道的RSOP；其中，该第二检测周期小于该第一检测周期。
可选的，该补偿信号包括：第一极化状态信号和第二极化状态信号；参考图21，该第一确定模块11，可以包括：
输入子模块1101，用于以该第一极化状态信号为第一行元素，并以该第二极化状态信号为第二行元素构建输入矩阵。该输入子模块1101的功能实现可以参考上述方法实施例中步骤1011a的描述。
第二乘法子模块1102，用于将该输入矩阵与该输入矩阵的伪逆矩阵相乘，得到鉴相矩阵，该鉴相矩阵的行数和列数均为2。
该第二乘法子模块1102可以包括乘法器，且该第二乘法子模块1102的功能实现可以参考上述方法实施例中步骤1012a的描述，以及关于伪逆矩阵确定子模块111和第五乘法器112的相关描述。
第二差值确定子模块1103，用于确定该鉴相矩阵中第二行第一列的元素与第一行第二列的元素的第二差值。该第二差值确定子模块1103可以包括加法器，该第二差值确定子模块1103的功能实现可以参考上述方法实施例中步骤1013a的描述，以及关于第四加法器113的相关描述。
RSOP确定子模块1104，用于将该第二差值的实部确定为该信道的RSOP。该RSOP确定子模块1104的功能实现可以参考上述方法实施例中步骤1014a的描述，以及关于实部计算子模块114的相关描述。
可选的，该第二确定模块12可以用于：
每隔第二检测周期，根据该自适应均衡器的系数，确定该数据通信系统的信道的SNR；
或者，每隔第一检测周期，根据该自适应均衡器在该第一检测周期输出的补偿信号的硬判误差，确定该数据通信系统的信道的SNR；其中，该第二检测周期小于该第一检测周期。
可选的，如图9所示，该自适应均衡器包括：四个滤波器，每个滤波器具有多个抽头，该自适应均衡器的系数包括：每个滤波器的多个抽头的抽头系数。如图22所示，该第二确定模块12可以包括：
获取子模块1201，用于每隔第二检测周期，分别获取每个滤波器的目标抽头的抽头系数序列，该抽头系数序列包括对该目标抽头的抽头系数在多个系数更新周期进行采样得到的多个抽头系数，其中，该系数更新周期为该自适应均衡器更新系数的周期，且该系数更新周期小于或等于该第二检测周期。
该获取子模块1201的功能实现可以参考上述方法实施例中步骤1021a的描述，以及关于缓存器121的相关描述。
第一计算子模块1202，用于分别计算每个滤波器的抽头系数序列在频域中每个震荡频点的震荡功率，该抽头系数序列在频域包括多个频点，该多个频点中存在至少两个该震荡频点。
该第一计算子模块1202的功能实现可以参考上述方法实施例中步骤1022a的描述，以及震荡功率计算子模块122的相关描述。例如，该第一计算子模块1202可以包括4×J个震荡功率计算子模块122。
第一加法子模块1203，用于将四个该滤波器的抽头系数序列在至少两个该震荡频点的震荡功率相加，得到震荡总功率。
该第一加法子模块1203的功能实现可以参考上述方法实施例中步骤1023a的描述，以及关于第一求和子模块123的相关描述。
第二计算子模块1204，用于分别计算每个滤波器的抽头系数序列在频域的总功率。
该第二计算子模块1204的功能实现可以参考上述方法实施例中步骤1024a的描述，以及总功率计算子模块124的相关描述。例如，该第二计算子模块1204可以包括4个总功率计算子模块124。
第二加法子模块1205，将四个该滤波器的抽头系数序列在频域的总功率相加，得到频域总功率。
该第二加法子模块1205的功能实现可以参考上述方法实施例中步骤1025a的描述，以及关于第二求和子模块125的相关描述。
SNR确定子模块1206，用于根据该震荡总功率与该频域总功率的功率比值确定该数据通信系统的信道的SNR。
该SNR确定子模块1206的功能实现可以参考上述方法实施例中步骤1026a至步骤1028a的描述，以及关于SNR确定子模块126的相关描述。
可选的，该频域包括N个频点，每个滤波器的目标抽头的抽头系数序列包括：在N+1个系数更新周期进行采样得到的N+1个抽头系数，该N+1个抽头系数按照采样时间由远到近的顺序排列，该N为大于1的整数。该第一计算子模块1202可以用于：
对于每个滤波器的抽头系数序列，将第N+1个抽头系数与第1个抽头系数相减，得到每个抽头系数序列的系数差值Δω；
根据该系数差值Δω，确定该抽头系数序列在频域中每个震荡频点的参考值，其中，该抽头系数序列在该N个频点中第k个频点的参考值d满足：
d＝(Δω+d')e j2πk/N；其中，d'为前一个第二检测周期确定出的参考值，k为不大于N的正整数；
将该参考值的功率确定为该抽头系数序列在该震荡频点的震荡功率。
可选的，该N个频点中存在4个震荡频点，该4个震荡频点分别为：第
Figure PCTCN2020103606-appb-000019
个频点，第
Figure PCTCN2020103606-appb-000020
个频点，第
Figure PCTCN2020103606-appb-000021
个频点，以及第
Figure PCTCN2020103606-appb-000022
个频点；
其中，t为该自适应均衡器的环路延时，
Figure PCTCN2020103606-appb-000023
表示向下取整，
Figure PCTCN2020103606-appb-000024
表示向上取整。
可选的，该第二计算子模块1204可以用于：
对于每个滤波器的抽头系数序列，将第N+1个抽头系数的功率与第1个抽头系数的功率相减，得到每个抽头系数序列的功率差值；
确定该功率差值与该N的第三乘积；
将该第三乘积与前一个第二检测周期确定出的总功率相加，得到当前第二检测周期内该滤波器的抽头系数序列在频域的总功率。
综上所述，本申请实施例提供了一种自适应均衡器的步长调节装置，该装置可以检测信道的RSOP和SNR，并可以根据该RSOP和SNR调节自适应均衡器的步长，由此可以使得该自适应均衡器根据该调节后的步长更新其系数。相比于相关技术中的固定步长，本申请实施例提供的装置可以使得自适应均衡器的系数能够及时适应信道的RSOP和SNR的变化，改善了自适应均衡器的系数收敛性能，进而提高了数据通信系统的信号传输性能。
应理解的是，本申请实施例的步长调节装置还可以用专用集成电路(application-specific integrated circuit，ASIC)实现，或可编程逻辑器件(programmable logic device，PLD)实现，上述PLD可以是复杂程序逻辑器件(complex programmable logical  device，CPLD)，现场可编程门阵列(field-programmable gate array，FPGA)，通用阵列逻辑(generic array logic，GAL)或其任意组合。也可以通过软件实现上述方法实施例提供的步长调节方法，当通过软件实现上述方法实施例提供的步长调节方法时，该步长调节装置中的各个模块也可以为软件模块。
图23是本申请实施例提供的另一种步长调节装置的结构示意图，参考图23，该装置可以包括：处理器2401、存储器2402、网络接口2403和总线2404。其中，总线2404用于连接处理器2401、存储器2402和网络接口2403。通过网络接口2403(可以是有线或者无线)可以实现与其他设备之间的通信连接。存储器2402中存储有计算机程序24021，该计算机程序24021用于实现各种应用功能。
应理解，在本申请实施例中，处理器2401可以是CPU，该处理器2401还可以是其他通用处理器、数字信号处理器(DSP)、专用集成电路(ASIC)、现场可编程门阵列(FPGA)、GPU或者其他可编程逻辑器件、分立门或者晶体管逻辑器件、分立硬件组件等。通用处理器可以是微处理器或者是任何常规的处理器等。
存储器2402可以是易失性存储器或非易失性存储器，或可包括易失性和非易失性存储器两者。其中，非易失性存储器可以是只读存储器(read-only memory，ROM)、可编程只读存储器(programmable ROM，PROM)、可擦除可编程只读存储器(erasable PROM，EPROM)、电可擦除可编程只读存储器(electrically EPROM，EEPROM)或闪存。易失性存储器可以是随机存取存储器(random access memory，RAM)，其用作外部高速缓存。通过示例性但不是限制性说明，许多形式的RAM可用，例如静态随机存取存储器(static RAM，SRAM)、动态随机存取存储器(DRAM)、同步动态随机存取存储器(synchronous DRAM，SDRAM)、双倍数据速率同步动态随机存取存储器(double data date SDRAM，DDR SDRAM)、增强型同步动态随机存取存储器(enhanced SDRAM，ESDRAM)、同步连接动态随机存取存储器(synchlink DRAM，SLDRAM)和直接内存总线随机存取存储器(direct rambus RAM，DR RAM)。
总线2404除包括数据总线之外，还可以包括电源总线、控制总线和状态信号总线等。但是为了清楚说明起见，在图中将各种总线都标为总线2404。
处理器2401被配置为执行存储器2402中存储的计算机程序，处理器2401通过执行该计算机程序24021来实现上述方法实施例中的步骤。
本申请实施例还提供了一种计算机可读存储介质，该计算机可读存储介质中存储有指令，当该指令在计算机上运行时，使得计算机执行如上述方法实施例中的步骤。
本申请实施例还提供了一种包含指令的计算机程序产品，当该计算机程序产品在计算机上运行时，使得计算机执行上述方法实施例中的步骤。
图24是本申请实施例提供的一种信号接收机的结构示意图，如图24所示，该信号接收机可以包括：自适应均衡器00，以及与该自适应均衡器00连接的如上述实施例所提供的步长调节装置10。例如，该步长调节装置10可以为如图3或图23所示的装置。
其中，该自适应均衡器00用于对接收到的数据信号进行补偿，该步长调节装置10用于调节该自适应均衡器00的系数。
可选的，该信号接收机还可以包括用于对接收到的数据信号进行模数转换、色度色散补偿和时钟同步的模块。
图25是本申请实施例提供的一种数据通信系统的结构示意图，如图25所示，该系统可以包括：信号接收机100，以及信号发射机200。其中，该信号接收机100可以为如图24所示的包括步长调节装置10的接收机。该信号发射机200和信号接收机100之间可以通过光纤连接，即本申请实施例提供的方案可以应用于光数字处理技术(optical digital signal processor，ODSP)领域中。
该信号发射机200用于通过信道向该信号接收机100发送数据信号；该信号接收机200用于接收数据信号，并对接收到的数据信号进行处理(例如采用自适应均衡器00对数据信号进行补偿)，以恢复出原始信号。
上述实施例，可以全部或部分地通过软件、硬件、固件或其他任意组合来实现。当使用软件实现时，上述实施例可以全部或部分地以计算机程序产品的形式实现。所述计算机程序产品包括一个或多个计算机指令。在计算机上加载或执行所述计算机程序指令时，全部或部分地产生按照本申请实施例所述的流程或功能。所述计算机可以为通用计算机、专用计算机、计算机网络、或者其他可编程装置。所述计算机指令可以存储在计算机可读存储介质中，或者从一个计算机可读存储介质向另一个计算机可读存储介质传输，例如，所述计算机指令可以从一个网站站点、计算机、服务器或数据中心通过有线(例如同轴电缆、光纤、数字用户线(DSL))或无线(例如红外、无线、微波等)方式向另一个网站站点、计算机、服务器或数据中心进行传输。所述计算机可读存储介质可以是计算机能够存取的任何可用介质或者是包含一个或多个可用介质集合的服务器、数据中心等数据存储设备。所述可用介质可以是磁性介质(例如，软盘、硬盘、磁带)、光介质(例如，DVD)、或者半导体介质。半导体介质可以是固态硬盘(solid state drive，SSD)。
应当理解的是，本文提及的“至少一个”是指一个或多个，“多个”是指两个或两个以上。
以上所述仅为本申请的可选实施例，并不用以限制本申请，任何熟悉本技术领域的技术人员在本申请揭露的技术范围内，可轻易想到各种等效的修改、等同替换、改进等，均应包含在本申请的保护范围之内。

Claims (22)

  1. 一种自适应均衡器的步长调节方法，其特征在于，所述方法包括：
    确定数据通信系统中信道的极化状态变化率RSOP；
    确定所述信道的信噪比SNR；
    根据所述RSOP和所述SNR调节所述自适应均衡器的步长，调节后的所述自适应均衡器的步长与所述RSOP正相关，且与所述SNR负相关。
  2. 根据权利要求1所述的方法，其特征在于，所述根据所述RSOP和所述SNR调节所述自适应均衡器的步长，包括：
    确定权重系数与所述SNR的第一乘积；
    确定所述RSOP的绝对值减去所述第一乘积得到的第一差值；
    将所述第一差值与比例系数的第二乘积，与所述自适应均衡器的初始步长相加，得到调节后的所述自适应均衡器的步长。
  3. 根据权利要求1或2所述的方法，其特征在于，所述确定数据通信系统中信道的RSOP，包括：
    每隔第一检测周期，根据所述自适应均衡器在所述第一检测周期输出的补偿信号，确定所述信道的RSOP，其中，所述补偿信号为所述自适应均衡器对数据通信系统中传输的数据信号进行处理后输出的信号；
    或者，每隔第二检测周期，根据所述自适应均衡器的系数，确定所述信道的RSOP；
    其中，所述第二检测周期小于所述第一检测周期。
  4. 根据权利要求3所述的方法，其特征在于，所述补偿信号包括：第一极化状态信号和第二极化状态信号；所述根据所述自适应均衡器对数据通信系统中传输的数据信号进行处理后输出的补偿信号，确定所述信道的RSOP，包括：
    以所述第一极化状态信号为第一行元素，并以所述第二极化状态信号为第二行元素构建输入矩阵；
    将所述输入矩阵与所述输入矩阵的伪逆矩阵相乘，得到鉴相矩阵，所述鉴相矩阵的行数和列数均为2；
    确定所述鉴相矩阵中第二行第一列的元素与第一行第二列的元素的第二差值；
    根据所述第二差值确定所述信道的RSOP。
  5. 根据权利要求1至4任一所述的方法，其特征在于，所述确定所述信道的SNR，包括：
    每隔第二检测周期，根据所述自适应均衡器的系数，确定所述信道的SNR；
    或者，每隔第一检测周期，根据所述自适应均衡器在所述第一检测周期输出的补偿信号的硬判误差，确定所述信道的SNR；
    其中，所述第二检测周期小于所述第一检测周期。
  6. 根据权利要求5所述的方法，其特征在于，所述自适应均衡器包括：四个滤波器， 每个所述滤波器具有多个抽头，所述自适应均衡器的系数包括：每个所述滤波器的多个抽头的抽头系数；所述每隔第二检测周期，根据所述自适应均衡器的系数，确定所述信道的SNR，包括：
    每隔第二检测周期，分别获取每个所述滤波器的目标抽头的抽头系数序列，所述抽头系数序列包括对所述目标抽头的抽头系数在多个系数更新周期进行采样得到的多个抽头系数，其中，所述系数更新周期为所述自适应均衡器更新系数的周期，且所述系数更新周期小于或等于所述第二检测周期；
    分别计算每个所述滤波器的抽头系数序列在频域中每个震荡频点的震荡功率，所述抽头系数序列在频域包括多个频点，所述多个频点中存在至少两个所述震荡频点；
    将四个所述滤波器的抽头系数序列在至少两个所述震荡频点的震荡功率相加，得到震荡总功率；
    分别计算每个所述滤波器的抽头系数序列在频域的总功率；
    将四个所述滤波器的抽头系数序列在频域的总功率相加，得到频域总功率；
    根据所述震荡总功率与所述频域总功率的功率比值确定所述信道的SNR。
  7. 根据权利要求6所述的方法，其特征在于，所述第二检测周期等于所述系数更新周期，所述频域包括N个频点，每个所述滤波器的目标抽头的抽头系数序列包括：在N+1个系数更新周期进行采样得到的N+1个抽头系数，所述N+1个抽头系数按照采样时间由远到近的顺序排列，所述N为大于1的整数；
    所述分别计算每个所述滤波器的抽头系数序列在频域中每个震荡频点的震荡功率，包括：
    对于每个所述滤波器的抽头系数序列，将第N+1个抽头系数与第1个抽头系数相减，得到每个所述抽头系数序列的系数差值Δω；
    根据所述系数差值Δω，确定所述抽头系数序列在频域中每个震荡频点的参考值，其中，所述抽头系数序列在所述N个频点中第k个频点的参考值d满足：
    d＝(Δω+d')e j2πk/N；
    其中，d'为前一个第二检测周期确定出的参考值，k为不大于N的正整数；
    将所述参考值的功率确定为所述抽头系数序列在所述震荡频点的震荡功率。
  8. 根据权利要求7所述的方法，其特征在于，所述N个频点中存在4个震荡频点，所述4个震荡频点分别为：第
    Figure PCTCN2020103606-appb-100001
    个频点，第
    Figure PCTCN2020103606-appb-100002
    个频点，第
    Figure PCTCN2020103606-appb-100003
    个频点，以及第
    Figure PCTCN2020103606-appb-100004
    个频点；
    其中，t为所述自适应均衡器的环路延时，
    Figure PCTCN2020103606-appb-100005
    表示向下取整，
    Figure PCTCN2020103606-appb-100006
    表示向上取整。
  9. 根据权利要求6至8任一所述的方法，其特征在于，所述频域包括N个频点，每个所述滤波器的抽头系数序列包括：在N+1个系数更新周期进行采样得到的N+1个抽头系数，所述N+1个抽头系数按照采样时间由远到近的顺序排列，所述N为大于1的整数；
    所述分别计算每个所述滤波器的抽头系数序列在频域的总功率，包括：
    对于每个所述滤波器的抽头系数序列，将第N+1个抽头系数的功率与第1个抽头系数的功率相减，得到每个所述抽头系数序列的功率差值；
    确定所述功率差值与所述N的第三乘积；
    将所述第三乘积与前一个第二检测周期确定出的总功率相加，得到当前第二检测周期内所述滤波器的抽头系数序列在频域的总功率。
  10. 一种自适应均衡器的步长调节装置，其特征在于，所述装置包括：
    第一确定模块，用于确定数据通信系统中信道的RSOP；
    第二确定模块，用于确定所述信道的SNR；
    步长调节模块，用于根据所述RSOP和所述SNR调节所述自适应均衡器的步长，调节后的所述自适应均衡器的步长与所述RSOP正相关，且与所述SNR负相关。
  11. 根据权利要求10所述的装置，其特征在于，所述步长调节模块，包括：
    第一乘法子模块，用于确定权重系数与所述SNR的第一乘积；
    第一差值确定子模块，用于确定所述RSOP的绝对值减去所述第一乘积得到的第一差值；
    步长计算子模块，用于将所述第一差值与比例系数的第二乘积，与所述自适应均衡器的初始步长相加，得到调节后的所述自适应均衡器的步长。
  12. 根据权利要求10或11所述的装置，其特征在于，所述第一确定模块，用于：
    每隔第一检测周期，根据所述自适应均衡器在所述第一检测周期输出的补偿信号，确定所述信道的RSOP，其中，所述补偿信号为所述自适应均衡器对数据通信系统中传输的数据信号进行处理后输出的信号；
    或者，每隔第二检测周期，根据所述自适应均衡器的系数，确定所述信道的RSOP；
    其中，所述第二检测周期小于所述第一检测周期。
  13. 根据权利要求12所述的装置，其特征在于，所述补偿信号包括：第一极化状态信号和第二极化状态信号；所述第一确定模块，包括：
    输入子模块，用于以所述第一极化状态信号为第一行元素，并以所述第二极化状态信号为第二行元素构建输入矩阵；
    第二乘法子模块，用于将所述输入矩阵与所述输入矩阵的伪逆矩阵相乘，得到鉴相矩阵，所述鉴相矩阵的行数和列数均为2；
    第二差值确定子模块，用于确定所述鉴相矩阵中第二行第一列的元素与第一行第二列的元素的第二差值；
    RSOP确定子模块，用于根据所述第二差值确定所述信道的RSOP。
  14. 根据权利要求10至13任一所述的装置，其特征在于，所述第二确定模块，用于：
    每隔第二检测周期，根据所述自适应均衡器的系数，确定所述信道的SNR；
    或者，每隔第一检测周期，根据所述自适应均衡器在所述第一检测周期输出的补偿信号的硬判误差，确定所述信道的SNR；
    其中，所述第二检测周期小于所述第一检测周期。
  15. 根据权利要求14所述的装置，其特征在于，所述自适应均衡器包括：四个滤波 器，每个所述滤波器具有多个抽头，所述自适应均衡器的系数包括：每个所述滤波器的多个抽头的抽头系数；所述第二确定模块，包括：
    获取子模块，用于每隔第二检测周期，分别获取每个所述滤波器的目标抽头的抽头系数序列，所述抽头系数序列包括对所述目标抽头的抽头系数在多个系数更新周期进行采样得到的多个抽头系数，其中，所述系数更新周期为所述自适应均衡器更新系数的周期，且所述系数更新周期小于或等于所述第二检测周期；
    第一计算子模块，用于分别计算每个所述滤波器的抽头系数序列在频域中每个震荡频点的震荡功率，所述抽头系数序列在频域包括多个频点，所述多个频点中存在至少两个所述震荡频点；
    第一加法子模块，用于将四个所述滤波器的抽头系数序列在至少两个所述震荡频点的震荡功率相加，得到震荡总功率；
    第二计算子模块，用于分别计算每个所述滤波器的抽头系数序列在频域的总功率；
    第二加法子模块，将四个所述滤波器的抽头系数序列在频域的总功率相加，得到频域总功率；
    SNR确定子模块，用于根据所述震荡总功率与所述频域总功率的功率比值确定所述信道的SNR。
  16. 根据权利要求15所述的装置，其特征在于，所述第二检测周期等于所述系数更新周期，所述频域包括N个频点，每个所述滤波器的目标抽头的抽头系数序列包括：在N+1个系数更新周期进行采样得到的N+1个抽头系数，所述N+1个抽头系数按照采样时间由远到近的顺序排列，所述N为大于1的整数；
    所述第一计算子模块，用于：
    对于每个所述滤波器的抽头系数序列，将第N+1个抽头系数与第1个抽头系数相减，得到每个所述抽头系数序列的系数差值Δω；
    根据所述系数差值Δω，确定所述抽头系数序列在频域中每个震荡频点的参考值，其中，所述抽头系数序列在所述N个频点中第k个频点的参考值d满足：
    d＝(Δω+d')e j2πk/N；
    其中，d'为前一个第二检测周期确定出的参考值，k为不大于N的正整数；
    将所述参考值的功率确定为所述抽头系数序列在所述震荡频点的震荡功率。
  17. 根据权利要求16所述的装置，其特征在于，所述N个频点中存在4个震荡频点，所述4个震荡频点分别为：第
    Figure PCTCN2020103606-appb-100007
    个频点，第
    Figure PCTCN2020103606-appb-100008
    个频点，第
    Figure PCTCN2020103606-appb-100009
    个频点，以及第
    Figure PCTCN2020103606-appb-100010
    个频点；
    其中，t为所述自适应均衡器的环路延时，
    Figure PCTCN2020103606-appb-100011
    表示向下取整，
    Figure PCTCN2020103606-appb-100012
    表示向上取整。
  18. 根据权利要求15至17任一所述的装置，其特征在于，所述频域包括N个频点，每个所述滤波器的抽头系数序列包括：在N+1个系数更新周期进行采样得到的N+1个抽头系数，所述N+1个抽头系数按照采样时间由远到近的顺序排列，所述N为大于1的整数；
    所述第二计算子模块，用于：
    对于每个所述滤波器的抽头系数序列，将第N+1个抽头系数的功率与第1个抽头系数的功率相减，得到每个所述抽头系数序列的功率差值；
    确定所述功率差值与所述N的第三乘积；
    将所述第三乘积与前一个第二检测周期确定出的总功率相加，得到当前第二检测周期内所述滤波器的抽头系数序列在频域的总功率。
  19. 一种自适应均衡器的步长调节装置，其特征在于，所述装置包括：存储器，处理器及存储在所述存储器上并能够在所述处理器上运行的计算机程序，所述处理器执行所述计算机程序时实现如权利要求1至9任一所述的自适应均衡器的步长调节方法。
  20. 一种计算机可读存储介质，其特征在于，所述计算机可读存储介质中存储有指令，当所述指令在计算机上运行时，使得计算机执行如权利要求1至9任一所述的自适应均衡器的步长调节方法。
  21. 一种信号接收机，其特征在于，所述信号接收机包括：自适应均衡器，以及如权利要求10至19任一所述的步长调节装置；
    其中，所述自适应均衡器用于对接收到的数据信号进行补偿，所述步长调节装置用于调节所述自适应均衡器的系数。
  22. 一种数据通信系统，其特征在于，所述系统包括：信号发射机以及如权利要求21所述的信号接收机；
    所述信号发射机用于通过信道向所述信号接收机发送数据信号；
    所述信号接收机用于接收所述数据信号，并对接收到的所述数据信号进行处理。
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