WO2021143926A1 - 像素电路、显示基板、显示面板和像素驱动方法 - Google Patents

像素电路、显示基板、显示面板和像素驱动方法 Download PDF

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Publication number
WO2021143926A1
WO2021143926A1 PCT/CN2021/072674 CN2021072674W WO2021143926A1 WO 2021143926 A1 WO2021143926 A1 WO 2021143926A1 CN 2021072674 W CN2021072674 W CN 2021072674W WO 2021143926 A1 WO2021143926 A1 WO 2021143926A1
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electrode
transistor
control
electrically connected
signal line
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PCT/CN2021/072674
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English (en)
French (fr)
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董甜
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京东方科技集团股份有限公司
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Priority to US17/427,532 priority Critical patent/US11508301B2/en
Publication of WO2021143926A1 publication Critical patent/WO2021143926A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3275—Details of drivers for data electrodes
    • G09G3/3291—Details of drivers for data electrodes in which the data driver supplies a variable data voltage for setting the current through, or the voltage across, the light-emitting elements
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0814—Several active elements per pixel in active matrix panels used for selection purposes, e.g. logical AND for partial update
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0819—Several active elements per pixel in active matrix panels used for counteracting undesired variations, e.g. feedback or autozeroing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0272—Details of drivers for data electrodes, the drivers communicating data to the pixels by means of a current
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0233—Improving the luminance or brightness uniformity across the screen

Definitions

  • the present disclosure relates to the field of display technology, and in particular to a pixel circuit, a display substrate, a display panel, and a pixel driving method.
  • the light-emitting devices in the Organic Light-emitting Diode (Organic Light-emitting Diode) display device are driven to emit light by the current generated by the driving transistor in the saturated state, but the current manufacturing process of the OLED display device is difficult to ensure the uniformity of the threshold voltage of the driving transistor In addition, the threshold voltage of the driving transistor will shift to different degrees during use, which causes the problem of uneven brightness of each pixel in the OLED display device.
  • an embodiment of the present disclosure provides a pixel circuit, including: a reference writing circuit, a threshold compensation circuit, a data writing circuit, a reset circuit, and a driving transistor;
  • the reference writing circuit is electrically connected to a reference voltage terminal, a first control signal line, and a control electrode of the driving transistor, and is configured to provide a reference voltage terminal in response to the control of the first control signal line. Writing a reference voltage to the control electrode of the driving transistor;
  • the data writing circuit is electrically connected to a data line, the first control signal line, and the threshold compensation circuit, and is configured to write the data voltage provided by the data line in response to the control of the first control signal line To the threshold compensation circuit;
  • the threshold compensation circuit is electrically connected to a second control signal line, the control electrode of the driving transistor, and the second electrode of the driving transistor, and is configured to obtain the threshold voltage of the driving transistor and respond to the second control
  • the control of the signal line provides a first control voltage to the control electrode of the drive transistor, and provides a second control voltage to the second electrode of the drive transistor, so as to perform threshold compensation on the drive transistor;
  • the reset circuit is electrically connected to a reset voltage terminal and a third control signal line, and is configured to write the reset voltage provided by the reset voltage terminal to the pixel in response to the control of the third control signal line Circuit
  • the first electrode of the driving transistor is electrically connected to the first operating voltage terminal, and the second electrode is electrically connected to the first electrode of the light emitting device, and is configured to respond to the control of the first control voltage and the second control voltage,
  • the corresponding driving current is output to drive the light-emitting device to emit light.
  • the difference between the first control voltage and the second control voltage is Vdata-Vref+Vth, where Vdata is the data voltage, Vref is the reference voltage, and Vth is the driving transistor Threshold voltage.
  • the reference writing circuit includes: a first transistor
  • the control electrode of the first transistor is electrically connected to the first control signal line, the first electrode of the first transistor is electrically connected to the reference voltage terminal, and the second electrode of the first transistor is electrically connected to the drive The control electrode of the transistor is electrically connected.
  • the data writing circuit includes: a second transistor
  • the control electrode of the second transistor is electrically connected to the first control signal line, the first electrode of the second transistor is electrically connected to the data line, and the second electrode of the second transistor is electrically connected to the threshold compensation
  • the circuit is electrically connected.
  • the threshold compensation circuit includes: a third transistor and a capacitor
  • the control electrode of the third transistor is electrically connected to the second control signal line, the first electrode of the third transistor is electrically connected to the control electrode of the driving transistor, and the second electrode of the third transistor is electrically connected to the control electrode of the driving transistor.
  • the first end of the capacitor is electrically connected to the data writing circuit;
  • the second terminal of the capacitor is electrically connected to the second terminal of the driving transistor.
  • the reset circuit includes: a fourth transistor
  • the control electrode of the fourth transistor is electrically connected to the third control signal line, the first electrode of the fourth transistor is electrically connected to the reset voltage terminal, and the second electrode of the fourth transistor is electrically connected to the reset voltage terminal.
  • the second electrode of the driving transistor is electrically connected.
  • the reset circuit includes: a fourth transistor
  • the control electrode of the fourth transistor is electrically connected to the third control signal line, the first electrode of the fourth transistor is electrically connected to the reset voltage terminal, and the second electrode of the fourth transistor is electrically connected to the reset voltage terminal.
  • the first pole of the light emitting device is electrically connected.
  • it further includes: a light-emitting control circuit, and the second electrode of the driving transistor is electrically connected to the first electrode of the light-emitting device through the light-emitting control circuit;
  • the light emission control circuit is electrically connected to the fourth control signal line, and is configured to control the relationship between the second electrode of the driving transistor and the first electrode of the light emitting device in response to the control of the fourth control signal line. The on-off.
  • the light emission control circuit includes:
  • a fifth transistor the control electrode of the fifth transistor is electrically connected to the fourth control signal line, the first electrode of the fifth transistor is electrically connected to the second electrode of the driving transistor, and the The second pole is electrically connected to the first pole of the light emitting device.
  • the fourth control signal line and the second control signal line are the same control signal line.
  • the third control signal line and the first control signal line are the same control signal line.
  • the pixel circuit further includes a light emitting control circuit
  • the second electrode of the driving transistor is electrically connected to the first electrode of the light emitting device through the light emitting control circuit
  • the light emitting control circuit is connected to the fourth electrode of the light emitting device.
  • the control signal line is electrically connected, and is configured to control the on-off between the second electrode of the driving transistor and the first electrode of the light-emitting device in response to the control of the fourth control signal line, wherein,
  • the reference writing circuit includes a first transistor, the data writing circuit includes a second transistor, the threshold compensation circuit includes a third transistor and a capacitor, the reset circuit includes a fourth transistor, and the light emission control circuit includes Fifth transistor,
  • the control electrode of the first transistor is electrically connected to the first control signal line, the first electrode of the first transistor is electrically connected to the reference voltage terminal, and the second electrode of the first transistor is electrically connected to the drive The control electrode of the transistor is electrically connected,
  • the control electrode of the second transistor is electrically connected to the first control signal line, the first electrode of the second transistor is electrically connected to the data line, and the second electrode of the second transistor is electrically connected to the third The second electrode of the transistor and the first end of the capacitor are electrically connected,
  • the control electrode of the third transistor is electrically connected to the second control signal line
  • the first electrode of the third transistor is electrically connected to the control electrode of the driving transistor
  • the second electrode of the third transistor is electrically connected to the control electrode of the driving transistor.
  • the first terminal of the capacitor and the second terminal of the second transistor are electrically connected;
  • the control electrode of the fourth transistor is electrically connected to the third control signal line, the first electrode of the fourth transistor is electrically connected to the reset voltage terminal, and the second electrode of the fourth transistor is electrically connected to the reset voltage terminal.
  • the second pole of the driving transistor is electrically connected
  • the control electrode of the fifth transistor is electrically connected to the fourth control signal line
  • the first electrode of the fifth transistor is electrically connected to the second electrode of the driving transistor and the second electrode of the fourth transistor
  • the The second electrode of the fifth transistor is electrically connected to the first electrode of the light emitting device
  • the second terminal of the capacitor is electrically connected to the second terminal of the driving transistor.
  • the pixel circuit further includes a light emitting control circuit
  • the second electrode of the driving transistor is electrically connected to the first electrode of the light emitting device through the light emitting control circuit
  • the light emitting control circuit is connected to the fourth electrode of the light emitting device.
  • the control signal line is electrically connected, and is configured to control the on-off between the second electrode of the driving transistor and the first electrode of the light-emitting device in response to the control of the fourth control signal line, wherein,
  • the control electrode of the first transistor is electrically connected to the first control signal line, the first electrode of the first transistor is electrically connected to the reference voltage terminal, and the second electrode of the first transistor is electrically connected to the drive The control electrode of the transistor is electrically connected,
  • the control electrode of the second transistor is electrically connected to the first control signal line, the first electrode of the second transistor is electrically connected to the data line, and the second electrode of the second transistor is electrically connected to the third The second electrode of the transistor and the first end of the capacitor are electrically connected,
  • the control electrode of the third transistor is electrically connected to the second control signal line
  • the first electrode of the third transistor is electrically connected to the control electrode of the driving transistor
  • the second electrode of the third transistor is electrically connected to the control electrode of the driving transistor.
  • the first terminal of the capacitor and the second terminal of the second transistor are electrically connected;
  • the control electrode of the fourth transistor is electrically connected to the third control signal line, the first electrode of the fourth transistor is electrically connected to the reset voltage terminal, and the second electrode of the fourth transistor is electrically connected to the reset voltage terminal.
  • the first pole of the light-emitting device is electrically connected
  • the control electrode of the fifth transistor is electrically connected to the fourth control signal line
  • the first electrode of the fifth transistor is electrically connected to the second electrode of the driving transistor
  • the second electrode of the fifth transistor is electrically connected to the The second electrode of the fourth transistor is electrically connected to the first electrode of the light-emitting device
  • the second terminal of the capacitor is electrically connected to the second terminal of the driving transistor.
  • all transistors in the pixel circuit are N-type transistors.
  • embodiments of the present disclosure also provide a display substrate, including: the pixel circuit provided in the above-mentioned first aspect.
  • embodiments of the present disclosure also provide a display device, including: the display substrate provided in the second aspect described above.
  • the embodiments of the present disclosure also provide a pixel driving method for driving the pixel circuit provided in the above-mentioned first aspect, and the pixel driving method includes:
  • the reference voltage is written to the control electrode of the drive transistor through the reference write circuit, and the data voltage is written to the threshold compensation circuit through the data write circuit, Writing the reset voltage to the pixel circuit through the reset circuit;
  • the reference voltage is written to the control electrode of the drive transistor through the reference write circuit, the data voltage is written to the threshold compensation circuit through the data write circuit, and Obtaining the threshold voltage of the driving transistor by the threshold compensation circuit;
  • the first control voltage and the second control voltage are respectively written to the control electrode of the driving transistor and the second electrode of the driving transistor through the threshold compensation circuit, and the driving transistor is responsive to The first control voltage and the second control voltage control output corresponding drive currents to drive the light emitting device to emit light.
  • the pixel circuit further includes a light emitting control circuit
  • the second electrode of the driving transistor is electrically connected to the first electrode of the light emitting device through the light emitting control circuit
  • the light emitting control circuit is connected to the fourth electrode of the light emitting device.
  • the control signal line is electrically connected, and is configured to control the on-off between the second electrode of the driving transistor and the first electrode of the light emitting device in response to the control of the fourth control signal line
  • the pixel driving method includes :
  • the first control signal line provides an effective level voltage signal
  • the second control signal line and the fourth control signal line provide an off-level voltage signal
  • the third control signal line provides an effective level voltage signal
  • the first control signal line provides an effective level voltage signal
  • the second control signal line and the fourth control signal line provide an off-level voltage signal
  • the third control signal line provides an off-level voltage signal
  • the first control signal line provides an off-level voltage signal
  • the second control signal line and the fourth control signal line provide an effective level voltage signal
  • the third control signal line provides an off-level voltage signal
  • the pixel circuit further includes a light emitting control circuit
  • the second electrode of the driving transistor is electrically connected to the first electrode of the light emitting device through the light emitting control circuit
  • the light emitting control circuit is connected to the fourth electrode of the light emitting device.
  • the control signal line is electrically connected, and is configured to control the on-off between the second electrode of the driving transistor and the first electrode of the light emitting device in response to the control of the fourth control signal line
  • the pixel driving method includes :
  • the first control signal line and the third control signal line provide effective level voltage signals
  • the second control signal line provides off-level voltage signals
  • the fourth control signal line provides effective level voltage signals
  • the first control signal line and the third control signal line provide effective level voltage signals
  • the second control signal line provides off-level voltage signals
  • the fourth control signal line provides off-level voltage signals
  • the first control signal line and the third control signal line provide an off-level voltage signal
  • the second control signal line provides an effective level voltage signal
  • the fourth control signal line provides an effective level voltage signal
  • FIG. 1 is a schematic diagram of a circuit structure of a pixel circuit provided by an embodiment of the disclosure
  • FIG. 2 is a schematic diagram of another circuit structure of a pixel circuit provided by an embodiment of the disclosure.
  • FIG. 3 is a working timing diagram of the pixel circuit shown in FIG. 2;
  • FIG. 4 is a schematic diagram of another circuit structure of a pixel circuit provided by an embodiment of the disclosure.
  • FIG. 5 is a working timing diagram of the pixel circuit shown in FIG. 4;
  • FIG. 6 is a flowchart of a pixel driving method provided by an embodiment of the disclosure.
  • the light-emitting device in the embodiment of the present disclosure may be a current-driven light-emitting device including LED (Light Emitting Diode) or OLED (Organic Light Emitting Diode) in the prior art.
  • LED Light Emitting Diode
  • OLED Organic Light Emitting Diode
  • the description is made by taking an OLED as the light emitting device as an example.
  • the light-emitting device has a first electrode and a second electrode, one of which is an anode and the other is a cathode.
  • the first electrode of the light-emitting device is the anode and the second electrode of the light-emitting device is the cathode.
  • the transistors in the embodiments of the present disclosure may be thin film transistors or field effect transistors or other switching devices with the same characteristics.
  • a transistor generally includes three poles: a gate, a source, and a drain.
  • the source and drain in the transistor are structurally symmetrical, and the two can be interchanged as needed.
  • the control electrode of the transistor refers to the gate of the transistor, and one of the first electrode and the second electrode of the transistor is the source and the other is the drain.
  • electrical connection can be a direct electrical connection or an indirect electrical connection.
  • transistors can be divided into N-type transistors and P-type transistors; when the transistor is an N-type transistor, its on-voltage (also called effective level voltage) is a high-level voltage, and a cut-off voltage (also known as the turn-off level voltage) is a low-level voltage; when the transistor is a P-type transistor, its turn-on voltage (also known as the effective level voltage) is a low-level voltage, and the cut-off voltage (also known as , Turn-off level voltage) is high level voltage.
  • each transistor is an N-type transistor as an example, which will not limit the technical solution of the present disclosure.
  • FIG. 1 is a schematic diagram of a circuit structure of a pixel circuit provided by an embodiment of the disclosure.
  • the pixel circuit includes: a reference writing circuit 1, a threshold compensation circuit 3, a data writing circuit 2, a reset circuit 4 and the driving transistor DTFT.
  • the reference writing circuit 1 is electrically connected to the reference voltage terminal, the first control signal line SCAN1 and the control electrode of the driving transistor DTFT.
  • the reference writing circuit 1 is configured to respond to the control of the first control signal line SCAN1 to provide the reference voltage terminal The voltage is written to the control electrode of the driving transistor DTFT.
  • the data writing circuit 2 is electrically connected to the data line DATA, the first control signal line SCAN1, and the threshold compensation circuit 3.
  • the data writing circuit 2 is configured to write the data voltage provided by the data line DATA in response to the control of the first control signal line SCAN1 Into the threshold compensation circuit 3.
  • the threshold compensation circuit 3 is electrically connected to the second control signal line SCAN2, the control electrode of the driving transistor DTFT, and the second electrode of the driving transistor DTFT.
  • the threshold compensation circuit 3 is configured to obtain the threshold voltage of the driving transistor DTFT and respond to the second control signal
  • the control of the line SCAN2 respectively provides a first control voltage to the control electrode of the driving transistor DTFT and a second control voltage to the second electrode of the driving transistor DTFT to perform threshold compensation for the driving transistor.
  • the reset circuit 4 is electrically connected to the reset voltage terminal and the third control signal line SCAN3, and is configured to write the reset voltage provided by the reset voltage terminal to the pixel circuit (for example, drive) in response to the control of the third control signal line SCAN3.
  • the second pole of the transistor DTFT The second pole of the transistor DTFT).
  • the first electrode of the driving transistor DTFT is electrically connected to the first operating voltage terminal
  • the second electrode of the driving transistor DTFT is electrically connected to the first electrode of the light emitting device OLED
  • the driving transistor DTFT is configured to respond to the first control voltage and the second control voltage Control, output the corresponding drive current to drive the light-emitting device OLED.
  • the second electrode of the light emitting device OLED is electrically connected to the second working voltage terminal, and the light emitting device OLED is configured to receive the driving current and emit light.
  • the difference between the first control voltage and the second control voltage may be Vdata-Vref+Vth, where Vdata is the data voltage, Vref is the reference voltage, and Vth is the driving transistor
  • Vdata is the data voltage
  • Vref is the reference voltage
  • Vth is the driving transistor
  • the threshold voltage of the DTFT It should be noted that in this embodiment, the voltages of the first control voltage and the second control voltage are variable, but the difference between the first control voltage and the second control voltage is fixed to Vdata-Vref+Vth .
  • the working process of the pixel circuit provided by the embodiment of the present disclosure will be described in detail below.
  • the reference voltage provided by the reference voltage terminal is Vref
  • the data voltage provided by the data line DATA is Vdata
  • the reset voltage provided by the reset voltage terminal is Vinit
  • the first working voltage provided by the first working voltage terminal is VDD
  • the second working voltage is The second working voltage provided by the terminal is VSS.
  • the working process of the pixel circuit may include a reset preparation phase, a threshold compensation phase, and a light-emitting phase.
  • the reference writing circuit 1 writes the reference voltage to the control electrode of the driving transistor DTFT
  • the data writing circuit 2 writes the data voltage to the threshold compensation circuit 3
  • the reset circuit 4 writes the reset voltage To the pixel circuit (for example, the second pole of the driving transistor DTFT). That is, at the end of the reset preparation phase, the voltage at point G is Vref, the voltage at point S is Vinit, and the voltage at point N is Vdata.
  • Vref, Vinit, and Vdata should satisfy the following relationship:
  • the value interval of the data voltage Vdata is related to Vref. The greater the setting of Vref, the greater the minimum value of Vdata.
  • the reference writing circuit 1 continues to write the reference voltage to the control electrode of the driving transistor DTFT
  • the data writing circuit 2 continues to write the data voltage to the threshold compensation circuit 3
  • the threshold compensation circuit 3 obtains the threshold voltage of the driving transistor DTFT.
  • the threshold compensation circuit 3 obtains the threshold voltage of the driving transistor DTFT. The specific process will be described in detail in the subsequent content.
  • the threshold compensation circuit 3 writes the first control voltage and the second control voltage to the control electrode of the driving transistor DTFT and the second electrode of the driving transistor DTFT, respectively, and the driving transistor DTFT responds to the first control voltage and the second control voltage.
  • the control outputs the corresponding drive current to drive the light-emitting device OLED to emit light.
  • the threshold compensation circuit 3 writes the first control voltage and the second control voltage to the control electrode of the driving transistor DTFT and the driving transistor DTFT respectively, wherein the difference between the first control voltage and the second control voltage is Vdata-Vref+ Vth voltage signal.
  • I is the driving current output by the driving transistor DTFT
  • K is a constant and is related to the channel aspect ratio and electron mobility of the driving transistor DTFT.
  • the driving current output by the driving transistor DTFT in the light-emitting phase is only related to the data voltage Vdata and the reference voltage Vref, and has nothing to do with the threshold voltage, the first working voltage, and the second working voltage of the driving transistor DTFT.
  • the technical solution of the present disclosure can compensate the threshold voltage of the driving transistor DTFT, so that the driving current is not affected by the threshold voltage of the driving transistor DTFT, and eliminates the uneven brightness of each pixel caused by the uneven threshold voltage and drift of the driving transistor DTFT.
  • the technical solution of the present disclosure can also compensate the working voltage, so that the driving current is not affected by the working voltage, and the problem of uneven brightness of the overall display caused by the voltage drop of the working voltage is eliminated.
  • the driving current output by the driving transistor DTFT in the light-emitting phase is related to the reference voltage Vref
  • the light-emitting brightness of the light-emitting device OLED can be controlled by adjusting the size of the reference voltage Vref. For the entire display device, by adjusting the size of the reference voltage Vref, the overall display brightness of the display device can be adjusted.
  • the pixel circuit may also be configured with a light-emitting control circuit 5; wherein, the second electrode of the driving transistor DTFT can be electrically connected to the first electrode of the light-emitting device OLED through the light-emitting control circuit 5; the light-emitting control circuit 5 is connected to the first electrode of the light-emitting device OLED.
  • the four control signal lines SCAN4 are electrically connected, and are configured to control the on-off between the second electrode of the driving transistor DTFT and the first electrode of the light-emitting device OLED in response to the control of the fourth control signal line SCAN4.
  • the light-emitting device OLED By controlling the on-off between the second pole of the driving transistor DTFT and the first pole of the light-emitting device OLED, it is possible to effectively prevent the light-emitting device OLED from erroneously emitting light in the non-emitting phase (ie, the reset preparation phase and the threshold compensation phase).
  • the reset circuit 4 may be directly connected to the second pole of the driving transistor DTFT, or the reset circuit 4 may be directly connected to the first pole of the light emitting device OLED and is connected to the light emitting control circuit 5
  • the second electrode of the driving transistor DTFT is connected.
  • FIG. 1 only exemplarily shows the case where the reset circuit 4 is directly connected to the second electrode of the driving transistor DTFT.
  • FIG. 2 is a schematic diagram of another circuit structure of a pixel circuit provided by an embodiment of the disclosure. As shown in FIG. 2, the pixel circuit is a specific alternative solution based on the pixel circuit shown in FIG. 1.
  • the reference writing circuit 1 includes: a first transistor T1; the control electrode of the first transistor T1 is electrically connected to the first control signal line SCAN1, and the first electrode of the first transistor T1 is electrically connected to the reference voltage terminal, The second electrode of the first transistor T1 is electrically connected to the control electrode of the driving transistor DTFT.
  • the data writing circuit 2 includes: a second transistor T2; the control electrode of the second transistor T2 is electrically connected to the first control signal line SCAN1, and the first electrode of the second transistor T2 is electrically connected to the data line DATA, The second pole of the second transistor T2 is electrically connected to the threshold compensation circuit 3.
  • the threshold compensation circuit 3 includes: a third transistor T3 and a capacitor C; the control electrode of the third transistor T3 is electrically connected to the second control signal line SCAN2, and the first electrode of the third transistor T3 is connected to the driving transistor DTFT.
  • the control electrode is electrically connected, the second electrode of the third transistor T3 is electrically connected to the first end of the capacitor C and the data writing circuit 2; the second end of the capacitor C is electrically connected to the second electrode of the driving transistor DTFT.
  • the reset circuit 4 includes: a fourth transistor T4; the control electrode of the fourth transistor T4 is electrically connected to the third control signal line SCAN3, and the first electrode of the fourth transistor T4 is electrically connected to the reset voltage terminal, The second electrode of the fourth transistor T4 is electrically connected to the second electrode of the driving transistor DTFT.
  • the light emission control circuit 5 includes: a fifth transistor T5; the control electrode of the fifth transistor T5 is electrically connected to the fourth control signal line SCAN4, and the first electrode of the fifth transistor T5 is connected to the second electrode of the driving transistor DTFT. It is electrically connected to the reset circuit 4, and the second electrode of the fifth transistor T5 is electrically connected to the first electrode of the light emitting device OLED.
  • control signal line SCAN4 and the second control signal line SCAN2 may be the same control signal line. At this time, the types of control signal lines can be effectively reduced, and the performance requirements for the control chip can be reduced.
  • the working process of the pixel circuit shown in FIG. 2 will be described in detail below with reference to the accompanying drawings.
  • the first transistor T1 to the fifth transistor T5 are all used as switching transistors.
  • FIG. 3 is a working timing diagram of the pixel circuit shown in FIG. 2. As shown in FIG. 3, the working process of the pixel circuit may include a reset preparation phase t1, a threshold compensation phase t2, and a light-emitting phase t3.
  • the first control signal line SCAN1 provides a high level voltage signal
  • the second control signal line SCAN2 and the fourth control signal line SCAN4 provide a low level voltage signal
  • the third control signal line SCAN3 provides a high level Voltage signal.
  • the first transistor T1, the second transistor T2, and the fourth transistor T4 are turned on, and the third transistor T3 and the fifth transistor T5 are turned off.
  • the reference voltage Vref is written to point G through the first transistor T1
  • the data voltage Vdata is written to point N through the second transistor T2
  • the reset voltage is written to point S through the fourth transistor T4.
  • the driving transistor DTFT is in an on state.
  • the voltage at point G is Vref
  • the voltage at point S is Vinit
  • the voltage at point N is Vdata.
  • the first control signal line SCAN1 provides a high-level voltage signal
  • the second control signal line SCAN2 and the fourth control signal line SCAN4 provide a low-level voltage signal
  • the third control signal line SCAN3 provides a low-level voltage signal. Signal.
  • the first transistor T1 and the second transistor T2 are turned on, and the third transistor T3, the fourth transistor T4 and the fifth transistor T5 are turned off.
  • the driving transistor DTFT Since the first transistor T1 and the second transistor T2 are continuously turned on, the voltage at point G is maintained at Vref, and the voltage at point N is maintained at Vdata. At the same time, since the fourth transistor T4 is turned off, the driving transistor DTFT will output current to charge point S, and the voltage at point S will rise. When the voltage at point S is charged to Vref-Vth, the driving transistor DTFT will be turned off. That is, the acquisition of the threshold voltage of the driving transistor DTFT is completed.
  • the voltage at point G is Vref
  • the voltage at point S is Vref-Vth
  • the voltage at point N is Vdata
  • the voltage difference between the two ends of the capacitor C is the voltage at point N minus the voltage at point S, which is Vdata-Vref+ Vth.
  • the first control signal line SCAN1 provides a low-level voltage signal
  • the second control signal line SCAN2 and the fourth control signal line SCAN4 provide a high-level voltage signal
  • the third control signal line SCAN3 provides a low-level voltage signal .
  • the third transistor T3 and the fifth transistor T5 are turned on, and the first transistor T1, the second transistor T2 and the fourth transistor T4 are turned off.
  • the fifth transistor T5 Since the fifth transistor T5 is turned on, the voltage at point S will be charged to VSS', where VSS' is greater than VSS, and the magnitude of VSS' is the same as the second operating voltage VSS, the resistance of the signal line that transmits the second operating voltage, and the light-emitting device OLED The conduction pressure difference and other factors are related.
  • the voltages at the point G and the point N are equal, and the points G and N are both in a floating state.
  • the voltage at point S changes from Vref-Vth to VSS', under the bootstrap action of the capacitor C, the voltages at points G and N will be pulled up to Vdata+VSS'-Vref+Vth.
  • the voltage difference between point G and point S is always fixed at Vdata-Vref+Vth; that is, the threshold compensation circuit 3 to drive transistor DTFT
  • the control electrode provides the first control voltage and the second control voltage to the second electrode of the driving transistor DTFT, the voltage difference between the two is Vdata-Vref+Vth.
  • I is the driving current output by the driving transistor DTFT
  • K is a constant and is related to the channel aspect ratio and electron mobility of the driving transistor DTFT.
  • the driving current output by the driving transistor DTFT in the light-emitting phase t3 is only related to the data voltage Vdata and the reference voltage Vref, and has nothing to do with the threshold voltage, the first working voltage, and the second working voltage of the driving transistor DTFT.
  • the technical solution of the present disclosure can compensate the threshold voltage of the driving transistor, so that the driving current is not affected by the threshold voltage of the driving transistor, and eliminates the problem of uneven brightness of each pixel caused by uneven threshold voltage and drift of the driving transistor.
  • the technical solution of the present disclosure can also compensate the working voltage, so that the driving current is not affected by the working voltage, and the problem of uneven brightness of the overall display caused by the voltage drop of the working voltage is eliminated.
  • the light-emitting brightness of the light-emitting device can be controlled by adjusting the size of the reference voltage Vref. For the entire display device, by adjusting the size of the reference voltage Vref, the overall display brightness of the display device can be adjusted.
  • FIG. 4 is a schematic diagram of another circuit structure of the pixel circuit provided by the embodiment of the disclosure. As shown in FIG. 4, unlike the pixel circuit shown in FIG. 2, the reset circuit 4 in the embodiment shown in FIG. The first pole of the device OLED is connected to the second pole of the driving transistor DTFT through the light emission control circuit 5.
  • the second electrode of the fourth transistor T4 is directly connected to the second electrode of the fifth transistor T5 and the first electrode of the light emitting device OLED.
  • the third control signal line SCAN3 and the first control signal line SCAN1 may be the same control signal line.
  • FIG. 5 is a working timing diagram of the pixel circuit shown in FIG. 4. As shown in FIG. 5, the working process of the pixel circuit may include a reset preparation phase t1, a threshold compensation phase t2, and a light-emitting phase t3.
  • the first control signal line SCAN1 and the third control signal line SCAN3 provide a high level voltage signal
  • the second control signal line SCAN2 provides a low level voltage signal
  • the fourth control signal line SCAN4 provides a high level Voltage signal.
  • the first transistor T1, the second transistor T2, the fourth transistor T4, and the fifth transistor T5 are all turned on, and the third transistor T3 is turned off.
  • the reset voltage is written to the first electrode of the light emitting device OLED through the fourth transistor T4, and the reset voltage is written to the second electrode of the driving transistor DTFT through the fourth transistor T4 and the fifth transistor T5.
  • the second electrode of the driving transistor DTFT be reset, but also the first electrode of the light-emitting device OLED can be reset, which is beneficial to improve the contrast.
  • the reference voltage Vref is written to the point G through the first transistor T1
  • the data voltage Vdata is written to the point N through the second transistor T2
  • the driving transistor DTFT is in a conducting state.
  • the voltage at point G is Vref
  • the voltage at point S is Vinit
  • the voltage at point N is Vdata.
  • the first control signal line SCAN1 and the third control signal line SCAN3 provide a high-level voltage signal
  • the second control signal line SCAN2 provides a low-level voltage signal
  • the fourth control signal line SCAN4 provides a low-level voltage signal. Signal.
  • the first transistor T1, the second transistor T2, and the fourth transistor T4 are all turned on, and the third transistor T3 and the fifth transistor T5 are turned off.
  • the driving transistor DTFT Since the first transistor T1 and the second transistor T2 are continuously turned on, the voltage at point G is maintained at Vref, and the voltage at point N is maintained at Vdata. At the same time, since the fifth transistor T5 is turned off, the driving transistor DTFT will output current to charge point S, and the voltage at point S will rise. When the voltage at point S is charged to Vref-Vth, the driving transistor DTFT will be turned off. That is, the acquisition of the threshold voltage of the driving transistor DTFT is completed.
  • the voltage at point G is Vref
  • the voltage at point S is Vref-Vth
  • the voltage at point N is Vdata
  • the voltage difference between the two ends of the capacitor C is the voltage at point N minus the voltage at point S, which is Vdata-Vref+ Vth.
  • the first control signal line SCAN1 and the third control signal line SCAN3 provide a low-level voltage signal
  • the second control signal line SCAN2 provides a high-level voltage signal
  • the fourth control signal line SCAN4 provides a high-level voltage signal .
  • the third transistor T3 and the fifth transistor T5 are turned on, and the first transistor T1, the second transistor T2 and the fourth transistor T4 are all turned off.
  • the technical solution of the present disclosure can compensate the threshold voltage of the driving transistor, so that the driving current is not affected by the threshold voltage of the driving transistor, and eliminates the problem of uneven brightness of each pixel caused by uneven threshold voltage and drift of the driving transistor.
  • the technical solution of the present disclosure can also compensate the working voltage, so that the driving current is not affected by the working voltage, and the problem of uneven brightness of the overall display caused by the voltage drop of the working voltage is eliminated.
  • the light-emitting brightness of the light-emitting device can be controlled by adjusting the size of the reference voltage. For the entire display device, by adjusting the size of the reference voltage, the overall display brightness of the display device can be adjusted.
  • the case where all the transistors in the pixel circuit in the above embodiment are N-type transistors is only an implementation in the present disclosure, and the hysteresis performance of the N-type transistor is better than that of the P-type transistor.
  • using an N-type transistor as a driving transistor or a switching transistor can effectively improve the short-term afterimage of the display device.
  • FIG. 6 is a flowchart of a pixel driving method provided by an embodiment of the disclosure. As shown in FIG. 6, the pixel driving method is based on the pixel circuit provided in the foregoing embodiment. For a detailed description of the pixel circuit, please refer to the foregoing embodiment In the corresponding content.
  • the pixel driving method includes the following steps S1 to S3.
  • Step S1 In the reset preparation phase, the reference write circuit writes the reference voltage to the control electrode of the drive transistor, the data write circuit writes the data voltage to the threshold compensation circuit, and the reset circuit writes the reset voltage to the drive The second pole of the transistor.
  • Step S2 In the threshold compensation stage, the reference writing circuit writes the reference voltage to the control electrode of the driving transistor, the data writing circuit writes the data voltage to the threshold compensation circuit, and the threshold compensation circuit obtains the threshold voltage of the driving transistor.
  • Step S3 In the light-emitting phase, the threshold compensation circuit writes the first control voltage and the second control voltage to the control electrode of the driving transistor and the second electrode of the driving transistor respectively, and the driving transistor responds to the first control voltage and the second control voltage. Control and output the corresponding drive current to drive the light-emitting device to emit light.
  • the technical solution of the present disclosure can compensate the threshold voltage of the driving transistor, so that the driving current is not affected by the threshold voltage of the driving transistor, and eliminates the problem of uneven brightness of each pixel caused by uneven threshold voltage and drift of the driving transistor.
  • the technical solution of the present disclosure can also compensate the working voltage, so that the driving current is not affected by the working voltage, and the problem of uneven brightness of the overall display caused by the voltage drop of the working voltage is eliminated.
  • the light-emitting brightness of the light-emitting device can be controlled by adjusting the size of the reference voltage. For the entire display device, by adjusting the size of the reference voltage, the overall display brightness of the display device can be adjusted.
  • the embodiments of the present disclosure also provide a display substrate, which includes: the pixel circuit provided in any of the above-mentioned embodiments.
  • the embodiments of the present disclosure also provide a display device, which includes the display substrate as provided in the above-mentioned embodiments.
  • the display device may specifically be any product or component with a display function, such as a display panel, a mobile phone, a tablet computer, a television, a monitor, a notebook computer, a digital photo frame, and a navigator.
  • the display device may also include other indispensable components understood by those of ordinary skill in the art, which will not be repeated here, nor should it be used as a limitation to the present disclosure.

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Abstract

一种像素电路，包括：参考写入电路（1）、阈值补偿电路（3）、数据写入电路（2）、重置电路（4）和驱动晶体管；参考写入电路（1）配置为响应于第一控制信号线的控制将参考电压写入至驱动晶体管的控制极；数据写入电路（2）配置为响应于第一控制信号线的控制将数据电压写入至阈值补偿电路（3）；阈值补偿电路（3）配置为获取驱动晶体管的阈值电压，并响应于第二控制信号线的控制向驱动晶体管的控制极提供第一控制电压，以及向驱动晶体管的第二极提供第二控制电压，以对驱动晶体管进行阈值补偿；重置电路（4）配置为响应于第三控制信号线的控制将重置电压写入至像素电路；驱动晶体管的第一极与第一工作电压端电连接，驱动晶体管的第二极与发光器件的第一极电连接，配置为响应于第一控制电压和第二控制电压的控制驱动发光器件发光。

Description

像素电路、显示基板、显示面板和像素驱动方法
相关申请的交叉引用
本申请要求于2020年1月19日提交的中国专利申请No.202010057869.5的优先权，该中国专利申请的内容通过引用的方式整体合并于此。
技术领域
本公开涉及显示技术领域，特别涉及像素电路、显示基板、显示面板和像素驱动方法。
背景技术
有机发光二极管(Organic Light-emitting Diode)显示装置中的发光器件是由驱动晶体管在饱和状态下所产生的电流进行驱动发光的，但当前的OLED显示装置制造工艺难以保证驱动晶体管的阈值电压的均一性，并且在使用过程中驱动晶体管的阈值电压会发生不同程度的漂移，从而使得OLED显示装置产生各像素亮度不均匀的问题。
另外，工作电源所提供的工作电压受到压降(IR-Drop)的影响越大，这也会带来OLED显示装置整体发光亮度不均的问题。
发明内容
第一方面，本公开实施例提供了一种像素电路，包括：参考写入电路、阈值补偿电路、数据写入电路、重置电路和驱动晶体管；
其中，所述参考写入电路与参考电压端、第一控制信号线和所述驱动晶体管的控制极电连接，配置为响应于所述第一控制信号线的控制将所述参考电压端提供的参考电压写入至所述驱动晶体管的控制极；
所述数据写入电路与数据线、所述第一控制信号线和所述阈值补偿电路电连接，配置为响应于所述第一控制信号线的控制将所述数据线提供的数据电压写入至所述阈值补偿电路；
所述阈值补偿电路与第二控制信号线、所述驱动晶体管的控制极和所述驱动晶体管的第二极电连接，配置为获取所述驱动晶体管的阈值电压，并响应于所述第二控制信号线的控制向所述驱动晶体管的控制极提供第一控制电压，以及向所述驱动晶体管的第二极提供第二控制电压，以对驱动晶体管进行阈值补偿；
所述重置电路与重置电压端、第三控制信号线电连接，配置为响应于所述第三控制信号线的控制将所述重置电压端提供的重置电压写入至所述像素电路；
所述驱动晶体管的第一极与第一工作电压端电连接，第二极与发光器件的第一极电连接，配置为响应于所述第一控制电压和所述第二控制电压的控制，输出相应的驱动电流，以驱动所述发光器件发光。
在一些实施例中，所述第一控制电压与所述第二控制电压的差为Vdata-Vref+Vth，其中Vdata为所述数据电压，Vref为所述参考电压，Vth为所述驱动晶体管的阈值电压。
在一些实施例中，所述参考写入电路包括：第一晶体管；
所述第一晶体管的控制极与所述第一控制信号线电连接，所述第一晶体管的第一极与所述参考电压端电连接，所述第一晶体管的第二极与所述驱动晶体管的控制极电连接。
在一些实施例中，所述数据写入电路包括：第二晶体管；
所述第二晶体管的控制极与所述第一控制信号线电连接，所述第二晶体管的第一极与所述数据线电连接，所述第二晶体管的第二极与所述阈值补偿电路电连接。
在一些实施例中，所述阈值补偿电路包括：第三晶体管和电容；
所述第三晶体管的控制极与所述第二控制信号线电连接，所述第三晶体管的第一极与所述驱动晶体管的控制极电连接，所述第三晶体管的第二极与所述电容的第一端和所述数据写入电路电连接；
所述电容的第二端与所述驱动晶体管的第二极电连接。
在一些实施例中，所述重置电路包括：第四晶体管；
所述第四晶体管的控制极与所述第三控制信号线电连接，所述第四晶体管的第一极与所述重置电压端电连接，所述第四晶体管的第二极与所述驱动晶体管的第二极电连接。
在一些实施例中，所述重置电路包括：第四晶体管；
所述第四晶体管的控制极与所述第三控制信号线电连接，所述第四晶体管的第一极与所述重置电压端电连接，所述第四晶体管的第二极与所述发光器件的第一极电连接。
在一些实施例中，还包括：发光控制电路，所述驱动晶体管的第二极通过所述发光控制电路与所述发光器件的第一极电连接；
所述发光控制电路与所述第四控制信号线电连接，配置为响应于所述第四控制信号线的控制来控制所述驱动晶体管的第二极与所述发光器件的第一极之间的通断。
在一些实施例中，所述发光控制电路包括：
第五晶体管，所述第五晶体管的控制极与所述第四控制信号线电连接，所述第五晶体管的第一极与所述驱动晶体管的第二极电连接，所述第五晶体管的第二极与所述发光器件的第一极电连接。
在一些实施例中，所述第四控制信号线与所述第二控制信号线为同一条控制信号线。
在一些实施例中，所述第三控制信号线与所述第一控制信号线为同一控制信号线。
在一些实施例中，所述像素电路还包括发光控制电路，所述驱动晶体管的第二极通过所述发光控制电路与所述发光器件的第一极电连接，所述发光控制电路与第四控制信号线电连接，配置为响应于所述第四控制信号线的控制来控制所述驱动晶体管的第二极与所述发光器件的第一极之间的通断，其中，
所述参考写入电路包括第一晶体管，所述数据写入电路包括第二晶体管，所述阈值补偿电路包括第三晶体管和电容，所述重置电路包括第四晶体管，所述发光控制电路包括第五晶体管，
所述第一晶体管的控制极与所述第一控制信号线电连接，所述 第一晶体管的第一极与所述参考电压端电连接，所述第一晶体管的第二极与所述驱动晶体管的控制极电连接，
所述第二晶体管的控制极与所述第一控制信号线电连接，所述第二晶体管的第一极与所述数据线电连接，所述第二晶体管的第二极与所述第三晶体管的第二极、所述电容的第一端电连接，
所述第三晶体管的控制极与所述第二控制信号线电连接，所述第三晶体管的第一极与所述驱动晶体管的控制极电连接，所述第三晶体管的第二极与所述电容的第一端和所述第二晶体管的第二极电连接；
所述第四晶体管的控制极与所述第三控制信号线电连接，所述第四晶体管的第一极与所述重置电压端电连接，所述第四晶体管的第二极与所述驱动晶体管的第二极电连接，
所述第五晶体管的控制极与第四控制信号线电连接，所述第五晶体管的第一极与所述驱动晶体管的第二极和所述第四晶体管的第二极电连接，所述第五晶体管的第二极与所述发光器件的第一极电连接，
所述电容的第二端与所述驱动晶体管的第二极电连接。
在一些实施例中，所述像素电路还包括发光控制电路，所述驱动晶体管的第二极通过所述发光控制电路与所述发光器件的第一极电连接，所述发光控制电路与第四控制信号线电连接，配置为响应于所述第四控制信号线的控制来控制所述驱动晶体管的第二极与所述发光器件的第一极之间的通断，其中，
所述第一晶体管的控制极与所述第一控制信号线电连接，所述第一晶体管的第一极与所述参考电压端电连接，所述第一晶体管的第二极与所述驱动晶体管的控制极电连接，
所述第二晶体管的控制极与所述第一控制信号线电连接，所述第二晶体管的第一极与所述数据线电连接，所述第二晶体管的第二极与所述第三晶体管的第二极、所述电容的第一端电连接，
所述第三晶体管的控制极与所述第二控制信号线电连接，所述第三晶体管的第一极与所述驱动晶体管的控制极电连接，所述第三晶 体管的第二极与所述电容的第一端和所述第二晶体管的第二极电连接；
所述第四晶体管的控制极与所述第三控制信号线电连接，所述第四晶体管的第一极与所述重置电压端电连接，所述第四晶体管的第二极与所述发光器件的第一极电连接，
所述第五晶体管的控制极与第四控制信号线电连接，所述第五晶体管的第一极与所述驱动晶体管的第二极电连接，所述第五晶体管的第二极与所述第四晶体管的第二极和所述发光器件的第一极电连接，
所述电容的第二端与所述驱动晶体管的第二极电连接。
在一些实施例中，所述像素电路中的全部晶体管均为N型晶体管。
第二方面，本公开实施例还提供了一种显示基板，包括：如上述第一方面所提供像素电路。
第三方面，本公开实施例还提供了一种显示装置，包括：如上述第二方面所提供显示基板。
第四方面，本公开实施例还提供了一种像素驱动方法，用于驱动上述第一方面所提供像素电路，所述像素驱动方法包括：
在重置准备阶段，通过所述参考写入电路将所述参考电压写入至所述驱动晶体管的控制极，通过所述数据写入电路将所述数据电压写入至所述阈值补偿电路，通过所述重置电路将所述重置电压写入至所述像素电路；
在阈值补偿阶段，通过所述参考写入电路将所述参考电压写入至所述驱动晶体管的控制极，通过所述数据写入电路将所述数据电压写入至所述阈值补偿电路，通过所述阈值补偿电路获取所述驱动晶体管的阈值电压；
在发光阶段，通过所述阈值补偿电路分别向所述驱动晶体管的控制极和所述驱动晶体管的第二极写入所述第一控制电压和所述第二控制电压，所述驱动晶体管响应于所述第一控制电压和所述第二控制电压的控制输出相应的驱动电流，以驱动所述发光器件发光。
在一些实施例中，所述像素电路还包括发光控制电路，所述驱动晶体管的第二极通过所述发光控制电路与所述发光器件的第一极电连接，所述发光控制电路与第四控制信号线电连接，配置为响应于所述第四控制信号线的控制来控制所述驱动晶体管的第二极与所述发光器件的第一极之间的通断，所述像素驱动方法包括：
在重置准备阶段，第一控制信号线提供有效电平电压信号，第二控制信号线和第四控制信号线提供关断电平电压信号，第三控制信号线提供有效电平电压信号；
在阈值补偿阶段，第一控制信号线提供有效电平电压信号，第二控制信号线和第四控制信号线提供关断电平电压信号，第三控制信号线提供关断电平电压信号；
在发光阶段，第一控制信号线提供关断电平电压信号，第二控制信号线和第四控制信号线提供有效电平电压信号，第三控制信号线提供关断电平电压信号。
在一些实施例中，所述像素电路还包括发光控制电路，所述驱动晶体管的第二极通过所述发光控制电路与所述发光器件的第一极电连接，所述发光控制电路与第四控制信号线电连接，配置为响应于所述第四控制信号线的控制来控制所述驱动晶体管的第二极与所述发光器件的第一极之间的通断，所述像素驱动方法包括：
在重置准备阶段，第一控制信号线和第三控制信号线提供有效电平电压信号，第二控制信号线提供关断电平电压信号，第四控制信号线提供有效电平电压信号；
在阈值补偿阶段，第一控制信号线和第三控制信号线提供有效电平电压信号，第二控制信号线提供关断电平电压信号，第四控制信号线提供关断电平电压信号；
在发光阶段，第一控制信号线和第三控制信号线提供关断电平电压信号，第二控制信号线提供有效电平电压信号，第四控制信号线提供有效电平电压信号。
附图说明
图1为本公开实施例提供的像素电路的一种电路结构示意图；
图2为本公开实施例提供的像素电路的另一种电路结构示意图；
图3为图2所示像素电路的一种工作时序图；
图4为本公开实施例提供的像素电路的又一种电路结构示意图；
图5为图4所示像素电路的一种工作时序图；
图6为本公开实施例提供的一种像素驱动方法的流程图。
具体实施方式
为使本领域的技术人员更好地理解本公开的技术方案，下面结合附图对本公开提供的像素电路、显示基板、显示面板和像素驱动方法进行详细描述。
本公开实施例中的发光器件可以是现有技术中包括LED(Light Emitting Diode，发光二极管)或OLED(Organic Light Emitting Diode，有机发光二极管)在内的电流驱动型发光器件，在本实施例中是以发光器件为OLED为例进行的说明。
发光器件具有第一极和第二极，其中一者为阳极，另一者为阴极。在本公开实施例中是以发光器件的第一极为阳极，发光器件的第二极为阴极，进行示例性说明。
本公开实施例中的晶体管可以为薄膜晶体管或场效应晶体管或其他特性相同的开关器件。晶体管一般包括三个极：栅极、源极和漏极，晶体管中的源极和漏极在结构上是对称的，根据需要两者是可以互换的。在本公开实施例中，晶体管的控制极是指晶体管的栅极，晶体管的第一极和第二极中的一者为源极，另一者为漏极。
本公开的实施例中，术语“电连接”可以为直接电连接，也可以为间接电连接。
此外，按照晶体管特性，可将晶体管分为N型晶体管和P型晶体管；当晶体管为N型晶体管时，其导通电压(也称为，有效电平电压)为高电平电压，截止电压(也称为，关断电平电压)为低电平电压；当晶体管为P型晶体管时，其导通电压(也称为，有效电平电压)为低电平电压，截止电压(也称为，关断电平电压)为高电平电压。
在下面实施例中，将以各晶体管均为N型晶体管为例进行示例性说明，其不会对本公开的技术方案产生限制。
图1为本公开实施例提供的像素电路的一种电路结构示意图，如图1所示，该像素电路，包括：参考写入电路1、阈值补偿电路3、数据写入电路2、重置电路4和驱动晶体管DTFT。
参考写入电路1与参考电压端、第一控制信号线SCAN1和驱动晶体管DTFT的控制极电连接，参考写入电路1配置为响应于第一控制信号线SCAN1的控制将参考电压端提供的参考电压写入至驱动晶体管DTFT的控制极。
数据写入电路2与数据线DATA、第一控制信号线SCAN1和阈值补偿电路3电连接，数据写入电路2配置为响应于第一控制信号线SCAN1的控制将数据线DATA提供的数据电压写入至阈值补偿电路3。
阈值补偿电路3与第二控制信号线SCAN2、驱动晶体管DTFT的控制极和驱动晶体管DTFT的第二极电连接，阈值补偿电路3配置为获取驱动晶体管DTFT的阈值电压，并响应于第二控制信号线SCAN2的控制分别向驱动晶体管DTFT的控制极提供第一控制电压，以及向驱动晶体管DTFT的第二极提供第二控制电压，以对驱动晶体管进行阈值补偿。
重置电路4与重置电压端、第三控制信号线SCAN3电连接，配置为响应于第三控制信号线SCAN3的控制将重置电压端提供的重置电压写入至像素电路(例如，驱动晶体管DTFT的第二极)。
驱动晶体管DTFT的第一极与第一工作电压端电连接，驱动晶体管DTFT的第二极与发光器件OLED的第一极电连接，驱动晶体管DTFT配置为响应于第一控制电压和第二控制电压的控制，输出相应的驱动电流，以驱动发光器件OLED。
发光器件OLED的第二极与第二工作电压端电连接，发光器件OLED配置为接收驱动电流并进行发光。
在一些实施例中，为实现对驱动晶体管进行阈值补偿，可使得第一控制电压与第二控制电压的差为Vdata-Vref+Vth，其中Vdata为数据电压，Vref为参考电压，Vth为驱动晶体管DTFT的阈值电压； 需要说明的是，在该实施例中第一控制电压和第二控制电压的电压大小可变，但第一控制电压和第二控制电压的差值固定为Vdata-Vref+Vth。
下面将对本公开实施例提供的像素电路的工作过程进行详细描述。参考电压端提供的参考电压为Vref，数据线DATA提供的数据电压为Vdata，重置电压端提供的重置电压为Vinit，第一工作电压端提供的第一工作电压为VDD，第二工作电压端提供的第二工作电压为VSS。该像素电路的工作过程可包括重置准备阶段、阈值补偿阶段和发光阶段。
在重置准备阶段，参考写入电路1将参考电压写入至驱动晶体管DTFT的控制极，数据写入电路2将数据电压写入至阈值补偿电路3，重置电路4将重置电压写入至像素电路(例如，驱动晶体管DTFT的第二极)。即，在重置准备阶段结束时，G点电压为Vref，S点电压为Vinit，N点电压为Vdata。
为保障阈值补偿阶段的正常进行，需使得在重置准备阶段结束时驱动晶体管DTFT处于导通状态，此时Vref、Vinit和Vdata应满足如下关系：
Vinit＜Vref-Vth＜VDD。
此外，数据电压Vdata的取值区间与Vref相关，Vref设定的越大，则Vdata的最小取值越大。
在阈值补偿阶段，参考写入电路1持续向驱动晶体管DTFT的控制极写入参考电压，数据写入电路2持续向阈值补偿电路3写入数据电压，阈值补偿电路3获取驱动晶体管DTFT的阈值电压。
在阈值补偿阶段，通过驱动晶体管DTFT的放电过程，阈值补偿电路3来获取驱动晶体管DTFT的阈值电压。具体过程将在后续内容中进行详细描述。
在发光阶段，阈值补偿电路3分别向驱动晶体管DTFT的控制极和驱动晶体管DTFT的第二极写入第一控制电压和第二控制电压，驱动晶体管DTFT响应于第一控制电压和第二控制电压的控制输出相应的驱动电流，以驱动发光器件OLED发光。
在发光阶段，阈值补偿电路3分别向驱动晶体管DTFT的控制极和驱动晶体管DTFT写入第一控制电压和第二控制电压，其中第一控制电压与第二控制电压的差值为Vdata-Vref+Vth的电压信号。具体过程将在后续内容中进行详细描述。
在发光阶段，G点电压与S点电压的差值始终维持为Vdata-Vref+Vth，即驱动晶体管DTFT的栅源电压Vgs＝Vdata-Vref+Vth。
此时，根据驱动晶体管DTFT的饱和驱动电流公式可得：
I＝K*(Vgs-Vth) 2
＝K*(Vdata-Vref+Vth-Vth) 2
＝K*(Vdata-Vref) 2，
其中，I为驱动晶体管DTFT输出的驱动电流，K为一个常量且与驱动晶体管DTFT的沟道宽长比和电子迁移率相关。
通过上式可见，驱动晶体管DTFT在发光阶段所输出的驱动电流仅与数据电压Vdata、参考电压Vref相关，与驱动晶体管DTFT的阈值电压、第一工作电压以及第二工作电压均无关。
本公开的技术方案可对驱动晶体管DTFT的阈值电压进行补偿，使得驱动电流不受驱动晶体管DTFT的阈值电压影响，消除了由于驱动晶体管DTFT的阈值电压不均匀、漂移导致的各像素发光亮度不均的问题。与此同时，本公开的技术方案还可对工作电压进行补偿，使得驱动电流不受工作电压影响，消除了由于工作电压的压降所导致的整体显示亮度不均的问题。
另外，由于驱动晶体管DTFT在发光阶段所输出的驱动电流与参考电压Vref相关，因此通过调节参考电压Vref的大小，可以对发光器件OLED的发光亮度进行控制。对于整个显示装置而言，通过调节参考电压Vref的大小，可对显示装置的整体显示亮度进行调节。
在一些实施例中，该像素电路还可以配置有发光控制电路5；其中，驱动晶体管DTFT的第二极可通过发光控制电路5与发光器件OLED的第一极电连接；发光控制电路5与第四控制信号线SCAN4电连接，配置为响应于第四控制信号线SCAN4的控制来控制驱动晶体管 DTFT的第二极与发光器件OLED的第一极之间的通断。通过控制驱动晶体管DTFT的第二极与发光器件OLED的第一极之间的通断，可有效避免发光器件OLED在非发光阶段(即重置准备阶段和阈值补偿阶段)出现误发光。
需要说明的是，在本公开实施例中，重置电路4可以与驱动晶体管DTFT的第二极直接相连，或者重置电路4直接与发光器件OLED的第一极相连且通过发光控制电路5与驱动晶体管DTFT的第二极相连。该两种情况均属于本公开的保护范围，附图1中仅示例性给出了重置电路4与驱动晶体管DTFT的第二极直接相连的情况。
图2为本公开实施例提供的像素电路的另一种电路结构示意图，如图2所示，该像素电路为基于图1所示像素电路的一种具体化可选方案。
在一些实施例中，参考写入电路1包括：第一晶体管T1；第一晶体管T1的控制极与第一控制信号线SCAN1电连接，第一晶体管T1的第一极与参考电压端电连接，第一晶体管T1的第二极与驱动晶体管DTFT的控制极电连接。
在一些实施例中，数据写入电路2包括：第二晶体管T2；第二晶体管T2的控制极与第一控制信号线SCAN1电连接，第二晶体管T2的第一极与数据线DATA电连接，第二晶体管T2的第二极与阈值补偿电路3电连接。
在一些实施例中，阈值补偿电路3包括：第三晶体管T3和电容C；第三晶体管T3的控制极与第二控制信号线SCAN2电连接，第三晶体管T3的第一极与驱动晶体管DTFT的控制极电连接，第三晶体管T3的第二极与电容C的第一端和数据写入电路2电连接；电容C的第二端与驱动晶体管DTFT的第二极电连接。
在一些实施例中，重置电路4包括：第四晶体管T4；第四晶体管T4的控制极与第三控制信号线SCAN3电连接，第四晶体管T4的第一极与重置电压端电连接，第四晶体管T4的第二极与驱动晶体管DTFT的第二极电连接。
在一些实施例中，发光控制电路5包括：第五晶体管T5；第五 晶体管T5的控制极与第四控制信号线SCAN4电连接，第五晶体管T5的第一极与驱动晶体管DTFT的第二极和重置电路4电连接，第五晶体管T5的第二极与发光器件OLED的第一极电连接。
进一步地，第四控制信号线SCAN4与第二控制信号线SCAN2可以为同一条控制信号线。此时，可有效减小控制信号线的种类，降低对控制芯片的性能要求。
下面将结合附图来对图2所示像素电路的工作过程进行详细描述。第一晶体管T1至第五晶体管T5均作为开关晶体管来使用。
图3为图2所示像素电路的一种工作时序图，如图3所示，该像素电路的工作过程可包括重置准备阶段t1、阈值补偿阶段t2和发光阶段t3。
在重置准备阶段t1，第一控制信号线SCAN1提供高电平电压信号，第二控制信号线SCAN2和第四控制信号线SCAN4提供低电平电压信号，第三控制信号线SCAN3提供高电平电压信号。此时，第一晶体管T1、第二晶体管T2和第四晶体管T4导通，第三晶体管T3和第五晶体管T5截止。
参考电压Vref通过第一晶体管T1写入至G点，数据电压Vdata通过第二晶体管T2写入至N点，重置电压通过第四晶体管T4写入至S点。此时，驱动晶体管DTFT处于导通状态。
在重置准备阶段t1结束时，G点电压为Vref，S点电压为Vinit，N点电压为Vdata。
在阈值补偿阶段t2，第一控制信号线SCAN1提供高电平电压信号，第二控制信号线SCAN2和第四控制信号线SCAN4提供低电平电压信号，第三控制信号线SCAN3提供低电平电压信号。此时，第一晶体管T1、第二晶体管T2导通，第三晶体管T3、第四晶体管T4和第五晶体管T5截止。
由于第一晶体管T1和第二晶体管T2持续导通，因此G点电压维持于Vref，N点电压维持于Vdata。与此同时，由于第四晶体管T4截止，因此驱动晶体管DTFT会输出电流以对S点进行充电，S点的电压会上升，当S点的电压充电至Vref-Vth时，则驱动晶体管DTFT 截止，即完成对驱动晶体管DTFT的阈值电压的获取。
需要说明的是，在驱动晶体管DTFT输出电流对S点进行充电的过程中，由于第五晶体管T5截止，因此驱动晶体管DTFT输出的电流不会流至发光器件OLED，从而能避免发光器件OLED出现误发光的问题。
在阈值补偿阶段t2结束时，G点电压为Vref，S点电压为Vref-Vth，N点电压为Vdata；电容C两端的电压差为N点电压减去S点电压，即为Vdata-Vref+Vth。
在发光阶段t3，第一控制信号线SCAN1提供低电平电压信号，第二控制信号线SCAN2和第四控制信号线SCAN4提供高电平电压信号，第三控制信号线SCAN3提供低电平电压信号。此时，第三晶体管T3和第五晶体管T5导通，第一晶体管T1、第二晶体管T2和第四晶体管T4截止。
由于第五晶体管T5导通，则S点电压会被充电至VSS’，其中VSS’大于VSS，VSS’的大小与第二工作电压VSS、传输第二工作电压的信号线的电阻、发光器件OLED的导通压差等因素相关。
由于第一晶体管T1和第二晶体管T2均截止，且第三晶体管T3导通，因此G点和N点上电压相等，且G点和N点均处于浮接(floating)状态。在S点电压由Vref-Vth变化至VSS’的过程中，在电容C的自举作用下，G点和N点的电压会上拉至Vdata+VSS’-Vref+Vth。在整个上拉过程中，虽然G点和S点的电压均会发生变化，但G点电压和S点的电压差始终固定为Vdata-Vref+Vth；即，阈值补偿电路3向驱动晶体管DTFT的控制极提供第一控制电压以及向驱动晶体管DTFT的第二极提供第二控制电压，两者的电压差为Vdata-Vref+Vth。
最终，G点和N点的电压会稳定于Vdata+VSS’-Vref+Vth，S点电压会稳定于VSS’。
在发光阶段t3，G点电压与S点电压的差值始终维持为Vdata-Vref+Vth，即驱动晶体管DTFT的栅源电压Vgs＝Vdata-Vref+Vth。
此时，根据驱动晶体管DTFT的饱和驱动电流公式可得：
I＝K*(Vgs-Vth) 2
＝K*(Vdata-Vref+Vth-Vth) 2
＝K*(Vdata-Vref) 2，
其中，I为驱动晶体管DTFT输出的驱动电流，K为一个常量且与驱动晶体管DTFT的沟道宽长比和电子迁移率相关。
通过上式可见，驱动晶体管DTFT在发光阶段t3所输出的驱动电流仅与数据电压Vdata、参考电压Vref相关，与驱动晶体管DTFT的阈值电压、第一工作电压以及第二工作电压均无关。
本公开的技术方案可对驱动晶体管的阈值电压进行补偿，使得驱动电流不受驱动晶体管的阈值电压影响，消除了由于驱动晶体管的阈值电压不均匀、漂移导致的各像素发光亮度不均的问题。与此同时，本公开的技术方案还可对工作电压进行补偿，使得驱动电流不受工作电压影响，消除了由于工作电压的压降所导致的整体显示亮度不均的问题。
另外，由于驱动晶体管在发光阶段t3所输出的驱动电流与参考电压Vref相关，因此通过调节参考电压Vref的大小，可以对发光器件的发光亮度进行控制。对于整个显示装置而言，通过调节参考电压Vref的大小，可对显示装置的整体显示亮度进行调节。
图4为本公开实施例提供的像素电路的又一种电路结构示意图，如图4所示，与图2所示像素电路不同的是，图4所示实施例中重置电路4直接与发光器件OLED的第一极相连且通过发光控制电路5与驱动晶体管DTFT的第二极相连。
更具体地，第四晶体管T4的第二极与第五晶体管T5的第二极以及发光器件OLED的第一极直接相连。此时，第三控制信号线SCAN3与第一控制信号线SCAN1可以为同一控制信号线。
下面将结合附图来对图4所示像素电路的工作过程进行详细描述。
图5为图4所示像素电路的一种工作时序图，如图5所示，该像素电路的工作过程可包括重置准备阶段t1、阈值补偿阶段t2和发光阶段t3。
在重置准备阶段t1，第一控制信号线SCAN1和第三控制信号线SCAN3提供高电平电压信号，第二控制信号线SCAN2提供低电平电压信号，第四控制信号线SCAN4提供高电平电压信号。此时，第一晶体管T1、第二晶体管T2、第四晶体管T4和第五晶体管T5均导通，第三晶体管T3截止。
重置电压通过第四晶体管T4写入至发光器件OLED的第一极，重置电压通过第四晶体管T4、第五晶体管T5写入至驱动晶体管DTFT的第二极。在本实施例中，不仅可对驱动晶体管DTFT的第二极进行重置处理，也可以对发光器件OLED的第一极进行重置处理，有利于提升对比度。
参考电压Vref通过第一晶体管T1写入至G点，数据电压Vdata通过第二晶体管T2写入至N点，驱动晶体管DTFT处于导通状态。
在重置准备阶段t1结束时，G点电压为Vref，S点电压为Vinit，N点电压为Vdata。
在阈值补偿阶段t2，第一控制信号线SCAN1和第三控制信号线SCAN3提供高电平电压信号，第二控制信号线SCAN2提供低电平电压信号，第四控制信号线SCAN4提供低电平电压信号。此时，第一晶体管T1、第二晶体管T2和第四晶体管T4均导通，第三晶体管T3和第五晶体管T5截止。
由于第一晶体管T1和第二晶体管T2持续导通，因此G点电压维持于Vref，N点电压维持于Vdata。与此同时，由于第五晶体管T5截止，因此驱动晶体管DTFT会输出电流以对S点进行充电，S点的电压会上升，当S点的电压充电至Vref-Vth时，则驱动晶体管DTFT截止，即完成对驱动晶体管DTFT的阈值电压的获取。
需要说明的是，在驱动晶体管DTFT输出电流对S点进行充电的过程中，由于第五晶体管T5截止，因此驱动晶体管DTFT输出的电流不会流至发光器件OLED，从而能避免发光器件OLED出现误发光的问题。
在阈值补偿阶段t2结束时，G点电压为Vref，S点电压为Vref-Vth，N点电压为Vdata；电容C两端的电压差为N点电压减去 S点电压，即为Vdata-Vref+Vth。
在发光阶段t3，第一控制信号线SCAN1和第三控制信号线SCAN3提供低电平电压信号，第二控制信号线SCAN2提供高电平电压信号，第四控制信号线SCAN4提供高电平电压信号。此时，第三晶体管T3和第五晶体管T5导通，第一晶体管T1、第二晶体管T2和第四晶体管T4均截止。
具体过程可参见前述对图2所示像素电路处于发光阶段t3的具体描述，此处不再赘述。
本公开的技术方案可对驱动晶体管的阈值电压进行补偿，使得驱动电流不受驱动晶体管的阈值电压影响，消除了由于驱动晶体管的阈值电压不均匀、漂移导致的各像素发光亮度不均的问题。与此同时，本公开的技术方案还可对工作电压进行补偿，使得驱动电流不受工作电压影响，消除了由于工作电压的压降所导致的整体显示亮度不均的问题。
另外，由于驱动晶体管在发光阶段t3所输出的驱动电流与参考电压相关，因此通过调节参考电压的大小，可以对发光器件的发光亮度进行控制。对于整个显示装置而言，通过调节参考电压的大小，可对显示装置的整体显示亮度进行调节。
需要说明的是，上述实施例中像素电路中的全部晶体管均为N型晶体管的情况仅为本公开中的一种实施方案，N型晶体管的磁滞性能较P型晶体管的磁滞性能要更佳，故采用N型晶体管作为驱动晶体管或开关晶体管能够有效改善显示装置的短期残像。本领域技术人员应该知晓的是，将上述实施例中至少一个晶体管由N型晶体管变换为P型晶体管后，所得到新技术方案也应属于本公开的保护范围。
图6为本公开实施例提供的一种像素驱动方法的流程图，如图6所示，该像素驱动方法基于前述实施例所提供的像素电路，对应该像素电路的具体描述可参见前述实施例中相应内容。该像素驱动方法包括如下步骤S1至S3。
步骤S1、在重置准备阶段，参考写入电路将参考电压写入至驱动晶体管的控制极，数据写入电路将数据电压写入至阈值补偿电路， 重置电路将重置电压写入至驱动晶体管的第二极。
步骤S2、在阈值补偿阶段，参考写入电路将参考电压写入至驱动晶体管的控制极，数据写入电路将数据电压写入至阈值补偿电路，阈值补偿电路获取驱动晶体管的阈值电压。
步骤S3、在发光阶段，阈值补偿电路分别向驱动晶体管的控制极和驱动晶体管的第二极写入第一控制电压和第二控制电压，驱动晶体管响应于第一控制电压和第二控制电压的控制输出相应的驱动电流，以驱动发光器件发光。
对于上述各步骤的具体描述，可参见前述实施例中相应内容，此处不再赘述。
本公开的技术方案可对驱动晶体管的阈值电压进行补偿，使得驱动电流不受驱动晶体管的阈值电压影响，消除了由于驱动晶体管的阈值电压不均匀、漂移导致的各像素发光亮度不均的问题。与此同时，本公开的技术方案还可对工作电压进行补偿，使得驱动电流不受工作电压影响，消除了由于工作电压的压降所导致的整体显示亮度不均的问题。
另外，由于驱动晶体管在发光阶段所输出的驱动电流与参考电压相关，因此通过调节参考电压的大小，可以对发光器件的发光亮度进行控制。对于整个显示装置而言，通过调节参考电压的大小，可对显示装置的整体显示亮度进行调节。
本公开实施例还提供了一种显示基板，该显示基板包括：如上述任一实施例所提供的像素电路。
本公开实施例还提供了一种显示装置，该显示装置包括：如上述实施例所提供的显示基板。
本公开实施例所提供的显示装置具体可以为：显示面板、手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等具有显示功能的任何产品或部件。该显示装置还可包括本领域的普通技术人员理解的其它必不可少的组成部分，在此不做赘述，也不应作为对本公开的限制。
可以理解的是，以上实施例仅仅是为了说明本公开的原理而采用的示例性实施例，然而本公开并不局限于此。对于本领域内的普通技术人员而言，在不脱离本公开的精神和实质的情况下，可以做出各种变型和改进，这些变型和改进也视为落入本公开的保护范围。

Claims (19)

  1. 一种像素电路，包括：参考写入电路、阈值补偿电路、数据写入电路、重置电路和驱动晶体管；
    其中，所述参考写入电路与参考电压端、第一控制信号线和所述驱动晶体管的控制极电连接，配置为响应于所述第一控制信号线的控制将所述参考电压端提供的参考电压写入至所述驱动晶体管的控制极；
    所述数据写入电路与数据线、所述第一控制信号线和所述阈值补偿电路电连接，配置为响应于所述第一控制信号线的控制将所述数据线提供的数据电压写入至所述阈值补偿电路；
    所述阈值补偿电路与第二控制信号线、所述驱动晶体管的控制极和所述驱动晶体管的第二极电连接，配置为获取所述驱动晶体管的阈值电压，并响应于所述第二控制信号线的控制向所述驱动晶体管的控制极提供第一控制电压，以及向所述驱动晶体管的第二极提供第二控制电压，以对所述驱动晶体管进行阈值补偿；
    所述重置电路与重置电压端、第三控制信号线电连接，配置为响应于所述第三控制信号线的控制将所述重置电压端提供的重置电压写入至所述像素电路；
    所述驱动晶体管的第一极与第一工作电压端电连接，所述驱动晶体管的第二极与发光器件的第一极电连接，配置为响应于所述第一控制电压和所述第二控制电压的控制，输出相应的驱动电流，以驱动所述发光器件发光。
  2. 根据权利要求1所述的像素电路，其中，所述第一控制电压与所述第二控制电压的差为Vdata-Vref+Vth，其中Vdata为所述数据电压，Vref为所述参考电压，Vth为所述驱动晶体管的阈值电压。
  3. 根据权利要求1所述的像素电路，其中，所述参考写入电路包括：第一晶体管；
    所述第一晶体管的控制极与所述第一控制信号线电连接，所述第一晶体管的第一极与所述参考电压端电连接，所述第一晶体管的第二极与所述驱动晶体管的控制极电连接。
  4. 根据权利要求1所述的像素电路，其中，所述数据写入电路包括：第二晶体管；
    所述第二晶体管的控制极与所述第一控制信号线电连接，所述第二晶体管的第一极与所述数据线电连接，所述第二晶体管的第二极与所述阈值补偿电路电连接。
  5. 根据权利要求1所述的像素电路，其中，所述阈值补偿电路包括：第三晶体管和电容；
    所述第三晶体管的控制极与所述第二控制信号线电连接，所述第三晶体管的第一极与所述驱动晶体管的控制极电连接，所述第三晶体管的第二极与所述电容的第一端和所述数据写入电路电连接；
    所述电容的第二端与所述驱动晶体管的第二极电连接。
  6. 根据权利要求1所述的像素电路，其中，所述重置电路包括：第四晶体管；
    所述第四晶体管的控制极与所述第三控制信号线电连接，所述第四晶体管的第一极与所述重置电压端电连接，所述第四晶体管的第二极与所述驱动晶体管的第二极电连接。
  7. 根据权利要求1所述的像素电路，其中，所述重置电路包括：第四晶体管；
    所述第四晶体管的控制极与所述第三控制信号线电连接，所述第四晶体管的第一极与所述重置电压端电连接，所述第四晶体管的第二极与所述发光器件的第一极电连接。
  8. 根据权利要求1所述的像素电路，还包括：发光控制电路， 所述驱动晶体管的第二极通过所述发光控制电路与所述发光器件的第一极电连接；
    所述发光控制电路与第四控制信号线电连接，配置为响应于所述第四控制信号线的控制来控制所述驱动晶体管的第二极与所述发光器件的第一极之间的通断。
  9. 根据权利要求8所述的像素电路，其中，所述发光控制电路包括：
    第五晶体管，所述第五晶体管的控制极与所述第四控制信号线电连接，所述第五晶体管的第一极与所述驱动晶体管的第二极电连接，所述第五晶体管的第二极与所述发光器件的第一极电连接。
  10. 根据权利要求9所述的像素电路，其中，所述第四控制信号线与所述第二控制信号线为同一条控制信号线。
  11. 根据权利要求9所述的像素电路，其中，所述第三控制信号线与所述第一控制信号线为同一控制信号线。
  12. 根据权利要求1所述的像素电路，还包括发光控制电路，所述驱动晶体管的第二极通过所述发光控制电路与所述发光器件的第一极电连接，所述发光控制电路与第四控制信号线电连接，配置为响应于所述第四控制信号线的控制来控制所述驱动晶体管的第二极与所述发光器件的第一极之间的通断，其中，
    所述参考写入电路包括第一晶体管，所述数据写入电路包括第二晶体管，所述阈值补偿电路包括第三晶体管和电容，所述重置电路包括第四晶体管，所述发光控制电路包括第五晶体管，
    所述第一晶体管的控制极与所述第一控制信号线电连接，所述第一晶体管的第一极与所述参考电压端电连接，所述第一晶体管的第二极与所述驱动晶体管的控制极电连接，
    所述第二晶体管的控制极与所述第一控制信号线电连接，所述 第二晶体管的第一极与所述数据线电连接，所述第二晶体管的第二极与所述第三晶体管的第二极、所述电容的第一端电连接，
    所述第三晶体管的控制极与所述第二控制信号线电连接，所述第三晶体管的第一极与所述驱动晶体管的控制极电连接，所述第三晶体管的第二极与所述电容的第一端和所述第二晶体管的第二极电连接；
    所述第四晶体管的控制极与所述第三控制信号线电连接，所述第四晶体管的第一极与所述重置电压端电连接，所述第四晶体管的第二极与所述驱动晶体管的第二极电连接，
    所述第五晶体管的控制极与第四控制信号线电连接，所述第五晶体管的第一极与所述驱动晶体管的第二极和所述第四晶体管的第二极电连接，所述第五晶体管的第二极与所述发光器件的第一极电连接，
    所述电容的第二端与所述驱动晶体管的第二极电连接。
  13. 根据权利要求1所述的像素电路，还包括发光控制电路，所述驱动晶体管的第二极通过所述发光控制电路与所述发光器件的第一极电连接，所述发光控制电路与第四控制信号线电连接，配置为响应于所述第四控制信号线的控制来控制所述驱动晶体管的第二极与所述发光器件的第一极之间的通断，其中，
    所述第一晶体管的控制极与所述第一控制信号线电连接，所述第一晶体管的第一极与所述参考电压端电连接，所述第一晶体管的第二极与所述驱动晶体管的控制极电连接，
    所述第二晶体管的控制极与所述第一控制信号线电连接，所述第二晶体管的第一极与所述数据线电连接，所述第二晶体管的第二极与所述第三晶体管的第二极、所述电容的第一端电连接，
    所述第三晶体管的控制极与所述第二控制信号线电连接，所述第三晶体管的第一极与所述驱动晶体管的控制极电连接，所述第三晶体管的第二极与所述电容的第一端和所述第二晶体管的第二极电连接；
    所述第四晶体管的控制极与所述第三控制信号线电连接，所述第四晶体管的第一极与所述重置电压端电连接，所述第四晶体管的第二极与所述发光器件的第一极电连接，
    所述第五晶体管的控制极与第四控制信号线电连接，所述第五晶体管的第一极与所述驱动晶体管的第二极电连接，所述第五晶体管的第二极与所述第四晶体管的第二极和所述发光器件的第一极电连接，
    所述电容的第二端与所述驱动晶体管的第二极电连接。
  14. 根据权利要求1至13中任一项所述的像素电路，其中，所述像素电路中的全部晶体管均为N型晶体管。
  15. 一种显示基板，包括：如上述权利要求1至14中任一项所述的像素电路。
  16. 一种显示装置，包括：如上述权利要求15所述的显示基板。
  17. 一种像素驱动方法，用于驱动如上述权利要求1所述的像素电路，所述像素驱动方法包括：
    在重置准备阶段，通过参考写入电路将参考电压写入至驱动晶体管的控制极，通过数据写入电路将数据电压写入至阈值补偿电路，通过重置电路将重置电压写入至所述像素电路；
    在阈值补偿阶段，通过所述参考写入电路将所述参考电压写入至所述驱动晶体管的控制极，通过所述数据写入电路将所述数据电压写入至所述阈值补偿电路，通过所述阈值补偿电路获取所述驱动晶体管的阈值电压；
    在发光阶段，通过所述阈值补偿电路分别向所述驱动晶体管的控制极和所述驱动晶体管的第二极写入第一控制电压和第二控制电压，使得所述驱动晶体管响应于所述第一控制电压和所述第二控制电压的控制输出相应的驱动电流，以驱动发光器件发光。
  18. 根据权利要求17所述的像素驱动方法，其中，所述像素电路还包括发光控制电路，所述驱动晶体管的第二极通过所述发光控制电路与所述发光器件的第一极电连接，所述发光控制电路与第四控制信号线电连接，配置为响应于所述第四控制信号线的控制来控制所述驱动晶体管的第二极与所述发光器件的第一极之间的通断，所述像素驱动方法包括：
    在重置准备阶段，第一控制信号线提供有效电平电压信号，第二控制信号线和第四控制信号线提供关断电平电压信号，第三控制信号线提供有效电平电压信号；
    在阈值补偿阶段，第一控制信号线提供有效电平电压信号，第二控制信号线和第四控制信号线提供关断电平电压信号，第三控制信号线提供关断电平电压信号；
    在发光阶段，第一控制信号线提供关断电平电压信号，第二控制信号线和第四控制信号线提供有效电平电压信号，第三控制信号线提供关断电平电压信号。
  19. 根据权利要求17所述的像素驱动方法，其中，所述像素电路还包括发光控制电路，所述驱动晶体管的第二极通过所述发光控制电路与所述发光器件的第一极电连接，所述发光控制电路与第四控制信号线电连接，配置为响应于所述第四控制信号线的控制来控制所述驱动晶体管的第二极与所述发光器件的第一极之间的通断，所述像素驱动方法包括：
    在重置准备阶段，第一控制信号线和第三控制信号线提供有效电平电压信号，第二控制信号线提供关断电平电压信号，第四控制信号线提供有效电平电压信号；
    在阈值补偿阶段，第一控制信号线和第三控制信号线提供有效电平电压信号，第二控制信号线提供关断电平电压信号，第四控制信号线提供关断电平电压信号；
    在发光阶段，第一控制信号线和第三控制信号线提供关断电平 电压信号，第二控制信号线提供有效电平电压信号，第四控制信号线提供有效电平电压信号。
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