WO2021143140A1 - 一种射频开关电路和电路控制方法 - Google Patents

一种射频开关电路和电路控制方法 Download PDF

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Publication number
WO2021143140A1
WO2021143140A1 PCT/CN2020/111245 CN2020111245W WO2021143140A1 WO 2021143140 A1 WO2021143140 A1 WO 2021143140A1 CN 2020111245 W CN2020111245 W CN 2020111245W WO 2021143140 A1 WO2021143140 A1 WO 2021143140A1
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Prior art keywords
circuit
radio frequency
frequency switch
negative voltage
logic control
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PCT/CN2020/111245
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English (en)
French (fr)
Inventor
苏强
张鑫
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广州慧智微电子有限公司
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Priority to US16/953,268 priority Critical patent/US11496130B2/en
Publication of WO2021143140A1 publication Critical patent/WO2021143140A1/zh

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors

Definitions

  • This application relates to wireless communication technology, and in particular to a radio frequency switch circuit and a circuit control method.
  • the radio frequency switch circuit can switch the working mode from the antenna (ANT) to the transmit path (TX) or the receive path (RX) according to actual needs.
  • the radio frequency switch circuit is Performances such as isolation, insertion loss, and harmonic suppression in the coverage frequency range have put forward high requirements.
  • embodiments of the present application provide a radio frequency switch circuit and a circuit control method, which can filter the influence of the radio frequency signal generated by the radio frequency switch through a notch network, reduce the interference of the radio frequency signal on the negative voltage generating circuit, and thereby Improve the insertion loss, isolation and harmonic suppression performance of radio frequency switching circuits.
  • the radio frequency switch circuit includes: a negative voltage generating circuit, a trap network, a logic control circuit, and a radio frequency switch switching circuit; wherein the logic control circuit is configured to operate at the negative voltage Driven by the negative pressure signal generated by the generating circuit, controlling the working mode of the radio frequency switch circuit;
  • the trap network is connected between the negative voltage generating circuit and the logic control circuit.
  • the trap network includes a first LC series resonant tank, and the resonance point of the first LC series resonant tank is set according to the fundamental operating frequency of the radio frequency switching circuit;
  • One end of the first LC series resonant circuit is connected to the common node between the negative voltage generating circuit and the logic control circuit, and the other end is grounded.
  • the resonance point of the first LC series resonant tank is equal to the fundamental operating frequency of the radio frequency switching circuit.
  • the trap network includes a first LC parallel resonant tank, and the resonance point of the first LC parallel resonant tank is set according to the fundamental operating frequency of the radio frequency switching circuit;
  • One end of the first LC parallel resonant circuit is connected to the output end of the negative voltage generating circuit, and the other end is connected to the input end of the logic control circuit.
  • the resonance point of the first LC parallel resonant tank is equal to the fundamental operating frequency of the radio frequency switching circuit.
  • the notch network further includes a second LC series resonant tank to an Nth LC series resonant tank, and N is an integer greater than or equal to 2; when i is 2 to N, the i-th The resonance point of each LC series resonant tank is set according to the i-th harmonic frequency of the radio frequency switching circuit;
  • One end of the i-th LC series resonant circuit is connected to the common node between the negative voltage generating circuit and the logic control circuit, and the other end is grounded.
  • the resonance point of the i-th LC series resonant tank is equal to the i-th harmonic frequency of the radio frequency switching circuit.
  • the trap network further includes a second LC parallel resonant circuit to an M-th LC parallel resonant circuit, and M is an integer greater than or equal to 2; when i is 2 to M, the i-th The resonance point of each LC parallel resonant circuit is set according to the i-th harmonic frequency of the radio frequency switching circuit;
  • One end of the i th LC parallel resonant circuit is connected to the output end of the i-1 th LC parallel resonant circuit, and the other end is connected to the input end of the logic control circuit or the input of the i+1 th LC parallel resonant circuit end.
  • the resonance point of the i-th LC parallel resonant tank is equal to the i-th harmonic frequency of the radio frequency switching circuit.
  • the embodiment of the present application also provides a circuit control method, which is applied to a radio frequency switch circuit, the radio frequency switch circuit includes: a negative voltage generating circuit, a logic control circuit, and a radio frequency switch switching circuit; wherein, the method further includes:
  • the logic control circuit is driven by the negative voltage signal generated by the negative voltage generating circuit to control the working mode of the radio frequency switch circuit.
  • the trap network includes a first LC series resonant tank, and the resonance point of the first LC series resonant tank is set according to the fundamental operating frequency of the radio frequency switching circuit; One end of the first LC series resonant circuit is connected to the common node between the negative voltage generating circuit and the logic control circuit, and the other end is grounded.
  • the notch network further includes a second LC series resonant tank to an Nth LC series resonant tank, and N is an integer greater than or equal to 2; when i is 2 to N, the i-th The resonance point of each LC series resonant tank is set according to the i-th harmonic frequency of the radio frequency switching circuit;
  • One end of the i-th LC series resonant circuit is connected to the common node between the negative voltage generating circuit and the logic control circuit, and the other end is grounded.
  • the trap network includes a first LC parallel resonant tank, and the resonance point of the first LC parallel resonant tank is set according to the fundamental operating frequency of the radio frequency switching circuit; One end of the first LC parallel resonant circuit is connected to the output end of the negative voltage generating circuit, and the other end is connected to the input end of the logic control circuit.
  • the notch network further includes the second LC parallel resonant circuit to the M-th LC parallel resonant circuit, and M is an integer greater than or equal to 2; when i is 2 to M, the i-th The resonance point of the LC parallel resonance circuit is set according to the i-th harmonic frequency of the radio frequency switching circuit;
  • One end of the i th LC parallel resonant circuit is connected to the output end of the i-1 th LC parallel resonant circuit, and the other end is connected to the input end of the logic control circuit or the input of the i+1 th LC parallel resonant circuit end.
  • the embodiments of the present application provide a radio frequency switch circuit and a circuit control method.
  • the radio frequency switch circuit includes: a negative voltage generating circuit, a trap network, a logic control circuit, and a radio frequency switch switching circuit; wherein the logic control circuit is configured as Driven by the negative pressure signal generated by the negative pressure generating circuit, the operating mode of the radio frequency switch switching circuit is controlled; the trap network is connected between the negative pressure generating circuit and the logic control circuit.
  • Figure 1 is a schematic diagram of the functional composition of the radio frequency switch circuit in the radio frequency front-end system in the related art
  • Figure 2 is a schematic diagram of a structure of a radio frequency switch circuit in the related art
  • Fig. 3a is a first schematic diagram of the bias voltage at the output terminal of the negative voltage generating circuit in the related art
  • 3b is a second schematic diagram of the bias voltage at the output terminal of the negative voltage generating circuit in the related art
  • FIG. 4 is a schematic diagram of a radio frequency switch circuit according to an embodiment of the application.
  • Fig. 5 is a first schematic diagram of a notch network structure according to an embodiment of the application.
  • FIG. 6 is a second schematic diagram of a notch network structure according to an embodiment of the application.
  • FIG. 7 is a schematic structural diagram of a radio frequency switch circuit provided by an embodiment of the application.
  • FIG. 8 is a circuit structure diagram of a radio frequency switch circuit capable of using a trap network according to an embodiment of the application.
  • FIG. 9 is a circuit structure diagram of another radio frequency switch circuit capable of using a trap network provided by an embodiment of the application.
  • the radio frequency switch is one of the control devices used to control the radio frequency signal transmission path and signal size. It has a wide range of applications in many fields such as wireless communication, electronic countermeasures, radar systems, and electronic measuring instruments.
  • FIG. 1 is a schematic diagram of the functional composition of the radio frequency switch circuit in the radio frequency front-end system in the related art.
  • Figure 1 shows the transmitter (TX), the receiver (RX), the power amplifier (PA), and the low noise amplifier (Low noise amplifier).
  • LNA Noise Amplifier
  • TX is connected to PA and matching network in turn, RX is connected to LNA and filter network in turn, one end of the radio frequency switch is selectively connected to the output end of the matching network or the input end of the filter network, and the other end of the radio frequency switch is connected to ANT.
  • the radio frequency switch circuit switches from ANT to TX or RX according to actual needs.
  • the radio frequency switch circuit has different frequency ranges according to the frequency band where the connection path is located. Therefore, in order to ensure the transmission quality of the signal during the working process, the radio frequency switch circuit has isolation, insertion loss and harmonics in the frequency band covered by it. Performance such as suppression has very high requirements.
  • FIG. 2 is a schematic structural diagram of a radio frequency switch circuit in the related art.
  • the specific implementation structure of the radio frequency switch circuit in the related art may include: a negative voltage generating circuit (NVG), a logic control circuit, and a radio frequency switch switching circuit RF_S ;
  • NVG negative voltage generating circuit
  • RF_S radio frequency switch switching circuit
  • NVG is connected between the DC power supply VDD1 and the ground node
  • the input signal NVG_OUT of its output terminal is input to the logic control circuit
  • the power terminal of the logic control circuit is connected to the DC power supply VDD2
  • the input terminal of the logic control circuit is connected to the control signal Ctrl_In
  • the signal Ctrl_OUT output by the logic control circuit is input to the radio frequency switch circuit
  • the radio frequency switch circuit includes a series branch, wherein the series branch is composed of N MOS transistors M 1 ⁇ M n , among the N MOS transistors M 1 ⁇ M n ,
  • the drain of the i-th MOS transistor is connected to the source of the i-1th MOS transistor, and the source of the i-th MOS transistor is connected to the i+1th The drain of the MOS tube, where i is an integer greater than or equal to 2 and less than N.
  • the radio frequency switch circuit is implemented by a MOS tube.
  • the MOS tube is a silicon transistor (Silicon-On-Insulator MOSFET, SOI MOS tube), which refers to a field effect transistor with a silicon transistor structure on an insulator.
  • the output signal Ctrl_OUT of the logic control circuit is used to drive the gate of the MOS tube.
  • radio frequency signals including radio frequency Voltage and radio frequency current
  • the first path 1 represents the leakage of the radio frequency signal caused by the radio frequency switch circuit through the logic control circuit.
  • the leakage refers to It is the large swing of the radio frequency signal passing through the MOS tube that will be transmitted to the negative voltage generating circuit through the logic control circuit, and in turn, will affect the voltage at the output terminal of the negative voltage generating circuit; specifically: when the output terminal of the negative voltage generating circuit is relatively large After a large RF signal amplitude, it will cause the DC operating point of the negative voltage generating circuit to drift, and the direct result is that the output terminal voltage of the negative voltage generating circuit shifts.
  • FIG. 3a is the first schematic diagram of the bias voltage at the output terminal of the negative voltage generating circuit in the related art
  • FIG. 3b is the schematic diagram II of the bias voltage at the output terminal of the negative voltage generating circuit in the related art, in which, in FIGS. 3a and 3b
  • the horizontal axis represents time t
  • the vertical axis represents the voltage value at the output terminal of the negative pressure generating circuit, in V.
  • the second path 2 represents the influence of spatial coupling.
  • the related technology increases the distance between the negative voltage generating circuit and the RF switch switching circuit on the layout, and connects the ground wire of the analog circuit such as the negative voltage generating circuit and the RF switch.
  • the ground wires of the switching circuit are separated to reduce the RF signal coupling through a common ground wire.
  • these methods will undoubtedly increase the area, limit the layout of the layout, and cannot completely reduce the interference of the RF signal.
  • both of the above-mentioned two paths will cause the radio frequency signal in the radio frequency switch to interfere with the negative voltage generating circuit, which in turn causes the performance of the radio frequency switch circuit to deteriorate.
  • the radio frequency switch circuit includes: a negative voltage generating circuit, a trap network, a logic control circuit, and a radio frequency switch switching circuit; wherein, the logic control circuit It is configured to control the working mode of the radio frequency switch circuit under the driving of the negative pressure signal generated by the negative pressure generating circuit; the trap network is connected between the negative pressure generating circuit and the logic control circuit. It can be seen that a notch network is added between the negative pressure generating circuit and the logic control circuit. In this way, the notch network can filter the influence of the radio frequency signal in the radio frequency switch circuit, reduce the interference of the radio frequency signal on the negative pressure generating circuit, and improve the radio frequency. The insertion loss, isolation and harmonic suppression of the switching circuit.
  • the performance of the radio frequency switching circuit also includes switching time, on-state resistance (RON), and off-state capacitance (COFF). Performance will be improved.
  • Fig. 4 is a schematic diagram of the radio frequency switch circuit of the embodiment of the application.
  • the radio frequency switch circuit includes: a negative voltage generating circuit 401, a trap network 402, a logic control circuit 403, and a radio frequency switch switching circuit 404;
  • the logic control circuit 403 is configured to control the working mode of the radio frequency switch circuit 404 under the driving of the negative pressure signal generated by the negative pressure generating circuit;
  • the trap network 402 is connected between the negative voltage generating circuit 401 and the logic control circuit 403.
  • the negative voltage generating circuit provides a negative voltage bias for the logic control circuit, wherein the magnitude of the negative voltage bias is set according to actual application conditions, such as -2.5V, which is not limited in the embodiment of the present application.
  • the notch network can attenuate the signal of a certain frequency to a certain extent.
  • the notch network is usually used in the circuit to filter out unwanted frequency signals, and the resonant frequency set by the notch network is to be filtered. Divide the frequency of the signal; in order to make the signal of a specific frequency attenuation large enough, the usual approach is to select the order high enough to achieve a large attenuation.
  • the trap network includes a first LC series resonant circuit, and the resonance point of the first LC series resonant circuit is set according to the fundamental operating frequency of the radio frequency switching circuit; one end of the first LC series resonant circuit Connect the common node between the negative voltage generating circuit and the logic control circuit, and the other end is grounded.
  • the resonance point of the first LC series resonant tank is equal to the fundamental operating frequency of the radio frequency switching circuit.
  • the trap network includes a first LC parallel resonant circuit.
  • the resonance point of the first LC parallel resonant circuit is set according to the fundamental operating frequency of the radio frequency switching circuit; one end of the first LC parallel resonant circuit Connect the output end of the negative pressure generating circuit, and connect the other end to the input end of the logic control circuit.
  • the resonance point of the first LC parallel resonant tank is equal to the fundamental operating frequency of the radio frequency switching circuit.
  • the first resonant circuit in the trap network can be an LC series resonant circuit or an LC parallel resonant circuit, which is not limited in the embodiment of the present application.
  • setting the resonance point of the first resonant circuit to the fundamental operating frequency of the radio frequency switch can limit the bias voltage of the negative voltage output terminal, that is, effectively reduce the negative voltage generating circuit output terminal voltage that is affected by the radio frequency in the radio frequency switch switching circuit.
  • the influence of the larger swing of the signal improves the performance of the radio frequency switching circuit.
  • the notch network also includes the second LC series resonant tank to the Nth LC series resonant tank, where N is an integer greater than or equal to 2; when i is 2 to N, the value of the i-th LC series resonant tank
  • the resonance point is set according to the i-th harmonic frequency of the radio frequency switching circuit; one end of the i-th LC series resonant circuit is connected to the common node between the negative voltage generating circuit and the logic control circuit, and the other end is grounded.
  • the resonance point of the i-th LC series resonant tank is equal to the i-th harmonic frequency of the radio frequency switching circuit.
  • the notch network also includes the second LC parallel resonant circuit to the M-th LC parallel resonant circuit, where M is an integer greater than or equal to 2; when i is 2 to M, the value of the i-th LC parallel resonant circuit
  • the resonance point is set according to the i-th harmonic frequency of the radio frequency switching circuit; one end of the i-th LC parallel resonant circuit is connected to the output end of the i-1th LC parallel resonant circuit, and the other end is connected to the input end or the first end of the logic control circuit
  • the input terminal of i+1 LC parallel resonant tank is an integer greater than or equal to 2; when i is 2 to M, the value of the i-th LC parallel resonant circuit
  • the resonance point is set according to the i-th harmonic frequency of the radio frequency switching circuit; one end of the i-th LC parallel resonant circuit is connected to the output end of the i-1th LC parallel resonant
  • the resonance point of the i-th LC series resonant tank is equal to the i-th harmonic frequency of the radio frequency switching circuit.
  • the i-th resonant circuit in the trap network can be an LC series resonant circuit or an LC parallel resonant circuit, which is not limited in the embodiment of the present application.
  • the ith resonant tank may be an LC series resonant tank, and the (i+1)th resonant tank may be an LC parallel resonant tank, or the ith resonant tank may be an LC parallel resonant tank, and the (i+1)th resonant tank may be It is an LC series resonant circuit, which is not limited in the embodiment of the present application.
  • the notch network structure can be a series connection of a capacitor and an inductance, and then connect it in parallel to the notch network in the radio frequency switching circuit, or a parallel connection of the capacitor and the inductance, and then series connection to the notch network in the radio frequency switching circuit.
  • the radio frequency switch circuit of the embodiment of the present application is also applicable to other notch network structures, which is not limited.
  • the resonant point of the first resonant tank is set to the fundamental operating frequency of the radio frequency switching circuit
  • the resonant point of the second resonant tank is set to the second harmonic frequency of the radio frequency switch
  • the resonant point of the third resonant tank is set to the second harmonic frequency of the radio frequency switch.
  • the resonance point is set to the third harmonic frequency of the RF switch, and so on.
  • the resonance point of the resonant tank is set to a higher harmonic frequency.
  • the trap network can suppress the influence of the harmonics of the RF signal to ensure the generation of negative pressure The negative pressure at the output end of the circuit remains stable, which improves the performance of the radio frequency switch circuit.
  • the resonant point of the second resonant tank can be set to the fundamental operating frequency of the radio frequency switching circuit, and the resonant point of the third resonant tank can be set to the second harmonic frequency of the radio frequency switch, that is, for the resonant tank
  • the corresponding relationship between the harmonic frequencies is not limited in the embodiment of the present application.
  • the trap network is composed of n capacitors C 1 , C 2 ,..., C n and n inductances L 1 , L 2 ,..., L n , where C 1 and L 1 , C 2 and L 2 ,..., C n and L n are connected in series to form resonant circuits, and n is an integer greater than or equal to 1.
  • One end of each resonant circuit is connected to a common node between NVG and level shift units LevelShift_1 to LevelShift_M, and the other end is grounded.
  • FIG. 6 is a schematic diagram of the structure of the trap network according to the embodiment of the application.
  • the trap network is connected between the NVG and the logic control circuit.
  • the logic control circuit includes a parallel branch, wherein the parallel branch It is composed of M level shift units LevelShift_1 to LevelShift_M, where M is an integer greater than or equal to 1.
  • the trap network is composed of n capacitors C and n inductors L, where C and L are connected in parallel to form a resonant circuit, and n is an integer greater than or equal to 1; wherein, one end of the first resonant circuit is connected to a negative voltage generating circuit The other end is connected to the input end of the second resonant tank, one end of the nth resonant tank is connected to the output end of the n-1th resonant tank, and the other end is connected to the input end LevelShift_1 ⁇ LevelShift_M or the first The input end of n+1 LC parallel resonant tank.
  • the notch network shown in FIGS. 5 and 6 is only an example of the radio frequency switch circuit of the present application; according to the actual situation, the notch network structure of FIGS. 5 and 6 can be modified to change the inductance and capacitance.
  • the quantity can also be connected in series or in parallel with different inductors and capacitors according to actual application requirements, which is not limited in the embodiment of the present application.
  • the logic control circuit is composed of several level shift units, and each level shift unit generates a corresponding positive control voltage or a negative control voltage; wherein, the level shift units included in the logic control circuit can all generate positive control voltages or negative control voltages.
  • the control voltage or the negative control voltage can also generate part of the positive control voltage and part of the negative control voltage.
  • the specific situation of the positive and negative control voltage is determined according to the transmission or reception path that the radio frequency switch circuit needs to be turned on in the actual application. No restrictions.
  • the control voltage when the radio frequency switch circuit works in the signal transmission mode, the control voltage enables the radio frequency switch path from the ANT end of the radio frequency switch circuit to the transmitting end of the corresponding frequency band to open, and at the same time other radio frequency switch paths are disconnected; when the radio frequency switch circuit is working in receiving signals Mode, the control voltage makes the radio frequency switch path from the radio frequency switch circuit ANT end to the receiving end open, and at the same time other radio frequency switch paths are disconnected.
  • the logic control circuit is configured to control the working mode of the radio frequency switch circuit under the driving of the negative pressure signal generated by the negative pressure generating circuit.
  • the negative pressure signal is the bias negative voltage generated at the output of the negative pressure generating circuit.
  • the working modes of the radio frequency switch switching circuit include: sending signal mode and receiving signal mode.
  • the radio frequency switch switching circuit is controlled by a logic control circuit. Switching of working mode.
  • Fig. 7 is a schematic structural diagram of a radio frequency switch circuit provided by an embodiment of the application.
  • the radio frequency switch circuit includes: NVG, a trap network, M level shift units LevelShift_1 to LevelShift_M, and a radio frequency switch switching circuit RF_S , M is an integer greater than or equal to 1.
  • the negative voltage generating circuit is connected between the DC power supply NVDD and the ground node, and the input signal NVG_OUT at its output is transmitted to the M level shift units LevelShift_1 to LevelShift_M in the logic control circuit via the trap network, and M level shifts
  • the unit has M input signals CtrlIn_1 ⁇ CtrlIn_M and output signals CtrlOut_1 ⁇ CtrlOut_M; each level shift unit is connected between the DC power supply SVDD and the notch network, and its output signal is transmitted to the radio frequency switch circuit RF_S through the RC filter circuit.
  • the gates of N MOS transistors on a series branch.
  • the first level shift unit LevelShift_1 is connected to the R 1 C 11 filter circuit, and transmits the output signal CtrlOut_1 to the N MOS transistors M 1 ⁇ M n on the first series branch of the radio frequency switch circuit;
  • the R 1 C 11 filter circuit refers to a circuit composed of a resistor R1 and a capacitor C11.
  • the M-th level shift unit LevelShift_M is connected to the R M C 1M filter circuit, and transmits the output signal CtrlOut_M to the N MOS transistors M M1 to M Mn on the M-th series branch in the radio frequency switch switching circuit;
  • the R M C 1M filter circuit refers to a circuit composed of a resistor R M and a capacitor C 1M .
  • the radio frequency switch circuit RF_S includes M branches. Taking the first branch as an example, it includes a series branch.
  • the series branch is composed of N MOS transistors M 11 to M 1N .
  • One end of the series branch is connected to One TRX port is connected to the ANT port at the other end, and the gate of each MOS tube in the series branch is driven by the control voltage output by the same level shift unit.
  • the number N of MOS transistors connected in series on the M branches of the radio frequency switch circuit is determined by the actual application scenario, which is not limited in the embodiment of the present application.
  • M is an integer greater than or equal to 1
  • N is an integer greater than or equal to 1. .
  • the gates of the N MOS transistors on different series branches in the radio frequency switch circuit are driven by the output control voltages of different level shift units.
  • the first series branch M 11 to M 1N in the radio frequency switch circuit is driven by the control voltage CtrlOut_1 output by the first level shift unit LevelShift_1, and the second series branch M 21 in the radio frequency switch circuit ⁇ M 2N is driven by the control voltage CtrlOut_2 output by the second level shift unit LevelShift_2, and so on, the M-th branch in the radio frequency switch circuit is M M1 ⁇ M MN is output by the M-th level shift unit LevelShift_M Driven by the control voltage CtrlOut_M.
  • NVG when the radio frequency switch circuit works in the mode of sending or receiving signals, NVG generates a negative voltage to provide a negative voltage bias to each level shift unit, and each level shift unit generates a corresponding positive control voltage or negative control Voltages CtrlOut_1 to CtrlOut_M, where M is an integer greater than or equal to 1.
  • the negative voltage generating circuit is used to provide negative voltage bias to the level shift unit; the trap network is used to filter the influence of the radio frequency signal in the radio frequency switch circuit on the negative voltage generating circuit; each level shift unit, It is used to generate a control voltage according to the negative voltage bias provided by the negative voltage generating circuit to drive the radio frequency switch circuit to switch the working mode.
  • the notch network can filter the influence of the radio frequency signal on the negative pressure generating circuit generated by the radio frequency switch circuit, and reduce the effect of the radio frequency signal on the negative voltage generating circuit. Interference, thereby improving the insertion loss, isolation and harmonic suppression performance of the radio frequency switching circuit.
  • Fig. 8 is a circuit structure diagram of a radio frequency switch circuit that can use a trap network provided by an embodiment of the application. As shown in Fig. 8, in the radio frequency switch circuit, there are a total of M branches from the ANT end to the TRX end. Take the first branch as an example, which includes a series branch and a parallel branch.
  • the series branch of the N MOS transistors MA 11 ⁇ MA 1N composition the N MOS transistor in the MA 11 ⁇ MA 1N, ANT connected to the drain of the MOS transistor MA 11, MA 11 and the source 12 is connected to a drain of MA, MOS The drain of the tube MA 1N is connected to the source of the previous MOS tube, the source of MA 1N is connected to TRX, and the gate of each of the N MOS tubes MA 11 to MA 1N is connected to the signal GP 1 .
  • a parallel branch consisting of N MOS transistors MB 11 ⁇ MB 1N composition
  • MB source 11 is connected to MB 12 Drain
  • the drain of the MOS transistor MB 1N is connected to the source of the previous MOS transistor
  • the source of MB 1N is grounded
  • the gate of each of the N MOS transistors MB 11 to MB 1N is connected to the signal GN 1 .
  • the M-th branch is routed to N MOS transistors MA M1 to MA MN .
  • the drain of MOS transistor MA M1 is connected to ANT, and the drain of MA M1
  • the source is connected to the drain of MA M2
  • the drain of the MOS tube MA MN is connected to the source of the previous MOS tube
  • the source of MA MN is connected to TRX
  • the gate of each of the N MOS tubes MA M1 to MA MN access signal electrode GP M.
  • a parallel branch consisting of N MOS transistors MB M1 ⁇ MB MN composition the N MOS transistor MB M1 ⁇ MB MN, the drain of the MOS transistor MB M1 is connected to the source MA MN, MB M1 has a source connected to MB M2 Drain, the drain of the MOS transistor MB MN is connected to the source of the previous MOS transistor, the source of MB MN is grounded, and the gate of each of the N MOS transistors MB M1 to MB MN is connected to the signal GN M.
  • one end of the series branch in the radio frequency switch circuit is connected to a TRX interface, and the other end is connected to an ANT interface.
  • the parallel branch is composed of N MOS transistors MB 11 to MB 1N .
  • One end of the parallel branch is connected to the series branch.
  • the other end of the TRX interface is grounded.
  • the gate GP of the series branch MOS transistor and the gate GN of the parallel branch MOS transistor are driven by different output levels of the same level shift unit, and it is ensured that one is high level and the other is low level.
  • FIG. 9 is a circuit structure diagram of another radio frequency switch circuit that can use a trap network provided by an embodiment of the application. As shown in FIG. 9, there are a total of M branches from the ANT end to the TRX end in the radio frequency switch circuit. Take the first branch as an example, which includes a series branch and a parallel branch.
  • the series branch of the N MOS transistors MA 11 ⁇ MA 1N composition the N MOS transistor in the MA 11 ⁇ MA 1N, ANT connected to the drain of the MOS transistor MA 11, MA 11 and the source 12 is connected to a drain of MA, MOS The drain of the tube MA 1N is connected to the source of the previous MOS tube, the source of MA 1N is connected to TRX, and the gate and substrate of each of the N MOS tubes MA 11 to MA 1N are respectively connected to the signal GP 1 And BP 1 .
  • a parallel branch consisting of N MOS transistors MB 11 ⁇ MB 1N composition
  • MB source 11 is connected to MB 12 Drain
  • the drain of the MOS transistor MB 1N is connected to the source of the previous MOS transistor
  • the source of MB 1N is grounded
  • the gate and substrate of each MOS transistor of the N MOS transistors MB 11 to MB 1N are connected separately Signals GN 1 and BN 1 .
  • the M-th branch is routed to N MOS transistors MA M1 to MA MN .
  • the drain of MOS transistor MA M1 is connected to ANT, and the drain of MA M1
  • the source is connected to the drain of MA M2
  • the drain of the MOS tube MA MN is connected to the source of the previous MOS tube
  • the source of MA MN is connected to TRX
  • a parallel branch consisting of N MOS transistors MB M1 ⁇ MB MN composition the N MOS transistor MB M1 ⁇ MB MN, the drain of the MOS transistor MB M1 is connected to the source MA MN, MB M1 has a source connected to MB M2 Drain, the drain of the MOS transistor MB MN is connected to the source of the previous MOS transistor, the source of MB MN is grounded, and the gate and substrate of each MOS transistor of the N MOS transistors MBM 1 ⁇ MB MN are connected separately Signals GN M and BN M.
  • the parallel branch is composed of N MOS transistors MB 11 to MB 1N .
  • One end of the parallel branch is connected to the series branch.
  • the other end of the TRX interface is grounded.
  • the gate GP and substrate BP of the MOS tube in the series branch, and the gate GN and substrate BN of the MOS tube in the parallel branch are all driven by different output levels of the same level shift unit, and the series branch is guaranteed
  • the parallel branch is disconnected when the circuit is turned on, or the parallel branch is turned on when the series branch is disconnected.
  • circuit structure diagram of the radio frequency switch switching circuit proposed in the embodiment of the present application is not limited to the circuit structure described in FIGS. 7-9 above, and is also applicable to the circuit structure of other radio frequency switch switching circuits. No restrictions.

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  • Electronic Switches (AREA)

Abstract

一种射频开关电路和电路控制方法，所述射频开关电路包括：负压产生电路(401)、陷波网络(402)、逻辑控制电路(403)和射频开关切换电路(404)；其中，所述逻辑控制电路(403)配置为在所述负压产生电路(401)产生的负压信号的驱动下，控制所述射频开关切换电路(404)的工作模式；所述陷波网络(402)连接于所述负压产生电路(401)与所述逻辑控制电路(403)之间。如此，可以通过陷波网络(402)过滤射频开关切换电路(404)产生的射频信号的影响，降低射频信号对负压产生电路(401)的干扰，进而提高射频开关电路的插损、隔离度和谐波抑制等性能。

Description

一种射频开关电路和电路控制方法
本申请要求在2020年01月19日提交中国专利局、申请号为202010060699.6的中国专利申请的优先权，该申请的全部内容通过引用结合在本申请中。
技术领域
本申请涉及无线通信技术，尤其涉及一种射频开关电路和电路控制方法。
背景技术
随着第五代移动通信技术(5th-Generation，5G)的到来，移动通信的通信频段在不断增加的同时，通信频率的范围也越来越大，在射频前端系统中，不仅对多频多模的功率放大器提出更高的要求，提高射频开关电路的性能也成为一大挑战。射频开关电路能根据实际需求在天线(ANT)到发射通路(TX)或者接收通路(RX)之间进行工作模式切换，为了保证射频开关电路在工作过程中的信号传输质量，对射频开关电路所覆盖频段范围内的隔离度、插损和谐波抑制等性能提出了很高的要求。
发明内容
为改善射频开关电路的性能，本申请实施例提供一种射频开关电路和电路控制方法，可以通过陷波网络过滤射频开关产生的射频信号的影响，降低射频信号对负压产生电路的干扰，进而提高射频开关电路的插损、隔离度和谐波抑制等性能。
为达到上述目的，本申请实施例的技术方案是这样实现的：
本申请实施例提供一种射频开关电路，所述射频开关电路包括：负压产生电路、陷波网络、逻辑控制电路和射频开关切换电路；其中，所述逻辑控制电路配置为在所述负压产生电路产生的负压信号的驱动下，控制所述射频开关切换电路的工作模式；
所述陷波网络连接于所述负压产生电路与所述逻辑控制电路之间。
在本申请一些实施例中，所述陷波网络包括第1个LC串联谐振回路，所述第1个LC串联谐振回路的谐振点是根据所述射频开关电路的基频工作频率设置的；
所述第1个LC串联谐振回路的一端连接所述负压产生电路和所述逻辑控制电路之间的公共节点，另一端接地。
在本申请一些实施例中，所述第1个LC串联谐振回路的谐振点等于所述射频开关电路的基频工作频率。
在本申请一些实施例中，所述陷波网络包括第1个LC并联谐振回路，所述第1个LC并联谐振回路的谐振点是根据所述射频开关电路的基频工作频率设置的；
所述第1个LC并联谐振回路的一端连接所述负压产生电路的输出端，另一端连接所述逻辑控制电路的输入端。
在本申请一些实施例中，所述第1个LC并联谐振回路的谐振点等于所述射频开关电路的基频工作频率。
在本申请一些实施例中，所述陷波网络还包括第2个LC串联谐振回路至第N个LC串联谐振回路，N为大于或等于2的整数；在i取2至N时，第i个LC串联谐振回路的谐振点是根据所述射频开关电路的i次谐波频率设置的；
所述第i个LC串联谐振回路的一端连接所述负压产生电路和所述逻辑控制电路之间的公共节点，另一端接地。
在本申请一些实施例中，在i取2至N时，所述第i个LC串联谐振回路的谐振点等于所述射频开关电路的第i次谐波频率。
在本申请一些实施例中，所述陷波网络还包括第2个LC并联谐振回路至第M个LC并联谐振回路，M为大于或等于2的整数；在i取2至M时，第i个LC并联谐振回路的谐振点是根据所述射频开关电路的i次谐波频率设置的；
所述第i个LC并联谐振回路的一端连接所述第i-1个LC并联谐振回路的输出端，另一端连接所述逻辑控制电路的输入端或第i+1个LC并联谐振回路的输入端。
在本申请一些实施例中，在i取2至M时，所述第i个LC并联谐振回路的谐振点等于所述射频开关电路的第i次谐波频率。
本申请实施例还提供一种电路控制方法，应用于射频开关电路中，所述射频开关电路包括：负压产生电路、逻辑控制电路和射频开关切换电路；其中，所述方法还包括：
在所述负压产生电路与所述逻辑控制电路之间设置陷波网络；
所述逻辑控制电路在所述负压产生电路产生的负压信号的驱动下，控制所述射频开关切换电路的工作模式。
在本申请一些实施例中，所述陷波网络包括第1个LC串联谐振回路，所述 第1个LC串联谐振回路的谐振点是根据所述射频开关电路的基频工作频率设置的；所述第1个LC串联谐振回路的一端连接所述负压产生电路和所述逻辑控制电路之间的公共节点，另一端接地。
在本申请一些实施例中，所述陷波网络还包括第2个LC串联谐振回路至第N个LC串联谐振回路，N为大于或等于2的整数；在i取2至N时，第i个LC串联谐振回路的谐振点是根据所述射频开关电路的i次谐波频率设置的；
所述第i个LC串联谐振回路的一端连接所述负压产生电路和所述逻辑控制电路之间的公共节点，另一端接地。
在本申请一些实施例中，所述陷波网络包括第1个LC并联谐振回路，所述第1个LC并联谐振回路的谐振点是根据所述射频开关电路的基频工作频率设置的；所述第1个LC并联谐振回路的一端连接所述负压产生电路的输出端，另一端连接所述逻辑控制电路的输入端。
在本申请一些实施例中，述陷波网络还包括第2个LC并联谐振回路至第M个LC并联谐振回路，M为大于或等于2的整数；在i取2至M时，第i个LC并联谐振回路的谐振点是根据所述射频开关电路的i次谐波频率设置的；
所述第i个LC并联谐振回路的一端连接所述第i-1个LC并联谐振回路的输出端，另一端连接所述逻辑控制电路的输入端或第i+1个LC并联谐振回路的输入端。
本申请实施例提供了一种射频开关电路和电路控制方法，所述射频开关电路包括：负压产生电路、陷波网络、逻辑控制电路和射频开关切换电路；其中，所述逻辑控制电路配置为在所述负压产生电路产生的负压信号的驱动下，控制所述射频开关切换电路的工作模式；所述陷波网络连接于所述负压产生电路与所述逻辑控制电路之间。如此，可以通过陷波网络过滤射频开关切换电路产生的射频信号的影响，降低射频信号对负压产生电路的干扰，进而提高射频开关电路的插损、隔离度和谐波抑制等性能。
附图说明
图1为相关技术中射频前端系统中射频开关电路功能组成的一个示意图；
图2为相关技术中射频开关电路的一个结构示意图；
图3a为相关技术中负压产生电路输出端的偏置电压的示意图一；
图3b为相关技术中负压产生电路输出端的偏置电压的示意图二；
图4为本申请实施例的射频开关电路的一个示意图；
图5为本申请实施例的陷波网络结构的示意图一；
图6为本申请实施例的陷波网络结构的示意图二；
图7为本申请实施例提供的一种射频开关电路的结构示意图；
图8为本申请实施例提供的一种可使用陷波网络的射频开关切换电路的电路结构图；
图9为本申请实施例提供的另一种可使用陷波网络的射频开关切换电路的电路结构图。
具体实施方式
以下结合附图及实施例，对本申请进行进一步详细说明。应当理解，此处所描述的具体实施例仅仅用以解释本申请，并不用于限定本申请。
射频开关是用于控制射频信号传输路径及信号大小的控制器件之一，在无线通信、电子对抗、雷达系统及电子测量仪器等许多领域有广泛用途。
图1为相关技术中射频前端系统中射频开关电路功能组成的一个示意图，图1示出了发射端(TX)、接收端(RX)、功率放大器(Power Amplifier，PA)、低噪放大器(Low Noise Amplifier，LNA)、匹配网络、滤波网络、射频开关和天线端(ANT)之间的具体连接关系；其中，TRX代表射频开关所连接的其它收发端口。
这里，TX依次与PA、匹配网络进行连接，RX依次与LNA、滤波网络进行连接，射频开关的一端选择性地连接匹配网络的输出端或滤波网络的输入端，射频开关的另一端连接ANT。
需要说明的是，射频开关电路根据实际需求在ANT到TX或者RX之间进行切换。这里，射频开关电路根据其连接通路所在的频段有不同的频率范围，因而，射频开关电路在工作过程中为了保证信号的传输质量，对其所覆盖频带范围内的隔离度、插损和谐波抑制等性能具有很高的要求。
图2为相关技术中射频开关电路的一个结构示意图，如图2所示，相关技术中射频开关电路的具体实现结构可以包括：负压产生电路(NVG)、逻辑控制电路以及射频开关切换电路RF_S；其中，NVG接在直流电源VDD1与地节点之间，其输出端的输入信号NVG_OUT输入至逻辑控制电路，逻辑控制电路的电源端连接直流电源VDD2，逻辑控制电路的输入端接入控制信号Ctrl_In，逻辑控制 电路输出的信号Ctrl_OUT输入至射频开关切换电路；射频开关切换电路包括一条串联支路，其中串联支路由N个MOS管M 1～M n组成，N个MOS管M 1～M n中，MOS管M 1的漏极连接ANT，M 1的源极连接M 2的漏极，MOS管M n的漏极与上一个MOS管的源极连接，M n的源极连接TRX，N个MOS管M 1～M n中每个MOS管的栅极接入信号Ctrl_OUT，串联支路的一端连接TRX端，另一端连接ANT端。
示例性地，在N个MOS管M 1～M n中，第i个MOS管的漏极连接第i-1个MOS管的源极，第i个MOS管的源极连接第i+1个MOS管的漏极，其中，i为大于或等于2小于N的整数。
示例性地，该射频开关电路采用MOS管实现，这里，MOS管为硅晶体管(Silicon-On-Insulator MOSFET，SOI MOS管)，指一种硅晶体管结构在绝缘体之上的场效应晶体管。
这里，逻辑控制电路的输出信号Ctrl_OUT用来驱动MOS管的栅极，然而，这种实现结构下，射频开关电路在工作时，在ANT、TRX及内部各端存在很大的射频信号(包括射频电压和射频电流)摆幅，其中，射频开关电路中的射频信号将通过两条路径传递到负压产生电路。
如图2所示，第一条路径和第二条路径用两条虚线进行表示，其中，第一条路径①表示射频信号由射频开关切换电路经逻辑控制电路引起的泄露，这里，泄露指的是通过MOS管的射频信号的较大摆幅会通过逻辑控制电路传递到负压产生电路，进而，对负压产生电路输出端的电压产生影响；具体地：当负压产生电路的输出端出现较大的射频信号幅度后，会导致负压产生电路直流工作点的漂移，其直接结果为负压产生电路的输出端电压发生偏移。
示例性地，图3a为相关技术中负压产生电路输出端的偏置电压的示意图一；图3b为相关技术中负压产生电路输出端的偏置电压的示意图二，其中，图3a与图3b中的横轴代表时间t，纵轴代表负压产生电路输出端的电压值，单位为V。
图3a中可以看出，实际应用中射频开关电路在理想情况下需要的负压为-2.5V，参见图3b，可以看出，当负压产生电路的输出端出现大的射频(Radio Frequency，RF)信号幅度后，负压产生电路输出端电压从原来的-2.5V偏移至-1.5V。即，由于射频开关电路中射频信号摆幅的影响，使得负压产生电路无法给电平转化电路提供合适的负压偏置，这里，电平转换电路包含在逻辑控制电路中；进而，导致射频开关切换电路中MOS管的控制信号发生偏移，最终造成射频开关电路的插损和隔离度等性能变差。
参照图2，第二条路径②表示空间耦合的影响，相关技术在版图上将负压产生电路与射频开关切换电路的距离拉大，并将负压产生电路等模拟电路的地线与射频开关切换电路的地线分开，从而减小射频信号通过共同的地线进行耦合，但是这些方法无疑会增大面积，使版图的布局受限，而且并不能完全降低射频信号的干扰。
显然，上述两种路径均会带来射频开关中射频信号对负压产生电路的干扰，进而，导致射频开关电路的性能变差。
针对以上技术的缺陷，本申请实施例提供了一种射频开关电路和电路控制方法，射频开关电路包括：负压产生电路、陷波网络、逻辑控制电路和射频开关切换电路；其中，逻辑控制电路配置为在负压产生电路产生的负压信号的驱动下，控制射频开关切换电路的工作模式；陷波网络连接于负压产生电路与逻辑控制电路之间。可见，在负压产生电路与逻辑控制电路之间加入陷波网络，如此，可以通过陷波网络过滤射频开关切换电路中射频信号的影响，降低射频信号对负压产生电路的干扰，进而提高射频开关电路的插损、隔离度和谐波抑制等性能。
需要说明的是，射频开关电路的性能除了插损、隔离度和谐波抑制之外，还包括开关时间、导通状态电阻(RON)和断开状态电容(COFF)，本申请实施例对这些性能都会有所改善。
基于上述记载的射频开关电路以及应用场景，提出以下实施例。
图4为本申请实施例的射频开关电路的一个示意图，如图4所示，该射频开关电路包括：负压产生电路401、陷波网络402、逻辑控制电路403和射频开关切换电路404；其中，逻辑控制电路403配置为在负压产生电路产生的负压信号的驱动下，控制射频开关切换电路404的工作模式；
陷波网络402连接于负压产生电路401与逻辑控制电路403之间。
这里，负压产生电路为逻辑控制电路提供负压偏置，其中，负压偏置的大小根据实际应用情况进行设置，例如-2.5V，本申请实施例不作限制。
示例性地，陷波网络能够对特定频率的信号进行一定程度上的衰减，陷波网络通常用在电路上为了滤除不需要的频率的信号，并且陷波网络所设置的谐振频率就是要滤除的频率的信号；为了能使特定频率的信号得到足够大的衰减，通常的做法就是把阶数选的足够高来达到很大强度的衰减。
本申请实施例中，陷波网络包括第1个LC串联谐振回路，第1个LC串联 谐振回路的谐振点是根据射频开关电路的基频工作频率设置的；第1个LC串联谐振回路的一端连接负压产生电路和逻辑控制电路之间的公共节点，另一端接地。
示例性地，第1个LC串联谐振回路的谐振点等于射频开关电路的基频工作频率。
本申请实施例中，陷波网络包括第1个LC并联谐振回路，第1个LC并联谐振回路的谐振点是根据射频开关电路的基频工作频率设置的；第1个LC并联谐振回路的一端连接负压产生电路的输出端，另一端连接逻辑控制电路的输入端。
示例性地，第1个LC并联谐振回路的谐振点等于射频开关电路的基频工作频率。
可以看出，陷波网络中第1谐振回路可以为LC串联谐振回路，也可以为LC并联谐振回路，本申请实施例不作限制。
示例性地，将第1谐振回路的谐振点设置成射频开关的基频工作频率，能够限制负压输出端的偏置电压，即，有效降低负压产生电路输出端电压受到射频开关切换电路中射频信号的较大摆幅的影响，改善射频开关电路的性能。
示例性地，陷波网络还包括第2个LC串联谐振回路至第N个LC串联谐振回路，N为大于或等于2的整数；在i取2至N时，第i个LC串联谐振回路的谐振点是根据射频开关电路的i次谐波频率设置的；第i个LC串联谐振回路的一端连接负压产生电路和逻辑控制电路之间的公共节点，另一端接地。
示例性地，在i取2至N时，所述第i个LC串联谐振回路的谐振点等于所述射频开关电路的第i次谐波频率。
示例性地，陷波网络还包括第2个LC并联谐振回路至第M个LC并联谐振回路，M为大于或等于2的整数；在i取2至M时，第i个LC并联谐振回路的谐振点是根据射频开关电路的i次谐波频率设置的；第i个LC并联谐振回路的一端连接第i-1个LC并联谐振回路的输出端，另一端连接逻辑控制电路的输入端或第i+1个LC并联谐振回路的输入端。
示例性地，在i取2至M时，所述第i个LC串联谐振回路的谐振点等于所述射频开关电路的第i次谐波频率。
可以看出，陷波网络中第i谐振回路可以为LC串联谐振回路，也可以为LC并联谐振回路，本申请实施例不作限制。
示例性地，第i谐振回路可以为LC串联谐振回路，第i+1个谐振回路可以为LC并联谐振回路，或者，第i谐振回路可以为LC并联谐振回路，第i+1个谐振回路可以为LC串联谐振回路，本申请实施例不作限制。
示例性地，陷波网络结构可以为电容和电感串联后，再并联到射频开关电路中的陷波网络，也可以为电容和电感并联后，再串接到射频开关电路中的陷波网络，本申请实施例的射频开关电路也适用于其它的陷波网络结构，对此不作限制。
示例性地，第1个谐振回路的谐振点设置成射频开关电路的基频工作频率，将第2个谐振回路的谐振点设置成射频开关的二次谐波频率、将第3个谐振回路的谐振点设置成射频开关的三次谐波频率、以此类推将谐振回路的谐振点设置成更高次的谐波频率，进而，陷波网络能够抑制射频信号谐波的影响，从而确保负压产生电路输出端的负压保持稳定，提高射频开关电路的性能。
示例性地，可以将第2个谐振回路的谐振点设置成射频开关电路的基频工作频率、将第3个谐振回路的谐振点设置成射频开关的二次谐波频率，即，对于谐振回路于谐波频率之间的对应关系，本申请实施例不作限制。
图5为本申请实施例的陷波网络结构的示意图一，如图5所示，该陷波网络连接于NVG与逻辑控制电路之间，这里，逻辑控制电路包括一条并联支路，其中并联支路由M个电平移位单元LevelShift_1～LevelShift_M组成，M为大于或等于1的整数。
该陷波网络由n个电容C 1，C 2，…，C n以及n个电感L 1，L 2，…，L n组成，其中，C 1与L 1，C 2与L 2，…，C n与L n分别串联成谐振回路，n为大于或等于1的整数；每个谐振回路的一端连接于NVG与电平移位单元LevelShift_1～LevelShift_M之间的公共节点，另一端接地。
图6为本申请实施例的陷波网络结构的示意图二，如图6所示，该陷波网络连接于NVG与逻辑控制电路之间，这里，逻辑控制电路包括一条并联支路，其中并联支路由M个电平移位单元LevelShift_1～LevelShift_M组成，M为大于或等于1的整数。
该陷波网络由n个电容C以及n个电感L组成，其中，C与L分别并联成谐振回路，n为大于或等于1的整数；其中，第一个谐振回路的一端连接负压产生电路的输出端，另一端连接第二个谐振回路的输入端，第n个谐振回路的一端连接第n-1个谐振回路的输出端，另一端连接电平移位单元的输入端 LevelShift_1～LevelShift_M或第n+1个LC并联谐振回路的输入端。
需要说明的是，图5与图6所示的陷波网络仅仅是本申请的射频开关电路的一个示例；根据实际情况，可以针对图5与图6的陷波网络结构，更改电感、电容的数量，也可以根据实际应用需求，将不同的电感和电容串联或并联，本申请实施例不作限制。
示例性地，逻辑控制电路是由若干个电平移位单元组成的，每个电平移位单元产生相应的正控制电压或者负控制电压；其中，逻辑控制电路包括的电平移位单元可以全产生正控制电压或者负控制电压，也可以产生部分正控制电压，部分负控制电压，具体的正负控制电压的情况根据实际应用中射频开关电路需要导通的发送或接收通路进行确定，本申请实施例不作限制。
示例性地，当射频开关电路工作在发送信号模式，控制电压使射频开关切换电路的ANT端到对应频段发送端的射频开关通路开启，同时其它射频开关通路断开；当射频开关电路工作在接收信号模式，控制电压使射频开关切换电路ANT端到接收端的射频开关通路开启，同时其它射频开关通路断开。
示例性地，逻辑控制电路配置为在负压产生电路产生的负压信号的驱动下，控制射频开关切换电路的工作模式。
这里，负压信号是负压产生电路输出端产生的偏置负压，射频开关切换电路的工作模式包括：发送信号模式与接收信号模式这两种，射频开关切换电路通过逻辑控制电路控制其进行工作模式的切换。
图7为本申请实施例提供的一种射频开关电路的结构示意图，如图7所示，射频开关电路包括：NVG、陷波网络、M个电平移位单元LevelShift_1～LevelShift_M和射频开关切换电路RF_S，M为大于或等于1的整数。
其中，负压产生电路的接在直流电源NVDD与地节点之间，其输出端的输入信号NVG_OUT经陷波网络传输至逻辑控制电路中的M个电平移位单元LevelShift_1～LevelShift_M，M个电平移位单元具有M个输入信号CtrlIn_1～CtrlIn_M和输出信号CtrlOut_1～CtrlOut_M；每个电平移位单元接在直流电源SVDD与陷波网络之间，其输出信号经RC滤波电路传输至射频开关切换电路RF_S中每条串联支路上N个MOS管的栅极。
示例性地，第一个电平移位单元LevelShift_1与R 1C 11滤波电路连接，将输出信号CtrlOut_1传输至射频开关切换电路中的第一条串联支路上N个MOS管M 1～M n中；这里，R 1C 11滤波电路指由电阻R1与电容C11组成的电路。
示例性地，第M个电平移位单元LevelShift_M与R MC 1M滤波电路连接，将输出信号CtrlOut_M传输至射频开关切换电路中的第M条串联支路上N个MOS管M M1～M Mn中；这里，R MC 1M滤波电路指由电阻R M与电容C 1M组成的电路。
这里，射频开关切换电路RF_S包括有M条支路，以第一条支路为例，其中包括一条串联支路，串联支路由N个MOS管M 11～M 1N组成，串联支路的一端接一个TRX端口，另一端连接ANT端口，串联支路中每个MOS管的栅极由同一个电平移位单元输出的控制电压驱动。
这里，射频开关切换电路中M条支路上具体串联的MOS管的个数N由实际应用场景确定，本申请实施例不作限制，M为大于或等于1的整数，N为大于或等于1的整数。
示例性地，射频开关切换电路中不同串联支路上的N个MOS管的栅极由不同的电平移位单元的输出控制电压驱动。
示例性地，射频开关切换电路中第一条串联支路M 11～M 1N由第一个电平移位单元LevelShift_1输出的控制电压CtrlOut_1进行驱动，射频开关切换电路中第二条串联支路M 21～M 2N由第二个电平移位单元LevelShift_2输出的控制电压CtrlOut_2进行驱动，以此类推至射频开关切换电路中第M条支路为M M1～M MN由第M个电平移位单元LevelShift_M输出的控制电压CtrlOut_M进行驱动。
示例性地，当射频开关电路工作在发送或者接收信号的模式时，NVG产生一个负电压给各个电平移位单元提供负的电压偏置，各个电平移位单元产生相应的正控制电压或者负控制电压CtrlOut_1～CtrlOut_M，这里，M为大于或等于1的整数。
可以看出，负压产生电路用于给电平移位单元提供负压偏置；陷波网络，用于过滤射频开关切换电路中射频信号对负压产生电路的影响；每个电平移位单元，用于根据负压产生电路提供的负压偏置产生控制电压驱动射频开关切换电路进行工作模式的切换。通过在负压产生电路与逻辑控制电路之间加入陷波网络，如此，可以通过陷波网络过滤射频开关切换电路产生中射频信号对负压产生电路的影响，降低射频信号对负压产生电路的干扰，进而提高射频开关电路的插损、隔离度和谐波抑制等性能。
为了能够更加体现本申请的目的，在本申请上述实施例的基础上，进行进一步的举例说明。
图8为本申请实施例提供的一种可使用陷波网络的射频开关切换电路的电 路结构图，如图8所示，射频开关切换电路中ANT端到TRX端一共有M条支路，以第一条支路为例，其中包括一条串联支路和一条并联支路。其中，串联支路由N个MOS管MA 11～MA 1N组成，N个MOS管MA 11～MA 1N中，MOS管MA 11的漏极连接ANT，MA 11的源极连接MA 12的漏极，MOS管MA 1N的漏极与上一个MOS管的源极连接，MA 1N的源极连接TRX，N个MOS管MA 11～MA 1N中每个MOS管的栅极接入信号GP 1。
其中，并联支路由N个MOS管MB 11～MB 1N组成，N个MOS管MB 11～MB 1N中，MOS管MB 11的漏极连接MA 1N的源极，MB 11的源极连接MB 12的漏极，MOS管MB 1N的漏极与上一个MOS管的源极连接，MB 1N的源极接地，N个MOS管MB 11～MB 1N中每个MOS管的栅极接入信号GN 1。
以第M条支路为例，其中包括一条串联支路和一条并联支路，其中，串联支路由N个MOS管MA M1～MA MN中，MOS管MA M1的漏极连接ANT，MA M1的源极连接MA M2的漏极，MOS管MA MN的漏极与上一个MOS管的源极连接，MA MN的源极连接TRX，N个MOS管MA M1～MA MN中每个MOS管的栅极接入信号GP M。
其中，并联支路由N个MOS管MB M1～MB MN组成，N个MOS管MB M1～MB MN中，MOS管MB M1的漏极连接MA MN的源极，MB M1的源极连接MB M2的漏极，MOS管MB MN的漏极与上一个MOS管的源极连接，MB MN的源极接地，N个MOS管MB M1～MB MN中每个MOS管的栅极接入信号GN M。
可以看出，射频开关切换电路中串联支路的一端接一个TRX接口，另一端接ANT接口，并联支路由N个MOS管MB 11～MB 1N组成，并联支路的一端与串联支路接相同的TRX接口，另一端接地。其中，串联支路MOS管的栅极GP和并联支路MOS管的栅极GN由同一个电平移位单元的不同输出电平驱动，且保证一个为高电平时另一个为低电平。
进一步，图9为本申请实施例提供的另一种可使用陷波网络的射频开关切换电路的电路结构图，如图9所示，射频开关切换电路中ANT端到TRX端一共有M条支路，以第一条支路为例，其中包括一条串联支路和一条并联支路。其中，串联支路由N个MOS管MA 11～MA 1N组成，N个MOS管MA 11～MA 1N中，MOS管MA 11的漏极连接ANT，MA 11的源极连接MA 12的漏极，MOS管MA 1N的漏极与上一个MOS管的源极连接，MA 1N的源极连接TRX，N个MOS管MA 11～MA 1N中每个MOS管的栅极和衬底分别接入信号GP 1和BP 1。
其中，并联支路由N个MOS管MB 11～MB 1N组成，N个MOS管MB 11～MB 1N中， MOS管MB 11的漏极连接MA 1N的源极，MB 11的源极连接MB 12的漏极，MOS管MB 1N的漏极与上一个MOS管的源极连接，MB 1N的源极接地，N个MOS管MB 11～MB 1N中每个MOS管的栅极和衬底分别接入信号GN 1和BN 1。
以第M条支路为例，其中包括一条串联支路和一条并联支路，其中，串联支路由N个MOS管MA M1～MA MN中，MOS管MA M1的漏极连接ANT，MA M1的源极连接MA M2的漏极，MOS管MA MN的漏极与上一个MOS管的源极连接，MA MN的源极连接TRX，N个MOS管MA M1～MA MN中每个MOS管的栅极和衬底分别接入信号GP M和BP M。
其中，并联支路由N个MOS管MB M1～MB MN组成，N个MOS管MB M1～MB MN中，MOS管MB M1的漏极连接MA MN的源极，MB M1的源极连接MB M2的漏极，MOS管MB MN的漏极与上一个MOS管的源极连接，MB MN的源极接地，N个MOS管MBM 1～MB MN中每个MOS管的栅极和衬底分别接入信号GN M和BN M。
可以看出，射频开关切换电路中串联支路的一端接一个TRX接口，另一端接ANT接口，并联支路由N个MOS管MB 11～MB 1N组成，并联支路的一端与串联支路接相同的TRX接口，另一端接地。其中，串联支路上MOS管的栅极GP和衬底BP，以及并联支路上MOS管的栅极GN和衬底BN，都由同一个电平移位单元的不同输出电平驱动，且保证串联支路导通时并联支路断开，或者串联支路断开时并联支路导通。
需要说明的是，本申请实施例中提出的射频开关切换电路的电路结构图不仅限于上述图7-图9所记载的电路结构，还适用于其它射频开关切换电路的电路结构，本申请实施例不作限制。

Claims (10)

  1. 一种射频开关电路，所述射频开关电路包括：负压产生电路、陷波网络、逻辑控制电路和射频开关切换电路；其中，所述逻辑控制电路配置为在所述负压产生电路产生的负压信号的驱动下，控制所述射频开关切换电路的工作模式；
    所述陷波网络连接于所述负压产生电路与所述逻辑控制电路之间。
  2. 根据权利要求1所述的电路，其中，所述陷波网络包括第1个LC串联谐振回路，所述第1个LC串联谐振回路的谐振点是根据所述射频开关电路的基频工作频率设置的；
    所述第1个LC串联谐振回路的一端连接所述负压产生电路和所述逻辑控制电路之间的公共节点，另一端接地。
  3. 根据权利要求2所述的电路，其中，所述第1个LC串联谐振回路的谐振点等于所述射频开关电路的基频工作频率。
  4. 根据权利要求1所述的电路，其中，所述陷波网络包括第1个LC并联谐振回路，所述第1个LC并联谐振回路的谐振点是根据所述射频开关电路的基频工作频率设置的；
    所述第1个LC并联谐振回路的一端连接所述负压产生电路的输出端，另一端连接所述逻辑控制电路的输入端。
  5. 根据权利要求4所述的电路，其中，所述第1个LC并联谐振回路的谐振点等于所述射频开关电路的基频工作频率。
  6. 根据权利要求2所述的电路，其中，所述陷波网络还包括第2个LC串联谐振回路至第N个LC串联谐振回路，N为大于或等于2的整数；在i取2至N时，第i个LC串联谐振回路的谐振点是根据所述射频开关电路的i次谐波频率设置的；
    所述第i个LC串联谐振回路的一端连接所述负压产生电路和所述逻辑控制电路之间的公共节点，另一端接地。
  7. 根据权利要求6所述的电路，其中，在i取2至N时，所述第i个LC串联谐振回路的谐振点等于所述射频开关电路的第i次谐波频率。
  8. 根据权利要求4所述的电路，其中，所述陷波网络还包括第2个LC并联谐振回路至第M个LC并联谐振回路，M为大于或等于2的整数；在i取2至M时，第i个LC并联谐振回路的谐振点是根据所述射频开关电路的i次谐波频率设置的；
    所述第i个LC并联谐振回路的一端连接所述第i-1个LC并联谐振回路的输出 端，另一端连接所述逻辑控制电路的输入端或第i+1个LC并联谐振回路的输入端。
  9. 根据权利要求8所述的电路，其中，在i取2至M时，所述第i个LC并联谐振回路的谐振点等于所述射频开关电路的第i次谐波频率。
  10. 一种电路控制方法，应用于射频开关电路中，所述射频开关电路包括：负压产生电路、逻辑控制电路和射频开关切换电路；其中，所述方法还包括：
    在所述负压产生电路与所述逻辑控制电路之间设置陷波网络；
    所述逻辑控制电路在所述负压产生电路产生的负压信号的驱动下，控制所述射频开关切换电路的工作模式。
PCT/CN2020/111245 2020-01-19 2020-08-26 一种射频开关电路和电路控制方法 WO2021143140A1 (zh)

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