Classifications

• • H—ELECTRICITY
  • H03—ELECTRONIC CIRCUITRY
  • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
  • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
  • H03M1/12—Analogue/digital converters
  • H03M1/34—Analogue value compared with reference values
  • H03M1/36—Analogue value compared with reference values simultaneously only, i.e. parallel type
  • H03M1/361—Analogue value compared with reference values simultaneously only, i.e. parallel type having a separate comparator and reference value for each quantisation level, i.e. full flash converter type
  • H03M1/362—Analogue value compared with reference values simultaneously only, i.e. parallel type having a separate comparator and reference value for each quantisation level, i.e. full flash converter type the reference values being generated by a resistive voltage divider
• • G—PHYSICS
  • G06—COMPUTING OR CALCULATING; COUNTING
  • G06F—ELECTRIC DIGITAL DATA PROCESSING
  • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
  • G06F13/38—Information transfer, e.g. on bus
  • G06F13/40—Bus structure
  • G06F13/4063—Device-to-bus coupling
  • G06F13/4068—Electrical coupling
• • H—ELECTRICITY
  • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
  • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
  • H02M1/00—Details of apparatus for conversion
  • H02M1/0003—Details of control, feedback or regulation circuits
  • H02M1/0025—Arrangements for modifying reference values, feedback values or error values in the control loop of a converter
• • H—ELECTRICITY
  • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
  • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
  • H02M3/00—Conversion of DC power input into DC power output
  • H02M3/02—Conversion of DC power input into DC power output without intermediate conversion into AC
  • H02M3/04—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters
  • H02M3/10—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
  • H02M3/145—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
  • H02M3/155—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
  • H02M3/156—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
• • H—ELECTRICITY
  • H03—ELECTRONIC CIRCUITRY
  • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
  • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
  • H03M1/12—Analogue/digital converters
  • H03M1/34—Analogue value compared with reference values
  • H03M1/38—Analogue value compared with reference values sequentially only, e.g. successive approximation type
  • H03M1/46—Analogue value compared with reference values sequentially only, e.g. successive approximation type with digital/analogue converter for supplying reference values to converter
• • H—ELECTRICITY
  • H03—ELECTRONIC CIRCUITRY
  • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
  • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
  • H03M1/66—Digital/analogue converters
  • H03M1/74—Simultaneous conversion
  • H03M1/76—Simultaneous conversion using switching tree
• • H—ELECTRICITY
  • H03—ELECTRONIC CIRCUITRY
  • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
  • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
  • H03M1/12—Analogue/digital converters
  • H03M1/1205—Multiplexed conversion systems

Definitions

• Some electrical components include a plurality of mode of operation, operational settings, or other characteristics that are programmable after the electrical component has been manufactured. These settings can sometimes be set by a consumer of the electrical components who implements the electrical components in a larger circuit, device, or system. As a number of available settings for electrical components grows, so too may a consumer desire for the electrical components to be simply and precisely programmed.
• the circuit include an input pin and an analog-to-digital converter (ADC) comprising an input terminal coupled to the input pin and an output terminal.
• ADC analog-to-digital converter
• the circuit further includes a logic circuit comprising an input terminal coupled to the output terminal of the ADC, a first output terminal, and a second output terminal.
• the circuit further includes a resistance circuit.
• the resistance circuit includes a resistor coupled between the input pin and a first node, a first switch coupled between the first node and a reference voltage pin, and a second switch coupled between the first node and a ground pin.
• the circuit is further configured to generate a second ADC control signal to control the ADC to determine a second voltage present at the input pin as changed according to the second value of resistance and determine the first value of resistance based at least partially on the voltage present at the input pin, the second voltage present at the input pin, a resistance of the resistance circuit, and a reference voltage.
• the system includes a programmable electrical component and a voltage divider.
• the programmable electrical component includes an input pin, a reference voltage pin, a ground pin, an ADC comprising an input terminal coupled to the input pin and an output terminal, a resistance circuit comprising an output terminal coupled to the input pin, a first input terminal, and a logic circuit.
• the logic circuit includes an input terminal coupled to the output terminal of the ADC and a first output terminal coupled to the first input terminal of the resistance circuit.
• the logic circuit is configured to generate a first ADC control signal to control the ADC to determine a voltage present at the input pin with a first value of resistance present at the input pin.
• a value of RTOP or RBOT may also be determined.
• One such approach involves forcing VREF through a buffer, where a current mirror mirrors an output current of the buffer to an internal resistor (RENT) contained in the electrical component.
• RENT internal resistor
• a voltage across RINT is measured to determine RBOT.
• this approach may be highly inaccurate. For example, percentage error in RBOT determination increases due to buffer offset that increases as the voltage present at the input terminal increases.
• the digital signal representative of the voltage present at the input terminal is referred to as a sensed voltage (VS), such as when RINT is coupled in parallel with RBOT or RTOP.
• the digital signal is provided to a digital core or other processing element.
• the digital core or processing element processes the digital code to generate one or more additional values.
• the digital core processes VP to generate VCODE and for use in determining VS.
• the digital code processes VS for use in determining RBOT, and correspondingly RCODE.
• the voltage present at the input terminal may vary due to resistor tolerance errors or other factors.
• the digital core utilizes fewer than all 11 bits (e.g., such as only a least significant 5 bits) of VP when generating VCODE for use in programming a setting of the digital core or another component or device.
• precision of the bits of VCODE with respect to VP is increased when using fewer than all bits of VP to generate VCODE for use in programming settings.
• the ADC then measures the voltage present at the input node to generate VS.
• the digital core processes VS, VP, VREF, and/or RINT to generate a digital code (RCODE) that represents RBOT.
• RINT has a value configured to cause VS to have a value nearer than VP to a value of VREF/2. Causing VS to have a value nearer than VP to a value of VREF/2 maximizes a resolution of detectable RBOT values.
• the digital core is programmed with particular settings that correspond to values of VCODE and RCODE.
• the electrical component 100 includes circuitry for providing VREF having a known value to the VREF pin 112.
• the circuitry for the electrical component 100 to generate and/or provide VREF at the VREF pin 112 may be implemented in multiple suitable architectures, the scope of which is not limited herein.
• the electrical component 100 does not include, but is configured to couple to, a voltage divider 120.
• the voltage divider 120 includes a resistor 122 and a resistor 124.
• the resistor 122 and the resistor 124 each are representative of any one or more coupled components that provide a measurable and/or defined amount of resistance.
• a resistance of the resistor 122 is referred to as RTOP and a resistance of the resistor 124 is referred to as RBOT.
• the electrical component 100 determines RCODE.
• RCODE is a digital value representation of RBOT.
• RCODE is a digital value representation of RTOP.
• the logic circuit 102 controls one of the switch 108 or the switch 110 to close and form an electrically conductive path across the respective switch 108 or the switch 110.
• the switch 108 and the switch 110 are normally-open devices, they are controlled to close when a signal received from the logic circuit 102 is asserted.
• the switch 108 or the switch 110 is configured to be closed when a signal received from the logic circuit 102 is de-asserted.
• a percentage error in RINT from the expected or ideal value is directly translated to a same percentage error in a detected or calculated RBOT, and therefore an error in RCODE. Accordingly, in at least some examples it is advantageous to determine and/or compensate for this variation.
• the electrical component 100 includes a calibration or test mode of operation. To enter the calibration mode of operation, the logic circuit 102 generates and outputs a control signal TEST EN having an asserted value.
• a same number of resistor and switch pairs are coupled between the input pin 114 and each of the VREF pin 112 and the GND pin 116. In other examples, a different number of resistor and switch pairs are coupled between the input pin 114 and one of the VREF pin 112 or the GND pin 116 than the other of the VREF pin 112 or the GND pin 116.
• a maximum decimal value of VCODE is 31.
• the logic circuit 102 controls one of the switch 210, the switch 212, the switch 214, or the switch 216 to close and a remainder of the switch 210, the switch 212, the switch 214, or the switch 216 to remain, or become, open.
• the logic circuit 102 controls the switch 210 to close (and the switches 212, 214, and 216 to be open), when the decimal value of VCODE is between 0 and 7, inclusive.
• the resistance circuit 300 includes a resistor 302 and a voltage source 304.
• the resistor 302 is coupled between an output terminal of the voltage source 304 and the input pin 114.
• the resistance circuit 300 further includes a switch coupled between the resistor 302 and the input pin 114.
• the voltage source 304 is, in some examples, a digital -to-analog converter (DAC). In other examples, the voltage source 304 is any component, circuit, or device capable of outputting a signal having a controllable value.
• the switch 306 closes to couple the resistor 302 and the voltage source 304 to the input pin 114 when RCODE is being determined by the logic circuit 102, as described elsewhere herein.
• the logic circuit 102 configures the electrical component 100 or another device according to the stored VCODE and the determined RCODE, where the values of VCODE and RCODE together uniquely correspond to a particular setting (or settings) of the electrical component 100 or another device being configured.
• the method 500 is, in some examples, a pinstrap detection method.
• the method 500 is implemented at least partially in, or by, the electrical component 100 (or components thereof) of FIG. 1. Accordingly, reference may be made to at least some components and/or signals of the electrical component 100 in describing the method 500.
• VCODE is computed.
• VCODE is computed by the logic circuit 102 by manipulating the digital code received from the ADC 104 (storing a portion of the digital code as VCODE). For example, when the ADC 104 outputs the digital code having 11 bits, in some implementations, only the least significant 5 bits of the digital code (or more generally, fewer than all 11 bits of the digital code) may be used in programming one or more settings despite all 11 bits being used in other calculations (such as in calculating RCODE).
• the logic circuit 102 after generating VCODE from VP, stores VCODE in a storage element. In at least some examples, the logic circuit 102 also stores the received VP on which VCODE is based.
• the storage element may be a register, a cache, or any other volatile or non volatile storage component or device.
• VCODE is a digital value precise to at least 5 bits.
• a control signal is generated.
• the control signal is generated by the logic circuit 102.
• the logic circuit 102 generates the control signal, in at least some implementations, based on a value of VCODE with respect to a threshold. For example, in one implementation of the operation 508 the logic circuit 102 determines whether VCODE is less than, or greater than, a threshold to generate the control signal. For example, when VCODE is less than the threshold, the logic circuit generates an asserted first control signal and a de-asserted second control signal. When VCODE is greater than the threshold, the logic circuit generates a de-asserted first control signal and an asserted second control signal.
• the threshold is a digital value representative of VREF/2.
• an internal resistor (e.g., the resistor 106) is coupled in parallel with a resistor of the voltage divider 120.
• the internal resistor is coupled in parallel with the resistor 122 between the VREF pin 112 and the input pin 114.
• the internal resistor is coupled in parallel with the resistor 124 between the input pin 114 and the GND pin 116.
• coupling the internal resistor in parallel with a resistor of the voltage divider 120 causes a voltage of a signal present at the input pin 114 to change to be closer in value to VREF/2 than the voltage of the signal present at the input pin 114 was at the operation 504.
• the input pin voltage is sampled to generate VS.
• the input pin voltage is sampled by controlling the ADC 104 to measure the input pin voltage and generate VS as a digital representation of the input pin voltage using a channel of the ADC 104 that is coupled to the input pin 114.
• the control is exerted by the logic circuit 102 outputting a channel select signal to the ADC 104 to cause the ADC 104 to sample the channel of the ADC 104 that is coupled to the input pin 114.
• Sampling the input pin voltage in at least some examples, is a hardware operation that causes the ADC 104 to generate VS based on an analog value present at the input pin 114.
• the generated digital code in at least some examples, is provided by the ADC 104 to the logic circuit 102 as one or more electrical impulses representing one or more digital bits.
• a resistance of a resistor of the voltage divider 120 is calculated.
• the resistance is of a bottom resistor of the voltage divider 120 (e.g., the resistor 124). In other examples, the resistance is of the resistor 122.
• the resistance of the resistor is determined according to the equation 1, as described above with respect to FIG. 1.
• the resistance of the resistor is determined according to the equation 2, also as described above with respect to FIG. 1. In at least some examples, the resistance of the resistor is determined by the logic circuit 102.
• the logic circuit 102 stores the resistance of the resistor in a storage element as RCODE.
• the storage element may be a register, a cache, or any other volatile or non-volatile storage component or device.
• RCODE is a digital value precise to at least 4 bits such that VCODE and RCODE together accurately provide at least 9 bits of programmability (e.g., at least 511 distinct values) to the electrical component 100.
• a device is programmed with a setting according to values of VCODE and RCODE.
• the logic circuit 102 may program itself, or another component of the electrical component 100 may be programmed (either by the logic circuit 102 or by another component), with a particular setting according to VCODE and RCODE.
• VCODE and RCODE may together provide for selecting from among at least 511 unique settings based on a ratio of resistance of a top resistor of the voltage divider to a bottom resistor of the voltage divider to control a value of VCODE and by controlling a value of resistance selected for RCODE.
• any one or more of the operations recited herein include one or more sub-operations (e.g., such as intermediary comparisons, logical operations, output selections such as via a multiplexer, format conversions, determinations, etc.). In some examples any one or more of the operations recited herein is omitted. In some examples any one or more of the operations recited herein is performed in an order other than that presented herein (e.g., in a reverse order, substantially simultaneously, overlapping, etc.). Each of these alternatives falls within the scope of this description.
• the terms “including” and “comprising” are used in an open-ended fashion, and thus should be interpreted to mean “including, but not limited to... ”
• the term “couple” is used throughout the specification. The term may cover connections, communications, or signal paths that enable a functional relationship consistent with the description of this description. For example, if device A generates a signal to control device B to perform an action, in a first example device A is coupled to device B, or in a second example device A is coupled to device B through intervening component C if intervening component C does not substantially alter the functional relationship between device A and device B such that device B is controlled by device A via the control signal generated by device A.
• a device that is “configured to” perform a task or function may be configured (e.g., programmed and/or hardwired) at a time of manufacturing by a manufacturer to perform the function and/or may be configurable (or re- configurable) by a user after manufacturing to perform the function and/or other additional or alternative functions.
• the configuring may be through firmware and/or software programming of the device, through a construction and/or layout of hardware components and interconnections of the device, or a combination thereof.
• a circuit or device that is said to include certain components may instead be configured to couple to those components to form the described circuitry or device.
• a structure described as including one or more semiconductor elements such as transistors), one or more passive elements (such as resistors, capacitors, and/or inductors), and/or one or more sources (such as voltage and/or current sources) may instead include only the semiconductor elements within a single physical device (e.g., a semiconductor die and/or integrated circuit (IC) package) and may be configured to couple to at least some of the passive elements and/or the sources to form the described structure either at a time of manufacture or after a time of manufacture, for example, by an end-user and/or a third-party.
• semiconductor elements such as transistors
• passive elements such as resistors, capacitors, and/or inductors
• sources such as voltage and/or current sources
• While certain components are described herein as being of a particular process technology, these components may be exchanged for components of other process technologies and reconfiguring circuits including the replaced components to provide desired functionality at least partially similar to functionality available prior to the component replacement.
• Components illustrated as resistors are generally representative of any one or more elements coupled in series and/or parallel to provide an amount of impedance represented by the illustrated resistor.
• the phrase “ground voltage potential” includes a chassis ground, an Earth ground, a floating ground, a virtual ground, a digital ground, a common ground, and/or any other form of ground connection applicable to, or suitable for, the teachings of this description. Unless otherwise stated, “about”, “approximately”, or “substantially” preceding a value means +/- 10 percent of the stated value.

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• Engineering & Computer Science (AREA)
• Theoretical Computer Science (AREA)
• Power Engineering (AREA)
• General Engineering & Computer Science (AREA)
• Computer Hardware Design (AREA)
• Physics & Mathematics (AREA)
• General Physics & Mathematics (AREA)
• Analogue/Digital Conversion (AREA)
• Logic Circuits (AREA)
• Measurement Of Current Or Voltage (AREA)
• Semiconductor Integrated Circuits (AREA)

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• 2019
  • 2019-12-31 US US16/732,213 patent/US11211940B2/en active Active
• 2020
  • 2020-12-28 JP JP2022540659A patent/JP7709004B2/ja active Active
  • 2020-12-28 WO PCT/US2020/067105 patent/WO2021138230A1/en not_active Ceased
  • 2020-12-28 CN CN202080091536.2A patent/CN114902412A/zh active Pending
• 2025
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