WO2021120143A1 - 一种柔性微波功率晶体管及其制备方法 - Google Patents

一种柔性微波功率晶体管及其制备方法 Download PDF

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WO2021120143A1
WO2021120143A1 PCT/CN2019/126861 CN2019126861W WO2021120143A1 WO 2021120143 A1 WO2021120143 A1 WO 2021120143A1 CN 2019126861 W CN2019126861 W CN 2019126861W WO 2021120143 A1 WO2021120143 A1 WO 2021120143A1
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power transistor
rigid
microwave power
flexible
substrate
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French (fr)
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徐跃杭
王衍
吴韵秋
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电子科技大学
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Priority to US17/264,521 priority Critical patent/US11973136B2/en
Priority to PCT/CN2019/126861 priority patent/WO2021120143A1/zh
Priority to CN201980027305.2A priority patent/CN112154544B/zh
Publication of WO2021120143A1 publication Critical patent/WO2021120143A1/zh

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    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
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    • H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/145—Organic substrates, e.g. plastic
    • H—ELECTRICITY
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02378—Silicon carbide
    • H—ELECTRICITY
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
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    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3738—Semiconductor materials
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66446—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
    • H01L29/66462—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
    • H—ELECTRICITY
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    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
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    • H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • H01L29/7786—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT

Definitions

  • the invention relates to the technical field of microwave power devices, in particular to a flexible microwave power transistor and a preparation method thereof.
  • GaN HEMT gallium nitride high electron mobility transistor
  • N. Defrance et al. proposed a preparation method [N. Defrance, F. Lecourt, Y. Douvry, M. Lesecq, V. Hoel, ALdes Etangs-Levallois, Y. Cordier, A. Ebongue, and JCDe Jaeger, "Fabrication, characterization, and physical analysis of AlGaN/GaN HEMTs on flexible substrates," in IEEE Trans. Electron Devices, vol. 60, no. 3, pp. 1054–1059], this method is to prepare GaN on a silicon substrate.
  • HEMT structure realizes flexible GaN HEMT through thinning and transfer process.
  • the existing preparation method of using Si substrate to prepare the device and then transferring the thinned device to the flexible substrate has two disadvantages: 1.
  • the device made of Si substrate has large lattice mismatch and poor device performance. it is good.
  • the traditional method is to completely remove the hard substrate Si, and because the device is easily deformed during the transfer process after the device is thinned, it is easy to cause damage to the device, and the traditional transfer method leads to the easy contact interface between the flexible substrate and the device. Air bubbles (gaps) are generated, reducing heat dissipation performance.
  • the purpose of the present invention is to provide a flexible microwave power transistor and a preparation method thereof, so as to reduce the lattice mismatch rate between the silicon substrate and GaN in the traditional method, reduce the damage during the device preparation process, and thereby improve the performance of the flexible microwave power transistor. performance.
  • the present invention provides the following solutions:
  • a flexible microwave power transistor includes, from bottom to top, a flexible Parylene-C substrate, a rigid SiC substrate and a GaN HEMT layer;
  • the thickness of the rigid SiC substrate is less than or equal to 5um.
  • the GaN HEMT layer includes an AlN nucleation layer, a GaN channel layer, an AlN spacer layer, and an AlGaN barrier layer in order from bottom to top.
  • the thickness of the AlN nucleation layer, the GaN channel layer, the AlN spacer layer and the AlGaN barrier layer are 0.1um, 1.8um, 0.001um, 0.02um, respectively.
  • the thickness of the flexible Parylene-C substrate is 30um.
  • a gate, a source, and a drain are further provided on the GaN HEMT layer.
  • a preparation method of a flexible microwave power transistor includes the following steps:
  • a flexible Parylene-C substrate is grown on the lower surface of the rigid SiC substrate of the thinned rigid microwave power transistor to obtain a flexible microwave power transistor.
  • the thinning process is performed on the lower surface of the rigid SiC substrate so that the thickness of the thinned rigid SiC substrate is less than or equal to 5um to obtain a thinned rigid microwave power transistor, which specifically includes:
  • a flexible Parylene-C substrate on the lower surface of the rigid SiC substrate of the thinned rigid microwave power transistor to obtain the flexible microwave power transistor which specifically includes:
  • a flexible Parylene-C substrate is grown on the lower surface of the rigid SiC substrate of the thinned rigid microwave power transistor fixed on the silicon chip to obtain the flexible microwave power transistor embryo;
  • the embryonic body of the flexible microwave power transistor is immersed in acetone, heated in a water bath, silicon oil is removed, and the device is peeled off to obtain a flexible microwave power transistor.
  • the present invention discloses the following technical effects:
  • the present invention provides a flexible microwave power transistor and a preparation method thereof.
  • the preparation method of the present invention aims at the large lattice mismatch of the device prepared by the Si substrate in the existing preparation method, and the technical defects of poor device performance.
  • the GaN HEMT layer is grown on the rigid SiC substrate to avoid the interference between the silicon substrate and the GaN.
  • Lattice mismatch improves the performance of flexible microwave power transistors, and in view of the problems of output power, power added efficiency, and low power gain existing in the existing device preparation methods, good heat dissipation is formed by retaining part of the rigid SiC substrate Transition, improve the heat dissipation characteristics of the device; and cooperate with the normal temperature growth of the flexible substrate process, realize the preparation of low-damage high-quality devices, and realize the close contact between the flexible substrate and the device, basically no bubbles and gaps, and improve the heat dissipation performance Compared with the traditional method, the power output capability is greatly improved, and the efficiency and gain are also greatly increased. Under the stress of 0.75%, the performance of the device is basically unchanged.
  • Figure 1 is a schematic structural diagram of a flexible microwave power transistor provided by the present invention
  • Fig. 2 is a flow chart of a method for manufacturing a flexible microwave power transistor provided by the present invention.
  • the purpose of the present invention is to provide a flexible microwave power transistor and a preparation method thereof, so as to reduce the lattice mismatch rate between the silicon substrate and GaN in the traditional method, reduce the damage during the device preparation process, and thereby improve the performance of the flexible microwave power transistor .
  • the present invention provides the following solutions:
  • the present invention provides a flexible microwave power transistor, which includes from bottom to top: a flexible Parylene-C substrate, a rigid SiC substrate, and a GaN HEMT layer; the rigid SiC substrate The thickness is less than or equal to 5um.
  • the GaN HEMT layer sequentially includes an AlN nucleation layer, a GaN channel layer, an AlN spacer layer, and an AlGaN barrier layer from bottom to top.
  • the thickness of the AlN nucleation layer, the GaN channel layer, the AlN spacer layer and the AlGaN barrier layer are 0.1um, 1.8um, 0.001um, 0.02um, respectively.
  • the thickness of the flexible Parylene-C substrate is 30um.
  • the AlN nucleation layer is used to reduce the tension caused by the lattice mismatch between the substrate and the channel, and acts as a buffer; the GaN channel layer is used to form the channel layer for carrier transport; the AlN spacer layer is used to reduce Small channel scattering; AlGaN barrier layer is used to provide a certain barrier height for gate Schottky contact.
  • a gate, a source, and a drain are also provided on the GaN HEMT layer.
  • the gate length L G is 250 nm
  • the gate width W G is 100 ⁇ m.
  • the gate index is 10, and the distance between the gate source L GS and the gate drain L GD is 800 nm.
  • the present invention also provides a method for manufacturing a flexible microwave power transistor.
  • the manufacturing method includes the following steps:
  • step 201 a GaN HEMT layer is prepared on the upper surface of the rigid SiC substrate to obtain a rigid microwave power transistor.
  • a large-gate wide microwave power transistor (GaN HEMT) is prepared on a rigid substrate silicon carbide (SiC) wafer.
  • the reason for selecting the material is: High electron mobility transistor (GaN) based on gallium nitride (GaN) Mobility Transistor (HEMT) has large power capacity and high output power.
  • the substrate silicon carbide (SiC) has high conductivity, and the lattice mismatch with GaN is small when the HEMT is made, and the device performance is good.
  • the traditional method uses a Si substrate, the lattice mismatch is large, and the device performance is not good.
  • I-V test, S parameter test and power test are carried out to verify the performance.
  • Step 202 Perform a thinning process on the lower surface of the rigid SiC substrate so that the thickness of the thinned rigid SiC substrate is less than or equal to 5um, and a thinned rigid microwave power transistor is obtained.
  • step 202 the lower surface of the rigid SiC substrate is thinned, so that the thickness of the thinned rigid SiC substrate is less than or equal to 5um to obtain a thinned rigid microwave power transistor, which specifically includes:
  • the lower surface of the rigid SiC substrate is mechanically polished and thinned, so that the thickness of the rigid SiC substrate after mechanical polishing and thinning is less than or equal to 100 um, and a rigid microwave power transistor after mechanical polishing is obtained.
  • the rigid SiC substrate of the monolithic SiC wafer (rigid microwave power transistor) fabricated in step 201 is mechanically ground and thinned, and polished until the thickness of the substrate is less than or equal to 100 microns.
  • the mechanically polished rigid microwave power transistor is turned over and fixed on the silicon wafer.
  • the thinned device (rigid microwave power transistor after mechanical grinding) is fixed on the silicon wafer by turning over with silicon oil, which is used for heat dissipation.
  • the turning over is because the substrate is to be removed, and the substrate is at the bottom position, which is inconvenient Remove.
  • a dry etching machine is used to etch the lower surface of the rigid SiC substrate of the rigid microwave power transistor after mechanical grinding, so that the thickness of the rigid SiC substrate after etching is less than or equal to 5um, and a thinned rigid microwave is obtained.
  • Power transistor Specifically, the etching process can be carried out in a whole wafer (the entire rigid microwave power transistor after mechanical grinding), or it can be carried out by dicing and selecting several small chips. The dicing is to reduce the cost. Then, the fixed and mechanically polished rigid microwave power transistors are put into a dry etching machine for etching the backside SiC substrate.
  • the corresponding etching gas and the substrate undergo a chemical reaction, and the etching rate and etching time are adjusted to etch until the thickness of SiC is less than or equal to 5 ⁇ m.
  • Retaining part of the substrate (5 ⁇ m) helps to improve the device's interfacial tension and lattice mismatch, and can effectively improve the device performance.
  • Step 203 Growing a flexible Parylene-C substrate on the lower surface of the rigid SiC substrate of the thinned rigid microwave power transistor under normal temperature conditions to obtain a flexible microwave power transistor.
  • step 203 growing a flexible Parylene-C substrate on the lower surface of the rigid SiC substrate of the thinned rigid microwave power transistor under normal temperature conditions to obtain a flexible microwave power transistor, which specifically includes:
  • a flexible Parylene-C substrate is grown on the lower surface of a rigid SiC substrate of a thinned rigid microwave power transistor fixed on a silicon chip to obtain a flexible microwave power transistor embryo.
  • the thinned rigid microwave power transistor is fixed on the silicon wafer.
  • the silicon wafer is used for fixing.
  • the Parylene-C is grown on the thinned SiC substrate under normal temperature and the process is chemical vapor deposition (CVD), the growth thickness needs to comprehensively consider the flexibility requirements, and the thickness is inversely proportional to the flexibility, which can realize the adjustment of the flexibility requirements under different requirements.
  • CVD chemical vapor deposition
  • This process realizes the replacement of the substrate under the premise of keeping the device in place, and it is carried out at room temperature.
  • the thinned device is transferred to a flexible substrate.
  • the process of the present invention keeps the device Do not move, apply a flexible substrate to the device, and the device suffers minimal damage during this process.
  • the embryonic body of the flexible microwave power transistor is immersed in acetone, heated in a water bath, silicon oil is removed, and the device is peeled off to obtain a flexible microwave power transistor. Specifically, after the growth process is completed, the device is immersed in acetone for heating in a water bath to remove the silicon oil, and the device is peeled off in the solution to obtain a flexible microwave power device.
  • the present invention discloses the following technical effects:
  • the existing preparation method of preparing a device using a Si substrate and then transferring the thinned device to a flexible substrate has two disadvantages: 1.
  • the device prepared with the Si substrate has a large lattice mismatch and poor device performance. .
  • the traditional method is to completely remove the hard substrate Si, and because the device is easily deformed during the transfer process after the device is thinned, it is easy to cause damage to the device, and after the Si substrate is removed, the heat dissipation performance of the flexible substrate is very poor. In the transfer process, bubbles and gaps are easily generated, which further reduces the heat dissipation performance.
  • the present invention uses a rigid SiC substrate, which has small lattice mismatch and improves device performance.
  • the present invention directly grows Parylene-C flexible substrate that can be grown at room temperature on the back of the device, while ensuring that a part of the hard substrate SiC is retained, ensuring the high quality of the contact interface between the substrate and the device, and increasing Thermal conductivity and minimize device damage during the transfer process.

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Abstract

一种柔性微波功率晶体管及其制备方法。所述制备方法针对现有的制备方法中Si衬底制备的器件晶格失配大，器件性能不好的技术缺陷，在刚性SiC衬底上生长GaN HEMT层，避免了硅衬底与GaN的晶格失配，提高柔性微波功率晶体管的性能。而且，针对现有的制备方法中存在的输出功率、功率附加效率及功率增益低等问题，通过保留部分刚性SiC衬底，并配合常温生长柔性衬底工艺，实现了高质量器件的制备。相比于传统方法，功率输出能力得到很大提升，效率和增益也大幅度增加，在0.75％应力下，器件性能基本不变。

Description

一种柔性微波功率晶体管及其制备方法 技术领域
本发明涉及微波功率器件技术领域，特别是涉及一种柔性微波功率晶体管及其制备方法。
背景技术
随着5G时代到来，无线传输系统的功率容量需求不断提升，为了实现体积小，成本低的发展需求，柔性微波功率器件具有很大的应用前景。基于氮化镓高电子迁移率晶体管(GaN HEMT)的高功率、高效率和高频率特性，柔性GaN HEMT正在逐渐成为研究热点。
由于GaN应力特性较差，如何制备柔性GaN HEMT一直是个难题。N.Defrance等人提出一种制备方法[N.Defrance,F.Lecourt,Y.Douvry,M.Lesecq,V.Hoel,A.L.des Etangs-Levallois,Y.Cordier,A.Ebongue,and J.C.De Jaeger,“Fabrication,characterization,and physical analysis of AlGaN/GaN HEMTs on flexible substrates,”in IEEE Trans.Electron Devices,vol.60,no.3,pp.1054–1059]，该方法通过在硅衬底上制备GaN HEMT结构，通过减薄加转移工艺实现柔性GaN HEMT。虽然硅衬底容易去除，但是硅衬底与GaN的晶格失配率高，导致器件性能较差。即现有的采用Si衬底制备器件，再将减薄后的器件转移到柔性衬底上的制备方法有两个缺点：1，用Si衬底制备的器件晶格失配大，器件性能不好。2，传统方法是硬质衬底Si完全去除，而且由于器件减薄后在转移过程中器件很容易发生形变，很容易对器件造成损伤，并且传统转移方法导致柔性衬底与器件接触界面很容易产生气泡(缝隙)，降低散热性能。
如何减少衬底与GaN的晶格失配率，提高柔性微波功率晶体管的性能成为一个亟待解决的技术问题。
发明内容
本发明的目的是提供一种柔性微波功率晶体管及其制备方法，以减少传统方法中的硅衬底与GaN的晶格失配率，减少器件制备过程中的损伤，从而提高柔性微波功率晶体管的性能。
为实现上述目的，本发明提供了如下方案：
一种柔性微波功率晶体管，所述柔性微波功率晶体管从下至上依次包括：柔性Parylene-C衬底、刚性SiC衬底和GaN HEMT层；
所述刚性SiC衬底的厚度小于或等于5um。
可选的，所述GaN HEMT层从下至上依次包括：AlN成核层、GaN沟道层、AlN间隔层和AlGaN势垒层。
可选的，所述AlN成核层、所述GaN沟道层、所述AlN间隔层和所述AlGaN势垒层的厚度分别为：0.1um、1.8um、0.001um、0.02um。
可选的，所述柔性Parylene-C衬底的厚度为30um。
可选的，所述GaN HEMT层上还设置有栅极、源极和漏极。
一种柔性微波功率晶体管的制备方法，所述制备方法包括如下步骤：
在刚性SiC衬底的上表面制备GaN HEMT层，获得刚性微波功率晶体管；
对所述刚性SiC衬底的下表面进行减薄处理，使减薄后的刚性SiC衬底的厚度小于或等于5um，获得减薄后的刚性微波功率晶体管；
在常温条件下，在减薄后的刚性微波功率晶体管的刚性SiC衬底的下表面生长柔性Parylene-C衬底，获得柔性微波功率晶体管。
可选的，所述对所述刚性SiC衬底的下表面进行减薄处理，使减薄后的刚性SiC衬底的厚度小于或等于5um，获得减薄后的刚性微波功率晶体管，具体包括：
对所述刚性SiC衬底的下表面进行机械研磨减薄，使机械研磨减薄后的刚性SiC衬底的厚度小于或等于100um，获得机械研磨后的刚性微波功率晶体管；
将机械研磨后的刚性微波功率晶体管翻转并固定于硅片上；
利用干法刻蚀机对机械研磨后的刚性微波功率晶体管的刚性SiC衬底的下表面进行刻蚀，使刻蚀后的刚性SiC衬底的厚度小于或等于5um，得到减薄后的刚性微波功率晶体管。
可选的，所述在常温条件下，在减薄后的刚性微波功率晶体管的刚性SiC衬底的下表面生长柔性Parylene-C衬底，获得柔性微波功率晶体管，具体包括：
在常温条件下，在固定于硅片上的减薄后的刚性微波功率晶体管的刚性SiC衬底的下表面生长柔性Parylene-C衬底，获得柔性微波功率晶体管胚体；
将所述柔性微波功率晶体管胚体浸泡于丙酮中，进行水浴加热、去除硅油和器件剥离，获得柔性微波功率晶体管。
根据本发明提供的具体实施例，本发明公开了以下技术效果：
本发明提出了一种柔性微波功率晶体管及其制备方法。本发明制备方法针 对现有的制备方法中Si衬底制备的器件晶格失配大，器件性能不好的技术缺陷，在刚性SiC衬底上生长GaN HEMT层，避免了硅衬底与GaN的晶格失配，提高柔性微波功率晶体管的性能，而且针对现有的件制备方法中存在的输出功率、功率附加效率及功率增益低等问题，通过保留部分刚性SiC衬底，形成了良好的散热过渡，提高了器件散热特性；并配合常温生长柔性衬底工艺，实现了低损伤高质量器件的制备，并且实现了柔性衬底与器件接触紧密，基本无气泡和缝隙，提高了散热性能，相比于传统方法，功率输出能力得到很大提升，效率和增益也大幅度增加，在0.75％应力下，器件性能基本不变。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案，下面将对实施例中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动性的前提下，还可以根据这些附图获得其他的附图。
图1为本发明提供的一种柔性微波功率晶体管的结构示意图；
图2为本发明提供的一种柔性微波功率晶体管制备方法的流程图。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
本发明的目的是提供一种柔性微波功率晶体管及其制备方法，以减少传统方法中硅衬底与GaN的晶格失配率，减少器件制备过程中的损伤，从而提高柔性微波功率晶体管的性能。
为使本发明的上述目的、特征和优点能够更加明显易懂，下面结合附图和具体实施方式对本发明作进一步详细的说明。
为了实现上述目的为实现上述目的，本发明提供了如下方案：
如图1所示，本发明提供一种柔性微波功率晶体管，所述柔性微波功率晶体管从下至上依次包括：柔性Parylene-C衬底、刚性SiC衬底和GaN HEMT层；所述刚性SiC衬底的厚度小于或等于5um。
其中，所述GaN HEMT层从下至上依次包括：AlN成核层、GaN沟道层、AlN间隔层和AlGaN势垒层。所述AlN成核层、所述GaN沟道层、所述AlN 间隔层和所述AlGaN势垒层的厚度分别为：0.1um、1.8um、0.001um、0.02um。可选的，所述柔性Parylene-C衬底的厚度为30um。AlN成核层用于减小衬底与沟道间晶格失配带来的张力，起到缓冲作用；GaN沟道层用于形成载流子传输的沟道层；AlN间隔层用于减小沟道散射；AlGaN势垒层用于为栅极肖特基接触提供一定的势垒高度。
其中，所述GaN HEMT层上还设置有栅极、源极和漏极。栅极(gate，G)，源极(source，S)，漏极(drain，D),对应于图1中的G，S，D，栅长L G为250nm，栅宽W G为100μm，栅指数为10，栅源L GS及栅漏L GD距离为800nm。
如图2所示，本发明还提供一种柔性微波功率晶体管的制备方法，所述制备方法包括如下步骤：
步骤201，在刚性SiC衬底的上表面制备GaN HEMT层，获得刚性微波功率晶体管。
本发明在刚性衬底碳化硅(SiC)晶圆(wafer)上制备大栅宽微波功率晶体管(GaN HEMT)，选取材料理由为：基于氮化镓(GaN)的高电子迁移率晶体管(High electron mobility transistor，HEMT)功率容量大，输出功率高，同时衬底碳化硅(SiC)导电率高，制作HEMT时与GaN的晶格失配小，器件性能良好。传统方法利用Si衬底，晶格失配大，器件性能不好。器件制备后对其进行I-V测试、S参数测试及功率测试，验证性能。
步骤202，对所述刚性SiC衬底的下表面进行减薄处理，使减薄后的刚性SiC衬底的厚度小于或等于5um，获得减薄后的刚性微波功率晶体管。
步骤202所述对所述刚性SiC衬底的下表面进行减薄处理，使减薄后的刚性SiC衬底的厚度小于或等于5um，获得减薄后的刚性微波功率晶体管，具体包括：
对所述刚性SiC衬底的下表面进行机械研磨减薄，使机械研磨减薄后的刚性SiC衬底的厚度小于或等于100um，获得机械研磨后的刚性微波功率晶体管。具体的，将步骤201里面制作好的整块SiC wafer(刚性微波功率晶体管)的刚性SiC衬底进行机械研磨减薄，并进行抛光处理，直至衬底厚度小于或等于100微米。
将机械研磨后的刚性微波功率晶体管翻转并固定于硅片上。具体的，减薄后的器件(机械研磨后的刚性微波功率晶体管)借助硅油翻转固定于硅片上，硅油用来散热，翻转是因为要去除衬底，而衬底是在底部位置，不方便去除。
利用干法刻蚀机对机械研磨后的刚性微波功率晶体管的刚性SiC衬底的下表面进行刻蚀，使刻蚀后的刚性SiC衬底的厚度小于或等于5um，得到减薄后的刚性微波功率晶体管。具体的，刻蚀过程，可以整块wafer(整个机械研磨后的刚性微波功率晶体管)一起进行，也可以先划片选取几个小片进行，划片是为了降低成本。随后将固定好的机械研磨后的刚性微波功率晶体管放入干法刻蚀机中进行背部SiC衬底刻蚀。相应刻蚀气体和衬底进行化学反应，通过调试刻蚀速率和刻蚀时间，刻蚀至SiC厚度小于或等于5μm。其中保留部分衬底(5μm)有助于改善器件界面张力及晶格失配等问题，能够有效提升器件性能。
步骤203，在常温条件下，在减薄后的刚性微波功率晶体管的刚性SiC衬底的下表面生长柔性Parylene-C衬底，获得柔性微波功率晶体管。
步骤203所述在常温条件下，在减薄后的刚性微波功率晶体管的刚性SiC衬底的下表面生长柔性Parylene-C衬底，获得柔性微波功率晶体管，具体包括：
在常温条件下，在固定于硅片上的减薄后的刚性微波功率晶体管的刚性SiC衬底的下表面生长柔性Parylene-C衬底，获得柔性微波功率晶体管胚体。具体的，减薄后的刚性微波功率晶体管固定在硅片上，硅片是固定用的，将Parylene-C长在减薄后的SiC衬底上，生长条件为常温，工艺为化学气相沉积(CVD)，生长厚度需要综合考虑柔性需求，厚度与柔性成反比，即可实现不同需求下的柔性要求的调控。选取parylene-C为柔性衬底材料的原因是：其生长温度低，工艺简单，成膜性好。此工艺实现了保持器件不动的前提下衬底的更换，并且在常温下进行，在传统方法中，都是通过将减薄后的器件转移到柔性衬底上，而本发明的工艺保持器件不动，施加柔性衬底于器件上，此过程中器件所受损伤最小。
将所述柔性微波功率晶体管胚体浸泡于丙酮中，进行水浴加热、去除硅油和器件剥离，获得柔性微波功率晶体管。具体的，待生长工艺结束后，将器件浸泡于丙酮中进行水浴加热，去除硅油，在溶液中进行器件的剥离，至此得到柔性微波功率器件。
根据本发明提供的具体实施例，本发明公开了以下技术效果：
现有的采用Si衬底制备器件，再将减薄后的器件转移到柔性衬底上的制备方法有两个缺点：1，用Si衬底制备的器件晶格失配大，器件性能不好。2，传统方法是硬质衬底Si完全去除，而且由于器件减薄后在转移过程中器件很 容易发生形变，很容易对器件造成损伤，并且去除Si衬底后，柔性衬底散热性能很差，转移过程中很容易产生气泡和缝隙，进一步降低散热性能，相比于现有的方法，针对第1点，本发明采用刚性SiC衬底，晶格失配小，器件性能有所提升。针对第2点，本发明将可于常温下生长的Parylene-C柔性衬底直接生长于器件背部，同时保证保留一部分的硬质衬底SiC，保证了衬底于器件接触界面的高质量，增加导热特性并使器件在转移工艺过程中的损伤达到最小。
本说明书中等效实施例采用递进的方式描述，每个实施例重点说明的都是与其他实施例的不同之处，等效实施例之间相同相似部分互相参见即可。
本文中应用了具体个例对发明的原理及实施方式进行了阐述，以上实施例的说明只是用于帮助理解本发明的方法及其核心思想，所描述的实施例仅仅是本发明的一部分实施例，而不是全部的实施例，基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。

Claims (8)

  1. 一种柔性微波功率晶体管，其特征在于，所述柔性微波功率晶体管从下至上依次包括：柔性Parylene-C衬底、刚性SiC衬底和GaN HEMT层；
    所述刚性SiC衬底的厚度小于或等于5um。
  2. 根据权利要求1所述的柔性微波功率晶体管，其特征在于，所述GaN HEMT层从下至上依次包括：AlN成核层、GaN沟道层、AlN间隔层和AlGaN势垒层。
  3. 根据权利要求2所述的柔性微波功率晶体管，其特征在于，所述AlN成核层、所述GaN沟道层、所述AlN间隔层和所述AlGaN势垒层的厚度分别为：0.1um、1.8um、0.001um、0.02um。
  4. 根据权利要求1所述的柔性微波功率晶体管，其特征在于，所述柔性Parylene-C衬底的厚度为30um。
  5. 根据权利要求1所述的柔性微波功率晶体管，其特征在于，所述GaN HEMT层上还设置有栅极、源极和漏极。
  6. 一种柔性微波功率晶体管的制备方法，其特征在于，所述制备方法包括如下步骤：
    在刚性SiC衬底的上表面制备GaN HEMT层，获得刚性微波功率晶体管；
    对所述刚性SiC衬底的下表面进行减薄处理，使减薄后的刚性SiC衬底的厚度小于或等于5um，获得减薄后的刚性微波功率晶体管；
    在常温条件下，在减薄后的刚性微波功率晶体管的刚性SiC衬底的下表面生长柔性Parylene-C衬底，获得柔性微波功率晶体管。
  7. 根据权利要求6所述的柔性功率晶体管的制备方法，其特征在于，所述对所述刚性SiC衬底的下表面进行减薄处理，使减薄后的刚性SiC衬底的厚度小于或等于5um，获得减薄后的刚性微波功率晶体管，具体包括：
    对所述刚性SiC衬底的下表面进行机械研磨减薄，使机械研磨减薄后的刚性SiC衬底的厚度小于或等于100um，获得机械研磨后的刚性微波功率晶体管；
    将机械研磨后的刚性微波功率晶体管翻转并固定于硅片上；
    利用干法刻蚀机对机械研磨后的刚性微波功率晶体管的刚性SiC衬底的下表面进行刻蚀，使刻蚀后的刚性SiC衬底的厚度小于或等于5um，得到减薄 后的刚性微波功率晶体管。
  8. 根据权利要求7所述的柔性功率晶体管的制备方法，其特征在于，所述在常温条件下，在减薄后的刚性微波功率晶体管的刚性SiC衬底的下表面生长柔性Parylene-C衬底，获得柔性微波功率晶体管，具体包括：
    在常温条件下，在固定于硅片上的减薄后的刚性微波功率晶体管的刚性SiC衬底的下表面生长柔性Parylene-C衬底，获得柔性微波功率晶体管胚体；
    将所述柔性微波功率晶体管胚体浸泡于丙酮中，进行水浴加热、去除硅油和器件剥离，获得柔性微波功率晶体管。
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