WO2021103851A1 - 信号调制电路 - Google Patents

信号调制电路 Download PDF

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Publication number
WO2021103851A1
WO2021103851A1 PCT/CN2020/121867 CN2020121867W WO2021103851A1 WO 2021103851 A1 WO2021103851 A1 WO 2021103851A1 CN 2020121867 W CN2020121867 W CN 2020121867W WO 2021103851 A1 WO2021103851 A1 WO 2021103851A1
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unit
ota
signal
fully differential
input terminal
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PCT/CN2020/121867
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English (en)
French (fr)
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魏小康
王辉
雷红军
江猛
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苏州华芯微电子股份有限公司
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Publication of WO2021103851A1 publication Critical patent/WO2021103851A1/zh

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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00Conversion of analogue values to or from differential modulation
    • H03M3/30Delta-sigma modulation
    • H03M3/322Continuously compensating for, or preventing, undesired influence of physical parameters
    • H03M3/358Continuously compensating for, or preventing, undesired influence of physical parameters of non-linear distortion, e.g. instability

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  • the invention belongs to the technical field of integrated circuits, and specifically relates to a signal modulation circuit.
  • Pyroelectric infrared sensors are currently being widely used in various automatic control devices, and at the same time, based on the unique characteristics of the device, combined with other circuits to develop more excellent products or automatic control devices.
  • the traditional way of processing pyroelectric infrared sensor signals is mostly analog operational amplifier plus RC filter circuit for amplifying and extracting. Its own circuit structure determines that the chip often cannot handle well in terms of filtering, anti-interference, and sensitivity.
  • the purpose of the present invention is to provide a signal modulation circuit.
  • the modulation circuit designed based on the Sigma-Delta ( ⁇ - ⁇ ) structure idea can modulate and convert the electrical signal converted by the pyroelectric infrared sensor detected by the human body activity.
  • the digital signal can be directly used for processing by the digital unit.
  • a signal modulation circuit comprising:
  • the pre-amplification unit is used to amplify the extracted input signal
  • the second-level fully differential OTA unit including the first-level fully-differential OTA unit and the second-level fully-differential OTA unit, is used to process the input signal and output an analog signal;
  • the quantization comparison unit is used to quantify and compare the analog signals output by the second-level fully differential OTA unit;
  • the feedback compensation unit is used to compensate the second-level fully differential OTA unit according to the comparison result output by the quantization comparison unit;
  • the timing control unit is used to perform timing control on the pre-amplification unit, the two-level fully differential OTA unit, the quantization comparison unit and the feedback compensation unit.
  • the pre-amplification unit is connected to the first signal input terminal Si- and the second signal input terminal Si+, and the pre-amplification unit is integrated with the first signal input terminal Si- and the second signal input terminal Si+.
  • Capacitor C1 is connected to the first signal input terminal Si- and the second signal input terminal Si+, and the pre-amplification unit is integrated with the first signal input terminal Si- and the second signal input terminal Si+.
  • the two-level fully differential OTA unit includes:
  • the first-stage fully differential OTA unit includes a first OTA amplifier and a capacitor C2 connected in parallel between the input terminal and the output terminal of the first OTA amplifier;
  • the second-stage fully differential OTA unit includes a second OTA amplifier and a capacitor C4 connected in parallel between the input terminal and the output terminal of the second OTA amplifier;
  • a capacitor C3 connected in series between the output terminal of the first OTA amplifier and the input terminal of the second OTA amplifier.
  • the output voltage of the two-level fully differential OTA unit at time n+1 is:
  • ⁇ Voutn2 is the output voltage of the second-level fully-differential OTA unit at time n
  • ⁇ Voutn1 is the output voltage of the first-level fully-differential OTA unit at time n
  • ⁇ Vin1 is the input voltage of the first-level fully-differential OTA unit
  • ⁇ Vref is the feedback The voltage difference provided by the compensation unit.
  • a switch T1 is connected in series between the first signal input terminal Si- and the second signal input terminal Si+ and the pre-amplification unit, and the first signal input terminal Si- and the second signal input terminal Si+ are connected in parallel.
  • a switch T2 is provided, a switch T1 is connected in series between the output of the first OTA amplifier and the capacitor C3, a switch T2 is connected in parallel between the output of the first OTA amplifier, and a switch T2 is connected in parallel between the input of the second OTA amplifier and the capacitor C3.
  • the switch T2, the switch T1 and the switch T2 are sequential switches.
  • the input terminals of the first OTA amplifier and/or the second OTA amplifier are connected to the reference voltage Vt through a switch T1.
  • the feedback compensation unit includes:
  • the capacitors Cb1 and Cb2 are respectively connected to the input terminals of the first OTA amplifier and the second OTA amplifier;
  • the switch T1 is arranged between the input terminals of the first OTA amplifier and the second OTA amplifier and the capacitors Cb1 and Cb2, and is connected in parallel with the two ends of the capacitors Cb1 and Cb2;
  • the switch T2 is connected to the capacitors Cb1 and Cb2 respectively;
  • the switches Fb1 and Fb2 are set between the switch T2 and the voltages Vref+ and Vref-;
  • the switches T1 and T2 and the switches Fb1 and Fb2 are sequential switches.
  • the quantization and comparison unit is used to quantify and compare the analog signals output by the second-level fully differential OTA unit.
  • the quantization and comparison unit When the output voltage of the second-level fully-differential OTA unit is greater than 0, the quantization and comparison unit outputs a logic level of 1.
  • the quantization comparison unit When the output voltage of the secondary fully differential OTA unit is less than 0, the quantization comparison unit outputs a logic level of 0.
  • the feedback compensation unit when the quantization and comparison unit outputs a logic level of 1, the feedback compensation unit performs voltage compensation of - ⁇ vref on the second-level fully differential OTA unit, and when the quantization and comparison unit outputs a logic level of 0, the feedback compensation unit The second-level fully differential OTA unit performs voltage compensation of + ⁇ vref.
  • the signal and voltage Vref input from the second signal input terminal Si+ satisfy:
  • n is the number of logic level 0 output by the quantization comparison unit.
  • the present invention has the following advantages:
  • the invention is suitable for the effective extraction and quantization of small signals.
  • the design of the two-stage OTA can realize relatively small harmonic distortion and relatively good linear stability, and has better anti-interference performance and induction sensitivity.
  • Fig. 1 is a schematic diagram of the module of the signal modulation circuit in the present invention
  • Fig. 2 is a circuit schematic diagram of a signal modulation circuit in a specific embodiment of the present invention.
  • Fig. 3 is a circuit schematic diagram of a feedback compensation unit in a specific embodiment of the present invention.
  • Fig. 4 is a timing control diagram of a signal modulation circuit in a specific embodiment of the present invention.
  • the present invention discloses a signal modulation circuit, which includes:
  • Pre-amplification unit used to amplify the extracted input signal
  • the two-step fully differential OTA unit (Two-Step OTA), including the first fully differential OTA unit and the second fully differential OTA unit, is used to process the input signal and output an analog signal;
  • the quantization comparison unit (Comp) is used to quantify and compare the analog signals output by the two-level fully differential OTA unit;
  • the feedback compensation unit (Feedback) is used to compensate the second-level fully differential OTA unit according to the comparison result output by the quantization comparison unit;
  • Timing1, Timing2, Timing3 is used for timing control of the pre-amplification unit, the two-level fully differential OTA unit, the quantization comparison unit and the feedback compensation unit.
  • the signal modulation circuit of the present invention realizes the working states of the pre-amplification unit, the two-stage fully differential OTA unit, the quantization comparison unit and the feedback compensation unit through a strict timing control circuit.
  • the pre-amplification unit can adjust and amplify 1x, 2x, 4x, and 8x according to the actual signal strength, and then send the processed signal to the fully differential transconductance circuit (that is, the secondary fully differential OTA unit).
  • the fully differential transconductance circuit is designed in a two-stage connection mode. Compared with a single-stage circuit, the two-stage design can achieve relatively small harmonic distortion and better linear stability in the case of a quantized output of one bit.
  • the signal after the summation of the two-level fully differential transconductance circuit is directly sent to the quantization comparison circuit.
  • the quantization comparison unit can reduce the interference of noise signals at the same time, and can effectively quantize the output within the cycle conversion time.
  • the output result of the quantization comparison unit is simultaneously sent to the subsequent digital circuit processing unit (DSP) and feedback compensation unit for digital signal processing and strict sequential circuit control.
  • DSP digital circuit processing unit
  • the signal modulation circuit amplifies, extracts, quantizes the output signal of the pyroelectric infrared detector, and completes the effective conversion of the changed signal into a digital signal without distortion.
  • the output signal amplitude of the pyroelectric infrared detector is about 1mV, the output frequency is about 1 Hz, and its center voltage is about 0.7V.
  • the pre-amplification unit is connected to the first signal input terminal Si- and the second signal input terminal Si+, and the pre-amplifier unit is integrated with the first signal input terminal Si+.
  • a capacitor C1 connected to the signal input terminal Si- and the second signal input terminal Si+.
  • the secondary fully differential OTA unit includes:
  • the first-stage fully differential OTA unit includes a first OTA amplifier and a capacitor C2 connected in parallel between the input terminal and the output terminal of the first OTA amplifier;
  • the second-stage fully differential OTA unit includes a second OTA amplifier and a capacitor C4 connected in parallel between the input terminal and the output terminal of the second OTA amplifier;
  • a capacitor C3 connected in series between the output terminal of the first OTA amplifier and the input terminal of the second OTA amplifier.
  • a switch T1 is arranged in series between the first signal input terminal Si- and the second signal input terminal Si+ and the pre-amplification unit, and a switch T2 is arranged in parallel between the first signal input terminal Si- and the second signal input terminal Si+,
  • a switch T1 is arranged in series between the output terminal of the first OTA amplifier and the capacitor C3
  • a switch T2 is arranged in parallel between the output terminal of the first OTA amplifier
  • a switch T2 is arranged in series between the input terminal of the second OTA amplifier and the capacitor C3.
  • the input terminal of the OTA amplifier and/or the second OTA amplifier is connected to the reference voltage Vt through the switch T1.
  • the switch T1 and the switch T2 in this embodiment are sequential switches, that is, at the time t1, the switch T1 is all on and the switch T2 is off, and at the time t2, the switch T2 is all on and the switch T1 is off.
  • the first signal input terminal Si- and the second signal input terminal Si+ are two input ports for receiving signals.
  • the Si- port is connected to a 0V voltage value
  • the Si+ port needs to be connected to the pyroelectric infrared sensor signal output port .
  • the voltage value is VB and the resulting difference is ⁇ Vin1.
  • the voltage values of point C and point D of the output port become VC and VD.
  • ⁇ Vout1 VC-VD
  • n state as the moment of the current conversion cycle
  • n-1 state as the previous conversion cycle
  • n+1 as the next conversion cycle
  • ⁇ Voutn1 ⁇ Voutn-11+(C1/C2) ⁇ ( ⁇ Vin1 ⁇ Vref);
  • ⁇ Voutn+11 ⁇ Voutn1+(C1/C2) ⁇ ( ⁇ Vin1 ⁇ Vref).
  • ⁇ Voutn+12 ⁇ Voutn2+(C3/C4) ⁇ ( ⁇ Vin2 ⁇ Vref);
  • ⁇ Voutn2 is the output voltage of the second-level fully-differential OTA unit at time n
  • ⁇ Voutn1 is the output voltage of the first-level fully-differential OTA unit at time n
  • ⁇ Vin1 is the input voltage of the first-level fully-differential OTA unit
  • ⁇ Vref is the feedback The voltage difference provided by the compensation unit.
  • the feedback compensation unit in this embodiment includes:
  • the capacitors Cb1 and Cb2 are respectively connected to the input terminals of the first OTA amplifier and the second OTA amplifier;
  • the switch T1 is arranged between the input terminals of the first OTA amplifier and the second OTA amplifier and the capacitors Cb1 and Cb2, and is connected in parallel with the two ends of the capacitors Cb1 and Cb2;
  • the switch T2 is connected to the capacitors Cb1 and Cb2 respectively;
  • the switches Fb1 and Fb2 are set between the switch T2 and the voltages Vref+ and Vref-;
  • the switches T1 and T2 and the switches Fb1 and Fb2 are sequential switches.
  • the capacitor Cb1 and the capacitor Cb2 are charged through the switch T1 control. After the charging is completed, at the second time, the Cb1 and Cb2 are connected in series through the switch T2 to complete the ⁇ Vref conversion. At this time, the voltage difference between the A terminal and the B terminal in Figure 3 It is ⁇ Vref, which can be directly sent to the OTA input terminal for compensation.
  • the quantization comparison unit When the output voltage ⁇ Vout2 of the secondary fully differential OTA unit is greater than 0, the quantization comparison unit outputs a logic level of 1;
  • the quantization comparison unit When the output voltage ⁇ Vout2 of the secondary fully differential OTA unit is less than 0, the quantization comparison unit outputs a logic level of 0.
  • the generated logic levels 1 and 0 are sent to the digital signal processing unit, and are also used for the feedback compensation circuit to perform compensation control on OTA1 and OTA2.
  • the feedback compensation unit performs - ⁇ vref voltage compensation on the second-level fully differential OTA unit, and " ⁇ " in the above formulas is "-";
  • the feedback compensation unit performs voltage compensation of + ⁇ vref on the second-level fully differential OTA unit, and " ⁇ " in the above formulas is "+".
  • the complete modulation circuit in this embodiment can complete the conversion of Si+ signals, and the final circuit functions completed by the entire circuit include:
  • ⁇ Vin1 will be greater than 0 at the OTA1 input terminal, so that OTA1 and OTA2 outputs ⁇ Vout1 and ⁇ Vout2 are both greater than 0, and the quantization comparison unit outputs logic level 1;
  • Si+ continues to receive the pyroelectric infrared sensor signal Vin and generates ⁇ Vin1 at the OTA1 input.
  • the feedback compensation circuit makes ⁇ Vin1- ⁇ Vref. If ⁇ Vin1- ⁇ Vref is still greater than 0 at this time, the quantization comparison unit outputs a logic level 1, until ⁇ Vin1- ⁇ Vref becomes less than 0, the quantization comparison unit outputs a logic level of 0. Then the input terminal will become ⁇ Vin1+ ⁇ Vref at the next moment, and the circuit will continue to work in this state. The output of the quantization comparison unit will generate a series of 1 and 0 phase level signals.
  • n is the number of logic level 0 output by the quantization comparison unit.
  • circuit in the present invention can amplify, extract, and quantify a variety of signals, and is not limited to the detection signal of the pyroelectric infrared sensor described in the foregoing embodiment.
  • the invention is suitable for the effective extraction and quantization of small signals.
  • the design of the two-stage OTA can realize relatively small harmonic distortion and relatively good linear stability, and has better anti-interference performance and induction sensitivity.

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Abstract

本发明揭示了一种信号调制电路,所述信号调制电路包括:预放大单元,用于对提取的输入信号进行放大;二级全差分OTA单元,包括第一级全差分OTA单元及第二级全差分OTA单元,用于对输入信号进行处理后输出模拟信号;量化比较单元,用于对二级全差分OTA单元输出的模拟信号进行量化比较;反馈补偿单元,用于根据量化比较单元输出的比较结果对二级全差分OTA单元进行补偿;时序控制单元,用于对预放大单元、二级全差分OTA单元、量化比较单元及反馈补偿单元进行时序控制。本发明可适用于小信号的有效提取和量化转出,二级OTA的设计能够实现比较小的谐波失真和比较好的线性稳定性,具有较佳的抗干扰性能和感应灵敏度。

Description

信号调制电路 技术领域
本发明属于集成电路技术领域,具体涉及一种信号调制电路。
背景技术
随着科技时代发展,在集成电路应用领域,现代人们越来越追求芯片性能稳定性以及可靠性。其中关于红外探测技术的研究最早是为科学研究和军事用途而研发的技术,但随着半导体技术、新型材料的发展,生产成本不断降低,各种廉价的红外线传感器相继问世。
热释电红外传感器目前正在被广泛的应用到各种自动化控制装置中,同时也会根据器独有的特性,结合其他电路开发出更加优秀的产品或自动化控制装置。传统的方式处理热释电红外传感器信号多为模拟运算放大器加RC滤波电路进行放大提取,其本身电路结构决定了芯片往往在滤波、抗干扰、感应灵敏度方面不能有很好的处理。
因此,针对上述技术问题,有必要提供一种信号调制电路。
发明内容
本发明的目的在于提供一种信号调制电路,本发明基于Sigma-Delta(∑-Δ)结构思想设计出的调制电路,可将热释电红外传感器探测到人体活动转换的电信号进行调制转换成数字信号,可直接用于数字单元进行处理。
为了实现上述目的,本发明一实施例提供的技术方案如下:
一种信号调制电路,所述信号调制电路包括:
预放大单元,用于对提取的输入信号进行放大;
二级全差分OTA单元,包括第一级全差分OTA单元及第二级全差分OTA单元,用于对输入信号进行处理后输出模拟信号;
量化比较单元,用于对二级全差分OTA单元输出的模拟信号进行量化比较;
反馈补偿单元,用于根据量化比较单元输出的比较结果对二级全差分OTA单元进行补偿;
时序控制单元,用于对预放大单元、二级全差分OTA单元、量化比较单元及反馈补偿单元进行时序控制。
一实施例中,所述预放大单元与第一信号输入端Si-和第二信号输入端Si+相连,预放大单元中集成有与第一信号输入端Si-和第二信号输入端Si+相连的电容C1。
一实施例中,所述二级全差分OTA单元包括:
第一级全差分OTA单元,包括第一OTA放大器及并联于第一OTA放大器输入端和输出端之间的电容C2;
第二级全差分OTA单元,包括第二OTA放大器及并联于第二OTA放大器输入端和输出端之间的电容C4;
及,串联于第一OTA放大器输出端和第二OTA放大器输入端之间的电容C3。
一实施例中,所述二级全差分OTA单元在n+1时刻的输出电压为:
Figure PCTCN2020121867-appb-000001
其中,ΔVoutn2为第二级全差分OTA单元在n时刻的输出电压,ΔVoutn1为第一级全差分OTA单元在n时刻的输出电压,ΔVin1为第一级全差分OTA单元的输入电压,ΔVref为反馈补偿单元提供的电压差。
一实施例中,所述第一信号输入端Si-和第二信号输入端Si+与预放大单元之间串联设有开关T1,第一信号输入端Si-和第二信号输入端Si+之间并联设有开关T2,第一OTA放大器输出端与电容C3之间串联设有开关T1,第一OTA放大器输出端之间并联设有开关T2,第二OTA放大器输入端与电容C3之间串联设有开关T2,所述开关T1和开关T2为时序开关。
一实施例中,所述第一OTA放大器和/或第二OTA放大器的输入端通过开关T1与参考电压Vt相连。
一实施例中,所述反馈补偿单元包括:
电容Cb1和Cb2,分别与第一OTA放大器及第二OTA放大器的输入端相连;
开关T1,设于第一OTA放大器及第二OTA放大器的输入端与电容Cb1和Cb2之间、以及并联于电容Cb1和Cb2两端;
开关T2,与电容Cb1和Cb2分别相连;
开关Fb1和Fb2,设于开关T2和电压Vref+及Vref-之间;
所述开关T1、T2及开关Fb1、Fb2为时序开关。
一实施例中,所述量化比较单元用于对二级全差分OTA单元输出的模拟信号进行量化比较,当二级全差分OTA单元输出输出电压大于0时,量化比较单元输出逻辑电平1,当二级全差分OTA单元输出输出电压小于0时,量化比较单元输出逻辑电平0。
一实施例中,所述量化比较单元输出逻辑电平1时,反馈补偿单元对二级全差分OTA单元进行-Δvref的电压补偿,所述量化比较单元输出逻辑电平0时,反馈补偿单元对二级全差分OTA单元进行+Δvref的电压补偿。
一实施例中,所述第二信号输入端Si+输入的信号与电压Vref满足:
Figure PCTCN2020121867-appb-000002
其中,m为量化比较单元输出逻辑电平1的数量,n为量化比较单元输出逻辑电平0的数量。
与现有技术相比,本发明具有以下优点:
本发明可适用于小信号的有效提取和量化转出,二级OTA的设计能够实现比较小的谐波失真和比较好的线性稳定性,具有较佳的抗干扰性能和感应灵敏度。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案,下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本发明中记载的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。
图1为本发明中信号调制电路的模块示意图;
图2为本发明一具体实施例中信号调制电路的电路原理图;
图3为本发明一具体实施例中反馈补偿单元的电路原理图;
图4为本发明一具体实施例中信号调制电路的时序控制图。
具体实施方式
以下将结合附图所示的各实施方式对本发明进行详细描述。但该等实施方式并不限制本发明,本领域的普通技术人员根据该等实施方式所做出的结构、方法、或功能上的变换均包含在本发明的保护范围内。
参图1所示,本发明公开了一种信号调制电路,包括:
预放大单元(Pre),用于对提取的输入信号进行放大;
二级全差分OTA单元(Two-Step OTA),包括第一级全差分OTA单元及第二级全差分OTA单元,用于对输入信号进行处理后输出模拟信号;
量化比较单元(Comp),用于对二级全差分OTA单元输出的模拟信号进行量化比较;
反馈补偿单元(Feedback),用于根据量化比较单元输出的比较结果对二级全差分OTA单元进行补偿;
时序控制单元(Timing1、Timing2、Timing3),用于对预放大单元、二级全差分OTA单元、量化比较单元及反馈补偿单元进行时序控制。
本发明的信号调制电路通过严格时序控制电路来实现预放大单元、二级全差分OTA单元、量化比较单元和反馈补偿单元的工作状态。
其中,预放大单元可根据实际信号强弱进行1倍、2倍、4倍、8倍调节放 大,再将处理后信号送达至全差分跨导电路(即二级全差分OTA单元)。全差分跨导电路采用2级连方式设计,相比与单级电路,二级设计在量化输出一位情况下,能够实现比较小的谐波失真和比较好的线性稳定性。二级全差分跨导电路求和完成后的信号会直接送入量化比较电路,量化比较单元同时可以降低噪声信号干扰,并且在周期转换时间内能有效的进行量化输出。量化比较单元输出结果同时送给后级数字电路处理单元(DSP)和反馈补偿单元进行数字信号处理以及严格时序电路控制。
以下结合具体实施例对本发明作进一步说明。
本实施例中信号调制电路对热释电红外探测器输出信号进行放大提取量化,在不失真的情况完成对变化的信号有效转换成数字信号。热释电红外探测器输出信号幅值约1mV,输出频率约1赫兹,其中心电压约为0.7V。
参图2所示为本发明一具体实施例中信号调制电路的电路原理图,预放大单元与第一信号输入端Si-和第二信号输入端Si+相连,预放大单元中集成有与第一信号输入端Si-和第二信号输入端Si+相连的电容C1。
二级全差分OTA单元包括:
第一级全差分OTA单元,包括第一OTA放大器及并联于第一OTA放大器输入端和输出端之间的电容C2;
第二级全差分OTA单元,包括第二OTA放大器及并联于第二OTA放大器输入端和输出端之间的电容C4;
及,串联于第一OTA放大器输出端和第二OTA放大器输入端之间的电容C3。
另外,第一信号输入端Si-和第二信号输入端Si+与预放大单元之间串联设有开关T1,第一信号输入端Si-和第二信号输入端Si+之间并联设有开关T2,第一OTA放大器输出端与电容C3之间串联设有开关T1,第一OTA放大器输出端之间并联设有开关T2,第二OTA放大器输入端与电容C3之间串联设有开关T2,第一OTA放大器和/或第二OTA放大器的输入端通过开关T1与参考电压Vt相连。
本实施例中的开关T1和开关T2为时序开关,即在t1时刻,开关T1全部导通,开关T2断开,而在t2时刻,开关T2全部导通,开关T1断开。
第一信号输入端Si-、第二信号输入端Si+是接收信号两个输入端口,具体实施过程中,Si-端口接入0V电压值,Si+端口则需接入热释电红外传感器信号输出端口,在某一时刻开始对Si+端口输入信号进行读取,且预放大单元选择了1倍信号输入,则在这个转换时间周期内,到达图2中A点电压值VA,到达图2中B点电压值为VB其产生的差值为ΔVin1。通过第一级OTA处理后输出端口C点和D点电压值变为VC和VD。对于第一级OTA定义公式:
ΔVin1=VA-VB;
ΔVout1=VC-VD;
定义n态为当前转换周期时刻,n-1态为前一转换周期,n+1为下一个转周期,则有:
C2×[ΔVoutn1-ΔVoutn-11]=C1*ΔVin1±Cb1*ΔVref;
在预放大单元选择1倍调节倍数下Cb1=C1,可得:
ΔVoutn1=ΔVoutn-11+(C1/C2)×(ΔVin1±ΔVref);
ΔVoutn+11=ΔVoutn1+(C1/C2)×(ΔVin1±ΔVref)。
同时在第二级OTA输入端的E点和F点,读取电压值为VE和VF,其产生差值为ΔVin2,通过第二级OTA处理后输出电压为:
ΔVoutn+12=ΔVoutn2+(C3/C4)×(ΔVin2±ΔVref);
那么对于两级OTA运算处理的输出计算公式有:
Figure PCTCN2020121867-appb-000003
其中,ΔVoutn2为第二级全差分OTA单元在n时刻的输出电压,ΔVoutn1为第一级全差分OTA单元在n时刻的输出电压,ΔVin1为第一级全差分OTA单元的输入电压,ΔVref为反馈补偿单元提供的电压差。
由上述公式可以得出,ΔVout2会根据±ΔVref数量在正负之间徘徊,最后送入量化比较单元进行量化输出逻辑电压。
参图3所示,本实施例中的反馈补偿单元包括:
电容Cb1和Cb2,分别与第一OTA放大器及第二OTA放大器的输入端相连;
开关T1,设于第一OTA放大器及第二OTA放大器的输入端与电容Cb1和Cb2之间、以及并联于电容Cb1和Cb2两端;
开关T2,与电容Cb1和Cb2分别相连;
开关Fb1和Fb2,设于开关T2和电压Vref+及Vref-之间;
开关T1、T2及开关Fb1、Fb2为时序开关。
第一时刻通过开关T1控制对电容Cb1和电容Cb2进行充电,充电完成后,在第二时刻通过开关T2将Cb1和Cb2串接完成ΔVref转换,此时图3中A端和B端的电压差值为ΔVref,可以将其直接送入OTA输入端进行补偿。
本实施例中的量化比较单元用于对二级全差分OTA单元输出的模拟信号进行量化比较:
当二级全差分OTA单元输出输出电压ΔVout2大于0时,量化比较单元输出逻辑电平1;
当二级全差分OTA单元输出输出电压ΔVout2小于0时,量化比较单元输出逻辑电平0。
最后将产生的逻辑电平1与0送入数字信号处理单元,同时也用于反馈补偿电路对OTA1与OTA2进行补偿控制。
对于反馈补偿单元则是由输出逻辑电平1和0进行控制,具体为:
量化比较单元输出逻辑电平1时,反馈补偿单元对二级全差分OTA单元进行-Δvref的电压补偿,上述各公式中“±”取“-”;
量化比较单元输出逻辑电平0时,反馈补偿单元对二级全差分OTA单元进行+Δvref的电压补偿,上述各公式中“±”取“+”。
结合图2-图4所示,本实施例中完整的调制电路能完成对Si+信号的转换工作,整个电路最后完成的电路功能包括:
时刻1,Si+接收到热释电红外传感器信号Vin后在OTA1输入端产生ΔVin1将大于0,使得OTA1和OTA2输出ΔVout1、ΔVout2均大于0,量化比较单元输出逻辑电平1;
时刻2,Si+继续接收到热释电红外传感器信号Vin后在OTA1输入端产生ΔVin1,同时此时反馈补偿电路使ΔVin1-ΔVref,若此时ΔVin1-ΔVref仍大于0,量化比较单元输出逻辑电平1,直到ΔVin1-ΔVref变为小于0,则量化比较单元输出逻辑电平0。那么下一时刻输入端将变为ΔVin1+ΔVref,电路将按此状态一直工作下去。量化比较单元输出端则会产生一系列1和0相间的电平信号。
第二信号输入端Si+输入的信号与电压Vref满足:
Figure PCTCN2020121867-appb-000004
其中,m为量化比较单元输出逻辑电平1的数量,n为量化比较单元输出逻辑电平0的数量。
应当理解的是,本发明中的电路可以对多种信号进行放大提取量化,而不限于上述实施例所述的热释电红外感应器探测信号。
由以上技术方案可以看出,本发明具有以下有益效果:
本发明可适用于小信号的有效提取和量化转出,二级OTA的设计能够实现比较小的谐波失真和比较好的线性稳定性,具有较佳的抗干扰性能和感应灵敏度。
对于本领域技术人员而言,显然本发明不限于上述示范性实施例的细节,而且在不背离本发明的精神或基本特征的情况下,能够以其他的具体形式实现本发明。因此,无论从哪一点来看,均应将实施例看作是示范性的,而且是非限制性的,本发明的范围由所附权利要求而不是上述说明限定,因此旨在将落在权利要求的等同要件的含义和范围内的所有变化囊括在本发明内。不应将权利要求中的任何附图标记视为限制所涉及的权利要求。
此外,应当理解,虽然本说明书按照实施例加以描述,但并非每个实施例仅包含一个独立的技术方案,说明书的这种叙述方式仅仅是为清楚起见,本领域技术人员应当将说明书作为一个整体,各实施例中的技术方案也可以经适当组合,形成本领域技术人员可以理解的其他实施方式。

Claims (10)

  1. 一种信号调制电路,其特征在于,所述信号调制电路包括:
    预放大单元,用于对提取的输入信号进行放大;
    二级全差分OTA单元,包括第一级全差分OTA单元及第二级全差分OTA单元,用于对输入信号进行处理后输出模拟信号;
    量化比较单元,用于对二级全差分OTA单元输出的模拟信号进行量化比较;
    反馈补偿单元,用于根据量化比较单元输出的比较结果对二级全差分OTA单元进行补偿;
    时序控制单元,用于对预放大单元、二级全差分OTA单元、量化比较单元及反馈补偿单元进行时序控制。
  2. 根据权利要求1所述的信号调制电路,其特征在于,所述预放大单元与第一信号输入端Si-和第二信号输入端Si+相连,预放大单元中集成有与第一信号输入端Si-和第二信号输入端Si+相连的电容C1。
  3. 根据权利要求2所述的信号调制电路,其特征在于,所述二级全差分OTA单元包括:
    第一级全差分OTA单元,包括第一OTA放大器及并联于第一OTA放大器输入端和输出端之间的电容C2;
    第二级全差分OTA单元,包括第二OTA放大器及并联于第二OTA放大器输入端和输出端之间的电容C4;
    及,串联于第一OTA放大器输出端和第二OTA放大器输入端之间的电容C3。
  4. 根据权利要求3所述的信号调制电路,其特征在于,所述二级全差分OTA单元在n+1时刻的输出电压为:
    Figure PCTCN2020121867-appb-100001
    其中,ΔVoutn2为第二级全差分OTA单元在n时刻的输出电压,ΔVoutn1为第一级全差分OTA单元在n时刻的输出电压,ΔVin1为第一级全差分OTA单元的输入电压,ΔVref为反馈补偿单元提供的电压差。
  5. 根据权利要求3所述的信号调制电路,其特征在于,所述第一信号输入端Si-和第二信号输入端Si+与预放大单元之间串联设有开关T1,第一信号输入端Si-和第二信号输入端Si+之间并联设有开关T2,第一OTA放大器输出端与电容C3之间串联设有开关T1,第一OTA放大器输出端之间并联设有开关T2,第二OTA放大器输入端与电容C3之间串联设有开关T2,所述开关T1和开关T2为时序开关。
  6. 根据权利要求5所述的信号调制电路,其特征在于,所述第一OTA放大器和/或第二OTA放大器的输入端通过开关T1与参考电压Vt相连。
  7. 根据权利要求5所述的信号调制电路,其特征在于,所述反馈补偿单元包括:
    电容Cb1和Cb2,分别与第一OTA放大器及第二OTA放大器的输入端相连;
    开关T1,设于第一OTA放大器及第二OTA放大器的输入端与电容Cb1和Cb2之间、以及并联于电容Cb1和Cb2两端;
    开关T2,与电容Cb1和Cb2分别相连;
    开关Fb1和Fb2,设于开关T2和电压Vref+及Vref-之间;
    所述开关T1、T2及开关Fb1、Fb2为时序开关。
  8. 根据权利要求7所述的信号调制电路,其特征在于,所述量化比较单元用于对二级全差分OTA单元输出的模拟信号进行量化比较,当二级全差分OTA单元输出输出电压大于0时,量化比较单元输出逻辑电平1,当二级全差分OTA单元输出输出电压小于0时,量化比较单元输出逻辑电平0。
  9. 根据权利要求8所述的信号调制电路,其特征在于,所述量化比较单元输出逻辑电平1时,反馈补偿单元对二级全差分OTA单元进行-Δvref的电压补偿,所述量化比较单元输出逻辑电平0时,反馈补偿单元对二级全差分OTA单元进行+Δvref的电压补偿。
  10. 根据权利要求9所述的信号调制电路,其特征在于,所述第二信号输入端Si+输入的信号与电压Vref满足:
    Figure PCTCN2020121867-appb-100002
    其中,m为量化比较单元输出逻辑电平1的数量,n为量化比较单元输出逻辑电平0的数量。
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