WO2021082093A1 - 显示面板及其制备方法 - Google Patents

显示面板及其制备方法 Download PDF

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Publication number
WO2021082093A1
WO2021082093A1 PCT/CN2019/118951 CN2019118951W WO2021082093A1 WO 2021082093 A1 WO2021082093 A1 WO 2021082093A1 CN 2019118951 W CN2019118951 W CN 2019118951W WO 2021082093 A1 WO2021082093 A1 WO 2021082093A1
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Prior art keywords
layer
display panel
preparation step
cathode
hole
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PCT/CN2019/118951
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English (en)
French (fr)
Inventor
梁晓明
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深圳市华星光电半导体显示技术有限公司
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Priority to US16/625,710 priority Critical patent/US20210234117A1/en
Publication of WO2021082093A1 publication Critical patent/WO2021082093A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/805—Electrodes
    • H10K59/8052—Cathodes
    • H10K59/80522—Cathodes combined with auxiliary electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/124—Insulating layers formed between TFT elements and OLED elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/805—Electrodes
    • H10K50/82—Cathodes
    • H10K50/824—Cathodes combined with auxiliary electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment

Definitions

  • the invention relates to the field of display, in particular to a display panel and a preparation method thereof.
  • OLED Organic Light Emitting Diode
  • OLED Organic Light Emitting Diode
  • AMOLED displays can be divided into bottom-emitting and top-emitting structures according to whether the light is emitted from the direction of the array substrate or the direction of the cover plate. The top-emitting structure needs to emit light through the cathode, so the cathode must have a certain transmittance.
  • cathode materials used in top-emitting devices include magnesium-silver alloys, transparent oxides, and the like.
  • the thickness of the cathode will be made thinner, resulting in a larger sheet resistance of the cathode. Therefore, in large-size OLED display devices, the light-emitting area far away from the cathode power input will have a voltage drop (IR Drop), resulting in the device's light-emitting brightness lower than the light-emitting area close to the cathode power input, resulting in uneven light-emitting brightness of the entire display device .
  • IR Drop voltage drop
  • the existing display panel directly fabricates an auxiliary cathode 100 on the array substrate, and the auxiliary cathode 100 is connected to the cathode layer 300 of the display panel to reduce the size of the cathode layer 300. resistance.
  • the various film layers of OLED use opening vapor deposition mask during the vapor deposition process. Due to the film formation sequence, the position reserved for the cathode and the auxiliary cathode overlap will be affected.
  • the organic thin film 200 covers, so that the auxiliary cathode 100 and the cathode layer 300 cannot be directly connected, causing the auxiliary cathode 100 to fail.
  • the purpose of the present invention is to solve the technical problem that the cathode and the auxiliary cathode in the existing display panel are blocked by organic materials, so that the auxiliary cathode cannot be connected to the cathode, and the auxiliary cathode fails.
  • Another object of the present invention is to solve the technical problems of the voltage drop of the existing display device and the uneven brightness of the display device.
  • the present invention provides a display panel, including: an insulating layer; a passivation layer, which is provided on the surface of one side of the insulating layer; and an auxiliary cathode is arranged in the passivation layer and attached to the insulating layer.
  • the display panel further includes an organic layer, which is provided on the surface of the pixel defining layer away from the flat layer; and a cathode layer, which is provided on the conductor layer and the organic layer is away from the pixel defining layer The surface on one side.
  • the thickness of the conductor layer is smaller than the depth of the through hole.
  • the material of the conductor layer is nano silver.
  • the cathode layer is electrically connected to the conductor layer; the conductor layer is electrically connected to the auxiliary cathode.
  • the display panel further includes: a substrate; a buffer layer provided on the surface of one side of the substrate; an active layer provided on the surface of the buffer layer away from the substrate; a gate insulating layer provided On the surface of the active layer on the side away from the buffer layer; the gate layer is provided on the surface on the side of the gate insulating layer away from the active layer; and the source and drain layers are provided on the insulating layer The layer is away from the surface on one side of the buffer layer, passes through the insulating layer, and is electrically connected to the active layer.
  • the present invention also provides a method for preparing a display panel, which includes the following steps: an insulating layer preparation step, an insulating layer is prepared on the upper surface of a substrate; an auxiliary cathode preparation step, on the upper surface of the insulating layer An auxiliary cathode is prepared; a passivation layer preparation step is to prepare a passivation layer on the upper surface of the insulating layer and the auxiliary cathode; a flattening layer preparation step is to prepare a flattening layer on the upper surface of the passivation layer; pixels The defining layer preparation step is to prepare a pixel defining layer on the upper surface of the flat layer; the through hole setting step is to sequentially penetrate the pixel defining layer, the flat layer and the passivation layer above the auxiliary cathode to form A through hole; and a conductor layer preparation step, preparing a conductor layer in the through hole.
  • the conductor layer preparation step includes: an organic layer preparation step, an organic layer is prepared on the upper surface of the pixel definition layer, and a second organic layer is formed on the inner sidewall and the bottom of the through hole;
  • an organic solvent is added to the through holes to dissolve the second organic layer to form a first reaction liquid;
  • a nano silver solution is added to the through holes to form a first reaction liquid.
  • a second reaction liquid is formed; and
  • a conductive step is to process the second reaction liquid to form a conductive layer.
  • the preparation method of the display panel further includes a cathode layer preparation step in which a cathode layer is prepared on the upper surface of the organic layer and the conductor layer.
  • the second reaction liquid is vacuum-baked to volatilize the organic solvent to precipitate nano-silver.
  • the technical effect of the present invention is to add a conductive layer in the through hole above the auxiliary cathode, the conductive layer has good conductivity, so that the cathode layer can be effectively overlapped with the auxiliary cathode, the square resistance of the cathode layer is reduced, and the display panel is improved.
  • the voltage drop further improves the uniformity of the luminous brightness of the display panel.
  • FIG. 1 is a schematic diagram of the structure of a display panel in the prior art
  • FIG. 2 is a schematic structural diagram of a display panel according to an embodiment of the present invention.
  • FIG. 3 is a flowchart of a manufacturing method of a display panel according to an embodiment of the present invention.
  • FIG. 4 is a schematic diagram of the structure of the display panel after the through hole setting step according to the embodiment of the present invention.
  • FIG. 5 is a flowchart of the steps of preparing a conductor layer according to an embodiment of the present invention.
  • FIG. 6 is a schematic diagram of the structure of the display panel after the organic layer preparation step according to the embodiment of the present invention.
  • FIG. 7 is a schematic structural diagram of the display panel after the first reaction solution preparation step according to the embodiment of the present invention.
  • FIG. 8 is a schematic diagram of the structure of the display panel after the second reaction solution preparation step according to the embodiment of the present invention.
  • the component can be directly placed on the other component; there may also be an intermediate component on which the component is placed , And the intermediate component is placed on another component.
  • a component is described as “installed to” or “connected to” another component, both can be understood as directly “installed” or “connected”, or a component is “installed to” or “connected to” through an intermediate component Another component.
  • this embodiment provides a display panel, including a substrate 1, a light-shielding layer 2, a buffer layer 3, an active layer 4, a gate insulating layer 5, a gate layer 6, an insulating layer 7, and source and drain electrodes.
  • the substrate 1 is a glass substrate, which functions as a support and a substrate.
  • the light shielding layer 2 is provided on the upper surface of the substrate 1 and plays a role of shielding light.
  • the material of the light-shielding layer 2 is a light-shielding material, and the light-shielding material is a metal, including: molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), etc., or an alloy.
  • the buffer layer 3 is provided on the upper surface of the light-shielding layer 2 and the substrate 1, and serves as a buffer.
  • the material of the buffer layer 3 is an inorganic material.
  • the inorganic material includes silicon oxide or silicon nitride, or oxide and Multi-layer structure of silicon nitride.
  • the active layer 4 is provided on the upper surface of the buffer layer 3, and the material of the active layer 4 is a semiconductor material, the semiconductor material includes indium gallium zinc oxide (IGZO), indium gallium titanium oxide (IZTO), indium gallium zinc titanium Oxide (IGZTO).
  • IGZO indium gallium zinc oxide
  • IZTO indium gallium titanium oxide
  • IGZTO indium gallium zinc titanium Oxide
  • the active layer 4 is disposed above the light shielding layer 2, that is, the active layer 4 is disposed opposite to the light shielding layer 2, and the active layer 4 provides circuit support for the display panel.
  • the gate insulating layer 5 is provided on the upper surface of the active layer 4, and the material of the gate insulating layer 5 is an inorganic material.
  • the inorganic material includes silicon oxide or silicon nitride or a multilayer film structure.
  • the gate insulating layer 5 is disposed opposite to the active layer 4, and the gate insulating layer 5 functions as an insulation to prevent short circuits between the lines inside the display panel.
  • the gate layer 6 is provided on the upper surface of the gate insulating layer 5.
  • the material of the gate layer 6 is a metal material, and the metal material includes molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), etc. , Or alloy, or multilayer film structure.
  • the gate layer 6 is arranged opposite to the gate insulating layer 5.
  • the insulating layer 7 is provided on the upper surfaces of the gate layer 6, the active layer 4, and the buffer layer 3.
  • the insulating layer 7 is made of inorganic material, and the inorganic material includes silicon oxide or silicon nitride or multiple layers.
  • the film structure plays a role of insulation and prevents short circuits.
  • An insulating layer through hole is provided above the active layer 4. The insulating layer through hole penetrates the insulating layer 7, and the insulating layer through hole facilitates the electrical connection between the electrode layer 12 and the active layer 4.
  • the source-drain layer 8 is provided on the upper surface of the insulating layer 7, and the material of the source-drain layer 8 includes metal materials including molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), etc. , Or alloy, or multilayer film structure. Part of the metal material is provided in the insulating layer through hole, and the source and drain layer 8 is electrically connected to the active layer 4 through the insulating layer through hole to form a circuit connection.
  • Mo molybdenum
  • Al aluminum
  • Cu copper
  • Ti titanium
  • the auxiliary cathode 9 is arranged on the upper surface of the insulating layer 7, and the auxiliary cathode 9 can be overlapped with the cathode to reduce the sheet resistance of the cathode.
  • the passivation layer 10 is provided on the upper surfaces of the insulating layer 7, the source and drain layers 8 and the auxiliary cathode 9.
  • the material of the passivation layer 10 includes silicon oxide material.
  • the passivation layer 10 plays a role of insulation and isolation of external water and oxygen.
  • the planarization layer 11 is provided on the upper surface of the passivation layer 10, and the planarization layer 11 makes the surface of the film layer flat, which facilitates the bonding of subsequent film layers and prevents the phenomenon of detachment.
  • a flat layer through hole is provided on the flat layer 11, and the flat layer through hole is arranged opposite to the source and drain layer 8 to provide a channel for the electrode layer 12.
  • the electrode layer 12 is provided on the upper surface of the flat layer 11, the electrode layer 12 is a pixel electrode, and the material of the electrode layer 12 is indium tin oxide material, which fills the flat layer through holes, so that the electrode layer 12 is electrically connected to the source and drain layer 8 sexual connection provides circuit support for the subsequent luminescence of luminescent materials.
  • the pixel defining layer 13 is provided on the upper surfaces of the flat layer 11 and the electrode layer 12, and plays a role in defining the size of the light emitting layer of the display panel.
  • the through hole 14 (refer to FIG. 4) sequentially penetrates the pixel definition layer 13, the flat layer 11 and the passivation layer 10, and the through hole 14 is arranged opposite to the auxiliary cathode 9 to provide a channel for the conductor layer 17 and the cathode layer 18.
  • the organic layer 15 is provided on the upper surface of the pixel definition layer 13.
  • the material of the organic layer 15 is an organic material, and the organic layer 15 is a stacked structure of multiple organic film layers, including a hole injection layer, a hole transport layer, and an electron injection layer , Electron transport layer, etc.
  • the conductor layer 17 is arranged in the through hole 14 and connected to the auxiliary cathode 9.
  • the conductor layer 17 is made of nano-silver and has good conductivity.
  • the thickness of the conductive layer 17 is less than the depth of the through hole 14.
  • the conductive layer 17 acts as a bridge between the auxiliary cathode 9 and the cathode layer 18, so that the cathode layer 18 can be effectively connected to the auxiliary cathode 9, reducing the voltage drop of the display panel and further improving The display uniformity of the display panel.
  • the cathode layer 18 is provided on the upper surface of the organic layer 15 and the conductive layer 17.
  • the cathode layer 18 is effectively connected to the auxiliary cathode 9 through the conductive layer 17, reducing the voltage drop of the display panel and further improving the display uniformity of the display panel.
  • the technical effect of the display panel of this embodiment is that a conductive layer is added in the through hole above the auxiliary cathode.
  • the conductive layer has good conductivity, so that the cathode layer can be effectively overlapped with the auxiliary cathode, reducing the block size of the cathode layer.
  • the resistance improves the voltage drop of the display panel and further improves the uniformity of the luminous brightness of the display panel.
  • this embodiment also provides a method for manufacturing a display panel, including steps S1 to S12.
  • the buffer layer preparation step is to deposit a layer of light-shielding material on the upper surface of a substrate, form a light-shielding layer after patterning, and deposit a layer of inorganic material on the light-shielding layer and the upper surface of the substrate.
  • the inorganic material includes silicon.
  • the active layer preparation step forming a layer of semiconductor material on the upper surface of the buffer layer, the semiconductor material includes indium gallium zinc oxide (IGZO), indium gallium titanium oxide (IZTO), indium gallium zinc titanium oxide (IGZTO) and so on.
  • IGZO indium gallium zinc oxide
  • IZTO indium gallium titanium oxide
  • IGZTO indium gallium zinc titanium oxide
  • a layer of inorganic material is deposited on the upper surface of the active layer, and the inorganic material includes silicon oxide or silicon nitride or a multilayer film structure.
  • a gate insulating layer is formed.
  • the gate insulating layer is disposed opposite to the active layer.
  • the gate insulating layer functions as an insulation and prevents short circuits between the lines inside the display panel.
  • a layer of metal material is sputtered on the upper surface of the gate insulating layer, and the metal material includes molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), etc., Either an alloy or a multilayer film structure.
  • Mo molybdenum
  • Al aluminum
  • Cu copper
  • Ti titanium
  • a gate electrode layer is formed, and the gate electrode layer is disposed opposite to the gate insulating layer.
  • the semiconductor material, the inorganic material, and the metal material may be sequentially formed, and finally the patterning process is performed to form the gate layer, the gate insulating layer, and the semiconductor layer in sequence.
  • the insulating layer preparation step depositing a layer of inorganic material on the upper surface of the gate layer, the active layer and the buffer layer, the inorganic material includes silicon oxide or silicon nitride or multiple layers
  • the film structure plays a role of insulation and prevents short circuits.
  • an insulating layer through hole is formed on the insulating layer above the active layer. The insulating layer through hole penetrates the insulating layer, and the insulating layer through hole facilitates the contact between the electrode layer and the electrode layer. The electrical connection between the active layers.
  • a layer of metal material is sputtered on the upper surface of the insulating layer, the metal material includes molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), etc., or an alloy , Or multi-layer film structure.
  • Mo molybdenum
  • Al aluminum
  • Cu copper
  • Ti titanium
  • an alloy Or multi-layer film structure.
  • a source and drain layer and an auxiliary cathode are formed.
  • the source and drain layer is disposed opposite to the active layer, and some metal materials are disposed in the through hole of the insulating layer.
  • the source and drain layer passes through the The insulating layer through hole is electrically connected to the active layer to form a circuit connection.
  • the auxiliary cathode can be overlapped with the cathode to reduce the sheet resistance of the cathode.
  • the passivation layer preparation step is to prepare a passivation layer on the upper surface of the auxiliary cathode, the source and drain layers, and the insulating layer, and the passivation layer is made of silicon oxide material. To the insulating effect and the effect of isolating water and oxygen from the outside.
  • the step of preparing a flat layer is to prepare a flat layer on the upper surface of the passivation layer, and the flat layer makes the surface of the film layer flat, which facilitates the bonding of the subsequent film layers and prevents the phenomenon of separation.
  • a flat layer through hole is formed on the flat layer, and the flat layer through hole is arranged opposite to the source and drain layer to provide a channel for the electrode layer.
  • a layer of indium tin oxide material is vapor-deposited on the planarization layer to fill the through holes of the planarization layer.
  • an electrode layer is formed. The electrode layer is electrically connected to the source and drain layers, which is a follow-up The luminescence of the luminescent material provides circuit support.
  • a pixel definition layer is prepared on the upper surface of the electrode layer and the flat layer to define the size of the light-emitting layer.
  • a through hole 14 is formed (see FIG. 4).
  • the through hole 14 sequentially penetrates the pixel definition layer 13, the flat layer 11 and the passivation layer 10, and the through hole 14 and the auxiliary
  • the cathodes 9 are arranged opposite to each other to provide channels for the conductor layer 17 and the cathode layer 18.
  • Conductor layer preparation step a conductor layer 17 is prepared in the through hole 14.
  • the material of the conductor layer 17 is nano-silver, which has good conductivity.
  • the conductor layer preparation step includes steps S111 to S114.
  • an organic layer is prepared on the upper surface of the pixel definition layer 13 (see FIG. 6), a second organic layer 151 is formed on the inner sidewall and the bottom of the through hole 14, and the organic layer 15 is a multilayer organic film layer
  • the laminated structure includes a hole injection layer, a hole transport layer, an electron injection layer, an electron transport layer, etc.
  • the first reaction solution preparation step is to use inkjet printing technology to print an organic solvent in the through hole (see FIG. 7), cover the second organic layer 151 above the auxiliary cathode 9, and dissolve it.
  • the first reaction solution 16 is formed.
  • the inkjet printing technology is used to add a nano silver solution above the first reaction liquid and mix with the first reaction liquid to form a second reaction liquid.
  • a cathode layer 18 is prepared on the upper surfaces of the conductive layer 17 and the organic layer 15 (see FIG. 2).
  • the cathode layer 18 is effectively connected to the auxiliary cathode 9 through the conductor layer 17, which reduces the voltage drop of the display panel and further improves the display uniformity of the display panel.
  • the technical effect of the preparation method of the display panel in this embodiment is that a conductive layer is prepared in the through hole above the auxiliary cathode, and the conductive layer has good conductivity, so that the cathode layer can effectively overlap the auxiliary cathode and reduce the cathode
  • the sheet resistance of the layer improves the voltage drop of the display panel and further improves the uniformity of the luminous brightness of the display panel.

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Abstract

一种显示面板及其制备方法，显示面板包括：绝缘层（7）、钝化层（10）、辅助阴极（9）、平坦层（11）、像素定义层（13）、通孔（14）以及导体层（17）。显示面板的制备方法包括：绝缘层制备步骤（S5）、辅助阴极制备步骤（S6）、钝化层制备步骤（S7）、平坦层制备步骤（S8）、像素定义层制备步骤（S9）、通孔设置步骤（S10）以及导体层制备步骤（S11）。

Description

显示面板及其制备方法 技术领域
本发明涉及显示领域，特别涉及一种显示面板及其制备方法。
 背景技术
有机发光二极管OLED（Organic Light Emitting Diode）由于其具有柔性，响应时间快，色域广，能耗低等特点得到很大的关注和发展。OLED由阳极、阴极以及电极之间的一层或多层的有机材料构成，在一定的电压下，空穴和电子分别从阳极和阴极注入传输到有机发光层中，复合形成激子，激子辐射跃迁发光。AMOLED显示器按照从array基板方向出光还是从盖板方向出光可以分为底发光和顶发光结构。顶发光的结构需要透过阴极发光，所以阴极必须具有一定的透过率。
目前在顶发光器件用的阴极材料有镁银合金，透明氧化物等。为保证阴极有较好的透过率，阴极的厚度会做得比较薄，导致阴极的方块电阻较大。因此在大尺寸OLED显示设备中，远离阴极电源输入的发光区域会出现电压降的情况（IR Drop），导致器件发光亮度低于靠近阴极电源输入的发光区域，造成整个显示设备的发光亮度不均匀。
为了解决大尺寸显示设备电压降的问题，如图1所示，现有的显示面板直接在阵列基板上制作辅助阴极100，辅助阴极100与显示面板的阴极层300连接，降低阴极层300的方块电阻。但是在大尺寸OLED器件制备过程中，OLED的各种膜层在蒸镀成膜过程中采用开口蒸镀掩模版，由于成膜的顺序，预留给阴极与辅助阴极搭接用的位置会被有机薄膜200覆盖，使辅助阴极100与阴极层300无法直接相连，造成辅助阴极100的作用失效。
 技术问题
本发明的目的在于，解决现有的显示面板中阴极与辅助阴极之间被有机材料阻隔，使得辅助阴极与阴极无法相连，导致辅助阴极失效的技术问题。
本发明的另一目的在于，解决现有显示装置存在电压降，显示装置的发光亮度不均的技术问题。
 技术解决方案
为实现上述目的，本发明提供一种显示面板，包括：绝缘层；钝化层，设于所述绝缘层一侧的表面；所述钝化层内设有辅助阴极，贴附于所述绝缘层表面；平坦层，设于所述钝化层远离所述绝缘层一侧的表面；像素定义层，设于所述平坦层远离所述钝化层一侧的表面；通孔，依次贯穿所述像素定义层、所述平坦层及所述钝化层，所述通孔与所述辅助阴极相对设置；以及导体层，设于所述通孔内，且连接至所述辅助阴极。
进一步地，所述显示面板还包括有机层，设于所述像素定义层远离所述平坦层一侧的表面；以及阴极层，设于所述导体层及所述有机层远离所述像素定义层一侧的表面。
进一步地，所述导体层的厚度小于所述通孔的深度。
进一步地，所述导体层的材质为纳米银。
进一步地，所述阴极层电连接至所述导体层；所述导体层电连接至所述辅助阴极。
进一步地，所述显示面板还包括：基板；缓冲层，设于所述基板一侧的表面；有源层，设于所述缓冲层远离所述基板一侧的表面；栅极绝缘层，设于所述有源层远离所述缓冲层一侧的表面；栅极层，设于所述栅极绝缘层远离所述有源层一侧的表面；以及源漏极层，设于所述绝缘层远离所述缓冲层一侧的表面，且穿过所述绝缘层，电连接至所述有源层。
为实现上述目的，本发明还提供一种显示面板的制备方法，包括以下步骤：绝缘层制备步骤，在一基板的上表面制备出绝缘层；辅助阴极制备步骤，在所述绝缘层的上表面制备出辅助阴极；钝化层制备步骤，在所述绝缘层及所述辅助阴极的上表面制备出钝化层；平坦层制备步骤，在所述钝化层的上表面制备出平坦层；像素定义层制备步骤，在所述平坦层的上表面制备出像素定义层；通孔设置步骤，依次贯穿所述辅助阴极上方的所述像素定义层、所述平坦层及所述钝化层，形成一通孔；以及导体层制备步骤，在所述通孔内制备出导体层。
进一步地，所述导体层制备步骤包括：有机层制备步骤，在所述像素定义层的上表面制备出有机层，在所述通孔的内侧壁及其底部形成第二有机层；第一反应液制备步骤，在所述通孔内添加有机溶剂，溶解所述第二有机层后，形成第一反应液；第二反应液制备步骤，在所述通孔内添加纳米银溶液，与所述第一反应液混合后形成第二反应液；以及导体化步骤，导体化处理所述第二反应液，形成导体层。
进一步地，在所述导体层制备步骤之后，所述显示面板的制备方法还包括阴极层制备步骤，在所述有机层及所述导体层的上表面制备出阴极层。
进一步地，在所述导体化步骤中，真空烘烤所述第二反应液，挥发所述有机溶剂，析出纳米银。
 有益效果
本发明的技术效果在于，在辅助阴极上方的通孔内增加导体层，所述导体层具有良好的导电性，使得阴极层能有效搭接至辅助阴极，降低阴极层的方块电阻，改善显示面板的电压降，进一步提高显示面板的发光亮度的均匀性。
 附图说明
图1为现有技术中显示面板的结构示意图；
图2为本发明实施例所述显示面板的结构示意图；
图3为本发明实施例所述显示面板的制备方法的流程图；
图4为本发明实施例所述通孔设置步骤之后显示面板的结构示意图；
图5为本发明实施例所述导体层制备步骤的流程图；
图6为本发明实施例所述有机层制备步骤之后显示面板的结构示意图；
图7为本发明实施例所述第一反应液制备步骤之后显示面板的结构示意图；
图8为本发明实施例所述第二反应液制备步骤之后显示面板的结构示意图。
部分组件标识如下：
100、辅助阴极；200、有机薄膜；300、阴极层；
1、基板；2、遮光层；3、缓冲层；4、有源层；5、栅极绝缘层；6、栅极层；7、绝缘层；8、源漏极层；9、辅助阴极；10、钝化层；11、平坦层；12、电极层；13、像素定义层；14、通孔；15、有机层；151、第二有机层；16、第一反应液；17、导体层；18、阴极层。
 本发明的最佳实施方式
以下结合说明书附图详细说明本发明的优选实施例，以向本领域中的技术人员完整介绍本发明的技术内容，以举例证明本发明可以实施，使得本发明公开的技术内容更加清楚，使得本领域的技术人员更容易理解如何实施本发明。然而本发明可以通过许多不同形式的实施例来得以体现，本发明的保护范围并非仅限于文中提到的实施例，下文实施例的说明并非用来限制本发明的范围。
本发明所提到的方向用语，例如「上」、「下」、「前」、「后」、「左」、「右」、「内」、「外」、「侧面」等，仅是附图中的方向，本文所使用的方向用语是用来解释和说明本发明，而不是用来限定本发明的保护范围。
在附图中，结构相同的部件以相同数字标号表示，各处结构或功能相似的组件以相似数字标号表示。此外，为了便于理解和描述，附图所示的每一组件的尺寸和厚度是任意示出的，本发明并没有限定每个组件的尺寸和厚度。
当某些组件，被描述为“在”另一组件“上”时，所述组件可以直接置于所述另一组件上；也可以存在一中间组件，所述组件置于所述中间组件上，且所述中间组件置于另一组件上。当一个组件被描述为“安装至”或“连接至”另一组件时，二者可以理解为直接“安装”或“连接”，或者一个组件通过一中间组件“安装至”或“连接至”另一个组件。
如图2所示，本实施例提供一种显示面板，包括基板1、遮光层2、缓冲层3、有源层4、栅极绝缘层5、栅极层6、绝缘层7、源漏极层8、辅助阴极9、钝化层10、平坦层11、电极层12、像素定义层13、有机层15、导体层17以及阴极层18。
基板1为玻璃基板，起到支撑及衬底的作用。
遮光层2设于基板1的上表面，起到遮光作用。遮光层2的材质为遮光材料，所述遮光材料为金属，包括：钼（Mo）、铝（Al）、铜（Cu）、钛（Ti）等，或者是合金。
缓冲层3设于遮光层2及基板1的上表面，起到缓冲的作用，缓冲层3的材质为无机材料，所述无机材料包括硅的氧化物或硅的氮化物，或是氧化物与硅的氮化物的多层结构。
有源层4设于缓冲层3的上表面，有源层4的材质为半导体材料，所述半导体材料包括铟镓锌氧化物（IGZO）、铟镓钛氧化物（IZTO），铟镓锌钛氧化物（IGZTO）。有源层4设于遮光层2的上方，即有源层4与遮光层2相对设置，有源层4给显示面板提供电路支持。
栅极绝缘层5设于有源层4的上表面，栅极绝缘层5的材质为无机材料，所述无机材料包括硅的氧化物或硅的氮化物或是多层薄膜结构。栅极绝缘层5与有源层4相对设置，栅极绝缘层5起到绝缘的作用，防止显示面板内部的各线路之间短路。
栅极层6设于栅极绝缘层5的上表面，栅极层6的材质为金属材料，所述金属材料包括钼（Mo）、铝（Al）、铜（Cu）、钛（Ti）等，或者是合金，或者是多层薄膜结构。栅极层6与栅极绝缘层5相对设置。
绝缘层7设于栅极层6、有源层4及缓冲层3的上表面，绝缘层7的材质为为无机材料，所述无机材料包括硅的氧化物或硅的氮化物或是多层薄膜结构，起到绝缘作用，防止电路短路。在有源层4的上方设有绝缘层通孔，所述绝缘层通孔贯穿绝缘层7，所述绝缘层通孔便于电极层12与有源层4之间的电性连接。
源漏极层8设于绝缘层7的上表面，源漏极层8的材质包括金属材料，所述金属材料包括钼（Mo）、铝（Al）、铜（Cu）、钛（Ti）等，或者是合金，或者是多层薄膜结构。部分金属材料设于所述绝缘层通孔内，源漏极层8通过所述绝缘层通孔电连接至有源层4，形成电路连接。
辅助阴极9设于绝缘层7的上表面，辅助阴极9可与阴极搭接，降低阴极的方块电阻。
钝化层10设于绝缘层7、源漏极层8及辅助阴极9的上表面，钝化层10的材质包括硅的氧化物材料。钝化层10起到绝缘作用及隔绝外界水氧的作用。
平坦层11设于钝化层10的上表面，平坦层11使得膜层表面平整，利于后续膜层的贴合，防止出现脱离的现象。在平坦层11上设有平坦层通孔，所述平坦层通孔与源漏极层8相对设置，为电极层12提供通道。
电极层12设于平坦层11的上表面，电极层12为像素电极，电极层12的材质为氧化铟锡材料，填满所述平坦层通孔，使得电极层12与源漏极层8电性连接，为后续发光材料的发光提供电路支持。
像素定义层13设于平坦层11及电极层12的上表面，起到定义显示面板的发光层大小的作用。
通孔14（参考图4）依次贯穿像素定义层13、平坦层11及钝化层10，通孔14与辅助阴极9相对设置，为导体层17及阴极层18提供通道。
有机层15设于像素定义层13的上表面，有机层15的材质为有机材料，有机层15为多层有机膜层的叠层结构，包括空穴注入层、空穴传输层、电子注入层、电子传输层等。
导体层17设于通孔14内，且连接至辅助阴极9，导体层17的材质为纳米银，具有良好的导电性。导体层17的厚度小于通孔14的深度，导体层17作为辅助阴极9与阴极层18之间的桥梁，使得阴极层18能有效搭接至辅助阴极9，降低显示面板的电压降，进一步提高显示面板的显示均匀性。
阴极层18设于有机层15及导体层17的上表面，阴极层18通过导体层17有效搭接至辅助阴极9，降低显示面板的电压降，进一步提高显示面板的显示均匀性。
本实施例所述显示面板的技术效果在于，在辅助阴极上方的通孔内增加导体层，所述导体层具有良好的导电性，使得阴极层能有效搭接至辅助阴极，降低阴极层的方块电阻，改善显示面板的电压降，进一步提高显示面板的发光亮度的均匀性。
如图3所示，本实施例还提供一种显示面板的制备方法，包括步骤S1~S12。
S1 缓冲层制备步骤，在一基板的上表面沉积一层遮光材料，图案化处理后形成遮光层，在所述遮光层及所述基板的上表面沉积一层无机材料，所述无机材料包括硅的氧化物或硅的氮化物，或是氧化物与硅的氮化物的多层结构，形成缓冲层，所述缓冲层起到缓冲作用。
S2 有源层制备步骤，在所述缓冲层的上表面形成一层半导体材料，所述半导体材料包括铟镓锌氧化物（IGZO）、铟镓钛氧化物（IZTO），铟镓锌钛氧化物（IGZTO）等。图案化处理后，形成有源层，所述有源层与所述遮光层相对设置，所述有源层用以给显示面板提供电路支持。
S3 栅极绝缘层制备步骤，在所述有源层的上表面沉积一层无机材料，所述无机材料包括硅的氧化物或硅的氮化物或是多层薄膜结构。图案化处理后，形成栅极绝缘层，所述栅极绝缘层与所述有源层相对设置，所述栅极绝缘层起到绝缘的作用，防止显示面板内部的各线路之间短路。
S4 栅极层制备步骤，在所述栅极绝缘层的上表面溅镀一层金属材料，所述金属材料包括钼（Mo）、铝（Al）、铜（Cu）、钛（Ti）等，或者是合金，或者是多层薄膜结构。图案化处理后，形成栅极层，所述栅极层与所述栅极绝缘层相对设置。在其他实施例中，也可先依次半导体材料、无机材料及金属材料，最后再图案化处理，依次形成栅极层、栅极绝缘层及半导体层。
S5 绝缘层制备步骤，在所述栅极层、所述有源层及所述缓冲层的上表面沉积一层无机材料，所述无机材料包括硅的氧化物或硅的氮化物或是多层薄膜结构，起到绝缘作用，防止电路短路。采用通用掩膜板，曝光显影处理后，在所述有源层上方的绝缘层上形成绝缘层通孔，所述绝缘层通孔贯穿所述绝缘层，所述绝缘层通孔便于电极层与所述有源层之间的电性连接。
S6 辅助阴极制备步骤，在所述绝缘层的上表面溅镀一层金属材料，所述金属材料包括钼（Mo）、铝（Al）、铜（Cu）、钛（Ti）等，或者是合金，或者是多层薄膜结构。图案化处理后，形成源漏极层及辅助阴极，所述源漏极层与所述有源层相对设置，部分金属材料设于所述绝缘层通孔内，所述源漏极层通过所述绝缘层通孔电连接至所述有源层，形成电路连接。所述辅助阴极可与阴极搭接，降低阴极的方块电阻。
S7 钝化层制备步骤，在所述辅助阴极、所述源漏极层及所述绝缘层的上表面制备出一层钝化层，所述钝化层的材质包括硅的氧化物材料，起到绝缘作用及隔绝外界水氧的作用。
S8 平坦层制备步骤，在所述钝化层的上表面制备出平坦层，所述平坦层使得膜层表面平整，利于后续膜层的贴合，防止出现脱离的现象。采用普通掩膜板，曝光显影后，在所述平坦层上形成一平坦层通孔，所述平坦层通孔与所述源漏极层相对设置，为电极层提供通道。在所述平坦层上蒸镀一层氧化铟锡材料，填满所述平坦层通孔，图案化处理后，形成电极层，所述电极层与所述源漏极层电性连接，为后续发光材料的发光提供电路支持。
S9 像素定义层制备步骤，在所述电极层及所述平坦层的上表面制备出像素定义层，用以定义发光层的大小。
S10 通孔设置步骤，采用通用掩膜板，曝光显影后，形成一通孔14（参见图4），通孔14依次贯穿像素定义层13、平坦层11及钝化层10，通孔14与辅助阴极9相对设置，为导体层17及阴极层18提供通道。
S11 导体层制备步骤，在通孔14内制备出导体层17，导体层17的材质为纳米银，具有良好的导电性。如图5所示，所述导体层制备步骤包括步骤S111~S114。
S111 有机层制备步骤，在像素定义层13的上表面制备出有机层（参见图6），在通孔14的内侧壁及其底部形成第二有机层151，有机层15为多层有机膜层的叠层结构，包括空穴注入层、空穴传输层、电子注入层、电子传输层等。
S112 第一反应液制备步骤，采用喷墨打印技术，在所述通孔内打印有机溶剂（参见图7），覆盖住辅助阴极9的上方的第二有机层151，并将其溶解，溶解后形成第一反应液16。
S113 第二反应液制备步骤，采用喷墨打印技术，在所述第一反应液的上方添加纳米银溶液，与所述第一反应液混合后形成第二反应液。
S114 导体化步骤，真空烘烤所述第二反应液，挥发所述有机溶剂，析出纳米银，形成导体层17（参见图8）。
S12 阴极层制备步骤，导体层17及有机层15的上表面制备出阴极层18（参见图2）。阴极层18通过导体层17有效搭接至辅助阴极9，降低显示面板的电压降，进一步提高显示面板的显示均匀性。
本实施例所述显示面板的制备方法的技术效果在于，在辅助阴极上方的通孔内制备导体层，所述导体层具有良好的导电性，使得阴极层能有效搭接至辅助阴极，降低阴极层的方块电阻，改善显示面板的电压降，进一步提高显示面板的发光亮度的均匀性。
以上所述仅是本发明的优选实施方式，应当指出，对于本技术领域的普通技术人员，在不脱离本发明原理的前提下，还可以做出若干改进和润饰，这些改进和润饰也应视为本发明的保护范围。

Claims (10)

  1. 一种显示面板，其包括：
    绝缘层；
    钝化层，设于所述绝缘层一侧的表面；所述钝化层内设有辅助阴极，贴附于所述绝缘层表面；
    平坦层，设于所述钝化层远离所述绝缘层一侧的表面；
    像素定义层，设于所述平坦层远离所述钝化层一侧的表面；
    通孔，依次贯穿所述像素定义层、所述平坦层及所述钝化层，所述通孔与所述辅助阴极相对设置；以及
    导体层，设于所述通孔内，且连接至所述辅助阴极。
  2. 如权利要求1所述的显示面板，其还包括
    有机层，设于所述像素定义层远离所述平坦层一侧的表面；以及
    阴极层，设于所述导体层及所述有机层远离所述像素定义层一侧的表面。
  3. 如权利要求1所述的显示面板，其特征在于，
    所述导体层的厚度小于所述通孔的深度。
  4. 如权利要求1所述的显示面板，其中，
    所述导体层的材质为纳米银。
  5. 如权利要求2所述的显示面板，其特征在于，
    所述阴极层电连接至所述导体层；
    所述导体层电连接至所述辅助阴极。
  6. 如权利要求1所述的显示面板，其还包括：
    基板；
    缓冲层，设于所述基板一侧的表面；
    有源层，设于所述缓冲层远离所述基板一侧的表面；
    栅极绝缘层，设于所述有源层远离所述缓冲层一侧的表面；
    栅极层，设于所述栅极绝缘层远离所述有源层一侧的表面；以及
    源漏极层，设于所述绝缘层远离所述缓冲层一侧的表面，且穿过所述绝缘层，电连接至所述有源层。
  7. 一种显示面板的制备方法，其包括以下步骤：
    绝缘层制备步骤，在一基板的上表面制备出绝缘层；
    辅助阴极制备步骤，在所述绝缘层的上表面制备出辅助阴极；
    钝化层制备步骤，在所述绝缘层及所述辅助阴极的上表面制备出钝化层；
    平坦层制备步骤，在所述钝化层的上表面制备出平坦层；
    像素定义层制备步骤，在所述平坦层的上表面制备出像素定义层；
    通孔设置步骤，依次贯穿所述辅助阴极上方的所述像素定义层、所述平坦层及所述钝化层，形成一通孔；以及
    导体层制备步骤，在所述通孔内制备出导体层。
  8. 如权利要求7所述的显示面板的制备方法，其中，
    所述导体层制备步骤包括：
    有机层制备步骤，在所述像素定义层的上表面制备出有机层，在所述通孔的内侧壁及其底部形成第二有机层；
    第一反应液制备步骤，在所述通孔内添加有机溶剂，溶解所述第二有机层后，形成第一反应液；
    第二反应液制备步骤，在所述通孔内添加纳米银溶液，与所述第一反应液混合后形成第二反应液；以及
    导体化步骤，导体化处理所述第二反应液，形成导体层。
  9. 如权利要求8所述的显示面板的制备方法，其中，
    在所述导体层制备步骤之后，还包括
    阴极层制备步骤，在所述有机层及所述导体层的上表面制备出阴极层。
  10. 如权利要求8所述的显示面板的制备方法，其中，
    在所述导体化步骤中，真空烘烤所述第二反应液，挥发所述有机溶剂，析出纳米银。
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