WO2021057837A1 - 一种时序控制器、驱动系统、显示装置以及显示装置的驱动方法 - Google Patents

一种时序控制器、驱动系统、显示装置以及显示装置的驱动方法 Download PDF

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WO2021057837A1
WO2021057837A1 PCT/CN2020/117352 CN2020117352W WO2021057837A1 WO 2021057837 A1 WO2021057837 A1 WO 2021057837A1 CN 2020117352 W CN2020117352 W CN 2020117352W WO 2021057837 A1 WO2021057837 A1 WO 2021057837A1
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Prior art keywords
reference gray
displayed
image frame
control signal
refresh frequency
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PCT/CN2020/117352
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English (en)
French (fr)
Inventor
冉博
高贤永
张英
李云松
陈善彬
许志财
雷嗣军
高亮
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京东方科技集团股份有限公司
重庆京东方光电科技有限公司
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Priority to US17/414,236 priority Critical patent/US11538434B2/en
Publication of WO2021057837A1 publication Critical patent/WO2021057837A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3696—Generation of voltages supplied to electrode drivers
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3607—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals for displaying colours or for displaying grey scales with a specific pixel layout, e.g. using sub-pixels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3618—Control of matrices with row and column drivers with automatic refresh of the display panel using sense/write circuits
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3685—Details of drivers for data electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/027—Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/08—Details of timing specific for flat panels, other than clock recovery
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0271—Adjustment of the gradation levels within the range of the gradation scale, e.g. by redistribution or clipping
    • G09G2320/0276—Adjustment of the gradation levels within the range of the gradation scale, e.g. by redistribution or clipping for the purpose of adaptation to the characteristics of a display device, i.e. gamma correction
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/06—Adjustment of display parameters
    • G09G2320/0673—Adjustment of display parameters for control of gamma adjustment, e.g. selecting another gamma curve
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2340/00—Aspects of display data processing
    • G09G2340/04—Changes in size, position or resolution of an image
    • G09G2340/0407—Resolution change, inclusive of the use of different resolutions for different screen areas
    • G09G2340/0435—Change or adaptation of the frame rate of the video stream
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2370/00—Aspects of data communication
    • G09G2370/08—Details of image data interface between the display device controller and the data line driver circuit

Definitions

  • the present disclosure relates to the field of display technology, and in particular to a timing controller, a driving system, a display device, and a driving method of the display device.
  • Liquid Crystal Display has the advantages of low radiation, small size and low energy consumption, and is widely used in electronic products such as notebook computers, flat-screen TVs, or mobile phones.
  • liquid crystal displays have developed a variety of types such as twisted nematic (TN) type, advanced super dimensional field switch (ADS) type, high aperture ratio and advanced super dimensional field switch (HADS) type and in-plane switch (IPS) type. , Its driving mode and display effect are not the same, each has its own strengths.
  • TN twisted nematic
  • ADS advanced super dimensional field switch
  • HADS high aperture ratio and advanced super dimensional field switch
  • IPS in-plane switch
  • ADS-type liquid crystal displays have common electrodes and pixel electrodes arranged on an array substrate, which are widely used due to their advantages of wide viewing angle, high aperture ratio, and high transmittance.
  • the ADS technology mainly forms a multi-dimensional electric field through the electric field generated by the edge of the slit electrode in the same plane and the electric field generated between the slit electrode layer and the plate electrode layer, so that all oriented liquid crystal molecules in the slit electrode and directly above the electrode in the liquid crystal cell are Rotation can be generated, thereby improving the working efficiency of the liquid crystal and increasing the light transmission efficiency.
  • ADS technology can improve the image quality of thin film transistor liquid crystal display (TFT-LCD) products, with high resolution, high transmittance, low power consumption, wide viewing angle, high aperture ratio, low chromatic aberration, and no extrusion water ripple (push Mura). )Etc. HADS is an important realization form in ADS technology, and its aperture ratio is higher.
  • TFT-LCD thin film transistor liquid crystal display
  • a timing controller including a receiver and a processor.
  • the receiver is configured to receive the image signal of the image frame to be displayed;
  • the processor is configured to determine the refresh frequency of the image frame to be displayed according to the image signal of the image frame to be displayed; and according to the image signal of the image frame to be displayed Different refresh frequencies output different control signals.
  • the processor determining the refresh frequency of the image frame to be displayed according to the image signal of the image frame to be displayed includes: the processor analyzes the image signal of the image frame to be displayed according to the image signal of the image frame to be displayed. Obtain a data signal and a timing control signal; and determine the refresh frequency of the image frame to be displayed according to the timing control signal.
  • the processor determining the refresh frequency of the image frame to be displayed according to the timing control signal includes: the processor according to any two adjacent effective levels in the timing control signal. The length of time between determines the refresh frequency of the image frame to be displayed.
  • the processor determining the refresh frequency of the image frame to be displayed according to the length of time between any two adjacent valid levels in the timing control signal includes: the processor according to the The first time length between any two adjacent effective levels in the timing control signal determines that the refresh frequency of the image frame to be displayed is the first refresh frequency; the processor is based on any phase in the timing control signal The second time length between two adjacent effective levels determines that the refresh frequency of the image frame to be displayed is the second refresh frequency.
  • the processor outputting different control signals according to different refresh frequencies of the image frames to be displayed includes: the processor is the first refresh frequency according to the refresh frequency of the image frames to be displayed , Output a first control signal; the processor outputs a second control signal according to the refresh frequency of the image frame to be displayed as the second refresh frequency.
  • the timing controller further includes a memory.
  • the memory is configured to store the image signal of the image frame to be displayed.
  • a driving system which includes the timing controller and the reference gray-scale voltage generator described in any of the above embodiments.
  • the reference gray-scale voltage generator is connected to the timing controller, and the reference gray-scale voltage generator is configured to respond to different control signals received from the timing controller and output a signal corresponding to each control signal.
  • a corresponding set of reference gray-scale voltages; each set of reference gray-scale voltages includes multiple reference gray-scale voltages.
  • the reference gray-scale voltage generator includes a register and a controller.
  • the register is configured to store at least two sets of reference gray-scale voltage generation parameters, and each set of reference gray-scale voltage generation parameters is used to generate a corresponding set of reference gray-scale voltages.
  • the controller is configured to read a set of reference gray-scale voltages in the at least two sets of reference gray-scale voltage generation parameters from the register in response to different control signals received from the timing controller The parameters are generated so that the reference gray-scale voltage generator outputs a set of reference gray-scale voltages corresponding to each control signal.
  • the processor in the timing controller is configured to output a first control signal according to the refresh frequency of the image frame to be displayed as the first refresh frequency; and according to the refresh frequency of the image frame to be displayed The frequency is the second refresh frequency, and the second control signal is output.
  • the reference gray-scale voltage generator is configured to output the first group of reference gray-scale voltages corresponding to the first control signal in response to the first control signal received from the timing controller; And in response to the second control signal received from the timing controller, outputting the second set of reference gray-scale voltages corresponding to the second control signal.
  • the image signal of the image frame to be displayed includes a data signal and a timing control signal; the driving system further includes at least one source driver.
  • Each source driver is connected to the reference gray-scale voltage generator and the timing controller; the source driver has a plurality of output terminals, and each source driver is configured to respond according to all the signals from the timing controller.
  • the data signal and a set of reference gray-scale voltages from the reference gray-scale voltage generator output multiple gray-scale voltages through the multiple output terminals.
  • a display device including the driving system and the display panel described in any of the above embodiments.
  • the driving system includes at least one source driver; the display panel includes a plurality of data lines, each of at least part of the data lines is connected to an output terminal of a source driver.
  • a method for driving a display device including: receiving an image signal of an image frame to be displayed; determining a refresh frequency of the image frame to be displayed according to the image signal of the image frame to be displayed; Display different refresh frequencies of image frames, and output different control signals to the reference gray-scale voltage generator, so that the reference gray-scale voltage generator outputs a group corresponding to each control signal according to different control signals Reference gray-scale voltage.
  • Fig. 1 is a structural diagram of a driving system according to some embodiments of the present disclosure
  • Fig. 2 is a structural diagram of a timing controller according to some embodiments of the present disclosure
  • Fig. 3 is a structural diagram of another timing controller according to some embodiments of the present disclosure.
  • FIG. 4 is a diagram of clock signals of to-be-displayed image frames under different refresh rates according to some embodiments of the present disclosure
  • Fig. 5 is a structural diagram of a register in a driving system according to some embodiments of the present disclosure.
  • Fig. 6A is a structural diagram of another driving system according to some embodiments of the present disclosure.
  • Fig. 6B is a structural diagram of yet another driving system according to some embodiments of the present disclosure.
  • FIG. 7 is a structural diagram of a display device according to some embodiments of the present disclosure.
  • FIG. 8 is a structural diagram of a display panel according to some embodiments of the present disclosure.
  • FIG. 9 is a flowchart of a driving method of a display device according to some embodiments of the present disclosure.
  • first and second are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features. Therefore, the features defined with “first” and “second” may explicitly or implicitly include one or more of these features. In the description of the embodiments of the present disclosure, unless otherwise specified, "plurality" means two or more.
  • the TFT-LCD (Thin Film Transistor-Liquid Crystal Display) display device has the advantages of high resolution, high transmittance, low power consumption, wide viewing angle, high aperture ratio, low chromatic aberration, and no push Mura.
  • a HADS type display panel in order to reduce power consumption, there are two refresh frequencies (for example, 60 Hz and 40 Hz).
  • the image displayed on the display panel at these two refresh rates has a problem of brightness difference (for example, the brightness difference of the image displayed on the display panel at the two refresh rates of 60Hz and 40Hz is about 1.5nit), so that the viewer will see the screen flickering (flicker) phenomenon.
  • the main reason for the difference in brightness is that the liquid crystal rod-shaped molecules will bend under an electric field, which will produce a flexural electric effect.
  • the refresh frequency When the refresh frequency is changed, the electric field received by the liquid crystal will change, so that the transmittance ( T) will change, causing the driving voltage-transmittance (VT) curve to shift, which will cause the brightness of the display panel to change.
  • T transmittance
  • VT driving voltage-transmittance
  • switching between the two refresh frequencies of 40Hz and 60Hz will produce a VT offset of less than 1%. Although this value is very small, there will be a slight brightness difference and a slight flicker phenomenon on the display panel. ).
  • the higher the refresh frequency the smaller the electric field received by the liquid crystal, the smaller the transmittance, and the lower the actual display brightness. Therefore, the brightness of the display screen at a refresh rate of 40Hz is greater than that at a refresh rate of 60Hz.
  • some embodiments of the present disclosure provide a driving system 100 including a timing controller 10 and a reference gray-scale voltage generator 11.
  • the reference gray-scale voltage generator 11 is connected to the timing controller 10.
  • the reference gray-scale voltage generator 11 is configured to output a set of reference gray-scale voltages corresponding to each control signal in response to different control signals received from the timing controller 10; each set of reference gray-scale voltages includes a plurality of Reference gray-scale voltage.
  • the reference gray-scale voltage generator 11 reads a set of reference gray-scale voltage generation parameters corresponding to each control signal in response to different control signals, and outputs a set of reference gray-scale voltages corresponding to the control signal.
  • Each set of reference gray-scale voltage generation parameters is used to generate a set of reference gray-scale voltages.
  • each group of reference gray-scale voltage generation parameters can be obtained in advance and stored in the reference gray-scale voltage generator 11.
  • each group of reference gray-scale voltages includes 14 reference gray-scale voltages.
  • the timing controller 10 includes a receiver 101 and a processor 102.
  • the receiver 101 is configured to receive an image signal of an image frame to be displayed.
  • the processor 102 is configured to determine the refresh frequency of the image frame to be displayed according to the image signal of the image frame to be displayed; and to output different control signals according to the different refresh frequency of the image frame to be displayed.
  • the timing controller 10 outputs different control signals according to the different refresh frequencies of the image frames to be displayed; the reference gray-scale voltage generator 11 responds to different control signals and outputs a set of reference signals corresponding to each control signal.
  • Grayscale voltage In this way, based on a set of reference gray-scale voltages, by reasonably setting the value of each reference gray-scale voltage in each other set of reference gray-scale voltages (that is, setting the corresponding reference gray-scale voltage generation parameters), the display panel can be set in different Under the refresh frequency, the display brightness of the image is the same, which avoids the phenomenon of image flickering due to the difference in display brightness when switching between different refresh frequencies.
  • the processor 102 is configured to parse the data signal and the timing control signal according to the image signal of the image frame to be displayed; and determine the refresh frequency of the image frame to be displayed according to the timing control signal.
  • the data signal includes grayscale data of each sub-pixel in the image frame to be displayed. After the grayscale data is input to the source driver, the source driver outputs a grayscale voltage corresponding to the grayscale data to the display panel according to a set of reference grayscale voltages corresponding to the current refresh frequency, so that the display panel displays the image frame.
  • the image signal of the image frame to be displayed comes from the graphics card.
  • the receiver 101 is configured to receive the image signal of the image frame to be displayed from the graphics card, and transmit the image signal of the image frame to be displayed to the processor 102.
  • the processor 102 determines the refresh frequency of the image frame to be displayed according to the length of time between any two adjacent effective levels in the timing control signal.
  • the effective level can be a low level or a high level.
  • the processor 102 determines the refresh frequency of the image frame to be displayed as the first refresh frequency according to the first length of time between any two adjacent effective levels in the timing control signal; The second time length between any two adjacent effective levels determines the refresh frequency of the image frame to be displayed as the second refresh frequency.
  • the timing control signal is a clock signal.
  • the effective level of the clock signal as a high level, and the duty cycle of the high level and the low level being 50% respectively, set the clock signal between any two adjacent high levels
  • the time length of is t
  • n is the pulse number of the clock signal of the image frame to be displayed (for example, 1080)
  • the processor outputs the first control signal according to the refresh frequency of the image frame to be displayed as the first refresh frequency; and outputs the second control signal according to the refresh frequency of the image frame to be displayed as the second refresh frequency. For example, when the refresh frequency of the image frame to be displayed is 60 Hz, the processor outputs the first control signal; when the refresh frequency of the image frame to be displayed is 40 Hz, the processor outputs the second control signal.
  • the timing controller 10 further includes a memory 103.
  • the memory 103 is configured to store image signals of image frames to be displayed.
  • the receiver 101 is configured to receive the image signal of the image frame to be displayed from the graphics card, and transmit the image signal of the image frame to be displayed to the memory 103
  • the memory 103 is configured to store the image of the image frame to be displayed.
  • the processor 102 is configured to obtain the image signal of the image frame to be displayed from the memory 103, and determine the refresh frequency of the image frame to be displayed according to the image signal of the image frame to be displayed; and according to the different refresh frequency of the image frame to be displayed, Output different control signals.
  • the processor determines that the refresh frequency of the image frame to be displayed is the first refresh frequency (for example, 60 Hz) according to the image signal of the image frame to be displayed, and outputs the first control signal.
  • the processor determines that the refresh frequency of the image frame to be displayed is the second refresh frequency (for example, 40 Hz) according to the image signal of the image frame to be displayed, and outputs the second control signal.
  • the reference gray-scale voltage generator 11 includes a register 111 and a controller 112.
  • the register 111 is configured to store at least two sets of reference gray-scale voltage generation parameters.
  • the controller 112 is configured to read one of the at least two sets of reference gray-scale voltage generation parameters from the register 111 in response to different control signals received from the timing controller 10, so that The reference gray-scale voltage generator 11 outputs a set of reference gray-scale voltages corresponding to each control signal.
  • the magnitude of the reference gray-scale voltage output by the reference gray-scale voltage generator 11 can be obtained by setting the reference gray-scale voltage generation parameters inside the reference gray-scale voltage generator 11 in a programming manner. Therefore, the magnitude of each reference gray-scale voltage in a set of reference gray-scale voltages depends on the corresponding reference gray-scale voltage generation parameter set internally by the reference gray-scale voltage generator 11.
  • the processor 101 in the timing controller 10 is configured to output the first control signal according to the refresh frequency of the image frame to be displayed as the first refresh frequency; and to output the first control signal according to the refresh frequency of the image frame to be displayed as the second refresh frequency. Frequency, output the second control signal.
  • the reference gray-scale voltage generator 11 is configured to output a first group of reference gray-scale voltages corresponding to the first control signal in response to the received first control signal from the timing controller 10; and in response to the received first control signal from the timing controller 10, The second control signal of the controller 10 outputs a second set of reference gray-scale voltages corresponding to the second control signal.
  • both the first group of reference gray-scale voltages and the second group of reference gray-scale voltages include 14 reference gray-scale voltages.
  • a first set of reference gray scale voltages are V gam1_1, V gam1_2, V gam1_3 , V gam1_4, V gam1_5, V gam1_6, V gam1_7, V gam1_8, V gam1_9, V gam1_10, V gam1_11, V gam1_12, V gam1_13 and V gam1_14 ; a second set of reference gray voltage V gam2_1, V gam2_2, V gam2_3 , V gam2_4, V gam2_5, V gam2_6, V gam2_7, V gam2_8, V gam2_9, V gam2_10, V gam2_11, V gam2_12, V gam2_13 and V gam2_14 .
  • the reference gray-scale voltage generator 11 includes 14 reference gray-scale voltage output terminals, and 14 reference gray-scale voltages in the first group of reference gray-scale voltages are respectively output through the 14 reference gray-scale voltages. ⁇ output.
  • the 14 reference gray-scale voltages in the second group of reference gray-scale voltages are respectively output through the 14 reference gray-scale voltage output terminals.
  • V gam1_1 , V gam1_2 , V gam1_3 , V gam1_4 , V gam1_5 , V gam1_6 and V gam1_7 in the first set of reference gray-scale voltages and V gam2_1 , V gam2_2 , V gam2_3 in the second set of reference gray-scale voltages , V gam2_4 , V gam2_5 , V gam2_6 and V gam2_7 are positive polarity.
  • V gam1_8 first set of reference gray voltages
  • both the first group of reference gray-scale voltages and the second group of reference gray-scale voltages include 7 reference gray-scale voltages.
  • the first set of reference gray-scale voltages are V gam1_1 , V gam1_2 , V gam1_3 , V gam1_4 , V gam1_5 , V gam1_6 and V gam1_7 ;
  • the second set of reference gray-scale voltages are V gam2_1 , V gam2_2 , V gam2_3 , V gam2_4 V gam2_5 , V gam2_6 and V gam2_7 .
  • the register 111 includes a first register 1111 and a second register 1112.
  • the first register 1111 is configured to store a first set of reference gray-scale voltage generation parameters, the first set of reference gray-scale voltage generation parameters is used to generate the first set of reference gray-scale voltages;
  • the second register 1112 is configured to store a second set of reference gray-scale voltages The gray-scale voltage generation parameters, and the second set of reference gray-scale voltage generation parameters are used to generate the second set of reference gray-scale voltages.
  • the processor 101 in the timing controller 10 determines that the refresh frequency of the image frame to be displayed is the first refresh frequency (for example, 60 Hz) according to the image signal of the image frame to be displayed, and outputs the first control signal S1.
  • the first refresh frequency for example, 60 Hz
  • the controller 112 in the reference gray-scale voltage generator 11 reads the first set of reference gray-scale voltage generation parameters from the first register 1111, so that the reference The gray-scale voltage generator 11 outputs a first set of reference gray-scale voltages V gam1_1 , V gam1_2 , V gam1_3 , V gam1_4 , V gam1_5 , V gam1_6 , V gam1_7 , V gam1_8 , V gam1_9 , V gam1_2, V gam1_4, V gam1_6, V gam1_7, V gam1_8, V gam1_9, V gam1_10 , V gam1_11 , V gam1_12 , V gam1_13 and V gam1_14 .
  • the processor 101 in the timing controller 10 determines that the refresh frequency of the image frame to be displayed is the second refresh frequency (for example, 40 Hz) according to the image signal of the image frame to be displayed, and outputs the second control Signal S2.
  • the second refresh frequency for example, 40 Hz
  • the controller 112 in the reference gray-scale voltage generator 11 reads the second set of reference gray-scale voltage generation parameters from the second register 1112, so that the reference The gray-scale voltage generator 11 outputs a second set of reference gray-scale voltages V gam2_1 , V gam2_2 , V gam2_3 , V gam2_4 , V gam2_5 , V gam2_6 , V gam2_7 , V gam2_8 , V gam2_9 , V gam2_1, V gam2_2, V gam2_4, V gam2_5, V gam2_6, V gam2_7, V gam2_8, V gam2_9, V gam2_2 corresponding to the second control signal S2.
  • the reference gray-scale voltage generator 11 outputs a set of reference gray-scale voltages corresponding to each control signal according to different control signals, it is illustrated in FIGS. 6A and 6B respectively.
  • different control signals are all output by a timing controller 10.
  • the same reference gray-scale voltage generator 11 includes a plurality of registers 111, and each register 111 stores a set of reference gray-scale voltage generation parameters.
  • the controller 112 in the reference gray-scale voltage generator 11 reads a set of reference gray-scale voltage generation parameters from a corresponding register in response to different control signals, and outputs a corresponding set of reference gray-scale voltages.
  • the driving system 100 further includes at least one source driver 12, and the source driver 12 is connected to the reference gray-scale voltage generator 11 and the timing controller 10.
  • the source driver 12 has a plurality of output terminals OP, and each source driver 12 is configured to pass a plurality of reference gray-scale voltages according to the data signal from the timing controller 10 and a set of reference gray-scale voltages output from the reference gray-scale voltage generator 11
  • the output terminal OP outputs multiple gray-scale voltages.
  • the source driver 12 is a data driver integrated circuit (Source Driver Integrated Circuit, Source IC).
  • each source driver 12 is configured to output the first set of reference gray-scale voltages through a plurality of output terminals OP according to the data signal from the timing controller 10 and the first set of reference gray-scale voltages output from the reference gray-scale voltage generator 11 A set of gray-scale voltages.
  • each source driver 12 is configured to output the second set of reference gray-scale voltages output from the reference gray-scale voltage generator 11 through a plurality of output terminals OP according to the data signal from the timing controller 10 and the second set of reference gray-scale voltages output from the reference gray-scale voltage generator 11. The second set of grayscale voltages.
  • some embodiments of the present disclosure also provide a display device.
  • the display device includes a display panel 200 and the driving system 100 described above.
  • the display device can be used as a mobile phone, a tablet computer, a personal digital assistant (PDA), an in-vehicle computer, etc.
  • PDA personal digital assistant
  • the embodiments of the present disclosure do not impose special restrictions on the use of the display device.
  • the display panel 200 includes a plurality of data lines DL, and at least a part of each of the data lines DL is connected to an output terminal OP of the source driver 12.
  • the display panel 200 has a display area A and a peripheral area S, and the peripheral area S is arranged around the display area A in a circle, for example.
  • a plurality of sub-pixels P are arranged in the display area A.
  • the plurality of sub-pixels P include at least a first-color sub-pixel, a second-color sub-pixel, and a third-color sub-pixel, and the first, second, and third colors are three primary colors (for example, red, green, and blue).
  • the source driver 12 outputs multiple gray-scale voltages according to the data signal from the timing controller 10 and a set of reference gray-scale voltages from the reference gray-scale voltage generator 11, and transmits the multiple gray-scale voltages to the multiple data lines DL .
  • each gray-scale voltage is transmitted to one sub-pixel of the display panel 200.
  • multiple data lines DL are connected to multiple columns of sub-pixels, and multiple gate lines GL are connected to multiple rows of sub-pixels.
  • at least one source driver 12 After the first row of gate lines GL input scan signals, at least one source driver 12 outputs a plurality of gray-scale voltages to the plurality of data lines DL, and transmits them to the first row of sub-pixels through the plurality of data lines DL;
  • the scan signal is input to the gate line GL
  • at least one source driver 12 outputs a plurality of gray-scale voltages to the plurality of data lines DL, and transmits them to the second row of sub-pixels through the plurality of data lines DL; and inputs to the third row of gate lines GL
  • at least one source driver 12 After the scan signal, at least one source driver 12 outputs multiple gray-scale voltages to multiple data lines DL, and transmits them to the third row of sub-pixels through multiple data lines DL; and so on, until the last row of gate line GL is input After the
  • At least one source driver in the scanning time of each row of sub-pixels in one frame of image time must be based on the data signal from the timing controller 10 and the reference gray scale.
  • a set of reference gray-scale voltages of the voltage generator 11 outputs multiple gray-scale voltages.
  • the processor 101 in the timing controller 10 determines that the refresh frequency of the to-be-displayed image frame is the first refresh frequency (for example, 60 Hz) according to the image signal of the to-be-displayed image frame, and outputs the first control signal S1. As shown in FIG.
  • the controller 112 in the reference gray-scale voltage generator 11 reads the first set of reference gray-scale voltages from the first register 1111 in response to the first control signal S1 received from the timing controller 10 Generate parameters so that the reference gray-scale voltage generator 11 outputs a first group of reference gray-scale voltages corresponding to the first control signal S1, such as V gam1_1 , V gam1_2 , V gam1_3 , V gam1_4 , V gam1_5 , V gam1_6 , V gam1_7 , V gam1_8 , V gam1_9 , V gam1_10 , V gam1_11 , V gam1_12 , V gam1_13 and V gam1_14 .
  • the source driver outputs the first group of gray-scale voltages according to the data signal from the timing controller 10 and the first group of reference gray-scale voltages from the reference gray-scale voltage generator 11, and transmits the first group of gray-scale voltages to and A plurality of sub-pixels in a row of sub-pixels connected by a data line DL.
  • the display brightness of the display panel 200 is L1.
  • the processor 101 in the timing controller 10 determines that the refresh frequency of the to-be-displayed image frame is the second refresh frequency (for example, 40 Hz) according to the image signal of the to-be-displayed image frame, and outputs the second control signal S2. As shown in FIG.
  • the controller 112 in the reference gray-scale voltage generator 11 reads the second set of reference gray-scale voltages from the second register 1112 in response to the second control signal S2 received from the timing controller 10 Generate parameters so that the reference gray-scale voltage generator 11 outputs a second set of reference gray-scale voltages corresponding to the second control signal S2, such as V gam2_1 , V gam2_2 , V gam2_3 , V gam2_4 , V gam2_5 , V gam2_6 , V gam2_7 , V gam2_8 , V gam2_9 , V gam2_10 , V gam2_11 , V gam2_12 , V gam2_13 and V gam2_14 .
  • the source driver outputs the second set of gray-scale voltages according to the data signal from the timing controller 10 and the second set of reference gray-scale voltages from the reference gray-scale voltage generator 11, and transmits the second set of gray-scale voltages to and Among the multiple sub-pixels in a row of sub-pixels connected by a data line DL, in this case, the display brightness of the display panel 200 is L2.
  • the second set of reference gray-scale voltage generation parameters are set using the following method; take the display panel at the first refresh frequency (for example, 60Hz) and the display brightness of L1 as the reference; adjust the first set of reference gray-scale
  • the voltage generation parameter measures the display brightness of the display panel at the second refresh frequency (for example, 40 Hz) until the display brightness L2 of the display panel at the second refresh frequency (for example, 40 Hz) is equal to L1.
  • the adjusted first group of reference gray-scale voltage generation parameters are used as the second group of reference gray-scale voltage generation parameters.
  • the display brightness can be measured with a brightness measuring instrument.
  • Some embodiments of the present disclosure also provide a driving method of a display device, as shown in FIG. 9, including S1-S3.
  • S2 Determine the refresh frequency of the image frame to be displayed according to the image signal of the image frame to be displayed.
  • the timing controller 10 receives the image signal of the image frame to be displayed, and analyzes and obtains the data signal and the timing control signal according to the image signal of the image frame to be displayed.
  • the timing controller 10 determines that the refresh frequency of the image frame to be displayed is the first refresh frequency (for example 60 Hz) according to the timing control signal (for example, a clock signal).
  • the timing controller 10 outputs the first control signal S1 to the reference gray-scale voltage generator 11 according to the refresh frequency of the image frame to be displayed as the first refresh frequency, so that the reference gray-scale voltage generator 11 reads according to the first control signal S1 Take the first set of reference gray-scale voltage generation parameters stored in the reference gray-scale voltage generator 11, and output the first set of reference gray-scale voltages corresponding to the first control signal S1, such as V gam1_1 , V gam1_2 , V gam1_3 , V gam1_4 , V gam1_5 , V gam1_6 , V gam1_7 , V gam1_8 , V gam1_9 , V gam1_10 , V gam1_11 , V gam1_12 , V gam1_13 and V gam1_14 .
  • the source driver 12 outputs the first group of gray-scale voltages according to the data signal from the timing controller 10 and the first group of reference gray-scale voltages from the reference gray-scale voltage generator 11, and transmits the first group of gray-scale voltages To a plurality of sub-pixels in a row of sub-pixels connected to a plurality of data lines DL.
  • the display brightness of the display panel 200 is L1.
  • the timing controller 10 analyzes and obtains the data signal and the timing control signal according to the image signal of the image frame to be displayed; and according to the timing control signal, determines that the refresh frequency of the image frame to be displayed is switched to the second Refresh frequency (for example, 40Hz).
  • the second Refresh frequency for example, 40Hz
  • the timing controller 10 outputs the second control signal S2 to the reference gray-scale voltage generator 11, so that the reference gray-scale voltage generator 11 reads the second group stored in the reference gray-scale voltage generator 11 according to the second control signal S2
  • the reference gray-scale voltage generates parameters, and outputs a second set of reference gray-scale voltages corresponding to the second control signal S2, such as V gam2_1 , V gam2_2 , V gam2_3 , V gam2_4 , V gam2_5 , V gam2_6 , V gam2_7 , V gam2_8 , V gam2_9 , V gam2_10 , V gam2_11 , V gam2_12 , V gam2_13 and V gam2_14 .
  • the source driver outputs the second set of gray-scale voltages according to the data signal from the timing controller 10 and the second set of reference gray-scale voltages from the reference gray-scale voltage generator 11, and transmits the second set of gray-scale voltages to Among a plurality of sub-pixels in a row of sub-pixels connected to a plurality of data lines DL.
  • the display brightness of the display panel 200 is L2.
  • the second set of reference gray-scale voltage generation parameters are set using the following method; take the display panel at the first refresh frequency (for example, 60Hz) and the display brightness of L1 as the reference; adjust the first set of reference gray-scale
  • the voltage generation parameter measures the display brightness of the display panel at the second refresh frequency (for example, 40 Hz) until the display brightness L2 of the display panel at the second refresh frequency (for example, 40 Hz) is equal to L1.
  • the adjusted first group of reference gray-scale voltage generation parameters are used as the second group of reference gray-scale voltage generation parameters.
  • first group of reference gray-scale voltage generation parameters and the second group of reference gray-scale voltage generation parameters are obtained in advance and stored in the reference gray-scale voltage generator 11.

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Abstract

一种显示装置的驱动方法，包括：接收待显示图像帧的图像信号(S1)；根据待显示图像帧的图像信号，确定待显示图像帧的刷新频率(S2)；根据待显示图像帧的不同的刷新频率，向基准灰阶电压产生器输出不同的控制信号，以使基准灰阶电压产生器根据不同的控制信号，输出与每个控制信号对应的一组基准灰阶电压(S3)。

Description

一种时序控制器、驱动系统、显示装置以及显示装置的驱动方法
本申请要求于2019年9月27日提交的、申请号为201910923227.6的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本公开涉及显示技术领域，特别涉及一种时序控制器、驱动系统、显示装置以及显示装置的驱动方法。
背景技术
液晶显示器(Liquid Crystal Display，LCD)具有低辐射、体积小及低耗能等优点，被广泛地应用在笔记本电脑、平面电视或移动电话等电子产品中。
目前，液晶显示器已经发展出扭转向列(TN)型、高级超维场开关(ADS)型、高开口率且高级超维场开关(HADS)型和平面内开关(IPS)型等多种类型，其驱动模式和显示效果不尽相同，各有所长。
在各种类型中，ADS型液晶显示器将公共电极和像素电极都设置在阵列基板上，因其具有宽视角、高开口率、高透过率等优点而被广泛应用。ADS技术主要通过同一平面内狭缝电极边缘所产生的电场以及狭缝电极层与板状电极层间产生的电场形成多维电场，使液晶盒内狭缝电极间、电极正上方所有取向液晶分子都能够产生旋转，从而提高了液晶工作效率并增大了透光效率。ADS技术可以提高薄膜晶体管液晶显示器(TFT-LCD)产品的图像品质，具有高分辨率、高透过率、低功耗、宽视角、高开口率、低色差、无挤压水波纹(push Mura)等优点。HADS是ADS技术中的一种重要实现形式，其开口率更高。
目前使用的一种HADS型面板，为了降低功耗，普遍存在两种刷新率，但是两种刷新频率下的显示图像存在亮度差的问题，在两种刷新频率切换时，观看者会看见图像闪烁(flicker)的现象。
发明内容
一方面，提供了一种时序控制器，包括接收器和处理器。接收器被配置为接收待显示图像帧的图像信号；处理器被配置为根据所述待显示图像帧的图像信号，确定所述待显示图像帧的刷新频率；以及根据所述待显示图像帧的不同的刷新频率，输出不同的控制信号。
在一些实施例中，所述处理器根据所述待显示图像帧的图像信号，确定所述待显示图像帧的刷新频率，包括：所述处理器根据所述待显示图像帧的图像信号，解析得到数据信号和时序控制信号；以及根据所述时序控制信号， 确定所述待显示图像帧的刷新频率。
在一些实施例中，所述处理器根据所述时序控制信号，确定所述待显示图像帧的刷新频率，包括：所述处理器根据所述时序控制信号中任意相邻两个有效电平之间的时间长度，确定所述待显示图像帧的刷新频率。
在一些实施例中，所述处理器根据所述时序控制信号中任意相邻两个有效电平之间的时间长度，确定所述待显示图像帧的刷新频率，包括：所述处理器根据所述时序控制信号中任意相邻两个有效电平之间的第一时间长度，确定所述待显示图像帧的刷新频率为第一刷新频率；所述处理器根据所述时序控制信号中任意相邻两个有效电平之间的第二时间长度，确定所述待显示图像帧的刷新频率为第二刷新频率。
在一些实施例中，所述处理器根据所述待显示图像帧的不同的刷新频率，输出不同的控制信号，包括：所述处理器根据所述待显示图像帧的刷新频率为第一刷新频率，输出第一控制信号；所述处理器根据所述待显示图像帧的刷新频率为第二刷新频率，输出第二控制信号。
在一些实施例中，所述时序控制器还包括存储器。所述存储器被配置为存储所述待显示图像帧的图像信号。
另一方面，提供一种驱动系统，包括上述任一实施例所述的时序控制器和基准灰阶电压产生器。所述基准灰阶电压产生器与所述时序控制器连接，所述基准灰阶电压产生器被配置为响应于接收到的来自所述时序控制器的不同的控制信号，输出与每个控制信号对应的一组基准灰阶电压；每组基准灰阶电压包括多个基准灰阶电压。
在一些实施例中，所述基准灰阶电压产生器包括寄存器和控制器。所述寄存器被配置为存储至少两组基准灰阶电压产生参数，每组基准灰阶电压产生参数用于产生对应的一组基准灰阶电压。所述控制器被配置为响应于接收到的来自所述时序控制器的不同的控制信号，从所述寄存器中读取所述至少两组基准灰阶电压产生参数中的一组基准灰阶电压产生参数，以使所述基准灰阶电压产生器输出与每个控制信号对应的一组基准灰阶电压。
在一些实施例中，所述时序控制器中的处理器被配置为根据所述待显示图像帧的刷新频率为第一刷新频率，输出第一控制信号；以及根据所述待显示图像帧的刷新频率为第二刷新频率，输出第二控制信号。所述基准灰阶电压产生器被配置为响应于接收到的来自所述时序控制器的所述第一控制信号，输出与所述第一控制信号对应的所述第一组基准灰阶电压；以及响应于接收到的来自所述时序控制器的所述第二控制信号，输出与所述第二控制信 号对应的所述第二组基准灰阶电压。
在一些实施例中，所述待显示图像帧的图像信号包括数据信号和时序控制信号；所述驱动系统还包括至少一个源极驱动器。每个源极驱动器与所述基准灰阶电压产生器和所述时序控制器连接；所述源极驱动器具有多个输出端，每个源极驱动器被配置为根据来自所述时序控制器的所述数据信号以及来自所述基准灰阶电压产生器的一组基准灰阶电压，通过所述多个输出端输出多个灰阶电压。
再一方面，提供一种显示装置，包括上述任一实施例所述的驱动系统以及显示面板。
在一些实施例中，驱动系统包括至少一个源极驱动器；所述显示面板包括多根数据线，至少部分数据线中的每个与一个源极驱动器的输出端连接。
又一方面，提供一种显示装置的驱动方法，包括：接收待显示图像帧的图像信号；根据所述待显示图像帧的图像信号，确定所述待显示图像帧的刷新频率；根据所述待显示图像帧的不同的刷新频率，向所述基准灰阶电压产生器输出不同的控制信号，以使所述基准灰阶电压产生器根据不同的控制信号，输出与每个控制信号对应的一组基准灰阶电压。
附图说明
为了更清楚地说明本公开中的技术方案，下面将对本公开一些实施例中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本公开的一些实施例的附图，对于本领域普通技术人员来讲，还可以根据这些附图获得其他的附图。此外，以下描述中的附图可以视作示意图，并非对本公开实施例所涉及的产品的实际尺寸、方法的实际流程、信号的实际时序等的限制。
图1为根据本公开一些实施例的一种驱动系统的结构图；
图2为根据本公开一些实施例的一种时序控制器的结构图；
图3为根据本公开一些实施例的另一种时序控制器的结构图；
图4为根据本公开一些实施例的不同刷新率下的待显示图像帧的时钟信号图；
图5为根据本公开一些实施例的一种驱动系统中寄存器的结构图；
图6A为根据本公开一些实施例的另一种驱动系统的结构图；
图6B为根据本公开一些实施例的又一种驱动系统的结构图；
图7为根据本公开一些实施例的一种显示装置的结构图；
图8为根据本公开一些实施例的一种显示面板的结构图；
图9为根据本公开一些实施例的一种显示装置的驱动方法的流程图。
具体实施方式
下面将结合附图，对本公开一些实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本公开一部分实施例，而不是全部的实施例。基于本公开所提供的实施例，本领域普通技术人员所获得的所有其他实施例，都属于本公开保护的范围。
除非上下文另有要求，否则，在整个说明书和权利要求书中，术语“包括(comprise)”及其其他形式例如第三人称单数形式“包括(comprises)”和现在分词形式“包括(comprising)”被解释为开放、包含的意思，即为“包含，但不限于”。在说明书的描述中，术语“一个实施例(one embodiment)”、“一些实施例(some embodiments)”、“示例性实施例(exemplary embodiments)”、“示例(example)”、“特定示例(specific example)”或“一些示例(some examples)”等旨在表明与该实施例或示例相关的特定特征、结构、材料或特性包括在本公开的至少一个实施例或示例中。上述术语的示意性表示不一定是指同一实施例或示例。此外，所述的特定特征、结构、材料或特点可以以任何适当方式包括在任何一个或多个实施例或示例中。
以下，术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个该特征。在本公开实施例的描述中，除非另有说明，“多个”的含义是两个或两个以上。
术语“被配置为”的使用意味着开放和包容性的语言，其不排除被配置为执行额外任务或步骤的设备。
TFT-LCD(Thin Film Transistor-Liquid Crystal Display)显示装置具有高分辨率、高透过率、低功耗、宽视角、高开口率、低色差、无挤压水波纹(push Mura)等优点。
以一种HADS型显示面板为例，为了降低功耗，存在两种刷新频率(例如60Hz和40Hz)。但是这两种刷新频率下显示面板显示的图像存在亮度差的问题(例如，60Hz和40Hz这两种刷新频率下显示面板显示的图像的亮度差约为1.5nit)，使得观看者会看见画面闪烁(flicker)的现象。存在亮度差的主要原因在于：液晶棒状分子在电场下会发生弯曲，就会产生挠曲电效应，当改变刷新频率时，液晶受到的电场会发生变化，使得在不同刷新频率下透过率(T)会发生变化，导致驱动电压-透过率(V-T)曲线发生偏移，从而导致显示面板的亮度发生变化。例如，在40Hz和60Hz这两种刷新频率下切换 大约会产生小于1％左右不等的V-T偏移，虽然这个数值很小，但是在显示面板上会产生轻微亮度差异及轻微闪屏现象(flicker)。刷新频率越大，液晶受到的电场越小，透过率越小，实际显示亮度越小，因此40Hz刷新频率下的显示画面亮度大于60Hz刷新频率下的显示画面亮度。
如图1所示，本公开一些实施例提供一种驱动系统100，包括时序控制器10和基准灰阶电压产生器11。基准灰阶电压产生器11与时序控制器10连接。基准灰阶电压产生器11被配置为响应于接收到的来自时序控制器10的不同的控制信号，输出与每个控制信号对应的一组基准灰阶电压；每组基准灰阶电压包括多个基准灰阶电压。
示例的，基准灰阶电压产生器11响应于不同的控制信号，读取与每个控制信号对应的一组基准灰阶电压产生参数，输出与该控制信号对应的一组基准灰阶电压。每组基准灰阶电压产生参数用于产生一组基准灰阶电压。这里，每组基准灰阶电压产生参数可提前获取，并存储在基准灰阶电压产生器11中。
本公开实施例对基准灰阶电压产生器11输出的每组基准灰阶电压中基准灰阶电压的个数不做限定，例如每组基准灰阶电压包括14个基准灰阶电压。
本公开一些实施例提供了一种时序控制器。如图2和图3所示，时序控制器10包括接收器101和处理器102。接收器101被配置为接收待显示图像帧的图像信号。处理器102被配置为根据待显示图像帧的图像信号，确定待显示图像帧的刷新频率；以及根据待显示图像帧的不同的刷新频率，输出不同的控制信号。
由此可知，时序控制器10根据待显示图像帧的不同的刷新频率，输出不同的控制信号；基准灰阶电压产生器11响应于不同的控制信号，输出与每个控制信号对应的一组基准灰阶电压。这样，以一组基准灰阶电压为基准，通过合理设置其他每组基准灰阶电压中各基准灰阶电压的值(即设置对应的基准灰阶电压产生参数)，可使显示面板在不同的刷新频率下，图像的显示亮度相同，避免了不同刷新频率切换时由于显示亮度差异而导致图像出现闪烁的现象。
在一些实施例中，处理器102被配置为根据待显示图像帧的图像信号，解析得到数据信号和时序控制信号；以及根据时序控制信号，确定待显示图像帧的刷新频率。数据信号包括待显示图像帧中各亚像素的灰阶数据。当灰阶数据输入源极驱动器后，源极驱动器根据当前刷新频率下对应的一组基准灰阶电压，输出与该灰阶数据对应的灰阶电压至显示面板，使显示面板显示该图像帧。
在一些示例中，待显示图像帧的图像信号来自显卡。接收器101被配置为接收来自显卡的待显示图像帧的图像信号，并将该待显示图像帧的图像信号传输至处理器102。
在一些示例中，处理器102根据时序控制信号中任意相邻两个有效电平之间的时间长度，确定待显示图像帧的刷新频率。这里，有效电平可以为低电平，也可以为高电平。
在一些示例中，处理器102根据时序控制信号中任意相邻两个有效电平之间的第一时间长度，确定待显示图像帧的刷新频率为第一刷新频率；处理器根据时序控制信号中任意相邻两个有效电平之间的第二时间长度，确定待显示图像帧的刷新频率为第二刷新频率。
示例的，时序控制信号为时钟信号。如图4所示，以时钟信号的有效电平为高电平，且高电平和低电平的占空比分别为50％为例，设时钟信号中任意相邻两个高电平之间的时间长度为t，该时钟信号的高电平时长T＝nt，n为待显示图像帧的时钟信号的脉冲数(例如1080)，则待显示图像帧的刷新频率f＝1/2T。例如，待显示图像帧时钟信号中任意相邻两个高电平之间的时间长度为第一时间长度t 1为7.7μs(如图4中a所示)，则待显示图像帧的刷新频率为第一刷新频率f 1＝60Hz。又例如，待显示图像帧时钟信号中任意相邻两个高电平之间的时间长度为第二时间长度t 2为11.6μs(如图4中b所示)，则待显示图像帧的刷新频率为第二刷新频率f 2＝40Hz。
在一些示例中，处理器根据待显示图像帧的刷新频率为第一刷新频率，输出第一控制信号；根据所述待显示图像帧的刷新频率为第二刷新频率，输出第二控制信号。例如，在待显示图像帧的刷新频率为60Hz的情况下，处理器输出第一控制信号；在待显示图像帧的刷新频率为40Hz的情况下，处理器输出第二控制信号。
在一些实施例中，如图3所示，时序控制器10还包括存储器103。存储器103被配置为存储待显示图像帧的图像信号。
在一些示例中，接收器101被配置为接收来自显卡的待显示图像帧的图像信号，并将该待显示图像帧的图像信号传输至存储器103，存储器103被配置为存储待显示图像帧的图像信号。处理器102被配置为从存储器103中获取的待显示图像帧的图像信号，根据待显示图像帧的图像信号，确定待显示图像帧的刷新频率；以及根据待显示图像帧的不同的刷新频率，输出不同的控制信号。示例的，处理器根据待显示图像帧的图像信号，确定待显示图像帧的刷新频率为第一刷新频率(例如60Hz)，输出第一控制信号。又示例 的，处理器根据待显示图像帧的图像信号，确定待显示图像帧的刷新频率为第二刷新频率(例如40Hz)，输出第二控制信号。
在一些实施例中，继续如图1所示，基准灰阶电压产生器11包括寄存器111和控制器112。寄存器111被配置为存储至少两组基准灰阶电压产生参数。控制器112被配置为响应于接收到的来自时序控制器10的不同的控制信号，从寄存器111中读取至少两组基准灰阶电压产生参数中的一组基准灰阶电压产生参数，以使基准灰阶电压产生器11输出与每个控制信号对应的一组基准灰阶电压。
需要说明的是，基准灰阶电压产生器11输出的基准灰阶电压的大小，可以采用编程的方式对该基准灰阶电压产生器11内部的基准灰阶电压产生参数进行设定而获得。因此，一组基准灰阶电压中的每个基准灰阶电压的大小均取决于基准灰阶电压产生器11内部设定的与其对应的基准灰阶电压产生参数。
在一些示例中，时序控制器10中的处理器101被配置为根据待显示图像帧的刷新频率为第一刷新频率，输出第一控制信号；以及根据待显示图像帧的刷新频率为第二刷新频率，输出第二控制信号。基准灰阶电压产生器11被配置为响应于接收到的来自时序控制器10的第一控制信号，输出与第一控制信号对应的第一组基准灰阶电压；以及响应于接收到的来自时序控制器10的第二控制信号，输出与第二控制信号对应的第二组基准灰阶电压。
示例的，第一组基准灰阶电压和第二组基准灰阶电压均包括14个基准灰阶电压。第一组基准灰阶电压分别为V gam1_1、V gam1_2、V gam1_3、V gam1_4、V gam1_5、V gam1_6、V gam1_7、V gam1_8、V gam1_9、V gam1_10、V gam1_11、V gam1_12、V gam1_13和V gam1_14；第二组基准灰阶电压为V gam2_1、V gam2_2、V gam2_3、V gam2_4、V gam2_5、V gam2_6、V gam2_7、V gam2_8、V gam2_9、V gam2_10、V gam2_11、V gam2_12、V gam2_13和V gam2_14。在此基础上，示例的，基准灰阶电压产生器11包括14个基准灰阶电压输出端，第一组基准灰阶电压中的14个基准灰阶电压分别通过该14个基准灰阶电压输出端输出。第二组基准灰阶电压中的14个基准灰阶电压分别通过该14个基准灰阶电压输出端输出。
示例的，第一组基准灰阶电压中的V gam1_1、V gam1_2、V gam1_3、V gam1_4、V gam1_5、V gam1_6和V gam1_7以及第二组基准灰阶电压中的V gam2_1、V gam2_2、V gam2_3、V gam2_4、V gam2_5、V gam2_6和V gam2_7为正极性。第一组基准灰阶电压中的V gam1_8、V gam1_9、V gam1_10、V gam1_11、V gam1_12、V gam1_13和V gam1_14和第二组基准灰阶电压中的V gam2_8、V gam2_9、V gam2_10、V gam2_11、V gam2_12、V gam2_13和V gam2_14为负极性。这 样，可以根据需要进行极性反转，防止液晶层中的液晶分子出现老化的现象。
又示例的，第一组基准灰阶电压和第二组基准灰阶电压均包括7个基准灰阶电压。第一组基准灰阶电压分别为V gam1_1、V gam1_2、V gam1_3、V gam1_4、V gam1_5、V gam1_6和V gam1_7；第二组基准灰阶电压为V gam2_1、V gam2_2、V gam2_3、V gam2_4、V gam2_5、V gam2_6和V gam2_7。
在一些示例中，如图5所示，寄存器111包括第一寄存器1111和第二寄存器1112。第一寄存器1111被配置为存储第一组基准灰阶电压产生参数，第一组基准灰阶电压产生参数用于产生第一组基准灰阶电压；第二寄存器1112被配置为存储第二组基准灰阶电压产生参数，第二组基准灰阶电压产生参数用于产生第二组基准灰阶电压。
示例的，如图6A所示，时序控制器10中的处理器101根据待显示图像帧的图像信号，确定待显示图像帧的刷新频率为第一刷新频率(例如60Hz)，输出第一控制信号S1。基准灰阶电压产生器11中的控制器112响应于接收到的来自时序控制器10的第一控制信号S1，从第一寄存器1111中读取第一组基准灰阶电压产生参数，以使基准灰阶电压产生器11输出与第一控制信号S1对应的第一组基准灰阶电压V gam1_1、V gam1_2、V gam1_3、V gam1_4、V gam1_5、V gam1_6、V gam1_7、V gam1_8、V gam1_9、V gam1_10、V gam1_11、V gam1_12、V gam1_13和V gam1_14。
又示例的，如图6B所示，时序控制器10中的处理器101根据待显示图像帧的图像信号，确定待显示图像帧的刷新频率为第二刷新频率(例如40Hz)，输出第二控制信号S2。基准灰阶电压产生器11中的控制器112响应于接收到的来自时序控制器10的第二控制信号S2，从第二寄存器1112中读取第二组基准灰阶电压产生参数，以使基准灰阶电压产生器11输出与第二控制信号S2对应的第二组基准灰阶电压V gam2_1、V gam2_2、V gam2_3、V gam2_4、V gam2_5、V gam2_6、V gam2_7、V gam2_8、V gam2_9、V gam2_10、V gam2_11、V gam2_12、V gam2_13和V gam2_14。
需要说明的是，为清楚体现基准灰阶电压产生器11根据不同的控制信号而输出与每个控制信号对应的一组基准灰阶电压，分别以图6A和图6B进行示意。但在实际中，不同的控制信号均由一个时序控制器10输出。类似的，同一个基准灰阶电压产生器11中包括了多个寄存器111，每个寄存器111存储一组基准灰阶电压产生参数。该基准灰阶电压产生器11中的控制器112响应于不同的控制信号，从对应的一个寄存器中读取一组基准灰阶电压产生参数，输出对应的一组基准灰阶电压。
在一些实施例中，如图6A和图6B所示，驱动系统100还包括至少一个源极驱动器12，该源极驱动器12与基准灰阶电压产生器11和时序控制器10 连接。源极驱动器12具有多个输出端OP，每个源极驱动器12被配置为根据来自时序控制器10的数据信号以及来自基准灰阶电压产生器11输出的一组基准灰阶电压，通过多个输出端OP输出多个灰阶电压。
示例性的，源极驱动器12为数据驱动集成电路(Source Driver Integrated Circuit，Source IC)。
在一些示例中，每个源极驱动器被12配置为根据来自时序控制器10的数据信号以及来自基准灰阶电压产生器11输出的第一组基准灰阶电压，通过多个输出端OP输出第一组灰阶电压。
在另一些示例中，每个源极驱动器12被配置为根据来自时序控制器10的数据信号以及来自基准灰阶电压产生器11输出的第二组基准灰阶电压，通过多个输出端OP输出第二组灰阶电压。
如图7所示，本公开的一些实施例还提供一种显示装置，显示装置包括显示面板200和上述驱动系统100。该显示装置可以用作手机、平板电脑、个人数字助理(personal digital assistant，PDA)、车载电脑等，本公开的实施例对显示装置的用途不做特殊限制。
在一些实施例中，如图8所示，显示面板200包括多根数据线DL，至少部分数据线DL中的每个与一个源极驱动器12的输出端OP连接。
在一些示例中，如图8所示，显示面板200具有显示区A和周边区S，周边区S例如围绕显示区A一圈设置。显示区A中设置有多个亚像素P。该多个亚像素P至少包括第一颜色亚像素、第二颜色亚像素和第三颜色亚像素，第一颜色、第二颜色和第三颜色为三基色(例如红色、绿色和蓝色)。
源极驱动器12根据来自时序控制器10的数据信号以及来自基准灰阶电压产生器11的一组基准灰阶电压，输出多个灰阶电压，并将多个灰阶电压传输至多根数据线DL。这里，每个灰阶电压被传输至显示面板200的一个亚像素中。
示例的，如图8所示，多根数据线DL分别与多列亚像素连接，多根栅线GL与多行亚像素连接。在第一行栅线GL输入扫描信号后，至少一个源极驱动器12输出多个灰阶电压至多根数据线DL，并通过多根数据线DL传输至第一行亚像素中；在第二行栅线GL输入扫描信号后，至少一个源极驱动器12输出多个灰阶电压至多根数据线DL，并通过多根数据线DL传输至第二行亚像素中；在第三行栅线GL输入扫描信号后，至少一个源极驱动器12输出多个灰阶电压至多根数据线DL，并通过多根数据线DL传输至第三行亚像素中；以此类推，直至在最后一行栅线GL输入扫描信号后，至少一个源极驱动 器12输出多个灰阶电压至多根数据线DL，并通过多根数据线DL传输至最后一行亚像素中。
由此可知，在显示面板进行图像显示时，在一帧图像时间内，至少一个源极驱动器在每行亚像素的扫描时间内，都要根据来自时序控制器10的数据信号以及来自基准灰阶电压产生器11的一组基准灰阶电压，输出多个灰阶电压。
在本公开一些示例中，时序控制器10中的处理器101根据待显示图像帧的图像信号，确定待显示图像帧的刷新频率为第一刷新频率(例如60Hz)，输出第一控制信号S1。如图6A所示，基准灰阶电压产生器11中的控制器112响应于接收到的来自时序控制器10的第一控制信号S1，从第一寄存器1111中读取第一组基准灰阶电压产生参数，以使基准灰阶电压产生器11输出与第一控制信号S1对应的第一组基准灰阶电压，例如V gam1_1、V gam1_2、V gam1_3、V gam1_4、V gam1_5、V gam1_6、V gam1_7、V gam1_8、V gam1_9、V gam1_10、V gam1_11、V gam1_12、V gam1_13和V gam1_14。源极驱动器根据来自时序控制器10的数据信号以及来自基准灰阶电压产生器11的第一组基准灰阶电压，输出第一组灰阶电压，并将第一组灰阶电压传输至与多根数据线DL连接的一行亚像素中的多个亚像素中。在此情况下，显示面板200的显示亮度为L1。
在另一些示例中，时序控制器10中的处理器101根据待显示图像帧的图像信号，确定待显示图像帧的刷新频率为第二刷新频率(例如40Hz)，输出第二控制信号S2。如图5B所示，基准灰阶电压产生器11中的控制器112响应于接收到的来自时序控制器10的第二控制信号S2，从第二寄存器1112中读取第二组基准灰阶电压产生参数，以使基准灰阶电压产生器11输出与第二控制信号S2对应的第二组基准灰阶电压，例如V gam2_1、V gam2_2、V gam2_3、V gam2_4、V gam2_5、V gam2_6、V gam2_7、V gam2_8、V gam2_9、V gam2_10、V gam2_11、V gam2_12、V gam2_13和V gam2_14。源极驱动器根据来自时序控制器10的数据信号以及来自基准灰阶电压产生器11的第二组基准灰阶电压，输出第二组灰阶电压，并将第二组灰阶电压传输至与多根数据线DL连接的一行亚像素中的多个亚像素中，在此情况下，显示面板200的显示亮度为L2。
在上述基础上，示例的，第二组基准灰阶电压产生参数采用如下方法设置；以显示面板在第一刷新频率(例如60Hz)下，显示亮度为L1为基准；调节第一组基准灰阶电压产生参数，测量显示面板在第二刷新频率(例如40Hz)下的显示亮度，直至显示面板在第二刷新频率(例如40Hz)下的显示亮度L2等于L1。此时，调节后的第一组基准灰阶电压产生参数作为第二组 基准灰阶电压产生参数。这里，显示亮度可采用亮度测量仪进行测量。
本公开一些实施例还提供了一种显示装置的驱动方法，如图9所示，包括S1-S3。
S1：接收待显示图像帧的图像信号。
S2：根据所述待显示图像帧的图像信号，确定所述待显示图像帧的刷新频率。
S3：根据所述待显示图像帧的不同的刷新频率，向所述基准灰阶电压产生器输出不同的控制信号，以使所述基准灰阶电压产生器根据不同的控制信号，输出与每个控制信号对应的一组基准灰阶电压。
在一些示例中，时序控制器10接收待显示图像帧的图像信号，并根据待显示图像帧的图像信号，解析得到数据信号和时序控制信号。时序控制器10根据时序控制信号(例如时钟信号)，确定待显示图像帧的刷新频率为第一刷新频率(例如60Hz)。时序控制器10根据待显示图像帧的刷新频率为第一刷新频率，向基准灰阶电压产生器11输出第一控制信号S1，以使基准灰阶电压产生器11根据第一控制信号S1，读取基准灰阶电压产生器11中存储的第一组基准灰阶电压产生参数，并输出与第一控制信号S1对应的第一组基准灰阶电压，例如V gam1_1、V gam1_2、V gam1_3、V gam1_4、V gam1_5、V gam1_6、V gam1_7、V gam1_8、V gam1_9、V gam1_10、V gam1_11、V gam1_12、V gam1_13和V gam1_14。进而使源极驱动器12根据来自时序控制器10的数据信号以及来自基准灰阶电压产生器11的第一组基准灰阶电压，输出第一组灰阶电压，并将第一组灰阶电压传输至与多根数据线DL连接的一行亚像素中的多个亚像素中。在此情况下，显示面板200的显示亮度为L1。
在显示面板切换刷新频率的情况下，时序控制器10根据待显示图像帧的图像信号，解析得到数据信号和时序控制信号；并根据时序控制信号，确定待显示图像帧的刷新频率切换为第二刷新频率(例如40Hz)。时序控制器10向基准灰阶电压产生器11输出第二控制信号S2，以使基准灰阶电压产生器11根据第二控制信号S2，读取基准灰阶电压产生器11中存储的第二组基准灰阶电压产生参数，并输出与第二控制信号S2对应的第二组基准灰阶电压，例如V gam2_1、V gam2_2、V gam2_3、V gam2_4、V gam2_5、V gam2_6、V gam2_7、V gam2_8、V gam2_9、V gam2_10、V gam2_11、V gam2_12、V gam2_13和V gam2_14。进而使源极驱动器根据来自时序控制器10的数据信号以及来自基准灰阶电压产生器11的第二组基准灰阶电压，输出第二组灰阶电压，并将第二组灰阶电压传输至与多根数据线DL连接的一行亚像素中的多个亚像素中。在此情况下，显示面板200的显示亮 度为L2。
在上述基础上，示例的，第二组基准灰阶电压产生参数采用如下方法设置；以显示面板在第一刷新频率(例如60Hz)下，显示亮度为L1为基准；调节第一组基准灰阶电压产生参数，测量显示面板在第二刷新频率(例如40Hz)下的显示亮度，直至显示面板在第二刷新频率(例如40Hz)下的显示亮度L2等于L1。此时，调节后的第一组基准灰阶电压产生参数作为第二组基准灰阶电压产生参数。
需要说明的是，第一组基准灰阶电压产生参数和第二组基准灰阶电压产生参数均是提前获取的，并存储在基准灰阶电压产生器11中。
以上所述，仅为本公开的具体实施方式，但本公开的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本公开揭露的技术范围内，想到变化或替换，都应涵盖在本公开的保护范围之内。因此，本公开的保护范围应以所述权利要求的保护范围为准。

Claims (13)

  1. 一种时序控制器，包括：
    接收器，被配置为接收待显示图像帧的图像信号；
    处理器，被配置为根据所述待显示图像帧的图像信号，确定所述待显示图像帧的刷新频率；以及根据所述待显示图像帧的不同的刷新频率，输出不同的控制信号。
  2. 根据权利要求1所述的时序控制器，其中，所述处理器根据所述待显示图像帧的图像信号，确定所述待显示图像帧的刷新频率，包括：
    所述处理器根据所述待显示图像帧的图像信号，解析得到数据信号和时序控制信号；以及根据所述时序控制信号，确定所述待显示图像帧的刷新频率。
  3. 根据权利要求2所述的时序控制器，其中，所述处理器根据所述时序控制信号，确定所述待显示图像帧的刷新频率，包括：
    所述处理器根据所述时序控制信号中任意相邻两个有效电平之间的时间长度，确定所述待显示图像帧的刷新频率。
  4. 根据权利要求3所述的时序控制器，其中，所述处理器根据所述时序控制信号中任意相邻两个有效电平之间的时间长度，确定所述待显示图像帧的刷新频率，包括：
    所述处理器根据所述时序控制信号中任意相邻两个有效电平之间的第一时间长度，确定所述待显示图像帧的刷新频率为第一刷新频率；
    所述处理器根据所述时序控制信号中任意相邻两个有效电平之间的第二时间长度，确定所述待显示图像帧的刷新频率为第二刷新频率。
  5. 根据权利要求4所述的时序控制器，其中，所述处理器根据所述待显示图像帧的不同的刷新频率，输出不同的控制信号，包括：
    所述处理器根据所述待显示图像帧的刷新频率为第一刷新频率，输出第一控制信号；
    所述处理器根据所述待显示图像帧的刷新频率为第二刷新频率，输出第二控制信号。
  6. 根据权利要求1-5任一项所述的时序控制器，还包括：
    存储器，被配置为存储所述待显示图像帧的图像信号。
  7. 一种驱动系统，包括：
    权利要求1-6任一项所述的时序控制器；
    基准灰阶电压产生器，与所述时序控制器连接，所述基准灰阶电压产生器被配置为响应于接收到的来自所述时序控制器的不同的控制信号，输出与 每个控制信号对应的一组基准灰阶电压；每组基准灰阶电压包括多个基准灰阶电压。
  8. 根据权利要求7所述的驱动系统，其中，所述基准灰阶电压产生器包括寄存器和控制器；
    所述寄存器被配置为存储至少两组基准灰阶电压产生参数，每组基准灰阶电压产生参数用于产生对应的一组基准灰阶电压；
    所述控制器被配置为响应于接收到的来自所述时序控制器的不同的控制信号，从所述寄存器中读取所述至少两组基准灰阶电压产生参数中的一组基准灰阶电压产生参数，以使所述基准灰阶电压产生器输出与每个控制信号对应的一组基准灰阶电压。
  9. 根据权利要求8所述的驱动系统，其中，所述时序控制器中的处理器被配置为根据所述待显示图像帧的刷新频率为第一刷新频率，输出第一控制信号；以及根据所述待显示图像帧的刷新频率为第二刷新频率，输出第二控制信号；
    所述基准灰阶电压产生器被配置为响应于接收到的来自所述时序控制器的所述第一控制信号，输出与所述第一控制信号对应的所述第一组基准灰阶电压；以及响应于接收到的来自所述时序控制器的所述第二控制信号，输出与所述第二控制信号对应的所述第二组基准灰阶电压。
  10. 根据权利要求7-9中任一项所述的驱动系统，其中，所述待显示图像帧的图像信号包括数据信号和时序控制信号；所述驱动系统还包括：
    至少一个源极驱动器，与所述基准灰阶电压产生器和所述时序控制器连接；所述源极驱动器具有多个输出端，每个源极驱动器被配置为根据来自所述时序控制器的所述数据信号以及来自所述基准灰阶电压产生器的一组基准灰阶电压，通过所述多个输出端输出多个灰阶电压。
  11. 一种显示装置，包括：
    权利要求7-10中任一项所述的驱动系统；以及
    显示面板。
  12. 根据权利要求11所述的显示装置，其中，驱动系统包括至少一个源极驱动器；
    所述显示面板包括多根数据线，至少部分数据线中的每个与一个源极驱动器的输出端连接。
  13. 一种显示装置的驱动方法，包括：
    接收待显示图像帧的图像信号；
    根据所述待显示图像帧的图像信号，确定所述待显示图像帧的刷新频率；
    根据所述待显示图像帧的不同的刷新频率，向所述基准灰阶电压产生器输出不同的控制信号，以使所述基准灰阶电压产生器根据不同的控制信号，输出与每个控制信号对应的一组基准灰阶电压。
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