WO2021053892A1 - Dispositif piézoélectrique et son procédé de fabrication - Google Patents

Dispositif piézoélectrique et son procédé de fabrication Download PDF

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Publication number
WO2021053892A1
WO2021053892A1 PCT/JP2020/022109 JP2020022109W WO2021053892A1 WO 2021053892 A1 WO2021053892 A1 WO 2021053892A1 JP 2020022109 W JP2020022109 W JP 2020022109W WO 2021053892 A1 WO2021053892 A1 WO 2021053892A1
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Prior art keywords
layer
single crystal
electrode layer
groove
piezoelectric device
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PCT/JP2020/022109
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English (en)
Japanese (ja)
Inventor
文弥 黒川
伸介 池内
勝之 鈴木
諭卓 岸本
青司 梅澤
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株式会社村田製作所
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Publication of WO2021053892A1 publication Critical patent/WO2021053892A1/fr

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02N—ELECTRIC MACHINES NOT OTHERWISE PROVIDED FOR
    • H02N2/00—Electric machines in general using piezoelectric effect, electrostriction or magnetostriction
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H3/00—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators
    • H03H3/007—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks
    • H03H3/02—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of piezoelectric or electrostrictive resonators or networks
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/15—Constructional features of resonators consisting of piezoelectric or electrostrictive material
    • H03H9/17—Constructional features of resonators consisting of piezoelectric or electrostrictive material having a single resonator
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04R—LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
    • H04R17/00—Piezoelectric transducers; Electrostrictive transducers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N30/00—Piezoelectric or electrostrictive devices
    • H10N30/01—Manufacture or treatment
    • H10N30/06—Forming electrodes or interconnections, e.g. leads or terminals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N30/00—Piezoelectric or electrostrictive devices
    • H10N30/80—Constructional details
    • H10N30/87—Electrodes or interconnections, e.g. leads or terminals

Definitions

  • the present invention relates to a piezoelectric device and a method for manufacturing the same.
  • Patent Document 1 is a document that discloses the configuration of the piezoelectric device.
  • the piezoelectric device described in Patent Document 1 includes a substrate and a membrane portion.
  • the substrate has an opening formed to penetrate.
  • the membrane portion is formed of at least one elastic layer and at least one piezoelectric layer sandwiched between the upper electrode layer and the lower electrode layer.
  • the membrane portion is attached to the substrate above the opening.
  • a through groove is formed by etching.
  • the piezoelectric layer is exposed in the through groove of the membrane portion.
  • the surface of the piezoelectric layer may be roughened, and the electrical characteristics of the piezoelectric device may be deteriorated. Therefore, there is room for improving the environmental resistance of the piezoelectric device by protecting the cross section forming the through groove of the piezoelectric layer.
  • the present invention has been made in view of the above problems, and an object of the present invention is to provide a piezoelectric device capable of improving environmental resistance.
  • the piezoelectric device based on the present invention includes a base portion and a membrane portion.
  • the membrane portion is indirectly supported by the base portion, is located above the base portion, and is composed of a plurality of layers.
  • the membrane portion does not overlap the base portion.
  • the membrane portion includes a single crystal piezoelectric layer, an upper electrode layer, and a lower electrode layer.
  • the upper electrode layer is arranged above the single crystal piezoelectric layer.
  • the lower electrode layer is arranged so as to face at least a part of the upper electrode layer via the single crystal piezoelectric layer.
  • the membrane portion is provided with a through groove that penetrates in the vertical direction.
  • the first cross section of the single crystal piezoelectric layer facing the through groove is covered with a first protective portion located with the through groove in between.
  • the method for manufacturing a piezoelectric device based on the present invention includes a step of arranging a lower electrode layer below the single crystal piezoelectric layer and a step of forming a groove for a first protective portion penetrating in the vertical direction in the single crystal piezoelectric layer.
  • a step of filling the groove for the first protective portion with the first protective portion a step of forming a first laminated body including at least a single crystal piezoelectric layer, and a second laminated body under the first laminated body.
  • a step of arranging the above a step of forming a through groove, and a step of forming a recess.
  • a through groove that penetrates at least the first laminated body in the vertical direction is formed so as to divide the first protective portion.
  • the upper electrode layer and the lower electrode layer overlap with each other via the single crystal piezoelectric layer and the portion where the through groove is located.
  • a recess is formed which is opened on the lower side of the second laminated body and communicates with the through groove.
  • the environmental resistance of the piezoelectric device can be improved.
  • FIG. 5 is a cross-sectional view of the piezoelectric device of FIG. 1 as viewed from the direction of the arrow along line II-II. It is sectional drawing which shows the state which provided the lower electrode layer on the lower surface of the single crystal piezoelectric layer in the manufacturing method of the piezoelectric device which concerns on Embodiment 1 of this invention. It is sectional drawing which shows the state which formed the groove for the 1st protection part in the single crystal piezoelectric layer in the manufacturing method of the piezoelectric device which concerns on Embodiment 1 of this invention.
  • FIG. 5 is a cross-sectional view showing a state in which the lower surface of the intermediate layer is scraped in the method for manufacturing a piezoelectric device according to the first embodiment of the present invention. It is sectional drawing which shows the state which prepared the 2nd laminated body in the manufacturing method of the piezoelectric device which concerns on Embodiment 1 of this invention.
  • FIG. 5 is a cross-sectional view showing a state in which a groove is formed in a single crystal piezoelectric layer in the method for manufacturing a piezoelectric device according to the first embodiment of the present invention.
  • FIG. 5 is a cross-sectional view showing a state in which a first external electrode is provided on an upper electrode layer and a second external electrode is provided on a lower electrode layer in the method for manufacturing a piezoelectric device according to the first embodiment of the present invention. It is sectional drawing of the piezoelectric device which concerns on Embodiment 2 of this invention. It is sectional drawing which shows the state which formed the groove for the 1st protection part and the groove for the 2nd protection part in the single crystal piezoelectric layer in the manufacturing method of the piezoelectric device which concerns on Embodiment 2 of this invention.
  • a first intermediate layer is provided on the lower surface of each of the single crystal piezoelectric layers, in the groove for the first protective portion, and in the groove for the second protective portion. It is sectional drawing which shows the state. It is sectional drawing which shows the state which the lower surface of the 1st intermediate layer was shaved in the manufacturing method of the piezoelectric device which concerns on Embodiment 2 of this invention. It is sectional drawing which shows the state which provided the lower electrode layer on the lower surface of the 1st intermediate layer in the manufacturing method of the piezoelectric device which concerns on Embodiment 2 of this invention.
  • FIG. 5 is a cross-sectional view showing a state in which a first external electrode is provided on an upper electrode layer and a second external electrode is provided on a semiconductor layer which is a lower electrode layer in the method for manufacturing a piezoelectric device according to the fourth embodiment of the present invention. ..
  • FIG. 1 is a plan view of the piezoelectric device according to the first embodiment of the present invention.
  • FIG. 2 is a cross-sectional view of the piezoelectric device of FIG. 1 as viewed from the direction of the arrow along line II-II.
  • the piezoelectric device 100 includes a base portion 110 and a membrane portion 120.
  • the base 110 includes a lower base 110a and an upper base 110b located above the lower base 110a.
  • the base 110 has an upper main surface 111 and a lower main surface 112 located on the opposite side of the upper main surface 111.
  • the upper surface of the upper base 110b is the upper main surface 111
  • the lower surface of the lower base 110a is the lower main surface 112.
  • the base 110 is formed with a recess 113 that penetrates the lower base 110a and the upper base 110b in the vertical direction.
  • the material constituting the base 110 is not particularly limited.
  • the lower base 110a is made of Si.
  • the upper base 110b is made of SiO 2 .
  • a plurality of layers 130 are laminated on the upper main surface 111 of the base 110.
  • the membrane portion 120 is a portion of the plurality of layers located above the recess 113. That is, the membrane portion 120 is composed of a plurality of layers 130.
  • the plurality of layers 130 extend from the membrane portion 120 to the upper side of the base portion 110.
  • the membrane portion 120 Since the membrane portion 120 is located above the recess 113 of the base 110, it does not overlap the base 110. That is, the membrane portion 120 is indirectly supported by the base portion 110 and is located above the base portion 110.
  • the membrane portion 120 is provided with a through groove 121 penetrating in the vertical direction.
  • the width of the through groove 121 is substantially constant from the upper end to the lower end.
  • the width of the through groove 121 is preferably 10 ⁇ m or less.
  • the membrane portion 120 includes a single crystal piezoelectric layer 140, an upper electrode layer 150, a lower electrode layer 160, an intermediate layer 170, a semiconductor layer 180, and a first protective portion 190. .. That is, the plurality of layers 130 constituting the membrane portion 120 include the single crystal piezoelectric layer 140, the upper electrode layer 150, the lower electrode layer 160, the intermediate layer 170, the semiconductor layer 180, and the first protective portion 190. have.
  • the single crystal piezoelectric layer 140 is located above the base 110.
  • the single crystal piezoelectric layer 140 has a first cross section 141 and a second cross section 142.
  • the distance between the first cross sections 141 increases from the upper electrode layer 150 side to the lower electrode layer 160 side.
  • the distance between the second cross sections 142 is substantially constant from the upper electrode layer 150 side to the lower electrode layer 160 side.
  • the single crystal piezoelectric layer 140 is formed with a groove portion 143 that penetrates the single crystal piezoelectric layer 140 in the vertical direction.
  • the second cross section 142 faces the groove portion 143.
  • the thickness of the single crystal piezoelectric layer 140 is, for example, 5 ⁇ m or less.
  • the single crystal piezoelectric layer 140 is made of lithium tantalate or lithium niobate.
  • the single crystal piezoelectric layer 140 composed of lithium tantalate or lithium niobate has a uniform polarization state, and the direction parallel to the plane on the base 110 side of the single crystal piezoelectric layer 140 is the in-plane direction. In addition, it has the property of being easy to cleave while forming a cleavage plane in a specific in-plane direction and out-of-plane direction.
  • the upper electrode layer 150 is arranged above the single crystal piezoelectric layer 140.
  • An adhesion layer may be arranged between the upper electrode layer 150 and the single crystal piezoelectric layer 140.
  • the lower electrode layer 160 is arranged in the membrane portion 120 so as to face at least a part of the upper electrode layer 150 via the single crystal piezoelectric layer 140.
  • the lower electrode layer 160 is arranged below the single crystal piezoelectric layer 140.
  • An adhesion layer may be arranged between the lower electrode layer 160 and the single crystal piezoelectric layer 140.
  • the lower electrode layer 160 has an etching stop layer 161.
  • the etching stop layer 161 is located at a portion of the lower electrode layer 160 on the base 110 side.
  • the etching stop layer 161 may be located at a portion of the lower electrode layer 160 opposite to the base 110 side.
  • the lower electrode layer 160 is arranged above the base 110 and below the groove 143 formed in the single crystal piezoelectric layer 140.
  • the lower electrode layer 160 is located so as to cover the lower part of the groove portion 143.
  • the etching stop layer 161 of the lower electrode layer 160 is located so as to cover the lower part of the groove portion 143.
  • the upper electrode layer 150 is continuously formed on the upper side of the single crystal piezoelectric layer 140 when viewed from above and below. ing.
  • the lower electrode layer 160 is also continuously formed under the single crystal piezoelectric layer 140 when viewed from above and below.
  • the outer edges of the upper electrode layer 150 and the lower electrode layer 160 are preferably located non-parallel to the cleavage direction of the single crystal piezoelectric layer 140. .. Further, when the piezoelectric device 100 according to the present embodiment includes a semiconductor layer made of Si, the outer edges of the upper electrode layer 150 and the lower electrode layer 160 are set with respect to the opening direction of the semiconductor layer. It is preferable that they are located non-parallel.
  • each of the upper electrode layer 150 and the lower electrode layer 160 is made of a conductive material such as Pt, Ni, or Au.
  • the etching stop layer 161 is preferably a material that has conductivity and is not etched when the single crystal piezoelectric 140 layer is etched. It is composed of an etching stop layer 161 such as Ni.
  • the material of the adhesion layer is not particularly limited as long as it is a material having conductivity and adhesion.
  • the adhesion layer is composed of, for example, a Ti, Cr, Ni or NiCr alloy.
  • the adhesion layer is preferably made of a NiCr alloy that is less likely to diffuse atoms into the single crystal piezoelectric layer 140 as compared with Ti.
  • the piezoelectric device 100 further includes a first external electrode 155 and a second external electrode 165.
  • the first external electrode 155 is electrically connected to the upper electrode layer 150, and specifically, is arranged on the upper electrode layer 150 above the base 110.
  • the second external electrode 165 is electrically connected to the lower electrode layer 160.
  • the second external electrode 165 is provided on the lower electrode layer 160, on the second cross section 142 which is the inner side surface of the groove portion 143, and on the upper surface of the single crystal piezoelectric layer 140.
  • the material constituting each of the first external electrode 155 and the second external electrode 165 is not particularly limited as long as it is a conductive material such as metal.
  • the intermediate layer 170 is arranged below the single crystal piezoelectric layer 140.
  • the intermediate layer 170 includes the lower surface of the lower electrode layer 160, the lower surface of the single crystal piezoelectric layer 140 that is not covered by the lower electrode layer 160, and the lower surface of the first protective portion 190. It is provided so that it touches.
  • the intermediate layer 170 is composed of a dielectric layer such as SiO 2.
  • the semiconductor layer 180 is arranged below the intermediate layer 170.
  • the semiconductor layer 180 is provided so as to be in contact with the lower surface of the intermediate layer 170.
  • the semiconductor layer 180 may be provided on the lower surface of the intermediate layer 170 via the metal layer.
  • the lower surface of the semiconductor layer 180 is exposed in the recess 113.
  • the semiconductor layer 180 is made of, for example, Si.
  • the first protection unit 190 is located on the first cross section 141.
  • the first protective portion 190 is provided with a through groove 121. That is, the first cross section 141 of the single crystal piezoelectric layer 140 facing the through groove 121 is covered with the first protective portion 190 located with the through groove 121 in between.
  • the first protection unit 190 is composed of a member integrated with the intermediate layer 170. That is, the lower surface of the first protective portion 190 is connected to the intermediate layer 170. With the above configuration, the first protective portion 190 and the intermediate layer 170 can be laminated at the same time, and the manufacturing process of the piezoelectric device 100 can be simplified. Further, when the first protective portion 190 is made of the same material as the material constituting the intermediate layer 170, it is possible to suppress the formation of a crystal boundary between the lower surface of the first protective portion 190 and the intermediate layer 170. .. Therefore, it is possible to suppress the occurrence of cracks from the crystal boundary.
  • the first protection unit 190 is made of a dielectric material such as SiO 2.
  • the single crystal piezoelectric layer 140 expands and contracts when a voltage is applied between the upper electrode layer 150 and the lower electrode layer 160.
  • the members other than the single crystal piezoelectric layer 140 are not deformed by the application of voltage. Therefore, the membrane portion 120 bends and vibrates up and down in response to the expansion and contraction of the single crystal piezoelectric layer 140 due to the application of the voltage.
  • FIG. 3 is a cross-sectional view showing a state in which a lower electrode layer is provided on the lower surface of the single crystal piezoelectric layer in the method for manufacturing a piezoelectric device according to the first embodiment of the present invention.
  • the lower electrode layer 160 is arranged below the single crystal piezoelectric layer 140.
  • the thickness of the single crystal piezoelectric layer 140 is, for example, 200 ⁇ m or more and 500 ⁇ m or less.
  • the lower electrode layer 160 is provided on the lower surface of the single crystal piezoelectric layer 140 by a lift-off method, a plating method, an etching method, or the like. More specifically, after providing the portion of the lower electrode layer 160 other than the etching stop layer 161, the etching stop layer 161 is provided. After the etching stop layer 161 is provided, a portion of the lower electrode layer 160 other than the etching stop layer 161 may be provided.
  • the lower electrode layer 160 is preferably provided by epitaxial growth. As a result, the fatigue characteristics of the membrane portion 120 due to the driving of the single crystal piezoelectric layer 140 are improved.
  • FIG. 4 is a cross-sectional view showing a state in which a groove for a first protective portion is formed in a single crystal piezoelectric layer in the method for manufacturing a piezoelectric device according to the first embodiment of the present invention.
  • a groove 141A for the first protective portion is formed on the lower surface of the single crystal piezoelectric layer 140 from the lower side of the single crystal piezoelectric layer 140 by an etching method or the like.
  • the depth of the groove 141A for the first protective portion may be, for example, about 10 ⁇ m.
  • FIG. 5 shows a state in which the lower surfaces of the single crystal piezoelectric layer and the lower electrode layer and the intermediate layer are provided in the groove for the first protective portion in the method for manufacturing the piezoelectric device according to the first embodiment of the present invention. It is a sectional view. As shown in FIGS. 4 and 5, each of the lower electrode layer 160 and the single crystal piezoelectric layer 140 in the groove 141A for the first protective portion by the CVD (Chemical Vapor Deposition) method or the PVD (Physical Vapor Deposition) method or the like. An intermediate layer 170 is provided on the lower surface of the. At this time, the intermediate layer 170 is provided so as to fill the inside of the groove 141A for the first protective portion.
  • CVD Chemical Vapor Deposition
  • PVD Physical Vapor Deposition
  • FIG. 6 is a cross-sectional view showing a state in which the lower surface of the intermediate layer is scraped in the method for manufacturing a piezoelectric device according to the first embodiment of the present invention.
  • the lower surface of the intermediate layer 170 is flattened by chemical mechanical polishing (CMP) or the like.
  • CMP chemical mechanical polishing
  • the groove 141A for the first protective portion is filled with the first protective portion 190 made of the same member as the intermediate layer 170.
  • the first laminated body 10 including at least the single crystal piezoelectric layer 140 is formed by the above steps. Specifically, the first laminated body 10 in the present embodiment further includes a lower electrode layer 160, an intermediate layer 170, and a first protective portion 190.
  • FIG. 7 is a cross-sectional view showing a state in which a second laminated body is prepared in the method for manufacturing a piezoelectric device according to the first embodiment of the present invention.
  • FIG. 8 is a cross-sectional view showing a state in which the second laminated body is bonded to the lower surface of the intermediate layer in the method for manufacturing a piezoelectric device according to the first embodiment of the present invention.
  • FIG. 9 is a cross-sectional view showing a state in which the second laminated body is bonded to the lower surface of the intermediate layer in the method for manufacturing a piezoelectric device according to the first embodiment of the present invention.
  • the second laminated body 20 is joined to the lower side of the first laminated body 10.
  • the second laminated body 20 is composed of a base portion 110 in which the recess 113 is not formed, and a semiconductor layer 180 joined on the upper main surface 111 of the base portion 110.
  • the second laminated body 20 is an SOI (Silicon on Insulator) substrate.
  • FIG. 10 is a cross-sectional view showing a state in which the upper surfaces of the single crystal piezoelectric layer and the first protective portion are scraped in the method for manufacturing the piezoelectric device according to the first embodiment of the present invention.
  • the thickness of the single crystal piezoelectric layer 140 is adjusted. Specifically, the upper surfaces of the single crystal piezoelectric layer 140 and the first protective portion 190 are each scraped by CMP or the like to make the single crystal piezoelectric layer 140 a desired thickness, and the first protective portion 190 is exposed. Let me. In this case, the thickness of the single crystal piezoelectric layer 140 is adjusted so that a desired amount of expansion and contraction of the single crystal piezoelectric layer 140 can be obtained by applying a voltage.
  • a release layer may be formed by implanting ions in advance on the upper surface side of the single crystal piezoelectric layer 140.
  • the thickness of the single crystal piezoelectric layer 140 can be easily adjusted by peeling the peeling layer before the upper surface of the single crystal piezoelectric layer 140 is scraped by CMP or the like.
  • the peeling layer may be scraped by CMP or the like.
  • FIG. 11 is a cross-sectional view showing a state in which an upper electrode layer is provided on the upper surface of the single crystal piezoelectric layer in the method for manufacturing a piezoelectric device according to the first embodiment of the present invention.
  • a lower electrode is formed on the upper side of the single crystal piezoelectric layer 140 by a lift-off method (photolithography method), a plating method, an etching method, or the like, at least partially via the single crystal piezoelectric layer 140.
  • the upper electrode layer 150 is arranged so as to face the layer 160.
  • the upper electrode layer 150 is patterned by the lift-off method (photolithography method).
  • the upper electrode layer 150 is preferably provided by epitaxial growth. As a result, the fatigue characteristics of the membrane portion 120 due to the driving of the single crystal piezoelectric layer 140 are improved.
  • FIG. 12 is a cross-sectional view showing a state in which a through groove is formed from the first protective portion to the semiconductor layer in the method for manufacturing a piezoelectric device according to the first embodiment of the present invention.
  • a through groove 121 is formed in the first protective portion 190 by etching from the upper side.
  • a through groove 121 that penetrates at least the first laminated body 10 in the vertical direction is formed so as to divide the first protective portion 190.
  • the through groove 121 is formed so as to further penetrate the semiconductor layer 180.
  • the through groove 121 may be formed so as to be located below the lower surface of the semiconductor layer 180.
  • FIG. 13 is a cross-sectional view showing a state in which a groove is formed in the single crystal piezoelectric layer in the method for manufacturing a piezoelectric device according to the first embodiment of the present invention.
  • the groove portion 143 is formed by etching the single crystal piezoelectric layer 140 above the base portion 110.
  • the upper portion of the etching stop layer 161 of the lower electrode layer 160 may be etched.
  • FIG. 14 is a cross-sectional view showing a state in which the first external electrode is provided on the upper electrode layer and the second external electrode is provided on the lower electrode layer in the method for manufacturing a piezoelectric device according to the first embodiment of the present invention. ..
  • a first external electrode 155 is provided on the upper electrode layer 150 and a second external electrode 165 is provided on the lower electrode layer 160 by a lift-off method, a plating method, an etching method, or the like.
  • the second external electrode 165 is provided on the etching stop layer 161 of the lower electrode layer 160.
  • the recess 113 is formed. Specifically, when viewed from the vertical direction, the upper electrode layer 150 and the lower electrode layer 160 face each other via the single crystal piezoelectric layer 140, and the portion where the through groove 121 is located. A recess 113 that opens to the lower side of the second laminated body 20 and communicates with the through groove 121 is formed so as to overlap each other.
  • the second laminated body 20 is subjected to deep reactive ion etching (Deep Reactive Ion Etching) to form a recess 113 in the base 110.
  • the piezoelectric device 100 according to the first embodiment of the present invention as shown in FIG. 2 is manufactured.
  • the membrane portion 120 is provided with a through groove 121 penetrating in the vertical direction.
  • the first cross section 141 of the single crystal piezoelectric layer 140 facing the through groove 121 is covered with a first protective portion 190 located with the through groove 121 in between.
  • the distance between the first cross sections 141 increases from the upper electrode layer 150 side to the lower electrode layer 160 side.
  • the first protective portion 190 having good covering property can be obtained by laminating the first protective portion 190 from the lower side of the single crystal piezoelectric layer 140. Can be provided. As a result, in the single crystal piezoelectric layer 140, the internal stress caused by the first protective portion 190 is relaxed, so that cracks are less likely to occur and the reliability of the piezoelectric device 100 is improved.
  • the method for manufacturing the piezoelectric device 100 according to the first embodiment of the present invention includes a step of arranging the lower electrode layer 160 below the single crystal piezoelectric layer 140 and a first method of penetrating the single crystal piezoelectric layer 140 in the vertical direction.
  • the recess 113 when viewed from the vertical direction, a portion where the upper electrode layer 150 and the lower electrode layer 160 face each other via the single crystal piezoelectric layer 140, and a through groove 121 are formed.
  • a recess 113 that opens to the lower side of the second laminated body 20 and communicates with the through groove 121 is formed so as to overlap the located portion.
  • the environmental resistance of the piezoelectric device 100 can be improved. Further, since the through groove 121 is formed by processing the first protective portion 190 which is easier to etch than the single crystal piezoelectric layer 140 made of a difficult-to-etch material, the shape of the through groove 121 is stabilized. be able to.
  • the piezoelectric device according to the second embodiment of the present invention is different from the piezoelectric device 100 according to the first embodiment of the present invention mainly in that a second protective portion is provided. Therefore, the description of the configuration similar to that of the piezoelectric device 100 according to the first embodiment of the present invention will not be repeated.
  • FIG. 15 is a cross-sectional view of the piezoelectric device according to the second embodiment of the present invention.
  • the cross-sectional view of the piezoelectric device 200 shown in FIG. 15 is shown in the same cross-sectional view as the cross-sectional view of the piezoelectric device 100 shown in FIG.
  • the membrane portion 120 includes the first intermediate layer 270 as an intermediate layer located between the lower electrode layer 260 and the single crystal piezoelectric layer 140. ..
  • the stress generated in the membrane portion 120 can be relaxed, and the peeling of the lower electrode layer 260 from the single crystal piezoelectric layer 140 can be suppressed.
  • the membrane portion 120 includes a first intermediate layer 270 and a second intermediate layer 275 as intermediate layers, and the plurality of layers 130 constituting the membrane portion 120 are
  • the intermediate layer includes a first intermediate layer 270 and a second intermediate layer 275.
  • the first intermediate layer 270 is provided so as to be in contact with each of the lower surface of the single crystal piezoelectric layer 140, the lower surface of the first protective portion 190, and the lower surface of the second protective portion described later. Is composed of a dielectric layer such as SiO 2.
  • the lower electrode layer 260 is arranged below the first intermediate layer 270.
  • the first protective portion 190 is composed of a member integrated with the first intermediate layer 270.
  • the second intermediate layer 275 is provided so as to be in contact with each of the lower surface of the lower electrode layer 260 and the lower surface of the first intermediate layer 270 that are not covered by the lower electrode layer 260.
  • the second intermediate layer 275 is preferably made of the same material as the material constituting the first intermediate layer 270.
  • the second intermediate layer 275 is composed of a dielectric layer such as SiO 2.
  • the semiconductor layer 180 is provided so as to be in contact with the lower surface of the first intermediate layer 270.
  • the single crystal piezoelectric layer 140 has a second cross section 242 above the base 110 and facing each other with a groove 143 in between. I have more.
  • the second cross section 242 is covered with a second protective portion 291 located with the groove portion 143 in between.
  • the lower electrode layer 260 is located below the second protective portion 291.
  • the second external electrode 165 is provided on the lower electrode layer 260, the inner side surface of the groove portion 143, and the upper side of the second protective portion 291 and is separated from the single crystal piezoelectric layer 140.
  • the metal atoms constituting the second external electrode 165 it is possible to prevent the metal atoms constituting the second external electrode 165 from diffusing into the single crystal piezoelectric layer 140.
  • the second external electrode 165 is made of Ti and the single crystal piezoelectric layer 140 is made of lithium niobate, the Ti atom is a single crystal piezoelectric layer due to the above configuration. It is possible to suppress the diffusion within 140.
  • the groove portion 143 is formed not in the single crystal piezoelectric layer 140 but in the second protective portion 291.
  • the second cross section 242 is not exposed to the groove portion 143.
  • the groove portion 143 is formed so as to reach the upper surface of the lower electrode layer 260. The distance between the second cross sections 242 increases from the upper electrode layer 150 side to the lower electrode layer 160 side.
  • the second protective portion 291 is composed of a member integrated with the first intermediate layer 270.
  • the lower surface of the second protective portion 291 is connected to the first intermediate layer 270.
  • the second protective portion 291 is made of a dielectric material such as SiO 2.
  • FIG. 16 is a cross-sectional view showing a state in which a groove for a first protective portion and a groove for a second protective portion are formed in a single crystal piezoelectric layer in the method for manufacturing a piezoelectric device according to a second embodiment of the present invention.
  • the groove 141A for the first protective portion is formed, and the groove 242A for the second protective portion is formed on the lower surface of the single crystal piezoelectric layer 140 by an etching method or the like.
  • FIG. 17 shows the first intermediate in each of the lower surface of each single crystal piezoelectric layer, the inside of the groove for the first protection portion, and the inside of the groove for the second protection portion in the method for manufacturing the piezoelectric device according to the second embodiment of the present invention. It is sectional drawing which shows the state which provided the layer. As shown in FIGS. 16 and 17, the first protective portion groove 141A, the second protective portion groove 242A, and the lower surface of the single crystal piezoelectric layer 140 are formed by a CVD method, a PVD method, or the like. An intermediate layer 270 is provided.
  • FIG. 18 is a cross-sectional view showing a state in which the lower surface of the first intermediate layer is scraped in the method for manufacturing a piezoelectric device according to the second embodiment of the present invention.
  • the lower surface of the first intermediate layer 270 is scraped to be flat by CMP or the like.
  • the first protective portion groove 141A is filled with the first protective portion 190 made of the same member as the first intermediate layer 270
  • the second protective portion groove 242A is filled with the first intermediate layer 270. It is filled with the second protective portion 291 made of the same member as the above.
  • FIG. 19 is a cross-sectional view showing a state in which a lower electrode layer is provided on the lower surface of the first intermediate layer in the method for manufacturing a piezoelectric device according to the second embodiment of the present invention.
  • the lower electrode layer 260 is provided on the lower surface of the first intermediate layer 270.
  • the specific method for providing the lower electrode layer 260 is the same as the method for providing the lower electrode layer 160 in the first embodiment of the present invention.
  • FIG. 20 is a cross-sectional view showing a state in which a second intermediate layer is provided on the lower surfaces of each of the first intermediate layer and the lower electrode layer in the method for manufacturing a piezoelectric device according to the second embodiment of the present invention.
  • a second intermediate layer 275 is provided on the lower surfaces of each of the first intermediate layer 270 and the lower electrode layer 260 by a CVD method, a PVD method, or the like.
  • FIG. 21 is a cross-sectional view showing a state in which the lower surface of the second intermediate layer is scraped in the method for manufacturing a piezoelectric device according to the second embodiment of the present invention. As shown in FIG. 21, the lower surface of the second intermediate layer 275 is flattened by CMP or the like.
  • the first laminated body 10 is formed by the above steps. Specifically, the first laminated body 10 in the present embodiment includes a first intermediate layer 270 and a second intermediate layer 275 as intermediate layers, and further includes a second protective portion 291.
  • FIG. 22 is a cross-sectional view showing a state in which the second laminated body is bonded to the lower surface of the second intermediate layer in the method for manufacturing a piezoelectric device according to the second embodiment of the present invention.
  • FIG. 23 is a cross-sectional view showing a state in which the second laminated body is bonded to the lower surface of the second intermediate layer in the method for manufacturing a piezoelectric device according to the second embodiment of the present invention.
  • the second laminated body 20 used in the first embodiment of the present invention is joined to the lower side of the first laminated body 10.
  • FIG. 24 is a cross-sectional view showing a state in which the upper surfaces of the single crystal piezoelectric layer, the first protective portion, and the second protective portion are scraped in the method for manufacturing the piezoelectric device according to the second embodiment of the present invention.
  • the upper surfaces of the single crystal piezoelectric layer 140, the first protective portion 190, and the second protective portion 291 are each scraped by CMP or the like to make the single crystal piezoelectric layer 140 a desired thickness.
  • Each of the first protection unit 190 and the second protection unit 291 is exposed.
  • FIG. 25 is a cross-sectional view showing a state in which an upper electrode layer is provided on the upper surface of the single crystal piezoelectric layer in the method for manufacturing a piezoelectric device according to the second embodiment of the present invention.
  • the upper electrode layer 150 is arranged on the upper surface of the single crystal piezoelectric layer 140 in the same manner as the upper electrode layer 150 in the first embodiment of the present invention.
  • FIG. 26 is a cross-sectional view showing a state in which a through groove is formed from the first protective portion to the semiconductor layer in the method for manufacturing a piezoelectric device according to the second embodiment of the present invention.
  • the through groove 121 is formed in the same manner as the through groove 121 in the first embodiment of the present invention.
  • the through groove 121 is formed so as to penetrate the first intermediate layer 270 and the second intermediate layer 275.
  • FIG. 27 is a cross-sectional view showing a state in which a groove portion is formed from the second protective portion to the first intermediate layer in the method for manufacturing a piezoelectric device according to the second embodiment of the present invention.
  • the groove portion 143 is formed by etching the second protective portion 291 and the first intermediate layer 270 above the base portion 110.
  • FIG. 28 is a cross-sectional view showing a state in which the first external electrode is provided on the upper electrode layer and the second external electrode is provided on the lower electrode layer in the method for manufacturing a piezoelectric device according to the second embodiment of the present invention. .. As shown in FIG. 28, the first external electrode 155 and the second external electrode 165 are provided in the same manner as the first external electrode 155 and the second external electrode 165 in the first embodiment of the present invention.
  • the recess 113 is formed in the same manner as the recess 113 of the first embodiment of the present invention.
  • the piezoelectric device 200 according to the second embodiment of the present invention as shown in FIG. 15 is manufactured.
  • the piezoelectric device according to the third embodiment of the present invention is different from the piezoelectric device 200 according to the second embodiment of the present invention mainly in that it does not have the first intermediate layer 270 in the second embodiment of the present invention. Therefore, the description of the configuration similar to that of the piezoelectric device 200 according to the second embodiment of the present invention will not be repeated.
  • FIG. 29 is a cross-sectional view of the piezoelectric device according to the third embodiment of the present invention.
  • the cross-sectional view of the piezoelectric device 300 shown in FIG. 29 is shown in the same cross-sectional view as the cross-sectional view of the piezoelectric device 200 shown in FIG.
  • the membrane portion 120 includes only the second intermediate layer 275 as the intermediate layer.
  • the lower electrode layer 260 is provided on the lower surface of the single crystal piezoelectric layer 140, the lower surface of the second external electrode 165, and the lower surface of the second protective portion 291.
  • the upper electrode layer 150 and the lower electrode layer 260 face each other with only the single crystal piezoelectric layer 140 interposed therebetween, so that the piezoelectric device 200 is compared with the piezoelectric device 200 according to the second embodiment of the present invention.
  • the piezoelectric characteristics of the device 300 can be improved.
  • the second intermediate layer 275 is provided on the lower surface of the single crystal piezoelectric layer 140, the lower surface of the lower electrode layer 260, and the lower surface of the first protective portion 190.
  • FIGS. 16 and 17 in the same manner as in the manufacturing method of the piezoelectric device 200 according to the second embodiment of the present invention, the inside of the first protective portion groove 141A, the inside of the second protective portion groove 242A, and the single.
  • a first intermediate layer 270 is provided on the lower surface of each of the crystalline piezoelectric layers 140.
  • FIG. 30 is a cross-sectional view showing a state in which the first intermediate layer is scraped from the lower side in the method for manufacturing a piezoelectric device according to the third embodiment of the present invention.
  • the first intermediate layer 270 is scraped from the lower side by CMP or the like to completely remove the first intermediate layer 270 located below the lower surface of the single crystal piezoelectric layer 140.
  • the lower surface of the single crystal piezoelectric layer 140 may be scraped at the same time.
  • FIG. 31 is a cross-sectional view showing a state in which the lower electrode layer is provided on the lower surface of the single crystal piezoelectric layer and the second protective portion in the method for manufacturing the piezoelectric device according to the third embodiment of the present invention.
  • the lower electrode layer 260 is provided on the lower surface of the single crystal piezoelectric layer 140 and the lower surface of the second protective portion 291.
  • the specific method for providing the lower electrode layer 260 is the same as the method for providing the lower electrode layer 160 in the first embodiment of the present invention.
  • FIG. 32 is a cross-sectional view showing a state in which a second intermediate layer is provided on the lower surfaces of each of the first protective portion and the single crystal piezoelectric layer in the method for manufacturing a piezoelectric device according to the third embodiment of the present invention.
  • a second intermediate layer 275 is provided on the lower surfaces of each of the single crystal piezoelectric layer 140, the lower electrode layer 260, and the first protective portion 190 by a CVD method, a PVD method, or the like.
  • the book as shown in FIG. 29 is similar to the method for manufacturing the piezoelectric device 200 according to the second embodiment of the present invention shown in FIGS. 21 to 28.
  • the piezoelectric device 300 according to the third embodiment of the present invention can be manufactured.
  • the piezoelectric device according to the fourth embodiment of the present invention is different from the piezoelectric device 200 according to the second embodiment of the present invention mainly in that the lower electrode layer is a semiconductor layer. Therefore, the description of the configuration similar to that of the piezoelectric device 200 according to the second embodiment of the present invention will not be repeated.
  • FIG. 33 is a cross-sectional view of the piezoelectric device according to the fourth embodiment of the present invention.
  • the cross-sectional view of the piezoelectric device 400 shown in FIG. 33 is shown in the same cross-sectional view as the cross-sectional view of the piezoelectric device 200 shown in FIG.
  • the lower electrode layer 460 is a semiconductor layer 180. That is, as shown in FIG. 15, the lower electrode layer 260 and the second intermediate layer 275 made of members different from the semiconductor layer 180 in the second embodiment of the present invention are the piezoelectric device 400 according to the fourth embodiment of the present invention. Not provided in. As shown in FIG. 33, in the present embodiment, the semiconductor layer 180 is provided on the lower surface of the first intermediate layer 270.
  • the step of providing the lower electrode layer made of a member different from the semiconductor layer 180 can be omitted when manufacturing the piezoelectric device 400. As a result, the manufacturing method of the piezoelectric device 400 can be simplified.
  • the electrical resistivity of the material constituting the semiconductor layer 180 is preferably 20 m ⁇ ⁇ cm or less from the viewpoint of functioning as the lower electrode layer 460.
  • the groove portion 443 is located below the upper surface of the semiconductor layer 180.
  • the contact area between the second external electrode 165 and the semiconductor layer 180, which is the lower electrode layer 460 increases. Therefore, the contact resistance between the second external electrode 165 and the semiconductor layer 180 can be reduced.
  • the groove 141A for the first protective portion is filled with the first protective portion 190, and the second protective portion is formed.
  • the groove 242A is filled with the second protective portion 291.
  • the laminate shown in FIG. 18 is the first laminate 10.
  • FIG. 34 is a cross-sectional view showing a state in which the second laminated body is bonded to the lower surface of the first intermediate layer in the method for manufacturing a piezoelectric device according to the fourth embodiment of the present invention.
  • FIG. 35 is a cross-sectional view showing a state in which the second laminated body is bonded to the lower surface of the first intermediate layer in the method for manufacturing the piezoelectric device according to the fourth embodiment of the present invention.
  • the second laminated body 20 used in the first embodiment of the present invention is joined to the lower side of the first laminated body 10.
  • FIG. 36 is a cross-sectional view showing a state in which the upper surfaces of the single crystal piezoelectric layer, the first protective portion, and the second protective portion are scraped in the method for manufacturing the piezoelectric device according to the fourth embodiment of the present invention.
  • the upper surfaces of the single crystal piezoelectric layer 140, the first protective portion 190, and the second protective portion 291 are each scraped by CMP or the like to make the single crystal piezoelectric layer 140 a desired thickness.
  • Each of the first protective portion 190 and the second protective portion 291 is exposed.
  • FIG. 37 is a cross-sectional view showing a state in which an upper electrode layer is provided on the upper surface of the single crystal piezoelectric layer in the method for manufacturing a piezoelectric device according to the fourth embodiment of the present invention.
  • the upper electrode layer 150 is arranged on the upper surface of the single crystal piezoelectric layer 140 in the same manner as the upper electrode layer 150 in the first embodiment of the present invention.
  • FIG. 38 is a cross-sectional view showing a state in which a through groove is formed from the first protective portion to the semiconductor layer in the method for manufacturing a piezoelectric device according to the fourth embodiment of the present invention.
  • the through groove 121 is formed in the same manner as the through groove 121 in the first embodiment of the present invention.
  • FIG. 39 is a cross-sectional view showing a state in which a groove portion is formed from the second protective portion to the semiconductor layer in the method for manufacturing a piezoelectric device according to the fourth embodiment of the present invention.
  • the groove portion 443 is formed by etching the second protective portion 291 and the first intermediate layer 270 and a part of the semiconductor layer 180 above the base portion 110.
  • FIG. 40 shows a state in which the first external electrode is provided on the upper electrode layer and the second external electrode is provided on the semiconductor layer which is the lower electrode layer in the method for manufacturing the piezoelectric device according to the fourth embodiment of the present invention. It is a sectional view. As shown in FIG. 40, the first external electrode 155 and the second external electrode 165 are provided in the same manner as the first external electrode 155 and the second external electrode 165 in the first embodiment of the present invention. That is, in the fourth embodiment of the present invention, the second external electrode 165 is provided on the semiconductor layer 180, which is the lower electrode layer 460.
  • the recess 113 is formed in the same manner as the recess 113 of the first embodiment of the present invention.
  • the piezoelectric device 400 according to the fourth embodiment of the present invention as shown in FIG. 33 is manufactured.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Acoustics & Sound (AREA)
  • Manufacturing & Machinery (AREA)
  • Signal Processing (AREA)
  • Piezo-Electric Or Mechanical Vibrators, Or Delay Or Filter Circuits (AREA)

Abstract

L'invention concerne un dispositif piézoélectrique (100) dans laquelle une partie de membrane (120) est indirectement supportée par une partie de base (110), est située sur le côté supérieur par rapport à la partie de base (110), et est formée d'une pluralité de couches (130). La partie membrane (120) ne chevauche pas la partie base (110). La partie membrane (120) comprend une couche piézoélectrique monocristalline (140), une couche d'électrode supérieure (150) et une couche d'électrode inférieure (160). La couche d'électrode supérieure (150) est disposée sur la face supérieure de la couche piézoélectrique monocristalline (140). La couche d'électrode inférieure (160) est disposée de manière à faire face à au moins une partie de la couche d'électrode supérieure (150) avec la couche piézoélectrique monocristalline (140) interposée entre elles. La partie membrane (120) est pourvue d'une rainure traversante (121) pénétrant verticalement à travers celle-ci. Une première section transversale (141) de la couche piézoélectrique monocristalline (140) faisant face à la rainure traversante (121) est recouverte par une première partie de protection (190) qui est située avec la rainure traversante (121) prise en sandwich entre celles-ci.
PCT/JP2020/022109 2019-09-17 2020-06-04 Dispositif piézoélectrique et son procédé de fabrication WO2021053892A1 (fr)

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WO2023054694A1 (fr) * 2021-09-30 2023-04-06 株式会社村田製作所 Dispositif à ondes élastiques et procédé de production de dispositif à ondes élastiques

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