WO2021052459A1 - 数字预失真处理方法及装置、计算机设备和可读存储介质 - Google Patents

数字预失真处理方法及装置、计算机设备和可读存储介质 Download PDF

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WO2021052459A1
WO2021052459A1 PCT/CN2020/116147 CN2020116147W WO2021052459A1 WO 2021052459 A1 WO2021052459 A1 WO 2021052459A1 CN 2020116147 W CN2020116147 W CN 2020116147W WO 2021052459 A1 WO2021052459 A1 WO 2021052459A1
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signal
broadband
module
digital predistortion
power amplifier
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PCT/CN2020/116147
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English (en)
French (fr)
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王文元
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三维通信股份有限公司
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems

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  • This application relates to the field of wireless communication technology, and in particular to a digital predistortion processing method and device, computer equipment, and readable storage medium.
  • Digital pre-distortion (Digital Pre-Distortion, referred to as DPD) performs pre-distortion processing on the output signal, which improves the signal transmission power while reducing the influence of signal distortion, thereby improving the operating efficiency of the power amplifier while ensuring the signal transmission quality .
  • the DPD algorithm is generally only suitable for signals with a relatively wide carrier bandwidth, such as Wideband Code Division Multiple Access (W-CDMA), Long Term Evolution (LTE), etc.
  • W-CDMA Wideband Code Division Multiple Access
  • LTE Long Term Evolution
  • the disadvantage of this technology is that it cannot handle signals with a small carrier bandwidth, such as Global System for Mobile Communications (GSM), and Enhanced Data Rate for GSM Evolution (EDGE).
  • GSM Global System for Mobile Communications
  • EDGE Enhanced Data Rate for GSM Evolution
  • NB narrowband signal
  • EVM Error Vector Magnitude
  • intermodulation deterioration in severe cases will burn the associated DPD Power amplifier module (Power Amplifier, PA for short).
  • EVM Error Vector Magnitude
  • PA Power Amplifier
  • a digital predistortion processing method includes:
  • Obtain a normal path signal perform the digital predistortion processing on the normal path signal according to the predistortion coefficient, and transmit the normal path signal after the digital predistortion processing for power amplifier processing.
  • the method before acquiring the normal channel signal, the method further includes: sending first indication information to close the acquisition of the broadband IQ signal.
  • the method before acquiring the broadband IQ signal, the method further includes:
  • the method further includes:
  • the third instruction information is sent to indicate the normal path signal of the normal path to be selected.
  • the method after performing power amplifier processing on the normal channel signal after the digital predistortion processing, the method further includes:
  • the operating parameter value includes at least one of the following: a power amplifier current value, a gain value, and a temperature value;
  • the broadband IQ signal is acquired.
  • the acquiring a broadband IQ signal includes:
  • the broadband IQ signal is acquired from a pre-stored broadband IQ signal, wherein the bandwidth of the broadband IQ signal is greater than or equal to the maximum operating bandwidth of the system in the application operation scenario.
  • a digital predistortion processing device including: a broadband signal generator, a digital predistortion module, and a normal channel signal input module;
  • the digital predistortion module is used to obtain the broadband IQ signal sent by the broadband signal generator;
  • the digital predistortion module is further configured to determine the predistortion coefficient of the digital predistortion module according to the broadband IQ signal and the feedback path signal of the digital predistortion module;
  • the digital predistortion module is further configured to obtain a normal channel signal from the normal channel signal input module, perform the digital predistortion processing on the normal channel signal according to the predistortion coefficient, and perform the digital predistortion processing on the normal channel signal after the processing.
  • the channel signal is transmitted to the associated power amplifier module.
  • the digital predistortion module is further configured to send first indication information to the broadband signal generator, the first indication information instructing to turn off the broadband signal transmitter.
  • the device further includes a signal path selection module, and the digital predistortion module is further configured to send second indication information to the path before acquiring the wideband IQ signal sent by the wideband signal generator A selection module, where the second indication information instructs the path selection module to select the broadband IQ signal sent by the broadband signal generator;
  • the digital predistortion module is further configured to send third indication information to the path selection module before acquiring the normal path signal, the third indication information instructing the path selection module to select the normal path signal of the normal path.
  • the device further includes a power amplifier state feedback module configured to obtain operating parameter values of the power amplifier module to determine whether to turn on the broadband signal generator, wherein the The operating parameter value includes at least one of the following: power amplifier current value, gain value and temperature value;
  • the power amplifier state feedback module is further configured to send an on signal to turn on the broadband signal generator.
  • the wideband IQ signal is pre-stored in the wideband signal generator, the digital predistortion module obtains the wideband IQ signal corresponding to the application operation scenario, and the bandwidth of the wideband IQ signal is greater than or equal to the application operation The maximum working bandwidth of the system in the scene.
  • a computer device including a memory and a processor, the memory stores a computer program, and the processor implements the steps of the digital predistortion processing method when the computer program is executed.
  • a readable storage medium on which a computer program is stored, and when the computer program is executed by a processor, the steps of the above-mentioned digital predistortion processing method are realized.
  • the wideband IQ signal determine the predistortion coefficient of the digital predistortion processing based on the forward path signal and the feedback path signal corresponding to the wideband IQ signal, obtain the normal path signal, and perform the digital predistortion on the normal path signal based on the predistortion coefficient. Distortion processing, and the normal channel signal after the digital predistortion processing is transmitted to the associated power amplifier module, which solves the problem that the digital predistortion function cannot be implemented for the signal with a smaller carrier bandwidth, and the digital predistortion function is applied to the carrier bandwidth. Small communication system.
  • FIG. 1 is a first structural diagram of a digital predistortion processing apparatus according to an embodiment of the present application.
  • Fig. 2 is a schematic structural diagram of a digital predistortion module according to an embodiment of the present application.
  • FIG. 3 is a second structural diagram of a digital predistortion processing apparatus according to an embodiment of the present application.
  • FIG. 4 is a third structural diagram of a digital predistortion processing device according to an embodiment of the present application.
  • Fig. 5 is a first flowchart of a digital predistortion processing method according to an embodiment of the present application.
  • Fig. 6 is a second flowchart of a digital predistortion processing method according to an embodiment of the present application.
  • Fig. 7 is a third flowchart of a digital predistortion processing method according to an embodiment of the present application.
  • FIG. 8 is a fourth flowchart of a digital predistortion processing method according to an embodiment of the present application.
  • Fig. 9 is an internal structure diagram of a computer device according to an embodiment of the present application.
  • first and second are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features. Therefore, the features defined with “first” and “second” may explicitly or implicitly include at least one of the features.
  • a plurality of means at least two, such as two, three, etc., unless specifically defined otherwise.
  • everal means at least one, such as one, two, etc., unless otherwise specifically defined.
  • FIG. 1 is a structural schematic diagram 1 of the digital predistortion processing device of an embodiment of the present application.
  • the device includes a wideband signal The generator 102, the DPD module 104, the normal channel signal input module 106, and the power amplifier module 108.
  • the DPD module 104 includes a DPD data path unit 201, a digital-to-analog conversion DAC unit 202, an analog-to-digital conversion ADC unit 203, and a signal Grab the RAM unit 204, the time delay calculation unit 205, the predistortion coefficient calculation unit 206, and the DPD control unit 207.
  • the DPD data path unit 201 in the DPD module 104 obtains the broadband IQ signal sent by the broadband signal generator 102.
  • the DPD module 104 determines the predistortion coefficient according to the wideband IQ signal and the feedback path signal fed back from the analog-to-digital conversion ADC unit 203 in the DPD module 104.
  • the signal capture RAM unit 204 in the DPD module 104 The forward downward signal and the feedback path signal corresponding to the wideband IQ signal can be captured, the delay calculation unit 205 calculates the delay, and the predistortion coefficient calculation unit 206 aligns the forward downward signal with the feedback signal; then Use the memory polynomial model to perform matrix modeling on the aligned forward downward signal and the feedback signal, and calculate the predistortion coefficient.
  • the digital-to-analog conversion DAC unit 202 is used to convert a digital signal into an analog signal and output it to the power amplifier module 108 for power amplification.
  • the power module 108 outputs an analog signal, where the analog signal may be a radio frequency signal.
  • the analog-to-digital conversion ADC unit 203 converts the analog signal received on the feedback link into a digital signal, captures the signal from the RAM 204 and sends it to the predistortion coefficient calculation unit 206 and the delay calculation unit 205, and the DPD module 104 reads from
  • the normal channel signal input module 106 obtains the normal channel signal
  • the DPD module 104 performs the DPD processing on the normal channel signal according to the predistortion coefficient, and transmits the processed normal channel signal to the associated power amplifier module 108, the normal channel
  • the signals of may include but are not limited to signals with smaller carrier bandwidths such as GSM, EDGE, and NB
  • the wideband IQ signals sent by the wideband signal generator 102 may include but are not limited to signals with larger carrier bandwidths such as WCDMA and LTE; Due to the slow change of the envelope of the narrowband signal in the technology, the DPD coefficients cannot accurately reflect the power amplifier model under the limited sampling point, resulting in poor intermodulation effects or even deteriorati
  • the DPD module 104 passes The predistortion coefficient is determined for the signal with larger bandwidth, and the predistortion coefficient is applied to the application scenario of the signal with smaller bandwidth, thereby solving the problem of DPD not converging when the input signal is GSM, NB, CW.
  • Radio frequency transmitting devices such as GSM, EDGE, and NB include, but are not limited to, repeaters, radio remote units (Radio Remote Unit, RRU for short) and other equipment.
  • the DPD control unit 207 in the DPD module 104 sends first instruction information to the broadband signal generator 102, the first instruction information instructs to turn off the broadband signal transmitter 102, and turn off the broadband signal generator 102 to enable The normal channel signal comes in.
  • FIG. 3 is a second structural diagram of the digital predistortion processing device according to an embodiment of the present application.
  • the device also includes a signal path selection module 301, and the DPD module 104 is acquiring the broadband IQ signal sent by the broadband signal generator 102 Previously, the DPD control unit 207 sent second indication information to the signal path selection module 301, the second indication information instructed the signal path selection module 301 to select the broadband IQ signal sent by the broadband signal generator 102, and the DPD module 104 was acquiring Before the normal path signal, the DPD control unit 207 sends third indication information to the signal path selection module 301. The third indication information instructs the signal path selection module 301 to select the normal path signal of the normal path.
  • the signal path selection module 301 is in the signal path selection module 301. Under the control of the DPD control unit 207, real-time selection of the broadband IQ signal and the normal channel signal is realized.
  • the device further includes a power amplifier state feedback module 401, and the power amplifier state feedback module 401 obtains the operating parameter values of the power amplifier module 108,
  • the operating parameter value includes at least one of the following: power amplifier current value, gain value, and temperature value; when the operating parameter is within a preset threshold range, the power amplifier state
  • the feedback module 401 sends a turn-on signal to turn on the wideband signal generator 102, for example, when the power amplifier current value is greater than a preset threshold, turn on the wideband signal generator 102 to implement the aforementioned DPD processing function.
  • the broadband signal generator 102 is pre-stored with a broadband IQ signal
  • the DPD module 104 acquires a broadband IQ signal corresponding to an application operation scene
  • the bandwidth of the broadband IQ signal is greater than or equal to the system in the application operation scene
  • one or more broadband IQ signals with a larger carrier bandwidth such as WCDMA, LTE, etc.
  • WCDMA Wideband Code Division Multiple Access
  • LTE Long Term Evolution
  • different broadband IQ signals are selected.
  • the bandwidth of the wideband IQ signal is greater than or equal to the maximum working bandwidth of the narrowband system.
  • FIG. 5 is a first flowchart of a digital predistortion processing method according to an embodiment of the present application. As shown in FIG. 5, the method includes the following step:
  • Step S501 Obtain a broadband IQ signal
  • Step S502 Determine the predistortion coefficient of the digital predistortion processing according to the forward path signal and the feedback path signal corresponding to the wideband IQ signal;
  • Step S503 Obtain a normal path signal, perform the digital predistortion processing on the normal path signal according to the predistortion coefficient, and perform power amplifier processing on the normal path signal after the digital predistortion processing.
  • the problem that the DPD function does not converge when the input signal is GSM, NB, CW is solved, and the DPD function is applied to a communication system with a smaller carrier bandwidth.
  • Fig. 6 is a second flowchart of a digital predistortion processing method according to an embodiment of the present application. As shown in Fig. 6, before acquiring a normal channel signal, the method further includes:
  • Step S601 Send first instruction information to close the acquisition of the broadband IQ signal
  • step S601 the normal path signal can be connected in.
  • FIG. 7 is a third flowchart of a digital predistortion processing method according to an embodiment of the present application. As shown in FIG. 7, the method includes the following steps:
  • Step S701 Send second instruction information to instruct to select a wideband IQ signal
  • Step S702 Send third instruction information to instruct to select the normal path signal of the normal path;
  • the predistortion coefficient is used to perform distortion adjustment on the normal channel signal.
  • FIG. 8 is a fourth flowchart of a digital predistortion processing method according to an embodiment of the present application. As shown in FIG. 8, after the DPD processed normal channel signal is subjected to power amplifier processing, the method further includes:
  • Step S801 Obtain the operating parameter value of the power amplifier processing to determine whether to obtain the broadband IQ signal, wherein the operating parameter value includes at least one of the following: a power amplifier current value, a gain value, and a temperature value;
  • Step S802 Acquire the broadband IQ signal when the operating parameter is within the preset threshold range.
  • the validity of the predistortion coefficient is ensured, and the predistortion coefficient of the DPD module 104 is recalculated when the physical properties of the power amplifier module 108 are greatly adjusted.
  • each step in the above-mentioned digital predistortion processing method can be implemented in whole or in part by software, hardware, and a combination thereof.
  • Each module in the above-mentioned digital predistortion processing apparatus can be embedded in the form of hardware or independent of the processor in the computer equipment, or can be stored in the memory of the computer equipment in the form of software, so that the processor can call and execute the above modules. The corresponding operation.
  • a computer device is provided.
  • the computer device may be a terminal, and its internal structure diagram may be as shown in FIG. 9.
  • the computer equipment includes a processor, a memory, a network interface, a display screen and an input device connected through a system bus.
  • the processor of the computer device is used to provide calculation and control capabilities.
  • the memory of the computer device includes a non-volatile storage medium and an internal memory.
  • the non-volatile storage medium stores an operating system and a computer program.
  • the internal memory provides an environment for the operation of the operating system and computer programs in the non-volatile storage medium.
  • the network interface of the computer device is used to communicate with an external terminal through a network connection.
  • the computer program is executed by the processor to realize a digital predistortion processing method.
  • the display screen of the computer equipment can be a liquid crystal display screen or an electronic ink display screen
  • the input device of the computer equipment can be a touch layer covered on the display screen, or it can be a button, a trackball or a touchpad set on the housing of the computer equipment , It can also be an external keyboard, touchpad, or mouse.
  • FIG. 9 is only a block diagram of a part of the structure related to the solution of the present application, and does not constitute a limitation on the computer device to which the solution of the present application is applied.
  • the specific computer device may Including more or fewer parts than shown in the figure, or combining some parts, or having a different arrangement of parts.
  • a computer device including a memory and a processor, and a computer program is stored in the memory, and the processor implements the following steps when the processor executes the computer program:
  • Obtain a normal path signal perform the digital predistortion processing on the normal path signal according to the predistortion coefficient, and perform power amplifier processing on the normal path signal after the digital predistortion processing.
  • a readable storage medium on which a computer program is stored, and when the computer program is executed by a processor, the following steps are implemented:
  • Obtain a normal path signal perform the digital predistortion processing on the normal path signal according to the predistortion coefficient, and perform power amplifier processing on the normal path signal after the digital predistortion processing.
  • Non-volatile memory may include read only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory.
  • Volatile memory may include random access memory (RAM) or external cache memory.
  • RAM is available in many forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous chain Channel (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM), etc.

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Abstract

本申请涉及一种数字预失真处理方法及装置、计算机设备和可读存储介质，其中，获取宽带IQ信号，依据与该宽带IQ信号对应的前向通路信号和反馈通路信号确定数字预失真处理的预失真系数，获取正常通路信号，依据该预失真系数对该正常通路信号进行该数字预失真处理，并将该数字预失真处理后的该正常通路信号做功放处理，解决了无法对载波带宽较小的信号实现数字预失真功能问题，将数字预失真功能应用到载波带宽较小的通信系统。

Description

数字预失真处理方法及装置、计算机设备和可读存储介质
相关申请
本申请要求2019年9月19日申请的，申请号为201910887432.1，发明名称为“一种数字预失真技术DPD处理方法及装置”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及无线通信技术领域，特别是涉及一种数字预失真处理方法及装置、计算机设备和可读存储介质。
背景技术，
数字预失真(Digital Pre-Distortion，简称为DPD)对输出信号进行预失真处理，在提高信号发射功率的同时，减少信号失真的影响，从而在保证信号的传输质量的情况下提高功放的运行效率。
DPD算法一般只适用于载波带宽比较宽的信号，比如宽带码分多址(Wideband Code Division Multiple Access，简称为W-CDMA)、长期演进(Long Term Evolution，简称为LTE)等。该技术的缺点是：无法对载波带宽较小的信号如全球移动通信系统信号(Global System for Mobile Communications，简称为GSM)、增强型数据速率GSM演进技术(Enhanced Data Rate for GSM Evolution，简称为EDGE)、窄带信号(Narrow Band，简称为NB)实现DPD功能，导致DPD功能异常，信号的误差向量幅度(Error Vector Magnitude，简称为EVM)和互调恶化，严重的情况下会烧毁与DPD关联的功放模块(Power Amplifier，简称为PA)。设备测试和生产阶段时，如果信号源采用单音(Single-Frequency Continuous Wave，简称为CW)信号时，必须关闭DPD功能。否则会有CW信号跳动，甚至也可能烧毁功放模块等问题。
针对相关技术中，无法对载波带宽较小的信号实现DPD功能问题，目前尚未提出有效的解决方案。
发明内容
根据本申请的各种实施例，提供一种数字预失真处理方法，所述方法包括：
获取宽带IQ信号(In-phase Quadrature，简称IQ信号)；
依据与所述宽带IQ信号对应的前向通路信号和反馈通路信号确定数字预失真处理的预失真系数；
获取正常通路信号，依据所述预失真系数对所述正常通路信号进行所述数字预失真处理，并将所述数字预失真处理后的所述正常通路信号传输做功放处理。
在其中一个实施例中，在获取正常通路信号之前，所述方法还包括：发送第一指示信息以关闭获取所述宽带IQ信号。
在其中一个实施例中，在获取宽带IQ信号之前，所述方法还包括：
发送第二指示信息，以指示选取宽带IQ信号；
获取正常通路信号之前，所述方法还包括：
发送第三指示信息，以指示选择正常通路的正常通路信号。
在其中一个实施例中，将所述数字预失真处理后的所述正常通路信号做功放处理之后，所述方法还包括：
获取所述功放处理的运行参数值，以判断是否获取所述宽带正交信号，其中，所述运行参数值包括以下至少之一：功放电流值、增益值和温度值；
在所述运行参数在预设阈值范围内的情况下，获取所述宽带IQ信号。
在其中一个实施例中，所述获取宽带IQ信号包括：
从预存储宽带IQ信号中获取所述宽带IQ信号，其中，所述宽带IQ信号的带宽大于或等于应用操作场景中系统的最大工作带宽。
根据本申请的各种实施例，还提供一种数字预失真处理装置，所述装置包括：宽带信号发生器、数字预失真模块和正常通道信号输入模块；
所述数字预失真模块用于获取所述宽带信号发生器发送的宽带IQ信号；
所述数字预失真模块还用于依据所述宽带IQ信号和所述数字预失真模块的反馈通路信号确定所述数字预失真模块的预失真系数；
所述数字预失真模块还用于从所述正常通道信号输入模块获取正常通路信号，依据所述预失真系数对所述正常通路信号进行所述数字预失真处理，并将处理后的所述正常通路信号传输给关联的功放模块。
在其中一个实施例中，所述数字预失真模块还用于发送第一指示信息至所述宽带信号发生器，所述第一指示信息指示关闭所述宽带信号发送器。
在其中一个实施例中，所述装置还包括信号通路选择模块，所述数字预失真模块还用于在获取所述宽带信号发生器发送的宽带IQ信号之前，发送第二指示信息至所述通路选择模块，所述第二指示信息指示所述通路选择模块选择所述宽带信号发生器发送的宽带IQ信号；
所述数字预失真模块还用于在获取正常通路信号之前，发送第三指示信息至所述通路选择模块，所述第三指示信息指示所述通路选择模块选择正常通路的正常通路信号。
在其中一个实施例中，所述装置还包括功放状态反馈模块，所述功放状态反馈模块用于获取所述功放模块的运行参数值，以判断是否开启所述宽带信号发生器，其中，所述运行参数值包括以下至少之一：功放电流值、增益值和温度值；
在所述运行参数在预设阈值范围内的情况下，所述功放状态反馈模块还用于发送开启信号开启所述宽带信号发生器。
在其中一个实施例中，所述宽带信号发生器中预存储宽带IQ信号，所述数字预失真模块获取与应用操作场景对应的宽带IQ信号，所述宽带IQ信号的带宽大于或等于该应用操作场景中系统的最大工作带宽。
根据本申请的各种实施例，还提供一种计算机设备，包括存储器和处理器，所述存储器存储有计算机程序，所述处理器执行所述计算机程序时实现上述数字预失真处理方法的步骤。
根据本申请的各种实施例，还提供一种可读存储介质，其上存储有计算机程序，所述计算机程序被处理器执行时实现上述数字预失真处理方法的步骤。
上述数字预失真处理方法、装置、计算机设备和可读存储介质具有以下优点：
获取宽带IQ信号，依据与该宽带IQ信号对应的前向通路信号和反馈通路信号确定数字预失真处理的预失真系数，获取正常通路信号，依据该预失真系数对该正常通路信号进行该数字预失真处理，并将该数字预失真处理后的该正常通路信号传输给关联的功放模块，解决了无法对载波带宽较小的信号实现数字预失真功能问题，将数字预失真功能应用到载波带宽较小的通信系统。
附图说明
为了更好地描述和说明这里公开的那些发明的实施例和/或示例，可以参考一幅或多幅附图。用于描述附图的附加细节或示例不应当被认为是对所公开的发明、目前描述的实施例和/或示例以及目前理解的这些发明的最佳模式中的任何一者的范围的限制。
图1是本申请实施例的数字预失真处理装置的结构示意图一。
图2是本申请实施例的一种数字预失真模块的结构示意图。
图3是本申请实施例的数字预失真处理装置的结构示意图二。
图4是本申请实施例的数字预失真处理装置的结构示意图三。
图5是本申请实施例的一种数字预失真处理方法的流程图一。
图6是本申请实施例的一种数字预失真处理方法的流程图二。
图7是本申请实施例的一种数字预失真处理方法的流程图三。
图8是本申请实施例的一种数字预失真处理方法的流程图四。
图9是本申请实施例的计算机设备的内部结构图。
具体实施方式
为了便于理解本申请，为使本申请的上述目的、特征和优点能够更加明显易懂，下面结合附图对本申请的具体实施方式做详细的说明。在下面的描述中阐述了很多具体细节以便于充分理解本申请，附图中给出了本申请的较佳实施方式。但是，本申请可以以许多不同的形式来实现，并不限于本文所描述的实施方式。相反地，提供这些实施方式的目的是使对本申请的公开内容理解的更加透彻全面。本申请能够以很多不同于在此描述的其它方式来实施，本领域技术人员可以在不违背本申请内涵的情况下做类似改进，因此本申请不受下面公开的具体实施例的限制。
此外，术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括至少一个该特征。在本申请的描述中，“多个”的含义是至少两个，例如两个，三个等，除非另有明确具体的限定。在本申请的描述中，“若干”的含义是至少一个，例如一个，两个等，除非另有明确具体的限定。
除非另有定义，本文所使用的所有的技术和科学术语与属于本申请的技术领域的技术人员通常理解的含义相同。本文中所使用的术语只是为了描述具体的实施方式的目的，不是旨在于限制本申请。本文所使用的术语“及/或”包括一个或多个相关的所列项目的任意的和所有的组合。
在本申请的实施例中，提供了一种数字预失真(DPD)处理装置，图1是本申请实施例的数字预失真处理装置的结构示意图一，如图1所示，该装置包括宽带信号发生器102、DPD模块104、正常通道信号输入模块106和功放模块108。
图2是本申请实施例的一种数字预失真模块的结构示意图，如图2所示，该DPD模块104包括DPD数据路径单元201、数模转换DAC单元202、模数转换ADC单元203、信号抓取RAM单元204、时延计算单元205、预失真系数计算单元206和DPD控制单元207。
在本发明的实施例中，该DPD模块104中的DPD数据路径单元201获取该宽带信号发生器102发送的宽带IQ信号。
该DPD模块104依据该宽带IQ信号和该DPD模块104中模数转换ADC单元203 反馈的反馈通路信号确定该预失真系数的方式有很多，其中，该DPD模块104中的信号抓取RAM单元204可以抓取与宽带IQ信号对应的前向下行信号和反馈通路信号，该时延计算单元205进行时延的计算，该预失真系数计算单元206将前向下行信号与反馈信号进行对齐处理；然后将对齐后的前向下行信号和反馈信号运用记忆多项式模型进行矩阵建模，计算出该预失真系数。
该数模转换DAC单元202用于将数字信号转化为模拟信号，并输出至该功放模块108进行功率放大，由该功率模块108输出模拟信号，其中模拟信号可以是射频信号。
该模数转换ADC单元203将反馈链路上接收到的模拟信号转化为数字信号，通过该信号抓取RAM204发送至该预失真系数计算单元206和该时延计算单元205，该DPD模块104从该正常通道信号输入模块106获取正常通路信号，该DPD模块104依据该预失真系数对该正常通路信号进行该DPD处理，并将处理后的该正常通路信号传输给关联的功放模块108，正常通道的信号可以包括并不限于GSM、EDGE和NB等载波带宽较小的信号，而该宽带信号发生器102发送的宽带IQ信号可以包括并不限于WCDMA、LTE等载波带宽较大的信号；现有技术中由于窄带信号的包络变化缓慢，在有限的采样点情况下，导致DPD系数无法正确的反映功放模型，从而导致互调效果不佳，甚至恶化的情况，本申请中该DPD模块104通过带宽较大信号确定该预失真系数，并将该预失真系数应用在带宽较小信号的应用场景上，从而解决了DPD功能在输入信号为GSM、NB、CW时，DPD不收敛的问题，上述GSM、EDGE和NB等射频发射装置包括但不限于直放站、射频拉远单元(Radio Remote Unit，简称为RRU)等设备。
在本实施例中，该DPD模块104中DPD控制单元207发送第一指示信息给该宽带信号发生器102，该第一指示信息指示关闭该宽带信号发送器102，关闭宽带信号发生器102以使正常通路信号接入进来。
图3是本申请实施例的数字预失真处理装置的结构示意图二，如图3所示，该装置还包括信号通路选择模块301，该DPD模块104在获取宽带信号发生器102发送的宽带IQ信号之前，DPD控制单元207发送第二指示信息给该信号通路选择模块301，该第二指示信息指示该信号通路选择模块301选择该宽带信号发生器102发送的宽带IQ信号，该DPD模块104在获取正常通路信号之前，DPD控制单元207发送第三指示信息给该信号通路选择模块301，该第三指示信息指示该信号通路选择模块301选择正常通路的正常通路信号，该信号通路选择模块301在该DPD控制单元207控制下，实现宽带IQ信号和正常通路信号的实时选择。
图4是本申请实施例的数字预失真处理装置的结构示意图三，如图4所示，该装置还 包括功放状态反馈模块401，该功放状态反馈模块401获取该功放模块108的运行参数值，以判断是否开启该宽带信号发生器102，其中，该运行参数值包括以下至少之一：功放电流值、增益值和温度值；在该运行参数在预设阈值范围内的情况下，该功放状态反馈模块401发送开启信号开启该宽带信号发生器102，例如，在功放电流值大于预设阈值时，开启该宽带信号发生器102实现上述DPD处理的功能。
在本实施例中，该宽带信号发生器102中预存储有宽带IQ信号，该DPD模块104获取与应用操作场景对应的宽带IQ信号，该宽带IQ信号的带宽大于或等于该应用操作场景中系统的最大工作带宽，例如，宽带信号发生器102中预存储有一个或者多个载波带宽较大的宽带IQ信号，如WCDMA、LTE等；针对不同的窄带系统，选用不同的宽带IQ信号，此时该宽带IQ信号的带宽均大于或者等于该窄带系统的最大工作带宽。
在本申请的另一实施例中，提供了一种数字预失真处理方法，图5是本申请实施例的一种数字预失真处理方法的流程图一，如图5所示，该方法包括如下步骤：
步骤S501：获取宽带IQ信号；
步骤S502：依据与所述宽带IQ信号对应的前向通路信号和反馈通路信号确定数字预失真处理的预失真系数；
步骤S503：获取正常通路信号，依据所述预失真系数对所述正常通路信号进行所述数字预失真处理，并将所述数字预失真处理后的所述正常通路信号做功放处理。
通过上述步骤，解决了DPD功能在输入信号为GSM、NB、CW时，DPD不收敛的问题，将DPD功能应用到载波带宽较小的通信系统。
图6是本申请实施例的一种数字预失真处理方法的流程图二，如图6所示，在获取正常通路信号之前，该方法还包括：
步骤S601：发送第一指示信息以关闭获取所述宽带IQ信号；
通过步骤S601可以将正常通路信号接入进来。
图7是本申请实施例的一种数字预失真处理方法的流程图三，如图7所示，该方法包括如下步骤：
步骤S701：发送第二指示信息，以指示选择宽带IQ信号；
从而可以实现带宽较大的宽带IQ信号的选择，从多个不同带宽的信号选择合适的宽带IQ信号生成该预失真系数；
步骤S702：发送第三指示信息，以指示选择正常通路的正常通路信号；
用所述预失真系数对正常通路信号进行失真调整。
图8是本申请实施例的一种数字预失真处理方法的流程图四，如图8所示，将该DPD 处理后的该正常通路信号做功放处理之后，该方法还包括：
步骤S801：获取所述功放处理的运行参数值，以判断是否获取所述宽带IQ信号，其中，所述运行参数值包括以下至少之一：功放电流值、增益值和温度值；
步骤S802：在所述运行参数在预设阈值范围内的情况下，获取所述宽带IQ信号。
通过对上述功放模块108实施监控，保证该预失真系数的有效性，在功放模块108物理属性有较大调整的情况下，重新对DPD模块104的预失真系数进行重新计算。
关于数字预失真处理方法的具体限定可以参见上文中对于数字预失真处理装置的限定，在此不再赘述。上述数字预失真处理方法中的各个步骤可全部或部分通过软件、硬件及其组合来实现。上述数字预失真处理装置中的各个模块可以硬件形式内嵌于或独立于计算机设备中的处理器中，也可以以软件形式存储于计算机设备中的存储器中，以便于处理器调用执行以上各个模块对应的操作。
在一个实施例中，提供了一种计算机设备，该计算机设备可以是终端，其内部结构图可以如图9所示。该计算机设备包括通过系统总线连接的处理器、存储器、网络接口、显示屏和输入装置。其中，该计算机设备的处理器用于提供计算和控制能力。该计算机设备的存储器包括非易失性存储介质、内存储器。该非易失性存储介质存储有操作系统和计算机程序。该内存储器为非易失性存储介质中的操作系统和计算机程序的运行提供环境。该计算机设备的网络接口用于与外部的终端通过网络连接通信。该计算机程序被处理器执行时以实现一种数字预失真处理方法。该计算机设备的显示屏可以是液晶显示屏或者电子墨水显示屏，该计算机设备的输入装置可以是显示屏上覆盖的触摸层，也可以是计算机设备外壳上设置的按键、轨迹球或触控板，还可以是外接的键盘、触控板或鼠标等。
本领域技术人员可以理解，图9中示出的结构，仅仅是与本申请方案相关的部分结构的框图，并不构成对本申请方案所应用于其上的计算机设备的限定，具体的计算机设备可以包括比图中所示更多或更少的部件，或者组合某些部件，或者具有不同的部件布置。
在一个实施例中，提供了一种计算机设备，包括存储器和处理器，存储器中存储有计算机程序，该处理器执行计算机程序时实现以下步骤：
获取宽带正交信号；
依据与所述宽带正交信号对应的前向通路信号和反馈通路信号确定数字预失真处理的预失真系数；
获取正常通路信号，依据所述预失真系数对所述正常通路信号进行所述数字预失真处理，并将所述数字预失真处理后的所述正常通路信号做功放处理。
在一个实施例中，提供了一种可读存储介质，其上存储有计算机程序，计算机程序被 处理器执行时实现以下步骤：
获取宽带正交信号；
依据与所述宽带正交信号对应的前向通路信号和反馈通路信号确定数字预失真处理的预失真系数；
获取正常通路信号，依据所述预失真系数对所述正常通路信号进行所述数字预失真处理，并将所述数字预失真处理后的所述正常通路信号做功放处理。
本领域普通技术人员可以理解实现上述实施例方法中的全部或部分流程，是可以通过计算机程序来指令相关的硬件来完成，所述的计算机程序可存储于一非易失性计算机可读取存储介质中，该计算机程序在执行时，可包括如上述各方法的实施例的流程。其中，本申请所提供的各实施例中所使用的对存储器、存储、数据库或其它介质的任何引用，均可包括非易失性和/或易失性存储器。非易失性存储器可包括只读存储器(ROM)、可编程ROM(PROM)、电可编程ROM(EPROM)、电可擦除可编程ROM(EEPROM)或闪存。易失性存储器可包括随机存取存储器(RAM)或者外部高速缓冲存储器。作为说明而非局限，RAM以多种形式可得，诸如静态RAM(SRAM)、动态RAM(DRAM)、同步DRAM(SDRAM)、双数据率SDRAM(DDRSDRAM)、增强型SDRAM(ESDRAM)、同步链路(Synchlink)DRAM(SLDRAM)、存储器总线(Rambus)直接RAM(RDRAM)、直接存储器总线动态RAM(DRDRAM)、以及存储器总线动态RAM(RDRAM)等。
以上所述实施例的各技术特征可以进行任意的组合，为使描述简洁，未对上述实施例中的各个技术特征所有可能的组合都进行描述，然而，只要这些技术特征的组合不存在矛盾，都应当认为是本说明书记载的范围。
以上所述实施例仅表达了本申请的几种实施方式，其描述较为具体和详细，但并不能因此而理解为对发明专利范围的限制。应当指出的是，对于本领域的普通技术人员来说，在不脱离本申请构思的前提下，还可以做出若干变形和改进，这些都属于本申请的保护范围。因此，本申请专利的保护范围应以所附权利要求为准。

Claims (12)

  1. 一种数字预失真处理方法，其特征在于，所述方法包括：
    获取宽带IQ信号；
    依据与所述宽带IQ信号对应的前向通路信号和反馈通路信号确定数字预失真处理的预失真系数；
    获取正常通路信号，依据所述预失真系数对所述正常通路信号进行所述数字预失真处理，并将所述数字预失真处理后的所述正常通路信号做功放处理。
  2. 根据权利要求1所述方法，其特征在于，在获取正常通路信号之前，所述方法还包括：
    发送第一指示信息以关闭获取所述宽带IQ信号。
  3. 根据权利要求1所述方法，其特征在于，在获取宽带IQ信号之前，所述方法还包括：
    发送第二指示信息，以指示选择宽带IQ信号；
    获取正常通路信号之前，所述方法还包括：
    发送第三指示信息，以指示选择正常通路的正常通路信号。
  4. 根据权利要求1所述方法，其特征在于，将所述数字预失真处理后的所述正常通路信号做功放处理之后，所述方法还包括：
    获取所述功放处理的运行参数值，以判断是否获取所述宽带IQ信号，其中，所述运行参数值包括以下至少之一：功放电流值、增益值和温度值；
    在所述运行参数在预设阈值范围内的情况下，获取所述宽带IQ信号。
  5. 根据权利要求1至4任一项所述方法，其特征在于，所述获取宽带IQ信号包括：
    从预存储宽带IQ信号中获取所述宽带IQ信号，其中，所述宽带IQ信号的带宽大于或等于应用操作场景中系统的最大工作带宽。
  6. 一种数字预失真处理装置，其特征在于，所述装置包括：宽带信号发生器、数字预失真模块和正常通道信号输入模块；
    所述数字预失真模块用于获取所述宽带信号发生器发送的宽带IQ信号；
    所述数字预失真模块还用于依据所述宽带IQ信号和所述数字预失真模块的反馈通路信号确定所述数字预失真模块的预失真系数；
    所述数字预失真模块还用于从所述正常通道信号输入模块获取正常通路信号，依据所述预失真系数对所述正常通路信号进行数字预失真处理，并将处理后的所述正常通路信号传输给关联的功放模块。
  7. 根据权利要求6所述装置，其特征在于，所述数字预失真模块还用于发送第一指示信息至所述宽带信号发生器，所述第一指示信息指示关闭所述宽带信号发送器。
  8. 根据权利要求6所述装置，其特征在于，所述装置还包括信号通路选择模块，所述数字预失真模块还用于在获取所述宽带信号发生器发送的宽带IQ信号之前，发送第二指示信息至所述通路选择模块，所述第二指示信息指示所述通路选择模块选择所述宽带信号发生器发送的宽带IQ信号；
    所述数字预失真模块还用于在获取所述正常通路信号之前，发送第三指示信息至所述通路选择模块，所述第三指示信息指示所述通路选择模块选择正常通路的正常通路信号。
  9. 根据权利要求6所述装置，其特征在于，所述装置还包括功放状态反馈模块，所述功放状态反馈模块用于获取所述功放模块的运行参数值，以判断是否开启所述宽带信号发生器，其中，所述运行参数值包括以下至少之一：功放电流值、增益值和温度值；
    在所述运行参数在预设阈值范围内的情况下，所述功放状态反馈模块还用于发送开启信号开启所述宽带信号发生器。
  10. 根据权利要求6至9任一项所述装置，其特征在于，所述宽带信号发生器中预存储宽带IQ信号，所述数字预失真模块用于获取与应用操作场景对应的宽带IQ信号，所述宽带IQ信号的带宽大于或等于所述应用操作场景中系统的最大工作带宽。
  11. 一种计算机设备，包括存储器和处理器，所述存储器存储有计算机程序，其特征在于，所述处理器执行所述计算机程序时实现权利要求1至5中任一项所述方法的步骤。
  12. 一种可读存储介质，其上存储有计算机程序，其特征在于，所述计算机程序被处理器执行时实现权利要求1至5中任一项所述方法的步骤。
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