WO2021046992A1

WO2021046992A1 - Three-dimensional packaging structure of mems infrared detector and manufacturing method therefor

Info

Publication number: WO2021046992A1
Application number: PCT/CN2019/115253
Authority: WO
Inventors: 宋晨光; 赵继聪; 孙海燕; 孙玲
Original assignee: 南通大学
Priority date: 2019-09-12
Filing date: 2019-11-04
Publication date: 2021-03-18
Also published as: LU101544B1; CN110577186A

Abstract

A three-dimensional packaging technology of an MEMS infrared detector. Two vertical conductive region glass reflow grooves (7) and a vertical lead (6) are provided on a silicon wafer (1), and embedded borosilicate glass is used as an electrically insulating layer of the lead (6) and a substrate (1). A sub-wavelength structure array (4) is arranged on the top of a packaging cover. According to the three-dimensional packaging structure in the present invention, the low-resistivity silicon vertical lead (6) prepared on the basis of a glass reflow process realizes inner and outer electrical interconnection, the borosilicate glass and the low-resistivity silicon have a matching thermal expansion coefficient therebetween, and thus the thermal stress is relatively low. The sub-wavelength structure array (4) on the top of the packaging cover is used for enhancing infrared transmission performance in a long-wavelength infrared region. A packaging chamber (5) is prepared below the sub-wavelength structure array (4) to accommodate the infrared detector. In addition, a method for manufacturing the packaging structure is further provided.

Description

Three-dimensional packaging structure of MEMS infrared detector and manufacturing method thereof

Technical field

The invention belongs to the field of packaging technology, and specifically relates to a packaging structure of a MEMS infrared detector and a manufacturing method thereof.

Background technique

In recent years, MEMS infrared detectors, including thermopile, thermal radiometer, pyroelectric detector and resonance detector, etc., have been used in the military due to their small size, high resolution, low cost and CMOS compatible technology. And the civilian field has a wide range of application prospects. For MEMS infrared detectors, relatively backward packaging technology has become one of the main bottlenecks restricting the entry of MEMS infrared detectors into the market. Packaging technology will directly affect the performance, cost, and size of MEMS infrared detectors.

Wafer-level three-dimensional packaging technology is conducive to the miniaturization of MEMS infrared detector packaging, which can make the device almost the same size before and after packaging. This technology usually uses through-silicon vias to transmit electrical signals, which embed vertical metal vertical leads and SiO ₂ films in bulk silicon. TSV technology can provide excellent electrical characteristics for the internal and external electrical interconnection of MEMS infrared detectors. However, this technology has some shortcomings, such as the mismatch of the thermal expansion coefficients (TECs) between the metal conductive layer and the silicon substrate, large dielectric loss, thinner insulation layer leading to insulation failure, complex process, high manufacturing cost, etc. . In addition, wafer-level packaging technology requires vacuum bonding between the cover and the device wafer to achieve long-term operation. Common bonding methods, such as Cu-Sn bonding and Au-Sn bonding, are not only costly, but also prone to large thermal stress.

In addition, the existing MEMS infrared detectors have different absorption rates for light of different frequencies, which may easily cause picture distortion under specific environmental requirements.

Summary of the invention

In order to solve one or more of the above technical problems, the present invention provides a three-dimensional packaging structure of a MEMS infrared detector and a manufacturing method thereof.

On the one hand, the present application provides a MEMS infrared detector three-dimensional packaging structure, including a silicon substrate. The silicon substrate is longitudinally provided with two vertical conductive regions. The two vertical conductive region grooves penetrate the upper and lower surfaces of the silicon substrate, and each vertical conductive region Each includes a vertical silicon lead and an electrical isolation layer located on the periphery of the vertical silicon lead. The silicon substrate is configured with a packaging chamber for accommodating MEMS infrared detectors, and the silicon substrate is configured with a sub-wavelength structure array located on the light-transmitting surface of the packaging chamber. The material of the electrical isolation layer is selected from borosilicate glass, the material of the vertical silicon lead is selected from low-resistance silicon, and the vertical silicon lead is used for electrical connection with the MEMS infrared detector in the packaging chamber.

The packaging structure of the MEMS infrared detector provided by the present invention breaks through the technical difficulties of three-dimensional packaging of the MEMS infrared detector, has good electrical performance, small thermal stress and good infrared transmission performance, and can be manufactured with high yield at low cost and low cost. The lossy three-dimensional packaging is conducive to the application of the packaging structure and avoids the shortcomings existing in the traditional TSV packaging technology.

In some embodiments, the sub-wavelength structure array is a square coaxial hole array, the inner side length of the square coaxial hole array is about 1.2 μm, the outer side length is about 1.5 μm, and the period is about 2.0 μm.

In some embodiments, the application further includes an encapsulation bonding ring located on the outer periphery of the silicon substrate, and the material of the encapsulation bonding ring is selected from borosilicate glass.

In some embodiments, the end of the vertical silicon lead is provided with a metal conductive layer exposed to the outside.

On the other hand, the method for manufacturing a three-dimensional packaging structure of a MEMS infrared detector provided by the present application includes the following steps:

Step 1. Etch low-resistance silicon to form a glass reflow tank in the vertical conductive area

Step 2. Complete the anodic bonding between the borosilicate glass and the silicon substrate,

Step 3. Make an electrical isolation layer in the glass reflow tank in the vertical conductive area,

Step 4. Remove excess glass and silicon on the front and back of the wafer, expose the silicon pillars, flatten the surface, and form vertical silicon leads 6.

Step 5. Etching silicon and glass to form a packaging chamber,

Step 6. Prepare and etch a gold film on the top center of the silicon substrate to form a sub-wavelength structure array.

In some embodiments, step 1 further includes etching low-resistance silicon to form a package ring glass reflow groove; step 3 also includes making a package bonding ring in the package ring glass reflow groove 2.

In some embodiments, in step 1, a DRIE etching process is used to fabricate the vertical conductive area glass reflow tank 7 and the packaging ring glass reflow tank, and a PECVD process is used to grow a silicon dioxide film to prepare a mask before etching.

In some embodiments, in step 4, a mechanical polishing process is used to remove excess glass and silicon, and then a CMP process is used to planarize the surface; in step 5, an ICP process is used to form a packaging cavity.

In some embodiments, in step 6, an electron beam deposition method is used to prepare a gold thin film;

In some embodiments, in step 6, a FIB process is used to etch the gold film to produce a sub-wavelength structure array;

In some embodiments, in step 1, step 5, and step 6, a PECVD process is used to grow a silicon dioxide film on the surface of a low-resistance silicon substrate to form a mask.

Description of the drawings

In order to explain the technical solution of the present invention more clearly, the following will briefly introduce the embodiments or the drawings needed in the description of the prior art. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained from these drawings without creative work.

1 is a schematic diagram of a structure after processing in step 1 of a manufacturing method of a MEMS infrared detector packaging structure according to an embodiment of the present invention;

2 is a schematic diagram of the structure in step 2 of a manufacturing method of a MEMS infrared detector packaging structure according to an embodiment of the present invention;

3 is a schematic diagram of the structure in step 2 of the manufacturing method of a MEMS infrared detector packaging structure according to an embodiment of the present invention;

4 is a schematic diagram of the structure in the processing of steps 3 and 4 of a manufacturing method of a MEMS infrared detector packaging structure according to an embodiment of the present invention;

5 is a schematic diagram of the structure in step 5 of the manufacturing method of a MEMS infrared detector packaging structure according to an embodiment of the present invention;

6 is a schematic diagram of the structure in step 6 of a manufacturing method of a MEMS infrared detector packaging structure according to an embodiment of the present invention;

FIG. 7 is a schematic structural diagram of a MEMS infrared detector packaging structure according to an embodiment of the present invention.

FIG. 8 is a schematic diagram of a transmission spectrum simulation of a sub-wavelength structure square coaxial hole array with different opening area ratios in a MEMS infrared detector packaging structure according to an embodiment of the present invention.

9 is a schematic diagram of a simulation of electric field distribution of a sub-wavelength structure square coaxial hole array in a MEMS infrared detector packaging structure according to an embodiment of the present invention.

FIG. 10 is a schematic diagram of thermal stress simulation of a MEMS infrared detector package structure and a traditional TSV structure according to an embodiment of the present invention.

11 is a schematic diagram of electrical simulation of the influence of the thickness of the glass insulating layer of the MEMS infrared detector packaging structure on the feedthrough according to an embodiment of the present invention.

FIG. 12 is a schematic diagram of electrical simulation of the influence of the thickness of the glass insulating layer of a MEMS infrared detector packaging structure on the transmission coefficient according to an embodiment of the present invention.

detailed description

The technical solutions in the embodiments of the invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative work shall fall within the protection scope of the present invention.

This application provides a three-dimensional packaging structure for a MEMS infrared detector, which includes a silicon substrate 1. The silicon substrate 1 is longitudinally arranged with two vertical conductive regions. Each vertical conductive region includes a vertical silicon lead 6 and an outer periphery of the vertical silicon lead 6. Electrical isolation layer 8, silicon substrate 1 is equipped with a packaging chamber 5 for accommodating MEMS infrared detectors, silicon substrate 1 is equipped with a sub-wavelength structure array 4 located on the light-transmitting surface of the packaging chamber 5, and materials for electrical isolation layer 8 are selected From borosilicate glass, the material of the vertical silicon lead 6 is selected from low-resistance silicon, and the vertical silicon lead 6 is used for electrical connection with the MEMS infrared detector in the packaging chamber 5.

In this implementation, borosilicate glass is used as the electrical insulating layer 8. The borosilicate glass has good electrical insulation at the same time to achieve fast infrared response, and can also achieve the electrical connection between the conductive lead and the vertical silicon lead 6 and the silicon substrate 1. insulation. In addition, the thermal expansion coefficient between the borosilicate glass and silicon is matched, the thermal stress generated after being embedded in the substrate is small, and the reliability is high. The borosilicate glass should adopt pyrex7740 glass, and its thermal expansion and contraction rate parameters match with the silicon-based substrate.

Compared with the traditional TSV package structure, borosilicate glass is embedded in the silicon substrate to form a vertical silicon lead structure. It can use vertical silicon leads to transmit electrical signals, and the embedded borosilicate glass can be used as electrical insulation and anodic bonding materials. It has a thermal expansion coefficient that matches that of low-resistance silicon, so thermal stress is also small. This three-dimensional packaging structure has great development potential in the vacuum packaging application of MEMS infrared detectors.

The sub-wavelength structure array 4 is a square coaxial hole array. The inner side length of the square coaxial hole array is about 1.2 μm, the outer side length is about 1.5 μm, and the period is about 2.0 μm.

Compared with the traditional anti-reflection coating on the MEMS infrared detector as the infrared window, the sub-wavelength structure array of the square coaxial hole array defined by this parameter is set on the package cover, which can make the silicon substrate and The incident light is effectively coupled, which is more conducive to enhancing the transmission performance of long-wave infrared light in the 8μm to 12μm band. The absorption bandwidth is smaller than that of the anti-reflection coating. In addition, the transmission spectrum of the sub-wavelength structure array can be effectively controlled by adjusting the geometric parameters of the square coaxial hole.

The present application also includes a package bonding ring 9 located on the outer periphery of the silicon substrate 1, and the material of the package bonding ring 9 is selected from borosilicate glass. The glass bonding ring 9 realizes the air-tight packaging of the infrared detector, and can produce a low-cost, low-loss three-dimensional package with a higher yield.

The end of the vertical silicon lead 6 is provided with a metal conductive layer 3 exposed to the outside.

Step 1. Etch low-resistance silicon to form a glass reflow groove 7 in the vertical conductive area,

Step 2. Complete the anodic bonding between the borosilicate glass and the silicon substrate 1,

Step 3. An electrical isolation layer 8 is made in the glass reflow tank 7 in the vertical conductive area,

Step 5. Etch silicon and glass to form a packaging chamber 5.

Step 6. Prepare and etch a gold film on the top center of the silicon substrate to form a sub-wavelength structure array 4.

Step 1 also includes etching low-resistance silicon to form a package ring glass reflow groove 2;

Step 3 also includes making a package bonding ring 9 in the package ring glass reflow groove 2.

In step 1, the vertical conductive area glass reflow groove 7 and the packaging ring glass reflow groove 2 are fabricated by using a DRIE etching process, and a PECVD process is used to grow a silicon dioxide film to prepare a mask before etching.

In step 4, a mechanical polishing process is used to remove excess glass and silicon, and then a CMP process is used to planarize the surface; in step 5, an ICP process is used to form the packaging cavity 5.

In step 6, an electron beam deposition method is used to prepare a gold film; in step 6, a FIB process is used to etch the gold film to make a sub-wavelength structure array 4;

In step 1, step 5, and step 6, a PECVD process is used to grow a silicon dioxide film on the surface of a low-resistance silicon substrate to form a mask 10.

_{The PECVD process is used to grow SiO 2} film on the surface of the low-resistance silicon substrate. The photolithography mask 10 uses the AZ6130 photoresist as a mask, and the SiO ₂ film is etched by the ICP process. Then, the photoresist is removed, the SiO ₂ film is used as a mask, and the low-resistance silicon is etched by the DRIE process to form a glass reflow groove 7 for the vertical conductive area and a glass reflow groove 2 for the packaging ring.

Specifically, in step 2, the anodic bonding between the borosilicate glass and the silicon substrate 1 is performed in a vacuum bonding machine by applying a pressure of 1000N and a voltage of 780V, heating to 420°C, and keeping it for 1 hour to complete the Pyrex Anode bonding between glass and silicon substrate. Before bonding, the wafer needs to stay in a vacuum and high temperature environment for 30 minutes to increase the vacuum in the packaging chamber. During the reflow process, the large pressure difference between the inside and outside of the cavity is beneficial for the glass to enter the reflow tank.

Specifically, in step 3, the borosilicate glass is filled around the vertical lead through a reflow process to form a glass-in-silicon (GIS) structure to achieve electrical insulation between the vertical lead and the substrate. Due to the matching of the thermal expansion coefficient between the Pyrex glass and the silicon material, the thermal stress is small, which can reduce the impact of the stress on the package yield and the frequency stability of the device.

Specifically, in step 4, the excess glass and silicon on the front and back sides of the wafer are respectively removed by a mechanical grinding process until the silicon pillars are exposed. Then, the surface of the wafer is planarized by a CMP process, and vertical silicon leads 6 are formed.

Specifically, in step 5, the AZ6130 photoresist is used as a mask, and silicon and glass are etched using the ICP process to form a packaging chamber 5 for accommodating the MEMS infrared detector.

Specifically, in step 6, use the FIB process to etch the gold film to produce a sub-wavelength structure array 4.

The three-dimensional package structure of MEMS infrared detector with low thermal stress and low electrical loss provided by the present invention replaces the traditional TSV package structure, selects low-resistance silicon as the substrate, makes vertical through holes in the silicon substrate, and prepares low-resistance in the vertical through holes. For vertical leads made of silicon resistance, borosilicate glass is filled around the vertical leads through a reflow process to form a glass-embedded silicon structure to achieve electrical insulation between the vertical leads and the substrate. Two low-resistance silicon vertical leads are used to transmit the electrical signals of the infrared detector, and the sub-wavelength structure at the top center can enhance infrared transmission.

By using COMSOL Multiphysics V4.3a software, the proposed three-dimensional packaging structure was systematically studied to optimize its optical transmission performance. The aperture area ratio ρ is defined as ρ=(w ₂ -w ₁ )/P ² , w ₁ and w ₂ are the inner and outer side lengths of the sub-wavelength structure square coaxial hole array, and p is the sub-wavelength structure array (square coaxial Hole) period. It can affect the frequency and intensity of local surface plasmon resonance. In order to verify the influence of ρ on the electrical transmission loss, w ₂ and P were set to 1.5 μm and 2.0 μm, respectively. The transmission spectra with 6 different opening area ratios ranging from 10% to 22.5% are calculated, as shown in Figure 8. With the increase of ρ, the maximum transmittance increases from 47.5% to 58.9%, and the transmission peak blue shifts from 10.9μm to 8.5μm. In addition, since the surface plasmon resonance occurs at about 6.9 μm, the enhanced coupling between the local surface plasmon resonance and the surface plasmon resonance causes the maximum transmission to increase from 47.5% to 58.9%.

As shown in Figure 8. Considering the optical transmission in the long-wave infrared region, it is suitable to control ρ about 20%, and the corresponding w2 is 1.2 μm. When the sub-wavelength structure array 4 corresponding to this parameter is a square coaxial hole array, the inner side length of the square coaxial hole array is about 1.2 μm, the outer side length is about 1.5 μm, and the period is about 2.0 μm. Figure 9 shows the electric field distribution at the transmission peak when ρ is 20%.

In order to verify that the low thermal stress MEMS infrared detector three-dimensional packaging technology provided by the present invention has lower thermal stress, the Ansys Workbench 19.0 software is used to analyze the maximum thermal stress of the structure proposed by the present invention and the traditional three-dimensional packaging structure with TSV under different environmental temperatures. Carry out the thermal simulation, the material parameters in the thermal simulation are shown in Table 1.

Table 1

As shown in FIG. 10, as the ambient temperature increases from 0°C to 200°C, the maximum thermal stress of the structure proposed by the present invention increases from 0Mpa to 5.3Mpa, which is much smaller than the traditional TSV package structure. The lower thermal stress is due to the matched thermal expansion coefficients between silicon and borosilicate glass; the larger thermal stress of the traditional TSV package structure is caused by the mismatch of thermal expansion coefficients between silicon, copper and silicon dioxide of. FIG. 12 clearly shows that the thermal stress of the traditional TSV package structure is much greater than that of the structure proposed in the present invention. Larger thermal stress may lead to undesirable consequences such as solder joint failure, insulation layer fracture, and device performance degradation. Therefore, the above results verify that the three-dimensional package structure proposed by the present invention has lower thermal stress and can ensure the long-term operation of the MEMS infrared detector with low thermal stress.

The insulating thickness d _glass of the vertical silicon lead is an important factor affecting the feedthrough and transmission coefficient. The radio frequency signal radiation area with air as the dielectric _{increases with the increase of d glass} , which causes an increase in the air dielectric capacitance. More energy will be transmitted by the air dielectric capacitance in the two vertical silicon leads, resulting in an increase in feedthrough .

As shown in Figure 11, as the d _glass increases from 10 μm to 50 μm, the maximum feedthrough increases from -93dB to -82dB. The impedance of the air dielectric capacitor decreases as the signal frequency increases, resulting in an increase in feedthrough.

In Figure 12, as the frequency increases from 0 to 2GHz, the transmission coefficient increases from -0.032dB to -0.0225dB. This is because the reduction of the grounding capacitance results in a small energy loss into the ground, and the reduction of the impedance of the grounding capacitance caused by the increase of the signal frequency results in a slight drop in the transmission coefficient. The above results show that the proposed package structure can provide high-fidelity signal transmission for radio frequency MEMS infrared detectors.

The implementation of the present invention has the following beneficial effects:

(1) The manufacturing process of the MEMS infrared detector packaging structure of the present invention, the prepared packaging substrate, after etching the low-resistance silicon substrate, adopts a glass reflow process to form a borosilicate glass insulating layer, which can realize vertical lead and silicon The electrical isolation of the substrate, low-resistance silicon as a vertical lead can achieve electrical interconnection between the inside and outside of the device, and the glass bonding ring on the outer ring is used to achieve vacuum tight packaging.

(2) The sub-wavelength structure hole array on the top of the MEMS infrared detector package structure provided by the present invention can enhance infrared transmission performance and achieve selective transmission of infrared light. By adjusting the geometric parameters of the square coaxial hole, the sub-wavelength structure can be effectively controlled. Transmission spectrum of the wavelength structure array.

(3) In the MEMS infrared detector package structure provided by the present invention, the borosilicate glass is embedded around the vertical lead through a reflow process. Due to the matching of the thermal expansion coefficient between the borosilicate glass and the silicon material, the thermal stress is small, so Reduce the impact of stress on package yield and frequency stability of MEMS infrared detectors. In addition, the thickness of the borosilicate glass insulating layer made by the reflow process can reach several tens of microns, breaking through the process limitation of traditional TSV technology that is difficult to deposit a thick insulating layer. A thicker insulating layer is used between the vertical lead and the silicon substrate, which not only has excellent insulating properties, but also avoids device failure caused by the crack of the insulating layer, thereby improving the package yield.

(4) The MEMS infrared detector package structure provided by the present invention has excellent electrical performance, low feedthrough and low electrical transmission coefficient, and can provide high-fidelity transmission of high-frequency signals for the MEMS infrared detector. In addition, The thicker insulating layer makes the grounding capacitance between the vertical lead and the substrate smaller, reducing the leakage current between the radio frequency signal and the ground wire.

(5) The MEMS infrared detector package structure provided by the present invention has simple manufacturing process, compact structure, low cost, wide versatility, and easy mass production.

The specific embodiments described above further describe the purpose, technical solutions, and beneficial effects of the application in detail. It should be understood that the above are only specific embodiments of the application and are not intended to limit the application. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of this application shall be included in the protection scope of this application.

Claims

A three-dimensional packaging structure for a MEMS infrared detector, which is characterized in that it comprises a silicon substrate (1), the silicon substrate (1) is vertically penetrated with two vertical conductive regions, and each of the vertical conductive regions includes a vertical silicon lead (6) and an electrical isolation layer (8) located on the periphery of the vertical silicon lead (6), the silicon substrate (1) is configured with a packaging chamber (5) for accommodating the MEMS infrared detector, and the silicon liner The bottom (1) is configured with a sub-wavelength structure array (4) located on the light-transmitting surface of the packaging chamber (5), the material of the electrical isolation layer (8) is selected from borosilicate glass, and the vertical silicon lead (6) The material is selected from low-resistance silicon, and the vertical silicon lead (6) is used for electrical connection with the MEMS infrared detector in the packaging chamber (5).
The MEMS infrared detector three-dimensional packaging structure according to claim 1, wherein the sub-wavelength structure array (4) is a square coaxial hole array, and the inner side of the square coaxial hole array is about It is 1.2μm, the outer side length is about 1.5μm, and the period is about 2.0μm.
The three-dimensional packaging structure of a MEMS infrared detector according to claim 1, characterized in that it further comprises a packaging bonding ring (9) located on the outer periphery of the silicon substrate (1).
The three-dimensional packaging structure of a MEMS infrared detector according to claim 1, wherein the end of the vertical silicon lead (6) is provided with a metal conductive layer (3) exposed to the outside.
A method for manufacturing a three-dimensional packaging structure of a MEMS infrared detector according to any one of claims 1 to 4, characterized in that it comprises the following steps:

Step 1. Etch low-resistance silicon to form a vertical conductive area glass reflow groove (7),

Step 2. Complete the anodic bonding between the borosilicate glass and the silicon substrate (1),

Step 3. Make an electrical isolation layer (8) in the glass reflow tank (7) in the vertical conductive area,

Step 4. Remove excess glass and silicon on the front and back of the wafer to expose the silicon pillars, flatten the surface, and form vertical silicon leads.

Step 5. Etching silicon and glass to form a packaging chamber (5),

Step 6. Prepare and etch a gold film on the top center of the silicon substrate to form a sub-wavelength structure array (4).
The method for manufacturing a three-dimensional packaging structure of a MEMS infrared detector according to claim 5, wherein said step 1 further comprises etching low-resistance silicon to form a packaging ring glass reflow groove (2); and said step 3 also Including making a package bonding ring (9) in the package ring glass reflow groove (2).
The method for manufacturing a three-dimensional packaging structure of a MEMS infrared detector according to claim 6, characterized in that in step 1, a vertical conductive area glass reflow groove (7) and a packaging ring glass reflow groove (2) are made by using a DRIE etching process. ), before etching, a PECVD process is used to grow a silicon dioxide film to prepare a mask.
The method for manufacturing a three-dimensional packaging structure of a MEMS infrared detector according to claim 5, wherein in step 4, a mechanical polishing process is used to remove excess glass and silicon, and then a CMP process is used to flatten the surface; in step 5 The ICP process is used to form the packaging cavity (5).
The method for manufacturing a three-dimensional packaging structure of a MEMS infrared detector according to claim 5, wherein in step 6 an electron beam deposition method is used to prepare a gold film; in step 6, a FIB process is used to etch the gold film to make a sub-wavelength structure Array (4); in step 1, step 5, step 6, a silicon dioxide film is grown on the surface of a low-resistance silicon substrate by using a PECVD process to form a mask (10).