WO2021037054A1 - 补偿电路及芯片、方法、装置、存储介质、电子装置 - Google Patents

补偿电路及芯片、方法、装置、存储介质、电子装置 Download PDF

Info

Publication number
WO2021037054A1
WO2021037054A1 PCT/CN2020/111361 CN2020111361W WO2021037054A1 WO 2021037054 A1 WO2021037054 A1 WO 2021037054A1 CN 2020111361 W CN2020111361 W CN 2020111361W WO 2021037054 A1 WO2021037054 A1 WO 2021037054A1
Authority
WO
WIPO (PCT)
Prior art keywords
signal
compensation
configuration signal
transconductance
configuration
Prior art date
Application number
PCT/CN2020/111361
Other languages
English (en)
French (fr)
Inventor
李吉军
董晶晶
赵国良
陈仲轶
Original Assignee
深圳市中兴微电子技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 深圳市中兴微电子技术有限公司 filed Critical 深圳市中兴微电子技术有限公司
Priority to EP20858148.8A priority Critical patent/EP3955458A4/en
Priority to KR1020217036205A priority patent/KR102639945B1/ko
Priority to US17/638,498 priority patent/US20220393649A1/en
Priority to JP2021565829A priority patent/JP7340623B2/ja
Publication of WO2021037054A1 publication Critical patent/WO2021037054A1/zh

Links

Images

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32—Modifications of amplifiers to reduce non-linear distortion
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32—Modifications of amplifiers to reduce non-linear distortion
    • H03F1/3205—Modifications of amplifiers to reduce non-linear distortion in field-effect transistor amplifiers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/36—Circuit design at the analogue level
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/30—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters
    • H03F1/301—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters in MOSFET amplifiers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32—Modifications of amplifiers to reduce non-linear distortion
    • H03F1/3211—Modifications of amplifiers to reduce non-linear distortion in differential amplifiers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32—Modifications of amplifiers to reduce non-linear distortion
    • H03F1/3223—Modifications of amplifiers to reduce non-linear distortion using feed-forward
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45—Differential amplifiers
    • H03F3/45071—Differential amplifiers with semiconductor devices only
    • H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
    • H03F3/45475—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using IC blocks as the active amplifying circuit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2201/00—Indexing scheme relating to details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements covered by H03F1/00
    • H03F2201/32—Indexing scheme relating to modifications of amplifiers to reduce non-linear distortion
    • H03F2201/3218—Indexing scheme relating to modifications of amplifiers to reduce non-linear distortion the main amplifier or error amplifier being a feedforward amplifier

Definitions

  • This application relates to the field of electronics, such as a compensation circuit and chip, method, device, storage medium, and electronic device.
  • OTA operational transconductance amplifier
  • CMOS complementary Metal Oxide Semiconductor
  • the embodiments of the present invention provide a compensation circuit and chip, a method, a device, a storage medium, and an electronic device to at least solve the linearity caused by incomplete consideration of nonlinear sources and influencing factors in the linearity compensation process in the related art. Compensate the problem of large deviation.
  • a compensation circuit including:
  • the analog module includes an input node and an output node; wherein the input node is configured to receive an input signal, and the output node is configured to output an output signal;
  • the linearity compensation module includes a plurality of transconductance units, wherein the plurality of transconductance units are configured to obtain a first configuration signal, and configure a combination of the plurality of transconductance units according to the first configuration signal to A compensation signal is provided to the output node; the first configuration signal is used to indicate a signal at any position in the analog module.
  • a compensation chip which includes the compensation circuit in the foregoing embodiment.
  • a compensation method for providing a compensation signal to an analog module the analog module including an input node and an output node; the method includes:
  • the first configuration signal Acquire a first configuration signal, and configure a combination of multiple transconductance units according to the first configuration signal to provide a compensation signal to the output node; wherein, the first configuration signal is used to indicate any of the analog modules Location signal.
  • a compensation circuit including:
  • the analog module includes an input node and an output node, wherein the input node is configured to receive an input signal, and the output node is configured to output an output signal;
  • a detection module configured to detect work information of the analog module, and provide a second configuration signal according to the work information
  • the linearity compensation module is configured to obtain a first configuration signal and the second configuration signal, and provide a compensation signal to the output node according to the first configuration signal and/or the second configuration signal, wherein the The first configuration signal is used to indicate a signal at any position in the analog module.
  • a compensation chip which includes the compensation circuit in the foregoing embodiment.
  • a compensation method for providing a compensation signal to an analog module the analog module including an input node and an output node; the method includes:
  • a compensation device configured to provide a compensation signal to an analog module, the analog module including an input node and an output node; the device includes:
  • the compensation module is configured to obtain a first configuration signal, and configure a combination of multiple transconductance units according to the first configuration signal to provide a compensation signal to the output node; wherein the first configuration signal is used to indicate all The signal at any position in the analog module.
  • a compensation device configured to provide a compensation signal to an analog module, the analog module including an input node and an output node; the device includes:
  • a providing module configured to detect the working information of the analog module and provide a second configuration signal according to the working information
  • the compensation module is configured to obtain a first configuration signal and the second configuration signal, and provide a compensation signal to the output node according to the first configuration signal and/or the second configuration signal, wherein the first configuration signal
  • the configuration signal is used to indicate a signal at any position in the analog module.
  • a storage medium in which a computer program is stored, wherein the computer program is configured to execute the steps in any one of the foregoing method embodiments when running.
  • an electronic device including a memory and a processor, the memory is stored with a computer program, and the processor is configured to run the computer program to execute any of the above Steps in the method embodiment.
  • Fig. 1 is a functional schematic diagram (1) of a compensation circuit provided according to an embodiment of the present invention
  • Fig. 2 is a schematic circuit diagram of an analog module according to an embodiment of the present invention.
  • Fig. 3 is a schematic circuit diagram (1) of a linearity compensation module according to an embodiment of the present invention.
  • Fig. 4 is a schematic circuit diagram (2) of a linearity compensation module according to an embodiment of the present invention.
  • Fig. 5 is an internal structure diagram of a cascode transconductance subunit according to an embodiment of the present invention (1);
  • Fig. 6 is an internal structure diagram of a cascode transconductance subunit according to an embodiment of the present invention (2);
  • FIG. 7 is an internal structure diagram of a common gate type transconductance subunit according to an embodiment of the present invention.
  • Fig. 8 is a flowchart (1) of a compensation method provided according to an embodiment of the present invention.
  • Fig. 9 is a functional schematic diagram (2) of a compensation circuit provided according to an embodiment of the present invention.
  • Fig. 10 is a schematic circuit diagram (3) of a linearity compensation module according to an embodiment of the present invention.
  • Fig. 11 is a schematic circuit diagram of a linearity compensation module according to an embodiment of the present invention (4);
  • Fig. 12 is a flowchart (2) of a compensation method provided according to an embodiment of the present invention.
  • Fig. 13 is a structural block diagram of a compensation device according to an embodiment of the present invention (1);
  • Fig. 14 is a structural block diagram (2) of a compensation device according to an embodiment of the present invention.
  • FIG. 1 is a functional schematic diagram (1) of the compensation circuit provided according to an embodiment of the present invention. As shown in FIG. 1, the compensation circuit includes:
  • the analog module 102 includes an input node 1022 and an output node 1024; wherein the input node 1022 is configured to receive an input signal, and the output node 1024 is configured to output an output signal.
  • the linearity compensation module 104 includes multiple transconductance units 1042 (see FIG. 3), wherein the multiple transconductance units 1042 are configured to obtain a first configuration signal, and configure the multiple transconductance units 1042 according to the first configuration signal. Combined to provide a compensation signal to the output node 1024; the first configuration signal is used to indicate a signal at any position in the analog module 102.
  • the simulation module 102 there are often multiple input nodes 1022 and output nodes 1024.
  • the simulation module 102 is configured with multiple input nodes 1022 and multiple output nodes 1024, and the multiple input nodes 1022 are respectively configured to receive
  • the multiple output nodes 1024 are respectively configured to output corresponding output signals Y 1 to Y m .
  • the first configuration signal obtained in the linearity compensation module 104 is a signal at any position in the analog module 102. As shown in Fig.
  • the above-mentioned first configuration signal can indicate the input signal X 1 ⁇ X n of the analog module 102, or the output signal Y 1 ⁇ Y m , or the process signal Z 1 ⁇ Z n between the input node and the output node. It can also be a combination of the aforementioned input signals X 1 ⁇ X n , output signals Y 1 ⁇ Y m , and process signals Z 1 ⁇ Z n , which is not limited in this application.
  • an OTA-based broadband analog signal processing circuit is taken as an example, that is, an OTA is set between an input node and an output node in the analog module.
  • the input node provides an input signal for the OTA, and the output node outputs an output signal of the OTA.
  • Fig. 2 is a schematic circuit diagram of an analog module provided according to an embodiment of the present invention.
  • OTA 1026 that is, G OTA as shown in Fig. 2
  • the output terminal of the OTA can output the output signal Vo .
  • the output terminal of the OTA constitutes the output node 1024 of the analog module, and the output signal of the OTA is the corresponding output of the output node 1024.
  • the output signal At the same time, in the analog module 102, a load G 2 is connected across the input terminal and the output terminal of the OTA, and an output load G 3 is also connected between the output terminal of the OTA and the signal ground.
  • the OTA in this embodiment is a conventional OTA device in the art, and those skilled in the art can know the internal circuit structure of the OTA and the way of processing signals based on common knowledge in the art, so this application will not be repeated here.
  • the first configuration signal acquired by the linearity compensation module 104 in this embodiment is a signal at any position in the analog module 102.
  • the above-mentioned first configuration signal can indicate the input signals X 1 to X n of the analog module 102.
  • the corresponding output signals Y 1 ⁇ Y m outputted by multiple output nodes 1024 and the process signals Z 1 ⁇ Z n between the input node and the output node can also be the above input signals X 1 ⁇ X n , the output signal
  • the combination of Y 1 ⁇ Y m and the process signal Z 1 ⁇ Z n is not limited in this application. Still taking the OTA-based broadband analog signal processing circuit shown in FIG.
  • the first configuration signal is used to indicate a signal at any position in the analog module 102 shown in FIG. 2, that is, the first configuration signal may be input signal V i1, V i2 ?? V in , the output signal may be V o, the signal may be a process of an arbitrary position between the input node and the output node, a load such as G 11, G 12 ?? G 1n signal corresponding to the position It can also be a combination of the above-mentioned input signal, output signal and process signal.
  • Fig. 3 is a schematic circuit diagram (1) of a linearity compensation module according to an embodiment of the present invention.
  • the linearity compensation module 104 includes a plurality of transconductance units 1042, corresponding to G c1 , G c2 ... G cn , G co ;
  • the linearity compensation module configures a combination of multiple transconductance units according to the difference in the first configuration signal, that is, configures the object and number of transconductance units for compensation processing in the linearity compensation module, through
  • the combination of different transconductance units performs transconductance processing on the input first configuration signal to output a compensation signal, and provides the compensation signal to the output node of the analog module to compensate the output signal; for example, the linearity compensation shown in Figure 3
  • the module when only the input signal of the input node in the analog module is used as the first configuration signal, only the G c1 , G c2 ...
  • G cn in the multiple transconductance units can be configured to form a combination to participate in the transconductance of the signal
  • the linearity compensation module in this embodiment takes the first configuration signal as the combination of the input signal of the input node and the output signal of the output node as an example.
  • G c1 , G c2 ... G cn are respectively connected to the input node of the input signal V i1, V i2 ?? V in , G co access the corresponding output node an output signal V o.
  • devices of the same size can be used among multiple transconductance units, or devices of different sizes can be used.
  • the transconductance units of different device sizes cause the transconductance unit to cross
  • the conductance size so in this case, based on the number of transconductance units configured, for signals of different branches in the first configuration signal, objects of transconductance units of corresponding device sizes can be configured to form a corresponding combination.
  • the linearity compensation module in this embodiment uses transconductance units with different device sizes to form the linearity compensation module, which is shown in FIG. 3
  • different transconductance units G c1 , G c2 ??G cn , G co use devices of different sizes, that is, the transconductance units G c1 , G c2 ??G cn , G co have at least
  • the device sizes between multiple transconductance units may be different from each other, or the device sizes between multiple transconductance units may be partially different. limited.
  • the compensation circuit, the analog output signal V o output node of the module there is a linear component and the nonlinear component, the process employed to provide linearity compensation module for compensating an output signal that is a signal to compensate for nonlinear components above .
  • the presence of an input signal swing the input terminal of OTA nonlinear components V x and a negative correlation therefore, be required to obtain a compensation signal for compensating for the nonlinear component from the input signal input terminal of the OTA V x.
  • the input signal V x at the input end of the OTA has the following relationship with the input signal and output signal of the analog module:
  • i c is the compensation signal provided in the linearity compensation module
  • n is the number of input nodes
  • G 1j is the load G 1j
  • G 2 and G 3 are the loads G 2 and G 3 , respectively
  • Vij is the input signal V ij
  • V o is the output signal V o
  • G OTA is the transconductance of the OTA.
  • i c further satisfies:
  • the above formula 2 can be used as the basis for the linearity compensation module to perform linearity compensation, that is, through the combination of the transconductance units G c1 , G c2 ,..., G cn in the linearity compensation module to provide the input part of the compensation current G 1j V ij then compensates the non-linear components corresponding to Vi1 , Vi2 , ..., Vin in the input signal, and at the same time, through the transconductance unit G co to provide the output part of the compensation current G 3 V o to compensate the output signal V o corresponding The nonlinear component.
  • the linearity compensation module can be set to compensate for the non-linear components in the input signal and output signal in the analog module.
  • the following method can be used in this embodiment to determine the combination of transconductance units for configuration:
  • Enumeration method Arrange the possible combinations of multiple transconductance units in the linearity compensation module in sequence, and substitute the first configuration signal, that is, the input signal and output signal of the analog module into the combination of each transconductance unit mentioned above, Traverse all the combinations, and try the compensation signals output by the combination of different transconductance units in turn, so as to obtain the combination of the corresponding transconductance units with the best linearity compensation effect as the combination of multiple transconductance units in the linearity compensation module Actual configuration.
  • Search method Test the different configuration signals corresponding to the analog module in advance to obtain the corresponding compensation signal under each configuration signal, and confirm the combination of the transconductance unit corresponding to the compensation signal; in the compensation of the actual analog circuit
  • the linearity compensation module obtains the first configuration signal, it can determine the combination of transconductance units corresponding to the current configuration signal according to the corresponding relationship between the configuration signal and the combination of the transconductance unit, and proceed accordingly. Configuration.
  • the above two methods are only optional configuration methods in the process of realizing the linearity compensation module to configure multiple transconductance units in this embodiment. Any combination of transconductance units can be made according to the corresponding relationship of the compensation current in this embodiment.
  • the configuration method is within the protection scope of the application, and this application does not limit it.
  • the linearity compensation module in the compensation circuit can configure the combination of the multiple transconductance units according to the acquired first configuration signal to provide a compensation signal to the output node in the analog module; where , The first configuration signal is used to indicate a signal at any position in the analog module; therefore, the above compensation circuit can solve the linearity compensation deviation caused by incomplete consideration of the linearity source in the linearity compensation process in the related art Larger problems to achieve the effect of improving linearity reliability.
  • the linearity compensation module in the above compensation circuit can absorb the input signal and output signal of the analog module, and provide compensation current for the output signal of the OTA in the analog circuit to compensate, thereby reducing The swing of the OTA input terminal improves the linearity of the output signal at the output terminal. Therefore, the analog circuit does not need to strictly consider the gain and bandwidth of the OTA during the OTA design process, thus indirectly reducing the performance requirements and cost of the OTA design; another
  • the linearity compensation module in this embodiment is not limited to a fixed transconductance size, and a combination of corresponding transconductance units can be configured according to different configuration signals in the analog circuit. Therefore, the linearity compensation module described above is applicable to different bandwidths. Mode, analog modules at different frequency components, so the reliability of the linearity compensation corresponding to the analog modules at different bandwidth modes and frequency components can be significantly improved, and the linearity compensation module can also be configurable or adaptable.
  • each transconductance unit 1042 in the linearity compensation module 104 includes a plurality of transconductance subunits 10422 connected to each other; wherein, the plurality of transconductance units 1042 and the plurality of transconductance subunits 10422 is configured to obtain a first configuration signal, and configure a combination of multiple transconductance units 1042 and a combination of multiple transconductance subunits 10422 in the transconductance unit 1042 according to the first configuration signal to provide a compensation signal to the output node 1024 .
  • Fig. 4 is a schematic circuit diagram (2) of a linearity compensation module according to an embodiment of the present invention.
  • each transconductance unit 1042 is composed of a plurality of transconductance subunits 10422 connected in parallel to form a transconductance unit Take G c1 as an example.
  • the transconductance unit G c1 includes a plurality of parallel-connected transconductance subunits G c1,1 , G c1,2 ,..., G c1, m1 ; the linearity compensation module mentioned above is based on the first
  • the configuration signal configures the combination of multiple transconductance units and the combination of multiple transconductance subunits in the transconductance unit, that is, it indicates that there are two configuration dimensions in the configuration of the linearity compensation module, and the first dimension indicates the pair of transconductance units.
  • the situation where devices of different sizes are used between different transconductance units can also be realized by the configuration of the objects and the number of transconductance subunits within each transconductance unit, that is, according to the first configuration signal Configure the objects and number of internal transconductance subunits for each transconductance unit.
  • different transconductance subunits in the same transconductance unit can use devices of the same size, or devices of different sizes, when multiple transconductance subunits use devices of the same size.
  • the transconductance processing of the first configuration signal is realized; when devices of different sizes are used between multiple transconductance subunits, the transconductance subunits of different device sizes As a result, there are differences in the transconductance size of the transconductance subunits.
  • the objects of the transconductance subunits corresponding to the device size can be configured for different configurations of the first configuration signal to form a corresponding The combination.
  • the linearity compensation module in the optional embodiment may adopt different sizes of transconductance subunits in each transconductance unit.
  • the transconductance unit G c1 includes a plurality of transconductance sub-units G c1,1 , G c1,2 ??G c1
  • the device sizes between multiple transconductance subunits may be different from each other, or between multiple transconductance subunits.
  • the size of the device is partially different, which is not limited in this application.
  • the method of compensating the transconductance unit and the combination of configuring the transconductance unit is the linearity compensation module in the foregoing embodiment. Based on the configuration of the transconductance unit, the multiple transconductance subunits in each transconductance unit are configured again.
  • the above formula 2 can still be used as the basis for linearity compensation of the linearity compensation module.
  • the transconductance unit G c1 , G c2 , ..., G cn , G The combination of co to provide the compensation current G 1j V ij of the input part and then compensate the nonlinear components corresponding to Vi1 , Vi2 , ..., Vin in the input signal, it can be configured by configuring each transconductance unit
  • the combination of multiple transconductance sub-units in order to make the non-linear component of the input signal corresponding to the transconductance unit be more effectively compensated, for example, multiple transconductance sub-units G c1,1 in the transconductance unit G c1 , G c1,2, (2003), G c1, m1 may be determined between the corresponding compositions based on the value of the input signal V i1, so that transconductance G c1 unit to form a composition according to the
  • the method in the foregoing embodiment may still be used when determining the combination of transconductance units for configuration in this optional embodiment, for example:
  • Enumeration method arrange the multiple transconductance units in the linearity compensation module and the possible combinations of multiple transconductance subunits in the transconductance unit in sequence, and substitute the first configuration signal, that is, the input signal and output signal of the analog module To each of the above combinations, traverse all the combinations, and try the compensation signals output under different combinations in turn, so as to obtain the corresponding combination with the best linearity compensation effect as the multiple transconductance units and transconductance units in the linearity compensation module The actual configuration of the combination of multiple transconductance sub-units in the unit.
  • Search method Test the different configuration signals corresponding to the analog module in advance to obtain the corresponding compensation signal under each configuration signal, and confirm the multiple transconductance units and multiple of the transconductance units corresponding to the compensation signal.
  • the configuration of the transconductance unit in the above-mentioned optional embodiment enables the linearity compensation module to be configured according to the first configuration signal. Due to the setting of multiple configuration dimensions, the applicability of the configurability is improved, so that the linearity The effectiveness and reliability of the linearity compensation corresponding to different analog modules have been significantly increased by the degree compensation module.
  • the transconductance subunit 10422 includes a transconductor 108 and a bias tube 110, wherein the gate of the transconductor 108 is configured to obtain the first configuration signal, and the drain of the transconductor 108 is configured to be biased toward the The source of the tube 110 provides a signal; the gate of the bias tube 110 is configured to obtain a bias signal, and the drain of the bias tube 110 is configured to provide a compensation signal.
  • Both the transcatheter 108 and the offset tube 110 use PMOS tubes, or both the transcatheter 108 and the offset tube 110 use NOMS tubes.
  • FIG. 5 is an internal structure diagram (1) of a cascode transconductance subunit according to an embodiment of the present invention, as shown in FIG. 5 cross conduit Ma and Mb biased transistor NMOS transistors are used, as a gate transcatheter Ma transconductance input sub-unit, configured to acquire the first signal, FIG. 5
  • the drain of the tube Ma is configured to provide a signal to the source of the bias tube Mb, and the source of the cross tube Ma is configured to obtain a ground signal; the gate of the bias tube Mb is configured to obtain a bias signal V b , the bias tube Mb The drain of Mb is configured to provide a compensation signal; the bias signal V b obtained by the gate of the bias tube Mb can be provided by the DC bias module 112, which can be provided by the analog module, that is, the process in the analog module The signal is provided to the bias tube as a bias signal, and an independent DC bias module can also be used, that is, a circuit module is provided separately for the bias signal of the bias tube, which is not limited in this application.
  • Fig. 6 is a diagram (2) of the internal structure of the cascode transconductance subunit according to an embodiment of the present invention.
  • the transconductor Ma and the bias tube Mb are both PMOS tubes.
  • the connection mode between the cross-conduit Ma and the offset tube Mb is the same as that in the case where the cross-conduit Ma and the offset tube Mb are NMOS tubes, and will not be repeated here.
  • the transconductor Ma works in the linear region and the bias tube Mb works in the saturation region.
  • the transconductance of the transconductor and the drain-source voltage of the transconductor Roughly showing a linear relationship, that is, g m ⁇ KV DS , where g m is the transconductance across the conduit Ma, V DS is the drain-source voltage across the conduit Ma, and K is the process and size parameter across the conduit Ma.
  • bias voltage V b can be set as an adjustable voltage or a fixed voltage
  • the size of the cross-conduit and the bias tube can be pre-configured according to the actual analog circuit state, or can be designed as an adjustable size.
  • the transconductance subunit includes an input terminal, an output terminal, and a current mirror 114 arranged between the input terminal and the output terminal, wherein the output terminal is configured to provide a compensation signal.
  • the input terminal includes a PMOS tube 116 and an NMOS tube 118, wherein the source of the PMOS tube 116 is connected to the source of the NMOS tube 118, and the source of the PMOS tube 116 and the source of the NMOS tube 118 are configured to obtain the first configuration signal,
  • the gate of the PMOS transistor 116 is configured to obtain a first bias signal
  • the gate of the NMOS transistor 118 is configured to obtain a second bias signal
  • the drain of the PMOS transistor 116 and the drain of the NMOS transistor 118 are configured to provide the current mirror 114 signal.
  • FIG. 7 is an internal structure diagram of a common-gate transconductance subunit according to an embodiment of the present invention.
  • the common-gate transconductor The input end of the unit includes two input tubes Mp and Mn.
  • the input tube Mp is a PMOS tube
  • the input tube Mn is a NMOS tube.
  • the source of the input tube Mp is connected to the source of the input tube Mn and used for access at the same time.
  • the input signal is the first configuration signal in this embodiment; the gate of the input tube Mp and the gate of the input tube Mn are respectively used to connect the bias signal, wherein the gate of the input tube Mp is used to obtain the first bias
  • the signal V bn and the gate of the input tube Mn are used to obtain the second bias signal V bp , and the drains of the input tube Mp and the input tube Mn are respectively connected to the corresponding current mirror module, and output through the current mirror module.
  • the second bias voltage V bp connected between the transconductance of Mn and the gate source is roughly linear, that is, g m ⁇ K (V GS -V TH ), where K is the process and size of the MOS tube Parameters, V GS is the gate-source voltage of the MOS tube, and V TH is the threshold voltage of the MOS tube.
  • K is the process and size of the MOS tube Parameters
  • V GS is the gate-source voltage of the MOS tube
  • V TH is the threshold voltage of the MOS tube.
  • the first configuration signal includes: an input signal, an output signal, and a process signal at any position between the input node and the output node in the analog module.
  • the first configuration signal may also be a combination of the aforementioned input signal, output signal, and process signal.
  • the input signal and the output signal are used as the first configuration signal for illustration, which will not be repeated here.
  • the multiple transconductance units are configured such that each transconductance unit obtains an input signal of one input node.
  • the above-mentioned transconductance unit can correspond to the number of the first configuration signal, so as to ensure that the transconductance unit can compensate for the nonlinear component in each input signal.
  • This embodiment also provides a compensation chip, including the above-mentioned embodiment 1 and the compensation circuit in the optional embodiment corresponding to embodiment 1.
  • the technical solution of the compensation circuit in the compensation chip in this embodiment is the same as that in embodiment 1. Corresponds to the compensation circuit, so I won’t repeat it here.
  • This embodiment also provides a compensation method for providing a compensation signal to an analog module.
  • the analog module includes an input node and an output node;
  • Figure 8 is a flowchart (1) of the compensation method provided by the embodiment of the present invention, as shown in Figure 8. As shown, the compensation method includes:
  • the linearity compensation module obtains the first configuration signal, and configures a combination of multiple transconductance units according to the first configuration signal to provide a compensation signal to the output node; wherein the first configuration signal is used to indicate any position in the analog module signal.
  • the combination of the multiple transconductance units can be configured according to the acquired first configuration signal to provide a compensation signal to the output node in the analog module; wherein, the first configuration signal is used In order to indicate the signal at any position in the analog module; therefore, the above compensation method can solve the problem of large linearity compensation deviation caused by incomplete consideration of nonlinear sources and influencing factors in the linearity compensation process in related technologies. To improve the reliability of linearity compensation technology.
  • the computer software product is stored in a storage medium (such as Read-Only Memory/Random Access Memory, ROM/ RAM), magnetic disks, and optical disks) include multiple instructions to enable a terminal device (which can be a mobile phone, a computer, a server, or a network device, etc.) to execute the methods described in the multiple embodiments of the application.
  • a storage medium such as Read-Only Memory/Random Access Memory, ROM/ RAM), magnetic disks, and optical disks
  • a terminal device which can be a mobile phone, a computer, a server, or a network device, etc.
  • FIG. 9 is a functional schematic diagram (2) of the compensation circuit provided according to an embodiment of the present invention.
  • the compensation circuit includes: an analog module 402, including an input node 4022 , Output node 4024, wherein the input node is configured to receive input signals, and the output node is configured to output output signals; the detection module 404 is configured to detect the working information of the analog module 402, and provide a second configuration signal according to the working information; linearity compensation The module 406 is configured to obtain the first configuration signal and the second configuration signal, and provide a compensation signal to the output node according to the first configuration signal and/or the second configuration signal, where the first configuration signal is used to indicate any position in the analog module signal of.
  • the simulation module 402 there are often multiple input nodes 4022 and output nodes 4024. As shown in FIG. 9, the simulation module 402 is configured with multiple input nodes 4022 and multiple output nodes 4024, and the multiple input nodes 4022 are respectively configured to receive Corresponding to the input signals X 1 to X n , the multiple output nodes 4024 are respectively configured to output corresponding output signals Y 1 to Y m . According to the different design purposes or functions of the above-mentioned analog modules, different electronic devices, such as active RC filters, transimpedance amplifiers, and OTAs, can be configured or connected between the input node and the output node to form different broadband simulations. Signal processing circuit. This application does not limit this.
  • an OTA-based broadband analog signal processing circuit is taken as an example, that is, an OTA is set between an input node and an output node in the analog module.
  • the input node provides an input signal for the OTA, and the output node outputs an output signal of the OTA.
  • the detection module 404 is used to detect the working information of the analog module 402 during operation.
  • the working information of the analog module 402 includes one of the following: process information, voltage information, temperature information, and frequency information; among them,
  • the process information is used to indicate the MOS tube process angle information of the compensation circuit in this embodiment
  • the voltage information is used to indicate the power supply voltage information of the compensation circuit in this embodiment
  • the temperature information is used to indicate the operating temperature or environment of the compensation circuit in this embodiment.
  • Temperature information and frequency information are used to indicate the frequency component information where the compensation circuit in this embodiment is located.
  • the above-mentioned detection module may be an integral module or a plurality of independent detection units, such as a voltage sensor used to detect the power supply voltage information of the compensation circuit, a temperature sensor used to detect the operating temperature or ambient temperature of the compensation circuit, etc.
  • the application does not limit the types of the above-mentioned detection modules, and any device type or structural layout that can detect corresponding information in the analog circuit can be used as the detection module.
  • the detection module 404 After the detection module 404 obtains the above-mentioned work information, by processing the work information, for example, encoding and encapsulating the obtained work information, the corresponding second configuration signal can be obtained; in the above-mentioned optional embodiment, the work information includes When one of process information, voltage information, temperature information, and frequency information is used, process information can generate process configuration signals, voltage information can generate voltage configuration signals, temperature information can generate temperature configuration signals, and frequency information can generate frequency configuration signals. . After the detection module obtains the second configuration signal, it can provide the second configuration signal to the linearity compensation module.
  • the detection module obtains the process information U pi , voltage information U vi , temperature information U ti , and frequency information U fi of the analog module, and generates corresponding process configuration signals U po , voltage configuration signals U vo , and temperature.
  • configuration signal U to, frequency allocation signal U fo, the above-described process configuration signal U po, configuration signal voltage U vo, the temperature configuration signal U to, frequency allocation signal U fo unified as a second configuration signal is transmitted to the linearity compensation module.
  • the linearity compensation module 406 can obtain the second configuration signal provided by the detection module 404 on the one hand, and the first configuration signal provided by the analog module 402 on the other hand; the first configuration signal obtained by the linearity compensation module is the analog
  • the above-mentioned first configuration signal can indicate the input signal X 1 ⁇ X n of the analog module, or the output signal Y 1 ⁇ Y m , or between the input node and the output node
  • the process signals Z 1 ⁇ Z n may also be a combination of the aforementioned input signals X 1 ⁇ X n , output signals Y 1 ⁇ Y m , and the process signals Z 1 ⁇ Z n , which is not limited in this application.
  • the linearity compensation module obtains the above-mentioned first configuration signal and the second configuration signal, and then obtains the compensation signal based thereon and provides the compensation signal to the output node of the analog module.
  • the working information of the analog module such as process information, temperature information, etc.
  • the working information of the analog module are only generated after the analog module enters work, and will change with the different working environment of the analog module. Therefore, when the analog module just enters work, it is often The working information cannot be detected, or the detected working information is inaccurate; in this case, the linearity compensation module can only obtain the compensation signal according to the first configuration signal; when the analog module is in a stable working state, the linearity compensation module can be based on The first configuration signal and the second configuration signal are used to obtain the compensation signal at the same time; at the same time, the linearity compensation module can also perform independent linearity compensation only for the working information of the analog module, that is, the compensation signal is only realized according to the second configuration signal Obtain.
  • Enumeration method Substitute the first configuration signal and/or the second configuration signal into the linearity compensation module, and use all possible compensation methods in the linearity compensation module to calculate the corresponding value of the first configuration signal and/or the second configuration signal Compensate the signal, and use the compensation signal with the best compensation effect as the actual compensation signal to perform linearity compensation processing on the analog module.
  • Search method pre-test the different input/output/process signals corresponding to the analog module to obtain the compensation signal that needs to be compensated under each first configuration signal, and test the different working information corresponding to the analog module in advance.
  • the linearity compensation module is acquiring the first After the configuration signal and/or the second configuration signal, the corresponding relationship between the first configuration signal and/or the second configuration signal and the compensation signal can be used to determine the current position of the first configuration signal and/or the second configuration signal.
  • the compensation method of the corresponding linearity compensation module and the compensation signal provided by it are used to perform linearity compensation processing on the analog module.
  • linearity compensation module in this embodiment to obtain the compensation signal according to the first configuration signal and/or the second configuration signal.
  • Other methods for obtaining the compensation signal are also linearity compensation.
  • One of the working methods of the module is not limited in this application.
  • the detection module can detect the working information of the analog module and provide the second configuration signal according to the working information, so that the linearity compensation module is based on the second configuration signal and the first configuration provided by the analog module.
  • the signal is compensated and the signal is obtained and provided to the output node of the analog module for linearity compensation; therefore, the above-mentioned compensation circuit can solve the linearity caused by incomplete consideration of nonlinear sources and influencing factors in the linearity compensation process in the related technology. Compensate the problem of large deviation to improve the reliability of linearity compensation technology.
  • the compensation circuit of this embodiment since the second configuration signal obtained according to the operating information of the analog module is used as one of the basis for the linearity compensation module to perform compensation, the compensation signal provided by the linearity compensation module can be aimed at the above-mentioned simulation.
  • the working information of the module effectively compensates the non-linear factors formed by the analog module. Therefore, the compensation circuit in this embodiment can perform effective linearity compensation for the process characteristics of the analog module, etc., so as to further provide the reliability of linearity compensation.
  • the linearity compensation module 406 is configured to obtain the first configuration signal and/or the second configuration signal in the m-th period, and provide the m-th compensation according to the first configuration signal and/or the second configuration signal Signal; obtain the first configuration signal and the second configuration signal in the m+1 cycle, and provide the m+1 compensation signal according to the first configuration signal and the second configuration signal; in the m+1 compensation signal and the m compensation signal
  • the linearity compensation module is configured to provide the m-th compensation signal to the output node.
  • m is an integer, and the assignment of m is only used to express a certain cycle in the work of the analog module, that is, any cycle of the work of the analog module can adopt the technical solution in the above optional embodiment; m+1 is used to represent the mth cycle
  • the m+1th cycle is the first cycle.
  • there is no restriction on the assignment of m that is, when the mth cycle is the 0th cycle and the m+1th cycle is the 1st cycle, m can be re-assigned to 1, that is, the mth cycle is the 1st cycle.
  • the cycle, the m+1th cycle is the second cycle, which is used to express that the technical solution in this optional embodiment can be cyclically executed according to the working cycle of the analog module.
  • the linearity compensation module obtains the input signal or output signal in the analog module as the first configuration signal, and calculates the compensation signal according to the first configuration signal.
  • the method is as described in the above-mentioned embodiment, and will not be repeated here.
  • the provided compensation signal is taken as the 0th compensation signal, and the 0th compensation signal is the initial value of the compensation signal provided by the linearity compensation module.
  • the detection module can detect the working information of the analog module, such as process information, voltage information, temperature information, frequency information, etc., and obtain it through coding, packaging, etc.
  • Corresponding second configuration signals such as process configuration signals, voltage configuration signals, temperature configuration signals, and frequency configuration signals, and provide the second configuration signals to the linearity compensation module.
  • the linearity compensation module recalculates the compensation signal according to the first configuration signal of the first cycle provided by the analog module and the second configuration signal. At this time, the compensation signal is used as the first compensation signal.
  • the first compensation signal can be compared with the 0th compensation signal, that is, to determine whether the numerical difference between the first compensation signal and the 0th compensation signal is within the preset range .
  • the numerical difference between the first compensation signal and the 0th compensation signal can be understood as the error between the first period and the 0th period of the compensation signal provided by the linearity compensation module, between the first compensation signal and the 0th compensation signal
  • the value difference of is within the preset range, that is, the error is acceptable.
  • the working information of the analog module has an influence on the linearity of the analog module in the first cycle than in the 0th cycle. Therefore, the linearity compensation
  • the 0th compensation signal provided by the module in the 0th cycle can be used as a steady-state compensation signal, and the analog module can perform effective linearity compensation according to the 0th compensation signal.
  • the 0th compensation signal performs linearity compensation on the output signal of the analog module, that is, effective linearity compensation cannot be realized, so it is necessary to provide the compensation signal again.
  • the detection module re-detects the working information of the analog module, and obtains a new second configuration signal according to the re-detected working information to provide to the linearity compensation module.
  • the linearity compensation module recalculates the compensation signal according to the first configuration signal and the second configuration signal of the current period, and uses the compensation signal as the second compensation signal.
  • the second compensation signal can be compared with the first compensation signal, that is, to determine whether the numerical difference between the second compensation signal and the first compensation signal is in the expected value. Set within the range.
  • the numerical difference between the second compensation signal and the first compensation signal is within the preset range, that is, the working information of the analog module has a more controllable influence on the linearity of the analog module in the second period than in the first period. Therefore, the first compensation signal provided by the linearity compensation module in the first cycle can be used as the steady-state compensation signal, and the analog module can perform effective linearity compensation according to the first compensation signal.
  • the linearity compensation module can provide the mth compensation signal to the output node of the analog module for linearity Degree compensation.
  • the foregoing process can be referred to as an iterative process of the linearity compensation module. Through the iterative process, the compensation signal provided by the linearity compensation module to the output node of the analog module can perform effective and reliable linearity compensation for the current cycle of the analog module.
  • the above technical solution introduces the working information of the analog module to provide the compensation signal in this embodiment, which can ensure that the compensation signal provides effective linearity compensation in the current period, so that the reliability of the linearity compensation of the analog module is further improved.
  • the promotion introduces the working information of the analog module to provide the compensation signal in this embodiment, which can ensure that the compensation signal provides effective linearity compensation in the current period, so that the reliability of the linearity compensation of the analog module is further improved.
  • the detection module 404 is configured to: when the work information to the analog module changes during the nth cycle, re-provide the second configuration signal to the linearity compensation module according to the changed work information; linearity compensation The module 406 is configured to: obtain the first configuration signal and the second configuration signal in the nth period, and provide the nth compensation signal according to the first configuration signal and the second configuration signal; obtain the first configuration signal and the second configuration signal in the n+1th period Two configuration signals, and the n+1th compensation signal is provided according to the first configuration signal and the second configuration signal; when the numerical difference between the n+1th compensation signal and the nth compensation signal is within a preset range, the linearity The compensation module is configured to provide an nth compensation signal to the output node.
  • n is an integer, and the assignment of n is only used to express one cycle in the work of the analog module, that is, any cycle of the work of the analog module can adopt the technical solution in the above optional embodiment; n+1 is used to represent the nth cycle
  • the next cycle for example, when the nth cycle is the second cycle, the n+1th cycle is the third cycle.
  • n+1th cycle is the third cycle.
  • there is no restriction on the assignment of n that is, when the nth cycle is the second cycle and the n+1th cycle is the third cycle, you can re-assign n to 3, that is, the nth cycle is the third cycle.
  • the cycle, the n+1th cycle is the fourth cycle, which is used to express that the technical solution in this alternative embodiment can be cyclically executed according to the working cycle of the analog module.
  • the detection module detects a change in the working information of the analog module, and re-acquires the second configuration signal according to the changed working information and provides it to the linearity detection module.
  • the linearity detection module acquires the second configuration signal re-acquired according to the changed working signal in the 5th cycle, that is, in the 5th cycle, it re-acquires the first configuration signal in the current cycle and the second configuration signal in the current cycle.
  • the calculation method of the compensation signal is as described in the above embodiment, and will not be repeated here. At this time, the calculated compensation signal is used as the fifth compensation signal, and the fifth compensation signal is the analog module's After the work information changes, the initial value of the compensation signal provided by the linearity compensation module.
  • the detection module can obtain the second configuration signal according to the working information of the corresponding analog module in the 6th cycle and provide it to the linearity detection module.
  • the degree detection module recalculates the compensation signal according to the first configuration signal of the analog module in the sixth cycle and the above-mentioned second configuration signal. At this time, the compensation signal is used as the sixth compensation signal.
  • the sixth compensation signal can be compared with the fifth compensation signal, that is, to determine whether the numerical difference between the sixth compensation signal and the fifth compensation signal is within the preset range .
  • the numerical difference between the sixth compensation signal and the fifth compensation signal can be understood as the error between the compensation signal provided by the sixth cycle and the fifth cycle linearity compensation module, which is between the sixth compensation signal and the fifth compensation signal.
  • the value difference of is within the preset range, that is, the error is acceptable.
  • the influence of the change of the working information of the analog module on the linearity of the analog module in the 6th cycle is within the controllable range than in the 5th cycle. Therefore, the linearity
  • the fifth compensation signal provided by the degree compensation module in the fifth cycle can be used as a steady-state compensation signal, and the analog module can perform effective linearity compensation according to the fifth compensation signal.
  • the detection module re-detects the working information of the analog module, and obtains a new second configuration signal according to the re-detected working information to provide to the linearity compensation module.
  • the linearity compensation module recalculates the compensation signal according to the first configuration signal and the second configuration signal of the current cycle, and uses the compensation signal as the seventh compensation signal.
  • the seventh compensation signal can be compared with the sixth compensation signal, that is, to determine whether the numerical difference between the seventh compensation signal and the sixth compensation signal is in the expected value. Set within the range.
  • the numerical difference between the seventh compensation signal and the sixth compensation signal is within the preset range, that is, the working signal of the analog module has a more controllable influence on the linearity of the analog module in the seventh cycle than in the sixth cycle. Therefore, the sixth compensation signal provided by the linearity compensation module in the sixth cycle can be used as the steady-state compensation signal, and the analog module can perform effective linearity compensation according to the sixth compensation signal.
  • the linearity compensation module can provide the nth compensation signal to the output node of the analog module for linearity Degree compensation.
  • the above technical solution is based on the linearity compensation module that performs effective linearity compensation for the current cycle of the analog module through iteration, so that every time the work information corresponding to the analog module changes, the corresponding compensation signal can be adjusted in time to make the linearity
  • the compensation signal provided by the degree compensation module to the output node of the analog module can perform more reliable linearity compensation for the analog module after the work information changes, thereby ensuring that the linearity compensation effect is not weakened due to parameter fluctuations and mode changes.
  • the linearity compensation module 406 includes a plurality of transconductance units 4062; wherein, the plurality of transconductance units 4062 are configured to obtain a first configuration signal and a second configuration signal, and according to the first configuration signal and /Or the second configuration signal configures a combination of multiple transconductance units 4062 to provide a compensation signal to the output node.
  • FIG. 10 is a schematic circuit diagram (3) of a linearity compensation module according to an embodiment of the present invention.
  • the linearity compensation module includes a plurality of transconductance units 4062, corresponding to G c1 , G c2 , ..., G cn , G co ; the linearity compensation module configures the combination of multiple transconductance units according to the difference between the first configuration signal and the second configuration signal, that is, the linearity compensation module is configured
  • the object and quantity of the transconductance unit to be compensated, through the combination of different transconductance units, the input first configuration signal and/or the second configuration signal are transconducted to output the compensation signal, and the compensation signal is provided to The output node of the analog module is used to compensate the output signal.
  • the input signals X 1 to X n , the output signals Y 1 to Y m , and the process signals Z 1 to Z n in the compensation circuit shown in FIG. 9 can be combined As the first configuration signal, the process configuration signal U po , the voltage configuration signal U vo , the temperature configuration signal U to , the frequency configuration signal U fo or a combination thereof are used as the second configuration signal and sent to different transconductances in the linearity compensation module
  • the input signals X 1 to X n can be used as the first configuration signal to be input to G c1 , G c2 ,..., G cn in the multiple transconductance units to process the nonlinear component of the first configuration signal.
  • the process configuration signal P o is input as the second configuration signal to G co in the multiple transconductance units to process the nonlinear component in the second configuration signal, that is, according to the actual types of the first configuration signal and the second configuration signal, the configuration is more G c1 , G c2 , ..., G cn , G co in the two transconductance units are combined to participate in the transconductance processing of the first configuration signal and the second configuration signal, and according to the G c1 in the multiple transconductance units , G c2 ,..., G cn , G co calculate the compensation signal to provide the compensation signal to the output signal of the analog module for compensation.
  • devices of the same size can be used among multiple transconductance units, or devices of different sizes can be used.
  • the unit causes the transconductance size of the transconductance unit to be different, so in this case, based on the number of transconductance units, configure the corresponding device size for different signals in the first configuration signal and/or the second configuration signal. Transconduct the objects of the unit to form a corresponding combination.
  • the linearity compensation module in this optional embodiment adopts transconductance units with different device sizes to form linearity.
  • Compensation module that is, in the linearity compensation module shown in Fig. 10, different transconductance units G c1 , G c2 , ..., G cn , G co use devices of different sizes, that is, transconductance unit G c1 ,
  • G c2 There are at least two transconductance units in G c2 ,..., G cn , G co that use devices of different sizes with each other.
  • the device sizes between multiple transconductance units may be different from each other, or multiple transconductance units may be used.
  • the device sizes between the units are partially different, which is not limited in this application.
  • the linearity compensation module in the process of calculating the compensation signal, can refer to the OTA-based broadband analog signal processing circuit in Embodiment 1 to compensate for the nonlinearity of the input signal in the circuit; meanwhile,
  • the linearity compensation module in this optional embodiment can pre-record or store different working information, such as process, voltage, temperature, and frequency.
  • the compensation signal can be recorded in the form of a comparison table), and the compensation signal and the above compensation signal are comprehensively considered as the basis for the configuration of the linearity compensation module.
  • the linearity compensation module in this optional embodiment can use the following method to calculate the non-linear quantity compensation:
  • the combination of transconductance units can be determined in the following manner for configuration:
  • Enumeration method arrange the possible combinations of multiple transconductance units in the linearity compensation module in sequence, and substitute the first configuration signal and/or the second configuration signal into each combination of transconductance units mentioned above, and traverse all possible combinations. Combination, try the output compensation signal under the combination of different transconductance units in turn, so as to obtain the combination of the corresponding transconductance unit with the best linearity compensation effect as the actual configuration of the combination of multiple transconductance units in the linearity compensation module .
  • Search method Test the different configuration signals corresponding to the analog module in advance to obtain the corresponding compensation signal under each configuration signal, and confirm the combination of the transconductance unit corresponding to the compensation signal; in the compensation of the actual analog circuit
  • the linearity compensation module obtains the first configuration signal and the second configuration signal, it can determine the combination of the transconductance unit corresponding to the current configuration signal according to the correspondence between the above configuration signal and the combination of the transconductance unit , And configure it accordingly.
  • the above two methods are only optional configuration methods in the process of realizing the linearity compensation module to configure multiple transconductance units in this embodiment. Any combination of transconductance units can be made according to the corresponding relationship of the compensation current in this embodiment.
  • the configuration methods are all within the protection scope of this application, and this application does not limit this.
  • the linearity compensation module in the above compensation circuit can absorb the input signal, output signal and process signal of the analog module on the one hand, as well as the process information in the working process of the analog module, and act as an analog circuit based on this.
  • the output signal of the OTA in the OTA provides compensation current for compensation, thereby reducing the swing of the OTA input terminal and improving the linearity of the output signal at the output terminal. Therefore, the analog circuit does not need to strictly consider the gain of the OTA during the design process of the OTA.
  • the linearity compensation module in this embodiment is not limited to a fixed transconductance size, and can be configured according to the signal configuration in the analog circuit. Different configuration of the corresponding transconductance unit combination, therefore, the linearity compensation module can be applied to different processes, different bandwidth modes, and analog modules at different frequency components, so it can significantly improve the above-mentioned different processes, bandwidth modes, and frequency components.
  • the reliability of the linearity compensation corresponding to the analog module of, and the linearity compensation module can also be configurable or adaptable.
  • each transconductance unit 4062 includes a plurality of transconductance subunits 40622 connected to each other; wherein, the plurality of transconductance units 4062 and the plurality of transconductance subunits 40622 are configured to obtain the first configuration Signal and the second configuration signal, and configure the combination of the multiple transconductance units 4062 and the combination of the multiple transconductance subunits 40622 in the transconductance unit 4062 according to the first configuration signal and/or the second configuration signal to the output node Provide compensation signal.
  • Fig. 11 is a schematic circuit diagram (4) of a linearity compensation module according to an embodiment of the present invention.
  • each transconductance unit is composed of multiple transconductance subunits connected in parallel
  • the transconductance unit G c1 includes a plurality of parallel-connected transconductance sub-units G c1,1 , G c1,2 &G c1,m1 ;
  • the linearity compensation module mentioned above is based on
  • the first configuration signal and/or the second configuration signal configure the combination of multiple transconductance units and the combination of multiple transconductance subunits in the transconductance unit, that is, it indicates that there are two configuration dimensions in the configuration of the linearity compensation module,
  • the first dimension indicates the configuration of the objects and the number of transconductance units
  • the second dimension indicates the configuration of the objects and numbers of the transconductance units in the first dimension, for the objects of the transconduct
  • the situation where devices of different sizes are used between different transconductance units can also be realized by the configuration of the objects and the number of transconductance subunits within each transconductance unit, that is, according to the first configuration signal And/or the second configuration signal configures the objects and number of internal transconductance subunits for each transconductance unit.
  • different transconductance subunits in the same transconductance unit can use devices of the same size, or devices of different sizes.
  • devices of the same size are used among multiple transconductance subunits, they can pass Configure the number of transconductance subunits to form a corresponding combination, so as to realize the transconductance processing of the first configuration signal and/or the second configuration signal; when devices of different sizes are used between multiple transconductance subunits, because of different devices
  • the size of the transconductance subunits causes differences in the transconductance size of the transconductance subunits. Therefore, in this case, the number of transconductance subunits can be configured for different configurations of the first configuration signal and/or the second configuration signal.
  • transconductance subunits corresponding to the device size form a corresponding combination.
  • multiple transconductors in each transconductance unit in the linearity compensation module in this optional embodiment Devices of different sizes can be used between the units.
  • a transconductance unit G c1 is taken as an example.
  • the transconductance unit G c1 includes a plurality of transconductance subunits G c1,1 , G There are at least two transconductance subunits that use devices of different sizes among c1,2 ,...,G c1,m1 , G c1 , and the device sizes between multiple transconductance subunits may be different from each other.
  • the device size between multiple transconductance subunits may be partially different, which is not limited in this application.
  • the way the transconductance unit is compensated and the combination of the configuration transconductance units is that the linearity compensation module in the above-mentioned embodiment has Based on the configuration of the transconductance unit, the multiple transconductance subunits in each transconductance unit are configured again.
  • the compensation signal can still be obtained according to the calculation method of the multiple transconductance units in the linearity compensation module for the compensation signal, which will not be repeated here.
  • the method in the foregoing embodiment may still be used when determining the combination of transconductance units for configuration in this optional embodiment, for example:
  • Enumeration method arrange the multiple transconductance units in the linearity compensation module and the possible combinations of multiple transconductance subunits in the transconductance unit in sequence, and substitute the first configuration signal and/or the second configuration signal into each of the above In a combination, all possible combinations are traversed, and the compensation signals output by different transconductance units and different transconductance subunits in the transconductance unit are tried in turn, so as to obtain the corresponding combination with the best linearity compensation effect as the linearity The actual configuration of the multiple transconductance units in the compensation module and the combination of multiple transconductance subunits in the transconductance unit.
  • Search method Test the different configuration signals corresponding to the analog module in advance to obtain the corresponding compensation signal under each configuration signal, and use this to confirm the transconductance unit corresponding to the compensation signal and multiple transconductances in the transconductance unit
  • the configuration of the transconductance unit in the above-mentioned optional embodiment enables the linearity compensation module to be configured according to the first configuration signal and/or the second configuration signal. Due to the setting of multiple configuration dimensions, the applicability of the configurability It can be improved to significantly increase the effectiveness and reliability of the linearity compensation module corresponding to the linearity compensation of different analog modules.
  • the transconductance subunit includes a transconductor and a bias tube, wherein the grid of the transconductor is configured to obtain the first configuration signal and/or the second configuration signal, and the drain of the transconductor is configured to The source of the bias tube provides a signal; the gate of the bias tube is configured to obtain a bias signal, and the drain of the bias tube is configured to provide a compensation signal; both the cross-conductor and the bias tube use PMOS tubes, or the cross-conductor and The bias tubes are all NOMS tubes.
  • the above-mentioned transconductor and the bias tube constitute a cascode transconductance subunit, and the internal structure of the cascode transconductance subunit is still as shown in FIG. 5 or FIG. 6, as shown in FIG. 5, the transconductor Ma Both the bias tube and the bias tube Mb use NMOS tubes, the gate of the transconductor Ma is used as the input end of the transconductance subunit to obtain the first configuration signal or the second configuration signal, and the drain of the transconductor Ma is configured as a bias tube
  • the source of Mb provides a signal, and the source of the cross-conductor Ma is configured to obtain a ground signal;
  • the gate of the bias tube Mb is configured to obtain a bias signal V b , and the drain of the bias tube Mb is configured to provide a compensation signal;
  • the bias signal V b obtained by the gate of the tube Mb can be provided by a DC bias module, and the DC bias module can be provided by an analog module, that is, the process signal in the
  • An independent DC bias module can be used, that is, a circuit module is provided separately for the bias signal of the bias tube, which is not limited in this application.
  • both the transcatheter Ma and the offset tube Mb use PMOS tubes.
  • the connection between the transcatheter Ma and the offset tube Mb is the same as that of the transcatheter Ma and the offset tube Mb using NMOS tubes. The situation is the same, so I won't repeat it here.
  • the working principle of the cascode transconductance subunit in the above optional embodiment is the same as the working principle of the cascode transconductance subunit in Embodiment 1, and will not be repeated here.
  • the transconductance subunit includes an input terminal, an output terminal, and a current mirror arranged between the input terminal and the output terminal, wherein the output terminal is configured to provide a compensation signal;
  • the input terminal includes a PMOS tube and an NMOS
  • the source of the PMOS tube is connected to the source of the NMOS tube, the source of the PMOS tube and the source of the NMOS tube are configured to obtain the first configuration signal and/or the second configuration signal, and the gate of the PMOS tube is configured To obtain the first bias signal, the gate of the NMOS tube is configured to obtain the second bias signal, and the drain of the PMOS tube and the drain of the NMOS tube are configured to provide a signal to the current mirror.
  • the above-mentioned transconductor and the bias tube constitute a common-gate transconductance subunit.
  • the internal structure of the common-gate transconductance subunit is still as shown in FIG. 7.
  • the input end of the common-gate transconductance subunit is It includes two input tubes Mp and Mn.
  • the input tube Mp uses a PMOS tube
  • the input tube Mn uses an NMOS tube.
  • the source of the input tube Mp is connected to the source of the input tube Mn and is used to access the input signal at the same time.
  • the first configuration signal or the second configuration signal in this embodiment; the gate of the input tube Mp and the gate of the input tube Mn are respectively used to connect the bias signal, wherein the gate of the input tube Mp is used to obtain the first bias Set the signal V bn , the gate of the input tube Mn is used to obtain the second bias signal V bp , the input tube Mp and the drain of the input tube Mn are respectively connected to the corresponding current mirror module, and output after the current mirror module.
  • the working principle of the cascode transconductance subunit in the foregoing optional embodiment is the same as the working principle of the cascode transconductance subunit in Embodiment 1, and will not be repeated here.
  • the multiple transconductance subunits in each transconductance unit are configured to use PMOS transistors and/or NMOS transistors of different sizes.
  • the first configuration signal includes: an input signal, an output signal, and a process signal at any position between the input node and the output node in the analog module.
  • the first configuration signal may also be a combination of the aforementioned input signal, output signal, and process signal, which is not limited in this application.
  • the multiple transconductance units are configured such that each transconductance unit obtains an input signal of one input node.
  • the above-mentioned transconductance unit can correspond to the number of the first configuration signal, so as to ensure that the transconductance unit can compensate for the nonlinear component in each input signal.
  • This embodiment also provides a compensation chip, including the above-mentioned embodiment 4 and the compensation circuit in the optional embodiment corresponding to embodiment 4; the technical solution of the compensation circuit in the compensation chip in this embodiment is the same as that in embodiment 4. Corresponds to the compensation circuit, so I won’t repeat it here.
  • This embodiment also provides a compensation method for providing a compensation signal to an analog module.
  • the analog module includes an input node and an output node;
  • FIG. 12 is a flowchart (2) of the compensation method provided according to an embodiment of the present invention, as shown in FIG. As shown in 12, the compensation method includes:
  • the detection module detects the work information of the analog module, and provides a second configuration signal according to the work information;
  • the linearity compensation module obtains the first configuration signal and the second configuration signal, and provides a compensation signal to the output node according to the first configuration signal and/or the second configuration signal, where the first configuration signal is used to indicate any of the analog modules Location signal.
  • the compensation method in this embodiment since the working information of the analog module can be detected and the second configuration signal is provided according to the working information, the compensation signal can be obtained and combined according to the second configuration signal and the first configuration signal provided by the analog module.
  • the above compensation method can solve the problem of large linearity compensation deviation caused by incomplete consideration of nonlinear sources and influencing factors in the linearity compensation process in related technologies. To improve the reliability of linearity compensation technology.
  • the work information includes at least one of the following: process information, voltage information, temperature information, and frequency information;
  • the second configuration information includes at least one of the following: a process configuration signal, a voltage configuration signal, a temperature configuration signal, Frequency configuration signal.
  • the above compensation method further includes: acquiring the first configuration signal and/or the second configuration signal in the m-th period, and providing the m-th compensation signal according to the first configuration signal and/or the second configuration signal; Obtain the first configuration signal and the second configuration signal in the m+1th period, and provide the m+1th compensation signal according to the first configuration signal and the second configuration signal; between the m+1th compensation signal and the mth compensation signal When the value difference of is within the preset range, the m-th compensation signal is provided to the output node.
  • m is an integer, and the assignment of m is only used to express a certain cycle in the work of the analog module, that is, any cycle of the work of the analog module can adopt the technical solution in the above optional embodiment; m+1 is used to represent the mth cycle
  • the m+1th cycle is the first cycle.
  • there is no restriction on the assignment of m that is, when the mth cycle is the 0th cycle and the m+1th cycle is the 1st cycle, m can be re-assigned to 1, that is, the mth cycle is the 1st cycle.
  • the cycle, the m+1th cycle is the second cycle, which is used to express that the technical solution in this optional embodiment can be cyclically executed according to the working cycle of the analog module.
  • the linearity compensation module obtains the input signal or output signal in the analog module as the first configuration signal according to step S604, and calculates the compensation signal according to the first configuration signal.
  • the signal calculation method is as described in the above-mentioned embodiment, and will not be repeated here.
  • the provided compensation signal is taken as the 0th compensation signal, which is the initial compensation signal provided by the linearity compensation module. value.
  • the detection module can detect the working information of the analog module according to step S602, such as process information, voltage information, temperature information, frequency information, etc., and use it to encode and package Obtain corresponding second configuration signals, such as process configuration signals, voltage configuration signals, temperature configuration signals, and frequency configuration signals, and provide the second configuration signals to the linearity compensation module.
  • the linearity compensation module recalculates the compensation signal according to the first configuration signal of the first period provided by the analog module and the second configuration signal according to step S604 again, and at this time, uses the compensation signal as the first compensation signal.
  • the first compensation signal can be compared with the 0th compensation signal, that is, to determine whether the numerical difference between the first compensation signal and the 0th compensation signal is within the preset range .
  • the numerical difference between the first compensation signal and the 0th compensation signal can be understood as the error between the first period and the 0th period of the compensation signal provided by the linearity compensation module, between the first compensation signal and the 0th compensation signal
  • the value difference of is within the preset range, that is, the error is acceptable.
  • the working information of the analog module has an influence on the linearity of the analog module in the first cycle than in the 0th cycle. Therefore, the linearity compensation
  • the 0th compensation signal provided by the module in the 0th cycle can be used as a steady-state compensation signal, and the analog module can perform effective linearity compensation according to the 0th compensation signal.
  • the 0th compensation signal performs linearity compensation on the output signal of the analog module, that is, effective linearity compensation cannot be realized, so it is necessary to provide the compensation signal again.
  • the detection module re-detects the working information of the analog module, and obtains a new second configuration signal according to the re-detected working information to provide to the linearity compensation module.
  • the linearity compensation module recalculates the compensation signal according to the first configuration signal and the second configuration signal of the current period, and uses the compensation signal as the second compensation signal.
  • the second compensation signal can be compared with the first compensation signal, that is, to determine whether the numerical difference between the second compensation signal and the first compensation signal is in the expected value. Set within the range.
  • the numerical difference between the second compensation signal and the first compensation signal is within the preset range, that is, the working information of the analog module has a more controllable influence on the linearity of the analog module in the second period than in the first period. Therefore, the first compensation signal provided by the linearity compensation module in the first cycle can be used as the steady-state compensation signal, and the analog module can perform effective linearity compensation according to the first compensation signal.
  • the linearity compensation module can provide the mth compensation signal to the output node of the analog module for linearity Degree compensation.
  • the foregoing process can be referred to as an iterative process of the linearity compensation module. Through the iterative process, the compensation signal provided by the linearity compensation module to the output node of the analog module can perform effective and reliable linearity compensation for the current cycle of the analog module.
  • the above technical solution introduces the working information of the analog module to provide the compensation signal in this embodiment, which can ensure that the compensation signal provides effective linearity compensation in the current period, so that the reliability of the linearity compensation of the analog module is further improved.
  • the promotion introduces the working information of the analog module to provide the compensation signal in this embodiment, which can ensure that the compensation signal provides effective linearity compensation in the current period, so that the reliability of the linearity compensation of the analog module is further improved.
  • the above compensation method further includes: when it is detected that the operating information of the analog module changes in the nth cycle, re-providing the second configuration signal according to the changed operating information; and acquiring the first configuration signal in the nth cycle Signal and the second configuration signal, and provide the n-th compensation signal according to the first configuration signal and the second configuration signal; obtain the first configuration signal and the second configuration signal in the n+1 cycle, and according to the first configuration signal and the second configuration signal
  • the configuration signal provides an n+1th compensation signal; when the numerical difference between the n+1th compensation signal and the nth compensation signal is within a preset range, the nth compensation signal is provided to the output node.
  • n is an integer, and the assignment of n is only used to express one cycle in the work of the analog module, that is, any cycle of the work of the analog module can adopt the technical solution in the above optional embodiment; n+1 is used to represent the nth cycle
  • the next cycle for example, when the nth cycle is the second cycle, the n+1th cycle is the third cycle.
  • n can be re-assigned to 3, that is, the nth cycle is the third cycle.
  • the cycle, the n+1th cycle is the fourth cycle, which is used to express that the technical solution in this alternative embodiment can be cyclically executed according to the working cycle of the analog module.
  • step S602 detects that the operating information of the analog module has changed, and re-acquires the second configuration signal according to the changed operating information and provides it to the linearity detection module.
  • the linearity detection module acquires the second configuration signal re-acquired according to the changed working signal in the 5th cycle, that is, in the 5th cycle, it re-acquires the first configuration signal in the current cycle and the second configuration signal in the current cycle.
  • the calculation method of the compensation signal is as described in the above embodiment, and will not be repeated here. At this time, the calculated compensation signal is used as the fifth compensation signal, and the fifth compensation signal is the analog module's After the work information changes, the initial value of the compensation signal provided by the linearity compensation module.
  • the detection module can obtain the second configuration signal according to the working information of the corresponding analog module in the 6th cycle and provide it to the linearity detection module.
  • the degree detection module recalculates the compensation signal according to the first configuration signal of the analog module in the sixth cycle and the above-mentioned second configuration signal. At this time, the compensation signal is used as the sixth compensation signal.
  • the sixth compensation signal can be compared with the fifth compensation signal, that is, to determine whether the numerical difference between the sixth compensation signal and the fifth compensation signal is within the preset range .
  • the numerical difference between the sixth compensation signal and the fifth compensation signal can be understood as the error between the compensation signal provided by the sixth cycle and the fifth cycle linearity compensation module, which is between the sixth compensation signal and the fifth compensation signal.
  • the value difference of is within the preset range, that is, the error is acceptable.
  • the influence of the change of the working information of the analog module on the linearity of the analog module in the 6th cycle is within the controllable range than in the 5th cycle. Therefore, the linearity
  • the fifth compensation signal provided by the degree compensation module in the fifth cycle can be used as a steady-state compensation signal, and the analog module can perform effective linearity compensation according to the fifth compensation signal.
  • the detection module re-detects the working information of the analog module, and obtains a new second configuration signal according to the re-detected working information to provide to the linearity compensation module.
  • the linearity compensation module recalculates the compensation signal according to the first configuration signal and the second configuration signal of the current cycle, and uses the compensation signal as the seventh compensation signal.
  • the seventh compensation signal can be compared with the sixth compensation signal, that is, to determine whether the numerical difference between the seventh compensation signal and the sixth compensation signal is in the expected value. Set within the range.
  • the numerical difference between the seventh compensation signal and the sixth compensation signal is within the preset range, that is, the working signal of the analog module has a more controllable influence on the linearity of the analog module in the seventh cycle than in the sixth cycle. Therefore, the sixth compensation signal provided by the linearity compensation module in the sixth cycle can be used as the steady-state compensation signal, and the analog module can perform effective linearity compensation according to the sixth compensation signal.
  • the linearity compensation module can provide the nth compensation signal to the output node of the analog module for linearity Degree compensation.
  • the above technical solution is based on the linearity compensation module that performs effective linearity compensation for the current cycle of the analog module through iteration, so that every time the work information corresponding to the analog module changes, the corresponding compensation signal can be adjusted in time to make the linearity
  • the compensation signal provided by the degree compensation module to the output node of the analog module can perform more reliable linearity compensation for the analog module after the work information changes, thereby ensuring that the linearity compensation effect is not weakened due to parameter fluctuations and mode changes.
  • the method according to the foregoing embodiment can be implemented by software plus a general hardware platform, and of course, it can also be implemented by hardware.
  • the technical solution of the present application can be embodied in the form of a software product.
  • the computer software product is stored in a storage medium (such as ROM/RAM, magnetic disk, and optical disk), and includes multiple instructions to enable one
  • a terminal device which may be a mobile phone, a computer, a server, or a network device, etc. executes the method described in each embodiment of the present invention.
  • Fig. 13 is a structural block diagram (1) of a compensation device according to an embodiment of the present invention. As shown in Fig. 13, the compensation device includes:
  • the first compensation module 701 is configured to obtain a first configuration signal and configure a combination of multiple transconductance units according to the first configuration signal to provide a compensation signal to the output node; wherein the first configuration signal is used to indicate any of the analog modules Location signal.
  • the combination of the multiple transconductance units can be configured according to the acquired first configuration signal to provide a compensation signal to the output node in the analog module; wherein, the first configuration signal is used In order to indicate the signal at any position in the analog module; therefore, the above compensation method can solve the problem of large linearity compensation deviation caused by incomplete consideration of nonlinear sources and influencing factors in the linearity compensation process in related technologies. To improve the reliability of linearity compensation technology.
  • the above-mentioned multiple modules can be implemented by software or hardware. For the latter, it can be implemented in the following way, but not limited to this: the above-mentioned modules are all located in the same processor; or, the above-mentioned multiple modules are implemented by Any combination of forms are located in different processors.
  • Fig. 14 is a structural block diagram (2) of a compensation device provided according to an embodiment of the present invention. As shown in Fig. 14, the compensation device includes: a providing module 801, configured to detect the working information of the analog module, and provide second information according to the working information.
  • the second compensation module 802 is configured to obtain the first configuration signal and the second configuration signal, and provide a compensation signal to the output node according to the first configuration signal and/or the second configuration signal, where the first configuration signal is used for Indicate a signal anywhere in the analog module.
  • the compensation device since the working information of the analog module can be detected, and the second configuration signal is provided according to the working information, the compensation signal can be acquired and combined according to the above-mentioned second configuration signal and the first configuration signal provided by the analog module.
  • the above compensation circuit can solve the problem of large linearity compensation deviation caused by incomplete consideration of nonlinear sources and influencing factors in the linearity compensation process in related technologies. To improve the reliability of linearity compensation technology.
  • the work information includes at least one of the following: process information, voltage information, temperature information, and frequency information;
  • the second configuration information includes at least one of the following: a process configuration signal, a voltage configuration signal, a temperature configuration signal, Frequency configuration signal.
  • the above compensation method further includes: acquiring the first configuration signal and/or the second configuration signal in the m-th period, and providing the m-th compensation signal according to the first configuration signal and/or the second configuration signal; Obtain the first configuration signal and the second configuration signal in the m+1th period, and provide the m+1th compensation signal according to the first configuration signal and the second configuration signal; between the m+1th compensation signal and the mth compensation signal When the value difference of is within the preset range, the m-th compensation signal is provided to the output node.
  • the above compensation method further includes: when it is detected that the operating information of the analog module changes in the nth cycle, re-providing the second configuration signal according to the changed operating information; and acquiring the first configuration signal in the nth cycle Signal and the second configuration signal, and provide the n-th compensation signal according to the first configuration signal and the second configuration signal; obtain the first configuration signal and the second configuration signal in the n+1 cycle, and according to the first configuration signal and the second configuration signal
  • the configuration signal provides an n+1th compensation signal; when the numerical difference between the n+1th compensation signal and the nth compensation signal is within a preset range, the nth compensation signal is provided to the output node.
  • the above-mentioned multiple modules can be implemented by software or hardware. For the latter, it can be implemented in the following ways, but not limited to this: the above-mentioned modules are all located in the same processor; or, the above-mentioned multiple modules are respectively in the form of any combination. Located in different processors.
  • the embodiment of the present application also provides a storage medium in which a computer program is stored, wherein the computer program is configured to execute the steps in any one of the foregoing method embodiments when running.
  • the aforementioned storage medium may be configured to store a computer program for executing the following steps:
  • the foregoing storage medium may include, but is not limited to: U disk, Read-Only Memory (Read-Only Memory, ROM for short), Random Access Memory (Random Access Memory, RAM for short), A variety of media that can store computer programs, such as mobile hard disks, magnetic disks, or optical disks.
  • the embodiment of the present application also provides a storage medium in which a computer program is stored, wherein the computer program is configured to execute the steps in any one of the foregoing method embodiments when running.
  • the aforementioned storage medium may be configured to store a computer program for executing the following steps:
  • S2 Acquire the first configuration signal and the second configuration signal, and provide a compensation signal to the output node according to the first configuration signal and/or the second configuration signal, where the first configuration signal is used to indicate a signal at any position in the analog module.
  • the foregoing storage medium may include, but is not limited to: U disk, ROM, RAM, mobile hard disk, magnetic disk, or optical disk, and other media that can store computer programs.
  • An embodiment of the present application also provides an electronic device, including a memory and a processor, the memory stores a computer program, and the processor is configured to run the computer program to execute the steps in any one of the foregoing method embodiments.
  • the aforementioned electronic device may further include a transmission device and an input-output device, wherein the transmission device is connected to the aforementioned processor, and the input-output device is connected to the aforementioned processor.
  • the foregoing processor may be configured to execute the following steps through a computer program:
  • An embodiment of the present application also provides an electronic device, including a memory and a processor, the memory stores a computer program, and the processor is configured to run the computer program to execute the steps in any one of the foregoing method embodiments.
  • the aforementioned electronic device may further include a transmission device and an input-output device, wherein the transmission device is connected to the aforementioned processor, and the input-output device is connected to the aforementioned processor.
  • the foregoing processor may be configured to execute the following steps through a computer program:
  • S2 Acquire the first configuration signal and the second configuration signal, and provide a compensation signal to the output node according to the first configuration signal and/or the second configuration signal, where the first configuration signal is used to indicate a signal at any position in the analog module.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Amplifiers (AREA)

Abstract

一种补偿电路及芯片、方法、装置、存储介质、电子装置，其中，补偿电路包括：模拟模块（102），包括输入节点（1022）、输出节点（1024）；其中，所述输入节点（1022）配置为接收输入信号，所述输出节点（1024）配置为输出输出信号；线性度补偿模块（104），包括多个跨导单元（1042），其中，所述多个跨导单元（1042）配置为，获取第一配置信号，并根据所述第一配置信号配置所述多个跨导单元（1042）的组合，以向所述输出节点（1024）提供所述补偿信号；所述第一配置信号用于指示所述模拟模块（102）中任意位置的信号。

Description

补偿电路及芯片、方法、装置、存储介质、电子装置
本申请要求在2019年08月30日提交中国专利局、申请号为201910817751.5的中国专利申请的优先权，该申请的全部内容通过引用结合在本申请中。
技术领域
本申请涉及电子领域，例如涉及一种补偿电路及芯片、方法、装置、存储介质、电子装置。
背景技术
随着无线通信系统的发展，模拟信道的信号带宽显著增大，宽带模拟信号处理电路，诸如模拟有源电阻-电容(Resistor-Capacitance，RC)滤波器、跨阻放大器和Delta-Sigma调制器等的设计面临严峻挑战。其中，作为无线通信系统中的重要指标，线性度直接决定了宽带模拟信号处理电路的整体性能。以跨导运算放大器(operational transconductance amplifier，OTA)的电路设计为例，为了抑制非线性，模拟电路中的OTA需要在很宽的频率范围内保持足够的开环增益。然而，在采用先进互补金属氧化物半导体(Complementary Metal Oxide Semiconductor，CMOS)工艺的模拟集成电路中，高增益、大带宽的OTA设计通常依赖额外的功耗和芯片面积开销，严重限制了模拟信号处理电路在无线通信系统中的应用。为了降低OTA的设计难度和成本代价，需要采用适当的线性度补偿方案以对于OTA的线性度进行补偿，进而提高模拟电路的线性度性能。然而，相关技术中，由于在线性度补偿过程中对非线性来源和影响因素考虑并不全面，只能对部分非线性因素进行补偿，进而造成实际线性度补偿的效果偏差较大，可靠性和实用性欠佳。
针对上述相关技术中，线性度补偿过程中对非线性来源和影响因素考虑并不全面而导致的线性度补偿偏差较大的问题，相关技术中尚未提出有效的解决方案。
发明内容
本发明实施例提供了一种补偿电路及芯片、方法、装置、存储介质、电子装置，以至少解决相关技术中线性度补偿过程中对非线性来源和影响因素考虑并不全面而导致的线性度补偿偏差较大的问题。
根据本申请的一个实施例，提供了一种补偿电路，包括：
模拟模块，包括输入节点、输出节点；其中，所述输入节点配置为接收输入信号，所述输出节点配置为输出输出信号；
线性度补偿模块，包括多个跨导单元，其中，所述多个跨导单元配置为，获取第一配置信号，并根据所述第一配置信号配置所述多个跨导单元的组合，以向所述输出节点提供补偿信号；所述第一配置信号用于指示所述模拟模块中任意位置的信号。
根据本申请的另一个实施例，还提供了一种补偿芯片，包括上述实施例中的补偿电路。
根据本申请的另一个实施例，提供了一种补偿方法，用于向模拟模块提供补偿信号，所述模拟模块包括输入节点、输出节点；所述方法包括：
获取第一配置信号，并根据所述第一配置信号配置多个跨导单元的组合，以向所述输出节点提供补偿信号；其中，所述第一配置信号用于指示所述模拟模块中任意位置的信号。
根据本申请的另一个实施例，还提供了一种补偿电路，包括：
模拟模块，包括输入节点、输出节点，其中，所述输入节点配置为接收输入信号，所述输出节点配置为输出输出信号；
检测模块，配置为检测所述模拟模块的工作信息，并根据所述工作信息提供第二配置信号；
线性度补偿模块，配置为获取第一配置信号以及所述第二配置信号，并根据所述第一配置信号和/或所述第二配置信号向所述输出节点提供补偿信号，其中，所述第一配置信号用于指示所述模拟模块中任意位置的信号。
根据本申请的另一个实施例，还提供了一种补偿芯片，包括上述实施例中的补偿电路。
根据本申请的另一个实施例，还提供了一种补偿方法，用于向模拟模块提供补偿信号，所述模拟模块包括输入节点、输出节点；所述方法包括：
检测所述模拟模块的工作信息，并根据所述工作信息提供第二配置信号；
获取第一配置信号以及所述第二配置信号，并根据所述第一配置信号和/或所述第二配置信号向所述输出节点提供补偿信号，其中，所述第一配置信号用于指示所述模拟模块中任意位置的信号。
根据本申请的另一个实施例，还提供了一种补偿装置，配置为向模拟模块提供补偿信号，所述模拟模块包括输入节点、输出节点；所述装置包括：
补偿模块，配置为获取第一配置信号，并根据所述第一配置信号配置多个 跨导单元的组合，以向所述输出节点提供补偿信号；其中，所述第一配置信号用于指示所述模拟模块中任意位置的信号。
根据本申请的另一个实施例，还提供了一种补偿装置，配置为向模拟模块提供补偿信号，所述模拟模块包括输入节点、输出节点；所述装置包括：
提供模块，配置为检测所述模拟模块的工作信息，并根据所述工作信息提供第二配置信号；
补偿模块，配置为获取第一配置信号以及所述第二配置信号，并根据所述第一配置信号和/或所述第二配置信号向所述输出节点提供补偿信号，其中，所述第一配置信号用于指示所述模拟模块中任意位置的信号。
根据本申请的又一个实施例，还提供了一种存储介质，所述存储介质中存储有计算机程序，其中，所述计算机程序被设置为运行时执行上述任一项方法实施例中的步骤。
根据本申请的又一个实施例，还提供了一种电子装置，包括存储器和处理器，所述存储器中存储有计算机程序，所述处理器被设置为运行所述计算机程序以执行上述任一项方法实施例中的步骤。
附图说明
此处所说明的附图用来提供对本申请的进一步理解，构成本申请的一部分，本申请的示意性实施例及其说明用于解释本申请，并不构成对本申请的不当限定。在附图中：
图1是根据本发明实施例提供的补偿电路的功能示意图(一)；
图2是根据本发明实施例提供的模拟模块的电路示意图；
图3是根据本发明实施例提供的线性度补偿模块的电路示意图(一)；
图4是根据本发明实施例提供的线性度补偿模块的电路示意图(二)；
图5是根据本发明实施例提供的共源共栅型跨导子单元的内部构造图(一)；
图6是根据本发明实施例提供的共源共栅型跨导子单元的内部构造图(二)；
图7是根据本发明实施例提供的共栅型跨导子单元的内部构造图；
图8是根据本发明实施例提供的补偿方法的流程图(一)；
图9是根据本发明实施例提供的补偿电路的功能示意图(二)；
图10是根据本发明实施例提供的线性度补偿模块的电路示意图(三)；
图11是根据本发明实施例提供的线性度补偿模块的电路示意图(四)；
图12是根据本发明实施例提供的补偿方法的流程图(二)；
图13是根据本发明实施例提供的补偿装置的结构框图(一)；
图14是根据本发明实施例提供的补偿装置的结构框图(二)。
具体实施方式
下文中将参考附图并结合实施例来说明本申请。
需要说明的是，本申请的说明书和权利要求书及上述附图中的术语“第一”、“第二”等是用于区别类似的对象，而不必用于描述特定的顺序或先后次序。
实施例1
本实施例提供了一种补偿电路，图1是根据本发明实施例提供的补偿电路的功能示意图(一)，如图1所示，所述补偿电路包括：
模拟模块102，包括输入节点1022和输出节点1024；其中，输入节点1022配置为接收输入信号，输出节点1024配置为输出输出信号。
线性度补偿模块104，包括多个跨导单元1042(参见图3)，其中，多个跨导单元1042配置为，获取第一配置信号，并根据第一配置信号配置多个跨导单元1042的组合，以向输出节点1024提供补偿信号；第一配置信号用于指示模拟模块102中任意位置的信号。
模拟模块102中，输入节点1022与输出节点1024往往为多个，如图1所示，模拟模块102配置由多个输入节点1022以及多个输出节点1024，且多个输入节点1022分别配置为接收对应的输入信号X 1至X n，多个输出节点1024分别配置为输出对应的输出信号Y 1至Y m。对应的，线性度补偿模块104中所获取的第一配置信号即为模拟模块102中任意位置的信号。如图1所示，上述第一配置信号可指示模拟模块102的输入信号X 1～X n，或输出信号Y 1～Y m，或输入节点与输出节点之间的过程信号Z 1～Z n，也可以是上述输入信号X 1～X n，输出信号Y 1～Y m，以及过程信号Z 1～Z n之间的组合，本申请对此不作限定。
根据上述模拟模块的设计目的或作用不同，可以通过在输入节点与输出节点之间配置或连接不同的电子器件，诸如有源RC滤波器、跨阻放大器以及OTA等，以形成不同的宽带模拟信号处理电路。本实施例中以基于OTA的宽带模拟信号处理电路为例，即模拟模块中在输入节点与输出节点之间设置OTA，输入节点即为OTA提供输入信号，输出节点即输出OTA的输出信号。
图2是根据本发明实施例提供的模拟模块的电路示意图，如图2所示，模拟模块102中包括有多个输入节点，多个输入节点1022对应提供的输入信号分 别为电压信号V i1、V i2……V in，上述多个输入信号分别经由该输入节点对应支路上的负载G 11、G 12……G 1n接入至OTA1026(即图2中所示的G OTA)的输入端，并在OTA完成电压信号至电流信号的转换后，由OTA的输出端得以输出输出信号V o，OTA的输出端即构成了模拟模块的输出节点1024，OTA的输出信号即为输出节点1024对应输出的输出信号。与此同时，模拟模块102中，OTA的输入端与输出端之间跨接有负载G 2，OTA的输出端与信号地之间还接有输出负载G 3。本实施例中的OTA为本领域常规的OTA器件，本领域技术人员根据本领域的公知常识可以获知OTA的内部电路构造以及对信号的处理方式，故本申请对此不再赘述。
本实施例中的线性度补偿模块104所获取的第一配置信号为模拟模块102中任意位置的信号，在图1中，上述第一配置信号可指示模拟模块102的输入信号X 1～X n，多个输出节点1024分别输出的对应的输出信号Y 1～Y m，以及输入节点与输出节点之间的过程信号Z 1～Z n，也可以是上述输入信号X 1～X n，输出信号Y 1～Y m，过程信号Z 1～Z n之间的组合，本申请对此不作限定。仍以如图2所示的基于OTA的宽带模拟信号处理电路为例进行说明，第一配置信号用于指示图2所示的模拟模块102中任意位置的信号，即该第一配置信号可以为输入信号V i1、V i2……V in，可以为输出信号V o，也可以为输入节点与输出节点之间任意位置的过程信号，如负载G 11、G 12……G 1n位置对应的信号，也可以为上述输入信号、输出信号以及过程信号之间的组合。
图3是根据本发明实施例提供的线性度补偿模块的电路示意图(一)，如图3所示，线性度补偿模块104中包括多个跨导单元1042，对应为G c1，G c2……G cn，G co；线性度补偿模块根据第一配置信号的不同，以对多个跨导单元的组合进行配置，即配置线性度补偿模块中进行补偿处理的跨导单元的对象及数量，通过不同跨导单元的组合对输入的第一配置信号进行跨导处理以输出补偿信号，并将该补偿信号提供至模拟模块的输出节点以对于输出信号进行补偿；例如图3所示的线性度补偿模块中，当仅以模拟模块中输入节点的输入信号作为第一配置信号时，可仅对应配置多个跨导单元中的G c1，G c2……G cn以形成组合参与对信号的跨导处理，当仅以模拟模块中输出节点的输出信号作为第一配置信号时，可仅对应配置多个跨导单元中的G co以参与对信号的跨导处理。本实施例中的线性度补偿模块以第一配置信号为输入节点的输入信号与输出节点的输出信号的组合为例，多个跨导单元中，G c1，G c2……G cn分别对应接入输入节点的输入信号V i1、V i2……V in，G co对应接入输出节点的输出信号V o。
在线性度补偿模块中，多个跨导单元之间可采用相同尺寸的器件，也可采用不同尺寸的器件，当多个跨导单元之间可采用相同尺寸的器件的情形下，即可通过配置跨导单元的数量以形成对应组合实现对第一配置信号的跨导处理； 当多个跨导单元之间采用不同尺寸的器件时，由于不同器件尺寸的跨导单元致使跨导单元的跨导大小存在差异，故该情况下可在配置跨导单元的数量的基础上，针对第一配置信号中不同支路的信号，配置对应器件尺寸的跨导单元的对象以形成对应的组合。为使得线性度补偿模块针对第一配置信号进行配置的适用性进一步增加，本实施例中的线性度补偿模块采用不同器件尺寸的跨导单元以构成线性度补偿模块，即在图3所示的线性度补偿模块中，不同的跨导单元G c1，G c2……G cn，G co之间采用不同尺寸的器件，即跨导单元G c1，G c2……G cn，G co中存在至少两个相互间采用不同尺寸的器件的跨导单元，可以多个跨导单元之间的器件尺寸彼此互不相同，也可以多个跨导单元之间的器件尺寸部分不同，本申请对此不作限定。
为说明上述线性度补偿模块中配置不同跨导单元的组合的过程，以下对于跨导单元进行补偿的方式以及配置跨导单元的组合的方式进行阐述。
本实施例中的补偿电路中，模拟模块中输出节点的输出信号V o存在线性分量与非线性分量，采用线性度补偿模块对于输出信号提供补偿信号的过程即对于上述非线性分量进行补偿的过程。通常而言，上述非线性分量与OTA的输入端的输入信号V x的摆幅存在负相关关系，因此，可以根据OTA的输入端的输入信号V x以获取需对于非线性分量进行补偿的补偿信号。在图3所示的线性度补偿模块的电路示意图中，OTA的输入端的输入信号V x与模拟模块的输入信号以及输出信号存在以下关系：
Figure PCTCN2020111361-appb-000001
上述i c为线性度补偿模块中提供的补偿信号，n为输入节点的数量，G 1j为负载G 1j，G 2和G 3分别为负载G 2和G 3，V ij为输入信号V ij，V o为输出信号V o，G OTA为OTA的跨导。本实施例中，为补偿电流，i c进一步满足：
Figure PCTCN2020111361-appb-000002
上述公式二即可作为线性度补偿模块进行线性度补偿的依据，即通过线性度补偿模块中跨导单元G c1，G c2，……，G cn之间的组合以提供输入部分的补偿电流G 1jV ij进而补偿输入信号中V i1、V i2，……，V in对应的非线性分量，同时通过跨导单元G co以提供输出部分的补偿电流G 3V o进而补偿输出信号V o对应的非线性分量。以此，即可通过线性度补偿模块的设置以对于模拟模块中输入信号与输出信号中的非线性分量进行补偿。
在根据上述方式确定补偿电流后，本实施例中可采用以下方式确定跨导单 元的组合以进行配置：
枚举法：将线性度补偿模块中的多个跨导单元可能的组合进行依次排列，将第一配置信号，即模拟模块的输入信号与输出信号代入至上述每一个跨导单元的组合中，遍历所有组合，依次尝试不同跨导单元的组合下所输出的补偿信号，从而获取其中线性度补偿效果最好的对应跨导单元的组合以作为线性度补偿模块中的多个跨导单元组合的实际配置。
查找法：预先对模拟模块对应的不同配置信号进行测试，以获取每一种配置信号下需对应的补偿信号，并以此确认该补偿信号对应的跨导单元的组合；在实际模拟电路的补偿处理中，线性度补偿模块在获取第一配置信号后，即可根据上述配置信号与跨导单元的组合之间的对应关系以确定当前配置信号所对应的跨导单元的组合，并以此进行配置。
以上两种方式仅作为本实施例中实现线性度补偿模块配置多个跨导单元的组合过程中的可选配置方式，任何可根据本实施例中补偿电流的对应关系而对跨导单元的组合进行配置的方式均属于申请的保护范围，本申请对此不作限定。
通过本实施例中的补偿电路，由于补偿电路中的线性度补偿模块可根据获取的第一配置信号配置所述多个跨导单元的组合，以向模拟模块中的输出节点提供补偿信号；其中，所述第一配置信号用于指示所述模拟模块中任意位置的信号；因此，上述补偿电路可以解决相关技术中线性度补偿过程中对线性度来源考虑并不全面而导致的线性度补偿偏差较大的问题，以达到提高线性度可靠性的效果。
在本实施例中，上述补偿电路中的线性度补偿模块一方面可吸收模拟模块的输入信号与输出信号，并根据此为模拟电路中的OTA的输出信号提供补偿电流进行补偿，从而减小了OTA输入端的摆幅并提高了输出端的输出信号的线性度，故此，模拟电路在对于OTA进行设计过程中无需严格考量OTA的增益和带宽，因而间接降低了OTA设计的性能要求与成本；另一方面，本实施例中的线性度补偿模块不限于固定的跨导大小，可根据模拟电路中配置信号的不同而配置对应的跨导单元的组合，因此，上述线性度补偿模块可适用于不同带宽模式，不同频率分量处的模拟模块，故可显著提高上述不同带宽模式及频率分量处的模拟模块对应的线性度补偿的可靠性，同时亦可令线性度补偿模块具备可配置或可适应性。
在一可选实施例中，线性度补偿模块104中的每一个跨导单元1042均包括相互并接的多个跨导子单元10422；其中，多个跨导单元1042与多个跨导子单元10422配置为，获取第一配置信号，并根据第一配置信号配置多个跨导单元1042的组合以及跨导单元1042中的多个跨导子单元10422的组合，以向输出节 点1024提供补偿信号。
图4是根据本发明实施例提供的线性度补偿模块的电路示意图(二)，如图4所示，每一个跨导单元1042均由多个跨导子单元10422并接构成，以跨导单元G c1为例，该跨导单元G c1中包括多个相互并接的跨导子单元G c1,1，G c1,2，……，G c1,m1；上述线性度补偿模块中根据第一配置信号配置多个跨导单元的组合以及跨导单元中的多个跨导子单元的组合，即指示线性度补偿模块在进行配置中存在两个配置维度，第一维度即指示对跨导单元的对象及数量进行配置，第二维度即指示在第一维度中跨导单元的对象及数量进行配置的基础上，对于跨导单元内部跨导子单元的对象及数量进行配置；当上述配置不同对象及数量的跨导单元以及每一个跨导单元中不同对象及数量的跨导子单元参与对信号的跨导处理时，即可形成对于信号的不同跨导处理结果。
对于每一个跨导单元而言，由于跨导单元内部的多个跨导子单元之间采用并接，故可通过在同一个跨导单元中配置不同对象及数量的跨导子单元，以实现该跨导单元的跨导大小的调节。因此，上述实施例中对于不同的跨导单元之间采用不同尺寸的器件的情形，也可以由每一个跨导单元内部跨导子单元的对象及数量的配置得以实现，即根据第一配置信号为每一个跨导单元配置其内部跨导子单元的对象及数量。
相应的，同一个跨导单元中的不同跨导子单元可采用相同尺寸的器件，也可采用不同尺寸的器件，当多个跨导子单元之间采用相同尺寸的器件的情形下，即可通过配置跨导子单元的数量以形成对应组合，从而实现对第一配置信号的跨导处理；当多个跨导子单元之间采用不同尺寸的器件时，由于不同器件尺寸的跨导子单元致使跨导子单元的跨导大小存在差异，故该情况下可在配置跨导子单元的数量的基础上，针对第一配置信号的不同配置对应器件尺寸的跨导子单元的对象以形成对应的组合。为使得线性度补偿模块针对第一配置信号进行配置的适用性进一步增加，本可选实施例中的线性度补偿模块中每一个跨导单元内的多个跨导子单元间可采用不同尺寸的器件，在图4所示的线性度补偿模块中，以跨导单元G c1为例，该跨导单元G c1中包括多个跨导子单元G c1,1，G c1,2……G c1,m1，G c1中存在至少两个相互间采用不同尺寸的器件的跨导子单元，可以多个跨导子单元之间的器件尺寸彼此互不相同，也可以多个跨导子单元之间的器件尺寸部分不同，本申请对此不作限定。
无论上述多个跨导子单元之间的器件尺寸是否相同，不同的跨导单元之间均可通过不同数量的跨导子单元的并接以形成不同跨导大小的跨导单元，因此，上述可选实施例中线性度补偿模块的多个配置维度可令该线性度补偿模块的适用性得以显著改善。
在本可选实施例中，引入不同跨导子单元构成的多个配置维度后，在跨导单元进行补偿的方式以及配置跨导单元的组合的方式即在上述实施例中线性度补偿模块对于跨导单元进行配置的基础上，对于每一个跨导单元内的多个跨导子单元再次进行配置。
在进行补偿电流的配置过程中，仍可根据上述公式二作为线性度补偿模块进行线性度补偿的依据，在通过线性度补偿模块中跨导单元G c1，G c2，……，G cn，G co之间的组合以提供输入部分的补偿电流G 1jV ij进而补偿输入信号中V i1、V i2，……，V in对应的非线性分量的基础上，可通过配置每一个跨导单元中的多个跨导子单元的组合以令该跨导单元对应的输入信号的非线性分量得到更为有效的补偿，例如，跨导单元G c1中的多个跨导子单元G c1,1，G c1,2，……，G c1,m1之间可根据输入信号V i1的数值确定对应的组合，从而令跨导单元G c1根据该组合以形成对应的跨导大小，以实现对输入信号V i1的补偿。以此类推，每一个跨导单元G c1，G c2，……，G cn，G co均可通过配置内部跨导子单元的组合以进行相应的补偿。
相应的，在根据上述方式确定补偿电流后，本可选实施例中在确定跨导单元的组合以进行配置时仍可采用上述实施例中的方式，例如：
枚举法：将线性度补偿模块中的多个跨导单元以及跨导单元中多个跨导子单元可能的组合进行依次排列，将第一配置信号，即模拟模块的输入信号与输出信号代入至上述每一个组合中，遍历所有组合，依次尝试不同组合下所输出的补偿信号，从而获取其中线性度补偿效果最好的对应组合以作为线性度补偿模块中的多个跨导单元以及跨导单元中多个跨导子单元组合的实际配置。
查找法：预先对模拟模块对应的不同配置信号进行测试，以获取每一种配置信号下需对应的补偿信号，并以此确认该补偿信号对应的多个跨导单元以及跨导单元中多个跨导子单元的组合；在实际模拟电路的补偿处理中，线性度补偿模块在获取第一配置信号后，即可根据上述配置信号与多个组合之间的对应关系以确定当前配置信号所对应的多个跨导单元以及跨导单元中多个跨导子单元的组合，并以此进行配置。
上述可选实施例中跨导单元的构成，可令线性度补偿模块在根据第一配置信号进行配置过程中，由于多个配置维度的设置，进而令可配置的适用性得以改善，以令线性度补偿模块对于不同模拟模块对应的线性度补偿的有效性及可靠性得到显著地增加。
在一可选实施例中，跨导子单元10422包括跨导管108以及偏置管110，其中，跨导管108的栅极配置为获取第一配置信号，跨导管108的漏极配置为向偏置管110的源极提供信号；偏置管110的栅极配置为获取偏置信号，偏置管110的漏极配置为提供补偿信号。
跨导管108与偏置管110均采用PMOS管，或者，跨导管108与偏置管110均采用NOMS管。
上述跨导管与偏置管构成共源共栅型跨导子单元，图5是根据本发明实施例提供的共源共栅型跨导子单元的内部构造图(一)，如图5所示，跨导管Ma与偏置管Mb均采用NMOS管，跨导管Ma的栅极作为跨导子单元的输入端，用以获取第一配置信号，图5中以V i表示第一配置信号，跨导管Ma的漏极配置为向偏置管Mb的源极提供信号，跨导管Ma的源极配置为获取接地信号；偏置管Mb的栅极配置为获取偏置信号V b，偏置管Mb的漏极配置为提供补偿信号；上述偏置管Mb的栅极获取的偏置信号V b可以由直流偏置模块112提供，该直流偏置模块可以由模拟模块提供，即将模拟模块中的过程信号作为偏置信号提供至偏置管，也可以采用独立设置的直流偏置模块，即针对偏置管的偏置信号单独提供一个电路模块，本申请对此不作限定。图6是根据本发明实施例提供的共源共栅型跨导子单元的内部构造图(二)，如图6所示，跨导管Ma与偏置管Mb均采用PMOS管，在该情形下，跨导管Ma与偏置管Mb之间的连接方式与跨导管Ma与偏置管Mb采用NMOS管的情形下相同，在此不再赘述。
为说明上述共源共栅型跨导子单元的工作方式，以下对该共源共栅型跨导子单元的工作原理进行阐述：
上述图5或图6所示的共源共栅型跨导子单元中，跨导管Ma工作在线性区，偏置管Mb工作在饱和区，跨导管的跨导与该跨导管的漏源电压大致呈现线性关系，即g m≈KV DS，其中，g m为跨导管Ma的跨导，V DS为跨导管Ma的漏源电压，K为跨导管Ma工艺和尺寸参数。以此即可获知，在跨导管和偏置管尺寸不变的前提下，通过在偏置管的栅极接偏置信号(偏置电压)V b，即可通过V b以令跨导管的漏源电压及其跨导对应变化，进而产生对应的补偿电流。本实施例中，偏置电压V b可以设置为可调电压也可以设置为固定电压，跨导管与偏置管的尺寸可根据实际模拟电路状态而进行预先配置，也可设计为可调尺寸。
在一可选实施例中，跨导子单元包括输入端、输出端，以及设置在输入端与输出端之间的电流镜114，其中，输出端配置为提供补偿信号。
输入端包括PMOS管116以及NMOS管118，其中，PMOS管116的源极与NMOS管118的源极相连接，PMOS管116的源极以及NMOS管118的源极配置为获取第一配置信号，PMOS管116的栅极配置为获取第一偏置信号，NMOS管118的栅极配置为获取第二偏置信号，PMOS管116的漏极以及NMOS管118的漏极配置为向电流镜114提供信号。
上述跨导管与偏置管构成共栅型跨导子单元，图7是根据本发明实施例提供的共栅型跨导子单元的内部构造图，如图7所示，共栅型跨导子单元的输入 端包括两个输入管Mp与Mn，其中输入管Mp采用PMOS管，输入管Mn采用NMOS管，输入管Mp的源极与输入管Mn的源极相连接，并同时用于接入输入信号，即本实施例中的第一配置信号；输入管Mp的栅极以及输入管Mn的栅极分别用于连接偏置信号，其中，输入管Mp的栅极用于获取第一偏置信号V bn，输入管Mn的栅极用于获取第二偏置信号V bp，输入管Mp以及输入管Mn的漏极分别连接至对应的电流镜模块，并经由电流镜模块后进行输出。
为进一步说明上述共栅型跨导子单元的工作方式，以下对该共栅型跨导子单元的工作原理进行进一步阐述：
以输入管Mn为例，Mn的跨导与栅源连接的第二偏置电压V bp大致呈现线性关系，即g m≈K(V GS-V TH)，其中，K为MOS管工艺和尺寸参数，V GS为MOS管栅源电压，V TH为MOS管阈值电压。输入信号，即Mn的源极接入的电压产生变化后，V GS亦会随之产生变化，从而令Mn的跨导和漏极提供的补偿电流对应改变，上述补偿电流经电流镜镜像至输出端后即可实现输出。本实施例中，输入管Mn和输入管Mp的尺寸，即上述K可根据实际模拟电路状态而进行预先配置，也可设计可调尺寸，以增加对补偿电流的控制能力。
在一可选实施例中，第一配置信号包括：输入信号、输出信号，以及模拟模块中输入节点与输出节点之间任意位置的过程信号。
第一配置信号还可以是上述输入信号、输出信号以及过程信号之间的组合，本实施例中以采用输入信号与输出信号作为第一配置信号进行举例说明，在此不再赘述。
在一可选实施例中，第一配置信号为输入信号的情形下，多个跨导单元配置为，每一个跨导单元获取一个输入节点的输入信号。
上述跨导单元即可与第一配置信号的数量相对应，以确保跨导单元可对于每一路输入信号中的非线性分量进行补偿。
实施例2
本实施例还提供了一种补偿芯片，包括上述实施例1以及实施例1对应的可选实施例中的补偿电路；本实施例中的补偿芯片中的补偿电路的技术方案与实施例1中的补偿电路对应，在此不再赘述。
实施例3
本实施例还提供了一种补偿方法，用于向模拟模块提供补偿信号，模拟模块包括输入节点、输出节点；图8是本发明实施例提供的补偿方法的流程图(一)，如图8所示，该补偿方法包括：
S302，线性度补偿模块获取第一配置信号，并根据第一配置信号配置多个跨导单元的组合，以向输出节点提供补偿信号；其中，第一配置信号用于指示模拟模块中任意位置的信号。
通过本实施例中的补偿方法，由于可根据获取的第一配置信号配置所述多个跨导单元的组合，以向模拟模块中的输出节点提供补偿信号；其中，所述第一配置信号用于指示所述模拟模块中任意位置的信号；因此，上述补偿方法可以解决相关技术中线性度补偿过程中对非线性来源和影响因素考虑并不全面而导致的线性度补偿偏差较大的问题，以提高线性度补偿技术的可靠性。
本实施例中补偿方法的其余技术方案与实施例1以及实施例1对应的可选实施例中的补偿电路的技术方案相对应，故在此不再赘述。
通过以上的实施方式的描述，本领域的技术人员可以了解到根据上述实施例的方法可借助软件加通用硬件平台的方式来实现，当然也可以通过硬件实现。基于这样的理解，本申请的技术方案可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质(如只读存储器/随机存取存储器(Read-Only Memory/Random Access Memory，ROM/RAM)、磁碟、光盘)中，包括多个指令用以使得一台终端设备(可以是手机，计算机，服务器，或者网络设备等)执行申请多个实施例所述的方法。
实施例4
本实施例还提供了一种补偿电路，图9是根据本发明实施例提供的补偿电路的功能示意图(二)，如图9所示，所述补偿电路包括：模拟模块402，包括输入节点4022、输出节点4024，其中，输入节点配置为接收输入信号，输出节点配置为输出输出信号；检测模块404，配置为检测模拟模块402的工作信息，并根据工作信息提供第二配置信号；线性度补偿模块406，配置为获取第一配置信号以及第二配置信号，并根据第一配置信号和/或第二配置信号向输出节点提供补偿信号，其中，第一配置信号用于指示模拟模块中任意位置的信号。
模拟模块402中，输入节点4022与输出节点4024往往为多个，如图9所示，模拟模块402配置由多个输入节点4022以及多个输出节点4024，且多个输入节点4022分别配置为接收对应的输入信号X 1至X n，多个输出节点4024分别配置为输出对应的输出信号Y 1至Y m。根据上述模拟模块的设计目的或作用不同，可以通过在输入节点与输出节点之间配置或连接不同的电子器件，诸如有源RC滤波器、跨阻放大器、以及OTA等，以形成不同的宽带模拟信号处理电路。本申请对此不作限定。本实施例中以基于OTA的宽带模拟信号处理电路为例，即模拟模块中在输入节点与输出节点之间设置OTA，输入节点即为OTA提供输入信号，输出节点即输出OTA的输出信号。
上述检测模块404用以检测模拟模块402工作中的工作信息，在一可选实施例中，上述模拟模块402的工作信息包括以下之一：工艺信息、电压信息、温度信息、频率信息；其中，工艺信息用于指示本实施例中补偿电路的MOS管工艺角信息，电压信息用于指示本实施例中补偿电路的电源电压信息，温度信息用于指示本实施例中补偿电路的工作温度或环境温度信息，频率信息用于指示本实施例中补偿电路所处的频率分量信息。上述检测模块可以是整体模块，也可以是多个独立设置的检测单元，例如用于检测补偿电路的电源电压信息的电压传感器，用于检测补偿电路的工作温度或环境温度的温度传感器等，本申请对上述检测模块的类型不作限定，任何可检测模拟电路中对应信息的器件类型或结构布局均可作为检测模块。
检测模块404获取上述工作信息后，通过对该工作信息进行处理，例如对获取的工作信息进行编码、封装等，即可得到对应的第二配置信号；在上述可选实施例中的工作信息包括工艺信息、电压信息、温度信息、频率信息中之一时，工艺信息可对应生成工艺配置信号，电压信息可对应生成电压配置信号，温度信息可对应生成温度配置信号，频率信息可对应生成频率配置信号。检测模块获取上述第二配置信号后，即可将该第二配置信号提供至线性度补偿模块中。如图9所示，检测模块获取模拟模块的工艺信息U pi、电压信息U vi、温度信息U ti、频率信息U fi，并对应生成相应的工艺配置信号U po、电压配置信号U vo、温度配置信号U to、频率配置信号U fo，将上述工艺配置信号U po、电压配置信号U vo、温度配置信号U to、频率配置信号U fo统一作为第二配置信号发送至线性度补偿模块。
线性度补偿模块406一方面可获取上述检测模块404提供的第二配置信号，另一方面还可获取模拟模块402提供的第一配置信号；线性度补偿模块所获取的第一配置信号即为模拟模块402中任意位置的信号，如图9所示，上述第一配置信号即可指示模拟模块的输入信号X 1～X n，或输出信号Y 1～Y m，或输入节点与输出节点之间的过程信号Z 1～Z n，也可以是上述输入信号X 1～X n，输出信号Y 1～Y m，以及过程信号Z 1～Z n之间的组合，本申请对此不作限定。线性度补偿模块获取上述第一配置信号与第二配置信号，即可基于此获取补偿信号并向模拟模块的输出节点提供该补偿信号。
模拟模块的工作信息中，诸如工艺信息、温度信息等均在模拟模块进入工作后才会产生，并会随着模拟模块的不同工作环境而产生变化，因此，在模拟模块刚进入工作时，往往无法检测到工作信息，或检测的工作信息不准确；在该情形下，线性度补偿模块可仅根据第一配置信号获取补偿信号；在模拟模块处于稳定工作状态时，线性度补偿模块即可根据第一配置信号与第二配置信号同时进行补偿信号的获取；同时，线性度补偿模块也可以仅针对模拟模块的工 作信息进行独立的线性度的补偿，即仅根据第二配置信号实现补偿信号的获取。
为说明上述线性度补偿模块根据第一配置信号和/或第二配置信号进行补偿信号的获取过程，以下对补偿信号的获取方式进行阐述：
枚举法：将第一配置信号和/或第二配置信号代入至线性度补偿模块中，采用线性度补偿模块内所有可能的补偿方式计算第一配置信号和/或第二配置信号下对应的补偿信号，并采用其中补偿效果最佳的补偿信号作为的实际补偿信号对于模拟模块进行线性度补偿处理。
查找法：预先对模拟模块对应的不同输入/输出/过程等信号进行测试，以获取每一种第一配置信号下需对应补偿的补偿信号，同时预先对模拟模块对应的不同工作信息进行测试，以获取每一种第二配置信号需对应补偿的补偿信号，并分别确认上述不同补偿信号对应的线性度补偿模块的补偿方式；在实际模拟模块的补偿处理中，线性度补偿模块在获取第一配置信号和/或第二配置信号后，即可根据上述第一配置信号和/或第二配置信号与补偿信号之间的对应关系，以确定当前第一配置信号和/或第二配置信号所对应的线性度补偿模块的补偿方式以及其提供的补偿信号，以对模拟模块进行线性度补偿处理。
以上两种方式仅作为本实施例中线性度补偿模块根据第一配置信号和/或第二配置信号而获取补偿信号的两个可选实施例，其它可获取补偿信号的方式同样为线性度补偿模块的工作方式之一，本申请对此不作限定。
通过本实施例中的补偿电路，由于检测模块可以检测模拟模块的工作信息，并根据工作信息提供第二配置信号，以使得线性度补偿模块根据上述第二配置信号以及模拟模块提供的第一配置信号进行补偿信号的获取并提供至模拟模块的输出节点进行线性度补偿；因此，上述补偿电路可以解决相关技术中线性度补偿过程中对非线性来源和影响因素考虑并不全面而导致的线性度补偿偏差较大的问题，以提高线性度补偿技术的可靠性。
本实施例的补偿电路中，由于采用了根据模拟模块的工作信息得到的第二配置信号作为线性度补偿模块进行补偿的依据之一，故而，线性度补偿模块所提供的补偿信号可针对上述模拟模块的工作信息对于模拟模块形成的非线性因素进行有效的补偿。因此，本实施例中的补偿电路可针对模拟模块的工艺特性等进行有效的线性度补偿，以进一步提供线性度补偿的可靠性。
在一可选实施例中，线性度补偿模块406配置为：在第m周期获取第一配置信号和/或第二配置信号，并根据第一配置信号和/或第二配置信号提供第m补偿信号；在第m+1周期获取第一配置信号以及第二配置信号，并根据第一配置信号以及第二配置信号提供第m+1补偿信号；在第m+1补偿信号与第m补偿 信号之间的数值差值在预设范围内时，线性度补偿模块配置为向输出节点提供第m补偿信号。
上述m为整数，m的赋值仅用于表达模拟模块工作中的某一个周期，即模拟模块工作的任意周期均可采用上述可选实施例中的技术方案；m+1用于表示第m周期的下一个周期，例如第m周期为第0周期时，第m+1周期则为第1周期。本可选实施例中对于m的赋值不进行限制，即在第m周期为第0周期，第m+1周期为第1周期时，可重新对m赋值为1，即第m周期为第1周期，第m+1周期为第2周期，以此用于表达本可选实施例中的技术方案可按模拟模块的工作周期进行循环执行。
以下以m为0的情形进行阐述：
在第0周期，即模拟模块初始工作阶段，线性度补偿模块获取模拟模块中的输入信号或输出信号等作为第一配置信号，并根据该第一配置信号进行补偿信号的计算，补偿信号的计算方式如上述实施例中所述，在此不再赘述，此时，将提供的补偿信号作为第0补偿信号，该第0补偿信号即为线性度补偿模块的提供的补偿信号的初值。
在第1周期，即模拟模块已经处于稳定工作状态，检测模块即可检测到模拟模块的工作信息，例如工艺信息、电压信息、温度信息、频率信息等，并以此通过编码、封装等方式得到对应的第二配置信号，如工艺配置信号、电压配置信号、温度配置信号、频率配置信号，并将该第二配置信号提供至线性度补偿模块。线性度补偿模块根据模拟模块提供的第1周期的第一配置信号连同上述第二配置信号重新进行补偿信号的计算，此时，将该补偿信号作为第1补偿信号。
在获取第1补偿信号的前提下，可将该第1补偿信号与第0补偿信号之间进行比较，即判断第1补偿信号与第0补偿信号之间的数值差值是否在预设范围内。第1补偿信号与第0补偿信号之间的数值差值可以理解为第1周期与第0周期线性度补偿模块提供的补偿信号之间的误差，在第1补偿信号与第0补偿信号之间的数值差值在预设范围内时，即该误差可以接受，模拟模块的工作信息在第1周期对于模拟模块的线性度的影响较于第0周期在可控范围内，因此，线性度补偿模块在第0周期所提供的第0补偿信号即可作为稳态补偿信号，模拟模块即可根据该第0补偿信号进行有效的线性度补偿。
反之，在第1补偿信号与第0补偿信号之间的数值差值在预设范围外时，即模拟模块的工作信息在第1周期对于模拟模块的线性度形成的影响较大，如若仍以第0补偿信号对模拟模块的输出信号进行线性度补偿即无法实现有效的线性度补偿，故需重新进行补偿信号的提供。
上述情形下，即可将m赋值为1，以第m周期为第1周期的情况下重新进行上述过程，在第1周期线性度补偿模块以及获取第1补偿信号的情况下，在第m+1周期，即第2周期，检测模块重新检测模拟模块的工作信息，并根据重新检测的工作信息得到新的第二配置信号以提供至线性度补偿模块。
第2周期中，线性度补偿模块根据当前周期的第一配置信号与第二配置信号重新计算补偿信号，将该补偿信号作为第2补偿信号。同样的，在获取第2补偿信号的前提下，可将该第2补偿信号与第1补偿信号之间进行比较，即判断第2补偿信号与第1补偿信号之间的数值差值是否在预设范围内。在上述第2补偿信号与第1补偿信号之间的数值差值在预设范围内时，即模拟模块的工作信息在第2周期对于模拟模块的线性度的影响较于第1周期在可控范围内，因此，线性度补偿模块在第1周期所提供的第1补偿信号即可作为稳态补偿信号，模拟模块即可根据该第1补偿信号进行有效的线性度补偿。
相应的，如若第2周期的第2补偿信号与第1补偿信号之间的数值差值仍在预设范围外，则对m进行重新赋值为3，并在第3周期计算的第3补偿信号与第2补偿信号进行比较，重复上述过程。以此类推，直至在第m+1补偿信号与第m补偿信号之间的数值差值在预设范围内时，线性度补偿模块即可将第m补偿信号提供至模拟模块的输出节点进行线性度补偿。上述过程可称为线性度补偿模块的迭代过程，通过该迭代过程，即可令线性度补偿模块提供至模拟模块的输出节点的补偿信号可对于模拟模块当前周期进行有效且可靠的线性度补偿。
上述技术方案在本实施例引入模拟模块的工作信息进行补偿信号的提供的基础上，可确保补偿信号在当前周期内提供有效的线性度补偿，从而令模拟模块的线性度补偿的可靠性得到进一步的提升。
在一可选实施例中，检测模块404配置为：在第n周期检测至模拟模块的工作信息产生变化时，根据变化后的工作信息重新向线性度补偿模块提供第二配置信号；线性度补偿模块406配置为：在第n周期获取第一配置信号以及第二配置信号，并根据第一配置信号以及第二配置信号提供第n补偿信号；在第n+1周期获取第一配置信号以及第二配置信号，并根据第一配置信号以及第二配置信号提供第n+1补偿信号；在第n+1补偿信号与第n补偿信号之间的数值差值在预设范围内时，线性度补偿模块配置为向输出节点提供第n补偿信号。
上述n为整数，n的赋值仅用于表达模拟模块工作中的一个周期，即模拟模块工作的任意周期均可采用上述可选实施例中的技术方案；n+1用于表示第n周期的下一个周期，例如第n周期为第2周期时，第n+1周期则为第3周期。本可选实施例中对于n的赋值不进行限制，即在第n周期为第2周期，第n+1 周期为第3周期时，可重新对n赋值为3，即第n周期为第3周期，第n+1周期为第4周期，以此用于表达本可选实施例中的技术方案可按模拟模块的工作周期进行循环执行。
以下以n为5的情形进行阐述：
在第5周期，检测模块检测到模拟模块的工作信息产生变化，根据变化后的工作信息重新获取第二配置信号并将其提供至线性度检测模块。线性度检测模块在第5周期内获取到根据变化后的工作信号重新获取的第二配置信号后，即在第5周期重新根据当前周期下的第一配置信号以及当前周期下的第二配置信号以进行补偿信号的计算，补偿信号的计算方式如上述实施例中所述，在此不再赘述，此时；将计算的补偿信号作为第5补偿信号，该第5补偿信号即为模拟模块的工作信息变化后，线性度补偿模块的提供的补偿信号的初值。
在第6周期，即模拟模块已经在工作信息变化后重新处于稳定工作状态，检测模块即可根据第6周期内对应的模拟模块的工作信息获取第二配置信号并提供至线性度检测模块，线性度检测模块根据第6周期的模拟模块的第一配置信号连同上述第二配置信号重新进行补偿信号的计算，此时，将该补偿信号作为第6补偿信号。
在获取第6补偿信号的前提下，可将该第6补偿信号与第5补偿信号之间进行比较，即判断第6补偿信号与第5补偿信号之间的数值差值是否在预设范围内。第6补偿信号与第5补偿信号之间的数值差值可以理解为第6周期与第5周期线性度补偿模块提供的补偿信号之间的误差，在第6补偿信号与第5补偿信号之间的数值差值在预设范围内时，即该误差可以接受，模拟模块的工作信息的变化在第6周期对于模拟模块的线性度的影响较于第5周期在可控范围内，因此，线性度补偿模块在第5周期所提供的第5补偿信号即可作为稳态补偿信号，模拟模块即可根据该第5补偿信号进行有效的线性度补偿。
反之，在第6补偿信号与第5补偿信号之间的数值差值在预设范围外时，即模拟模块的工作信息的变化在第6周期对于模拟模块的线性度形成的影响较大，如若仍以第5补偿信号对模拟模块的输出信号进行线性度补偿即无法实现有效的线性度补偿，故需重新进行补偿信号的提供。
上述情形下，即可将n赋值为6，以第n周期为第6周期的情况下重新进行上述过程，在第6周期线性度补偿模块以及获取第6补偿信号的情况下，在第n+1周期，即第7周期，检测模块重新检测模拟模块的工作信息，并根据重新检测的工作信息得到新的第二配置信号以提供至线性度补偿模块。
第7周期中，线性度补偿模块根据当前周期的第一配置信号与第二配置信 号重新计算补偿信号，将该补偿信号作为第7补偿信号。同样的，在获取第7补偿信号的前提下，可将该第7补偿信号与第6补偿信号之间进行比较，即判断第7补偿信号与第6补偿信号之间的数值差值是否在预设范围内。在上述第7补偿信号与第6补偿信号之间的数值差值在预设范围内时，即模拟模块的工作信号在第7周期对于模拟模块的线性度的影响较于第6周期在可控范围内，因此，线性度补偿模块在第6周期所提供的第6补偿信号即可作为稳态补偿信号，模拟模块即可根据该第6补偿信号进行有效的线性度补偿。
相应的，如若第7周期的第7补偿信号与第6补偿信号之间的数值差值仍在预设范围外，则对n进行重新赋值为8，并在第8周期计算的第8补偿信号与第7补偿信号进行比较，重复上述过程。以此类推，直至在第n+1补偿信号与第n补偿信号之间的数值差值在预设范围内时，线性度补偿模块即可将第n补偿信号提供至模拟模块的输出节点进行线性度补偿。
上述技术方案在线性度补偿模块通过迭代对于模拟模块当前周期进行有效的线性度补偿的基础上，令模拟模块对应的工作信息每一次产生变化时，均可及时调整对应的补偿信号，以令线性度补偿模块提供至模拟模块的输出节点的补偿信号可对于模拟模块在工作信息变化后进行更为可靠的线性度补偿，进而保证线性度补偿效果不因参数波动和模式改变而出现减弱。
在一可选实施例中，线性度补偿模块406包括多个跨导单元4062；其中，多个跨导单元4062配置为，获取第一配置信号以及第二配置信号，并根据第一配置信号和/或第二配置信号配置多个跨导单元4062的组合，以向输出节点提供补偿信号。
图10是根据本发明实施例提供的线性度补偿模块的电路示意图(三)，如图10所示，上述可选实施例中，线性度补偿模块中包括多个跨导单元4062，对应为G c1，G c2，……，G cn，G co；线性度补偿模块根据第一配置信号以及第二配置信号的不同，以对多个跨导单元的组合进行配置，即配置线性度补偿模块中进行补偿处理的跨导单元的对象及数量，通过不同跨导单元的组合以对输入的第一配置信号和/或第二配置信号进行跨导处理以输出补偿信号，并将该补偿信号提供至模拟模块的输出节点以对于输出信号进行补偿。
例如图10所示的线性度补偿模块中，可以将图9所示的补偿电路中的输入信号X 1～X n，输出信号Y 1～Y m，以及过程信号Z 1～Z n或其组合作为第一配置信号，将工艺配置信号U po、电压配置信号U vo、温度配置信号U to、频率配置信号U fo或其组合作为第二配置信号，发送至线性度补偿模块中的不同跨导单元中，如可将输入信号X 1～X n作为第一配置信号输入至多个跨导单元中的G c1，G c2，……，G cn中进行第一配置信号非线性分量的处理，将工艺配置信号P o作为第二配置信 号输入至多个跨导单元中的G co中进行第二配置信号中非线性分量的处理，即根据第一配置信号与第二配置信号的实际类型，配置多个跨导单元中的G c1，G c2，……，G cn，G co以形成组合参与对第一配置信号与第二配置信号的跨导处理，并根据多个跨导单元中的G c1，G c2，……，G cn，G co计算补偿信号，以将该补偿信号提供给模拟模块的输出信号进行补偿。
在线性度补偿模块中，多个跨导单元之间可采用相同尺寸的器件，也可采用不同尺寸的器件，当多个跨导单元之间可采用相同尺寸的器件的情形下，即可通过配置跨导单元的数量以形成对应组合实现对第一配置信号和/或第二配置信号的跨导处理；当多个跨导单元之间采用不同尺寸的器件时，由于不同器件尺寸的跨导单元致使跨导单元的跨导大小存在差异，故该情况下可在配置跨导单元的数量的基础上，针对第一配置信号和/或第二配置信号中不同的信号，配置对应器件尺寸的跨导单元的对象以形成对应的组合。为使得上述线性度补偿模块针对第一配置信号和/或第二配置信号进行配置的适用性进一步增加，本可选实施例中的线性度补偿模块采用不同器件尺寸的跨导单元以构成线性度补偿模块，即在图10所示的线性度补偿模块中，不同的跨导单元G c1，G c2，……，G cn，G co之间采用不同尺寸的器件，即跨导单元G c1，G c2，……，G cn，G co中存在至少两个相互间采用不同尺寸的器件的跨导单元，可以多个跨导单元之间的器件尺寸彼此互不相同，也可以多个跨导单元之间的器件尺寸部分不同，本申请对此不作限定。
本可选实施例中，线性度补偿模块在计算补偿信号的过程中，可参照实施例1中基于OTA的宽带模拟信号处理电路，对于该电路中的输入信号等进行非线性度的补偿；同时，对于上述实施例中的模拟模块的工作信息，本可选实施例中的线性度补偿模块可预先记录或存储不同的工作信息，如工艺、电压、温度和频率等信息下，输出信号所需的补偿信号(可采用对照表的方式进行记录)，并将该补偿信号与上述补偿信号综合考量，以作为线性度补偿模块进行配置的依据。对于上述实施例中引入模拟模块的工作信息的情形下，本可选实施例中的线性度补偿模块可采用如下方式进行非线性量补偿的计算：本可选实施例中，根据第一配置信号和/或第二配置信号确定对应的补偿电流后，本实施例中可采用以下方式确定跨导单元的组合以进行配置：
枚举法：将线性度补偿模块中的多个跨导单元可能的组合进行依次排列，将第一配置信号和/或第二配置信号代入至上述每一个跨导单元的组合中，遍历所有可能组合，依次尝试不同跨导单元的组合下所输出的补偿信号，从而获取其中线性度补偿效果最好的对应跨导单元的组合以作为线性度补偿模块中的多个跨导单元组合的实际配置。
查找法：预先对模拟模块对应的不同配置信号进行测试，以获取每一种配置信号下需对应的补偿信号，并以此确认该补偿信号对应的跨导单元的组合；在实际模拟电路的补偿处理中，线性度补偿模块在获取第一配置信号以及第二配置信号后，即可根据上述配置信号与跨导单元的组合之间的对应关系以确定当前配置信号所对应的跨导单元的组合，并以此进行配置。
以上两种方式仅作为本实施例中实现线性度补偿模块配置多个跨导单元的组合过程中的可选配置方式，任何可根据本实施例中补偿电流的对应关系而对跨导单元的组合进行配置的方式均属于本申请的保护范围，本申请对此不作限定。
在本可选实施例中，上述补偿电路中的线性度补偿模块一方面可吸收模拟模块的输入信号、输出信号以及过程信号等，以及模拟模块工作过程中的工艺信息，并根据此为模拟电路中的OTA的输出信号提供补偿电流进行补偿，从而减小了OTA输入端的摆幅并提高了输出端的输出信号的线性度，故此，模拟电路在对于OTA进行设计过程中无需严格考量OTA的增益、带宽以及其适用的工艺等参数，因而间接降低了OTA设计的性能要求与成本；另一方面，本实施例中的线性度补偿模块不限于固定的跨导大小，可根据模拟电路中配置信号的不同而配置对应的跨导单元的组合，因此，上述线性度补偿模块可适用于不同工艺、不同带宽模式，不同频率分量处的模拟模块，故可显著提高上述不同工艺、带宽模式及频率分量处的模拟模块对应的线性度补偿的可靠性，同时亦可令线性度补偿模块具备可配置或可适应性。
在一可选实施例中，每一个跨导单元4062包括相互并接的多个跨导子单元40622；其中，多个跨导单元4062与多个跨导子单元40622配置为，获取第一配置信号以及第二配置信号，并根据第一配置信号和/或第二配置信号配置多个跨导单元4062的组合以及跨导单元4062中的多个跨导子单元40622的组合，以向输出节点提供补偿信号。
图11是根据本发明实施例提供的线性度补偿模块的电路示意图(四)，如图11所示，上述可选实施例中，每一个跨导单元均由多个跨导子单元并接构成，以跨导单元G c1为例，该跨导单元G c1中包括多个相互并接跨导子单元G c1,1，G c1,2……G c1,m1；上述线性度补偿模块中根据第一配置信号和/或第二配置信号配置多个跨导单元的组合以及跨导单元中的多个跨导子单元的组合，即指示线性度补偿模块在进行配置中存在两个配置维度，第一维度即指示对跨导单元的对象及数量进行配置，第二维度即指示在第一维度中跨导单元的对象及数量进行配置的基础上，对于跨导单元内部跨导子单元的对象及数量进行配置；当上述配置不同对象及数量的跨导单元以及每一个跨导单元中不同对象及数量的跨导 子单元参与对信号的跨导处理时，即可形成对于信号的不同跨导处理结果。
对于每一个跨导单元而言，由于跨导单元内部的多个跨导子单元之间采用并接，故可通过在同一个跨导单元中配置不同对象及数量的跨导子单元，以实现该跨导单元的跨导大小的调节。因此，上述实施例中对于不同的跨导单元之间采用不同尺寸的器件的情形，也可以由每一个跨导单元内部跨导子单元的对象及数量的配置得以实现，即根据第一配置信号和/或第二配置信号为每一个跨导单元配置其内部跨导子单元的对象及数量。
相应的，同一个跨导单元中的不同跨导子单元可采用相同尺寸的器件，也可采用不同尺寸的器件，当多个跨导子单元之间采用相同尺寸的器件的情形下，可通过配置跨导子单元的数量以形成对应组合，从而实现对第一配置信号和/或第二配置信号的跨导处理；当多个跨导子单元之间采用不同尺寸的器件时，由于不同器件尺寸的跨导子单元致使跨导子单元的跨导大小存在差异，故该情况下可在配置跨导子单元的数量的基础上，针对第一配置信号和/或第二配置信号的不同配置对应器件尺寸的跨导子单元的对象以形成对应的组合。为使得线性度补偿模块针对第一配置信号和/或第二配置信号进行配置的适用性进一步增加，本可选实施例中的线性度补偿模块中每一个跨导单元内的多个跨导子单元间可采用不同尺寸的器件，在图4所示的线性度补偿模块中，以跨导单元G c1为例，该跨导单元G c1中包括多个跨导子单元G c1,1，G c1,2，……，G c1,m1，G c1中存在至少两个相互间采用不同尺寸的器件的跨导子单元，可以多个跨导子单元之间的器件尺寸彼此互不相同，也可以多个跨导子单元之间的器件尺寸部分不同，本申请对此不作限定。
无论上述多个跨导子单元之间的器件尺寸是否相同，不同的跨导单元之间均可通过不同数量的跨导子单元的并接以形成不同跨导大小的跨导单元，因此，上述可选实施例中线性度补偿模块的多个配置维度可令该线性度补偿模块的适用性得以显著改善。
在本可选实施例中，引入不同跨导子单元构成的多个配置维度后，跨导单元进行补偿的方式以及配置跨导单元的组合的方式即在上述实施例中线性度补偿模块对于跨导单元进行配置的基础上，对于每一个跨导单元内的多个跨导子单元再次进行配置。
在进行补偿电流的配置过程中，仍可根据上述线性度补偿模块中多个跨导单元对于补偿信号的计算方式进行补偿信号的获取，在此不再赘述。
相应的，在根据上述方式确定补偿电流后，本可选实施例中在确定跨导单元的组合以进行配置时仍可采用上述实施例中的方式，例如：
枚举法：将线性度补偿模块中的多个跨导单元以及跨导单元中多个跨导子单元可能的组合进行依次排列，将第一配置信号和/或第二配置信号代入至上述每一个组合中，遍历所有可能组合，依次尝试不同跨导单元以及跨导单元中不同跨导子单元的组合下所输出的补偿信号，从而获取其中线性度补偿效果最好的对应组合以作为线性度补偿模块中的多个跨导单元以及跨导单元中多个跨导子单元组合的实际配置。
查找法：预先对模拟模块对应的不同配置信号进行测试，以获取每一种配置信号下需对应的补偿信号，并以此确认该补偿信号对应的跨导单元以及跨导单元中多个跨导子单元的组合；在实际模拟电路的补偿处理中，线性度补偿模块在获取第一配置信号以及第二配置信号后，即可根据上述配置信号与跨导单元的组合之间的对应关系以确定当前配置信号所对应的跨导单元的组合，并以此进行配置。
上述可选实施例中跨导单元的构成，可令线性度补偿模块在根据第一配置信号和/或第二配置信号进行配置过程中，由于多个配置维度的设置，进而可配置的适用性得以改善，以令线性度补偿模块对于不同模拟模块对应的线性度补偿的有效性及可靠性得到显著地增加。
在一可选实施例中，跨导子单元包括跨导管以及偏置管，其中，跨导管的栅极配置为获取第一配置信号和/或第二配置信号，跨导管的漏极配置为向偏置管的源极提供信号；偏置管的栅极配置为获取偏置信号，偏置管的漏极配置为提供补偿信号；跨导管与偏置管均采用PMOS管，或者，跨导管与偏置管均采用NOMS管。
上述跨导管与偏置管构成共源共栅型跨导子单元，该共源共栅型跨导子单元的内部构造仍如图5或图6所示，如图5所示，跨导管Ma与偏置管Mb均采用NMOS管，跨导管Ma的栅极作为跨导子单元的输入端，用以获取第一配置信号或第二配置信号，跨导管Ma的漏极配置为向偏置管Mb的源极提供信号，跨导管Ma的源极配置为获取接地信号；偏置管Mb的栅极配置为获取偏置信号V b，偏置管Mb的漏极配置为提供补偿信号；上述偏置管Mb的栅极获取的偏置信号V b可以由直流偏置模块提供，该直流偏置模块可以由模拟模块提供，即将模拟模块中的过程信号作为偏置信号提供至偏置管，也可以采用独立设置的直流偏置模块，即针对偏置管的偏置信号单独提供一个电路模块，本申请对此不作限定。如图6所示，跨导管Ma与偏置管Mb均采用PMOS管，在该情形下，跨导管Ma与偏置管Mb之间的连接方式与跨导管Ma与偏置管Mb采用NMOS管的情形下相同，在此不再赘述。
上述可选实施例中的共源共栅型跨导子单元的工作原理与实施例1中的共 源共栅型跨导子单元的工作原理相同，在此不再赘述。
在一可选实施例中，跨导子单元包括输入端、输出端，以及设置在输入端与输出端之间的电流镜，其中，输出端配置为提供补偿信号；输入端包括PMOS管以及NMOS管，其中，PMOS管的源极与NMOS管的源极相连接，PMOS管的源极以及NMOS管的源极配置为获取第一配置信号和/或第二配置信号，PMOS管的栅极配置为获取第一偏置信号，NMOS管的栅极配置为获取第二偏置信号，PMOS管的漏极以及NMOS管的漏极配置为向电流镜提供信号。
上述跨导管与偏置管构成共栅型跨导子单元，该共栅型跨导子单元的内部构造仍如图7所示，如图7所示，共栅型跨导子单元的输入端包括两个输入管Mp与Mn，其中输入管Mp采用PMOS管，输入管Mn采用NMOS管，输入管Mp的源极与输入管Mn的源极相连接，并同时用于接入输入信号，即本实施例中的第一配置信号或第二配置信号；输入管Mp的栅极以及输入管Mn的栅极分别用于连接偏置信号，其中，输入管Mp的栅极用于获取第一偏置信号V bn，输入管Mn的栅极用于获取第二偏置信号V bp，输入管Mp以及输入管Mn的漏极分别连接至对应的电流镜模块，并经由电流镜模块后进行输出。
上述可选实施例中的共栅型跨导子单元的工作原理与实施例1中的共栅型跨导子单元的工作原理相同，在此不再赘述。
在一可选实施例中，每一个跨导单元中的多个跨导子单元配置为采用不同尺寸的PMOS管和/或NMOS管。
在一可选实施例中，第一配置信号包括：输入信号、输出信号，以及模拟模块中输入节点与输出节点之间任意位置的过程信号。
第一配置信号还可以是上述输入信号、输出信号以及过程信号之间的组合，本申请对此不作限定。
在一可选实施例中，第一配置信号为输入信号的情形下，多个跨导单元配置为，每一个跨导单元获取一个输入节点的输入信号。上述跨导单元即可与第一配置信号的数量相对应，以确保跨导单元可对于每一路输入信号中的非线性分量进行补偿。
实施例5
本实施例还提供了一种补偿芯片，包括上述实施例4以及实施例4对应的可选实施例中的补偿电路；本实施例中的补偿芯片中的补偿电路的技术方案与实施例4中的补偿电路对应，在此不再赘述。
实施例6
本实施例还提供了一种补偿方法，用于向模拟模块提供补偿信号，模拟模块包括输入节点、输出节点；图12是根据本发明实施例提供的补偿方法的流程图(二)，如图12所示，该补偿方法包括：
S602，检测模块检测模拟模块的工作信息，并根据工作信息提供第二配置信号；
S604，线性度补偿模块获取第一配置信号以及第二配置信号，并根据第一配置信号和/或第二配置信号向输出节点提供补偿信号，其中，第一配置信号用于指示模拟模块中任意位置的信号。
通过本实施例中的补偿方法，由于可以检测模拟模块的工作信息，并根据工作信息提供第二配置信号，以根据上述第二配置信号以及模拟模块提供的第一配置信号进行补偿信号的获取并提供至模拟模块的输出节点进行线性度补偿；因此，上述补偿方法可以解决相关技术中线性度补偿过程中对非线性来源和影响因素考虑并不全面而导致的线性度补偿偏差较大的问题，以提高线性度补偿技术的可靠性。
在一可选实施例中，工作信息包括以下至少之一：工艺信息、电压信息、温度信息、频率信息；第二配置信息包括以下至少之一：工艺配置信号、电压配置信号、温度配置信号、频率配置信号。
上述工作信息以及第二配置信号的技术意义以及获取方式均与实施例4中对应，在此不再赘述。
在一可选实施例中，上述补偿方法还包括：在第m周期获取第一配置信号和/或第二配置信号，并根据第一配置信号和/或第二配置信号提供第m补偿信号；在第m+1周期获取第一配置信号以及第二配置信号，并根据第一配置信号以及第二配置信号提供第m+1补偿信号；在第m+1补偿信号与第m补偿信号之间的数值差值在预设范围内时，向输出节点提供第m补偿信号。
上述m为整数，m的赋值仅用于表达模拟模块工作中的某一个周期，即模拟模块工作的任意周期均可采用上述可选实施例中的技术方案；m+1用于表示第m周期的下一个周期，例如第m周期为第0周期时，第m+1周期则为第1周期。本可选实施例中对于m的赋值不进行限制，即在第m周期为第0周期，第m+1周期为第1周期时，可重新对m赋值为1，即第m周期为第1周期，第m+1周期为第2周期，以此用于表达本可选实施例中的技术方案可按模拟模块的工作周期进行循环执行。
以下以m为0的情形进行阐述：
在第0周期，即模拟模块初始工作阶段，线性度补偿模块根据步骤S604获 取模拟模块中的输入信号或输出信号等作为第一配置信号，并根据该第一配置信号进行补偿信号的计算，补偿信号的计算方式如上述实施例中所述，在此不再赘述，此时，将提供的补偿信号作为第0补偿信号，该第0补偿信号即为线性度补偿模块的提供的补偿信号的初值。
在第1周期，即模拟模块已经处于稳定工作状态，检测模块即可根据步骤S602检测到模拟模块的工作信息，例如工艺信息、电压信息、温度信息、频率信息等，并以此通过编码、封装等方式得到对应的第二配置信号，如工艺配置信号、电压配置信号、温度配置信号、频率配置信号，并将该第二配置信号提供至线性度补偿模块。线性度补偿模块再次根据步骤S604，根据模拟模块提供的第1周期的第一配置信号连同上述第二配置信号重新进行补偿信号的计算，此时，将该补偿信号作为第1补偿信号。
在获取第1补偿信号的前提下，可将该第1补偿信号与第0补偿信号之间进行比较，即判断第1补偿信号与第0补偿信号之间的数值差值是否在预设范围内。第1补偿信号与第0补偿信号之间的数值差值可以理解为第1周期与第0周期线性度补偿模块提供的补偿信号之间的误差，在第1补偿信号与第0补偿信号之间的数值差值在预设范围内时，即该误差可以接受，模拟模块的工作信息在第1周期对于模拟模块的线性度的影响较于第0周期在可控范围内，因此，线性度补偿模块在第0周期所提供的第0补偿信号即可作为稳态补偿信号，模拟模块即可根据该第0补偿信号进行有效的线性度补偿。
反之，在第1补偿信号与第0补偿信号之间的数值差值在预设范围外时，即模拟模块的工作信息在第1周期对于模拟模块的线性度形成的影响较大，如若仍以第0补偿信号对模拟模块的输出信号进行线性度补偿即无法实现有效的线性度补偿，故需重新进行补偿信号的提供。
上述情形下，即可将m赋值为1，以第m周期为第1周期的情况下重新进行上述过程，在第1周期线性度补偿模块以及获取第1补偿信号的情况下，在第m+1周期，即第2周期，检测模块重新检测模拟模块的工作信息，并根据重新检测的工作信息得到新的第二配置信号以提供至线性度补偿模块。
第2周期中，线性度补偿模块根据当前周期的第一配置信号与第二配置信号重新计算补偿信号，将该补偿信号作为第2补偿信号。同样的，在获取第2补偿信号的前提下，可将该第2补偿信号与第1补偿信号之间进行比较，即判断第2补偿信号与第1补偿信号之间的数值差值是否在预设范围内。在上述第2补偿信号与第1补偿信号之间的数值差值在预设范围内时，即模拟模块的工作信息在第2周期对于模拟模块的线性度的影响较于第1周期在可控范围内，因此，线性度补偿模块在第1周期所提供的第1补偿信号即可作为稳态补偿信号， 模拟模块即可根据该第1补偿信号进行有效的线性度补偿。
相应的，如若第2周期的第2补偿信号与第1补偿信号之间的数值差值仍在预设范围外，则对m进行重新赋值为3，并在第3周期计算的第3补偿信号与第2补偿信号进行比较，重复上述过程。以此类推，直至在第m+1补偿信号与第m补偿信号之间的数值差值在预设范围内时，线性度补偿模块即可将第m补偿信号提供至模拟模块的输出节点进行线性度补偿。上述过程可称为线性度补偿模块的迭代过程，通过该迭代过程，即可令线性度补偿模块提供至模拟模块的输出节点的补偿信号可对于模拟模块当前周期进行有效且可靠的线性度补偿。
上述技术方案在本实施例引入模拟模块的工作信息进行补偿信号的提供的基础上，可确保补偿信号在当前周期内提供有效的线性度补偿，从而令模拟模块的线性度补偿的可靠性得到进一步的提升。
在一可选实施例中，上述补偿方法还包括：在第n周期检测至模拟模块的工作信息产生变化时，根据变化后的工作信息重新提供第二配置信号；在第n周期获取第一配置信号以及第二配置信号，并根据第一配置信号以及第二配置信号提供第n补偿信号；在第n+1周期获取第一配置信号以及第二配置信号，并根据第一配置信号以及第二配置信号提供第n+1补偿信号；在第n+1补偿信号与第n补偿信号之间的数值差值在预设范围内时，向输出节点提供第n补偿信号。
上述n为整数，n的赋值仅用于表达模拟模块工作中的一个周期，即模拟模块工作的任意周期均可采用上述可选实施例中的技术方案；n+1用于表示第n周期的下一个周期，例如第n周期为第2周期时，第n+1周期则为第3周期。本可选实施例中对于n的赋值不进行限制，即在第n周期为第2周期，第n+1周期为第3周期时，可重新对n赋值为3，即第n周期为第3周期，第n+1周期为第4周期，以此用于表达本可选实施例中的技术方案可按模拟模块的工作周期进行循环执行。
以下以n为5的情形进行阐述：
在第5周期，步骤S602检测至模拟模块的工作信息产生变化，根据变化后的工作信息重新获取第二配置信号并将其提供至线性度检测模块。线性度检测模块在第5周期内获取到根据变化后的工作信号重新获取的第二配置信号后，即在第5周期重新根据当前周期下的第一配置信号以及当前周期下的第二配置信号以进行补偿信号的计算，补偿信号的计算方式如上述实施例中所述，在此不再赘述，此时；将计算的补偿信号作为第5补偿信号，该第5补偿信号即为模拟模块的工作信息变化后，线性度补偿模块的提供的补偿信号的初值。
在第6周期，即模拟模块已经在工作信息变化后重新处于稳定工作状态，检测模块即可根据第6周期内对应的模拟模块的工作信息获取第二配置信号并提供至线性度检测模块，线性度检测模块根据第6周期的模拟模块的第一配置信号连同上述第二配置信号重新进行补偿信号的计算，此时，将该补偿信号作为第6补偿信号。
在获取第6补偿信号的前提下，可将该第6补偿信号与第5补偿信号之间进行比较，即判断第6补偿信号与第5补偿信号之间的数值差值是否在预设范围内。第6补偿信号与第5补偿信号之间的数值差值可以理解为第6周期与第5周期线性度补偿模块提供的补偿信号之间的误差，在第6补偿信号与第5补偿信号之间的数值差值在预设范围内时，即该误差可以接受，模拟模块的工作信息的变化在第6周期对于模拟模块的线性度的影响较于第5周期在可控范围内，因此，线性度补偿模块在第5周期所提供的第5补偿信号即可作为稳态补偿信号，模拟模块即可根据该第5补偿信号进行有效的线性度补偿。
反之，在第6补偿信号与第5补偿信号之间的数值差值在预设范围外时，即模拟模块的工作信息的变化在第6周期对于模拟模块的线性度形成的影响较大，如若仍以第5补偿信号对模拟模块的输出信号进行线性度补偿即无法实现有效的线性度补偿，故需重新进行补偿信号的提供。
上述情形下，即可将n赋值为6，以第n周期为第6周期的情况下重新进行上述过程，在第6周期线性度补偿模块以及获取第6补偿信号的情况下，在第n+1周期，即第7周期，检测模块重新检测模拟模块的工作信息，并根据重新检测的工作信息得到新的第二配置信号以提供至线性度补偿模块。
第7周期中，线性度补偿模块根据当前周期的第一配置信号与第二配置信号重新计算补偿信号，将该补偿信号作为第7补偿信号。同样的，在获取第7补偿信号的前提下，可将该第7补偿信号与第6补偿信号之间进行比较，即判断第7补偿信号与第6补偿信号之间的数值差值是否在预设范围内。在上述第7补偿信号与第6补偿信号之间的数值差值在预设范围内时，即模拟模块的工作信号在第7周期对于模拟模块的线性度的影响较于第6周期在可控范围内，因此，线性度补偿模块在第6周期所提供的第6补偿信号即可作为稳态补偿信号，模拟模块即可根据该第6补偿信号进行有效的线性度补偿。
相应的，如若第7周期的第7补偿信号与第6补偿信号之间的数值差值仍在预设范围外，则对n进行重新赋值为8，并在第8周期计算的第8补偿信号与第7补偿信号进行比较，重复上述过程。以此类推，直至在第n+1补偿信号与第n补偿信号之间的数值差值在预设范围内时，线性度补偿模块即可将第n补偿信号提供至模拟模块的输出节点进行线性度补偿。
上述技术方案在线性度补偿模块通过迭代对于模拟模块当前周期进行有效的线性度补偿的基础上，令模拟模块对应的工作信息每一次产生变化时，均可及时调整对应的补偿信号，以令线性度补偿模块提供至模拟模块的输出节点的补偿信号可对于模拟模块在工作信息变化后进行更为可靠的线性度补偿，进而保证线性度补偿效果不因参数波动和模式改变而出现减弱。
本实施例中补偿方法的其余技术方案与实施例4以及实施例4对应的可选实施例中的补偿电路的技术方案相对应，故在此不再赘述。
通过以上的实施方式的描述，本领域的技术人员可以了解到根据上述实施例的方法可借助软件加通用硬件平台的方式来实现，当然也可以通过硬件来实现。基于这样的理解，本申请的技术方案可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质(如ROM/RAM、磁碟、光盘)中，包括多个指令用以使得一台终端设备(可以是手机，计算机，服务器，或者网络设备等)执行本发明各个实施例所述的方法。
实施例7
本实施例还提供了一种补偿装置，配置为向模拟模块提供补偿信号，模拟模块包括输入节点以及输出节点，该装置用于实现上述实施例3及可选实施方式，已经进行过说明的不再赘述。如以下所使用的，术语“模块”可以实现预定功能的软件和/或硬件的组合。尽管以下实施例所描述的装置可以软件来实现，但是硬件，或者软件和硬件的组合的实现也是可能并被构想的。图13是根据本发明实施例提供的补偿装置的结构框图(一)，如图13所示，该补偿装置包括：
第一补偿模块701，配置为获取第一配置信号，并根据第一配置信号配置多个跨导单元的组合，以向输出节点提供补偿信号；其中，第一配置信号用于指示模拟模块中任意位置的信号。
通过本实施例中的补偿装置，由于可根据获取的第一配置信号配置所述多个跨导单元的组合，以向模拟模块中的输出节点提供补偿信号；其中，所述第一配置信号用于指示所述模拟模块中任意位置的信号；因此，上述补偿方法可以解决相关技术中线性度补偿过程中对非线性来源和影响因素考虑并不全面而导致的线性度补偿偏差较大的问题，以提高线性度补偿技术的可靠性。
本实施例中的补偿装置的其余方案与实施例3中的补偿方法对应，在此不再赘述。
需要说明的是，上述多个模块是可以通过软件或硬件来实现的，对于后者，可以通过以下方式实现，但不限于此：上述模块均位于同一处理器中；或者，上述多个模块以任意组合的形式分别位于不同的处理器中。
实施例8
本实施例还提供了一种补偿装置，配置为向模拟模块提供补偿信号，模拟模块包括输入节点以及输出节点，该装置用于实现上述实施例6及可选实施方式，已经进行过说明的不再赘述。如以下所使用的，术语“模块”可以实现预定功能的软件和/或硬件的组合。尽管以下实施例所描述的装置可以软件来实现，但是硬件，或者软件和硬件的组合的实现也是可能并被构想的。图14是根据本发明实施例提供的补偿装置的结构框图(二)，如图14所示，该补偿装置包括：提供模块801，配置为检测模拟模块的工作信息，并根据工作信息提供第二配置信号；第二补偿模块802，配置为获取第一配置信号以及第二配置信号，并根据第一配置信号和/或第二配置信号向输出节点提供补偿信号，其中，第一配置信号用于指示模拟模块中任意位置的信号。
通过本实施例中的补偿装置，由于可以检测模拟模块的工作信息，并根据工作信息提供第二配置信号，以根据上述第二配置信号以及模拟模块提供的第一配置信号进行补偿信号的获取并提供至模拟模块的输出节点进行线性度补偿；因此，上述补偿电路可以解决相关技术中线性度补偿过程中对非线性来源和影响因素考虑并不全面而导致的线性度补偿偏差较大的问题，以提高线性度补偿技术的可靠性。
在一可选实施例中，工作信息包括以下至少之一：工艺信息、电压信息、温度信息、频率信息；第二配置信息包括以下至少之一：工艺配置信号、电压配置信号、温度配置信号、频率配置信号。
在一可选实施例中，上述补偿方法还包括：在第m周期获取第一配置信号和/或第二配置信号，并根据第一配置信号和/或第二配置信号提供第m补偿信号；在第m+1周期获取第一配置信号以及第二配置信号，并根据第一配置信号以及第二配置信号提供第m+1补偿信号；在第m+1补偿信号与第m补偿信号之间的数值差值在预设范围内时，向输出节点提供第m补偿信号。
在一可选实施例中，上述补偿方法还包括：在第n周期检测至模拟模块的工作信息产生变化时，根据变化后的工作信息重新提供第二配置信号；在第n周期获取第一配置信号以及第二配置信号，并根据第一配置信号以及第二配置信号提供第n补偿信号；在第n+1周期获取第一配置信号以及第二配置信号，并根据第一配置信号以及第二配置信号提供第n+1补偿信号；在第n+1补偿信号与第n补偿信号之间的数值差值在预设范围内时，向输出节点提供第n补偿信号。
本实施例中的补偿装置的其余方案与实施例6中的补偿方法对应，在此不再赘述。
上述多个模块是可以通过软件或硬件来实现的，对于后者，可以通过以下方式实现，但不限于此：上述模块均位于同一处理器中；或者，上述多个模块以任意组合的形式分别位于不同的处理器中。
实施例9
本申请的实施例还提供了一种存储介质，该存储介质中存储有计算机程序，其中，该计算机程序被设置为运行时执行上述任一项方法实施例中的步骤。
可选地，在本实施例中，上述存储介质可以被设置为存储用于执行以下步骤的计算机程序：
S1，获取第一配置信号，并根据第一配置信号配置多个跨导单元的组合，以向输出节点提供补偿信号；其中，第一配置信号用于指示模拟模块中任意位置的信号。
可选地，在本实施例中，上述存储介质可以包括但不限于：U盘、只读存储器(Read-Only Memory，简称为ROM)、随机存取存储器(Random Access Memory，简称为RAM)、移动硬盘、磁碟或者光盘等多种可以存储计算机程序的介质。
实施例10
本申请的实施例还提供了一种存储介质，该存储介质中存储有计算机程序，其中，该计算机程序被设置为运行时执行上述任一项方法实施例中的步骤。
可选地，在本实施例中，上述存储介质可以被设置为存储用于执行以下步骤的计算机程序：
S1，检测模拟模块的工作信息，并根据工作信息提供第二配置信号。
S2，获取第一配置信号以及第二配置信号，并根据第一配置信号和/或第二配置信号向输出节点提供补偿信号，其中，第一配置信号用于指示模拟模块中任意位置的信号。
可选地，在本实施例中，上述存储介质可以包括但不限于：U盘、ROM、RAM、移动硬盘、磁碟或者光盘等多种可以存储计算机程序的介质。
实施例11
本申请的实施例还提供了一种电子装置，包括存储器和处理器，该存储器中存储有计算机程序，该处理器被设置为运行计算机程序以执行上述任一项方法实施例中的步骤。
可选地，上述电子装置还可以包括传输设备以及输入输出设备，其中，该传输设备和上述处理器连接，该输入输出设备和上述处理器连接。
可选地，在本实施例中，上述处理器可以被设置为通过计算机程序执行以下步骤：
S1，获取第一配置信号，并根据第一配置信号配置多个跨导单元的组合，以向输出节点提供补偿信号；其中，第一配置信号用于指示模拟模块中任意位置的信号。
可选地，本实施例中的具体示例可以参考上述实施例及可选实施方式中所描述的示例，本实施例在此不再赘述。
实施例12
本申请的实施例还提供了一种电子装置，包括存储器和处理器，该存储器中存储有计算机程序，该处理器被设置为运行计算机程序以执行上述任一项方法实施例中的步骤。
可选地，上述电子装置还可以包括传输设备以及输入输出设备，其中，该传输设备和上述处理器连接，该输入输出设备和上述处理器连接。
可选地，在本实施例中，上述处理器可以被设置为通过计算机程序执行以下步骤：
S1，检测模拟模块的工作信息，并根据工作信息提供第二配置信号；
S2，获取第一配置信号以及第二配置信号，并根据第一配置信号和/或第二配置信号向输出节点提供补偿信号，其中，第一配置信号用于指示模拟模块中任意位置的信号。
可选地，本实施例中的具体示例可以参考上述实施例及可选实施方式中所描述的示例，本实施例在此不再赘述。
本领域的技术人员应该明白，上述的本申请的多个模块或多个步骤可以用通用的计算装置来实现，它们可以集中在单个的计算装置上，或者分布在多个计算装置所组成的网络上，可选地，它们可以用计算装置可执行的程序代码来实现，从而，可以将它们存储在存储装置中由计算装置来执行，并且在某些情况下，可以以不同于此处的顺序执行所示出或描述的步骤，或者将它们分别制作成多个集成电路模块，或者将它们中的多个模块或步骤制作成单个集成电路模块来实现。这样，本申请不限制于任何特定的硬件和软件结合。

Claims (31)

  1. 一种补偿电路，包括：
    模拟模块，包括输入节点和输出节点；其中，所述输入节点配置为接收输入信号，所述输出节点配置为输出输出信号；
    线性度补偿模块，包括多个跨导单元，其中，所述多个跨导单元配置为，获取第一配置信号，并根据所述第一配置信号配置所述多个跨导单元的组合，以向所述输出节点提供补偿信号；所述第一配置信号用于指示所述模拟模块中任意位置的信号。
  2. 根据权利要求1所述的电路，其中，每一个所述跨导单元包括相互并接的多个跨导子单元；
    其中，所述多个跨导单元与所述多个跨导子单元配置为，获取所述第一配置信号，并根据所述第一配置信号配置所述多个跨导单元的组合以及所述跨导单元中的所述多个跨导子单元的组合，以向所述输出节点提供所述补偿信号。
  3. 根据权利要求2所述的电路，其中，所述跨导子单元包括跨导管以及偏置管，其中，所述跨导管的栅极配置为获取所述第一配置信号，所述跨导管的漏极配置为向所述偏置管的源极提供信号；所述偏置管的栅极配置为获取偏置信号，所述偏置管的漏极配置为提供所述补偿信号；
    所述跨导管与所述偏置管均采用PMOS管，或者，所述跨导管与所述偏置管均采用NOMS管。
  4. 根据权利要求2所述的电路，其中，所述跨导子单元包括输入端、输出端，以及设置在所述输入端与所述输出端之间的电流镜，其中，所述输出端配置为提供所述补偿信号；
    所述输入端包括PMOS管以及NMOS管，其中，所述PMOS管的源极与所述NMOS管的源极相连接，所述PMOS管的源极以及所述NMOS管的源极配置为获取所述第一配置信号，所述PMOS管的栅极配置为获取第一偏置信号，所述NMOS管的栅极配置为获取第二偏置信号，所述PMOS管的漏极以及所述NMOS管的漏极配置为向电流镜提供信号。
  5. 根据权利要求3所述的电路，其中，每一个所述跨导单元中的所述多个跨导子单元配置为采用不同尺寸的PMOS管；或者，每一个所述跨导单元中的所述多个跨导子单元配置为采用不同尺寸的NMOS管。
  6. 根据权利要求4所述电路，其中，每一个所述跨导单元中的所述多个跨导子单元配置为采用不同尺寸的PMOS管；或者，每一个所述跨导单元中的所述多个跨导子单元配置为采用不同尺寸的NMOS管；或者，每一个所述跨导单 元中的所述多个跨导子单元配置为采用不同尺寸的PMOS管以及采用不同尺寸的NMOS管。
  7. 根据权利要求1至4任一项所述的电路，其中，所述第一配置信号包括：所述输入信号、所述输出信号，以及所述模拟模块中所述输入节点与所述输出节点之间任意位置的过程信号。
  8. 根据权利要求7所述的电路，其中，所述第一配置信号为所述输入信号的情形下，所述多个跨导单元配置为通过如下方式获取第一配置信号；每一个所述跨导单元获取一个所述输入节点的输入信号。
  9. 一种补偿芯片，包括如权利要求1至8任一项所述的补偿电路。
  10. 一种补偿方法，用于向模拟模块提供补偿信号，所述模拟模块包括输入节点和输出节点；所述方法包括：
    获取第一配置信号，并根据所述第一配置信号配置多个跨导单元的组合，以向所述输出节点提供所述补偿信号；其中，所述第一配置信号用于指示所述模拟模块中任意位置的信号。
  11. 一种补偿电路，包括：
    模拟模块，包括输入节点和输出节点，其中，所述输入节点配置为接收输入信号，所述输出节点配置为输出输出信号；
    检测模块，配置为检测所述模拟模块的工作信息，并根据所述工作信息提供第二配置信号；
    线性度补偿模块，配置为获取第一配置信号以及所述第二配置信号，并根据所述第一配置信号和所述第二配置信号中的至少之一向所述输出节点提供补偿信号，其中，所述第一配置信号用于指示所述模拟模块中任意位置的信号。
  12. 根据权利要求11所述的电路，其中，所述工作信息包括以下至少之一：工艺信息、电压信息、温度信息、频率信息；所述第二配置信号包括以下至少之一：工艺配置信号、电压配置信号、温度配置信号、频率配置信号。
  13. 根据权利要求11所述的电路，其中，所述线性度补偿模块配置为：
    在第m周期获取目标配置信号，并根据所述目标配置信号提供第m补偿信号，其中所述目标配置信号包括所述第一配置信号和所述第二配置信号中的至少之一，m为非负整数；
    在第m+1周期获取所述第一配置信号以及所述第二配置信号，并根据所述第一配置信号以及所述第二配置信号提供第m+1补偿信号；
    在所述第m+1补偿信号与所述第m补偿信号之间的数值差值在预设范围内 的情况下，向所述输出节点提供所述第m补偿信号。
  14. 根据权利要求13所述的电路，其中，所述检测模块还配置为：
    在第n周期检测到所述模拟模块的所述工作信息产生变化的情况下，根据变化后的所述工作信息重新向所述线性度补偿模块提供所述第二配置信号；其中，n为非负整数；
    所述线性度补偿模块还配置为：
    在第n周期获取所述第一配置信号以及所述第二配置信号，并根据所述第一配置信号以及所述第二配置信号提供第n补偿信号；
    在第n+1周期获取所述第一配置信号以及所述第二配置信号，并根据所述第一配置信号以及所述第二配置信号提供第n+1补偿信号；
    在所述第n+1补偿信号与所述第n补偿信号之间的数值差值在预设范围内的情况下，向所述输出节点提供所述第n补偿信号。
  15. 根据权利要求11所述的电路，其中，所述线性度补偿模块包括多个跨导单元；
    其中，所述多个跨导单元配置为，获取所述第一配置信号以及所述第二配置信号，并根据所述第一配置信号和所述第二配置信号中的至少之一配置所述多个跨导单元的组合，以向所述输出节点提供所述补偿信号。
  16. 根据权利要求15所述的电路，其中，每一个所述跨导单元包括相互并接的多个跨导子单元；
    其中，所述多个跨导单元与所述多个跨导子单元配置为，获取所述第一配置信号以及所述第二配置信号，并根据所述第一配置信号和所述第二配置信号中的至少之一配置所述多个跨导单元的组合以及所述跨导单元中的所述多个跨导子单元的组合，以向所述输出节点提供所述补偿信号。
  17. 根据权利要求16所述的电路，其中，所述跨导子单元包括跨导管以及偏置管，其中，所述跨导管的栅极配置为获取所述第一配置信号和所述第二配置信号中的至少之一，所述跨导管的漏极配置为向所述偏置管的源极提供信号；所述偏置管的栅极配置为获取偏置信号，所述偏置管的漏极配置为提供所述补偿信号；
    所述跨导管与所述偏置管均采用PMOS管，或者，所述跨导管与所述偏置管均采用NOMS管。
  18. 根据权利要求16所述的电路，其中，所述跨导子单元包括输入端、输出端，以及设置在所述输入端与所述输出端之间的电流镜，其中，所述输出 端配置为提供所述补偿信号；
    所述输入端包括PMOS管以及NMOS管，其中，所述PMOS管的源极与所述NMOS管的源极相连接，所述PMOS管的源极以及所述NMOS管的源极配置为获取所述第一配置信号和所述第二配置信号中的至少之一，所述PMOS管的栅极配置为获取第一偏置信号，所述NMOS管的栅极配置为获取第二偏置信号，所述PMOS管的漏极以及所述NMOS管的漏极配置为向电流镜提供信号。
  19. 根据权利要求17所述的电路，其中，每一个所述跨导单元中的所述多个跨导子单元配置为采用不同尺寸的PMOS管；或者，每一个所述跨导单元中的所述多个跨导子单元配置为采用不同尺寸的NMOS管。
  20. 根据权利要求18所述电路，其中，每一个所述跨导单元中的所述多个跨导子单元配置为采用不同尺寸的PMOS管；或者，每一个所述跨导单元中的所述多个跨导子单元配置为采用不同尺寸的NMOS管；或者，每一个所述跨导单元中的所述多个跨导子单元配置为采用不同尺寸的PMOS管以及采用不同尺寸的NMOS管。
  21. 根据权利要求11至18任一项所述的电路，其中，所述第一配置信号包括：所述输入信号、所述输出信号，以及所述模拟模块中所述输入节点与所述输出节点之间任意位置的过程信号。
  22. 根据权利要求21所述的电路，其中，所述第一配置信号为所述输入信号的情形下，所述多个跨导单元配置为通过如下方式获取第一配置信号；每一个所述跨导单元获取一个所述输入节点的输入信号。
  23. 一种补偿芯片，包括如权利要求11至22任一项所述的补偿电路。
  24. 一种补偿方法，用于向模拟模块提供补偿信号，所述模拟模块包括输入节点和输出节点；所述方法包括：
    检测所述模拟模块的工作信息，并根据所述工作信息提供第二配置信号；
    获取第一配置信号以及所述第二配置信号，并根据所述第一配置信号和所述第二配置信号中的至少之一向所述输出节点提供补偿信号，其中，所述第一配置信号用于指示所述模拟模块中任意位置的信号。
  25. 根据权利要求24所述的方法，其中，所述工作信息包括以下至少之一：工艺信息、电压信息、温度信息、频率信息；所述第二配置信号包括以下至少之一：工艺配置信号、电压配置信号、温度配置信号、频率配置信号。
  26. 根据权利要求24所述的方法，还包括：
    在第m周期获取目标配置信号，并根据所述目标配置信号提供第m补偿信 号，其中，所述目标配置信号包括所述第一配置信号和所述第二配置信号中的至少之一，m为非负整数；
    在第m+1周期获取所述第一配置信号以及所述第二配置信号，并根据所述第一配置信号以及所述第二配置信号提供第m+1补偿信号；
    在所述第m+1补偿信号与所述第m补偿信号之间的数值差值在预设范围内的情况下，向所述输出节点提供所述第m补偿信号。
  27. 根据权利要求24所述的方法，还包括：
    在第n周期检测到所述模拟模块的所述工作信息产生变化的情况下，根据变化后的所述工作信息重新提供所述第二配置信号；其中，n为非负整数；
    在第n周期获取所述第一配置信号以及所述第二配置信号，并根据所述第一配置信号以及所述第二配置信号提供第n补偿信号；
    在第n+1周期获取所述第一配置信号以及所述第二配置信号，并根据所述第一配置信号以及所述第二配置信号提供第n+1补偿信号；
    在所述第n+1补偿信号与所述第n补偿信号之间的数值差值在预设范围内的情况下，向所述输出节点提供所述第n补偿信号。
  28. 一种补偿装置，配置为向模拟模块提供补偿信号，所述模拟模块包括输入节点和输出节点；所述装置包括：
    补偿模块，配置为获取第一配置信号，并根据所述第一配置信号配置多个跨导单元的组合，以向所述输出节点提供所述补偿信号；其中，所述第一配置信号用于指示所述模拟模块中任意位置的信号。
  29. 一种补偿装置，配置为向模拟模块提供补偿信号，所述模拟模块包括输入节点、输出节点；所述装置包括：
    提供模块，配置为检测所述模拟模块的工作信息，并根据所述工作信息提供第二配置信号；
    补偿模块，配置为获取第一配置信号以及所述第二配置信号，并根据所述第一配置信号和所述第二配置信号中的至少之一向所述输出节点提供所述补偿信号，其中，所述第一配置信号用于指示所述模拟模块中任意位置的信号。
  30. 一种存储介质，存储有计算机程序，所述计算机程序被设置为运行时执行所述权利要求10、权利要求24至27任一项所述的方法。
  31. 一种电子装置，包括存储器和处理器，所述存储器中存储有计算机程序，所述处理器被设置为运行所述计算机程序以执行所述权利要求10、权利要求24至27任一项所述的方法。
PCT/CN2020/111361 2019-08-30 2020-08-26 补偿电路及芯片、方法、装置、存储介质、电子装置 WO2021037054A1 (zh)

Priority Applications (4)

Application Number Priority Date Filing Date Title
EP20858148.8A EP3955458A4 (en) 2019-08-30 2020-08-26 Compensation circuit and chip, method, apparatus, storage medium, and electronic device
KR1020217036205A KR102639945B1 (ko) 2019-08-30 2020-08-26 보상 회로 및 칩, 방법, 장치, 저장 매체, 전자장치
US17/638,498 US20220393649A1 (en) 2019-08-30 2020-08-26 Compensation circuit and chip, method, apparatus, storage medium, and electronic device
JP2021565829A JP7340623B2 (ja) 2019-08-30 2020-08-26 補償回路及びチップ、方法、装置、記憶媒体、電子装置

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201910817751.5A CN112448678A (zh) 2019-08-30 2019-08-30 补偿电路及芯片、方法、装置、存储介质、电子装置
CN201910817751.5 2019-08-30

Publications (1)

Publication Number Publication Date
WO2021037054A1 true WO2021037054A1 (zh) 2021-03-04

Family

ID=74684212

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2020/111361 WO2021037054A1 (zh) 2019-08-30 2020-08-26 补偿电路及芯片、方法、装置、存储介质、电子装置

Country Status (6)

Country Link
US (1) US20220393649A1 (zh)
EP (1) EP3955458A4 (zh)
JP (1) JP7340623B2 (zh)
KR (1) KR102639945B1 (zh)
CN (1) CN112448678A (zh)
WO (1) WO2021037054A1 (zh)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11747224B1 (en) * 2022-02-10 2023-09-05 Ati Industrial Automation, Inc. Quarter-bridge temperature compensation for force/torque sensor
KR20240071213A (ko) * 2022-11-15 2024-05-22 서울대학교산학협력단 회로 설계 방법 및 장치

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6188281B1 (en) * 1998-09-30 2001-02-13 Maxim Integrated Products, Inc. Linear transconductance circuits having class AB amplifiers parallel coupled with concave compensation circuits
CN104348419A (zh) * 2014-11-17 2015-02-11 中国科学院微电子研究所 一种跨导级线性度提高电路及应用其的混频器电路
CN105811889A (zh) * 2016-04-20 2016-07-27 佛山臻智微芯科技有限公司 一种前馈补偿式跨导运算放大器
CN107370461A (zh) * 2017-07-17 2017-11-21 电子科技大学 一种应用于跨阻放大器的补偿结构

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3167755B2 (ja) * 1991-11-13 2001-05-21 株式会社東芝 差動増幅器
KR960027254A (ko) * 1994-12-29 1996-07-22 조백제 선형성이 양호한 오퍼레이션널 트랜스콘덕턴스 증폭기
JPH11103218A (ja) * 1997-09-26 1999-04-13 Japan Radio Co Ltd フィードフォワード型増幅器
US7002410B2 (en) * 2001-08-29 2006-02-21 Gct Semiconductor, Inc. Adaptive linearization technique for communication building block
JP3960240B2 (ja) * 2003-03-10 2007-08-15 三菱電機株式会社 フィードフォワード回路
KR100736394B1 (ko) * 2005-11-01 2007-07-09 삼성전자주식회사 선형성이 향상된 차동 회로, 이를 구비하는 차동 증폭 회로및 믹서 회로
WO2010119456A2 (en) * 2009-04-03 2010-10-21 Secretary, Department Of Information Technology (Dit) Method and apparatus for low power continuous time delta sigma modulation
JP6115991B2 (ja) * 2013-03-15 2017-04-19 国立大学法人東京工業大学 差動増幅器
EP3113359B1 (en) * 2013-11-28 2019-01-02 ams AG Amplifier arrangement
US9350300B2 (en) * 2014-01-28 2016-05-24 Avago Technologies General Ip (Singapore) Pte. Ltd. Power amplifier

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6188281B1 (en) * 1998-09-30 2001-02-13 Maxim Integrated Products, Inc. Linear transconductance circuits having class AB amplifiers parallel coupled with concave compensation circuits
CN104348419A (zh) * 2014-11-17 2015-02-11 中国科学院微电子研究所 一种跨导级线性度提高电路及应用其的混频器电路
CN105811889A (zh) * 2016-04-20 2016-07-27 佛山臻智微芯科技有限公司 一种前馈补偿式跨导运算放大器
CN107370461A (zh) * 2017-07-17 2017-11-21 电子科技大学 一种应用于跨阻放大器的补偿结构

Also Published As

Publication number Publication date
EP3955458A1 (en) 2022-02-16
JP7340623B2 (ja) 2023-09-07
EP3955458A4 (en) 2022-06-29
US20220393649A1 (en) 2022-12-08
JP2022533543A (ja) 2022-07-25
CN112448678A (zh) 2021-03-05
KR20210145819A (ko) 2021-12-02
KR102639945B1 (ko) 2024-02-27

Similar Documents

Publication Publication Date Title
US9628028B2 (en) Common-mode feedback circuit, corresponding signal processing circuit and method
WO2021037054A1 (zh) 补偿电路及芯片、方法、装置、存储介质、电子装置
US8395448B2 (en) Apparatus and method for miller compensation for multi-stage amplifier
US7358805B2 (en) Fully differential sensing apparatus and input common-mode feedback circuit thereof
US9160323B2 (en) Differential amplifier and dual mode comparator using the same
JP2016032301A (ja) 低周波損失補正回路、電力増幅器モジュールおよび無線装置
US9768740B2 (en) Feedback compensation for multistage amplifiers
CN103796134B (zh) 用于电容信号源放大器的系统和方法
US8542066B2 (en) Apparatus and methods for reducing output noise of a signal channel
US8310308B1 (en) Wide bandwidth class C amplifier with common-mode feedback
US9013226B2 (en) Circuits for improving linearity of metal oxide semiconductor (MOS) transistors
CN101281410A (zh) 利用双向非对称缓冲器结构提高性能的ldo电路
US8536923B2 (en) Integrator distortion correction circuit
US20230208374A1 (en) Current feedback amplifier
CN112468104A (zh) 一种运算放大器
US9231542B1 (en) Amplifier common-mode control method
US8988146B1 (en) Voltage amplifier for capacitive sensing devices using very high impedance
US20140043100A1 (en) Operational amplifier with improved frequency compensation
US8928409B1 (en) Trans-capacitance amplifier with picoAmperes input biasing and large output swing
US20100164611A1 (en) Leakage independent vry low bandwidth current filter
JP6634282B2 (ja) 半導体装置
US20150002209A1 (en) Circuits for semiconductor device leakage cancellation
US10320338B2 (en) Amplifier, filter, communication apparatus and network node
KR102095869B1 (ko) 광대역 쿼드러처 특성을 가지는 능동 쿼드러처 신호 생성기
CN113396537B (zh) 一种放大器及放大装置

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 20858148

Country of ref document: EP

Kind code of ref document: A1

ENP Entry into the national phase

Ref document number: 2021565829

Country of ref document: JP

Kind code of ref document: A

Ref document number: 20217036205

Country of ref document: KR

Kind code of ref document: A

ENP Entry into the national phase

Ref document number: 2020858148

Country of ref document: EP

Effective date: 20211108

NENP Non-entry into the national phase

Ref country code: DE