WO2021027672A1 - 一种双工器 - Google Patents

一种双工器 Download PDF

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Publication number
WO2021027672A1
WO2021027672A1 PCT/CN2020/107340 CN2020107340W WO2021027672A1 WO 2021027672 A1 WO2021027672 A1 WO 2021027672A1 CN 2020107340 W CN2020107340 W CN 2020107340W WO 2021027672 A1 WO2021027672 A1 WO 2021027672A1
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WIPO (PCT)
Prior art keywords
metal sealing
additional
filter chip
ring
holes
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Ceased
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PCT/CN2020/107340
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English (en)
French (fr)
Inventor
庞慰
王蕾
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Tianjin University
ROFS Microsystem Tianjin Co Ltd
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Tianjin University
ROFS Microsystem Tianjin Co Ltd
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Publication of WO2021027672A1 publication Critical patent/WO2021027672A1/zh
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P1/00—Auxiliary devices
    • H01P1/20—Frequency-selective devices, e.g. filters

Definitions

  • the present invention relates to the field of filtering devices for communication, in particular to a duplexer that improves isolation by adding additional metallized through-hole structure grounding in a sealing ring.
  • filter components such as FBAR-based filters and duplexers have become more and more popular in the market.
  • it is due to its excellent electrical properties such as low insertion loss, steep transition characteristics, high selectivity, high power capacity, and strong anti-electrostatic discharge (ESD) capability.
  • ESD anti-electrostatic discharge
  • frequency selective devices such as filters and duplexers in the RF front-end are required to suppress adjacent frequency bands at higher and higher levels.
  • FBAR devices also need to be improved in this regard. And to improve, it is necessary to improve the level of temporary band suppression and isolation without having a greater impact on the insertion loss, and at the same time not to increase the overall size of the chip or device as much as possible.
  • the common method is to add an inductance with a large inductance on the parallel branch to change the resonant frequency of the resonator to increase the temporary band suppression, or to add additional capacitance or inductance to one or several resonators to increase the notch point to improve the performance.
  • these methods require the addition of additional reactive components, and the values of these components are usually relatively large, which is difficult to implement on the chip. If it is achieved by winding wires on the substrate or adding discrete components outside the chip, the number and size of the substrate will inevitably increase, which will inevitably lead to an increase in the overall size of the filter or duplexer. Moreover, the added windings or discrete components are not ideal in practice, and the losses introduced by them will be superimposed on the filter, resulting in deterioration of the overall insertion loss of the filter.
  • the above method will lead to an increase in chip loss and a substantial increase in the overall size of the chip while improving the immediate band suppression and isolation.
  • the present invention provides a duplexer to achieve better isolation characteristics.
  • the object of the present invention is to provide a duplexer, a duplexer, comprising a substrate, a protective cap on the substrate, a transmitting filter chip and a receiving filter chip on the protective cap, which It is characterized in that: the bottom of the substrate has a grounded metal pattern; the bottom surface of the transmitting filter chip has a first metal sealing top ring; the bottom surface of the receiving filter chip has a second metal sealing top ring; the protection The top surface of the cap has a metal sealing bottom ring, the metal sealing bottom ring includes a first area of the metal sealing bottom ring, a second area of the metal sealing bottom ring, and a third area of the metal sealing bottom ring, the first area of the metal sealing bottom ring Corresponding to the first metal sealing top ring, the second area of the metal sealing bottom ring corresponds to the second metal sealing top ring, and the third area of the metal sealing bottom ring is connected to the first area of the metal sealing bottom ring And the second area of the metal sealing bottom ring; the duplexer has
  • the positions of the plurality of additional metalized through holes satisfy the following condition: the vertical projection of the plurality of additional metalized through holes is located between the transmitting filter chip and the receiving filter chip.
  • the positions of the plurality of additional metalized through holes satisfy the following condition: the vertical projection of the plurality of additional metalized through holes is located between the transmitting filter chip and the receiving filter chip, and Both left and right sides.
  • the positions of the plurality of additional metalized through holes satisfy the following condition: the vertical projection of the plurality of additional metalized through holes is located between the transmitting filter chip and the receiving filter chip, and Both front and rear sides.
  • the positions of the plurality of additional metalized through holes satisfy the following condition: the additional metalized through holes are located between the transmitting filter chip or the receiving filter chip itself and the electrical connections to the ground need to be increased. The location of the shield.
  • the cross-sections of the plurality of additional metallized through holes are triangular, circular, elliptical or convex polygonal.
  • the middle electrical connection structure is a solder ball.
  • the buried bottom electrical connection structure is a base metallized through hole.
  • the present invention proposes a duplexer that uses a seal ring structure to improve isolation, which can improve the mutual inhibition level and isolation level between the receiving channel and the transmitting channel, and neither causes an increase in the passband insertion loss, nor The introduction of additional discrete reactive devices will cause a substantial increase in the overall size of the chip and an increase in the complexity of the manufacturing process, saving space and reducing costs.
  • Figure 1 is a schematic diagram of the basic structure of a duplexer implemented based on FBAR in the prior art
  • Fig. 2 is a schematic top view of the duplexer shown in Fig. 1;
  • FIG 3 is a schematic diagram of the protective cap in the duplexer shown in Figure 1;
  • Figure 4 is a schematic cross-sectional view of the duplexer shown in Figure 1;
  • Fig. 5 is a schematic diagram of a protective cap of a duplexer according to an embodiment of the present invention.
  • FIG. 6 is a schematic cross-sectional view of a duplexer according to an embodiment of the present invention.
  • FIG. 7 is a schematic diagram of the protective cap of the duplexer in the second embodiment of the present invention.
  • FIG. 8 is a schematic cross-sectional view of the duplexer of the second embodiment of the present invention.
  • FIG. 9 is a schematic diagram of the protective cap of the triple duplexer of the embodiment of the present invention.
  • Figure 10 is a schematic cross-sectional view of a triple duplexer according to an embodiment of the present invention.
  • FIG. 11 is a schematic diagram of the protective cap of the duplexer of the fourth embodiment of the present invention.
  • FIG. 12 is a schematic cross-sectional view of the duplexer of the fourth embodiment of the present invention.
  • Figure 13 is a comparison diagram of isolation curves
  • Figure 14 is a comparison diagram of transmission characteristic curves
  • Figure 15 is a comparison diagram of the enlarged passband curves.
  • FIG. 1 is a schematic diagram of the basic structure of an existing duplexer implemented based on FBAR.
  • the duplexer mainly includes a substrate SU, a protective cap cap, a receiving filter chip TX and a transmitting filter chip RX.
  • the substrate SU can have a double-layer or multi-layer structure, on the one hand, it can play a bearing role, and on the other hand, it can also play a role of electrical connection.
  • the protective cap cap can be made based on a silicon substrate to protect the effective pattern area on the chip.
  • the receiving filter chip TX and the transmitting filter chip RX can be made by the FBAR process respectively.
  • the chip contains a filter structure composed of resonators made by the FBAR process, and the effective graphics area is located in the receiving filter chip TX and the transmitting filter RX chip Face the side of the protective cap.
  • Figure 2 is a view looking down from the X direction in Figure 1, and assuming that the upper surfaces of the receiving filter chip TX and the transmitting filter chip RX are transparent, what you see is located at the receiving filter chip TX and the transmitting filter chip RX FBAR effective graphics area on the bottom surface.
  • the gray part in the figure is a schematic diagram of the FBAR resonator.
  • Figure 2 shows that there is a metal sealing ring structure SR around the effective graphic area, and the corresponding position on the protective cap cap also has the same metal sealing ring structure.
  • the main function of the metal sealing ring structure SR is to receive the filter chip TX, transmission filter chip RX and protective cap cap are bonded as a whole and the effective graphic area is sealed and protected.
  • the electrical connection required in the filter structure is led out from the pattern area through the metalized through hole VA and conducted to the corresponding metal pad on the lower surface of the protective film cap.
  • Figure 3 shows the detailed structure of the protective cap cap in Figure 1.
  • the metal sealing structure on the protective cap cap is divided into two independent parts, SR_TX and SR_RX, which respectively correspond to the metal sealing rings SR of the receiving filter chip TX and the transmitting filter chip RX.
  • Fig. 4 is a side view from the Y direction in Fig. 1, from which the structure in Figs. 1 and 2 can be understood more clearly.
  • the metal sealing ring structure SR of the receiving filter chip TX and the transmitting filter chip RX are bonded with the metal sealing rings SR_RX and SR_TX at the corresponding position on the cap, sealing the effective graphic area in Inside the sealed space formed by the metal sealing ring structure, as shown in the gray area in the figure.
  • the electrical connection required by the pattern area is led out to the metal pad PD on the lower surface of the protective cap cap through the metalized through hole VA, and then connected to the corresponding metal pad LD on the substrate SU through the solder ball BP.
  • the lower surface of the substrate SU usually has a large area ground metal pattern GND.
  • the above is the FBAR duplexer structure based on the current existing technology.
  • all electrical signals on the TX and RX chips are conducted to the substrate SU through the through holes VA and the solder balls BP.
  • the VA and BP of the TX and RX chips do not have any shielding measures between each other, they will generate electromagnetic coupling and mutual crosstalk between each other, forming mutual interference and leakage of signals between the receiving filter and the transmitting filter. As a result, the isolation and mutual suppression between the receiving channel and the transmitting channel become worse.
  • the method proposed in this patent is specifically aimed at and improving this problem.
  • a duplexer includes a substrate SU, a protective cap cap located on the substrate, a transmitting filter chip TX and a receiving filter chip RX located on the protective cap cap, wherein the bottom of the substrate SU has The ground metal pattern GND; the bottom surface of the transmitting filter chip TX has a first metal sealing top ring SR1; the bottom surface of the receiving filter chip RX has a second metal sealing top ring SR2.
  • the top surface of the protective cap cap has a metal sealing bottom ring SR_TRX.
  • the metal sealing bottom ring SR_TRX includes the first area of the metal sealing bottom ring, the second area of the metal sealing bottom ring and the third area of the metal sealing bottom ring.
  • the first area of the metal sealing bottom ring corresponds to the first metal sealing top ring SR1.
  • the second area of the bottom ring corresponds to the second metal seal top ring SR2, and the third area of the metal seal bottom ring connects the first area of the metal seal bottom ring and the second area of the metal seal bottom ring.
  • the duplexer also has multiple additional ground shielding structures.
  • Each additional ground shielding structure includes, from top to bottom, an additional metallized through hole VAS penetrating the protective cap, a middle electrical connection structure, and a buried electrical connection structure penetrating the substrate SU, wherein the top of the additional metalized through hole VAS It is in contact with the third area of the metal sealing bottom ring SR_TRX, and the bottom of the buried electrical connection structure is in contact with the ground metal pattern GND.
  • the middle electrical connection structure may be a solder ball BPS.
  • the buried-bottom electrical connection structure may be a base metallization via.
  • the bottom of the additional metalized through hole VAS and the top of the buried-bottom electrical connection structure are also provided with a metal sheet structure to facilitate their connection with the central electrical connection structure.
  • the positions of the multiple additional metallized through holes satisfy the following condition: the vertical projection of the multiple additional metalized through holes is located between the transmitting filter chip and the receiving filter chip.
  • the positions of the plurality of additional metalized through holes satisfy the following condition: the vertical projection of the plurality of additional metalized through holes is located between the transmitting filter chip and the receiving filter chip and on the left and right sides of the two.
  • the specific meaning of "left and right sides” refers to: if it is defined that the transmitting filter chip and the receiving filter chip are arranged horizontally, the left side of the transmitting filter chip is the left side, and the right side of the receiving filter chip is Right.
  • the positions of the plurality of additional metallized through holes satisfy the following condition: the vertical projections of the plurality of additional metalized through holes are located between the transmitting filter chip and the receiving filter chip and on the front and back sides of the two.
  • the specific meaning of "front and back sides” refers to: if it is defined that the transmitting filter chip and the receiving filter chip are arranged horizontally on the left and the right, and then an outer rectangular frame, the two sides other than the left and right sides of the outer rectangular frame are The front side and the back side, so you can determine the "front and rear sides".
  • the positions of the multiple additional metalized through holes satisfy the following condition: the additional metalized through holes are located between the grounded point connections of the transmitting filter chip or the receiving filter chip itself, where shielding needs to be added.
  • the cross-sections of the plurality of additional metallized through holes are rectangular, triangular, circular, elliptical or convex polygonal. As long as the shape can be realized by the actual process, it is possible.
  • the circuit structure of the duplexer proposed in this embodiment has various forms, which are specifically as follows:
  • the metal sealing ring SR on the protective cap cap is originally divided into two independent parts, SR_TX and SR_RX, which are respectively used to bond with the corresponding metal sealing ring SR on the transmitting filter chip TX and the receiving filter chip RX. .
  • FIG. 5 and 6 are respectively a schematic diagram and a cross-sectional schematic diagram of a protective cap of a duplexer according to an embodiment of the present invention.
  • the originally separated SR_TX and SR_RX are connected to form an integral metal sealing bottom ring SR_TRX, and a number of additional metalized through holes VAS are added to the metal sealing bottom ring SR_TRX.
  • the cross-sectional view of the duplexer in FIG. 4 becomes the cross-sectional view of the duplexer as shown in FIG. 6.
  • the first metal sealing top ring SR1 corresponding to the transmitting filter chip TX and the second metal sealing top ring SR2 corresponding to the receiving filter chip RX are bonded to the metal sealing bottom ring SR_TRX on the protective cap cap. After that, an integral metal sealing structure is formed. At the same time, the additional metallized through hole VAS on the metal sealing bottom ring SR_TRX is connected to the corresponding metal conductor pattern PDS on the protective cap cap, and the metal conductor pattern PDS is then connected to the ground metal pad GND on the substrate SU through the solder ball BPS .
  • the shielding structure isolates the metalized through holes VA and solder balls BP of the transmitting filter chip TX and the receiving filter chip RX, and can effectively reduce the electromagnetic coupling and mutual interference between them, thereby improving the receiving channel and Mutual suppression and isolation between transmitting channels. Since no other modification has been made to the effective pattern area of the original design of the resonator, it will not have any adverse effect on the passband performance.
  • FIG. 7 and 8 are respectively a schematic diagram and a cross-sectional schematic diagram of the protective cap of the duplexer in the second embodiment of the present invention.
  • Fig. 7 is compared with Fig. 5, in addition to the shielding structure composed of the additional metalized through holes VAS and the metal conductor pattern PDS in the middle of the two chips shown in Fig. 5, the left and right edges of the metalized sealing bottom ring SR_TRX are also The position also adds the same shielding structure composed of additional metallized through holes VAS and metal conductor patterns PDS, the cross section of which is shown in the gray part in FIG. 8. This can further increase the shielding effect of the metal sealing ring grounding.
  • 9 and 10 are respectively a schematic diagram and a cross-sectional schematic diagram of the protective cap of the triple duplexer of the embodiment of the present invention.
  • Figure 9 is compared with Figure 5, in addition to the shielding structure composed of the additional metalized through holes VAS and metal conductor pattern PDS in the middle of the two chips shown in Figure 5, the front and rear edges of the metalized seal bottom ring SR_TRX are also The position also adds the same shielding structure composed of additional metallized through holes VAS and metal conductor patterns PDS, the cross section of which is shown in the gray part of FIG. 10. This can further increase the shielding effect of the metal sealing ring grounding.
  • 11 and 12 are respectively a schematic diagram and a cross-sectional schematic diagram of the protective cap of the duplexer of the fourth embodiment of the present invention.
  • Figure 11 is compared with Figure 5, in addition to the shielding structure composed of the additional metalized through holes VAS and the metal conductor pattern PDS in the middle position of the two chips shown in Figure 5, the transmitting filter chip TX and the receiving filter are still in use.
  • a shielding structure composed of additional metallized through holes VAS and metal conductor pattern PDS is also added and connected to the metal sealing bottom ring SR_TRX.
  • the cross section is gray in Figure 12 Partly shown. This can further increase the shielding effect of the metal sealing ring grounding. Because the additional metallized through holes VAS added in this case are not necessarily at the edge of the sealing ring, they are represented by intermittent gray in the figure. In this way, the shielding effect of the grounding of the metal sealing ring can improve the coupling between the transmitting filter chip TX and the receiving filter chip RX itself.
  • a design example of a duplexer is given.
  • Fig. 4 and Fig. 6 are respectively used for the duplexer design of the same design, that is, the prior art and the technology proposed by the present invention are respectively used to compare the two.
  • FIG. 13 is a comparison diagram of isolation curves.
  • the thick line S1 is the curve corresponding to the traditional duplexer
  • the thin line S2 is the curve corresponding to the duplexer according to the embodiment of the present invention. It can be clearly seen that the isolation of S2 is significantly better than that of S1 in the two frequency bands of 1740MHz ⁇ 1780MHz and 1810MHz ⁇ 1850MHz. It can be explained that the method for improving isolation of the seal ring provided in this patent has obvious effects.
  • the thick line S1 is the curve corresponding to the traditional duplexer
  • the thin line S2 is the curve corresponding to the duplexer according to the embodiment of the present invention. It can be seen that the mutual suppression in the two frequency bands of 1740MHz ⁇ 1780MHz and 1810MHz ⁇ 1850MHz has also been improved.
  • FIG. 15 is a comparison diagram of the enlargement curves of the passband.
  • the thick line S1 is the curve corresponding to the traditional duplexer
  • the thin line S2 is the curve corresponding to the duplexer according to the embodiment of the present invention. It can be seen that there is no difference between the passband transmission characteristic curves obtained by the two design methods, and they basically overlap, indicating that the method of improving the isolation through the seal ring proposed in this patent will not have any adverse effect on the passband performance.

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Abstract

本发明提供一种双工器，包括基底、保护帽、发射滤波器芯片和接收滤波器芯片，其中，基底的底部具有接地金属图形；发射滤波器芯片的底表面具有第一金属密封顶圈；接收滤波器芯片的底表面具有第二金属密封顶圈；保护帽的顶表面具有金属密封底圈，金属密封底圈包括第一区域、第二区域和第三区域，第一区域与第一金属密封顶圈对应，第二区域与第二金属密封顶圈对应，第三区域连接第一区域和第二区域；双工器具有多个附加接地屏蔽结构，每个附加接地屏蔽结构由上至下依次包括：贯穿保护帽的附加金属化通孔、中部电连接结构和贯穿基底的埋底电连接结构，附加金属化通孔的顶部与金属密封底圈第三区域相接触，埋底电连接结构的底部与接地金属图形相接触。

Description

一种双工器 技术领域
本发明涉及通信用滤波类器件领域，特别涉及一种利用密封环中增加附加金属化通孔结构接地改善隔离度的双工器。
背景技术
随着当今无线通讯技术的飞速发展，小型化便携式终端设备的应用也日益广泛，因而对于高性能、小尺寸的射频前端模块和器件的需求也日益迫切。近年来，以FBAR为基础的滤波器、双工器等滤波器件越来越为市场所青睐。一方面是因为其插入损耗低、过渡特性陡峭、选择性高、功率容量高、抗静电放电(ESD)能力强等优异的电学性能，另一方面也是因为其体积小、易于集成的特点所致。
当前，面对越来越严苛的频率资源，要求射频前端的滤波器、双工器等频率选择性器件对于相邻频带的抑制水平也越来越高，FBAR器件也需要在这方面进行改进和提高，既要提高临带抑制和隔离度水平，又不能对插损有较大影响，同时还要尽可能不增加芯片或器件的整体尺寸。
常见的方法是在并联支路上增加大感值的电感改变谐振器谐振频率来增加临带抑制，或是在某个或某几个谐振器上增加额外的电容或电感来增加notch点从而改善临带抑制。但这些方法都需要增加额外的电抗性元件，而且这些元件的取值通常都是比较大的，要在芯片上实现很困难。如果通过在基板上绕线或是在芯片外增加分立元件的方式来实现，则必然会增加基板的层数和尺寸，从而不可避免的导致滤波器或双工器整体尺寸的增加。而且，实际中增加的绕线或分立元件都不是理想的，其引入的损耗都会叠加到滤波器上，导致滤波器整体插损的恶化。
综上可知，上述方法在改善临带抑制和隔离度的同时，会导致芯 片损耗的增加和芯片整体尺寸的大幅增加。
因此，如何设计一种利用将两片分别制作的滤波器晶圆键合在一起形成的单颗芯片构成的双工器，同时具有较好的收发隔离度，仍是待解决的技术问题。
发明内容
有鉴于此，本发明提供一种双工器，以达到较好的隔离度特性。
本发明的目的是提供一种双工器，一种双工器，包括基底、位于所述基底之上的保护帽、位于所述保护帽之上的发射滤波器芯片和接收滤波器芯片，其特征在于：所述基底的底部具有接地金属图形；所述发射滤波器芯片的底表面具有第一金属密封顶圈；所述接收滤波器芯片的底表面具有第二金属密封顶圈；所述保护帽的顶表面具有金属密封底圈，所述金属密封底圈包括金属密封底圈第一区域、金属密封底圈第二区域和金属密封底圈第三区域，所述金属密封底圈第一区域与所述第一金属密封顶圈对应，所述金属密封底圈第二区域与所述第二金属密封顶圈对应，所述金属密封底圈第三区域连接所述金属密封底圈第一区域和所述金属密封底圈第二区域；所述双工器具有多个附加接地屏蔽结构，每个所述附加接地屏蔽结构由上至下依次包括：贯穿所述保护帽的附加金属化通孔、中部电连接结构和贯穿所述基底的埋底电连接结构，所述附加金属化通孔的顶部与所述金属密封底圈第三区域相接触，所述埋底电连接结构的底部与所述接地金属图形相接触。
可选地，所述多个附加金属化通孔的位置满足如下条件：所述多个附加金属化通孔的垂直投影位于所述发射滤波器芯片与所述接收滤波器芯片二者之间。
可选地，所述多个附加金属化通孔的位置满足如下条件：所述多个附加金属化通孔的垂直投影位于所述发射滤波器芯片与所述接收滤波器芯片二者之间以及二者左右两侧。
可选地，所述多个附加金属化通孔的位置满足如下条件：所述多个附加金属化通孔的垂直投影位于所述发射滤波器芯片与所述接收滤 波器芯片二者之间以及二者前后两侧。
可选地，所述多个附加金属化通孔的位置满足如下条件：所述附加金属化通孔位于所述发射滤波器芯片或者所述接收滤波器芯片本身各个接地的电连接之间需要增加屏蔽的位置。
可选地，所述多个附加金属化通孔的截面为三角形、圆形、椭圆形或凸多边形。
可选地，所述中部电连接结构为焊球。
可选地，所述埋底电连接结构为基底金属化通孔。
本发明提出了一种利用密封环结构改善隔离度的双工器，能够提高接收通道和发射通道之间的相互抑制水平和隔离度水平，而且既不会造成通带插损的增加，又不会因为引入额外的分立电抗性器件而造成芯片整体尺寸的大幅度增加及制造工艺复杂性的增加，节省了空间又降低了成本。
附图说明
附图用于更好地理解本发明，不构成对本发明的不当限定。其中：
图1是现有技术中基于FBAR实现的双工器的基本结构示意图；
图2是图1所示双工器的俯视示意图；
图3是图1所示双工器中的保护帽的示意图；
图4是图1所示双工器中的剖面示意图；
图5是本发明实施例一双工器的保护帽的示意图；
图6是本发明实施例一双工器的剖面示意图；
图7是本发明实施例二双工器的保护帽的示意图；
图8是本发明实施例二双工器的剖面示意图；
图9是本发明实施例三双工器的保护帽的示意图；
图10是本发明实施例三双工器的剖面示意图；
图11是本发明实施例四双工器的保护帽的示意图；
图12是本发明实施例四双工器的剖面示意图；
图13是隔离度曲线对比图；
图14是传输特性曲线对比图；
图15是通带放大曲线对比图。
具体实施方式
下面结合附图与实施例对本发明作进一步说明。
图1是现有基于FBAR实现的双工器的基本结构示意图。该双工器主要包括基板SU、保护帽cap、接收滤波器芯片TX和发送滤波器芯片RX。基板SU可以为双层或者多层结构，一方面起到承载作用，另一方面也可以起到电连接作用。保护帽cap可以基于硅衬底制作，用于保护芯片上的有效图形区域。接收滤波器芯片TX和发送滤波器芯片RX可以分别为FBAR工艺制作，芯片上包含了用FBAR工艺制作的谐振器组成的滤波器结构，有效图形区域位于接收滤波器芯片TX和发射滤波器RX芯片面向保护帽cap的一面。
图2是从图1中X方向向下看的视图，并假设接收滤波器芯片TX和发射滤波器芯片RX的上表面透明后，看到的位于接收滤波器芯片TX和发射滤波器芯片RX的下表面的FBAR有效图形区域。图中灰色的部分是FBAR谐振器的示意图。图2示出了有效图形区域周围具有一圈金属密封圈结构SR，保护帽cap上的对应位置也有同样的金属密封圈结构，该金属密封圈结构SR起到的主要作用是将接收滤波器芯片TX、发射滤波器芯片RX和保护帽cap键合为一个整体并将有效图形区域密封保护起来。滤波器结构中所需要的电连接则通过金属化通孔VA从图形区域引出并导通到保护膜cap下表面上的相应金属焊盘上。
图3中给出了图1中保护帽cap的细节结构。保护帽cap上的金属密封结构分为SR_TX和SR_RX两个独立的部分，分别对应于接收滤波器芯片TX和发射滤波器芯片RX各自的金属密封环SR。
图4是从图1中的Y方向看过去的侧向视图，从这张图中可以更清楚地理解图1和图2中的结构。在图4中可以看到，接收滤波器芯片TX和发射滤波器芯片RX两颗芯片的金属密封圈结构SR与cap上对应位置的金属密封圈SR_RX和SR_TX相键和，将有效图形区域密封在金属密封圈结构形成的密封空间之内，如图中灰色区域所示。图 形区域需要的电连接通过金属化通孔VA引出到保护帽cap下表面的金属焊盘PD上，然后通过焊球BP同基板SU上对应的金属焊盘LD相连接。基板SU的下表面通常会有大面积的接地金属图形GND。
上述即为基于目前现有技术所实现的FBAR双工器结构。这种结构下，TX和RX芯片上的所有电信号都是通过通孔VA和焊球BP导通到基板SU上的。因为TX和RX两颗芯片的VA和BP相互之间没有任何屏蔽措施，所以他们相互之间会产生电磁耦合和相互串扰，在接收滤波器和发射滤波器之间形成信号的相互干扰和泄漏，因而造成接收通道和发射通道之间的隔离度和相互抑制变差。本专利提出的方法就是专门针对和改善这方面问题的。
本发明实施例的一种双工器，包括基底SU、位于基底之上的保护帽cap、位于保护帽cap之上的发射滤波器芯片TX和接收滤波器芯片RX，其中，基底SU的底部具有接地金属图形GND；发射滤波器芯片TX的底表面具有第一金属密封顶圈SR1；接收滤波器芯片RX的底表面具有第二金属密封顶圈SR2。保护帽cap的顶表面具有金属密封底圈SR_TRX。金属密封底圈SR_TRX包括金属密封底圈第一区域、金属密封底圈第二区域和金属密封底圈第三区域，其中金属密封底圈第一区域与第一金属密封顶圈SR1对应，金属密封底圈第二区域与第二金属密封顶圈SR2对应，金属密封底圈第三区域连接金属密封底圈第一区域和金属密封底圈第二区域。双工器还具有多个附加接地屏蔽结构。每个附加接地屏蔽结构由上至下依次包括：贯穿保护帽cap的附加金属化通孔VAS、中部电连接结构、和贯穿基底SU的埋底电连接结构，其中附加金属化通孔VAS的顶部与金属密封底圈SR_TRX的第三区域相接触，埋底电连接结构的底部与接地金属图形GND相接触。
具体地，中部电连接结构可以为焊球BPS。埋底电连接结构可以为基底金属化通孔。另外需要说明的是，通常附加金属化通孔VAS底部以及埋底电连接结构的顶部还设置有金属薄片结构，以便于它们与中部电连接结构进行连接。
可选地，多个附加金属化通孔的位置满足如下条件：多个附加金属化通孔的垂直投影位于发射滤波器芯片与接收滤波器芯片二者之间。
可选地，多个附加金属化通孔的位置满足如下条件：多个附加金属化通孔的垂直投影位于发射滤波器芯片与接收滤波器芯片二者之间以及二者左右两侧。“左右两侧”的具体含义是指：假如定义发射滤波器芯片与接收滤波器芯片为一左一右水平排列，则发射滤波器芯片的左边即为左侧，接收滤波器芯片的右边即为右侧。
可选地，多个附加金属化通孔的位置满足如下条件：多个附加金属化通孔的垂直投影位于发射滤波器芯片与接收滤波器芯片二者之间以及二者前后两侧。“前后两侧”的具体含义是指：假如定义发射滤波器芯片与接收滤波器芯片为一左一右水平排列，然后作外包矩形框，该外包矩形框的非左右侧边的两条边即前侧边和后侧边，如此可以确定“前后两侧”。
可选地，多个附加金属化通孔的位置满足如下条件：附加金属化通孔位于发射滤波器芯片或者接收滤波器芯片本身各个接地的点连接之间需要增加屏蔽的位置。
可选地，多个附加金属化通孔的截面为矩形、三角形、圆形、椭圆形或凸多边形。只要实际工艺可实现的形状都是可以的。
本实施例提出的双工器的电路结构有多种形式，具体如下所示：
实施例一
现有技术中保护帽cap上的金属密封圈SR本来是分为SR_TX和SR_RX两个独立的部分，分别用于和发射滤波器芯片TX和接收滤波器芯片RX上对应的金属密封圈SR键合。
图5和图6分别是本发明实施例一双工器的保护帽的示意图和剖面示意图。如图5所示，将原本分开的SR_TX和SR_RX连接起来， 变成一个整体金属密封底圈SR_TRX，并在该金属密封底圈SR_TRX上增加若干附加金属化通孔VAS。在现有双工器上进行上述改进后，图4中的双工器剖面图就变成如图6所示的双工器剖面图了。如图6所示，发射滤波器芯片TX对应的第一金属密封顶圈SR1和接收滤波器芯片RX对应的第二金属密封顶圈SR2通过和保护帽cap上的金属密封底圈SR_TRX相键合之后，形成了一个整体的金属密封结构。同时，金属密封底圈SR_TRX上的附加金属化通孔VAS和保护帽cap上的相应金属导体图形PDS相连接，金属导体图形PDS再通过焊球BPS和基板SU上的接地金属焊盘GND相连接。这样就相当于用金属密封底圈SR_TRX、相应金属导体图形PDS、焊球BPS、接地金属焊盘GND共同形成了一个屏蔽结构，如图6中的灰色部分所示。该屏蔽结构在发射滤波器芯片TX和接收滤波器芯片RX的金属化通孔VA和焊球BP之间起到隔离作用，能有效降低它们之间的电磁耦合和相互干扰，从而改善接收通道和发射通道之间的相互抑制和隔离度。由于并未对原始设计的谐振器有效图形区域做任何其他修改，所以不会对通带性能有任何不利的影响。
实施例二
图7和图8分别是本发明实施例二双工器的保护帽的示意图和剖面示意图。
图7与图5相比，除了图5所示的两个芯片中间位置的设置附加金属化通孔VAS和金属导体图形PDS组成的屏蔽结构之外，还在金属化密封底圈SR_TRX的左右边缘位置也增加了同样的附加金属化通孔VAS和金属导体图形PDS组成的屏蔽结构，其剖面如图8中的灰色部分所示。这样可以进一步增加金属密封圈接地的屏蔽效果。
实施例三
图9和图10分别是本发明实施例三双工器的保护帽的示意图和剖面示意图。
图9与图5相比，除了图5所示的两个芯片中间位置的设置附加金属化通孔VAS和金属导体图形PDS组成的屏蔽结构之外，还在金属化密封底圈SR_TRX的前后边缘位置也增加了同样的附加金属化通孔 VAS和金属导体图形PDS组成的屏蔽结构，其剖面如图10中的灰色部分所示。这样可以进一步增加金属密封圈接地的屏蔽效果。
实施例四
图11和图12分别是本发明实施例四双工器的保护帽的示意图和剖面示意图。
图11与图5相比，除了图5所示的两个芯片中间位置的设置附加金属化通孔VAS和金属导体图形PDS组成的屏蔽结构之外，还在在发射滤波器芯片TX和接收滤波器芯片RX本身各个接地的电连接之间需要增加屏蔽的地方也加入附加金属化通孔VAS和金属导体图形PDS组成的屏蔽结构并同金属密封底圈SR_TRX相连，其剖面如图12中的灰色部分所示。这样可以进一步增加金属密封圈接地的屏蔽效果。因为这种情况下增加的附加金属化通孔VAS不一定在密封环边缘，所以在图中用间断的灰色表示。这样可以通过金属密封圈接地的屏蔽效果来改善发射滤波器芯片TX和接收滤波器芯片RX本身各个接地端口之间的耦合。
为了说明本发明实施例的实际效果，给出了一个双工器的设计实例。为了进行对比，对同一设计的双工器设计分别使用图4和图6，即分别使用现有技术和本发明提出技术，对二者进行对比。
图13为隔离度曲线对比图，粗线S1是传统双工器对应的曲线，细线S2是本发明实施例到的双工器对应的曲线。可以明显看出，在所关心的1740MHz～1780MHz和1810MHz～1850MHz两个频段范围内，S2的隔离度明显优于S1。由此可以说明，本专利给出的密封环改善隔离度的方法是具有明显效果的。
图14为传输特性曲线对比图，粗线S1是传统双工器对应的曲线，细线S2是本发明实施例到的双工器对应的曲线。可以看到在1740MHz～1780MHz和1810MHz～1850MHz两个频段范围内的相互抑制也同样得到了改善。
图15为通带放大曲线对比图，粗线S1是传统双工器对应的曲线，细线S2是本发明实施例到的双工器对应的曲线。可以看到两种设计方法得到的通带传输特性曲线没有区别，基本重合，说明本专利提出的 通过密封环改善隔离度的方法不会对通带性能产生任何不利影响。
上述虽然结合附图对本发明的具体实施方式进行了描述，但并非对本发明保护范围的限制，所属领域技术人员应该明白，在本发明的技术方案的基础上，本领域技术人员不需要付出创造性劳动即可做出的各种修改或变形仍在本发明的保护范围以内。

Claims (8)

  1. 一种双工器，包括基底、位于所述基底之上的保护帽、位于所述保护帽之上的发射滤波器芯片和接收滤波器芯片，其特征在于：
    所述基底的底部具有接地金属图形；
    所述发射滤波器芯片的底表面具有第一金属密封顶圈；
    所述接收滤波器芯片的底表面具有第二金属密封顶圈；
    所述保护帽的顶表面具有金属密封底圈，所述金属密封底圈包括金属密封底圈第一区域、金属密封底圈第二区域和金属密封底圈第三区域，所述金属密封底圈第一区域与所述第一金属密封顶圈对应，所述金属密封底圈第二区域与所述第二金属密封顶圈对应，所述金属密封底圈第三区域连接所述金属密封底圈第一区域和所述金属密封底圈第二区域；
    所述双工器具有多个附加接地屏蔽结构，每个所述附加接地屏蔽结构由上至下依次包括：贯穿所述保护帽的附加金属化通孔、中部电连接结构和贯穿所述基底的埋底电连接结构，所述附加金属化通孔的顶部与所述金属密封底圈第三区域相接触，所述埋底电连接结构的底部与所述接地金属图形相接触。
  2. 根据权利要求1所述的双工器，其特征在于，所述多个附加金属化通孔的位置满足如下条件：所述多个附加金属化通孔的垂直投影位于所述发射滤波器芯片与所述接收滤波器芯片二者之间。
  3. 根据权利要求1所述的双工器，其特征在于，所述多个附加金属化通孔的位置满足如下条件：所述多个附加金属化通孔的垂直投影位于所述发射滤波器芯片与所述接收滤波器芯片二者之间以及二者左右两侧。
  4. 根据权利要求1所述的双工器，其特征在于，所述多个附加金属化通孔的位置满足如下条件：所述多个附加金属化通孔的垂直投影 位于所述发射滤波器芯片与所述接收滤波器芯片二者之间以及二者前后两侧。
  5. 根据权利要求1所述的双工器，其特征在于，所述多个附加金属化通孔的位置满足如下条件：所述附加金属化通孔位于所述发射滤波器芯片或者所述接收滤波器芯片本身各个接地的电连接之间需要增加屏蔽的位置。
  6. 根据权利要求1所述的双工器，其特征在于，所述多个附加金属化通孔的截面为矩形、三角形、圆形、椭圆形或凸多边形。
  7. 根据权利要求1所述的双工器，其特征在于，所述中部电连接结构为焊球。
  8. 根据权利要求1所述的双工器，其特征在于，所述埋底电连接结构为基底金属化通孔。
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