WO2021014681A1 - Electronic circuit module - Google Patents

Electronic circuit module Download PDF

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Publication number
WO2021014681A1
WO2021014681A1 PCT/JP2020/011502 JP2020011502W WO2021014681A1 WO 2021014681 A1 WO2021014681 A1 WO 2021014681A1 JP 2020011502 W JP2020011502 W JP 2020011502W WO 2021014681 A1 WO2021014681 A1 WO 2021014681A1
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WO
WIPO (PCT)
Prior art keywords
grounding
ground electrode
electronic circuit
circuit module
circuit board
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PCT/JP2020/011502
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French (fr)
Japanese (ja)
Inventor
佐藤 弘幸
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アルプスアルパイン株式会社
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Publication of WO2021014681A1 publication Critical patent/WO2021014681A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K9/00Screening of apparatus or components against electric or magnetic fields

Definitions

  • the present invention relates to an electronic circuit module.
  • heat is dissipated from a surface grounding electrode provided on a mounting surface of a circuit board and a back grounding electrode provided on the back surface (a surface facing the mounting surface) of the circuit board.
  • a technique has been devised in which heat generated from an electronic component can be dissipated to the back side of a circuit board by connecting with a via (for example, see Patent Documents 1 and 2 below).
  • the surface grounding electrode is provided with the surface grounding pattern (land for soldering) and the back grounding electrode is provided with the back grounding pattern (land for soldering)
  • the position where the surface grounding pattern and the back grounding pattern overlap. If a heat radiating via is provided on the ground, voids may occur due to the outflow of gas from the heat radiating via during soldering. Therefore, a method of suppressing the generation of voids can be considered by forming a heat dissipation via at a position avoiding the surface grounding pattern and the back grounding pattern.
  • the surface ground pattern and the back ground pattern are arranged independently of each other, the area where the heat dissipation via can be arranged (that is, the area where the surface ground pattern and the back ground pattern are avoided) is relatively small.
  • the heat dissipation via cannot be arranged efficiently.
  • the inventors of the present invention have found the need for a technique capable of efficiently arranging heat dissipation vias while suppressing the generation of voids.
  • the electronic circuit module of one embodiment is an electronic circuit module including a circuit board having a mounting surface on which electronic components are mounted and a back surface provided with external connection terminals, and the circuit board is provided on the mounting surface.
  • a surface ground electrode having a plurality of surface ground patterns, a back ground electrode provided on the back surface having a plurality of back ground patterns, and a plurality of heat dissipation vias connecting the surface ground electrode and the back ground electrode.
  • each of the plurality of surface ground patterns and each of the plurality of back ground patterns are arranged at positions where they overlap each other, and a plurality of them.
  • Each of the heat radiating vias is arranged at a position avoiding the surface grounding pattern and the back grounding pattern.
  • heat dissipation vias can be efficiently arranged while suppressing the generation of voids.
  • External perspective view of the electronic circuit module according to one embodiment External perspective view of the electronic circuit module according to one embodiment
  • Top view of the electronic circuit module according to one embodiment AA sectional view of the electronic circuit module shown in FIG.
  • FIGS. 1 and 2 are external perspective views of the electronic circuit module 100 according to the embodiment.
  • the electronic circuit module 100 shown in FIGS. 1 and 2 can be mounted on various electric products to have a specific function (for example, LTE (Long Term Evolution) (registered trademark)) by the electronic circuit included in the electronic circuit module 100. , Bluetooth (registered trademark), Wi-Fi (registered trademark), and other wireless communication functions).
  • LTE Long Term Evolution
  • Wi-Fi registered trademark
  • other wireless communication functions for example, Wi-Fi (registered trademark)
  • the electronic circuit module 100 has a thin rectangular parallelepiped shape as a whole.
  • the electronic circuit module 100 includes a circuit board 110, an IC (Integrated Circuit) 120, and a metal cover 130.
  • FIG. 1 shows an electronic circuit module 100 with a metal cover 130 attached to a circuit board 110.
  • FIG. 2 shows an electronic circuit module 100 in a state where the metal cover 130 is not attached to the circuit board 110.
  • the circuit board 110 is a flat plate-shaped and rectangular member.
  • the surface of the circuit board 110 is a mounting surface 110A on which various electronic components are mounted.
  • a PWB Print Wiring Board
  • the IC 120 is used as an example of the electronic components mounted on the mounting surface 110A, but the present invention is not limited to this, and other electronic components, wiring patterns, and the like can be mounted on the mounting surface 110A.
  • the outer surface layer ground electrode 115 is provided on the mounting surface 110A.
  • the outer surface layer ground electrode 115 is a thin-film electrode formed in an annular shape along the outer peripheral portion of the mounting surface 110A.
  • a metal cover 130 is fixed to the outer surface ground electrode 115 by soldering.
  • the outer surface layer ground electrode 115 is formed by using various conductive films (for example, a copper film).
  • the IC 120 is a main component included in the electronic circuit of the electronic circuit module 100.
  • the IC 120 is mounted near the center of the mounting surface 110A of the circuit board 110, for example.
  • the IC 120 is configured to include a processor, a memory, and the like.
  • the IC 120 realizes various functions of the electronic circuit module 100 by executing a program stored in a memory by a processor.
  • the metal cover 130 is a metal member that covers the mounting surface 110A of the circuit board 110.
  • the metal cover 130 has a rectangular top plate portion 130A and four side plate portions 130B vertically hung downward from each of the four sides of the top plate portion 130A.
  • the metal cover 130 has a thin rectangular parallelepiped shape with an open bottom.
  • each of the four side plate portions 130B is fixed and ground-connected to the outer surface ground electrode 115 by soldering over the entire circumference of the outer surface ground electrode 115.
  • the metal cover 130 protects the IC 120, which is a part of the electronic circuit, from external impacts and the like, and at the same time, leaks electromagnetic noise from the IC 120 and invades the IC 120. Is suppressed to improve the shielding property against electromagnetic noise.
  • FIG. 3 is a diagram showing a configuration of an IC 120 included in the electronic circuit module 100 according to the embodiment.
  • FIG. 3A is a side view of the IC 120.
  • FIG. 3B is a bottom view of the IC 120.
  • a rectangular grounding terminal 121 is provided at the center of the bottom surface of the IC 120.
  • a plurality of electrical signal terminals 122 are provided side by side on the outer peripheral portion of the IC 120.
  • FIG. 4 is a plan view of the electronic circuit module 100 according to the embodiment.
  • FIG. 5 is a sectional view taken along the line AA of the electronic circuit module 100 shown in FIG.
  • the circuit board 110 has a mounting surface 110A and a back surface 110B (a surface facing the mounting surface 110A).
  • a surface grounding electrode 111 having a plurality of surface grounding patterns 111A is provided on the mounting surface 110A of the circuit board 110.
  • the plurality of surface layer grounding patterns 111A are provided in the mounting area 110A1 (area in which the IC 120 is mounted) set near the central portion of the mounting surface 110A.
  • each of the plurality of surface layer grounding patterns 111A has a rectangular shape.
  • IC 120s are arranged on the plurality of surface layer grounding patterns 111A.
  • the grounding terminal 121 provided on the bottom surface of the IC 120 is connected to each of the plurality of surface grounding patterns 111A by soldering.
  • a back ground electrode 112 having a plurality of back ground patterns 112A is provided on the back 110B of the circuit board 110.
  • the plurality of back ground contact patterns 112A are provided in the inner region 110B1 (the region overlapping the mounting region 110A1 of the mounting surface 110A in a plan view from above) set near the central portion of the back surface 110B.
  • each of the plurality of back surface grounding patterns 112A is provided at a position overlapping each of the plurality of surface layer grounding patterns 111A in a plan view from above.
  • Each of the plurality of back ground patterns 112A is soldered to a corresponding electrode provided on an external substrate (not shown).
  • a plurality of external connection terminals 114 are provided in the outer region 110B2 (the region surrounding the inner region 110B1) set on the outer peripheral portion of the back surface 110B.
  • Each of the plurality of external connection terminals 114 is soldered to a corresponding electrode provided on an external substrate (not shown).
  • a plurality of heat dissipation vias 113 are formed around each of the plurality of surface grounding patterns 111A on the circuit board 110.
  • the heat radiating via 113 has a through-hole shape that penetrates the circuit board 110 in the vertical direction, and an electrode is formed on the inner wall. Further, usually, the inside of the heat radiating via 113 may be filled with a substance such as resin or metal.
  • the heat radiating via 113 connects the surface ground electrode 111 (see FIG. 6) provided on the mounting surface 110A of the circuit board 110 and the back ground electrode 112 (see FIG. 7) provided on the back surface 110B of the circuit board 110. To do.
  • the heat radiating via 113 releases the heat generated from the IC 120, which is an electronic component, from the back surface 110B of the circuit board 110 to the outside (for example, the motherboard) (hereinafter, the heat generated from the IC 120 is released to the back side of the circuit board 110). It is also provided to dissipate heat.
  • the outer surface ground electrode 115 is formed separately from the surface ground electrode 111 on the mounting surface 110A of the circuit board 110.
  • the surface grounding electrode 111 and the outer surface grounding electrode 115 are respectively provided on the inner layer grounding layer between the mounting surface 110A and the back surface 110B via the grounding via 117 extending downward from the mounting surface 110A. It is connected to the electrode 116.
  • electromagnetic noise transmitted from the outside to the metal cover 130 (hereinafter, also referred to as external noise) can be released to the inner layer grounding electrode 116 via the outer surface layer grounding electrode 115 and the grounding via 117.
  • the grounding via 117 function as an inductor element, it is possible to suppress the transmission of external noise, which is also a high frequency signal, from the outer surface grounding electrode 115 to the surface grounding electrode 111 via the grounding via 117. ..
  • external noise which is also a high frequency signal
  • the IC 120 is arranged to dissipate the heat applied from the soldering device when the metal cover 130 is soldered to the outer surface ground electrode 115. It makes it difficult to join the central part of the mounting surface 110A, and prevents the solder 118 from flowing into the central part of the mounting surface 110A when the metal cover 130 is soldered to the outer surface ground electrode 115. be able to.
  • the soldering device is used. It is possible to prevent the applied heat from being excessively dissipated from the outer surface layer ground electrode 115.
  • the electronic circuit module 100 of the present embodiment can suppress defects associated with soldering of the metal cover while improving the shielding property against electromagnetic noise. It should be noted that such an effect can be obtained even when the surface ground electrode 111 and the outer surface ground electrode 115 are connected to the back ground electrode 112 via the ground via 117. That is, the surface grounding electrode 111 and the outer surface grounding electrode 115 are provided on the layer on the back surface 110B side of the mounting surface 110A via the grounding via 117 (inner layer grounding electrode 116 or back grounding electrode 112). ) Should be connected.
  • FIG. 6 is a plan view of the circuit board 110 (state in which the heat dissipation via 113 is not formed) included in the electronic circuit module 100 according to the embodiment.
  • a plurality of rectangular surface grounding patterns 111A are arranged in a matrix in the mounting area 110A1 of the mounting surface 110A of the circuit board 110.
  • the resist 111B is applied to one rectangular surface grounding electrode 111 provided on the mounting surface 110A around the region where the plurality of surface grounding patterns 111A are formed. It is an exposed part (so-called land for soldering) formed by.
  • the electronic circuit module 100 of the present embodiment divides a predetermined region of the surface ground electrode 111 into a plurality of surface ground patterns 111A, so that voids can be easily released when the surface ground electrode 111 is soldered. It is possible to do.
  • FIG. 7 is a bottom view of the circuit board 110 (state in which the heat dissipation via 113 is not formed) included in the electronic circuit module 100 according to the embodiment.
  • a plurality of circular back grounding patterns 112A are arranged in a matrix in the inner region 110B1 of the back surface 110B of the circuit board 110.
  • the plurality of back grounding patterns 112A are formed by applying a resist 112B to a single rectangular back grounding electrode 112 provided on the back surface 110B around the region where the plurality of back grounding patterns 112A are formed. It is an exposed part (so-called land for soldering) to be formed.
  • the center spacing D2 of the two adjacent back grounding patterns 112A is the same as the center spacing D1 (see FIG. 6) of the two adjacent surface grounding patterns 111A.
  • the voids can be easily released when the back ground electrode 112 is soldered. It is possible to do.
  • FIG. 8 is a plan view of the circuit board 110 (state in which the heat dissipation via 113 is not formed) included in the electronic circuit module 100 according to the embodiment.
  • a plurality of back grounding patterns 112A provided on the back surface 110B of the circuit board 110 are superimposed on the plan view of the circuit board 110.
  • the plurality of back grounding patterns 112A are arranged in the same layout (3 ⁇ 3 matrix shape) as the plurality of surface grounding patterns 111A. Further, the center spacing D2 of the two adjacent back grounding patterns 112A is the same as the center spacing D1 of the two adjacent surface grounding patterns 111A. Therefore, as shown in FIG. 8, each of the plurality of back ground contact patterns 112A is arranged at a position overlapping each of the plurality of surface layer ground contact patterns 111A in a plan view from above.
  • each back surface grounding pattern 112A are the same as the external dimensions (length of one side) of each surface layer grounding pattern 111A, but the center position of each back surface grounding pattern 112A and each surface layer grounding pattern 111A. Since the center position is the same as that of the surface grounding pattern 112A, each back grounding pattern 112A is arranged so as not to protrude outward from the outer peripheral portion of the surface grounding pattern 111A.
  • FIG. 9 is a plan view of the circuit board 110 (state in which the heat dissipation via 113 is formed) included in the electronic circuit module 100 according to the embodiment. As shown in FIG. 9, a plurality of heat radiating vias 113 penetrating the circuit board 110 in the vertical direction are formed around each of the plurality of surface grounding patterns 111A.
  • each of the plurality of back grounding patterns 112A is arranged so as to overlap each of the plurality of surface grounding patterns 111A, as shown in FIG. 9, the heat dissipation via is provided.
  • a large number of heat dissipation vias 113 can be formed around the surface grounding pattern 111A and the back grounding pattern 112A without the 113 overlapping the surface grounding pattern 111A and the back grounding pattern 112A.
  • the electronic circuit module 100 of the present embodiment can efficiently form a larger number of heat radiating vias 113 around the surface grounding pattern 111A and the back grounding pattern 112A, and a plurality of heat radiating vias 113. Each of these can be formed at a position that does not overlap the surface grounding pattern 111A and the back grounding pattern 112A (a position that avoids the surface grounding pattern 111A and the back grounding pattern 112A).
  • the electronic circuit module 100 of the present embodiment can further enhance the heat dissipation effect of the heat generated from the IC 120. Further, the electronic circuit module 100 of the present embodiment can suppress the generation of voids due to the outflow of gas from the heat radiating via 113 at the time of soldering.
  • the shape of the surface grounding pattern 111A is rectangular and the shape of the back grounding pattern 112A is circular, but the shapes of the surface grounding pattern 111A and the back grounding pattern 112A are not limited to this. ..
  • the shapes of the surface grounding pattern 111A and the back grounding pattern 112A may both be circular or both may be rectangular, and one of the surface grounding pattern 111A and the back grounding pattern 112A may be other than circular or rectangular.
  • the shape of (regular polygon, etc.) may be used.
  • FIG. 10 is a plan view showing a modified example of the circuit board 110 included in the electronic circuit module 100 according to the embodiment.
  • 25 surface grounding patterns 111A arranged in a 5 ⁇ 5 matrix are provided at the center of the mounting surface 110A of the circuit board 110.
  • nine surface grounding patterns 111A arranged in a 3 ⁇ 3 matrix are provided at the center of the back surface 110B of the circuit board 110.
  • each back surface grounding pattern 112A are the same as the external dimensions (one side length) of each surface layer grounding pattern 111A.
  • the center spacing D3 of the two adjacent back ground contact patterns 112A is twice the center spacing D1 (see FIG. 6) of the two adjacent surface ground contact patterns 111A.
  • each back grounding pattern 112A is arranged at a position overlapping the surface grounding pattern 111A so as not to protrude outward from the outer peripheral portion of the surface grounding pattern 111A.
  • the heat dissipation via 113 does not overlap with the surface grounding pattern 111A and the back grounding pattern 112A, and the surface grounding pattern 111A and the back grounding pattern 112A are formed.
  • a large number of heat dissipation vias 113 can be formed around the periphery.
  • the center spacing of the two adjacent back grounding patterns 112A may be an integral multiple of three times or more the center spacing of the two adjacent surface grounding patterns 111A. Further, the center spacing of the two adjacent surface grounding patterns 111A may be an integral multiple of the center spacing of the two adjacent back grounding patterns 112A.
  • the electronic circuit module 100 is an electronic circuit including a circuit board 110 having a mounting surface 110A on which the IC 120 is mounted and a back surface 110B provided with an external connection terminal 114.
  • the circuit board 110 is provided on the mounting surface 110A and has a surface grounding electrode 111 having a plurality of surface grounding patterns 111A, and a back grounding electrode 112 provided on the back surface 110B and having a plurality of back grounding patterns 112A.
  • each of the plurality of surface grounding patterns 111A and each of the plurality of back grounding patterns 112A are arranged at positions where they overlap each other, and each of the plurality of heat dissipation vias 113 is arranged on the surface layer. It is arranged at a position that does not overlap with the grounding pattern 111A and the back grounding pattern 112A (a position avoiding the surface grounding pattern 111A and the back grounding pattern 112A).
  • the electronic circuit module 100 can efficiently form a larger number of heat dissipation vias 113 around the surface grounding pattern 111A and the back grounding pattern 112A, and a plurality of them.
  • Each of the heat radiating vias 113 can be formed at a position that does not overlap with the surface grounding pattern 111A and the back grounding pattern 112A.
  • the heat dissipation via 113 can be efficiently arranged while suppressing the generation of voids. Then, by efficiently arranging the heat radiating via 113, the heat generated from the IC 120 can be efficiently radiated to the back side of the circuit board 110.
  • a plurality of surface grounding patterns 111A and a plurality of backside grounding patterns 112A are arranged in a matrix on the circuit board 110.
  • the electronic circuit module 100 can more easily arrange the plurality of heat radiating vias 113.
  • the external dimensions and the installation interval of the surface grounding pattern 111A and the external dimensions and the installation interval of the rear grounding pattern 112A are the same in the circuit board 110.
  • the electronic circuit module 100 can more easily arrange the plurality of heat radiating vias 113.
  • the external dimensions of the surface grounding pattern 111A and the external dimensions of the rear grounding pattern 112A are the same on the circuit board 110, and the installation intervals of the surface grounding pattern 111A are the same. And the installation interval of the back grounding pattern 112A, one installation interval is an integral multiple of the other installation interval.
  • the electronic circuit module 100 can more easily arrange the plurality of heat radiating vias 113.
  • the surface grounding pattern 111A and the back grounding pattern 112A are around the surface grounding pattern 111A and the back grounding pattern 112A with respect to the surface grounding electrode 111 and the back grounding electrode 112. Is formed by applying a resist to the surface.
  • the electronic circuit module 100 can easily form the surface grounding pattern 111A and the back grounding pattern 112A.
  • the electronic circuit module 100 hangs down from each of the rectangular top plate portion 130A facing the mounting surface 110A and each of the four sides of the top plate portion 130A toward the mounting surface 110A. It has a side plate portion 130B provided, and further includes a metal cover 130 provided so as to cover the mounting surface 110A.
  • the electronic circuit module 100 By covering the mounting surface 110A of the circuit board 110 with the metal cover 130 in this way, the electronic circuit module 100 according to the embodiment of the present invention can enhance the shielding property against electromagnetic noise.
  • the circuit board 110 has an outer surface layer ground electrode 115 formed in an annular shape along the outer peripheral portion of the mounting surface 110A on the mounting surface 110A.
  • the side plate portion 130B is soldered to the outer surface ground electrode 115 over the entire circumference of the outer surface ground electrode 115.
  • the electronic circuit module 100 according to the embodiment of the present invention can be obtained by soldering the side plate portion 130B of the metal cover 130 to the outer surface ground electrode 115 over the entire circumference of the outer surface ground electrode 115.
  • the shielding property against electromagnetic noise can be further improved.
  • the outer surface ground electrode 115 is formed separately from the surface ground electrode 111 on the mounting surface 110A of the circuit board 110.
  • the surface grounding electrode 111 and the outer surface grounding electrode 115 are each provided on a layer on the back surface 110B side of the mounting surface 110A via a grounding via 117 extending downward from the mounting surface 110A. It is connected to (inner layer ground electrode 116 or back ground electrode 112).
  • the electronic circuit module 100 according to the embodiment of the present invention can further enhance the shielding property against electromagnetic noise and suppress defects due to soldering of the metal cover.
  • a structure is a structure in which it is difficult to dissipate the heat generated from the electronic component to the outer peripheral side, the heat generated from the electronic component can be efficiently dissipated to the back side of the circuit board 110.
  • the features of the invention are particularly effective in such structures.
  • the present invention is also applicable to an electronic circuit module having no metal cover (for example, an electronic circuit module in which electronic components are resin-sealed).

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Structure Of Printed Boards (AREA)
  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)

Abstract

An electronic circuit module according to the present invention is provided with a circuit board having a mounting surface on which an electronic component is mounted and a rear surface on which an external connection terminal is provided. The circuit board has: a front-layer ground electrode that is provided on the mounting surface and that has a plurality of front-layer ground patterns; a rear-surface ground electrode that is provided on the rear surface and that has a plurality of rear-surface ground patterns; and a plurality of heat-dissipating vias for connecting the front-layer ground electrode and the rear-surface ground electrode. In a prescribed region of the circuit board in which the front-layer ground electrode and the rear-surface ground electrode overlap each other, each of the plurality of front-layer ground patterns and each of the plurality of rear-surface ground patterns are disposed at mutually overlapping positions. Each of the plurality of heat-dissipating vias is disposed at a position avoiding the front-layer ground patterns and the rear-surface ground patterns.

Description

電子回路モジュールElectronic circuit module
 本発明は、電子回路モジュールに関する。 The present invention relates to an electronic circuit module.
 従来、通信装置等に用いられる電子回路モジュールにおいて、回路基板の実装面に設けられた表層接地電極と、回路基板の背面(実装面と対向する面)に設けられた背面接地電極とを、放熱用ビアによって接続することにより、電子部品から発せられた熱を、回路基板の背面側に放熱できるようにした技術が考案されている(例えば、下記特許文献1,2参照)。 Conventionally, in an electronic circuit module used for a communication device or the like, heat is dissipated from a surface grounding electrode provided on a mounting surface of a circuit board and a back grounding electrode provided on the back surface (a surface facing the mounting surface) of the circuit board. A technique has been devised in which heat generated from an electronic component can be dissipated to the back side of a circuit board by connecting with a via (for example, see Patent Documents 1 and 2 below).
特開2005-210044号公報Japanese Unexamined Patent Publication No. 2005-210044 特開2010-021456号公報Japanese Unexamined Patent Publication No. 2010-021456
 しかしながら、表層接地電極に表層接地パターン(半田付け用のランド)を設け、背面接地電極に背面接地パターン(半田付け用のランド)を設けた場合において、表層接地パターンと背面接地パターンとが重なる位置に放熱用ビアを設けた場合、半田付け時に放熱用ビアからのガスの流出によってボイドが生じる虞がある。そこで、表層接地パターンと背面接地パターンとを回避した位置に放熱用ビアを形成することで、ボイドの発生を抑制する方法が考えられる。しかしながら、従来、表層接地パターンと背面接地パターンとが互いに無関係に配置されるため、放熱用ビアの配置可能な領域(すなわち、表層接地パターンと背面接地パターンとを回避した領域)が比較的少なく、放熱用ビアを効率的に配置することができない。 However, when the surface grounding electrode is provided with the surface grounding pattern (land for soldering) and the back grounding electrode is provided with the back grounding pattern (land for soldering), the position where the surface grounding pattern and the back grounding pattern overlap. If a heat radiating via is provided on the ground, voids may occur due to the outflow of gas from the heat radiating via during soldering. Therefore, a method of suppressing the generation of voids can be considered by forming a heat dissipation via at a position avoiding the surface grounding pattern and the back grounding pattern. However, conventionally, since the surface ground pattern and the back ground pattern are arranged independently of each other, the area where the heat dissipation via can be arranged (that is, the area where the surface ground pattern and the back ground pattern are avoided) is relatively small. The heat dissipation via cannot be arranged efficiently.
 そこで、本発明の発明者らは、ボイドの発生を抑制しつつ、放熱用ビアを効率的に配置することが可能な技術の必要性を見出した。 Therefore, the inventors of the present invention have found the need for a technique capable of efficiently arranging heat dissipation vias while suppressing the generation of voids.
 一実施形態の電子回路モジュールは、電子部品が実装される実装面と、外部接続端子が設けられる背面とを有する回路基板を備えた電子回路モジュールであって、回路基板は、実装面に設けられ、複数の表層接地パターンを有する表層接地電極と、背面に設けられ、複数の背面接地パターンを有する背面接地電極と、表層接地電極と背面接地電極とを接続する複数の放熱用ビアと、を有し、回路基板の表層接地電極と背面接地電極とが重なる所定の領域において、複数の表層接地パターンの各々と、複数の背面接地パターンの各々とが、互いに重なる位置に配置されており、複数の放熱用ビアの各々が、表層接地パターンおよび背面接地パターンを回避した位置に配置されている。 The electronic circuit module of one embodiment is an electronic circuit module including a circuit board having a mounting surface on which electronic components are mounted and a back surface provided with external connection terminals, and the circuit board is provided on the mounting surface. , A surface ground electrode having a plurality of surface ground patterns, a back ground electrode provided on the back surface having a plurality of back ground patterns, and a plurality of heat dissipation vias connecting the surface ground electrode and the back ground electrode. However, in a predetermined region where the surface ground electrode and the back ground electrode of the circuit board overlap, each of the plurality of surface ground patterns and each of the plurality of back ground patterns are arranged at positions where they overlap each other, and a plurality of them. Each of the heat radiating vias is arranged at a position avoiding the surface grounding pattern and the back grounding pattern.
 一実施形態によれば、ボイドの発生を抑制しつつ、放熱用ビアを効率的に配置することができる。 According to one embodiment, heat dissipation vias can be efficiently arranged while suppressing the generation of voids.
一実施形態に係る電子回路モジュールの外観斜視図External perspective view of the electronic circuit module according to one embodiment 一実施形態に係る電子回路モジュールの外観斜視図External perspective view of the electronic circuit module according to one embodiment 一実施形態に係る電子回路モジュールが備えるICの構成を示す図The figure which shows the structure of the IC provided in the electronic circuit module which concerns on one Embodiment. 一実施形態に係る電子回路モジュールの平面図Top view of the electronic circuit module according to one embodiment 図4に示す電子回路モジュールのA-A断面図AA sectional view of the electronic circuit module shown in FIG. 一実施形態に係る電子回路モジュールが備える回路基板(放熱用ビアが形成されていない状態)の平面図Top view of the circuit board (state in which the heat dissipation via is not formed) included in the electronic circuit module according to the embodiment. 一実施形態に係る電子回路モジュールが備える回路基板(放熱用ビアが形成されていない状態)の底面図Bottom view of the circuit board (state in which heat dissipation vias are not formed) included in the electronic circuit module according to the embodiment. 一実施形態に係る電子回路モジュールが備える回路基板(放熱用ビアが形成されていない状態)の平面図Top view of the circuit board (state in which the heat dissipation via is not formed) included in the electronic circuit module according to the embodiment. 一実施形態に係る電子回路モジュールが備える回路基板(放熱用ビアが形成された状態)の平面図Top view of the circuit board (state in which heat dissipation vias are formed) included in the electronic circuit module according to the embodiment. 一実施形態に係る電子回路モジュールが備える回路基板の変形例を示す平面図A plan view showing a modification of the circuit board included in the electronic circuit module according to the embodiment.
 〔一実施形態〕
 以下、図面を参照して、一実施形態について説明する。なお、以下の説明では、本発明の特徴を判り易く説明するために、便宜的に回路基板の実装面のある側を上側、背面のある側を下側として説明を進めるが、このことは電子回路モジュールの使用時の方向を限定するものではなく、上下を逆転して使用したり、横に向けて使用したり、斜めに傾けて使用したりしても構わない。また、以下の説明では、「上方からの平面視において2つの部分が重なる」ことを、単純に「2つの部分が重なる」という場合もある。
[One Embodiment]
Hereinafter, one embodiment will be described with reference to the drawings. In the following description, in order to explain the features of the present invention in an easy-to-understand manner, the description will proceed with the side with the mounting surface of the circuit board as the upper side and the side with the back surface as the lower side for convenience. The direction in which the circuit module is used is not limited, and the circuit module may be used upside down, sideways, or tilted at an angle. Further, in the following description, "the two parts overlap in a plan view from above" may be simply referred to as "the two parts overlap".
 (電子回路モジュール100の概略構成)
 図1および図2は、一実施形態に係る電子回路モジュール100の外観斜視図である。図1および図2に示す電子回路モジュール100は、各種電気製品に実装されることにより、当該電子回路モジュール100が備える電子回路によって、特定の機能(例えば、LTE(Long Term Evolution)(登録商標)、Bluetooth(登録商標)、Wi-Fi(登録商標)等の無線通信機能)を実現するための装置である。
(Rough configuration of electronic circuit module 100)
1 and 2 are external perspective views of the electronic circuit module 100 according to the embodiment. The electronic circuit module 100 shown in FIGS. 1 and 2 can be mounted on various electric products to have a specific function (for example, LTE (Long Term Evolution) (registered trademark)) by the electronic circuit included in the electronic circuit module 100. , Bluetooth (registered trademark), Wi-Fi (registered trademark), and other wireless communication functions).
 図1および図2に示すように、電子回路モジュール100は、全体的に薄型の直方体形状を有している。電子回路モジュール100は、回路基板110、IC(Integrated Circuit)120、および金属カバー130を備える。図1は、金属カバー130が回路基板110に取り付けられた状態の電子回路モジュール100を示す。図2は、金属カバー130が回路基板110に取り付けられていない状態の電子回路モジュール100を示す。 As shown in FIGS. 1 and 2, the electronic circuit module 100 has a thin rectangular parallelepiped shape as a whole. The electronic circuit module 100 includes a circuit board 110, an IC (Integrated Circuit) 120, and a metal cover 130. FIG. 1 shows an electronic circuit module 100 with a metal cover 130 attached to a circuit board 110. FIG. 2 shows an electronic circuit module 100 in a state where the metal cover 130 is not attached to the circuit board 110.
 回路基板110は、平板状且つ矩形状の部材である。回路基板110の表面は、各種電子部品が実装される実装面110Aとなっている。回路基板110としては、例えば、PWB(Printed Wiring Board)が用いられる。 The circuit board 110 is a flat plate-shaped and rectangular member. The surface of the circuit board 110 is a mounting surface 110A on which various electronic components are mounted. As the circuit board 110, for example, a PWB (Printed Wiring Board) is used.
 本実施形態では、実装面110Aに実装される電子部品の一例として、IC120を用いているが、これに限らず、実装面110Aには、その他の電子部品や、配線パターン等も実装され得る。 In the present embodiment, the IC 120 is used as an example of the electronic components mounted on the mounting surface 110A, but the present invention is not limited to this, and other electronic components, wiring patterns, and the like can be mounted on the mounting surface 110A.
 図2に示すように、実装面110Aには、外側表層接地電極115が設けられている。外側表層接地電極115は、実装面110Aの外周部に沿って環状に形成された薄膜状の電極である。外側表層接地電極115には、金属カバー130が半田付けによって固定される。例えば、外側表層接地電極115は、各種導電膜(例えば、銅膜)が用いられて形成される。 As shown in FIG. 2, the outer surface layer ground electrode 115 is provided on the mounting surface 110A. The outer surface layer ground electrode 115 is a thin-film electrode formed in an annular shape along the outer peripheral portion of the mounting surface 110A. A metal cover 130 is fixed to the outer surface ground electrode 115 by soldering. For example, the outer surface layer ground electrode 115 is formed by using various conductive films (for example, a copper film).
 IC120は、電子回路モジュール100の電子回路が備える主要構成部品である。IC120は、例えば回路基板110の実装面110Aの中央部付近に実装される。IC120は、プロセッサ、メモリ等を備えて構成されている。例えば、IC120は、メモリに記憶されたプログラムを、プロセッサが実行することにより、電子回路モジュール100の各種機能を実現する。 The IC 120 is a main component included in the electronic circuit of the electronic circuit module 100. The IC 120 is mounted near the center of the mounting surface 110A of the circuit board 110, for example. The IC 120 is configured to include a processor, a memory, and the like. For example, the IC 120 realizes various functions of the electronic circuit module 100 by executing a program stored in a memory by a processor.
 金属カバー130は、回路基板110の実装面110Aを覆う金属製の部材である。金属カバー130は、矩形状の天板部130Aと、天板部130Aの四辺の各々から下方へ垂設された4つの側板部130Bとを有する。金属カバー130は、下部が開口した、薄型の直方体形状を有する。金属カバー130は、外側表層接地電極115の全周に亘って、4つの側板部130Bの各々が、外側表層接地電極115に対して半田付けによって固定およびグラウンド接続される。金属カバー130は、回路基板110の実装面110Aを覆うことにより、電子回路の一部であるIC120を外部の衝撃等から保護するとともに、IC120からの電磁波ノイズの漏出およびIC120への電磁波ノイズの侵入を抑制して、電磁波ノイズに対するシールド性を高めている。 The metal cover 130 is a metal member that covers the mounting surface 110A of the circuit board 110. The metal cover 130 has a rectangular top plate portion 130A and four side plate portions 130B vertically hung downward from each of the four sides of the top plate portion 130A. The metal cover 130 has a thin rectangular parallelepiped shape with an open bottom. In the metal cover 130, each of the four side plate portions 130B is fixed and ground-connected to the outer surface ground electrode 115 by soldering over the entire circumference of the outer surface ground electrode 115. By covering the mounting surface 110A of the circuit board 110, the metal cover 130 protects the IC 120, which is a part of the electronic circuit, from external impacts and the like, and at the same time, leaks electromagnetic noise from the IC 120 and invades the IC 120. Is suppressed to improve the shielding property against electromagnetic noise.
 (IC120の構成)
 図3は、一実施形態に係る電子回路モジュール100が備えるIC120の構成を示す図である。図3(a)は、IC120の側面図である。図3(b)は、IC120の底面図である。図3(b)に示すように、IC120の底面の中央部には、矩形状の接地用端子121が設けられている。また、図3(a)および図3(b)に示すように、IC120の外周部には、複数の電気信号用端子122が並べて設けられている。
(Configuration of IC120)
FIG. 3 is a diagram showing a configuration of an IC 120 included in the electronic circuit module 100 according to the embodiment. FIG. 3A is a side view of the IC 120. FIG. 3B is a bottom view of the IC 120. As shown in FIG. 3B, a rectangular grounding terminal 121 is provided at the center of the bottom surface of the IC 120. Further, as shown in FIGS. 3A and 3B, a plurality of electrical signal terminals 122 are provided side by side on the outer peripheral portion of the IC 120.
 (電子回路モジュール100の構成)
 図4は、一実施形態に係る電子回路モジュール100の平面図である。図5は、図4に示す電子回路モジュール100のA-A断面図である。
(Configuration of Electronic Circuit Module 100)
FIG. 4 is a plan view of the electronic circuit module 100 according to the embodiment. FIG. 5 is a sectional view taken along the line AA of the electronic circuit module 100 shown in FIG.
 図4および図5に示すように、回路基板110は、実装面110Aと背面110B(実装面110Aと対向する面)とを有している。回路基板110の実装面110Aには、複数の表層接地パターン111Aを有する表層接地電極111が設けられている。複数の表層接地パターン111Aは、実装面110Aの中央部付近に設定された実装領域110A1(IC120が実装される領域)に設けられている。図4に示す例では、複数の表層接地パターン111Aは、いずれも矩形状を有している。 As shown in FIGS. 4 and 5, the circuit board 110 has a mounting surface 110A and a back surface 110B (a surface facing the mounting surface 110A). A surface grounding electrode 111 having a plurality of surface grounding patterns 111A is provided on the mounting surface 110A of the circuit board 110. The plurality of surface layer grounding patterns 111A are provided in the mounting area 110A1 (area in which the IC 120 is mounted) set near the central portion of the mounting surface 110A. In the example shown in FIG. 4, each of the plurality of surface layer grounding patterns 111A has a rectangular shape.
 また、図4および図5に示すように、複数の表層接地パターン111A上には、IC120が配置されている。IC120の底面に設けられた接地用端子121は、複数の表層接地パターン111Aの各々に対して、半田付けによって接続されている。 Further, as shown in FIGS. 4 and 5, IC 120s are arranged on the plurality of surface layer grounding patterns 111A. The grounding terminal 121 provided on the bottom surface of the IC 120 is connected to each of the plurality of surface grounding patterns 111A by soldering.
 また、図5に示すように、回路基板110の背面110Bには、複数の背面接地パターン112Aを有する背面接地電極112が設けられている。複数の背面接地パターン112Aは、背面110Bの中央部付近に設定された内側領域110B1(上方からの平面視において、実装面110Aの実装領域110A1と重なる領域)に設けられている。また、図5に示すように、複数の背面接地パターン112Aの各々は、上方からの平面視において、複数の表層接地パターン111Aの各々と重なる位置に設けられている。複数の背面接地パターン112Aの各々は、外部の基板(図示省略)に設けられた対応する電極に対して、半田付けによって接続される。 Further, as shown in FIG. 5, a back ground electrode 112 having a plurality of back ground patterns 112A is provided on the back 110B of the circuit board 110. The plurality of back ground contact patterns 112A are provided in the inner region 110B1 (the region overlapping the mounting region 110A1 of the mounting surface 110A in a plan view from above) set near the central portion of the back surface 110B. Further, as shown in FIG. 5, each of the plurality of back surface grounding patterns 112A is provided at a position overlapping each of the plurality of surface layer grounding patterns 111A in a plan view from above. Each of the plurality of back ground patterns 112A is soldered to a corresponding electrode provided on an external substrate (not shown).
 また、図5に示すように、背面110Bの外周部に設定された外側領域110B2(内側領域110B1を取り囲む領域)には、複数の外部接続端子114が設けられている。複数の外部接続端子114の各々は、外部の基板(図示省略)に設けられた対応する電極に対して、半田付けによって接続される。 Further, as shown in FIG. 5, a plurality of external connection terminals 114 are provided in the outer region 110B2 (the region surrounding the inner region 110B1) set on the outer peripheral portion of the back surface 110B. Each of the plurality of external connection terminals 114 is soldered to a corresponding electrode provided on an external substrate (not shown).
 また、図4および図5に示すように、回路基板110における複数の表層接地パターン111Aの各々の周囲には、複数の放熱用ビア113が形成されている。放熱用ビア113は、回路基板110を上下方向に貫通する貫通孔形状を有しており、且つ、内壁に電極が形成されている。また、通常、放熱用ビア113の内部には樹脂や金属等の物質が充填されていても構わない。放熱用ビア113は、回路基板110の実装面110Aに設けられた表層接地電極111(図6参照)と、回路基板110の背面110Bに設けられた背面接地電極112(図7参照)とを接続する。放熱用ビア113は、電子部品であるIC120から発せられた熱を、回路基板110の背面110Bから外部(例えば、マザーボード)へ放出する(以下、IC120から発せられた熱を回路基板110の背面側に放熱するともいう)ために設けられている。 Further, as shown in FIGS. 4 and 5, a plurality of heat dissipation vias 113 are formed around each of the plurality of surface grounding patterns 111A on the circuit board 110. The heat radiating via 113 has a through-hole shape that penetrates the circuit board 110 in the vertical direction, and an electrode is formed on the inner wall. Further, usually, the inside of the heat radiating via 113 may be filled with a substance such as resin or metal. The heat radiating via 113 connects the surface ground electrode 111 (see FIG. 6) provided on the mounting surface 110A of the circuit board 110 and the back ground electrode 112 (see FIG. 7) provided on the back surface 110B of the circuit board 110. To do. The heat radiating via 113 releases the heat generated from the IC 120, which is an electronic component, from the back surface 110B of the circuit board 110 to the outside (for example, the motherboard) (hereinafter, the heat generated from the IC 120 is released to the back side of the circuit board 110). It is also provided to dissipate heat.
 また、図5に示すように、回路基板110の実装面110Aにおいて、外側表層接地電極115は、表層接地電極111と分離して形成されている。そして、表層接地電極111と外側表層接地電極115とは、それぞれ実装面110Aから下方に延出する接地用ビア117を介して、実装面110Aと背面110Bとの間の層に設けられた内層接地電極116に接続されている。 Further, as shown in FIG. 5, the outer surface ground electrode 115 is formed separately from the surface ground electrode 111 on the mounting surface 110A of the circuit board 110. The surface grounding electrode 111 and the outer surface grounding electrode 115 are respectively provided on the inner layer grounding layer between the mounting surface 110A and the back surface 110B via the grounding via 117 extending downward from the mounting surface 110A. It is connected to the electrode 116.
 これにより、外部から金属カバー130に伝わる電磁波ノイズ(以下、外来ノイズともいう)を、外側表層接地電極115および接地用ビア117を介して、内層接地電極116へ逃がすことができる。また、接地用ビア117をインダクタ素子として機能させることで、高周波信号でもある外来ノイズが外側表層接地電極115から接地用ビア117を介して表層接地電極111に伝達されるのを抑制することができる。これにより、外部からIC120への電磁波ノイズの侵入を抑制することができる。また、同様にIC120から外部への電磁波ノイズの漏出を抑制することができる。 As a result, electromagnetic noise transmitted from the outside to the metal cover 130 (hereinafter, also referred to as external noise) can be released to the inner layer grounding electrode 116 via the outer surface layer grounding electrode 115 and the grounding via 117. Further, by making the grounding via 117 function as an inductor element, it is possible to suppress the transmission of external noise, which is also a high frequency signal, from the outer surface grounding electrode 115 to the surface grounding electrode 111 via the grounding via 117. .. As a result, it is possible to suppress the intrusion of electromagnetic noise from the outside into the IC 120. Similarly, leakage of electromagnetic noise from the IC 120 to the outside can be suppressed.
 また、外側表層接地電極115が表層接地電極111と分離されているため、金属カバー130を外側表層接地電極115に半田付けする際に、半田付け装置から加えられた熱を、IC120が配置されている実装面110Aの中央部側に加わり難くしたり、金属カバー130を外側表層接地電極115に半田付けする際に、半田118が実装面110Aの中央部側に流れ込んでしまうことを抑制したりすることができる。 Further, since the outer surface ground electrode 115 is separated from the surface ground electrode 111, the IC 120 is arranged to dissipate the heat applied from the soldering device when the metal cover 130 is soldered to the outer surface ground electrode 115. It makes it difficult to join the central part of the mounting surface 110A, and prevents the solder 118 from flowing into the central part of the mounting surface 110A when the metal cover 130 is soldered to the outer surface ground electrode 115. be able to.
 また、外側表層接地電極115を表層接地電極111と分離することにより、外側表層接地電極115の面積を小さくできるため、金属カバー130を外側表層接地電極115に半田付けする際に、半田付け装置から加えられた熱が外側表層接地電極115から過度に放熱されてしまうことを抑制することができる。 Further, by separating the outer surface ground electrode 115 from the surface ground electrode 111, the area of the outer surface ground electrode 115 can be reduced. Therefore, when the metal cover 130 is soldered to the outer surface ground electrode 115, the soldering device is used. It is possible to prevent the applied heat from being excessively dissipated from the outer surface layer ground electrode 115.
 このように、本実施形態の電子回路モジュール100は、電磁波ノイズに対するシールド性を高めつつ、金属カバーの半田付けに伴う不具合を抑制することができる。なお、このような効果は、表層接地電極111と外側表層接地電極115とが、接地用ビア117を介して、背面接地電極112と接続されていても得ることができる。すなわち、表層接地電極111と外側表層接地電極115とは、接地用ビア117を介して、実装面110Aよりも背面110B側の層に設けられた下層接地電極(内層接地電極116または背面接地電極112)と接続されていればよい。 As described above, the electronic circuit module 100 of the present embodiment can suppress defects associated with soldering of the metal cover while improving the shielding property against electromagnetic noise. It should be noted that such an effect can be obtained even when the surface ground electrode 111 and the outer surface ground electrode 115 are connected to the back ground electrode 112 via the ground via 117. That is, the surface grounding electrode 111 and the outer surface grounding electrode 115 are provided on the layer on the back surface 110B side of the mounting surface 110A via the grounding via 117 (inner layer grounding electrode 116 or back grounding electrode 112). ) Should be connected.
 次に、図6~図9を参照して、表層接地パターン111A、背面接地パターン112A、および放熱用ビア113の配置位置について説明する。 Next, with reference to FIGS. 6 to 9, the arrangement positions of the surface grounding pattern 111A, the rear grounding pattern 112A, and the heat dissipation via 113 will be described.
 図6は、一実施形態に係る電子回路モジュール100が備える回路基板110(放熱用ビア113が形成されていない状態)の平面図である。図6に示すように、回路基板110の実装面110Aの実装領域110A1には、複数の矩形状の表層接地パターン111Aがマトリクス状に配置されている。複数の表層接地パターン111Aは、実装面110Aに設けられた一枚の矩形状の表層接地電極111に対して、当該複数の表層接地パターン111Aが形成される領域の周囲にレジスト111Bを塗布することによって形成される露出部分(いわゆる、半田付け用のランド)である。このように、本実施形態の電子回路モジュール100は、表層接地電極111の所定の領域を複数の表層接地パターン111Aに区分することで、表層接地電極111を半田付けする際に、ボイドを逃がし易くすることが可能となっている。 FIG. 6 is a plan view of the circuit board 110 (state in which the heat dissipation via 113 is not formed) included in the electronic circuit module 100 according to the embodiment. As shown in FIG. 6, a plurality of rectangular surface grounding patterns 111A are arranged in a matrix in the mounting area 110A1 of the mounting surface 110A of the circuit board 110. In the plurality of surface grounding patterns 111A, the resist 111B is applied to one rectangular surface grounding electrode 111 provided on the mounting surface 110A around the region where the plurality of surface grounding patterns 111A are formed. It is an exposed part (so-called land for soldering) formed by. As described above, the electronic circuit module 100 of the present embodiment divides a predetermined region of the surface ground electrode 111 into a plurality of surface ground patterns 111A, so that voids can be easily released when the surface ground electrode 111 is soldered. It is possible to do.
 図7は、一実施形態に係る電子回路モジュール100が備える回路基板110(放熱用ビア113が形成されていない状態)の底面図である。図7に示すように、回路基板110の背面110Bの内側領域110B1には、複数の円形状の背面接地パターン112Aがマトリクス状に配置されている。複数の背面接地パターン112Aは、背面110Bに設けられた一枚の矩形状の背面接地電極112に対して、当該複数の背面接地パターン112Aが形成される領域の周囲にレジスト112Bを塗布することによって形成される露出部分(いわゆる、半田付け用のランド)である。ここで、隣接する2つの背面接地パターン112Aの中心間隔D2は、隣接する2つの表層接地パターン111Aの中心間隔D1(図6参照)と同じである。このように、本実施形態の電子回路モジュール100は、背面接地電極112の所定の領域を複数の背面接地パターン112Aに区分することで、背面接地電極112を半田付けする際に、ボイドを逃がし易くすることが可能となっている。 FIG. 7 is a bottom view of the circuit board 110 (state in which the heat dissipation via 113 is not formed) included in the electronic circuit module 100 according to the embodiment. As shown in FIG. 7, a plurality of circular back grounding patterns 112A are arranged in a matrix in the inner region 110B1 of the back surface 110B of the circuit board 110. The plurality of back grounding patterns 112A are formed by applying a resist 112B to a single rectangular back grounding electrode 112 provided on the back surface 110B around the region where the plurality of back grounding patterns 112A are formed. It is an exposed part (so-called land for soldering) to be formed. Here, the center spacing D2 of the two adjacent back grounding patterns 112A is the same as the center spacing D1 (see FIG. 6) of the two adjacent surface grounding patterns 111A. As described above, in the electronic circuit module 100 of the present embodiment, by dividing the predetermined region of the back ground electrode 112 into a plurality of back ground patterns 112A, the voids can be easily released when the back ground electrode 112 is soldered. It is possible to do.
 図8は、一実施形態に係る電子回路モジュール100が備える回路基板110(放熱用ビア113が形成されていない状態)の平面図である。図8では、回路基板110の平面図に対して、回路基板110の背面110Bに設けられた複数の背面接地パターン112Aが重ねて示されている。 FIG. 8 is a plan view of the circuit board 110 (state in which the heat dissipation via 113 is not formed) included in the electronic circuit module 100 according to the embodiment. In FIG. 8, a plurality of back grounding patterns 112A provided on the back surface 110B of the circuit board 110 are superimposed on the plan view of the circuit board 110.
 図8に示すように、複数の背面接地パターン112Aは、複数の表層接地パターン111Aと同じレイアウト(3×3のマトリクス状)に配置されている。また、隣接する2つの背面接地パターン112Aの中心間隔D2は、隣接する2つの表層接地パターン111Aの中心間隔D1と同じである。このため、図8に示すように、上方からの平面視において、複数の背面接地パターン112Aの各々は、複数の表層接地パターン111Aの各々と重なる位置に配置されている。 As shown in FIG. 8, the plurality of back grounding patterns 112A are arranged in the same layout (3 × 3 matrix shape) as the plurality of surface grounding patterns 111A. Further, the center spacing D2 of the two adjacent back grounding patterns 112A is the same as the center spacing D1 of the two adjacent surface grounding patterns 111A. Therefore, as shown in FIG. 8, each of the plurality of back ground contact patterns 112A is arranged at a position overlapping each of the plurality of surface layer ground contact patterns 111A in a plan view from above.
 また、各背面接地パターン112Aの外形寸法(直径)は、各表層接地パターン111Aの外形寸法(一辺の長さ)と同じであるが、各背面接地パターン112Aの中心位置と、各表層接地パターン111Aの中心位置とが同じであるため、各背面接地パターン112Aは、表層接地パターン111Aの外周部から外側へはみ出さないように配置されている。 Further, the external dimensions (diameter) of each back surface grounding pattern 112A are the same as the external dimensions (length of one side) of each surface layer grounding pattern 111A, but the center position of each back surface grounding pattern 112A and each surface layer grounding pattern 111A. Since the center position is the same as that of the surface grounding pattern 112A, each back grounding pattern 112A is arranged so as not to protrude outward from the outer peripheral portion of the surface grounding pattern 111A.
 図9は、一実施形態に係る電子回路モジュール100が備える回路基板110(放熱用ビア113が形成された状態)の平面図である。図9に示すように、複数の表層接地パターン111Aの各々の周囲には、回路基板110を上下方向に貫通する複数の放熱用ビア113が形成されている。 FIG. 9 is a plan view of the circuit board 110 (state in which the heat dissipation via 113 is formed) included in the electronic circuit module 100 according to the embodiment. As shown in FIG. 9, a plurality of heat radiating vias 113 penetrating the circuit board 110 in the vertical direction are formed around each of the plurality of surface grounding patterns 111A.
 ここで、本実施形態の回路基板110は、複数の背面接地パターン112Aの各々が、複数の表層接地パターン111Aの各々と重なるように配置されているため、図9に示すように、放熱用ビア113が表層接地パターン111Aおよび背面接地パターン112Aと重なってしまうことなく、表層接地パターン111Aおよび背面接地パターン112Aの周囲に、多数の放熱用ビア113を形成することができる。 Here, in the circuit board 110 of the present embodiment, since each of the plurality of back grounding patterns 112A is arranged so as to overlap each of the plurality of surface grounding patterns 111A, as shown in FIG. 9, the heat dissipation via is provided. A large number of heat dissipation vias 113 can be formed around the surface grounding pattern 111A and the back grounding pattern 112A without the 113 overlapping the surface grounding pattern 111A and the back grounding pattern 112A.
 すなわち、本実施形態の電子回路モジュール100は、表層接地パターン111Aおよび背面接地パターン112Aの周囲に、より多数の放熱用ビア113を効率的に形成することができ、且つ、複数の放熱用ビア113の各々を、表層接地パターン111Aおよび背面接地パターン112Aと重ならない位置(表層接地パターン111Aおよび背面接地パターン112Aを回避した位置)に形成することができる。 That is, the electronic circuit module 100 of the present embodiment can efficiently form a larger number of heat radiating vias 113 around the surface grounding pattern 111A and the back grounding pattern 112A, and a plurality of heat radiating vias 113. Each of these can be formed at a position that does not overlap the surface grounding pattern 111A and the back grounding pattern 112A (a position that avoids the surface grounding pattern 111A and the back grounding pattern 112A).
 このため、本実施形態の電子回路モジュール100は、IC120から発せられた熱の放熱効果をより高めることができる。また、本実施形態の電子回路モジュール100は、半田付け時において、放熱用ビア113からのガスの流出によるボイドの発生を抑制することができる。 Therefore, the electronic circuit module 100 of the present embodiment can further enhance the heat dissipation effect of the heat generated from the IC 120. Further, the electronic circuit module 100 of the present embodiment can suppress the generation of voids due to the outflow of gas from the heat radiating via 113 at the time of soldering.
 なお、本実施形態では、表層接地パターン111Aの形状を矩形状、背面接地パターン112Aの形状を円形状としたが、表層接地パターン111Aおよび背面接地パターン112Aの形状はこれに限定されるものではない。表層接地パターン111Aおよび背面接地パターン112Aの形状をともに円形状としたり、ともに矩形状としたりしても構わないし、表層接地パターン111Aと背面接地パターン112Aとのうちの一方を円形状や矩形状以外の形状(正多角形等)としても構わない。 In the present embodiment, the shape of the surface grounding pattern 111A is rectangular and the shape of the back grounding pattern 112A is circular, but the shapes of the surface grounding pattern 111A and the back grounding pattern 112A are not limited to this. .. The shapes of the surface grounding pattern 111A and the back grounding pattern 112A may both be circular or both may be rectangular, and one of the surface grounding pattern 111A and the back grounding pattern 112A may be other than circular or rectangular. The shape of (regular polygon, etc.) may be used.
 (回路基板110の変形例)
 図10は、一実施形態に係る電子回路モジュール100が備える回路基板110の変形例を示す平面図である。
(Modification example of circuit board 110)
FIG. 10 is a plan view showing a modified example of the circuit board 110 included in the electronic circuit module 100 according to the embodiment.
 図10に示す例では、回路基板110の実装面110Aの中央部には、5×5のマトリクス状に配置された、25個の表層接地パターン111Aが設けられている。一方、図10に示す例では、回路基板110の背面110Bの中央部には、3×3のマトリクス状に配置された、9個の表層接地パターン111Aが設けられている。 In the example shown in FIG. 10, 25 surface grounding patterns 111A arranged in a 5 × 5 matrix are provided at the center of the mounting surface 110A of the circuit board 110. On the other hand, in the example shown in FIG. 10, nine surface grounding patterns 111A arranged in a 3 × 3 matrix are provided at the center of the back surface 110B of the circuit board 110.
 ここで、各背面接地パターン112Aの外形寸法(直径)は、各表層接地パターン111Aの外形寸法(一辺の長さ)と同じである。また、隣接する2つの背面接地パターン112Aの中心間隔D3は、隣接する2つの表層接地パターン111Aの中心間隔D1(図6参照)の2倍である。 Here, the external dimensions (diameter) of each back surface grounding pattern 112A are the same as the external dimensions (one side length) of each surface layer grounding pattern 111A. Further, the center spacing D3 of the two adjacent back ground contact patterns 112A is twice the center spacing D1 (see FIG. 6) of the two adjacent surface ground contact patterns 111A.
 このため、図10に示すように、各背面接地パターン112Aは、表層接地パターン111Aの外周部から外側へはみ出さないように、表層接地パターン111Aと重なる位置に配置されている。 Therefore, as shown in FIG. 10, each back grounding pattern 112A is arranged at a position overlapping the surface grounding pattern 111A so as not to protrude outward from the outer peripheral portion of the surface grounding pattern 111A.
 これにより、本変形例の回路基板110は、図10に示すように、放熱用ビア113が表層接地パターン111Aおよび背面接地パターン112Aと重なってしまうことなく、表層接地パターン111Aおよび背面接地パターン112Aの周囲に、多数の放熱用ビア113を形成することができる。 As a result, in the circuit board 110 of this modification, as shown in FIG. 10, the heat dissipation via 113 does not overlap with the surface grounding pattern 111A and the back grounding pattern 112A, and the surface grounding pattern 111A and the back grounding pattern 112A are formed. A large number of heat dissipation vias 113 can be formed around the periphery.
 なお、隣接する2つの背面接地パターン112Aの中心間隔は、隣接する2つの表層接地パターン111Aの中心間隔の3倍以上の整数倍であってもよい。また、隣接する2つの表層接地パターン111Aの中心間隔は、隣接する2つの背面接地パターン112Aの中心間隔の整数倍であってもよい。 The center spacing of the two adjacent back grounding patterns 112A may be an integral multiple of three times or more the center spacing of the two adjacent surface grounding patterns 111A. Further, the center spacing of the two adjacent surface grounding patterns 111A may be an integral multiple of the center spacing of the two adjacent back grounding patterns 112A.
 以上説明したように、本発明の一実施形態に係る電子回路モジュール100は、IC120が実装される実装面110Aと、外部接続端子114が設けられる背面110Bとを有する回路基板110を備えた電子回路モジュール100であって、回路基板110は、実装面110Aに設けられ、複数の表層接地パターン111Aを有する表層接地電極111と、背面110Bに設けられ、複数の背面接地パターン112Aを有する背面接地電極112と、表層接地電極111と背面接地電極112とを接続する複数の放熱用ビア113と、を有し、回路基板110の表層接地電極111と背面接地電極112とが重なる所定の領域(実装領域110A1および内側領域110B1が該当)において、複数の表層接地パターン111Aの各々と、複数の背面接地パターン112Aの各々とが、互いに重なる位置に配置されており、複数の放熱用ビア113の各々が、表層接地パターン111Aおよび背面接地パターン112Aと重ならない位置(表層接地パターン111Aおよび背面接地パターン112Aを回避した位置)に配置されている。 As described above, the electronic circuit module 100 according to the embodiment of the present invention is an electronic circuit including a circuit board 110 having a mounting surface 110A on which the IC 120 is mounted and a back surface 110B provided with an external connection terminal 114. In the module 100, the circuit board 110 is provided on the mounting surface 110A and has a surface grounding electrode 111 having a plurality of surface grounding patterns 111A, and a back grounding electrode 112 provided on the back surface 110B and having a plurality of back grounding patterns 112A. A predetermined region (mounting region 110A1) having a plurality of heat-dissipating vias 113 connecting the surface ground electrode 111 and the back ground electrode 112, and the surface ground electrode 111 and the back ground electrode 112 of the circuit board 110 overlapping. And the inner region 110B1), each of the plurality of surface grounding patterns 111A and each of the plurality of back grounding patterns 112A are arranged at positions where they overlap each other, and each of the plurality of heat dissipation vias 113 is arranged on the surface layer. It is arranged at a position that does not overlap with the grounding pattern 111A and the back grounding pattern 112A (a position avoiding the surface grounding pattern 111A and the back grounding pattern 112A).
 これにより、本発明の一実施形態に係る電子回路モジュール100は、表層接地パターン111Aおよび背面接地パターン112Aの周囲に、より多数の放熱用ビア113を効率的に形成することができ、且つ、複数の放熱用ビア113の各々を、表層接地パターン111Aおよび背面接地パターン112Aと重ならない位置に形成することができる。 As a result, the electronic circuit module 100 according to the embodiment of the present invention can efficiently form a larger number of heat dissipation vias 113 around the surface grounding pattern 111A and the back grounding pattern 112A, and a plurality of them. Each of the heat radiating vias 113 can be formed at a position that does not overlap with the surface grounding pattern 111A and the back grounding pattern 112A.
 したがって、本発明の一実施形態に係る電子回路モジュール100によれば、ボイドの発生を抑制しつつ、放熱用ビア113を効率的に配置することができる。そして、放熱用ビア113を効率的に配置することによって、IC120から発せられた熱を回路基板110の背面側に効率良く放熱できるようになる。 Therefore, according to the electronic circuit module 100 according to the embodiment of the present invention, the heat dissipation via 113 can be efficiently arranged while suppressing the generation of voids. Then, by efficiently arranging the heat radiating via 113, the heat generated from the IC 120 can be efficiently radiated to the back side of the circuit board 110.
 また、本発明の一実施形態に係る電子回路モジュール100は、回路基板110において、複数の表層接地パターン111Aおよび複数の背面接地パターン112Aがマトリクス状に配置されている。 Further, in the electronic circuit module 100 according to the embodiment of the present invention, a plurality of surface grounding patterns 111A and a plurality of backside grounding patterns 112A are arranged in a matrix on the circuit board 110.
 これにより、本発明の一実施形態に係る電子回路モジュール100は、複数の放熱用ビア113の効率的な配置を、より容易に行うことができる。 Thereby, the electronic circuit module 100 according to the embodiment of the present invention can more easily arrange the plurality of heat radiating vias 113.
 また、本発明の一実施形態に係る電子回路モジュール100は、回路基板110において、表層接地パターン111Aの外形寸法および設置間隔と、背面接地パターン112Aの外形寸法および設置間隔とが同一である。 Further, in the electronic circuit module 100 according to the embodiment of the present invention, the external dimensions and the installation interval of the surface grounding pattern 111A and the external dimensions and the installation interval of the rear grounding pattern 112A are the same in the circuit board 110.
 これにより、本発明の一実施形態に係る電子回路モジュール100は、複数の放熱用ビア113の効率的な配置を、より容易に行うことができる。 Thereby, the electronic circuit module 100 according to the embodiment of the present invention can more easily arrange the plurality of heat radiating vias 113.
 また、本発明の一実施形態に係る電子回路モジュール100は、回路基板110において、表層接地パターン111Aの外形寸法と、背面接地パターン112Aの外形寸法とが同一であり、表層接地パターン111Aの設置間隔と背面接地パターン112Aの設置間隔とのうち、一方の設置間隔が他方の設置間隔の整数倍である。 Further, in the electronic circuit module 100 according to the embodiment of the present invention, the external dimensions of the surface grounding pattern 111A and the external dimensions of the rear grounding pattern 112A are the same on the circuit board 110, and the installation intervals of the surface grounding pattern 111A are the same. And the installation interval of the back grounding pattern 112A, one installation interval is an integral multiple of the other installation interval.
 これにより、本発明の一実施形態に係る電子回路モジュール100は、複数の放熱用ビア113の効率的な配置を、より容易に行うことができる。 Thereby, the electronic circuit module 100 according to the embodiment of the present invention can more easily arrange the plurality of heat radiating vias 113.
 また、本発明の一実施形態に係る電子回路モジュール100において、表層接地パターン111Aおよび背面接地パターン112Aは、表層接地電極111および背面接地電極112に対し、表層接地パターン111Aおよび背面接地パターン112Aの周囲にレジストを塗布することにより形成される。 Further, in the electronic circuit module 100 according to the embodiment of the present invention, the surface grounding pattern 111A and the back grounding pattern 112A are around the surface grounding pattern 111A and the back grounding pattern 112A with respect to the surface grounding electrode 111 and the back grounding electrode 112. Is formed by applying a resist to the surface.
 これにより、本発明の一実施形態に係る電子回路モジュール100は、表層接地パターン111Aおよび背面接地パターン112Aを容易に形成することができる。 Thereby, the electronic circuit module 100 according to the embodiment of the present invention can easily form the surface grounding pattern 111A and the back grounding pattern 112A.
 また、本発明の一実施形態に係る電子回路モジュール100は、実装面110Aと対向する矩形状の天板部130Aと、天板部130Aの4つの辺の各々から実装面110A側に向って垂設された側板部130Bとを有し、実装面110Aを覆うように設けられる金属カバー130をさらに備える。 Further, the electronic circuit module 100 according to the embodiment of the present invention hangs down from each of the rectangular top plate portion 130A facing the mounting surface 110A and each of the four sides of the top plate portion 130A toward the mounting surface 110A. It has a side plate portion 130B provided, and further includes a metal cover 130 provided so as to cover the mounting surface 110A.
 このように、回路基板110の実装面110Aを金属カバー130で覆うことによって、本発明の一実施形態に係る電子回路モジュール100は、電磁波ノイズに対するシールド性を高めることができる。 By covering the mounting surface 110A of the circuit board 110 with the metal cover 130 in this way, the electronic circuit module 100 according to the embodiment of the present invention can enhance the shielding property against electromagnetic noise.
 また、本発明の一実施形態に係る電子回路モジュール100において、回路基板110は、実装面110Aにおいて、当該実装面110Aの外周部に沿って環状に形成された外側表層接地電極115を有し、金属カバー130は、外側表層接地電極115の全周に亘って、側板部130Bが外側表層接地電極115に半田付けされる。 Further, in the electronic circuit module 100 according to the embodiment of the present invention, the circuit board 110 has an outer surface layer ground electrode 115 formed in an annular shape along the outer peripheral portion of the mounting surface 110A on the mounting surface 110A. In the metal cover 130, the side plate portion 130B is soldered to the outer surface ground electrode 115 over the entire circumference of the outer surface ground electrode 115.
 このように、外側表層接地電極115の全周に亘って、金属カバー130の側板部130Bを外側表層接地電極115に半田付けすることによって、本発明の一実施形態に係る電子回路モジュール100は、電磁波ノイズに対するシールド性をさらに高めることができる。 In this way, the electronic circuit module 100 according to the embodiment of the present invention can be obtained by soldering the side plate portion 130B of the metal cover 130 to the outer surface ground electrode 115 over the entire circumference of the outer surface ground electrode 115. The shielding property against electromagnetic noise can be further improved.
 また、本発明の一実施形態に係る電子回路モジュール100では、回路基板110の実装面110Aにおいて、外側表層接地電極115は、表層接地電極111と分離して形成されている。そして、表層接地電極111と外側表層接地電極115とは、それぞれ実装面110Aから下方に延出する接地用ビア117を介して、実装面110Aよりも背面110B側の層に設けられた下層接地電極(内層接地電極116または背面接地電極112)に接続されている。 Further, in the electronic circuit module 100 according to the embodiment of the present invention, the outer surface ground electrode 115 is formed separately from the surface ground electrode 111 on the mounting surface 110A of the circuit board 110. The surface grounding electrode 111 and the outer surface grounding electrode 115 are each provided on a layer on the back surface 110B side of the mounting surface 110A via a grounding via 117 extending downward from the mounting surface 110A. It is connected to (inner layer ground electrode 116 or back ground electrode 112).
 これにより、本発明の一実施形態に係る電子回路モジュール100は、電磁波ノイズに対するシールド性をさらに高めつつ、金属カバーの半田付けに伴う不具合を抑制することができる。一方、このような構造は、電子部品から発せられた熱を外周部側に放熱し難い構造となっているため、電子部品から発せられた熱を回路基板110の背面側に効率良く放熱できる本発明の特徴は、このような構造において特に有効である。 As a result, the electronic circuit module 100 according to the embodiment of the present invention can further enhance the shielding property against electromagnetic noise and suppress defects due to soldering of the metal cover. On the other hand, since such a structure is a structure in which it is difficult to dissipate the heat generated from the electronic component to the outer peripheral side, the heat generated from the electronic component can be efficiently dissipated to the back side of the circuit board 110. The features of the invention are particularly effective in such structures.
 以上、本発明の一実施形態について詳述したが、本発明はこれらの実施形態に限定されるものではなく、特許請求の範囲に記載された本発明の要旨の範囲内において、種々の変形又は変更が可能である。 Although one embodiment of the present invention has been described in detail above, the present invention is not limited to these embodiments, and various modifications or modifications are made within the scope of the gist of the present invention described in the claims. It can be changed.
 例えば、本発明は、金属カバーを有しない電子回路モジュール(例えば、電子部品が樹脂封止される電子回路モジュール)にも適用可能である。 For example, the present invention is also applicable to an electronic circuit module having no metal cover (for example, an electronic circuit module in which electronic components are resin-sealed).
 本国際出願は、2019年7月22日に出願した日本国特許出願第2019-134877号に基づく優先権を主張するものであり、当該出願の全内容を本国際出願に援用する。 This international application claims priority based on Japanese Patent Application No. 2019-134877 filed on July 22, 2019, and the entire contents of the application will be incorporated into this international application.
 100 電子回路モジュール
 110 回路基板
 110A 実装面
 110A1 実装領域
 110B 背面
 110B1 内側領域
 110B2 外側領域
 111 表層接地電極
 111A 表層接地パターン
 111B レジスト
 112 背面接地電極
 112A 背面接地パターン
 112B レジスト
 113 放熱用ビア
 114 外部接続端子
 115 外側表層接地電極
 116 内層接地電極
 117 接地用ビア
 120 IC(電子部品)
 121 接地用端子
 122 電気信号用端子
 130 金属カバー
 130A 天板部
 130B 側板部
100 Electronic circuit module 110 Circuit board 110A Mounting surface 110A1 Mounting area 110B Back surface 110B1 Inner area 110B2 Outer area 111 Surface grounding electrode 111A Surface grounding pattern 111B Resist 112 Back grounding electrode 112A Back grounding pattern 112B Resist 113 External connection terminal 115 Outer surface grounding electrode 116 Inner layer grounding electrode 117 Grounding via 120 IC (electronic component)
121 Grounding terminal 122 Electrical signal terminal 130 Metal cover 130A Top plate 130B Side plate

Claims (8)

  1.  電子部品が実装される実装面と、外部接続端子が設けられる背面とを有する回路基板を備えた電子回路モジュールであって、
     前記回路基板は、
     前記実装面に設けられ、複数の表層接地パターンを有する表層接地電極と、
     前記背面に設けられ、複数の背面接地パターンを有する背面接地電極と、
     前記表層接地電極と前記背面接地電極とを接続する複数の放熱用ビアと、
     を有し、
     前記回路基板の前記表層接地電極と前記背面接地電極とが重なる所定の領域において、
     前記複数の表層接地パターンの各々と、前記複数の背面接地パターンの各々とが、互いに重なる位置に配置されており、
     前記複数の放熱用ビアの各々が、前記表層接地パターンおよび前記背面接地パターンを回避した位置に配置されている
     ことを特徴とする電子回路モジュール。
    An electronic circuit module having a circuit board having a mounting surface on which electronic components are mounted and a back surface on which external connection terminals are provided.
    The circuit board
    A surface ground electrode provided on the mounting surface and having a plurality of surface ground patterns,
    A back ground electrode provided on the back surface and having a plurality of back ground patterns,
    A plurality of heat dissipation vias connecting the surface ground electrode and the back ground electrode,
    Have,
    In a predetermined region where the surface ground electrode and the back ground electrode of the circuit board overlap.
    Each of the plurality of surface grounding patterns and each of the plurality of back grounding patterns are arranged at positions where they overlap each other.
    An electronic circuit module characterized in that each of the plurality of heat radiating vias is arranged at a position avoiding the surface grounding pattern and the back grounding pattern.
  2.  前記回路基板の前記所定の領域において、
     前記複数の表層接地パターンおよび前記複数の背面接地パターンがマトリクス状に配置されている
     ことを特徴とする請求項1に記載の電子回路モジュール。
    In the predetermined area of the circuit board
    The electronic circuit module according to claim 1, wherein the plurality of surface grounding patterns and the plurality of backside grounding patterns are arranged in a matrix.
  3.  前記回路基板の前記所定の領域において、
     前記表層接地パターンの外形寸法および設置間隔と、前記背面接地パターンの外形寸法および設置間隔とが同一である
     ことを特徴とする請求項2に記載の電子回路モジュール。
    In the predetermined area of the circuit board
    The electronic circuit module according to claim 2, wherein the external dimensions and the installation interval of the surface grounding pattern are the same as the external dimensions and the installation interval of the back surface grounding pattern.
  4.  前記回路基板の前記所定の領域において、
     前記表層接地パターンの外形寸法と、前記背面接地パターンの外形寸法とが同一であり、前記表層接地パターンの設置間隔と背面接地パターンの設置間隔とのうち、一方の設置間隔が他方の設置間隔の整数倍である
     ことを特徴とする請求項2に記載の電子回路モジュール。
    In the predetermined area of the circuit board
    The outer dimensions of the surface grounding pattern and the outer dimensions of the back grounding pattern are the same, and one of the installation intervals of the surface grounding pattern and the backing grounding pattern is the installation interval of the other. The electronic circuit module according to claim 2, wherein the electronic circuit module is an integral multiple.
  5.  前記表層接地パターンおよび前記背面接地パターンは、前記表層接地電極および前記背面接地電極に対し、前記表層接地パターンおよび前記背面接地パターンの周囲にレジストを塗布することにより形成される
     ことを特徴とする請求項1から4のいずれか一項に記載の電子回路モジュール。
    A claim characterized in that the surface grounding pattern and the back grounding pattern are formed by applying a resist to the surface grounding electrode and the back grounding electrode around the surface grounding pattern and the back grounding pattern. Item 4. The electronic circuit module according to any one of Items 1 to 4.
  6.  前記実装面と対向する矩形状の天板部と、前記天板部の4つの辺の各々から前記実装面側に向って垂設された側板部とを有し、前記実装面を覆うように設けられる金属カバーをさらに備える
     ことを特徴とする請求項1から5のいずれか一項に記載の電子回路モジュール。
    It has a rectangular top plate portion facing the mounting surface and side plate portions vertically hung from each of the four sides of the top plate portion toward the mounting surface side so as to cover the mounting surface. The electronic circuit module according to any one of claims 1 to 5, further comprising a metal cover provided.
  7.  前記回路基板は、
     前記実装面において、当該実装面の外周部に沿って環状に形成された外側表層接地電極を有し、
     前記金属カバーは、
     前記外側表層接地電極の全周に亘って、前記側板部が前記外側表層接地電極に半田付けされる
     ことを特徴とする請求項6に記載の電子回路モジュール。
    The circuit board
    The mounting surface has an outer surface ground electrode formed in an annular shape along the outer peripheral portion of the mounting surface.
    The metal cover is
    The electronic circuit module according to claim 6, wherein the side plate portion is soldered to the outer surface ground electrode over the entire circumference of the outer surface ground electrode.
  8.  前記回路基板は、前記実装面よりも前記背面側の層に設けられた下層接地電極と、前記実装面から前記背面側に延出する接地用ビアとを有し、
     前記外側表層接地電極は、前記実装面において前記表層接地電極と分離して形成され、
     前記表層接地電極と前記外側表層接地電極とは、前記接地用ビアを介してそれぞれ前記下層接地電極に接続されている
     ことを特徴とする請求項7に記載の電子回路モジュール。
    The circuit board has a lower layer grounding electrode provided on a layer on the back surface side of the mounting surface, and a grounding via extending from the mounting surface to the back surface side.
    The outer surface ground electrode is formed separately from the surface ground electrode on the mounting surface.
    The electronic circuit module according to claim 7, wherein the surface ground electrode and the outer surface ground electrode are each connected to the lower ground electrode via the ground via.
PCT/JP2020/011502 2019-07-22 2020-03-16 Electronic circuit module WO2021014681A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2019134877A JP2022133484A (en) 2019-07-22 2019-07-22 electronic circuit module
JP2019-134877 2019-07-22

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Publication Number Publication Date
WO2021014681A1 true WO2021014681A1 (en) 2021-01-28

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002026468A (en) * 2000-06-30 2002-01-25 Internatl Business Mach Corp <Ibm> Printed wiring board and semiconductor device
JP2006080168A (en) * 2004-09-07 2006-03-23 Nec Access Technica Ltd Heat dissipation structure of printed wiring board
JP2012099682A (en) * 2010-11-04 2012-05-24 Nec Access Technica Ltd Printed wiring board and pad design method used for the printed wiring board
JP2016181575A (en) * 2015-03-24 2016-10-13 日産自動車株式会社 Heat radiation substrate and semiconductor device
WO2017099145A1 (en) * 2015-12-07 2017-06-15 三菱電機株式会社 Microwave module and high-frequency module

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002026468A (en) * 2000-06-30 2002-01-25 Internatl Business Mach Corp <Ibm> Printed wiring board and semiconductor device
JP2006080168A (en) * 2004-09-07 2006-03-23 Nec Access Technica Ltd Heat dissipation structure of printed wiring board
JP2012099682A (en) * 2010-11-04 2012-05-24 Nec Access Technica Ltd Printed wiring board and pad design method used for the printed wiring board
JP2016181575A (en) * 2015-03-24 2016-10-13 日産自動車株式会社 Heat radiation substrate and semiconductor device
WO2017099145A1 (en) * 2015-12-07 2017-06-15 三菱電機株式会社 Microwave module and high-frequency module

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