WO2020249019A1 - 驱动电路控制方法及装置和驱动电路 - Google Patents

驱动电路控制方法及装置和驱动电路 Download PDF

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Publication number
WO2020249019A1
WO2020249019A1 PCT/CN2020/095419 CN2020095419W WO2020249019A1 WO 2020249019 A1 WO2020249019 A1 WO 2020249019A1 CN 2020095419 W CN2020095419 W CN 2020095419W WO 2020249019 A1 WO2020249019 A1 WO 2020249019A1
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Prior art keywords
bus
switch
operating frequency
address
timing controller
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PCT/CN2020/095419
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English (en)
French (fr)
Inventor
王明良
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Chongqing HKC Optoelectronics Technology Co Ltd
Beihai HKC Optoelectronics Technology Co Ltd
Original Assignee
Chongqing HKC Optoelectronics Technology Co Ltd
Beihai HKC Optoelectronics Technology Co Ltd
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Priority to US17/422,360 priority Critical patent/US11978418B2/en
Publication of WO2020249019A1 publication Critical patent/WO2020249019A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3648—Control of matrices with row and column drivers using an active matrix
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4009—Coupling between buses with data restructuring
    • G06F13/4018—Coupling between buses with data restructuring with data-width conversion
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G1/00—Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators; General aspects or details, e.g. selection emphasis on particular characters, dashed line or dotted line generation; Preprocessing of data
    • G09G1/005—Power supply circuits
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/08—Details of timing specific for flat panels, other than clock recovery
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/06—Adjustment of display parameters
    • G09G2320/0666—Adjustment of display parameters for control of colour parameters, e.g. colour temperature
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Definitions

  • This application relates to the field of display technology, and in particular to a driving circuit control method and device, and a driving circuit.
  • the display data is usually processed through the TCON (Timing Controller) on the PCB (Printed Circuit Board), and the PWM IC (Pulse-width Modulation Integrated Circuit, Pulse width modulation chip) provides driving power, and Gamma IC (Gamma Integrated Circuit, gamma chip) provides gamma voltage for driving the liquid crystal cell.
  • TCON Transmission Controller
  • PWM Pulse-width Modulation Integrated Circuit, Pulse width modulation chip
  • Gamma IC Gamma Integrated Circuit, gamma chip
  • the timing controller and the gamma chip are currently connected together through the I2C (Inter-Integrated Circuit) bus, which is convenient for reading any chip by operating the I2C.
  • I2C Inter-Integrated Circuit
  • the problem that this connection method is prone to is that when the timing controller is working, the internal switch of the timing controller is turned on, and the over-actuated module and other functional modules start to work, which causes the workload of the timing controller to increase.
  • the current output by the power chip connected to the timing controller suddenly increases, causing abnormal fluctuations in the power supply voltage, and abnormal operation of the power supply will further cause abnormal display.
  • the embodiments of the present application provide a driving circuit control method and device, and a driving circuit.
  • an embodiment of the present application provides a driving circuit control method, including:
  • the bus signal is the signal transmitted on the I2C bus, and the I2C bus is connected to the timing controller;
  • a frequency adjustment signal is sent to the controllable power supply with adjustable operating frequency connected to the timing controller.
  • the frequency adjustment signal is used to indicate that the operating frequency of the controllable power supply is from the first operating frequency. Adjust to a second operating frequency, where the second operating frequency is higher than the first operating frequency.
  • the driving circuit control method determines whether the bus address matches the timing controller, that is, determining whether the timing controller is The accused work object.
  • the frequency adjustment signal is sent to the controllable power supply to increase the operating frequency of the controllable power supply.
  • a faster frequency represents a shorter period, which is beneficial for the fluctuation caused by the work of the timing controller to be quickly compensated , So that the overall fluctuation of the output voltage of the controllable power supply becomes smaller and stays within the normal fluctuation range, ensuring that the controllable power supply can work normally and the display panel displays normally.
  • the embodiment of the present application also provides a drive circuit control device, including a processor and a memory storing a computer program; the processor implements the following processing when the computer program is executed:
  • a frequency adjustment signal is sent to the controllable power supply with adjustable operating frequency connected to the timing controller.
  • the frequency adjustment signal is used to indicate that the operating frequency of the controllable power supply is from the first operating frequency. Adjust to a second operating frequency, where the second operating frequency is higher than the first operating frequency.
  • an embodiment of the present application provides a driving circuit, including:
  • Controllable power supply which is a power supply with adjustable operating frequency
  • Timing controller includes a processor, a memory, a plurality of switches and a plurality of functional modules; the memory stores switch control data used to instruct and control the opening and closing states of each switch, working parameters of each functional module and computer programs; each function The modules are connected to the memory through one-to-one corresponding switches; the processor is set to connect to the I2C bus, and the processor is also connected to the switches, the first access terminal of the memory, and the controllable power supply.
  • a frequency adjustment signal is sent to the controllable power supply connected to the timing controller, and the frequency adjustment signal is used to instruct the working frequency of the controllable power supply to be adjusted from the first working frequency to the second working Frequency, wherein the second operating frequency is higher than the first operating frequency.
  • FIG. 1 is a schematic diagram of a driving structure of a liquid crystal panel
  • FIG. 2 is a schematic diagram of the structure of a driving circuit in an exemplary technology
  • Fig. 3 is a schematic diagram of a waveform of a controllable power supply voltage in an exemplary technology
  • FIG. 4 is a schematic flowchart of a method for controlling a driving circuit according to an embodiment
  • FIG. 5 is a schematic flowchart of a driving circuit control method according to another embodiment
  • FIG. 6 is a schematic flowchart of a method for controlling a driving circuit according to another embodiment
  • FIG. 7 is a schematic flowchart of a driving circuit control method according to still another embodiment.
  • FIG. 8 is a schematic structural diagram of a driving circuit control device according to an embodiment
  • FIG. 9 is a schematic structural diagram of a driving circuit control device according to another embodiment.
  • FIG. 10 is a schematic structural diagram of a driving circuit according to an embodiment
  • FIG. 11 is a schematic structural diagram of a driving circuit according to another embodiment.
  • FIG. 12 is a schematic structural diagram of a driving circuit according to another embodiment.
  • FIG. 13 is a schematic structural diagram of a display device according to an embodiment.
  • Fig. 1 is an exemplary driving architecture of a liquid crystal panel.
  • Figure 2 shows the design architecture of the driving circuit in the exemplary technology.
  • the I2C bus a simple, two-way two-wire synchronous serial bus developed by Philips
  • the internal I2C slave I2C bus slave device interface
  • the OD (Over-actuated) module and ACC (Advanced Colour Control) module set to automatic Control the gain of the chrominance amplifier
  • Dither (jitter) module can read the look-up table (look-up table), this design can open the internal switch early to facilitate the operation of the timing controller.
  • the workload of the processing chip inside the timing controller will increase sharply, and the current of the consumed power module will suddenly increase, which may easily cause the voltage of the power module to be unstable, causing the chip to work abnormally and display abnormal.
  • an embodiment of the present application provides a driving circuit control method, including:
  • the I2C bus 20 is a simple, bidirectional, two-wire synchronous serial bus 20 developed by Philips. It only needs two wires to transmit information between the devices connected to the bus 20.
  • Each device on the bus 20 has a unique address. According to whether each device is used to transmit data or receive data, each device on the bus 20 can be divided into a master device and a slave device. The master device is used to start the bus 20 to transmit data. And generate a clock to open the device for transmission. At this time, any device that is addressed is regarded as a slave device (for example, the aforementioned timing controller 10).
  • Determining whether the bus address matches the address of the timing controller 10 can be determined by determining whether the valid bit data except the start bit in the 8-bit data used for addressing in the signal transmitted on the bus 20 corresponds to the address of the timing controller 10 Whether the data is consistent.
  • the driving circuit control method determines whether the bus address matches the timing controller 10, that is, determining the timing controller 10 Whether it is a controlled working object, when it is determined that the address matches, a frequency adjustment signal is sent to the controllable power source 30 to increase the working frequency of the controllable power source 30.
  • a faster frequency represents a shorter period, which is beneficial for the fluctuations caused by the operation of the timing controller 10 to be quickly compensated, so that the overall fluctuation of the output voltage of the controllable power supply 30 becomes smaller and is within the normal fluctuation range, ensuring that the controllable power supply 30 It can work normally, and the display panel displays normally.
  • the controllable power supply 30 may be a PWM chip.
  • the PWM (Pulse-width modulation) chip power supply has a frequency configuration bit.
  • the frequency configuration bit is controlled to enable the controllable power supply 30 works at a higher operating frequency.
  • the PWM chip power supply can work normally at the first operating frequency of 600KHZ or lower.
  • the frequency configuration bit of the PWM chip power supply is controlled to make the PWM chip power supply 750KHZ or The higher frequency second operating frequency works. Take the controllable power supply 30 model ADP2370 as an example.
  • the FSEL pin of ADP2370 is at a low level when no external signal is connected, and the controllable power supply 30 works at 600KHZ.
  • the timing controller 10 it is necessary to control the timing controller 10 to work and send a frequency adjustment signal to the FSEL pin, and the FSEL pin is connected to a high level signal.
  • the work of the controllable power supply 30 The frequency is increased to 1.2 MHz for operation, and the voltage fluctuation of the controllable power supply 30 caused by the operation of the timing controller 10 can be quickly compensated.
  • the driving circuit control method further includes the steps:
  • S40 Generate and send a query instruction to the memory 200 according to the address of the target function module 400, and receive switch control data corresponding to the target function module 400 fed back by the memory 200;
  • S50 Control the switch connected to the target function module 400 to close according to the switch control data, so that the target function module 400 obtains the working parameters of each function module 400 stored in the memory 200 through the corresponding switch;
  • the timing controller 10 includes a plurality of functional modules 400, and the target functional module 400 is the controlled functional module 400 indicated by the bus signal.
  • the target function module 400 is one or more of the function modules 400 in the timing controller 10, and the target function module 400 is the object to be controlled by the bus signal that continues to be transmitted after the address matches.
  • the switch control data is data that has a corresponding relationship with the address of each target function module 400 and is used to instruct and control the open/close state of each switch corresponding to each function module, and the switch control data is stored in the memory 200.
  • the output voltage of the controllable power supply 30 may fluctuate.
  • the timing controller 10 is the addressed slave device, and then continues to receive the bus signal, and the subsequent received bus signal is analyzed to obtain the target function module 400 address.
  • the parsing process can be segmented according to each byte, and then the valid bit data in the 8-bit data in each byte is converted into an address that can be recognized in the timing controller 10 (for example, converting binary to hexadecimal
  • the system is consistent with the hexadecimal method used in the address storage of the functional module 400 in the timing controller 10).
  • a query instruction is generated and sent to the memory 200, and the switch control data corresponding to the target function module 400 is obtained by accessing the memory 200.
  • the query instruction may be an instruction including the address of the target function module 400.
  • the step of controlling the closing of the switch connected to the target function module 400 according to the switch control data includes:
  • the switch control data is received, that is, when multiple target function modules 400 need to be controlled, they are sequentially controlled according to the switch control data. Each switch is closed to avoid closing multiple switches at the same time, which may cause excessive load and cause the output voltage of the controllable power supply 30 to fluctuate.
  • the processor 100 controls the corresponding switch to close according to the analog signal of each switch control in a certain order to ensure that only one switch is closed at the same time to avoid transient
  • the power supply voltage is unstable due to excessive power consumption, providing high-quality display devices and display effects.
  • the switch control data is stored in a look-up table in the memory 200, and the look-up table represents the correspondence between the address of each functional module 400 and the switch control data.
  • the switch control data is stored in a lookup table, which is a table that can characterize the correspondence between the address of each functional module 400 and the switch control data.
  • the storage content in the table may be a one-to-one correspondence between the address of the function module 400 and the switch control data
  • the query instruction may include the address of the target function module 400.
  • the storage content in the table can also be a one-to-one correspondence between the pre-defined number of the function module 400 and the switch control data.
  • the process of generating the query command according to the address of the target function module 400 can be: The address of the module 400 obtains the serial number of the functional module 400, and then generates a query instruction including the serial number.
  • the step of controlling the closing of the switch connected to the target function module 400 according to the switch control data includes:
  • S53 Send a switch control analog signal to the switch connected to the corresponding target function module 400, and control the switch to close.
  • the switch After receiving the switch control data fed back from the memory 200, the data is converted into an analog switch control analog signal capable of controlling the switch state, so as to control the corresponding switch to close.
  • the switch can be a MOS tube with a small size.
  • the switch connected to the dithering module 430 can be a MOS tube, the drain is connected to the dithering module 430, the source is connected to the memory 200, the gate is used to receive the switch control analog signal, and the gate receives the high-level switch control.
  • the dithering module 430 obtains its corresponding working parameters from the memory 200 and starts to work.
  • the switch may also be other types of electronic switches, such as transistors, and the connection mode is adaptively adjusted with the switch type to ensure that the switch can be closed after receiving the corresponding switch control analog signal.
  • the working parameters of the functional module 400 include the working parameters of the overdrive module 410, the working parameters of the precise color control module 420, and the working parameters of the dithering module 430, and the switch control analog signal includes:
  • the first control signal C1 is set to control the first switch K1 connected to the overdrive module 410 to close, so that the overdrive module 410 obtains the operating parameters of the overdrive module 410 from the memory 200;
  • the second control signal C2 is set to control the closing of the second switch K2 connected to the precise color control module 420, so that the precise color control module 420 obtains the working parameters of the precise color control module 420 from the memory 200 through the second switch K2;
  • the third control signal C3 is set to control the third switch K3 connected to the dithering module 430 to close, so that the dithering module 430 obtains the working parameters of the dithering module 430 from the memory 200 through the third switch K3;
  • the function module 400 includes an overdrive module 410, a precise color control module 420, and a jitter module 430.
  • the switch 300 includes a first switch K1, a second switch K2, and a third switch K3.
  • the overdrive module 410 is configured to modulate the data signal received by the timing controller 10, and the data signal is a signal for driving the display panel.
  • the data signal modulated by the overdrive module 410 can overdrive the liquid crystal and improve the response speed of the liquid crystal molecules.
  • the precise color control module 420 is a closed-loop negative feedback amplifier circuit, and is set to control the amplitude of the chrominance signal.
  • the precise color control module 420 detects the chroma synchronization signal as a standard, controls the amplitude of the chroma signal according to the size of the chroma synchronization signal, automatically changes the gain, and makes the chroma signal reach a stable value.
  • the dithering module 430 can perform random dithering operations, which can improve the image fidelity of the digital display.
  • the switch control analog signal includes a first control signal C1, a second control signal C2, and a third control signal C3, which respectively control The first switch K1, the second switch K2, and the third switch K3.
  • the first switch K1 is a switch connected to the overdrive module 410
  • the second switch K2 is a switch connected to the precise color control module 420
  • the third switch K3 is a switch connected to the dithering module 430. If it is determined that the bus address matches the address of the timing controller 10, the data information is further received, and the data information is analyzed to obtain the address of the target function module 400.
  • the switch control data corresponding to the address is obtained from the memory 200, the first control signal C1 is generated according to the data, and the first control signal C1 is sent to the first switch K1, The first switch K1 is driven to close, and the overdrive module 410 obtains its working data from the memory 200 and starts to work.
  • the objects to be controlled are the precise color control module 420 and the dithering module 430, the implementation process is the same as the overdrive module 410.
  • the addresses of three target functional modules 400 are generated according to the data information
  • three switch control data are obtained by querying the memory 200, and generated according to the three switch control analog signals
  • the first control signal C1, the second control signal C2 and the third control signal C3, and the first control signal C1, the second control signal C2 and the third control signal C3 are sent to the corresponding first switch K1 and the second switch K2 in sequence As with the third switch K3, only one switch is closed at the same time.
  • the order of sequential opening may be other order besides the order described in the above example.
  • the query instruction includes the address of the target function module 400.
  • the query instruction may include the address of the target function module 400.
  • the memory 200 receives the query instruction, it can know which switch control data corresponding to the address of which function module 400 is to be queried by the query instruction, so as to provide a basis for table lookup.
  • an embodiment of the present application also provides a driving circuit control device, including:
  • the bus address obtaining unit 810 is configured to obtain the bus address in the bus signal transmitted on the I2C bus 20, and the I2C bus 20 is connected to the timing controller 10;
  • the power frequency modulation control unit 820 is configured to, when determining that the bus address matches the address of the timing controller 10, send a frequency adjustment signal to the controllable power source 30 with adjustable operating frequency connected to the timing controller 10, and the frequency adjustment signal is used for It indicates that the operating frequency of the controllable power supply 30 is adjusted from the first operating frequency to the second operating frequency, wherein the second operating frequency is higher than the first operating frequency.
  • controllable power supply 30, the switch 300, etc. are the same as those in the above-mentioned driving circuit control method, and will not be repeated here.
  • the driving circuit control device further includes:
  • the target function module 400 address obtaining unit 830 is configured to obtain the address of the target function module 400 in the bus signal when it is determined that the bus address matches the address of the timing controller 10;
  • the switch control data acquisition unit 840 is configured to generate and send a query instruction to the memory 200 according to the address of the target function module 400, and receive the switch control data corresponding to the target function module 400 fed back by the memory 200;
  • the switch control unit 850 is configured to control the switch 300 connected to the target function module 400 to close according to the switch control data, so that the target function module 400 obtains the working parameters of the function module 400 stored in the memory 200 through the corresponding switch;
  • the timing controller 10 includes a plurality of functional modules 400, and the target functional module 400 is the controlled functional module 400 indicated by the bus signal.
  • the definitions of the address of the target function module 400 and the like are the same as those in the above-mentioned driving circuit control method, and will not be repeated here.
  • the following processing is implemented:
  • the bus signal is a signal transmitted on the I2C bus 20, and the I2C bus 20 is connected to the timing controller 10;
  • a frequency adjustment signal is sent to the controllable power supply 30 with adjustable operating frequency connected to the timing controller 10, and the frequency adjustment signal is used to indicate that the operating frequency of the controllable power supply 30 is changed from The first operating frequency is adjusted to the second operating frequency, wherein the second operating frequency is higher than the first operating frequency.
  • Non-volatile memory may include read only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory.
  • Volatile memory may include random access memory (RAM) or external cache memory.
  • RAM is available in many forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous chain Channel (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM), etc.
  • SRAM static RAM
  • DRAM dynamic RAM
  • SDRAM synchronous DRAM
  • DDRSDRAM double data rate SDRAM
  • ESDRAM enhanced SDRAM
  • SLDRAM synchronous chain Channel
  • memory bus Radbus direct RAM
  • RDRAM direct memory bus dynamic RAM
  • RDRAM memory bus dynamic RAM
  • an embodiment of the present application provides a driving circuit, including:
  • Controllable power source 30 which is a power source with adjustable operating frequency
  • the timing controller 10 is set to connect the I2C bus 20 and the controllable power supply 30, and the timing controller 10 is set to obtain the bus address in the bus signal transmitted on the I2C bus 20, and determine the bus address and the timing controller When the address of 10 matches, a frequency adjustment signal is sent to the controllable power supply 30.
  • the frequency adjustment signal is used to indicate that the operating frequency of the controllable power supply 30 is adjusted from the first operating frequency to the second operating frequency, where the second operating frequency is higher than the first operating frequency. working frequency.
  • the timing controller 10 by connecting the timing controller 10 to the controllable power supply 30, the timing controller 10 first determines whether the bus address matches its own address, and if it matches, it sends a frequency adjustment to the controllable power supply 30 The signal indicates that the operating frequency of the controllable power supply 30 is increased, and the power supply voltage fluctuation caused by the operation of the timing controller 10 is quickly compensated, so that the power supply voltage is within the normal fluctuation range.
  • the timing controller 10 determines that the bus address matches its own address, it continues to receive the bus signal, analyzes the bus signal, obtains the address of the target function module 400, and further according to the target function module 400 The switch 300 corresponding to the address control is closed, so that the target function module 400 starts to work.
  • An embodiment of the present application provides a driving circuit, as shown in FIG. 11, including:
  • Controllable power source 30 which is a power source with adjustable operating frequency
  • the timing controller 10 includes a processor 100, a memory 200, a plurality of switches, and a plurality of functional modules 400; the memory 200 stores switch control data for instructing and controlling the opening and closing states of each switch, and the work of each functional module 400 Parameters and computer programs; each functional module 400 is connected to the memory 200 through a one-to-one corresponding switch; the processor 100 is set to connect to the I2C bus 20, and the processor 100 is also connected to the switches, the first access terminal of the memory 200, and the controllable power supply 30 When connected, the processor 100 implements the following processing when executing the computer program:
  • the processor 100 may also implement the following processing when executing the computer program:
  • S40 Generate and send a query instruction to the memory 200 according to the address of the target function module 400, and receive switch control data corresponding to the target function module 400 fed back by the memory 200;
  • S50 Control the switch connected to the target function module 400 to close according to the switch control data, so that the target function module 400 obtains the working parameters of each function module 400 stored in the memory 200 through the corresponding switch;
  • the timing controller 10 includes a plurality of functional modules 400, and the target functional module 400 is the controlled functional module 400 indicated by the bus signal.
  • the parameters of the function module 400 include the working parameters of the overdrive module 410, the working parameters of the precise color control module 420, and the working parameters of the dithering module 430.
  • the switch control analog signal includes the first The control signal C1, the second control signal C2 and the third control signal C3, the switch includes:
  • the first switch K1, the first terminal of the first switch K1 is connected to the second access terminal of the memory 200;
  • the second switch K2 the first terminal of the second switch K2 is connected to the second access terminal of the memory 200;
  • the third switch K3, the first terminal of the third switch K3 is connected to the second access terminal of the memory 200;
  • the function module 400 includes:
  • the overdrive module 410 the input end of the overdrive module 410 is connected to the second end of the first switch K1;
  • the precise color control module 420 the input terminal of the precise color control module 420 is connected to the second terminal of the second switch K2;
  • the dithering module 430, the input end of the dithering module 430 is connected to the second end of the third switch K3;
  • the processor 100 is configured to control the first switch K1 to close according to the first control signal C1, to control the second switch K2 to close according to the second control signal C2, and to control the third switch K3 to close according to the third control signal C3.
  • first switch K1, the second control signal C2, etc. are the same as those in the foregoing method embodiment, and will not be repeated here.
  • the on-off state of each switch can be individually controlled.
  • each functional module 400 can be controlled in turn, and one switch can be closed at the same time to avoid problems.
  • the operation of the timing controller 10 causes the voltage fluctuation of the output voltage of the controllable power supply 30, which improves the display quality.
  • the driving circuit further includes a gamma chip 40, and the gamma chip 40 is configured to be connected to the I2C bus 20.
  • the gamma chip 40 and the timing controller 10 are both connected to the I2C bus 20, and the controllable power supply 30 supplies power to the timing controller 10.
  • the timing controller 10 10 internal function modules 400 are all turned on, causing the output voltage of the controllable power supply 30 to fluctuate. Using the timing controller 10 in the foregoing embodiment, first determine whether the bus address matches the address of the timing controller 10, and if it matches, proceed to the next step.
  • the memory 200 obtains the switch control data corresponding to the target function module 400, and controls the corresponding switch to close according to the data.
  • the target function module 400 obtains the working parameters from the memory 200 and starts to work.
  • a display device as shown in FIG. 13, includes a display panel 2 and the above-mentioned driving circuit 1.
  • the driving circuit 1 is used to drive the display panel 2 to display.
  • the display device provided by the embodiment of the present application has the above-mentioned driving circuit 1, which can ensure that the output voltage of the controllable power supply 30 is stable when there is action on the bus, the output voltage fluctuation of the controllable power supply 30 can be quickly compensated, and the overall voltage is within the normal fluctuation range Inside, the stable operation of each device is ensured, and the display effect is stable.

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Abstract

公开了一种驱动电路控制方法及装置和驱动电路。驱动电路控制方法，包括：获取总线信号中的总线地址，总线信号为I2C总线上传输的信号，I2C总线与时序控制器连接（S10）；若判定总线地址与时序控制器的地址匹配，则向与时序控制器连接的工作频率可调的可控电源发送频率调节信号，频率调节信号用于指示可控电源的工作频率从第一工作频率调节到第二工作频率，其中第二工作频率高于第一工作频率（S20）。

Description

驱动电路控制方法及装置和驱动电路
相关申请的交叉引用
本申请要求于2019年06月10日提交中国专利局、申请号为2019104967789、发明名称为“驱动电路控制方法及装置和驱动电路”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及显示技术领域，特别是涉及一种驱动电路控制方法及装置和驱动电路。
背景技术
这里的陈述仅提供与本申请有关的背景信息，而不必然地构成现有技术。
液晶电视因其重量轻，厚度薄，功耗小，已被广泛普及。现在常见的液晶面板的驱动架构中，通常通过PCB(Printed Circuit Board，印制电路板)上的TCON(Timing Controller，时序控制器)对显示数据进行处理，PWM IC(Pulse-width modulation Integrated Circuit，脉宽调制芯片)提供驱动电源，Gamma IC(Gamma Integrated Circuit，伽马芯片)提供驱动液晶单元的伽马电压。
由于芯片数字化的发展，目前时序控制器和伽马芯片均通过I2C(Inter-Integrated Circuit)总线连接在一起，便于通过操作I2C对任意一个芯片进行相应的读取操作。但这种连接方式容易出现的问题是，当时序控制器的工作时，时序控制器内部开关打开，过驱动(Over-actuated)模块等功能模块开始工作，造成时序控制器的工作量增大，进而导致与该时序控制器连接的电源芯片所输出的电流突然变大，造成电源电压异常波动，电源异常工作会进一步导致显示异常。
发明内容
基于此，本申请的实施例提供一种驱动电路控制方法及装置和驱动电路。
一方面，本申请实施例提供了一种驱动电路控制方法，包括：
获取总线信号中的总线地址，总线信号为I2C总线上传输的信号，I2C总线与时序控制器连接；以及
若判定总线地址与时序控制器的地址匹配，则向与时序控制器连接的工作频率可调的可控电源发送频率调节信号，频率调节信号用于指示可控电源的工作频率从第一工作频率调节到第二工作频率，其中第二工作频率高于第一工作频率。
为避免时序控制器工作时，造成与时序控制器连接的电源输出电压异常波动，本申请实施例提供的驱动电路控制方法，通过判定总线地址是否与时序控制器匹配，即判定时序控制器是否为被控工作对象。当判定地址匹配时，则向可控电源发送频率调节信号，使得可控电源的工作频率增大，更快的频率代表更短的周期，有利于时序控制器工作所造成的波动能够快速得到补偿，使得可控电源输出电压的整体波动变小，处于正常波动范围内，保证可控电源能够正常工作，显示面板正常显示。
另一方面，本申请实施例还提供了一种驱动电路控制装置，包括处理器和存储有计算机程序的存储器；处理器执行所述计算机程序时实现如下处理：
获取I2C总线上传输的总线信号中的总线地址，I2C总线与时序控制器连接；
在判定总线地址与时序控制器的地址匹配时，向与时序控制器连接的工作频率可调的可控电源发送频率调节信号，频率调节信号用于指示可控电源的工作频率从第一工作频率调节到第二工作频率，其中第二工作频率高于第一工作频率。
另一方面，本申请实施例提供了一种驱动电路，包括：
可控电源，可控电源是工作频率可调的电源；以及
时序控制器，时序控制器包括处理器、存储器、多个开关和多个功能模块；存储器存储有用于指示控制各开关开闭状态的开关控制数据、各功能模块的工作参数和计算机程序；各功能模块通过一一对应的开关与存储器连接；处理器设置为连接I2C总线，处理器还与各开关、存储器的第一访问端以及可控电源连接，控制器执行计算机程序时实现以下处理：
获取I2C总线上传输的总线信号中的总线地址，I2C总线与时序控制器连接；
若判定总线地址与时序控制器的地址匹配，则向与时序控制器连接的可控电源发送频率调节信号，频率调节信号用于指示可控电源的工作频率从第一工作频率调节到第二工作频率，其中第二工作频率高于第一工作频率。
附图说明
图1为液晶面板的驱动架构的示意图；
图2为示例性技术中驱动电路的结构示意图；
图3为示例性技术中可控电源电压的波形示意图；
图4为根据实施例的驱动电路控制方法的流程示意图；
图5为根据另一个实施例的驱动电路控制方法的流程示意图；
图6为根据又一个实施例的驱动电路控制方法的流程示意图；
图7为根据再一个实施例的驱动电路控制方法的流程示意图；
图8为根据实施例的驱动电路控制装置的结构示意图；
图9为根据再一个实施例的驱动电路控制装置的结构示意图；
图10为根据实施例的驱动电路的结构示意图；
图11为根据又一个实施例的驱动电路的结构示意图；
图12为根据再一个实施例的驱动电路的结构示意图；
图13为根据实施例的显示装置的结构示意图。
具体实施方式
为了便于理解本申请，下面将参照相关附图对本申请进行更全面的描述。附图中给出了本申请的首选实施例。但是，本申请可以以许多不同的形式来实现，并不限于本文所描述的实施例。相反地，提供这些实施例的目的是使对本申请的公开内容更加透彻全面。
需要说明的是，当一个元件被认为是“连接”另一个元件，它可以是直接连接到另一个元件并与之结合为一体，或者可能同时存在居中元件。本文所使用的术语“安装”、“一端”、“另一端”以及类似的表述只是为了说明的目的。
除非另有定义，本文所使用的所有的技术和科学术语与属于本申请的技术领域的技术人员通常理解的含义相同。本文中在本申请的说明书中所使用的术语只是为了描述具体的实施例的目的，不是旨在于限制本申请。本文所使用的术语“及/或”包括一个或多个相关的所列项目的任意的和所有的组合。
图1为液晶面板的示例性驱动架构。图2为示例性技术中驱动电路的设计架构。当I2C总线(是由Philips公司开发的一种简单、双向二线制同步串行总线)上有动作的时候，内部的I2C slave(I2C总线从设备接口)只要检测到有动作，便会启动用于控制各开关的控制信号，将开关K1、K2、K3全部同时打开，这样时序控制器内部的OD(Over-actuated，过驱动)模块、ACC(Advanced Colour Control，精准颜色控制)模块(设置为自动控制色度放大器的增益)、Dither(抖动)模块便可以读取look up table(查找表)，这种设计可以提早打开内部开关，方便对时序控制器进行操作。然而，三个模块同时打开，会造成时序控制器内部处理芯片的工作量剧增，消耗的电源模块的电流便会突然变大，容易造成电源模块的电压不稳，造成芯片工作异常从而出现显示异常。
如图3所示，当用户向伽马芯片输送信号，即I2C有动作的时候，原本很稳定的电源模块的电压 VDD，由于电流的突然增大，电源模块的电压VDD便会进入异常波动区。
如图4所示，本申请实施例提供了一种驱动电路控制方法，包括：
S10：获取总线信号中的总线地址，总线信号为I2C总线20上传输的信号，I2C总线20与时序控制器10连接；
S20：若判定总线地址与时序控制器10的地址匹配，则向与时序控制器10连接的工作频率可调的可控电源30发送频率调节信号，频率调节信号用于指示可控电源30的工作频率从第一工作频率调节到第二工作频率，其中第二工作频率高于第一工作频率。
I2C总线20是由Philips公司开发的一种简单、双向二线制同步串行总线20。它只需要两根线即可在连接于总线20上的器件之间传输信息。总线20上的每个器件均有唯一的地址，根据各器件是用于传输数据还是接收数据，总线20上的各器件可以分为主器件和从器件，主器件用于启动总线20传输数据，并产生时钟以开放传输的器件，此时任何被寻址的器件均被认为是从器件(例如上述时序控制器10)。判定总线地址与时序控制器10的地址是否匹配，可以是判断总线20上传输的信号中用于寻址的8位数据中除起始位以外的有效位数据与时序控制器10的地址对应的数据是否一致。
为避免时序控制器10工作时与时序控制器10连接的电源输出电压异常波动，本申请实施例提供的驱动电路控制方法，通过判定总线地址是否与时序控制器10匹配，即判定时序控制器10是否为被控工作对象，当判定地址匹配时，则向可控电源30发送频率调节信号，使得可控电源30的工作频率增大。更快的频率代表更短的周期，有利于时序控制器10工作所造成的波动能够快速得到补偿，使得可控电源30输出电压的整体波动变小，处于正常波动范围内，保证可控电源30能够正常工作，显示面板正常显示。其中，可控电源30可以是PWM芯片，该PWM(Pulse-width modulation)芯片电源具有频率配置位，在判定总线地址与时序控制器10的地址匹配时，控制该频率配置位，使可控电源30以较高的工作频率进行工作。例如，PWM芯片电源可以以600KHZ或更低频率的第一工作频率正常工作，当判定总线地址与时序控制器10的地址匹配时，控制PWM芯片电源的频率配置位，使PWM芯片电源以750KHZ或更高频率的第二工作频率工作。以型号为ADP2370的可控电源30为例，ADP2370的FSEL引脚在无外界信号接入时处于低电平，可控电源30以600KHZ工作。当判定总线地址与时序控制器10的地址匹配时，即要控制时序控制器10工作，向FSEL引脚发送频率调节信号，FSEL引脚接入高电平信号，此时可控电源30的工作频率提高至1.2MHZ进行工作，可以使由于时序控制器10工作而造成可控电源30的电压波动快速得到补偿。
在其中一个实施例中，如图5所示，驱动电路控制方法还包括步骤：
S30：若判定总线地址与时序控制器10的地址匹配，则获取总线信号中的目标功能模块400的地址；
S40：根据目标功能模块400的地址生成并发送查询指令至存储器200，且接收存储器200反馈的与目标功能模块400对应的开关控制数据；
S50：根据开关控制数据控制与目标功能模块400连接的开关闭合，使目标功能模块400通过对应的开关获取存储器200中存储的各功能模块400的工作参数；
其中，时序控制器10包括多个功能模块400，目标功能模块400是总线信号指示的被控功能模块400。
目标功能模块400是时序控制器10中的功能模块400中的其中一个或多个功能模块，目标功能模块400是在地址匹配后继续传输的总线信号所要控制的对象。开关控制数据是与各目标功能模块400的地址具有对应关系的、用于指示控制与各个功能模块相对应的各开关的开闭状态的数据，并且开关控制数据存储在存储器200中。
为了避免总线20上有动作时，时序控制器10误触发，造成可控电源30输出电压的波动。在判定总线地址和时序控制器10的地址匹配时，即说明时序控制器10为被寻址的从器件，再继续接收总线信号，并且对后续接收的总线信号进行解析，获得目标功能模块400的地址。解析过程可以是按照每个字节进行分段，然后将每个字节中的8位数据中的有效位数据转换为时序控制器10内部可识别的地址(例如，将二进制转换为十六进制，与时序控制器10中功能模块400的地址存储所采用进制法一致)。进一步的，根据获得的目标功能模块400的地址生成并发送查询指令至存储器200，通过访问存储器200，获得与目标功能模块400对应的开关控制数据。其中，查询指令可以是包括目标功能模块400的地址的指令，在接收到存储器200反馈的开关控制数据后，根据该数据控制对应的开关闭合，使得目标功能模块400与存储器200连接，目标功能模块400从存储器200中获取其工作参数，进入工作状态。
在其中一个实施例中，如图6所示，根据开关控制数据控制与目标功能模块400连接的开关闭合的步骤包括：
S51：若接收到多个开关控制数据，则根据各开关控制数据依次控制与各目标功能模块400连接的开关闭合。
为进一步减小时序控制器10工作时，对可控电源30的输出电压造成的影响，当接收到开关控制数据时，即需要控制多个目标功能模块400时，则根据各开关控制数据依次控制各开关闭合，避免同时闭合多个开关，造成的负载过大，造成可控电源30输出电压波动。
本申请实施例提供的驱动电路控制方法，在检测到总线地址与时序控制器10内部的多个功能模块400地址匹配时，相应的，从存储器200获取多个开关控制模拟信号。为进一步减小多个功能模块400同时打开对可控电源30造成影响，处理器100按照一定的顺序，依次根据各开关控制模拟信号控制对应的开关闭合，保证同一时间只闭合一个开关，避免瞬时功耗过大造成的电源电压不稳，提供高品质的显示装置和显示效果。
在其中一个实施例中，开关控制数据存储在存储器200中的查找表内，查找表表征各功能模块400的地址与开关控制数据的对应关系。为方便查询，开关控制数据存储在查找表中，查找表是能够表征各功能模块400的地址与开关控制数据对应关系的表。具体地，表格中的存储内容可以是功能模块400的地址与开关控制数据一一对应的关系，则查询指令中可以包括目标功能模块400的地址。表格中的存储内容也可以是功能模块400的预先定义的编号与开关控制数据之间一一对应的关系，此时，根据目标功能模块400的地址生成查询指令的过程可以是，先根据目标功能模块400的地址获得该功能模块400的编号，然后生成包括该编号的查询指令。
在其中一个实施例中，如图7所示，根据开关控制数据控制与目标功能模块400连接的开关闭合的步骤包括：
S52：根据开关控制数据生成开关控制模拟信号；
S53：发送开关控制模拟信号至与对应的目标功能模块400连接的开关，控制开关闭合。
在接收到存储器200反馈的开关控制数据后，将该数据转换为能够控制开关状态的模拟量的开关控制模拟信号，以便控制对应开关闭合。其中，开关可以是MOS管，体积小。例如，与抖动模块430连接的开关可以是MOS管，漏极与抖动模块430连接，源极与存储器200连接，栅极用于接收开关控制模拟信号，栅极在接收到高电平的开关控制模拟信号时闭合，抖动模块430从存储器200中获取其对应的工作参数，开始工作。需要说明的是，开关还可以是其他类型的电子开关，例如晶体管等，连接方式随开关类型适应性调整，以保证开关在接收到对应的开关控制模拟信号后能够闭合。
在其中一个实施例中，功能模块400的工作参数包括过驱动模块410的工作参数、精准颜色控制模块420的工作参数和抖动模块430的工作参数，开关控制模拟信号包括：
第一控制信号C1，设置为控制与过驱动模块410连接的第一开关K1闭合，使过驱动模块410从存储器200获取过驱动模块410的工作参数；
第二控制信号C2，设置为控制与精准颜色控制模块420连接的第二开关K2闭合，使精准颜色控制模块420通过第二开关K2从存储器200获取精准颜色控制模块420的工作参数；
第三控制信号C3，设置为控制与抖动模块430连接的第三开关K3闭合，使抖动模块430通过第三开关K3从存储器200获取抖动模块430的工作参数；
功能模块400包括过驱动模块410、精准颜色控制模块420和抖动模块430，开关300包括第一开关K1、第二开关K2和第三开关K3。
其中，过驱动模块410设置为调制时序控制器10接收到的数据信号，该数据信号是用于驱动显示面板的信号。经过过驱动模块410调制的数据信号能够过驱动液晶，改善液晶分子的响应速度。精准颜色控制模块420是闭环的负反馈放大电路，设置为控制色度信号的幅度。精准颜色控制模块420检测色度同步信号作为标准，根据色度同步信号的大小来控制色度信号的幅度，自动改变增益，使色度信号达到一个稳定值。抖动模块430可以执行随机抖动操作，可以改善数字显示器的图像逼真度。
在其中一个具体的实施例中，针对于时序控制器10中常用的三个功能模块400，开关控制模拟信号包括第一控制信号C1、第二控制信号C2和第三控制信号C3，分别对应控制第一开关K1、第二开关K2和第三开关K3。其中，第一开关K1是与过驱动模块410连接的开关，第二开关K2是与精准颜色控制模块420连接的开关，第三开关K3是与抖动模块430连接的开关。若判定总线地址与时序控制器10的地址匹配，则进一步接收数据信息，对该数据信息进行解析，得到目标功能模块400的地址。若该地址为过驱动模块410的地址，则从存储器200中获取与该地址对应的开关控制数据，并根据该数据生成第一控制信号C1，发送该第一控制信号C1至第一开关K1，驱动第一开关K1闭合，过驱动模块410从存储器200获取其工作数据，开始工作。同理，若需要控制的对象为精准颜色控制模块420和抖动模块430时，实现过程同过驱动模块410。若需要控制三个功能模块400均进行工作，即根据数据信息生成了三个目标功能模块400的地址，则通过查询存储器200，获取三个开关控制数据，并根据这三个开关控制模拟信号生成第一控制信号C1、第二控制信号C2和第三控制信号C3，并依次发送第一控制信号C1、第二控制信号C2和第三控制信号C3至对应的第一开关K1、第二开关K2和第三开关K3，同一时间只闭合一个开关。其中，依次打开的顺序除上述例子描述的顺序之外，还可以是其他顺序。
在其中一个实施例中，查询指令包括目标功能模块400的地址。查询指令可以包括目标功能模块400的地址，当存储器200收到该查询指令后，可以获知该查询指令所要查询的是哪个功能模块400的地址所对应的开关控制数据，为查表提供依据。
另一方面，如图8所示，本申请实施例还提供了一种驱动电路控制装置，包括：
总线地址获取单元810，设置为获取I2C总线20上传输的总线信号中的总线地址，I2C总线20与时序控制器10连接；
电源调频控制单元820，设置为在判定总线地址与时序控制器10的地址匹配时，则向与时序控制器10连接的工作频率可调的可控电源30发送频率调节信号，频率调节信号用于指示可控电源30的工作频率从第一工作频率调节到第二工作频率，其中第二工作频率高于第一工作频率。
其中，可控电源30、开关300等释义及选型应用与上述驱动电路控制方法中的释义相同，在此不作赘述。
在其中一个实施例中，如图9所示，驱动电路控制装置还包括：
目标功能模块400地址获取单元830，设置为在判定总线地址与时序控制器10的地址匹配时，则获取总线信号中的目标功能模块400的地址；
开关控制数据获取单元840，设置为根据目标功能模块400的地址生成并发送查询指令至存储器200，且接收存储器200反馈的与目标功能模块400对应的开关控制数据；
开关控制单元850，设置为根据开关控制数据控制与目标功能模块400连接的开关300闭合，使目标功能模块400通过对应的开关获取存储器200中存储的功能模块400的工作参数；
其中，时序控制器10包括多个功能模块400，目标功能模块400是总线信号指示的被控功能模块400。
其中，目标功能模块400的地址等释义与上述驱动电路控制方法中的释义相同，在此不作赘述。
一种计算机可读存储介质，其上存储有计算机程序，计算机程序被处理器执行时实现以下处理：
获取总线信号中的总线地址，总线信号为I2C总线20上传输的信号，I2C总线20与时序控制器10连接；
若判定总线地址与时序控制器10的地址匹配，则向与时序控制器10连接的工作频率可调的可控电源30发送频率调节信号，频率调节信号用于指示可控电源30的工作频率从第一工作频率调节到第二工作频率，其中第二工作频率高于第一工作频率。
本申请实施例提供的计算机可读存储介质存储的计算机程序被处理器执行时还可以实现上述方法实施例中的其他步骤。
本领域普通技术人员可以理解实现上述实施例方法中的全部或部分流程，是可以通过计算机程序来指令相关的硬件来完成，的计算机程序可存储于一非易失性计算机可读取存储介质中，该计算机程序在执行时，可包括如上述各方法的实施例的流程。其中，本申请所提供的各实施例中所使用的对存储器、存储、数据库或其它介质的任何引用，均可包括非易失性和/或易失性存储器。非易失性存储器可包括只读存储器(ROM)、可编程ROM(PROM)、电可编程ROM(EPROM)、电可擦除可编程ROM(EEPROM)或闪存。易失性存储器可包括随机存取存储器(RAM)或者外部高速缓冲存储器。作为说明而非局限，RAM以多种形式可得，诸如静态RAM(SRAM)、动态RAM(DRAM)、同步DRAM(SDRAM)、双数据率SDRAM(DDRSDRAM)、增强型SDRAM(ESDRAM)、同步链路(Synchlink)DRAM(SLDRAM)、存储器总线(Rambus)直接RAM(RDRAM)、直接存储器总线动态RAM(DRDRAM)、以及存储器总线动态RAM(RDRAM)等。
如图10所示，本申请实施例提供了一种驱动电路，包括：
可控电源30，可控电源30是工作频率可调的电源；
时序控制器10，时序控制器10设置为连接I2C总线20和可控电源30，时序控制器10设置为获取I2C总线20上传输的总线信号中的总线地址，并在判定总线地址与时序控制器10的地址匹配时，向可控电源30发送频率调节信号，频率调节信号用于指示可控电源30的工作频率从第一工作频率调节到第二工作频率，其中第二工作频率高于第一工作频率。
其中，功能模块400、开关300等释义与上述驱动电路控制方法中的释义相同，在此不作赘述。根据本申请实施例提供的驱动电路，通过将时序控制器10与可控电源30连接，时序控制器10先判断总线地址是否与自身的地址匹配，若匹配，则向可控电源30发送频率调节信号，以指示可控电源30的工作频率增大，快速补偿因时序控制器10工作造成的电源电压波动，使电源电压处于正常的波动范围内。
在其中一个实施例中，时序控制器10在判定总线地址与自身地址匹配时，继续接收总线信号，并对总线信号进行解析，获取目标功能模块400的地址，并进一步根据该目标功能模块400的地址控制相应的开关300闭合，使目标功能模块400开始工作。
本申请实施例提供了一种驱动电路，如图11所示，包括：
可控电源30，可控电源30是工作频率可调的电源；
时序控制器10，时序控制器10包括处理器100、存储器200、多个开关和多个功能模块400；存储器200存储有用于指示控制各开关开闭状态的开关控制数据、各功能模块400的工作参数和计算机程序；各功能模块400通过一一对应的开关与存储器200连接；处理器100设置为连接I2C总线20，处理器100还与各开关、存储器200的第一访问端以及可控电源30连接，处理器100执行计算机程序时实现以下处理：
S10：获取I2C总线20上传输的总线信号中的总线地址，I2C总线20与时序控制器10连接；
S20：若判定总线地址与时序控制器10的地址匹配，则向与时序控制器10连接的可控电源30发送频率调节信号，频率调节信号用于指示可控电源30的工作频率从第一工作频率调节到第二工作频率，其中第二工作频率高于第一工作频率。
在其中一个实施例中，处理器100执行计算机程序时还可以实现以下处理：
S30：若判定总线地址与时序控制器10的地址匹配，则获取总线信号中的目标功能模块400的地址；
S40：根据目标功能模块400的地址生成并发送查询指令至存储器200，且接收存储器200反馈的与目标功能模块400对应的开关控制数据；
S50：根据开关控制数据控制与目标功能模块400连接的开关闭合，使目标功能模块400通过对应的开关获取存储器200中存储的各功能模块400的工作参数；
其中，时序控制器10包括多个功能模块400，目标功能模块400是总线信号指示的被控功能模块400。
在其中一个实施例中，如图12所示，功能模块400的参数包括过驱动模块410的工作参数、精准颜色控制模块420的工作参数和抖动模块430的工作参数，开关控制模拟信号包括第一控制信号C1、第二控制信号C2和第三控制信号C3，开关包括：
第一开关K1，第一开关K1的第一端与存储器200的第二访问端连接；
第二开关K2，第二开关K2的第一端与存储器200的第二访问端连接；
第三开关K3，第三开关K3的第一端与存储器200的第二访问端连接；
功能模块400包括：
过驱动模块410，过驱动模块410的输入端与第一开关K1的第二端连接；
精准颜色控制模块420，精准颜色控制模块420的输入端与第二开关K2的第二端连接；
抖动模块430，抖动模块430的输入端与第三开关K3的第二端连接；
处理器100设置为根据第一控制信号C1控制第一开关K1闭合，设置为根据第二控制信号C2控制第二开关K2闭合；还设置为根据第三控制信号C3控制第三开关K3闭合。
其中，第一开关K1、第二控制信号C2等释义与上述方法实施例中相同，在此不做赘述。通过各控制信号与各开关一一对应的方式，能够单独控制各开关的开关状态，在需要对多个功能模块400进行控制时，可以依次控制各功能模块400，同一时间闭合一个开关，避免因时序控制器10工作而造成可控电源30输出电压的电压波动，提升显示品质。
在其中一个实施例中，如图11所示，驱动电路还包括伽马芯片40，伽马芯片40设置为连接I2C总线20。具体的，伽马芯片40和时序控制器10均连接I2C总线20，可控电源30为时序控制器10供电，为避免对伽马芯片40进行操作时，时序控制器10误动作，时序控制器10内部功能模块400全部打开，造成可控电源30输出电压波动。采用上述实施例中的时序控制器10，先判断总线地址是否与时序控制器10的地址匹配，若匹配再进行下一步工作，根据进一步获取的目标功能模块400的地址，进行查表等，从存储器200中获取目标功能模块400对应的开关控制数据，根据该数据控制对应的开关闭合，目标功能模块400从存储器200获取工作参数，开始工作。
一种显示装置，如图13所示，包括显示面板2和上述驱动电路1，驱动电路1用于驱动显示面板2显示。
本申请实施例提供的显示装置具有上述驱动电路1，能够保证在总线上有动作时，可控电源30的输出电压稳定，可控电源30输出电压波动能够得到快速补偿，整体电压处于正常波动范围内，进而保证各器件稳定工作，显示效果稳定。
以上实施例的各技术特征可以进行任意的组合，为使描述简洁，未对上述实施例中的各个技术特征所有可能的组合都进行描述，然而，只要这些技术特征的组合不存在矛盾，都应当认为是本说明书记载的范围。
以上实施例仅表达了本申请的几种实施方式，其描述较为具体和详细，但并不能因此而理解为对本申请专利范围的限制。应当指出的是，对于本领域的普通技术人员来说，在不脱离本申请构思的前提下，还可以做出若干变形和改进，这些都属于本申请的保护范围。因此，本申请专利的保护范围应以所附权利要求为准。

Claims (20)

  1. 一种驱动电路控制方法，包括：
    获取总线信号中的总线地址，所述总线信号为I2C总线上传输的信号，所述I2C总线与时序控制器连接；以及
    若判定所述总线地址与所述时序控制器的地址匹配，则向与所述时序控制器连接的工作频率可调的可控电源发送频率调节信号，所述频率调节信号用于指示所述可控电源的工作频率从第一工作频率调节到第二工作频率，其中所述第二工作频率高于所述第一工作频率。
  2. 根据权利要求1所述的驱动电路控制方法，其中，向与所述时序控制器连接的工作频率可调的可控电源发送频率调节信号包括：
    将所述频率调节信号发送至所述可控电源的频率配置位，并调节所述频率配置位，使所述可控电源以所述第二工作频率工作。
  3. 根据权利要求1所述的驱动电路控制方法，其中，所述第一工作频率为600KHZ或更低频率，所述第二工作频率为750KHZ或更高频率。
  4. 根据权利要求1所述的驱动电路控制方法，其中，所述第一工作频率为600KHZ，所述第二工作频率为1.2MHZ。
  5. 根据权利要求1所述的驱动电路控制方法，其中，所述时序控制器包括多个功能模块，所述方法还包括：
    若判定所述总线地址与所述时序控制器的地址匹配，则获取所述总线信号中的目标功能模块的地址；
    根据所述目标功能模块的地址生成并发送查询指令至存储器，且接收所述存储器反馈的与所述目标功能模块对应的开关控制数据；以及
    根据所述开关控制数据控制与所述目标功能模块连接的开关闭合，使所述目标功能模块通过对应的开关获取所述存储器中存储的各功能模块的工作参数；
    所述目标功能模块是所述总线信号指示的被控功能模块。
  6. 根据权利要求5所述的驱动电路控制方法，其中，获取所述总线信号中的目标功能模块的地址包括：
    继续接收所述总线信号，并且对后续接收的总线信号进行解析，以将所述总线信号转换为所述时 序控制器内部可识别的地址。
  7. 根据权利要求5所述的驱动电路控制方法，其中，根据所述开关控制数据控制与所述目标功能模块连接的开关闭合包括：
    若接收到多个所述开关控制数据，则根据各所述开关控制数据依次控制与各所述目标功能模块连接的开关闭合。
  8. 根据权利要求1所述的驱动电路控制方法，其中，判定所述总线地址与所述时序控制器的地址匹配包括：
    判断所述总线上传输的信号中用于寻址的数据中除起始位以外的有效位数据与所述时序控制器的地址对应的数据是否一致。
  9. 根据权利要求5所述的驱动电路控制方法，其中，所述开关控制数据存储在存储器中的查找表内，所述查找表用于表征各功能模块的地址与开关控制数据的对应关系。
  10. 根据权利要求5所述的驱动电路控制方法，其中，根据所述开关控制数据控制与所述目标功能模块连接的开关闭合包括：
    根据所述开关控制数据生成开关控制模拟信号；
    发送所述开关控制模拟信号至与对应的目标功能模块连接的开关，控制所述开关闭合。
  11. 根据权利要求10所述的驱动电路控制方法，其中，所述功能模块的工作参数包括过驱动模块的工作参数、精准颜色控制模块的工作参数和抖动模块的工作参数，所述开关控制模拟信号包括：
    第一控制信号，设置为控制与过驱动模块连接的第一开关闭合，使所述过驱动模块从所述存储器获取所述过驱动模块的工作参数；
    第二控制信号，设置为控制与精准颜色控制模块连接的第二开关闭合，使所述精准颜色控制模块通过所述第二开关从所述存储器获取所述精准颜色控制模块的工作参数；
    第三控制信号，设置为控制与抖动模块连接的第三开关闭合，使所述抖动模块通过所述第三开关从所述存储器获取所述抖动模块的工作参数；
    所述功能模块包括所述过驱动模块、所述精准颜色控制模块和所述抖动模块，所述开关包括所述第一开关、所述第二开关和所述第三开关。
  12. 根据权利要求1所述的驱动电路控制方法，其中，所述可控电源是脉宽调制芯片电源。
  13. 一种驱动电路控制装置，包括处理器和存储有计算机程序的存储器；所述处理器执行所述计 算机程序时实现如下处理：
    获取I2C总线上传输的总线信号中的总线地址，所述I2C总线与时序控制器连接；
    在判定所述总线地址与所述时序控制器的地址匹配时，向与所述时序控制器连接的工作频率可调的可控电源发送频率调节信号，所述频率调节信号用于指示所述可控电源的工作频率从第一工作频率调节到第二工作频率，其中第二工作频率高于第一工作频率。
  14. 一种驱动电路，包括：
    可控电源，所述可控电源是工作频率可调的电源；以及
    时序控制器，所述时序控制器包括处理器、存储器、多个开关和多个功能模块；所述存储器存储有用于指示控制各所述开关开闭状态的开关控制数据、各所述功能模块的工作参数和计算机程序；各所述功能模块通过一一对应的开关与所述存储器连接；所述处理器设置为连接I2C总线，所述处理器还与各所述开关、所述存储器的第一访问端以及所述可控电源连接，所述处理器执行所述计算机程序时实现以下处理：
    获取I2C总线上传输的总线信号中的总线地址，所述I2C总线与时序控制器连接；
    若判定所述总线地址与所述时序控制器的地址匹配，则向与所述时序控制器连接的可控电源发送频率调节信号，所述频率调节信号用于指示所述可控电源的工作频率从第一工作频率调节到第二工作频率，其中第二工作频率高于第一工作频率。
  15. 根据权利要求14所述的驱动电路，其中，所述处理器执行所述计算机程序时还实现以下处理：
    将所述频率调节信号发送至所述可控电源的频率配置位，并调节所述频率配置位，使所述可控电源以所述第二工作频率工作。
  16. 根据权利要求14所述的驱动电路，其中，所述第一工作频率为600KHZ或更低频率，所述第二工作频率为750KHZ或更高频率。
  17. 根据权利要求14所述的驱动电路，其中，所述第一工作频率为600KHZ，所述第二工作频率为1.2MHZ。
  18. 根据权利要求14所述的驱动电路，其中，所述处理器执行所述计算机程序时还实现以下处理：
    若判定所述总线地址与所述时序控制器的地址匹配，则获取所述总线信号中的目标功能模块的地址；
    根据所述目标功能模块的地址生成并发送查询指令至存储器，且接收所述存储器反馈的与所述目 标功能模块对应的开关控制数据；
    根据所述开关控制数据控制与所述目标功能模块连接的开关闭合，使所述目标功能模块通过对应的开关获取所述存储器中存储的各功能模块的工作参数；
    其中，所述目标功能模块是所述总线信号指示的被控功能模块。
  19. 根据权利要求14所述的驱动电路，还包括伽马芯片，所述伽马芯片设置为连接至所述I2C总线。
  20. 根据权利要求14所述的驱动电路，其中，所述可控电源是脉宽调制芯片电源。
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