WO2020248584A1 - 一种收发信机的增益平坦度补偿方法 - Google Patents

一种收发信机的增益平坦度补偿方法 Download PDF

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WO2020248584A1
WO2020248584A1 PCT/CN2019/130103 CN2019130103W WO2020248584A1 WO 2020248584 A1 WO2020248584 A1 WO 2020248584A1 CN 2019130103 W CN2019130103 W CN 2019130103W WO 2020248584 A1 WO2020248584 A1 WO 2020248584A1
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gain flatness
frequency
signal
power
filter
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PCT/CN2019/130103
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English (en)
French (fr)
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陈青松
王鑫
吴文权
任爱林
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三维通信股份有限公司
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03828—Arrangements for spectral shaping; Arrangements for providing signals with specified spectral properties
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006—Arrangements for removing intersymbol interference
    • H04L25/03012—Arrangements for removing intersymbol interference operating in the time domain
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/0003—Software-defined radio [SDR] systems, i.e. systems wherein components typically implemented in hardware, e.g. filters or modulators/demodulators, are implented using software, e.g. by involving an AD or DA conversion stage such that at least part of the signal processing is performed in the digital domain
    • H04B1/0007—Software-defined radio [SDR] systems, i.e. systems wherein components typically implemented in hardware, e.g. filters or modulators/demodulators, are implented using software, e.g. by involving an AD or DA conversion stage such that at least part of the signal processing is performed in the digital domain wherein the AD/DA conversion occurs at radiofrequency or intermediate frequency stage
    • H04B1/0017—Digital filtering
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/02—Transmitters
    • H04B1/04—Circuits
    • H04B1/0475—Circuits with means for limiting noise, interference or distortion
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06—Receivers
    • H04B1/10—Means associated with receiver for limiting or suppressing noise or interference
    • H04B1/12—Neutralising, balancing, or compensation arrangements
    • H04B1/123—Neutralising, balancing, or compensation arrangements using adaptive balancing or compensation means
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
    • H04B1/40—Circuits
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/18—Phase-modulated carrier systems, i.e. using phase-shift keying
    • H04L27/22—Demodulator circuits; Receiver circuits
    • H04L27/233—Demodulator circuits; Receiver circuits using non-coherent demodulation
    • H04L27/2334—Demodulator circuits; Receiver circuits using non-coherent demodulation using filters
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/02—Transmitters
    • H04B1/04—Circuits
    • H04B2001/0408—Circuits with power amplifiers
    • H04B2001/0425—Circuits with power amplifiers with linearisation using predistortion

Definitions

  • the present invention relates to the field of wireless communication technology, and in particular to a method for gain flatness compensation of a transceiver.
  • the working frequency band of radio transceivers has become wider and wider, reaching several hundred MHz. In such a wide frequency range, it is difficult to guarantee the gain flatness of the radio frequency device.
  • the related art provides a method for compensating the gain flatness of a transceiver, which can compensate the gain flatness of an analog device through digital signal processing.
  • the method is described as follows: According to the frequency interval f s /N, test the gain of the receiving channel and the transmitting channel, where f s is the sampling rate of the digital signal, and N is an integer power of 2; the calculation chain is based on the center frequency point Gain flatness of the circuit; add linear phase information to the calculated gain flatness data, and then perform IFFT transformation; use the result of IFFT transformation as the coefficient of the complex FIR filter to compensate for the gain flatness.
  • At least some embodiments of the present invention provide a method for compensating gain flatness of a transceiver, so as to at least partially solve the problem that the method for compensating gain flatness of a transceiver provided in the related art is difficult to be applied to a large bandwidth transceiver Technical issues.
  • a method for compensating gain flatness of a receiver is provided.
  • a complex coefficient FIR filter is used to compensate the gain flatness of the receiving channel. The method includes the following steps:
  • the signal generator sets f c -f s /2 as the frequency starting point, and sends a single tone signal at N frequency points at a frequency interval of f s /N, and calculates the power P n at each frequency point in the digital domain;
  • f c is the center frequency of the receiving channel
  • f s is the sampling frequency of the digital signal
  • N is an integer power of 2;
  • the amplitude of the IQ signal is used in the digital domain to calculate the power of the input signal, and the calculation formula is:
  • M is the number of points for calculating power.
  • the channel flatness P′ n is calculated based on the channel center frequency; the power point corresponding to the channel center frequency point f c is P N/2 , then
  • phase information is added to the gain flatness data P′ n to form a sequence X n ,
  • the FIR filter coefficients are calculated by IFFT, and before the IFFT operation is performed, the aforementioned sequence X n needs to be shifted.
  • the single tone signal signals (f 1 , f 2 ,...f n ) at multiple frequency points are given different amplitudes G 1 , G 2 ,...G n , for the edge band
  • the single-tone signal is assigned a larger G value, and the single-tone signal of other frequency bands is assigned a smaller G value.
  • the single-tone signal with multiple frequency points mentioned above is used as the excitation source of the filter, and in the calculation process, You only need to calculate 1/2 Y n to get 1/2 Z q .
  • the adaptive process converges, that is, the mean square error is the smallest, Z q achieves a best fit for Y n .
  • four real coefficient FIR filters are used to construct a complex coefficient FIR filter.
  • a method for compensating the gain flatness of a transmitter is also provided.
  • a complex coefficient FIR filter is used to compensate the gain flatness of the transmitting channel in the digital domain. The method includes the following steps:
  • NCO is used in the digital domain to generate a single tone signal of N frequency points at a frequency interval of f s /N, and a spectrum analyzer is used to read the frequency point of each frequency point.
  • Power P n where f s is the sampling frequency of the digital signal, and N is an integer power of 2;
  • a Q-order complex FIR filter is constructed before the digital domain is sent to the DAC, and Z q is used as the coefficient of the FIR filter to filter the IQ signal.
  • the result is the transmitted data after gain flatness compensation.
  • the amplitude of the IQ signal is used in the digital domain to calculate the power of the input signal, and the calculation formula is:
  • M is the number of points for calculating power.
  • the channel flatness P′ n is calculated based on the channel center frequency; the power point corresponding to the channel center frequency point f c is P N/2 , then
  • phase information is added to the gain flatness data P′ n to form a sequence X n ,
  • the FIR filter coefficients are calculated by IFFT, and before the IFFT operation is performed, the aforementioned sequence X n needs to be shifted.
  • the single tone signal signals (f 1 , f 2 ,...f n ) at multiple frequency points are given different amplitudes G 1 , G 2 ,...G n , for the edge band
  • the single-tone signal is assigned a larger G value, and the single-tone signal of other frequency bands is assigned a smaller G value.
  • the single-tone signal with multiple frequency points mentioned above is used as the excitation source of the filter, and in the calculation process, You only need to calculate 1/2 Y n to get 1/2 Z q .
  • the adaptive process converges, that is, the mean square error is the smallest, Z q achieves a best fit for Y n .
  • four real coefficient FIR filters are used to construct a complex coefficient FIR filter.
  • Fig. 1 is a schematic structural diagram of a device for implementing a method for gain flatness compensation of a receiver according to one of the embodiments of the present invention.
  • Fig. 2 is a schematic diagram of a method for approximating the frequency response of Y n by using a complex sequence of Q points Z q according to an alternative embodiment of the present invention.
  • Fig. 3 is a schematic diagram of constructing a complex coefficient filter with 4 real coefficient FIR filters according to an alternative embodiment of the present invention.
  • Fig. 4 is a schematic structural diagram of a device for implementing a method for compensating gain flatness of a transmitter according to one embodiment of the present invention.
  • the receiver includes an analog circuit part, an analog-to-digital converter ADC and a digital signal processor FPGA or DSP.
  • Fig. 1 is a schematic diagram of the structure of an apparatus for implementing a method for gain flatness compensation of a receiver according to one of the embodiments of the present invention.
  • the analog circuit of the receiver generally includes a duplexer, and one or more band pass filters. , Low noise amplifier LNA, mixer or demodulator, gain amplifier and attenuator and other circuits. Because this part of the circuit is not the key part of the present invention, a module is used for illustration in Figure 1.
  • the gain unevenness of the receiver is mainly caused by the analog circuit part.
  • the present invention constructs a complex FIR filter in the digital domain to compensate for the gain flatness.
  • the signal sampled by the ADC is first converted to an IQ signal with zero intermediate frequency through spectrum shifting and low-pass filtering. If the analog circuit part adopts the zero-IF scheme and the ADC adopts dual-channel IQ sampling, this process can be omitted.
  • the power calculation module calculates the power of the input signal and uses the following formula to calculate the power in the digital domain:
  • M is the number of points for calculating power.
  • M 32768 in this embodiment.
  • the signal generator takes f c -f s /2 as the starting frequency point, f s /N as the step, a total of N frequency points of the single tone signal, in the digital domain using the above formula to calculate the power of each frequency point P n .
  • f c is the center frequency of the receiving channel
  • f s is the sampling rate of the digital signal. Because the IFFT operation is to be performed on P n , in order to simplify the operation, the value of N is limited to an integer power of 2. The larger the value of N, the more accurate the result of flatness compensation.
  • the channel flatness P′ n is calculated based on the channel center frequency f c .
  • the power point corresponding to f c is P N/2 , then
  • the unit of P is dB.
  • the power calculation in the above formula converts the dB value into an absolute value.
  • the communication system In order for signals of different frequencies to pass through the communication system without distortion, the communication system is required to have a linear phase.
  • the gain flatness compensation method provided by the present invention is realized by a complex coefficient FIR filter, so the filter also requires linear phase characteristics. In the above description, we only obtained the amplitude characteristics at different frequency points, so the phase characteristics need to be artificially added to form a linear phase system.
  • the frequency order of calculating power is -f s /2 to f s /2, but according to the principle of IFFT, the corresponding frequency order is 0 to f s , so before IFFT transformation, X n
  • the sequence is transformed from 0 to f s , and the transformation method is as follows:
  • IFFT is a general algorithm in digital signal processing, which will not be repeated here.
  • Fig. 2 is a schematic diagram of a method for approximating the frequency response of Y n by using the complex sequence Z q of Q points according to one of the alternative embodiments of the present invention. As shown in Fig. 2, the complex sequence Z q of Q points is used to approximate Y n Frequency response.
  • a complex coefficient FIR filter can be used to compensate for gain flatness.
  • the real-coefficient FIR filters are generally involved in the conventional digital signal processing. Therefore, a method of constructing complex FIR filters from real-coefficient FIR filters is also provided.
  • Fig. 3 is a schematic diagram of constructing a complex coefficient filter with 4 real coefficient FIR filters according to one of the alternative embodiments of the present invention.
  • the 4 real coefficient FIR filters constitute a complex coefficient filter.
  • h_real is the real part of the complex coefficient
  • h_imag is the imaginary part of the complex coefficient.
  • Fig. 4 is a schematic diagram of the structure of a device for implementing a method for gain flatness compensation of a transmitter according to one of the embodiments of the present invention.
  • the transmitter generally includes a digital signal processor FPGA or DSP, a digital-to-analog converter DAC and an analog circuit section.
  • the analog circuit part of the transmitter generally includes one or more stages of bandpass filters, mixers or modulators, power amplifiers PA, and duplexers. Because this part is not the key part of the present invention, a module is used for illustration in FIG. 4.
  • the gain unevenness of the transmitter is mainly caused by the analog circuit part.
  • the present invention constructs a complex FIR filter in the digital domain to compensate for the gain flatness.
  • NCO In the digital domain, NCO is used to generate a single tone signal with N frequency points, the frequency range is from -f s /2 to f s /2, with f s /N as the step.
  • the selector module (MUX) in Figure 4 selects the output of the NCO and sends it to the DAC, uses a spectrum analyzer to measure the power P n of each frequency point, and then the transmitter enters the normal operating mode, and the MUX selects the output of the FIR filter Transmit to the DAC. Because it is necessary to perform an IFFT operation on P n , in order to simplify the operation, the value of N is limited to an integer power of 2. The larger the value of N, the more accurate the result of flatness compensation.
  • the result P n measured by the spectrum analyzer is input to the digital signal processor for subsequent processing.
  • the channel center frequency ie, the zero frequency in the digital domain
  • the power point corresponding to the center frequency is P N/2 , then
  • the power measured by the spectrum analyzer is in dB, it needs to be converted into an absolute power value by exponentiation.
  • the remaining processing method is the same as the flatness compensation method of the receiver, and will not be repeated here.

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Circuits Of Receivers In General (AREA)
  • Transmitters (AREA)
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Abstract

本发明提供一种收发信机的增益平坦度补偿方法，其包括：一种接收机的增益平坦度补偿方法，在数字域通过一个复系数的FIR滤波器来补偿接收通道的增益平坦度；以及一种发射机的增益平坦度补偿方法，在数字域通过构造复系数的FIR滤波器来补偿发射通道的增益平坦度。该方法可以灵活地在补偿精度和计算量之间进行平衡；可以重点补偿频带边缘的平坦度特性，用较少的计算量获得良好的性能。

Description

一种收发信机的增益平坦度补偿方法 技术领域
本发明涉及无线通信技术领域，尤其涉及一种收发信机的增益平坦度补偿方法。
背景技术
随着4G/5G的应用，无线电收发信机的工作频带越来越宽，达到了几百兆赫兹。在如此宽的频率范围内，射频器件的增益平坦度难以得到保证。
相关技术中提供了一种收发信机的增益平坦度补偿方法，可以通过数字信号处理来补偿模拟器件的增益平坦度。该方法描述如下：按照f s/N为频率间隔，测试接收通道以及发射通道的增益，其中，f s是数字信号采样率，N取2的整数次方；以中心频率点为基准，计算链路的增益平坦度；对计算出的增益平坦度数据添加线性相位信息，然后进行IFFT变换；用IFFT变换的结果作为复数FIR滤波器的系数，对增益平坦度进行补偿。
但该方法应用在大带宽的收发信机中时，存在如下一些限制和不足：
(1)该方法限制N的取值必须是2的整数次方。通常情况下，N越大，补偿越精确，但FIR滤波器消耗的计算资源越多。当收发信机带宽较大时，在硬件实现中，很难在补偿精度和计算量之间取得平衡。以fs＝245.76MSps为例，假设N取32，频率间隔是7.68MHz，补偿精度较低；假设N取64，频率间隔是3.84MHz，补偿精度较高，但复数FIR滤波器的计算量是N＝32时的8倍；
(2)对于宽带收发信机来说，因为射频滤波器的特性，通常在频段的边缘部分增益平坦度较差，中间部分增益平坦度较好，在进行补偿时应该把权重向边缘频段倾斜。该方法对所有的频率点同等对待，无法突出重点，因此需要更多的点数(更大的N)来取得精确的补偿结果。
发明内容
本发明至少部分实施例提供了一种收发信机的增益平坦度补偿方法，以至少部分地解决相关技术中所提供的收发信机的增益平坦度补偿方法难以适用于大带宽的收发信机中的技术问题。
在本发明其中一实施例中，提供了一种接收机的增益平坦度补偿方法，在数字域通过一个复系数的FIR滤波器来补偿接收通道的增益平坦度，所述方法包括以下步骤：
将ADC接收到的信号转换为零种频的IQ信号；
信号发生器设置f c-f s/2为频率起始点，并以f s/N的频率间隔发送N个频率点的单音信号，在数字域计算出每个频率点的功率P n；其中f c为接收通道的中心频率，f s数字信号的采样频率，N取值为2的整数次方；
以通道中心频率点f c的功率为基准，计算整个f s带宽内的增益平坦度，得到序列P′ n；
对P′ n增加线性相位信息，构造一个N点的复数序列X n；
对X n进行N点的IFFT运算，得到结果Y n；
用Q点的复数序列Z q来逼近Y n的频率响应；其中Q可以选择合适的整数；
在数字域构造一个Q阶的复数FIR滤波器，以Z q作为滤波器的系数，对IQ信号进行滤波，其结果就是增益平坦度补偿后的数据。
在本申请的一个可选实施例中，数字域中采用IQ信号的幅度来计算输入信号的功率，计算公式为：
Figure PCTCN2019130103-appb-000001
其中，M为计算功率的点数。
在本申请的一个可选实施例中，以通道中心频率为基准，计算通道平坦度P′ n；通道中心频率点f c对应的功率点为P N/2，则
Figure PCTCN2019130103-appb-000002
在本申请的一个可选实施例中，对增益平坦度数据P′ n增加相位信息，构成序列X n，
计算公式为：
X n＝P′ n*e jπ(N/2-n)*(N-1)/N，n＝0，1，2......N-1
在本申请的一个可选实施例中，通过IFFT计算FIR滤波器系数，进行IFFT运算 之前，需要对上述的序列X n进行移位处理，
公式如下：
Figure PCTCN2019130103-appb-000003
然后进行IFFT运算得到滤波器的系数Y n＝IFFT(X′ n)。
在本申请的一个可选实施例中，将多个频率点的单音信号信号(f 1,f 2,…f n)赋以不同的幅度G 1,G 2,…G n，对边缘频段的单音信号赋以较大的G值，其他频段的单音信号赋以较小的G值，采用上述的多个频率点的单音信号作为滤波器的激励源，且在计算过程中，只需计算1/2的Y n得出1/2的Z q，当自适应过程收敛后即均方误差最小时，Z q实现了Y n的一个最佳拟合。
在本申请的一个可选实施例中，采用4个实系数FIR滤波器来构造一个复系数的FIR滤波器。
在本发明其中一实施例中，还提供了一种发射机的增益平坦度补偿方法，在数字域通过一个复系数的FIR滤波器来补偿发射通道的增益平坦度，所述方法包括以下步骤：
在-f s/2至f s/2的频率范围内，数字域中采用NCO以f s/N的频率间隔产生N个频率点的单音信号，用频谱分析仪读取每个频率点的功率P n；其中f s为数字信号的采样频率，N取值为2的整数次方；
以通道中心频率点为基准，计算发射通道的增益平坦度，得到序列P′ n；
对P′ n增加相位信息构造一个N点的复数序列X n；
对X n进行N点IFFT运算，得到结果Y n；
用Q点的复数序列Z q来逼近Y n的频率响应；其中Q可以选择合适的整数
在数字域发送到DAC之前构造一个Q阶复数FIR滤波器，以Z q作为FIR滤波器的系数，对IQ信号进行滤波运算，其结果就是增益平坦度补偿后的发射数据。
在本申请的一个可选实施例中，数字域中采用IQ信号的幅度来计算输入信号的功率，计算公式为：
Figure PCTCN2019130103-appb-000004
其中，M为计算功率的点数。
在本申请的一个可选实施例中，以通道中心频率为基准，计算通道平坦度P′ n；通道中心频率点f c对应的功率点为P N/2，则
Figure PCTCN2019130103-appb-000005
在本申请的一个可选实施例中，对增益平坦度数据P′ n增加相位信息，构成序列X n，
计算公式为：
X n＝P′ n*e jπ(N/2-n)*(N-1)/N，n＝0，1，2......N-1
在本申请的一个可选实施例中，通过IFFT计算FIR滤波器系数，进行IFFT运算之前，需要对上述的序列X n进行移位处理，
公式如下：
Figure PCTCN2019130103-appb-000006
然后进行IFFT运算得到滤波器的系数Y n＝IFFT(X′ n)。
在本申请的一个可选实施例中，将多个频率点的单音信号信号(f 1,f 2,…f n)赋以不同的幅度G 1,G 2,…G n，对边缘频段的单音信号赋以较大的G值，其他频段的单音信号赋以较小的G值，采用上述的多个频率点的单音信号作为滤波器的激励源，且在计算过程中，只需计算1/2的Y n得出1/2的Z q，当自适应过程收敛后即均方误差最小时，Z q实现了Y n的一个最佳拟合。
在本申请的一个可选实施例中，采用4个实系数FIR滤波器来构造一个复系数的FIR滤波器。
通过本发明至少部分实施例，可以灵活地在补偿精度和计算量之间进行平衡；以及可以重点补偿频带边缘的平坦度特性，用较少的计算量获得良好的性能。
附图说明
图1是根据本发明其中一实施例的接收机增益平坦度补偿方法的实现装置结构示意图。
图2是根据本发明其中一可选实施例的使用Q点的复数序列Z q来逼近Y n的频率响应的方法示意图。
图3是根据本发明其中一可选实施例的用4个实系数FIR滤波器构造一个复系数滤波器的示意图。
图4是根据本发明其中一实施例的发射机增益平坦度补偿方法的实现装置结构示意图。
具体实施方式
下面将结合附图对本发明的优选实施例进行详细的描述：
接收机包括模拟电路部分，模数转换器ADC以及数字信号处理器FPGA或DSP。图1是根据本发明其中一实施例的接收机增益平坦度补偿方法的实现装置结构示意图，如图1所示，接收机的模拟电路一般包括双工器，一级或多级带通滤波器，低噪声放大器LNA，混频器或解调器，增益放大器以及衰减器等电路。因为这部分电路不是本发明的重点部分，因此在图1中用一个模块来示意。
接收机的增益不平坦主要是由模拟电路部分造成的，本发明在数字域中构造一个复数的FIR滤波器来对增益平坦度进行补偿。
在数字域中，首先将ADC采样的信号通过频谱搬移和低通滤波转换为零中频的IQ信号。如果模拟电路部分采用零中频方案，ADC采用双通道的IQ采样，则可以省略掉这一过程。
功率计算模块计算输入信号的功率，在数字域中采用以下公式计算功率：
Figure PCTCN2019130103-appb-000007
其中M为计算功率的点数。为了使计算结果尽量准确，本实施例中M＝32768。
信号发生器以f c-f s/2为起始频率点，f s/N为步进，共计N个频率点的单音信号，数字域中用上述公式计算出各个频率点的功率P n。其中f c为接收通道的中心频率，f s为数字信号的采样速率。因为要对P n进行IFFT运算，为了运算的简便，限定N的取值为2的整数次方。N的取值越大，平坦度补偿的结果越精确。
以通道中心频率f c为基准，计算通道平坦度P′ n。f c对应的功率点为P N/2，则
Figure PCTCN2019130103-appb-000008
因为计算功率P的时候取了对数运算，因此P的单位为dB，上述公式中的幂运算将dB值转换为绝对值。
为了使不同频率的信号不失真地通过通信系统，要求通信系统具有线性相位。本发明提供的增益平坦度补偿方法是通过复系数的FIR滤波器来实现的，因此该滤波器也要求具有线性相位特性。在上文的叙述中，我们仅仅获得了在不同频率点上的幅度特性，因此需要人为地添加相位特性，以构成一个线性相位系统。
增加相位的公式如下：
X n＝P′ n*e jπ(N/2-n)*(N-1)/N，n＝0，1，2......N-1
根据上文所述，计算功率的频率顺序为-f s/2到f s/2，但是根据IFFT原理，其对应的频率顺序为0到f s，因此在IFFT变换之前，需要将X n的顺序变换为0到f s，变换方法如下：
Figure PCTCN2019130103-appb-000009
最后，对X′ n进行N点的IFFT，得到复数序列Y n，作为FIR滤波器的系数。
Y n＝IFFT(X′ n)
其中，IFFT是数字信号处理中的通用算法，在此不再赘述。
图2是根据本发明其中一可选实施例的使用Q点的复数序列Z q来逼近Y n的频率响应的方法示意图，如图2所示，使用Q点的复数序列Z q来逼近Y n的频率响应。将多个频率点的单音信号(f 1,f 2,…f n)赋以不同的幅度G 1,G 2,…G n，对边缘频段的单音信号赋以较大的G值，其他频段的单音信号赋以较小的G值，因为通常在频段的边缘部 分增益平坦度较差，中间部分的增益平坦度较好，所以在平坦度补偿时，把权重向边缘频段倾斜。
采用上述的多个频率点的单音信号作为滤波器的激励源，且在计算过程中，只需计算1/2的Y n得出1/2的Z q，由于滤波器是线性相位，因此其系数具有对称性，即只需计算1/2的系数。
当自适应过程收敛后即均方误差最小时，Z q实现了Y n的一个最佳拟合。
在本发明的一个可选实施例中，可以使用复系数的FIR滤波器来进行增益平坦度的补偿。但是在常规的数字信号处理过程中涉及到的一般是实系数的FIR滤波器，因此还提供了一种由实系数FIR滤波器构造复数FIR滤波器的方法。
图3是根据本发明其中一可选实施例的用4个实系数FIR滤波器构造一个复系数滤波器的示意图，如图3所示，4个实系数的FIR滤波器构成了一个复系数的FIR滤波器。其中h_real是复系数的实部，h_imag是复系数的虚部。
图4是根据本发明其中一实施例的发射机增益平坦度补偿方法的实现装置结构示意图，如图4所示，发射机一般包括数字信号处理器FPGA或DSP，数模转换器DAC以及模拟电路部分。
发射机的模拟电路部分一般包括一级或多级带通滤波器，混频器或调制器，功率放大器PA以及双工器等电路。因为这部分不是本发明的重点部分，因此在图4中用一个模块来示意。
发射机的增益不平坦主要是由模拟电路部分造成的，本发明在数字域中构造一个复数的FIR滤波器来对增益平坦度进行补偿。
在数字域中，用NCO产生N个频点的单音信号，频率范围从-f s/2到f s/2，以f s/N为步进。首先，图4中的选择器模块(MUX)选择NCO的输出发送到DAC，使用频谱分析仪测量每个频率点的功率P n，然后，发射机进入正常工作模式，MUX选择FIR滤波器的输出发射到DAC。因为需要对P n进行IFFT运算，为了运算简便，限定N取值为2的整数次方。N的取值越大，平坦度补偿的结果越精确。
频谱分析仪测量的结果P n输入到数字信号处理器进行后续处理。以通道中心频率(即数字域的零频)为基准，计算发射通道的增益平坦度P′ n。中心频率对应的功率点 为P N/2，则
Figure PCTCN2019130103-appb-000010
因为频谱分析仪测量的功率以dB为单位，因此需要通过幂运算来转换为绝对功率值。
剩余的处理方法和接收机的平坦度补偿方法一致，在此不再赘述。
以上所述是仅是本发明的优选实施方式，应当指出，对于本技术领域的技术人员来说，在不脱离本发明原理的前提下，还可以做出若干改进和修饰，这些改进和修饰也应视为本发明的保护范围。

Claims (14)

  1. 一种接收机的增益平坦度补偿方法，在数字域通过一个复系数的FIR滤波器来补偿接收通道的增益平坦度，所述方法包括：
    将ADC接收到的信号转换为零种频的IQ信号；
    信号发生器设置f c-f s/2为频率起始点，并以f s/N的频率间隔发送N个频率点的单音信号，在数字域计算出每个频率点的功率P n；其中f c为接收通道的中心频率，f s数字信号的采样频率，N取值为2的整数次方；
    以通道中心频率点f c的功率为基准，计算整个f s带宽内的增益平坦度，得到序列P′ n；
    对P′ n增加线性相位信息，构造一个N点的复数序列X n；
    对X n进行N点的IFFT运算，得到结果Y n；
    用Q点的复数序列来逼近Y n的频率响应；其中Q可以选择合适的整数；
    在数字域构造一个Q阶的复数FIR滤波器，以Z q作为滤波器的系数，对IQ信号进行滤波，其结果就是增益平坦度补偿后的数据。
  2. 根据权利要求1所述的接收机的增益平坦度补偿方法，其中，数字域中采用IQ信号的幅度来计算输入信号的功率，计算公式为：
    Figure PCTCN2019130103-appb-100001
    其中，M为计算功率的点数。
  3. 根据权利要求1所述的接收机的增益平坦度补偿方法，其中，以通道中心频率为基准，计算通道平坦度P′ n；通道中心频率点f c对应的功率点为P N/2，则
    Figure PCTCN2019130103-appb-100002
  4. 根据权利要求1所述的接收机的增益平坦度补偿方法，其中，对增益平坦度数据P′ n 增加相位信息，构成序列X n，计算公式为：
    X n＝P′ n*e jπ(N/2-n)*(N-1)/N，n＝0，1，2......N-1。
  5. 根据权利要求1所述的接收机的增益平坦度补偿方法，其中，通过IFFT计算FIR滤波器系数，进行IFFT运算之前，需要对上述的序列X n进行移位处理，公式如下：
    Figure PCTCN2019130103-appb-100003
    然后进行IFFT运算得到滤波器的系数Y n＝IFFT(X′ n)。
  6. 根据权利要求1所述的接收机的增益平坦度补偿方法，其中，将多个频率点的单音信号信号(f 1,f 2,…f n)赋以不同的幅度G 1,G 2,…G n，对边缘频段的单音信号赋以较大的G值，其他频段的单音信号赋以较小的G值，采用上述的多个频率点的单音信号作为滤波器的激励源，且在计算过程中，只需计算1/2的Y n得出1/2的Z q，当自适应过程收敛后即均方误差最小时，Z q实现了Y n的一个最佳拟合。
  7. 根据权利要求1所述的接收机的增益平坦度补偿方法，其中，采用4个实系数FIR滤波器来构造一个复系数的FIR滤波器。
  8. 一种发射机的增益平坦度补偿方法，在数字域通过一个复系数的FIR滤波器来补偿发射通道的增益平坦度，所述方法包括：
    在-f s/2至f s/2的频率范围内，数字域中采用NCO以f s/N的频率间隔产生N个频率点的单音信号，用频谱分析仪读取每个频率点的功率P n；其中f s为数字信号的采样频率，N取值为2的整数次方；
    以通道中心频率点为基准，计算发射通道的增益平坦度，得到序列P′ n；
    对P′ n增加相位信息构造一个N点的复数序列X n；
    对X n进行N点IFFT运算，得到结果Y n；
    在数字域发送到DAC之前构造一个Q阶复数FIR滤波器，以Z q作为FIR滤波器的系数，对IQ信号进行滤波运算，其结果就是增益平坦度补偿后的发射数据。
  9. 根据权利要求8所述的发射机的增益平坦度补偿方法，其中，数字域中采用IQ信号的幅度来计算输入信号的功率，计算公式为：
    Figure PCTCN2019130103-appb-100004
    其中，M为计算功率的点数。
  10. 根据权利要求8所述的发射机的增益平坦度补偿方法，其中，以通道中心频率为基准，计算通道平坦度P′ n；通道中心频率点f c对应的功率点为P N/2，则
    Figure PCTCN2019130103-appb-100005
  11. 根据权利要求8所述的发射机的增益平坦度补偿方法，其中，对增益平坦度数据P′ n增加相位信息，构成序列X n，计算公式为：
    X n＝P′ n*e jπ(N/2-n)*(N-1)/N，n＝0，1，2......N-1。
  12. 根据权利要求8所述的发射机的增益平坦度补偿方法，其中，通过IFFT计算FIR滤波器系数，进行IFFT运算之前，需要对上述的序列X n进行移位处理，公式如下：
    Figure PCTCN2019130103-appb-100006
    然后进行IFFT运算得到滤波器的系数Y n＝IFFT(X′ n)。
  13. 根据权利要求8所述的发射机的增益平坦度补偿方法，其中，将多个频率点的单音信号信号(f 1,f 2,…f n)赋以不同的幅度G 1,G 2,…G n，对边缘频段的单音信号赋以较大的G值，其他频段的单音信号赋以较小的G值，采用上述的多个频率点的单音信号作为滤波器的激励源，且在计算过程中，只需计算1/2的Y n得出1/2的Z q，当自适应过程收敛后即均方误差最小时，Z q实现了Y n的一个最佳拟合。
  14. 根据权利要求8所述的发射机的增益平坦度补偿方法，其中，采用4个实系数FIR滤波器来构造一个复系数的FIR滤波器。
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