WO2020244413A1 - 数据处理方法和通信设备 - Google Patents

数据处理方法和通信设备 Download PDF

Info

Publication number
WO2020244413A1
WO2020244413A1 PCT/CN2020/092241 CN2020092241W WO2020244413A1 WO 2020244413 A1 WO2020244413 A1 WO 2020244413A1 CN 2020092241 W CN2020092241 W CN 2020092241W WO 2020244413 A1 WO2020244413 A1 WO 2020244413A1
Authority
WO
WIPO (PCT)
Prior art keywords
communication device
sending
group
channel
identification part
Prior art date
Application number
PCT/CN2020/092241
Other languages
English (en)
French (fr)
Inventor
丁力
孙德胜
Original Assignee
华为技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Publication of WO2020244413A1 publication Critical patent/WO2020244413A1/zh

Links

Images

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/0001—Systems modifying transmission characteristics according to link quality, e.g. power backoff
    • H04L1/0009—Systems modifying transmission characteristics according to link quality, e.g. power backoff by adapting the channel coding
    • H04L1/0013—Rate matching, e.g. puncturing or repetition of code symbols
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/0001—Systems modifying transmission characteristics according to link quality, e.g. power backoff
    • H04L1/0006—Systems modifying transmission characteristics according to link quality, e.g. power backoff by adapting the transmission format
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/0001—Systems modifying transmission characteristics according to link quality, e.g. power backoff
    • H04L1/0006—Systems modifying transmission characteristics according to link quality, e.g. power backoff by adapting the transmission format
    • H04L1/0007—Systems modifying transmission characteristics according to link quality, e.g. power backoff by adapting the transmission format by modifying the frame length
    • H04L1/0008—Systems modifying transmission characteristics according to link quality, e.g. power backoff by adapting the transmission format by modifying the frame length by supplementing frame payload, e.g. with padding bits
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0057—Block codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0071—Use of interleaving
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/4906—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes
    • H04L25/4908—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes using mBnB codes

Definitions

  • This application relates to the field of communications, and more specifically, to data processing methods and communication devices.
  • the physical coding sub-layer distributes serial data streams to multiple channels. These channels are generally distributed inside the implementation unit, and are generally called logical channels (or virtual channels). aisle). A logical channel and a physical channel have a mapping relationship, and a physical channel can carry data of one or more logical channels. Since the PCS will distribute the serial data stream to multiple logical channels, in order to ensure that the receiving end device can lock and align the logical channels, the sending end device will periodically insert an alignment identifier group into the serial data stream. maker group, AM group).
  • the AM group of the Institute of Electrical and Electronics Engineers (IEEE) 802.3 specification is constructed under the condition that all logical channels and physical channels are working normally, that is, it is designed and standardized at the full rate. However, when the number of logical channels or physical channels in the communication device changes, if the sending end still uses the AM group in the standard, it will not be guaranteed that the receiving end can normally lock and align the logical channels.
  • IEEE Institute of Electrical and Electronics Engineers
  • the present application provides a data processing method and a communication device, which can ensure that the communication device at the receiving end locks and aligns the logical channel when the logical channel or the number of physical channels in the communication device changes.
  • the present application provides a data processing method.
  • the method includes: a first communication device inserts a first alignment identifier AM group into first data to be sent to obtain first target data, and the first AM The group corresponds to M sending logical channels, and M is a positive integer; the first communication device sends the first target data to the second communication device on the M sending logical channels; in the first communication device When the number of sending logical channels in the working state changes from M to N, the first communication device inserts a second AM group into the second data to be sent to obtain second target data, and the second AM group Corresponding to N sending logic channels, N is a positive integer, and N is different from M; the first communication device sends the second target data to the second communication device on the N sending logic channels.
  • the first AM group includes M AMs of M sending logical channels
  • the second AM includes N AMs of N sending logical channels.
  • M 4
  • the 4 sending logic channels are channel 0 to channel 3
  • N 6, and the 6 sending logic channels are channel 0 to channel 5.
  • the first AM group includes channels 0 to 3 AM
  • the second AM group includes AM from channel 0 to channel 5.
  • the AM group inserted in the data to be sent by the first communication device corresponds to the sending logic channel in the working state, so that when the number of sending logic channels in the working state changes, for example, from M to If N, the first communication device can insert the AM group corresponding to the sending logical channel currently in the working state into the data to be sent, so that the AM group can adapt to the change in the number of sending logical channels, and the second communication device can ensure Lock and align.
  • inserting the first AM group into the first data to be sent by the first communication device includes: the first communication device inserts the first AM group into the first insertion period In the first data to be sent; inserting the second AM group into the second data to be sent by the first communication device includes: the first communication device inserts the second AM group into the second insertion period The second data to be sent.
  • the first insertion period may be the number of FEC code words spaced between two adjacent first AM groups, or the number of transcoding code blocks spaced between two adjacent first AM groups , It can also be the number of bits between two adjacent first AM groups.
  • the second insertion period can be the number of FEC codewords spaced between two adjacent second AM groups, can be the number of transcoding code blocks spaced between two adjacent second AM groups, and It can be the number of bits spaced between two adjacent second AM groups.
  • AM In actual data processing, AM must appear at the beginning of an FEC codeword, which requires a certain period of AM group insertion. After the number of transmission logic channels in the working state of the first communication device is changed, if the insertion period does not change, it will not be ensured that AM always appears at the beginning of an FEC codeword.
  • the first insertion period is used for the first AM group
  • the second insertion period is used for the second AM, thereby solving the above problem.
  • the first insertion period is different from the second insertion period.
  • the first AM group includes a first identification part, the first identification part includes M AMs, and the M AMs correspond to the M transmission logic channels one-to-one;
  • the second AM group includes a second identification part, the second identification part includes N AMs, and the N AMs have a one-to-one correspondence with the N transmission logical channels.
  • the first AM group includes AMs corresponding to M transmission logic channels
  • the second AM group includes AMs corresponding to N transmission logic channels.
  • each one can be in operation.
  • the sequence of the coding symbols of the first identification part is different from the sequence of the coding symbols of the second identification part, and the coding symbols are the error correction coding method adopted in the first communication device Symbol under.
  • the AMs of the M sending logical channels are AM_i 0 , AM_i 1 , ..., AM_i M-1 in the order of channel numbers from small to large;
  • the p*M+1th to (p+2)*Mth coding symbols of the first identification part are:
  • the 2p*M+1th to (2p+2)*Mth coding symbols of the first identification part are:
  • the 3p*M+1th to (3p+3)*Mth coding symbols of the first identification part are:
  • the 4p*M+1th to (4p+4)*Mth coding symbols of the first identification part are:
  • p is a non-negative integer
  • 4p+3 is a non-negative integer less than or equal to Q-1
  • Q is the number of code symbols included in an AM.
  • the AMs of the N sending logical channels are AM_i 0 , AM_i 1 , ..., AM_i N-1 in the order of channel numbers from small to large;
  • the p*N+1th to (p+2)*Nth coding symbols of the second identification part are:
  • the 2p*N+1th to (2p+2)*Nth coding symbols of the second identification part are:
  • the 3p*N+1th to (3p+3)*Nth coding symbols of the second identification part are:
  • the 4p*N+1th to (4p+4)*Nth coding symbols of the second identification part are:
  • p is a non-negative integer
  • 4p+3 is a non-negative integer less than or equal to Q-1
  • Q is the number of code symbols included in an AM.
  • the first AM group further includes a first padding part, and the sum of the number of bits of the first padding part and the number of bits of the first identification part is the size of a standard code block
  • the standard code block is a code block in the transcoding mode adopted by the first communication device
  • the second AM group further includes a second padding part, and the number of bits in the second padding part is equal to
  • the sum of the number of bits in the second identification part is an integer multiple of the size of the standard code block; wherein the number of bits in the first padding part is different from the number of bits in the second padding part.
  • M is greater than N
  • the method further includes: when the first target condition is satisfied, the first communication device controls the first transmission logical channel among the M transmission logical channels Exit the working state, the first target condition is at least one of the following conditions: the first sending logical channel fails; the physical channel corresponding to the first sending logical channel fails; and the first sending logical channel corresponds to The sending logical channel of the same physical channel is faulty; the first receiving logical channel corresponding to the first sending logical channel in the second communication device is faulty; the second communication device corresponding to the first receiving logical channel Physical channel failure; failure of the receiving logical channel corresponding to the same physical channel as the first receiving logical channel in the second communication device; the data flow of the M sending logical channels is lower than the preset flow value; A communication device receives a first instruction, where the first instruction is used to instruct the first communication device to control the first sending logic channel to exit a working state.
  • M is less than N
  • the method further includes: when a second target condition is satisfied, the first communication device controls a second sending logical channel other than the M sending logical channels
  • the second target condition is at least one of the following conditions: the failure of the second sending logical channel is eliminated; the failure of the physical channel corresponding to the second sending logical channel is eliminated;
  • the logical channel corresponds to the fault elimination of the sending logical channel of the same physical channel; the fault elimination of the second receiving logical channel corresponding to the second sending logical channel in the second communication device;
  • the fault of the physical channel corresponding to the second receiving logical channel is eliminated; the fault of the receiving logical channel corresponding to the same physical channel as the second receiving logical channel in the second communication device is eliminated; and the M sending logical channels
  • the data flow of is higher than the preset flow value; the first communication device receives a second instruction, and the second instruction is used to instruct the first communication device to control the second sending logical channel to resume working status.
  • M is less than N, it means that some of the sending logic channels have resumed working status. Resuming the working state of the sending logic channel under corresponding conditions can improve link utilization or ensure fast data transmission.
  • the present application provides a data processing method.
  • the method includes: a second communication device receives first target data sent by a first communication device on M receiving logical channels, and the first target data includes a first AM Group, the first AM group corresponds to the M receiving logical channels, and M is a positive integer; the second communication device removes the first AM group from the first target data; in the second When the number of receiving logical channels of the communication device in the working state changes from M to N, the second communication device receives the second target data sent by the first communication device on the N receiving logical channels, and the second The target data includes a second AM group, the second AM group corresponds to the N receiving logical channels, N is a positive integer, and N is different from M; the second communication device moves from the second target data Except the second AM group.
  • the first AM group includes M AMs of M receiving logical channels
  • the second AM includes N AMs of N receiving logical channels.
  • M 4
  • the 4 receiving logic channels are channel 0 to channel 3
  • N 6, and the 6 receiving logic channels are channel 0 to channel 5.
  • the first AM group includes channels 0 to 3 AM
  • the second AM group includes AM from channel 0 to channel 5.
  • the second communication device removing the first AM group from the first target data includes: the second communication device removes the first AM group from the first AM group according to a first removal period.
  • Removing the first AM group from a target data; removing the second AM group from the second target data by the second communication device includes: the second communication device removes from the second AM group according to a second removal period The second AM group is removed from the second target data.
  • the first removal period may be the number of FEC codewords spaced between two adjacent first AM groups, or the number of transcoding code blocks spaced between two adjacent first AM groups. The number can also be the number of bits between two adjacent first AM groups.
  • the second removal period may be the number of FEC codewords between two adjacent second AM groups, or the number of transcoding code blocks between two adjacent second AM groups. It can also be the number of bits between two adjacent second AM groups.
  • the period when the second communication device removes the AM group corresponds to the period when the first communication device inserts the AM group.
  • AM In actual data processing, AM must appear at the beginning of an FEC codeword, which requires a certain period of AM group insertion.
  • the insertion period of the first communication device for the second AM group may be different from the insertion period of the first AM group.
  • the second communication device if If the second AM group is still removed in the first removal period, the data obtained may be incorrect.
  • the first removal period is used for the first AM group
  • the second removal period is used for the second AM, thereby solving the above problem.
  • the first removal period is different from the second removal period.
  • the first AM group includes a first identification part, the first identification part includes M AMs, and the M AMs correspond to the M receiving logic channels one-to-one;
  • the second AM group includes a second identification part, the second identification part includes N AMs, and the N AMs correspond to the N receiving logical channels in a one-to-one correspondence.
  • the sequence of the coding symbols of the first identification part is different from the sequence of the coding symbols of the second identification part, and the coding symbols are the error correction coding method adopted in the second communication device Symbol under.
  • the AMs of the M receiving logic channels are AM_i 0 , AM_i 1 , ..., AM_i M-1 in the order of channel numbers from small to large;
  • the p*M+1th to (p+2)*Mth coding symbols of the first identification part are:
  • the 2p*M+1th to (2p+2)*Mth coding symbols of the first identification part are:
  • the 3p*M+1th to (3p+3)*Mth coding symbols of the first identification part are:
  • the 4p*M+1th to (4p+4)*Mth coding symbols of the first identification part are:
  • p is a non-negative integer
  • 4p+3 is a non-negative integer less than or equal to Q-1
  • Q is the number of code symbols included in an AM.
  • the AMs of the N receiving logical channels are AM_i 0 , AM_i 1 , ..., AM_i N-1 in the order of channel numbers from small to large;
  • the p*N+1th to (p+2)*Nth coding symbols of the second identification part are:
  • the 2p*N+1th to (2p+2)*Nth coding symbols of the second identification part are:
  • the 3p*N+1th to (3p+3)*Nth coding symbols of the second identification part are:
  • the 4p*N+1th to (4p+4)*Nth coding symbols of the second identification part are:
  • p is a non-negative integer
  • 4p+3 is a non-negative integer less than or equal to Q-1
  • Q is the number of code symbols included in an AM.
  • the first AM group further includes a first padding part, and the sum of the number of bits of the first padding part and the number of bits of the first identification part is the size of a standard code block
  • the standard code block is a code block in the transcoding mode adopted by the first communication device
  • the second AM group further includes a second padding part, and the number of bits in the second padding part is equal to
  • the sum of the number of bits in the second identification part is an integer multiple of the size of the standard code block; wherein the number of bits in the first padding part is different from the number of bits in the second padding part.
  • M is greater than N
  • the method further includes: in a case where a third target condition is satisfied, the second communication device controls the first receiving logical channel of the M receiving logical channels Exit the working state, the third target condition is at least one of the following conditions: the first receiving logical channel fails; the physical channel corresponding to the first receiving logical channel fails; and the first receiving logical channel corresponds to The receiving logical channel of the same physical channel is faulty; the first sending logical channel corresponding to the first receiving logical channel in the first communication device is faulty; the first sending logical channel corresponding to the first sending logical channel in the first communication device Physical channel failure; failure of the sending logical channel corresponding to the same physical channel as the first sending logical channel in the first communication device; the data flow of the M receiving logical channels is lower than the preset flow value; The second communication device receives a third instruction, where the third instruction is used to instruct the second communication device to control the first receiving logical channel to exit the working state.
  • M is greater than N, it means that some of the receiving logic channels have exited the working state.
  • a number of situations in which the receiving logic channel exits the working state are given above, including passive exit situations (for example, the receiving logic channel fails) and active exit situations (for example, when the data traffic is small).
  • passive exit situations for example, the receiving logic channel fails
  • active exit situations for example, when the data traffic is small.
  • passive withdrawal compared to the situation in the prior art where one logical channel or physical channel fails and the entire link is abandoned, the above technical solution can improve the utilization rate of the link.
  • active withdrawal some receiving logic channels can be closed according to the actual situation to reduce power consumption.
  • M is less than N
  • the method further includes: when a fourth target condition is met, the second communication device controls a second receiving logical channel other than the M receiving logical channels
  • the working state is restored, and the fourth target condition is at least one of the following conditions: the failure of the second receiving logical channel is eliminated; the failure of the physical channel corresponding to the second receiving logical channel is eliminated;
  • the logical channel corresponds to the fault elimination of the receiving logical channel of the same physical channel; the fault elimination of the second sending logical channel corresponding to the second receiving logical channel in the first communication device;
  • the fault of the physical channel corresponding to the second sending logical channel is eliminated; the fault of the sending logical channel corresponding to the same physical channel as the second sending logical channel in the first communication device is eliminated; and the M receiving logical channels
  • the data flow rate of is higher than the preset flow rate value; the second communication device receives a fourth instruction, and the fourth instruction is used to instruct the second communication device to control the second receiving logical channel to resume working state.
  • M is less than N, it means that some of the receiving logic channels have restored their working status.
  • the receiving logic channel is restored to working status under corresponding conditions, the link utilization rate can be improved, or the fast data transmission can be ensured.
  • the present application provides a data processing method, the method includes: a first communication device inserts a first alignment identifier AM group into first data to be sent to obtain first target data, and the first AM The group corresponds to M sending logical channels, and M is a positive integer; the first communication device sends the first target data to the second communication device on the M sending logical channels; in the first communication device When the adopted data distribution method changes, the first communication device inserts a second AM group into the second data to be sent to obtain second target data, and the second AM group corresponds to the N sending logical channels, The second AM group is different from the first AM group, and N is a positive integer. The first communication device sends the second target data to the second communication device on the N sending logical channels.
  • M is equal to N.
  • the AMs of the M sending logical channels are AM_i 0 , AM_i 1 , ..., AM_i M-1 in the order of channel numbers from small to large;
  • the p*M+1th to (p+2)*Mth coding symbols of the first identification part are:
  • the 2p*M+1th to (2p+2)*Mth coding symbols of the first identification part are:
  • the 3p*M+1th to (3p+3)*Mth coding symbols of the first identification part are:
  • the 4p*M+1th to (4p+4)*Mth coding symbols of the first identification part are:
  • p is a non-negative integer
  • 4p+3 is a non-negative integer less than or equal to Q-1
  • Q is the number of code symbols included in an AM
  • the code symbol is the error code used in the first communication device. The size of a symbol in the wrong encoding mode.
  • the AMs of the N sending logical channels are AM_i 0 , AM_i 1 , ..., AM_i N-1 in the order of channel numbers from small to large;
  • the p*N+1th to (p+2)*Nth coding symbols of the second identification part are:
  • the 2p*N+1th to (2p+2)*Nth coding symbols of the second identification part are:
  • the 3p*N+1th to (3p+3)*Nth coding symbols of the second identification part are:
  • the 4p*N+1th to (4p+4)*Nth coding symbols of the second identification part are:
  • p is a non-negative integer
  • 4p+3 is a non-negative integer less than or equal to Q-1
  • Q is the number of code symbols included in an AM
  • the code symbol is the error code used in the first communication device. The size of a symbol in the wrong encoding mode.
  • the present application provides a data processing method.
  • the method includes: a second communication device receives first target data sent by a first communication device on M receiving logical channels, and the first target data includes a first AM Group, the first AM group corresponds to the M receiving logical channels, and M is a positive integer; the second communication device removes the first AM group from the first target data; in the second When the number of receiving logical channels of the communication device in the working state changes from M to N, the second communication device receives the second target data sent by the first communication device on the N receiving logical channels, and the second The target data includes a second AM group, the second AM group corresponds to the N receiving logical channels, the second AM group is different from the first AM group, and N is a positive integer; the second communication device Remove the second AM group from the second target data.
  • M is equal to N.
  • the AMs of the M sending logical channels are AM_i 0 , AM_i 1 , ..., AM_i M-1 in the order of channel numbers from small to large;
  • the p*M+1th to (p+2)*Mth coding symbols of the first identification part are:
  • the 2p*M+1th to (2p+2)*Mth coding symbols of the first identification part are:
  • the 3p*M+1th to (3p+3)*Mth coding symbols of the first identification part are:
  • the 4p*M+1th to (4p+4)*Mth coding symbols of the first identification part are:
  • p is a non-negative integer
  • 4p+3 is a non-negative integer less than or equal to Q-1
  • Q is the number of code symbols included in an AM
  • the code symbol is the error code used in the first communication device. The size of a symbol in the wrong encoding mode.
  • the AMs of the N sending logical channels are AM_i 0 , AM_i 1 , ..., AM_i N-1 in the order of channel numbers from small to large;
  • the p*N+1th to (p+2)*Nth coding symbols of the second identification part are:
  • the 2p*N+1th to (2p+2)*Nth coding symbols of the second identification part are:
  • the 3p*N+1th to (3p+3)*Nth coding symbols of the second identification part are:
  • the 4p*N+1th to (4p+4)*Nth coding symbols of the second identification part are:
  • p is a non-negative integer
  • 4p+3 is a non-negative integer less than or equal to Q-1
  • Q is the number of code symbols included in an AM
  • the code symbol is the error code used in the first communication device. The size of a symbol in the wrong encoding mode.
  • the present application provides a communication device, including a module for executing the first aspect or any one of the implementation manners of the first aspect.
  • the present application provides a communication device including a module for executing the second aspect or any one of the implementation manners of the second aspect.
  • the present application provides a communication device, including a module for executing the third aspect or any one of the implementation manners of the third aspect.
  • the present application provides a communication device, including a module for executing the fourth aspect or any one of the implementation manners of the fourth aspect.
  • the present application provides a chip, which is connected to a memory, and is used to read and execute a software program stored in the memory to implement the first aspect or any one of the implementation manners of the first aspect Methods.
  • the present application provides a chip, which is connected to a memory, and is used to read and execute a software program stored in the memory to implement the first aspect or any one of the implementation manners of the first aspect Methods.
  • the present application provides a chip, which is connected to a memory, and is used to read and execute a software program stored in the memory to implement the first aspect or any one of the implementation methods of the first aspect. The method described.
  • the present application provides a chip, which is connected to a memory, and is used to read and execute a software program stored in the memory to implement the first aspect or any one of the implementation methods of the first aspect. The method described.
  • the present application provides a communication device including a transceiver, a processor, and a memory, configured to execute the method described in the first aspect or any one of the implementation manners of the first aspect.
  • the present application provides a communication device, including a transceiver, a processor, and a memory, for executing the method described in the second aspect or any one of the implementation manners of the second aspect.
  • the present application provides a communication device, including a transceiver, a processor, and a memory, for executing the method described in the third aspect or any one of the implementation manners of the third aspect.
  • the present application provides a communication device, including a transceiver, a processor, and a memory, for executing the method described in the fourth aspect or any one of the implementation manners of the fourth aspect.
  • this application provides a computer-readable storage medium, including instructions, which when run on a communication device, cause the communication device to execute the method described in the first aspect or any one of the implementation manners of the first aspect.
  • this application provides a computer-readable storage medium, including instructions, which when run on a communication device, cause the communication device to execute the method described in the second aspect or any one of the implementation manners of the second aspect.
  • the present application provides a computer-readable storage medium, including instructions, which when run on a communication device, cause the communication device to execute the method described in the third aspect or any one of the implementation manners of the third aspect.
  • this application provides a computer-readable storage medium, including instructions, which when run on a communication device, cause the communication device to execute the method described in the fourth aspect or any one of the implementation manners of the fourth aspect.
  • the present application provides a computer program product, which when running on a communication device, causes the communication device to execute the method described in the first aspect or any one of the implementation manners of the first aspect.
  • this application provides a computer program product, which when running on a communication device, causes the communication device to execute the method described in the second aspect or any one of the implementation manners of the second aspect.
  • the present application provides a computer program product, which when running on a communication device, causes the communication device to execute the method described in the third aspect or any one of the implementation manners of the third aspect.
  • the present application provides a computer program product, which when running on a communication device, causes the communication device to execute the method described in the fourth aspect or any one of the implementation manners of the fourth aspect.
  • the present application provides a communication system, the communication system including the communication device provided in the fifth and seventh aspects; or
  • the communication system includes the communication device provided by the sixth aspect and the eighth aspect; or
  • the communication system includes the communication equipment provided by the thirteenth and fifteenth aspects; or
  • the communication system includes the communication equipment provided in the fourteenth and sixteenth aspects described above.
  • Figure 1 is a schematic diagram of a system architecture provided by an embodiment of the present application.
  • Figure 2 shows the AM format of 200G/400G Ethernet.
  • Figure 3 shows the AM format of 40G/100G Ethernet.
  • Fig. 4 is a schematic diagram of a data processing process of a first communication device and a second communication device in an embodiment of the present application.
  • Fig. 5 is a schematic diagram of the first communication device performing data distribution under multiple channels.
  • Fig. 6 is another schematic diagram of data distribution by the first communication device under multiple channels.
  • Fig. 7 is a schematic diagram of a second communication device receiving data under multiple channels.
  • FIG. 8 is a schematic flowchart of a data processing method according to an embodiment of the present application.
  • Fig. 9 is a functional circuit diagram for calculating the insertion/removal period.
  • Fig. 10 is another functional circuit diagram for calculating the insertion/removal period.
  • Fig. 11 is a schematic diagram of code block distribution by a first communication device.
  • FIG. 12 is a schematic diagram of adjusting the coding symbols in the GColumn of the AM group in an embodiment of the present application.
  • Figure 13 is a schematic diagram of a failure of two physical channels of 200G (4*50G).
  • Fig. 14 is an AM group provided by an embodiment of the present application.
  • FIG. 15 is another AM group provided by an embodiment of the present application.
  • FIG. 16 is another AM group provided by an embodiment of the present application.
  • Fig. 17 is a schematic diagram of the disappearance of one of the two physical channels of 200G (4*50G) faults.
  • FIG. 18 is another AM group provided by an embodiment of the present application.
  • Figure 19 is a schematic diagram of a failure of two physical channels of 400G (8*50G).
  • Fig. 20 is another AM group provided by an embodiment of the present application.
  • FIG. 21 is another AM group provided by an embodiment of the present application.
  • Figure 22 is a schematic diagram of 200G (4*50G) using 4 FEC codewords for data distribution.
  • FIG. 23 is another AM group provided by an embodiment of the present application.
  • Fig. 24 is another AM group provided by an embodiment of the present application.
  • Figure 25 is a schematic diagram of 100G Ethernet technology data distribution.
  • FIG. 26 is another AM group provided by an embodiment of the present application.
  • Figure 27 is another AM group provided by an embodiment of the present application.
  • FIG. 28 is a schematic structural diagram of a communication device according to an embodiment of the present application.
  • FIG. 29 is a schematic structural diagram of a communication device according to another embodiment of the present application.
  • FIG. 30 is a schematic structural diagram of a communication device provided by another embodiment of the present application.
  • FIG. 31 is a schematic structural diagram of a communication device provided by another embodiment of the present application.
  • IEEE 802.3 standardizes the 40G/50G/100G/200G/400G multi-channel architecture, and data can be transmitted on multiple physical channels.
  • the first communication device and the second communication device are connected through several physical channels, and multiple physical channels are transmitted in parallel, which can increase the speed of Ethernet.
  • the physical channel can be a high-speed bus, such as It is a copper wire. In this way, the first communication device and the second communication device can be electrically interconnected through copper wires.
  • the first communication device and the second communication device can be connected via 8 physical channels or 4 physical channels or 2 physical channels or 1 physical channel; for another example, for 400G Ethernet Technology, the first communication device and the second communication device can be connected through 16 physical channels or 8 physical channels or 4 physical channels or 2 physical channels or 1 physical channel. For another example, for a 100G Ethernet technology, the first communication device and the second communication device may be connected via 4 physical channels or 2 physical channels or 1 physical channel.
  • the first communication device and the second communication device may be chips or units or physical devices with a transceiver function. If the first communication device sends data, the second communication device receives the data; if the second communication device sends data, the first communication device receives the data.
  • the physical sending channel of the first communication device has a one-to-one correspondence with the physical receiving channel of the second communication device; the physical sending channel of the second communication device has a one-to-one correspondence with the physical receiving channel of the first communication device.
  • the physical channel and the logical channel in the first communication device and the second communication device have a mapping relationship.
  • one physical channel corresponds to one logical channel, or one physical channel corresponds to two logical channels, or one physical channel corresponds to two logical channels.
  • the channels correspond to 4 logical channels and so on.
  • a physical channel can carry data of one or more logical channels.
  • IEEE 802.3 defines different numbers of logical channels for Ethernet technologies of different speeds.
  • the number of logical channels of 100G Ethernet technology is 4.
  • the number of logical channels of 200G Ethernet technology is 8.
  • the number of logical channels of 400G Ethernet technology is 16.
  • the logical channel mentioned here may be a PCS channel or a forward error correction (FEC) channel.
  • FEC forward error correction
  • the logical channel can be called a PCS channel or FEC channel.
  • FEC channel for a 200G/400G Ethernet interface, the logical channel can be called a PCS channel or FEC channel.
  • the logical channel may be called an FEC channel.
  • PCS channels and FEC channels are usually distributed inside the implementation unit, and for the purpose of distinguishing from physical medium attachment (PMA) channels, they are generally called logical channels. It is also called a logical channel in this application.
  • IEEE 802.3 also standardized and designed an alignment identifier (alignment marker, AM). ) To identify each logical channel.
  • AM has a specific format. Taking 200G/400G Ethernet technology as an example, the AM format is shown in Figure 2. Among them, CM 0- CM 5 in the common marker (CM) are the common identifiers of multiple logical channels, and the unique marker (unique marker, UM 0- UM 5 in UM) are used to uniquely identify a logical channel, and UP0, UP1 and UP2 in unique padding (UP) are padding bits.
  • CM 0 , CM 1 , CM 2 , CM 3 , CM 4 and CM 5 in the AM of each logical channel are the same, and UM 0 , UM 1 , UM 2 , UM 3 of any two logical channels, UM 4 and UM 5 and UP 0 , UP 1 and UP 2 are different.
  • M 0 , M 1 , M 2 , M 4 , M 5 , M in M 6 means marker, BIP 3 and BIP
  • the BIP in 7 is bit interleave parity, and BIP 3 or BIP 7 can also be a padding field.
  • the AM format of other speed Ethernet technologies is similar to the format of 200G and 400G AM, or may be changed in the format of 200G and 400G AM. In order to avoid repetition, the examples are not given here.
  • the AM has a one-to-one correspondence with logic channels.
  • the first communication device and the second communication device both have 8 logical channels, and the AM of each logical channel is shown in Table 1.
  • Table 1 one row represents the AM of one channel. That is to say, the second communication device can lock a logical channel and correctly identify the channel number of the logical channel only when it receives an AM whose other fields except UP0-UP2 match the AM in Table 1.
  • the first communication device inserts the AM into the data to be sent in the form of an AM group (AM group).
  • the second communication device also removes AM in the form of an AM group.
  • the first communication device may insert the AM group into the data to be sent according to a certain period, and correspondingly, the second communication device may also remove the AM group in the data according to a certain period.
  • the AM group is composed of the AM part of each logical channel and the filling part.
  • Figure 4 takes 200G Ethernet technology as an example.
  • the first communication device receives an Ethernet frame from the data link layer, and the Ethernet frame reaches the media access control (MAC) layer and coordinates
  • the sublayer (reconciliation sublayer, RS) checks the Ethernet frame at the MAC layer, and the bit data after verification is sent to the PCS sublayer according to various media independent interfaces (xMII) through the RS sublayer.
  • MAC media access control
  • RS reconciliation sublayer
  • the PCS sub-layer receives relevant bits from xMII, and performs encoding and rate matching according to a specific first size bit block; after encoding and rate matching, transcodes the code block of the first size bit block to obtain the second size
  • the serial code block stream of the bit block; the serial code block stream of the second size bit block is inserted into the AM group after being scrambled, and the AM group includes several second size bit blocks; after inserting the AM group, the serial code block
  • the second size bit block is forwarded error correction (FEC) coding and check bits are added; then the second size bit block code block is distributed to several PCS channels or FEC channels according to a certain number of bits through distribution and interleaving ,
  • FEC error correction
  • the second communication device receives the bits sent by the first communication device through PMD and PMA, uses the AM on each PCS channel or FEC channel to lock the channel, and reorders each channel to obtain a serial code block stream; After the code block stream is FEC decoded, the AM group in the serial code block stream is removed; then the serial code block stream after the AM group is removed is descrambled and reverse transcoded to obtain the string of the first size bit block Line code block stream: The serial code block stream of the first size bit block is decoded and rate-matched and sent to the RS sublayer and the MAC layer, and the data is transmitted to the data link layer through the MAC layer.
  • the first size bit block is different from the second size bit block.
  • the first size bit block is 64 bits (bit, B)B/66B
  • the second size bit block is 256B/257B
  • the AM group consists of 4 or 8 257B code blocks.
  • the first size bit block is 64B/66B
  • the second size bit block is 256B/257B
  • the AM group is composed of 5 257B code blocks.
  • FIG. 4 only briefly describes the processing flow of the Ethernet interface.
  • other processing procedures can be added or not included.
  • the interface may not include the FEC encoding and FEC decoding processes.
  • the processing procedures are different.
  • FEC encoding and FEC decoding processes may be included, and FEC is located inside the PCS sublayer.
  • the process of FEC encoding and FEC decoding may or may not include the process of FEC encoding and FEC decoding.
  • the FEC sublayer is located between the PCS and PMA sublayers as an independent sublayer.
  • Fig. 5 is a schematic diagram of the first communication device performing data distribution under multiple channels. Take the 200G data distribution process as an example. As shown in Figure 5, the first communication device inserts the AM group into the serial data to be sent, and distributes the serial data stream to 8 logical channels through two distribution processes. on.
  • the data to be sent inserted into the AM group is distributed to two parallel data streams through distribution 1, and FEC encoding is performed to obtain two parallel data streams after FEC encoding (the first communication device uses several channels of FEC codewords, just Several parallel data streams can be obtained), as shown in Figure 5, two FEC-encoded parallel data streams A and B can be obtained; through distribution 2, the data of A and B two FEC-encoded parallel data streams can be obtained Distribute to 8 logical channels, and then send data to the second communication device through the physical channel.
  • the serial data stream that has been inserted into the AM group is distributed according to the rule of Distribution 1 (that is, one code symbol (symbol) is first taken to distribute to the A data stream, and then one code symbol is taken to distribute to the B data stream.
  • Distribution 1 that is, one code symbol (symbol) is first taken to distribute to the A data stream, and then one code symbol is taken to distribute to the B data stream.
  • Streams, and so on, can use A, B, A, B...
  • A, B, A, B, A, B, A, B, A, B, A, B can be used to represent this distribution process ;
  • the next distribution process is B, A, B, A, B, A, B, A; then the distribution process is A, B, A, B, A, B, A, B; and so on) Distribute to On 8 logical channels.
  • the coding symbol is a data unit for data distribution by the first communication device, for example, the coding symbol may be 10 bits, 12 bits, etc. It should be understood that the reason why distribution 2 uses the above distribution method is to improve the ability to resist burst errors.
  • the AM in order to ensure that the AM corresponding to each logical channel completely appears on each logical channel according to the desired mode, before inserting the AM group in the serial data stream, the AM must be constructed according to the AM format of the logical channel and the specific distribution rules. Group, so that the second communication device receives the AM with the correct format, and then locks and aligns the logical channel.
  • Fig. 7 is a schematic diagram of a second communication device receiving data under multiple channels. Also take the 200G data distribution process as an example.
  • the second communication device receives the data from the first communication device through the physical channel and the logical channel, and performs AM lock, debounce, logical channel reordering and decompression on the logical channel. Interleaving and other processing to form two parallel data streams A and B.
  • the two parallel data streams A and B are decoded and interleaved to obtain serial data including the AM group.
  • the AM group is further removed from the data to obtain the first communication device The actual data transferred.
  • FIGS 5 to 7 only take 200G Ethernet technology as an example, and the 40G, 50G, 100G and 400G data processing procedures are similar, and will not be repeated here.
  • the current IEEE 802.3 standard AM group is constructed under the condition that all logical channels and physical channels are working normally, that is, it is designed and standardized according to the full rate.
  • the number of logical channels or physical channels in the communication device changes (for example, some logical channels fail, some logical channels actively exit the working state, some logical channel failures are eliminated, some logical channels actively enter the working state, etc.) It is difficult for some AM groups to ensure that the second communication device can still lock and align the logical channel.
  • This application provides a data processing method that can ensure that the communication device at the receiving end locks and aligns the logical channels when the number of logical channels or physical channels in the communication device changes.
  • FIG. 8 is a schematic flowchart of a data processing method according to an embodiment of the present application.
  • the method 800 shown in FIG. 8 may include at least part of the content of 810-870.
  • the first communication device inserts a first AM group into the first data to be sent to obtain the first target data.
  • the first AM group corresponds to M sending logical channels, and M is a positive integer.
  • the first communication device sends the first target data to the second communication device on the M sending logical channels; the second communication device receives the first target data sent by the first communication device on the M receiving logical channels One target data.
  • the second communication device removes the first AM group from the first target data.
  • the number of sending logical channels in the working state of the first communication device is changed from M to N
  • the number of receiving logical channels in the working state of the second communication device is changed from M to N.
  • the first communication device inserts a second AM group into the second data to be sent to obtain the second target data.
  • the second AM group corresponds to N sending logical channels, N is a positive integer, and N and M different.
  • the first communication device sends the second target data to the second communication device on the N sending logical channels; the second communication device receives the first communication device sent by the first communication device on the N receiving logical channels 2. Target data.
  • the second communication device removes the second AM group from the second target data.
  • the first communication device when the number of sending logical channels in the working state of the first communication device and the number of receiving logical channels in the working state of the second communication device change, the first communication device will insert and The AM group corresponding to the sending logic channel currently in the working state, and accordingly, the second communication device will also remove the AM group corresponding to the receiving logic channel currently in the working state.
  • the embodiment of the present application does not specifically limit the type of the first communication device, as long as it can communicate with other communication devices (for example, the second communication device) through Ethernet technology.
  • the first communication device is a box-type or frame-type switch, router, etc.
  • the embodiment of the present application does not specifically limit the type of the second communication device, as long as it can communicate with other communication devices (for example, the first communication device) through Ethernet technology.
  • the first communication device is a box-type or frame-type switch, router, etc.
  • the first data to be sent and the second data to be sent may be different serial data streams in different transmission processes, or may be two parts of the serial data stream in the same transmission process.
  • the first data to be sent and the second data to be sent are demarcated by the change in the number of logical channels used by the first communication device and the second communication device.
  • the first data to be sent is the number of sending logical channels of the first communication device and the receiving logical channel of the second communication device.
  • the part before the change in the number of, and the second to-be-sent data is the number of sending logical channels of the first communication device and the part after the number of receiving logical channels of the second communication device changes.
  • they are respectively referred to as the first data to be sent and the second data to be sent.
  • first target data and the second target data may correspond to different serial data streams in different transmission processes, and may also correspond to two parts of the serial data stream in the same transmission process.
  • the first target data and the second target data are divided by the change in the number of logical channels used by the first communication device and the second communication device. For example, when the first target data and the second target data correspond to two parts of the same serial data stream, the first target data is inserted into the part of the first AM group, and the second target data is the part inserted into the second AM. In the embodiments of the present application, for convenience of description, they are respectively referred to as the first target data and the second target data.
  • the sending logical channel of the first communication device corresponds to the receiving logical channel of the second communication device in a one-to-one correspondence.
  • the first communication device has 8 sending logic channels, and there are 8 receiving logic channels in the second communication device that correspond to the 8 sending logic channels of the first communication device respectively. Therefore, when the number of logical channels of any one of the first communication device and the second communication device changes, the number of logical channels of the opposite communication device changes accordingly. For example, if the sending logic channel 0 of the first communication device exits the working state due to a failure, the receiving logic channel 0 of the second communication device will also exit the working state regardless of whether there is a fault.
  • the first communication device Since the AM group inserted in the sending data by the first communication device is related to the number of sending logical channels currently in working state, the first communication device will determine the current working state before inserting the AM group into the data to be sent Send logic channel, and get the AM group corresponding to the sending logic channel currently in working state. For the second communication device, it is also necessary to determine the receiving logic channel currently in the working state, so as to correctly remove the AM group.
  • AM groups corresponding to different numbers of transmission logical channels may be pre-configured.
  • the first sending logical channel of the M sending logical channels will exit the working state when at least one of the following conditions is met: the first sending logical channel is faulty; the first sending logical channel corresponds to Physical channel failure; failure of the transmission logical channel corresponding to the same physical channel as the first transmission logical channel; failure of the first reception logical channel corresponding to the first transmission logical channel in the second communication device; The physical channel corresponding to the first receiving logical channel in the second communication device fails; the receiving logical channel corresponding to the same physical channel as the first receiving logical channel in the second communication device fails; the M sending logic
  • the data flow of the channel is lower than the preset flow value; the first communication device receives a first instruction, and the first instruction is used to instruct the first communication device to control the first sending logical channel to exit the working state.
  • the first instruction may be a manual instruction.
  • the second sending logic channels other than the M sending logic channels will resume working state when at least one of the following conditions is met: the fault of the second sending logic channel is eliminated; the second sending logic channel The fault of the corresponding physical channel is eliminated; the fault of the sending logical channel corresponding to the same physical channel as the second sending logical channel is eliminated; the second receiving logic corresponding to the second sending logical channel in the second communication device The failure of the channel is eliminated; the failure of the physical channel corresponding to the second receiving logical channel in the second communication device is eliminated; the receiving of the second communication device and the second receiving logical channel corresponding to the same physical channel The fault of the logical channel is eliminated; and the data flow of the M sending logical channels is higher than the preset flow value; the first communication device receives a second instruction, and the second instruction is used to instruct the first communication device Controlling the second sending logic channel to resume a working state.
  • Exiting or entering the working state of the receiving logical channel in the second communication device is similar to the processing of the sending logical channel by the first communication device, and will not be repeated here.
  • the N sending logical channels may be a subset of the M sending logical channels, that is, the first communication device controls MN sending logical channels out of the M sending logical channels
  • the working state is such that the number of sending logical channels is reduced from M to N; and/or, when M is less than N, the M sending logical channels can be a subset of the N sending logical channels, that is, the first communication
  • the device controls the NM sending logic channels other than the M sending logic channels to enter the working state, so that the number of sending logic channels increases from M to N.
  • F of the N sending logical channels belong to the M sending logical channels, and F is a non-negative integer less than or equal to N, that is, when In the process of reducing the number of sending logical channels of the first communication device from M to N, there are cases in which sending logical channels other than M sending logical channels enter the working state, and some or all of the M sending logical channels exit the working state , And finally reduce the number of sending logical channels from M to N; and/or, when M is less than N, F sending logical channels among the N sending logical channels belong to the M sending logical channels, and F is less than Or a non-negative integer equal to M, that is to say, in the process of increasing the number of sending logical channels of the first communication device from M to N, some or all of the M sending logical channels may exit the working state. Make more M sending logic channels other than sending logic channels enter the working state, and finally show that the number of sending logic channels is reduced from M to N.
  • the embodiment of the present application uses the first insertion period for the first AM group and uses the second insertion period for the second AM group, thereby solving the foregoing problem. Specifically, the first communication device inserts the first AM group into the first data to be sent according to a first insertion period; inserts the second AM group into the second data to be sent according to a second insertion period Data.
  • the first insertion period can be the number of FEC codewords spaced between two adjacent first AM groups, can be the number of transcoding code blocks spaced between two adjacent first AM groups, and It can be the number of bits spaced between two adjacent first AM groups.
  • the second insertion period can be the number of FEC codewords spaced between two adjacent second AM groups, can be the number of transcoding code blocks spaced between two adjacent second AM groups, and It can be the number of bits spaced between two adjacent second AM groups.
  • the first insertion period is different from the second insertion period.
  • the first communication device may determine the second insertion period according to N.
  • Table 2 shows the corresponding relationship of insertion periods corresponding to different numbers of logic channels in a 400G standard.
  • Table 3 shows the corresponding relationship of insertion periods corresponding to different numbers of logic channels in a 200G standard.
  • the insertion period in Table 2 and Table 3 is based on FEC codewords. For example, if the insertion period is 512, it means that an AM group is inserted every 512 FEC code words. It should be understood that Table 2 and Table 3 are both exemplary.
  • N effLane in Figure 9 represents the number of sending logical channels in working state
  • N NewFECPayload represents the number of 64B/66B contained in the payload part of a codeword of the currently selected FEC
  • N standLane represents the definition in the standard
  • the number of sending logical channels, N standdis represents the distance of the FEC codeword defined in the standard
  • N standFECPayload represents the number of 64B/66B contained in the load part of one FEC codeword defined in the standard
  • C NewFECSymbol represents the current location
  • the number of coding symbols contained in one codeword of the selected FEC, mod represents the remainder.
  • the second insertion period may also be equal to the first insertion period.
  • the same insertion period can be selected, and the insertion period can meet the requirement of ensuring that AM appears in the number of each possible transmission logic channel. The beginning of an FEC codeword.
  • the insertion period can be calculated through the functional circuit diagram shown in FIG. 10.
  • N effLane1 to N effLaneM in Fig. 10 represent the number of transmission logic channels in the working state from 1 to M, respectively
  • C NewFECSymbol represents the number of coding symbols contained in one codeword of the currently selected FEC
  • mod represents Find the remainder
  • processing element (processing element, PE) 1-PE M represents processing element 1-processing unit M.
  • the second communication device removes the AM group from the period when the first communication device is inserted into the AM group.
  • the first removal period is used for the first AM group
  • the second removal period is used for the second AM, so as to avoid errors in the data finally obtained by the second communication device.
  • the second communication device removes the first AM group from the first target data according to a first removal cycle; removes the second AM group from the second target data according to a second removal cycle AM group.
  • the first removal period may be the number of FEC codewords between two adjacent first AM groups, or the number of transcoding code blocks between two adjacent first AM groups. It may also be the number of bits spaced between two adjacent first AM groups.
  • the second removal period may be the number of FEC codewords between two adjacent second AM groups, or the number of transcoding code blocks between two adjacent second AM groups. It can also be the number of bits between two adjacent second AM groups.
  • the first removal period is different from the second removal period.
  • the manner of determining the second removal period is similar to the manner of the second insertion period, except that the sending logic channel becomes the receiving logic channel correspondingly, which will not be repeated here.
  • the AM group corresponds to the sending logic channel.
  • the first AM group includes M AMs, and the M AMs correspond to M transmission logic channels one-to-one, and the second AM group includes N AMs, and the N AMs correspond to N transmission logic channels.
  • N 6, and the 6 sending logic channels are channel 0 to channel 5
  • the first AM group includes the AM of channel 0 to channel 3.
  • the second AM group includes AM of channel 0 to channel 5.
  • the first AM group may include a first identification part and a first filling part, where the first identification part includes M AMs, and the M AMs respectively correspond to M transmission logic channels in a one-to-one correspondence.
  • the second AM group may include a second identification part and a second filling part, the second identification part includes N AMs, and the N AMs respectively correspond to the N transmission logical channels in a one-to-one correspondence.
  • the sum of the number of bits in the first filling part and the number of bits in the first identification part is an integer multiple of the size of a standard code block
  • the sum of the number of bits in the second filling part and the number of bits in the second identification part is the standard code An integer multiple of the block size.
  • the standard code block is a code block in the transcoding mode adopted by the first communication device.
  • the transcoding mode adopted by the first communication device is 256B/257B
  • the standard code block is 257B.
  • the transcoding mode adopted by the first communication device is 512B/513B
  • the standard code block is 513B.
  • the sum of the number of bits in the first padding part and the number of bits in the first identification part is a minimum integer multiple of the size of a standard code block
  • the sum of the number of bits in the second padding part and the number of bits in the second identification part Is the smallest integer multiple of the size of the standard code block.
  • the number of bits in the first padding part is different from the number of bits in the second padding part.
  • the AM of the M and N sending logical channels may be in the AM format specified in IEEE 802.3.
  • the manner in which the AM group corresponds to the receiving logical channel is similar to the manner in which the AM group corresponds to the sending logical channel, and will not be repeated here.
  • the sequence of the coding symbols of the first identification part in the embodiment of the present application is different from the sequence of the coding symbols of the second identification part, wherein the coding symbols are symbols in the error correction coding mode adopted by the first communication device.
  • the embodiments of the present application mainly relate to the number of AMs included in the AM group (or the number of sending logical channels currently in working state), the data distribution mode adopted by the first communication device, and the number of FEC adopted by the first communication device. As long as any one of the above three factors changes, the sequence of the coding symbols in the identification part of the AM group will change.
  • the first communication device does not perform FEC encoding or the first communication device uses 1 FEC
  • the first communication device uses the first data distribution method
  • the M AMs are AM_i 0 , AM_i 1 , ..., AM_i M-1 in the order of channel numbers from small to large, and the p*M+1th to (p+2)*th in the first identification part
  • the M coding symbols are:
  • the AM of the N sending logical channels are AM_i 0 , AM_i 1 ,..., AM_i N-1 in the order of channel number from small to large, and the second identification part is from p*N+1 to (p+2)*
  • the N coding symbols are:
  • p+1 is a non-negative integer less than or equal to Q-1
  • Q is the number of code symbols included in an AM
  • the first data distribution method is to use code symbols as a unit, according to 0, 1, ..., R- Distribute target data to R sending logical channels in the order of 1, 0, 1,..., R-1, 0, 1,..., R-1,..., and get R parallel data streams
  • 0, 1,..., R- 1 represents the channel number of R sending logical channels.
  • the number of M sending logical channels AM is AM_i 0 , AM_i 1 ,..., AM_i M-1 in the order of channel number from small to large, and the 2p*M+1 to (2p+2)*M coding symbols of the first identification part are:
  • the AMs of the N sending logical channels are AM_i 0 , AM_i 1 ,..., AM_i N-1 in the order of channel numbers from small to large, and the second identification part is from 2p*N+1 to (2p+2)*
  • the N coding symbols are:
  • 2p+1 is a non-negative integer less than or equal to Q-1
  • Q is the number of distribution symbols included in an AM
  • the second data distribution mode is to use the coding symbols as the unit, according to A, B, A
  • the target data is converted into 2 parallel data streams in the order of B,...
  • the A, B represent the data stream from the Ath and the Bth data stream, continue to use the coding symbol as the unit, according to A, B , A, B, A, B,... are distributed once to the R sending logical channels in sequence, and then distributed to the R sending logical channels in the order of B, A, B, A, B, A,..., and then According to the order of A, B, A, B, A, B,... to R send logic channels one time, and so on.
  • the number of M sending logical channels AM is AM_i 0 , AM_i 1 ,..., AM_i M-1 in the order of channel number from small to large
  • the 3p*M+1 to (3p+3)*M coding symbols of the first identification part are:
  • the AM of the N sending logical channels are AM_i 0 , AM_i 1 ,..., AM_i N-1 in the order of channel numbers from small to large, and the second identification part is from 3p*N+1 to (3p+3)*
  • the N coding symbols are:
  • 3p+2 is a non-negative integer less than or equal to Q-1
  • Q is the number of distribution symbols included in an AM
  • the third data distribution method is to use the coding symbols as the unit, according to A, B, C
  • the sequence of A, B, C, A, B, C,... converts the target data into 3 parallel data streams.
  • the A, B, and C represent data streams from the Ath, Bth, and Bth data streams.
  • C data streams continue to use the coding symbols as the unit, and distribute them to the R sending logical channels in the order of A, B, C, A, B, C, A, B, C, ..., and then follow B, C, A, B, C, A, B, C, A,... are distributed once to the R sending logical channels in the order of C, A, B, C, A, B, C, A, B,... Distribute once to the R sending logical channels in the order of, and so on.
  • the number of M sending logical channels AM is AM_i 0 , AM_i 1 ,..., AM_i M-1 in the order of channel number from small to large, and the 3p*M+1 to (3p+3)*M coding symbols of the first identification part are:
  • the AMs of the N sending logical channels are AM_i 0 , AM_i 1 ,..., AM_i N-1 in the order of channel numbers from small to large, and the 4p*N+1th to the (4p+4)th in the second identification part
  • the N coding symbols are:
  • 4p+3 is a non-negative integer less than or equal to Q-1
  • Q is the number of distribution symbols included in an AM
  • the fourth data distribution mode is to use the coding symbols as the unit, according to A, B, C
  • the sequence of D, A, B, C, D, A, B, C, D, A, B, C, D, A, B, C, D,... converts the target data into 4 parallel data streams
  • the A, B, C, D represents from the A-th data stream, the B-th data stream, the C-th data stream, and the D-th data stream, continue to use the coding symbol as the unit, according to A, B, C, D, A, B, C , D, A, B, C, D, A, B, C, D, ...
  • the AM of the M sending logical channels is AM_i 0 in the order of channel numbers from small to large , AM_i 1 ,..., AM_i M-1 , the 4p*M+1th to (4p+4)*Mth coding symbols of the first identification part are:
  • the AMs of the N sending logical channels are AM_i 0 , AM_i 1 ,..., AM_i N-1 in the order of channel numbers from small to large, and the second identification part is from 2p*N+1 to (2p+2)*
  • the N coding symbols are:
  • 4p+3 is a non-negative integer less than or equal to Q-1, and Q is the number of distribution symbols included in one AM.
  • the number of sending logical channels in the working state of the first communication device is M
  • the number of FECs used by the first communication device changes.
  • the distribution mode adopted by the first communication device is changed from the second data distribution mode to the fourth data distribution mode.
  • the AM of the M sending logical channels are AM_i 0 , AM_i 1 , ... , AM_i M-1 , before the change, the 2p*M+1 to (2p+2)*M coding symbols of the first identification part are:
  • 4p+3 is a non-negative integer less than or equal to Q-1, and Q is the number of distribution symbols included in one AM.
  • the number of FECs used by the first communication device can be more, for example, 8 FECs, 16 FECs, etc.; the number of FECs used by the first communication device can be changed from less to more, or from more to less;
  • the device can use other data distribution methods, and the sequence of the coding symbols of the corresponding AM group should also be adjusted accordingly.
  • the data distribution method can also be A, B, C, D, A, B, C , D, A, B, C, D, A, B, C, D,...
  • Fig. 11 is a schematic diagram of code block distribution by a first communication device.
  • the control unit can generate configuration information of the sending logical channel in the working state.
  • the configuration information of the sending logical channel in the working state can be referred to as PCSLC.
  • PCSLC is [1,1,1,1,0, 0,0,0] means that channels 0 to 3 of the 8 sending logic channels are in working state, and channels 4 to 7 are in non-working state.
  • the AM group adjustment unit can perform AM group mapping and insertion according to PCSLC.
  • the second communication device also includes a control unit, and the function is the same as that of the control unit of the first communication device, which will not be repeated here.
  • the specific mapping process of the AM group is as follows.
  • the mapped AM group is constructed from the Y AMs obtained in 1). specifically,
  • the first symbol distribution function turns a serial data stream into Y1 parallel streams
  • the second symbol distribution function turns Y1 parallel data streams into Y parallel data streams
  • the encoding symbol of GColumn k with odd subscript is processed as follows: taking Y1 as the unit, exchange the first encoding symbol with the Yth encoding symbol, and the second encoding symbol Exchange with the Y-1th code symbol, and so on, as shown in Figure 12;
  • the standard code block is a code block in the transcoding mode adopted by the first communication device.
  • the transcoding mode adopted by the first communication device is 256B/257B
  • the standard code block is 257B.
  • the transcoding mode adopted by the first communication device is 512B/513B
  • the standard code block is 513B;
  • Ethernet technologies that may include state field fields (for example, 200G, 400G Ethernet technologies), these state field fields are also part of padding in the embodiment of the present application;
  • FIG. 11 and FIG. 12 are exemplary and are only used to facilitate the understanding of the technical solutions of the embodiments of the present application.
  • the AM group also needs to be adjusted accordingly.
  • the second communication device determines the receiving logical channel in the working state according to the configuration information PSCLC of the receiving logical channel generated by the control unit of the second communication device; and performs AM detection on the receiving logical channel in the working state according to the detection cycle , Locking and alignment, reordering and de-interleaving, etc., to obtain Y1 parallel data stream, Y1 parallel data stream is decoded and interleaved to obtain serial data including AM group, and further remove AM from serial data according to the removal cycle Group to obtain the data actually transmitted by the first communication device.
  • the removal cycle Group For the specific calculation method of the removal period, refer to FIG. 9 and FIG. 10, which will not be repeated here.
  • Example 1 In 200G Ethernet, the selected FEC is Reed-Solomon forward error correction (RS-FEC) (544, 514, 10, 15), and the transcoding method is 256B /257B, using 2 FEC codewords.
  • the RS-FEC sublayer inserts AM groups in the serial data stream. After FEC encoding, 10-bit encoding symbols are sequentially distributed to 8 sending logical channels. As shown in FIG. 13, the first communication device and the second communication device both have two physical channels failing, and the number of corresponding logical channels in working state is changed from 8 to 4, and the AM group needs to be changed accordingly.
  • RS-FEC Reed-Solomon forward error correction
  • the transcoding method is 256B/257B transcoding
  • the mapped AM group is shown in Figure 15, and the insertion period is 2048 FEC codewords.
  • the second communication device determines that the receiving logical channel in the working state is 4-7 according to the configuration information PSCLC of the receiving logical channel generated by the control unit of the second communication device.
  • the AM group removal period is calculated to be 2048.
  • the logical channel corresponding to the failed physical channel is excluded, and the sender then re-maps the AM and inserts it according to the new insertion cycle .
  • the second communication device can normally lock and align the AM, effectively ensuring that the code block receiving and sending process is not affected.
  • Example two as shown in Figure 13, in 200G Ethernet, the selected FEC is RS-FEC (544, 514, 10, 15), the transcoding method is 256B/257B, and two FEC codewords are used.
  • the RS-FEC sublayer inserts AM groups in the serial data stream. After FEC encoding, 10-bit encoding symbols are sequentially distributed to the 4 sending logical channels.
  • the transcoding mode is 512B/513B, and the AM group needs to be changed accordingly.
  • PCSLC [00001111] generated by the control unit of the first communication device, and the sending logical channels 4 to 7 are in working state.
  • the mapped AM group is shown in Figure 16, and the insertion period is 2560 FEC codewords.
  • the second communication device determines that the receiving logical channel in the working state is 4-7 according to the configuration information PSCLC of the receiving logical channel generated by the control unit of the second communication device.
  • the AM group removal period is calculated to be 2560.
  • the first communication device when the RS-FEC used by the first communication device is RS (372, 342, 12, 15) and the transcoding method is 512B/513B, the first communication device only needs to perform AM again according to the above technical solution After mapping and inserting into the AM group according to the new insertion period, the second communication device can normally lock and align the AM, effectively ensuring that the code block sending and receiving process is not affected.
  • Example 3 In 200G Ethernet, the selected FEC is RS-FEC (544, 514, 10, 15), the transcoding method is 256B/257B, and two FEC codewords are used.
  • the RS-FEC sublayer inserts AM groups in the serial data stream. After FEC encoding, 10-bit encoding symbols are sequentially distributed to 8 sending logical channels. As shown in Figure 17, the failure of one of the two failed physical channels of the first communication device and the second communication device disappears, and the number of corresponding logical channels in working state changes from 4 to 6, and the AM group also needs Change accordingly.
  • the mapped AM group is shown in Figure 18, and the insertion period is 3072 FEC codewords.
  • the second communication device determines that the receiving logical channel in the working state is 2-7 according to the configuration information PSCLC of the receiving logical channel generated by the control unit of the second communication device.
  • the calculated removal period of the AM group is 3072.
  • the first communication device when one of the two failed physical channels disappears, the first communication device then re-maps AM, and inserts the AM group according to the new insertion cycle, and the second communication device AM can be locked and aligned normally, effectively ensuring that the code block receiving and sending process is not affected.
  • Example 4 In 400G Ethernet, the selected FEC is RS-FEC (544, 514, 10, 15), the transcoding mode is 256B/257B, and two FEC codewords are used.
  • the RS-FEC sublayer inserts AM groups in the serial data stream. After FEC encoding, 10-bit encoding symbols are sequentially distributed to 16 sending logical channels. As shown in FIG. 19, both the first communication device and the second communication device have two physical channels failing, and the number of corresponding logical channels in working state is changed from 16 to 12, and the AM group needs to be changed accordingly.
  • the mapped AM group is shown in Figure 21, and the insertion period is 6144 FEC codewords.
  • the second communication device determines that the receiving logical channel in the working state is 4-15 according to the configuration information PSCLC of the receiving logical channel generated by the control unit of the second communication device.
  • the calculated removal period of the AM group is 6144.
  • the logical channel corresponding to the failed physical channel is excluded, and the sender then re-maps the AM and inserts it according to the new insertion cycle .
  • the second communication device can normally lock and align the AM, effectively ensuring that the code block receiving and sending process is not affected.
  • Example 5 In 200G Ethernet, the selected FEC is RS-FEC (544, 514, 10, 15), the transcoding method is 256B/257B, and 4 FEC codewords are used.
  • the RS-FEC sublayer inserts AM groups in the serial data stream. After FEC encoding is performed, 10-Bit encoding symbols are used to sequentially distribute to 8 sending logical channels, as shown in Figure 22.
  • PCSLC generated by the control unit of the first communication device [11111111], and the sending logical channels 0-7 are in working state.
  • the insertion period is 4096 FEC code words.
  • FIG. 24 only shows the first 4*8 coding symbols of the AM group, and the order of subsequent coding symbols can refer to the order of the first 4*8 coding symbols.
  • the second communication device determines that the receiving logical channel in the working state is 0-7 according to the configuration information PSCLC of the receiving logical channel generated by the control unit of the second communication device.
  • the calculated removal period of the AM group is 4096.
  • Example 6 in 200G Ethernet, the selected FEC is RS-FEC (544, 514, 10, 15), and the transcoding mode is 256B/257B.
  • the RS-FEC sublayer inserts AM groups in the serial data stream.
  • 10-bit encoding symbols are sequentially distributed to 8 sending logical channels.
  • both the first communication device and the second communication device have two physical channels that have failed, and the number of corresponding logical channels in working state has changed from 8 to 4, due to the sending logical channel and the receiving logical channel Reduced, the first communication device and the second communication device can switch from 4 FEC codewords to 2 FEC codewords.
  • the processing flow of the first communication device can refer to the related description of FIG. 22; after the change, the processing flow of the first communication device can refer to the related description of FIG. 13, which will not be repeated here.
  • the first communication device when the number of sending logical channels is reduced and the FEC codewords are also reduced, the first communication device only needs to re-map the AM group according to the above technical solution. And insert the AM group according to the new insertion period, the second communication device can normally lock and align the AM, effectively ensuring that the code block receiving and sending process is not affected.
  • Example 7 In 200G Ethernet, the selected FEC is RS-FEC (544, 514, 10, 15), and the transcoding mode is 256B/257B.
  • the RS-FEC sublayer inserts AM groups in the serial data stream. After FEC encoding, 10-bit encoding symbols are sequentially distributed to 8 sending logical channels. The two failed physical channels of the first communication device and the second communication device return to normal. Due to the increase of the sending logical channel and the receiving logical channel, the first communication device and the second communication device can switch from 2 FEC codewords to 4 FEC codes numbers.
  • the processing flow of the first communication device can refer to the related description of FIG. 13; after the change, the processing flow of the first communication device can refer to the related description of FIG. 22, which will not be repeated here.
  • Example 8 In 100G Ethernet, the selected FEC is RS-FEC (544, 514, 10, 15), the transcoding method is 256B/257B, and one FEC codeword is used.
  • the RS-FEC sublayer inserts AM groups in the serial data stream. After FEC encoding, 10-bit encoding symbols are sequentially distributed to the 4 sending logical channels. As shown in FIG. 25, both the first communication device and the second communication device have two physical channels failing, and the number of corresponding FEC channels in working state is changed from four to two, and the AM group needs to be changed accordingly.
  • the AMFEC of the 4 sending logical channels is divided into 32 code symbols.
  • the transcoding method is 256B/257B transcoding
  • the mapped AM group is shown in Figure 26, and the insertion period is 4096 FEC codewords.
  • PCSLC [0011] generated by the control unit of the first communication device, and FEC logical channels 2 and 3 are in working state.
  • the mapped AM group is shown in Figure 27, and the insertion period is 2048 FEC codewords.
  • the second communication device determines that the receiving logical channels in the working state are 2 and 3 according to the configuration information PSCLC of the receiving logical channel generated by the control unit of the second communication device.
  • the removal period of the AM group is calculated to be 2048.
  • the first communication device only needs to re-map the AM group according to the above technical solution and insert the AM group according to the new insertion period.
  • the communication device can normally lock and align the AM, effectively ensuring that the code block sending and receiving process is not affected.
  • FIG. 28 is a schematic structural diagram of a communication device according to an embodiment of the present application.
  • the communication device 2800 shown in FIG. 28 may correspond to the above first communication device.
  • the communication device 2800 includes a processing module 2830 and a sending module 2820.
  • the processing module 2830 is configured to insert a first alignment identifier AM group into the first data to be sent to obtain the first target data.
  • the first AM group corresponds to M sending logical channels, and M is a positive integer.
  • the sending module 2820 is configured to send the first target data to the second communication device on the M sending logical channels.
  • the processing module 2830 is further configured to insert a second AM group into the second data to be sent to obtain the first Two target data, the second AM group corresponds to N sending logical channels, N is a positive integer, and N and M are different.
  • the sending module 2820 is further configured to send the second target data to the second communication device on the N sending logical channels.
  • the processing module 2830 is specifically configured to insert the first AM group into the first data to be sent according to a first insertion period; the processing module 2830 is specifically further configured to insert according to a second insertion period. Periodically, insert the second AM group into the second data to be sent.
  • the first insertion period is different from the second insertion period.
  • the first AM group includes a first identification part, the first identification part includes M AMs, and the M AMs have a one-to-one correspondence with the M transmission logic channels;
  • the second AM group It includes a second identification part, the second identification part includes N AMs, and the N AMs correspond to the N sending logical channels in a one-to-one correspondence.
  • the sequence of the coding symbols of the first identification part is different from the sequence of the coding symbols of the second identification part, and the coding symbols are symbols in an error correction coding manner adopted by the first communication device.
  • the AMs of the M sending logical channels are AM_i 0 , AM_i 1 , ..., AM_i M-1 in the order of channel numbers from small to large;
  • the p*M+1th to (p+2)*Mth coding symbols of the first identification part are:
  • the 2p*M+1th to (2p+2)*Mth coding symbols of the first identification part are:
  • the 3p*M+1th to (3p+3)*Mth coding symbols of the first identification part are:
  • the 4p*M+1th to (4p+4)*Mth coding symbols of the first identification part are:
  • p is a non-negative integer
  • 4p+3 is a non-negative integer less than or equal to Q-1
  • Q is the number of code symbols included in an AM.
  • the AMs of the N sending logical channels are AM_i 0 , AM_i 1 , ..., AM_i N-1 in the order of channel numbers from small to large;
  • the p*N+1th to (p+2)*Nth coding symbols of the second identification part are:
  • the 2p*N+1th to (2p+2)*Nth coding symbols of the second identification part are:
  • the 3p*N+1th to (3p+3)*Nth coding symbols of the second identification part are:
  • the 4p*N+1th to (4p+4)*Nth coding symbols of the second identification part are:
  • p is a non-negative integer
  • 4p+3 is a non-negative integer less than or equal to Q-1
  • Q is the number of code symbols included in an AM.
  • the first AM group further includes a first padding part, and the sum of the number of bits of the first padding part and the number of bits of the first identification part is an integer multiple of the size of a standard code block, so
  • the standard code block is a code block in the transcoding mode adopted by the first communication device;
  • the second AM group further includes a second padding part, the number of bits of the second padding part and the second identifier
  • the sum of the number of bits in the part is an integer multiple of the size of the standard code block; wherein the number of bits in the first padding part is different from the number of bits in the second padding part.
  • the processing module is further configured to control the first sending logical channel of the M sending logical channels to exit the working state when the first target condition is satisfied, and the A target condition is at least one of the following conditions:
  • the first sending logical channel is faulty
  • the physical channel corresponding to the first sending logical channel is faulty
  • the sending logical channel corresponding to the same physical channel as the first sending logical channel fails;
  • the first receiving logic channel corresponding to the first sending logic channel in the second communication device fails
  • the physical channel corresponding to the first receiving logical channel in the second communication device is faulty
  • the data flow of the M sending logical channels is lower than a preset flow value
  • the first communication device receives a first instruction, and the first instruction is used to instruct the processing module 2830 to control the first sending logic channel to exit the working state.
  • M is less than N
  • the processing module is further configured to control the second sending logic channels other than the M sending logic channels to resume working status when the second target condition is satisfied, and the second target The condition is at least one of the following conditions:
  • the first communication device receives a second instruction, and the second instruction is used to instruct the processing module 2830 to control the second sending logical channel to resume a working state.
  • the sending module 2820 can be implemented by a transceiver.
  • the processing module 2830 may be implemented by a processor. For specific functions and beneficial effects of the sending module 2820 and the processing module 2830, reference may be made to the related description of the method shown in FIG. 8, and details are not described herein again.
  • FIG. 29 is a schematic structural diagram of a communication device according to another embodiment of the present application.
  • the communication device 2900 shown in FIG. 29 may correspond to the above second communication device.
  • the communication device 2900 includes a receiving module 2910 and a processing module 2930.
  • the receiving module 2910 is configured to receive first target data sent by a first communication device on M receiving logic channels, where the first target data includes a first AM group, and the first AM group and the M receiving logic Corresponding to the channel, M is a positive integer.
  • the processing module 2930 is configured to remove the first AM group from the first target data.
  • the receiving module 2910 is further configured to receive the first communication device sent by the first communication device on the N receiving logical channels.
  • Two target data the second target data includes a second AM group, the second AM group corresponds to the N receiving logic channels, N is a positive integer, and N and M are different.
  • the processing module 2930 is further configured to remove the second AM group from the second target data.
  • the processing module 2930 is specifically configured to remove the first AM group from the first target data according to a first removal cycle; the processing module 2930 is specifically also configured to remove the first AM group from the first target data; The communication device removes the second AM group from the second target data according to the second removal cycle.
  • the first removal period is different from the second removal period.
  • the first AM group includes a first identification part, the first identification part includes M AMs, and the M AMs have a one-to-one correspondence with the M receiving logical channels;
  • the second AM group It includes a second identification part, the second identification part includes N AMs, and the N AMs correspond to the N receiving logical channels in a one-to-one correspondence.
  • the sequence of the coding symbols of the first identification part is different from the sequence of the coding symbols of the second identification part, and the coding symbols are symbols in an error correction coding manner adopted by the second communication device.
  • the AMs of the M receiving logical channels are AM_i 0 , AM_i 1 , ..., AM_i M-1 in the order of channel numbers from small to large;
  • the p*M+1th to (p+2)*Mth coding symbols of the first identification part are:
  • the 2p*M+1th to (2p+2)*Mth coding symbols of the first identification part are:
  • the 3p*M+1th to (3p+3)*Mth coding symbols of the first identification part are:
  • the 4p*M+1th to (4p+4)*Mth coding symbols of the first identification part are:
  • p is a non-negative integer
  • 4p+3 is a non-negative integer less than or equal to Q-1
  • Q is the number of code symbols included in an AM.
  • the AMs of the N receiving logical channels are AM_i 0 , AM_i 1 , ..., AM_i N-1 in the order of channel numbers from small to large;
  • the p*N+1th to (p+2)*Nth coding symbols of the second identification part are:
  • the 2p*N+1th to (2p+2)*Nth coding symbols of the second identification part are:
  • the 3p*N+1th to (3p+3)*Nth coding symbols of the second identification part are:
  • the 4p*N+1th to (4p+4)*Nth coding symbols of the second identification part are:
  • p is a non-negative integer
  • 4p+3 is a non-negative integer less than or equal to Q-1
  • Q is the number of code symbols included in an AM.
  • the first AM group further includes a first padding part, and the sum of the number of bits of the first padding part and the number of bits of the first identification part is an integer multiple of the size of a standard code block, so
  • the standard code block is a code block in the transcoding mode adopted by the first communication device;
  • the second AM group further includes a second padding part, the number of bits of the second padding part and the second identifier
  • the sum of the number of bits in the part is an integer multiple of the size of the standard code block; wherein the number of bits in the first padding part is different from the number of bits in the second padding part.
  • the processing module 2930 is further configured to control the first receiving logic channel among the M receiving logic channels to exit the working state when the third target condition is satisfied, and the third The target condition is at least one of the following conditions:
  • the first receiving logical channel is faulty
  • the physical channel corresponding to the first receiving logical channel is faulty
  • the receiving logical channel corresponding to the same physical channel as the first receiving logical channel fails;
  • the first sending logic channel corresponding to the first receiving logic channel in the first communication device is faulty
  • the physical channel corresponding to the first sending logical channel in the first communication device is faulty
  • a transmission logical channel corresponding to the same physical channel as the first transmission logical channel in the first communication device fails
  • the data flow of the M receiving logical channels is lower than a preset flow value
  • the second communication device receives a third instruction, and the third instruction is used to instruct the processing module 2930 to control the first receiving logical channel to exit the working state.
  • M is less than N
  • the processing module 2930 is further configured to, if the fourth target condition is met, the second communication device to control the second receiving logical channel other than the M receiving logical channels to resume work State, the fourth target condition is at least one of the following conditions:
  • the second communication device receives a fourth instruction, and the fourth instruction is used to instruct the processing module 2930 to control the second receiving logical channel to restore the working state.
  • the receiving module 2910 can be implemented by a transceiver.
  • the processing module 2930 may be implemented by a processor. For specific functions and beneficial effects of the receiving module 2910 and the processing module 2930, reference may be made to the related description of the method shown in FIG. 8, and details are not described herein again.
  • FIG. 30 is a schematic structural diagram of a communication device provided by another embodiment of the present application.
  • the communication device 3000 may correspond to the above first communication device.
  • the communication device 3000 may include a transceiver 3010, a processor 3020, and a memory 3030.
  • FIG. 30 Only one memory and processor are shown in Figure 30. In an actual communication device product, there may be one or more processors and one or more memories.
  • the memory may also be referred to as a storage medium or storage device.
  • the memory may be set independently of the processor, or may be integrated with the processor, which is not limited in the embodiment of the present application.
  • the transceiver 3010, the processor 3020, and the memory 3030 communicate with each other through internal connection paths, and transfer control and/or data signals.
  • the processor 3020 is configured to insert a first alignment identifier AM group into the first data to be sent to obtain the first target data.
  • the first AM group corresponds to M sending logical channels, and M is positive. Integer.
  • the transceiver 3010 is configured to send the first target data to the second communication device on the M sending logical channels.
  • the processor 3020 is further configured to insert a second AM group into the second data to be sent to obtain the first Two target data, the second AM group corresponds to N sending logical channels, N is a positive integer, and N and M are different.
  • the transceiver 3010 is further configured to send the second target data to the second communication device on the N sending logical channels.
  • FIG. 31 is a schematic structural diagram of a communication device provided by another embodiment of the present application.
  • the communication device 3100 may correspond to the above second communication device.
  • the communication device 3100 may include a transceiver 3110, a processor 3120, and a memory 3130.
  • FIG. 31 Only one memory and processor are shown in Figure 31. In an actual communication device product, there may be one or more processors and one or more memories.
  • the memory may also be referred to as a storage medium or storage device.
  • the memory may be set independently of the processor, or may be integrated with the processor, which is not limited in the embodiment of the present application.
  • the transceiver 3110, the processor 3120, and the memory 3130 communicate with each other through internal connection paths, and transfer control and/or data signals.
  • the transceiver 3110 is configured to receive first target data sent by a first communication device on M receiving logical channels, and the first target data includes a first AM group, and the first AM group is The M receiving logic channels correspond to each other, and M is a positive integer.
  • the processor 3120 is configured to remove the first AM group from the first target data.
  • the transceiver 3110 is further configured to receive the first communication device sent by the first communication device on the N receiving logical channels.
  • Two target data the second target data includes a second AM group, the second AM group corresponds to the N receiving logic channels, N is a positive integer, and N and M are different.
  • the processor 3120 is further configured to remove the second AM group from the second target data.
  • the transceiver in each embodiment of the present application may also be referred to as a transceiver unit, transceiver, transceiver, and so on.
  • the processor may also be called a processing unit, a processing board, a processing module, a processing device, and so on.
  • the device for implementing the receiving function in the transceiver can be regarded as the receiving unit, and the device for implementing the sending function in the transceiver as the sending unit, that is, the transceiver includes the receiving unit and the sending unit.
  • the receiving unit may sometimes be called a receiver, receiver, or receiving circuit.
  • the transmitting unit may sometimes be called a transmitter, a transmitter, or a transmitting circuit.
  • the memory described in each embodiment of the present application is used to store computer instructions and parameters required for the operation of the processor.
  • the processor described in each embodiment of the present application may be an integrated circuit chip with signal processing capability. In the implementation process, the steps of the above method can be completed by hardware integrated logic circuits in the processor or instructions in the form of software.
  • the processor described in each embodiment of the present application may be a general-purpose processor, a digital signal processor (digital signal processor, DSP), an application specific integrated circuit (ASIC), and a field programmable gate array (field programmable gate array). , FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components.
  • DSP digital signal processor
  • ASIC application specific integrated circuit
  • FPGA field programmable gate array
  • the methods, steps, and logical block diagrams disclosed in the embodiments of the present application can be implemented or executed.
  • the general-purpose processor may be a microprocessor or the processor may also be any conventional processor or the like.
  • the steps of the method disclosed in the embodiments of the present application may be directly embodied as being executed and completed by a hardware decoding processor, or executed and completed by a combination of hardware and software modules in the decoding processor.
  • the software module can be located in random access memory (RAM), flash memory, read-only memory (read-only memory, ROM), programmable read-only memory, or electrically erasable programmable memory, registers, etc. mature in the field Storage medium.
  • the storage medium is located in the memory, and the processor reads the instructions in the memory and completes the steps of the above method in combination with its hardware.
  • the size of the sequence number of each process does not mean the order of execution.
  • the execution order of each process should be determined by its function and internal logic, and should not constitute the implementation process of the embodiments of this application. Any restrictions.
  • the computer program product includes one or more computer instructions.
  • the computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices.
  • the computer instructions may be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions may be transmitted from a website, computer, server, or data center.
  • the computer-readable storage medium may be any available medium that can be accessed by a computer or a data storage device such as a server or a data center integrated with one or more available media.
  • the usable medium may be a magnetic medium (for example, a floppy disk, a hard disk, a magnetic tape), an optical medium (for example, a digital video disc (DVD)), or a semiconductor medium (for example, a solid state disk (SSD)), etc.
  • the disclosed system, device, and method may be implemented in other ways.
  • the device embodiments described above are only illustrative.
  • the division of the units is only a logical function division, and there may be other divisions in actual implementation, for example, multiple units or components can be combined or It can be integrated into another system, or some features can be ignored or not implemented.
  • the displayed or discussed mutual coupling or direct coupling or communication connection may be indirect coupling or communication connection through some interfaces, devices or units, and may be in electrical, mechanical or other forms.
  • the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the objectives of the solutions of the embodiments.
  • each unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units may be integrated into one unit.
  • the function is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer readable storage medium.
  • the technical solution of this application essentially or the part that contributes to the existing technology or the part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including Several instructions are used to make a computer device (which may be a personal computer, a server, or a network device, etc.) execute all or part of the steps of the method described in each embodiment of the present application.
  • the aforementioned storage media include: U disk, mobile hard disk, read-only memory (read-only memory, ROM), random access memory (random access memory, RAM), magnetic disk or optical disk and other media that can store program code .

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Communication Control (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)

Abstract

本申请提供了数据处理方法和通信设备。在本申请的技术方案中，通信设备在串行数据中插入的AM组与通信设备当前处于工作状态的逻辑通道有关。这样，在通信设备的处于工作状态的逻辑通道的数量发生变化的情况下，就可以在待发送数据中插入与当前处于工作状态的发送逻辑通道对应的AM组，从而使得AM组适应发送逻辑通道数量的改变，保证接收端的通信设备对逻辑通道进行锁定与对齐。

Description

数据处理方法和通信设备
本申请要求于2019年06月04日提交中国专利局、申请号为201910482141.4、申请名称为“数据处理方法和通信设备”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及通信领域，并且更具体地，涉及数据处理方法和通信设备。
背景技术
在以太网通信中，物理编码子层(physical coding sub-layer，PCS)会把串行的数据流分发到多个通道上，这些通道一般分布在实现单元内部，一般称为逻辑通道(或者虚拟通道)。逻辑通道与物理通道具有映射关系，一个物理通道可以承载一个或者多个逻辑通道的数据。由于PCS会把串行的数据流分发到多个逻辑通道上，为了保证接收端设备可以实现逻辑通道的锁定与对齐，发送端设备会周期向串行的数据流中插入对齐标识符组(alignment maker group，AM group)。
电气和电子工程师协会(institute of electrical and electronics engineers，IEEE)802.3规范的AM组是按所有逻辑通道与物理通道都正常工作的情况构造的，也就是说，是按照满速率设计和规范的。但当通信设备中的逻辑通道或者物理通道的数量发生变化时，如果发送端仍然使用标准中的AM组，将无法保证接收端可以对逻辑通道进行正常的锁定与对齐。
发明内容
本申请提供数据处理方法和通信设备，在通信设备中的逻辑通道或者物理通道的数量发生变化时，能够保证接收端的通信设备对逻辑通道进行锁定与对齐。
第一方面，本申请提供了一种数据处理方法，所述方法包括：第一通信设备在第一待发送数据中插入第一对齐标识符AM组，得到第一目标数据，所述第一AM组与M个发送逻辑通道对应，M为正整数；所述第一通信设备在所述M个发送逻辑通道上，向第二通信设备发送所述第一目标数据；在所述第一通信设备的处于工作状态的发送逻辑通道的数量由M变为N的情况下，所述第一通信设备在第二待发送数据中插入第二AM组，得到第二目标数据，所述第二AM组与N个发送逻辑通道对应，N为正整数，且N与M不同；所述第一通信设备在所述N个发送逻辑通道上，向第二通信设备发送所述第二目标数据。
可选地，第一AM组包括M个发送逻辑通道的M个AM，而第二AM包括N个发送逻辑通道的N个AM。作为一个示例，M＝4，4个发送逻辑通道分别为通道0～通道3，N＝6，6个发送逻辑通道分别为通道0～通道5，那么第一AM组包括通道0～通道3的AM，第二 AM组包括通道0～通道5的AM。
在上述技术方案中，第一通信设备在待发送数据中插入的AM组与处于工作状态的发送逻辑通道对应，这样，当处于工作状态的发送逻辑通道的数量发生变化时，例如，从M变为N，第一通信设备就可以在待发送数据中插入与当前处于工作状态的发送逻辑通道对应的AM组，从而使得AM组适应发送逻辑通道数量的改变，保证第二通信设备对逻辑通道进行锁定与对齐。
在一种可能的实现方式中，所述第一通信设备在第一待发送数据中插入第一AM组，包括：所述第一通信设备按照第一插入周期，将所述第一AM组插入所述第一待发送数据中；所述第一通信设备在第二待发送数据中插入第二AM组，包括：所述第一通信设备按照第二插入周期，将所述第二AM组插入所述第二待发送数据中。
可选地，第一插入周期可以为相邻两个第一AM组之间相隔的FEC码字的个数，可以为相邻两个第一AM组之间间隔的转码码块的个数，还可以是相邻两个第一AM组之间间隔的比特数等。同样，第二插入周期可以为相邻两个第二AM组之间相隔的FEC码字的个数，可以为相邻两个第二AM组之间间隔的转码码块的个数，还可以是相邻两个第二AM组之间间隔的比特数等。
在实际的数据处理中，要求AM必须出现在一个FEC码字的开端，这就要求AM组的插入是有一定周期的。在第一通信设备的处于工作状态的发送逻辑通道的数量发生改变后，如果插入周期不发生改变，将无法确保AM始终出现在一个FEC码字的开端。上述技术方案中，对于第一AM组使用第一插入周期，对于第二AM使用第二插入周期，从而解决上述问题。
在一种可能的实现方式中，所述第一插入周期与所述第二插入周期不同。
在一种可能的实现方式中，所述第一AM组包括第一标识部分，所述第一标识部分包括M个AM，所述M个AM与所述M个发送逻辑通道一一对应；所述第二AM组包括第二标识部分，所述第二标识部分包括N个AM，所述N个AM与所述N个发送逻辑通道一一对应。
在上述技术方案中，第一AM组包括与M个发送逻辑通道的对应的AM，第二AM组包括与N个发送逻辑通道的对应的AM，这样经过数据分发过程，可以使得每一个处于工作状态的发送逻辑通道中有对应的AM，从而确保第二通信设备可以完成逻辑通道的锁定与对齐。
在一种可能的实现方式中，所述第一标识部分的编码符号的顺序与第二标识部分的编码符号的顺序不同，所述编码符号为在所述第一通信设备采用的纠错编码方式下的符号。
在一种可能的实现方式中，所述M个发送逻辑通道的AM按照通道号从小到大的顺序依次为AM_i 0，AM_i 1，…，AM_i M-1；
所述第一标识部分的第p*M+1个到第(p+2)*M个编码符号为：
{AM_i 0_p，AM_i 1_p，…，AM_i M-1_p，AM_i 0_p+1，AM_i 1_p+1，…，AM_i M-1_p+1}
或者，所述第一标识部分的第2p*M+1个到第(2p+2)*M个编码符号为：
{AM_i 0_2p，AM_i 1_2p，…，AM_i M-2_2p，AM_i M-1_2p，AM_i 1_2p+1，AM_i 0_2p+1，…，AM_i M-1_2p+1，AM_i M-2_2p+1}
或者，所述第一标识部分的第3p*M+1个到第(3p+3)*M个编码符号为：
{AM_i 0_3p，AM_i 1_3p，AM_i 2_3p，…，AM_i M-3_3p，AM_i M-2_3p，AM_i M-1_3p，AM_i 1_3p+1，AM_i 2_3p+1，AM_i 0_3p+1，…，AM_i M-2_3p+1，AM_i M-1_3p+1，AM_i M-3_3p+1，AM_i 2_3p+2，AM_i 0_3p+2，AM_i 1_3p+2，…，AM_i M-1_3p+2，AM_i M-3_3p+2，AM_i M-2_3p+2}
或者，所述第一标识部分的第4p*M+1个到第(4p+4)*M个编码符号为：
{AM_i 0_4p，AM_i 1_4p，AM_i 2_4p，AM_i 3_4p，…,AM_i M-4_4p，AM_i M-3_4p，AM_i M-2_4p，AM_i M-1_4p，AM_i 1_4p+1，AM_i 2_4p+1，AM_i 3_4p+1，AM_i 0_4p+1，…，AM_i M-3_4p+1，AM_i M-2_4p+1，AM_i M-1_4p+1，AM_i M-4_4p+1,AM_i 2_4p+2，AM_i 3_4p+2，AM_i 0_4p+2，AM_i 1_4p+2，…，AM_i M-2_4p+2，AM_i M-1_4p+2，AM_i M-4_4p+2，AM_i M-3_4p+2,AM_i 3_4p+3，AM_i 0_4p+3，AM_i 1_4p+3，AM_i 2_4p+3，…，AM_i M-1_4p+3，AM_i M-4_4p+3，AM_i M-3_4p+3，AM_i M-2_4p+3}
其中，p为非负整数，4p+3为小于或者等于Q-1的非负整数，Q为一个AM所包括的编码符号的数量。
在一种可能的实现方式中，所述N个发送逻辑通道的AM按照通道号从小到大的顺序依次为AM_i 0，AM_i 1，…，AM_i N-1；
所述第二标识部分的第p*N+1个到第(p+2)*N个编码符号为：
{AM_i 0_p，AM_i 1_p，…，AM_i N-1_p，AM_i 0_p+1，AM_i 1_p+1，…，AM_i N-1_p+1}
或者，所述第二标识部分的第2p*N+1个到第(2p+2)*N个编码符号为：
{AM_i 0_2p，AM_i 1_2p，…，AM_i N-2_2p，AM_i N-1_2p，AM_i 1_2p+1，AM_i 0_2p+1，…，AM_i N-1_2p+1，AM_i N-2_2p+1}
或者，所述第二标识部分的第3p*N+1个到第(3p+3)*N个编码符号为：
{AM_i 0_3p，AM_i 1_3p，AM_i 2_3p，…，AM_i N-3_3p，AM_i N-2_3p，AM_i N-1_3p，AM_i 1_3p+1，AM_i 2_3p+1，AM_i 0_3p+1，…，AM_i N-2_3p+1，AM_i N-1_3p+1，AM_i N-3_3p+1，AM_i 2_3p+2，AM_i 0_3p+2，AM_i 1_3p+2，…，AM_i N-1_3p+2，AM_i N-3_3p+2，AM_i N-2_3p+2}
或者，所述第二标识部分的第4p*N+1个到第(4p+4)*N个编码符号为：
{AM_i 0_4p，AM_i 1_4p，AM_i 2_4p，AM_i 3_4p，…,AM_i N-4_4p，AM_i N-3_4p，AM_i N-2_4p，AM_i N-1_4p，AM_i 1_4p+1，AM_i 2_4p+1，AM_i 3_4p+1，AM_i 0_4p+1，…，AM_i N-3_4p+1，AM_i N-2_4p+1，AM_i N-1_4p+1，AM_i N-4_4p+1,AM_i 2_4p+2，AM_i 3_4p+2，AM_i 0_4p+2，AM_i 1_4p+2，…，AM_i N-2_4p+2，AM_i N-1_4p+2，AM_i N-4_4p+2，AM_i N-3_4p+2,AM_i 3_4p+3，AM_i 0_4p+3，AM_i 1_4p+3，AM_i 2_4p+3，…，AM_i N-1_4p+3，AM_i N-4_4p+3，AM_i N-3_4p+3，AM_i N-2_4p+3}
其中，p为非负整数，4p+3为小于或者等于Q-1的非负整数，Q为一个AM所包括的编码符号的数量。
在一种可能的实现方式中，所述第一AM组还包括第一填充部分，所述第一填充部分的比特数与所述第一标识部分的比特数之和为一个标准码块的大小的整数倍，所述标准码块为在所述第一通信设备采用的转码方式下的码块；所述第二AM组还包括第二填充部分，所述第二填充部分的比特数与所述第二标识部分的比特数之和为所述标准码块的大小的整数倍；其中，所述第一填充部分的比特数与所述第二填充部分的比特数不同。
在一种可能的实现方式中，M大于N，所述方法还包括：在满足第一目标条件的情况下，所述第一通信设备控制所述M个发送逻辑通道中的第一发送逻辑通道退出工作状态，所述第一目标条件为以下条件中的至少一个：所述第一发送逻辑通道故障；所述第一发送逻辑通道对应的物理通道故障；与所述第一发送逻辑通道对应于同一物理通道的发送逻辑 通道故障；所述第二通信设备中与所述第一发送逻辑通道对应的第一接收逻辑通道故障；所述第二通信设备中与所述第一接收逻辑通道对应的物理通道故障；所述第二通信设备中与所述第一接收逻辑通道对应于同一物理通道的接收逻辑通道故障；所述M个发送逻辑通道的数据流量低于预设流量值；所述第一通信设备接收到第一指令，所述第一指令用于指示所述第一通信设备控制所述第一发送逻辑通道退出工作状态。
当M大于N，意味着有部分发送逻辑通道退出了工作状态。上文给出了若干使得发送逻辑通道退出工作状态的情况，其中包括被动退出的情况(例如，发送逻辑通道出现故障)和主动退出的状况(例如，当数据流量较小时)。对于被动退出的情况，相较于现有技术中，一个逻辑通道或者物理通道出现故障就放弃整条链路的情况，上述技术方案，可以提高链路的利用率。对于主动退出的情况，可以根据实际情况关闭部分发送逻辑通道，以减少功耗。
在一种可能的实现方式中，M小于N，所述方法还包括：在满足第二目标条件的情况下，所述第一通信设备控制所述M个发送逻辑通道以外的第二发送逻辑通道恢复工作状态，所述第二目标条件为以下条件中的至少一个：所述第二发送逻辑通道的故障消除；所述第二发送逻辑通道对应的物理通道的故障消除；与所述第二发送逻辑通道对应于同一物理通道的发送逻辑通道的故障消除；所述第二通信设备中与所述第二发送逻辑通道对应的第二接收逻辑通道的故障消除；所述第二通信设备中与所述第二接收逻辑通道对应的物理通道的故障消除；所述第二通信设备中与所述第二接收逻辑通道对应于同一物理通道的接收逻辑通道的故障消除；且所述M个发送逻辑通道的数据流量高于预设流量值；所述第一通信设备接收到第二指令，所述第二指令用于指示所述第一通信设备控制所述第二发送逻辑通道恢复工作状态。
当M小于N，意味着有部分发送逻辑通道恢复了工作状态。在发送逻辑通道在相应的条件下恢复工作状态，可以提高链路利用率，或者保证数据的快速传输。
第二方面，本申请提供一种数据处理方法，该方法包括：第二通信设备在M个接收逻辑通道上接收第一通信设备发送的第一目标数据，所述第一目标数据包括第一AM组，所述第一AM组与所述M个接收逻辑通道对应，M为正整数；所述第二通信设备从所述第一目标数据中移出所述第一AM组；在所述第二通信设备的处于工作状态的接收逻辑通道的数量由M变为N的情况下，所述第二通信设备在N个接收逻辑通道上接收第一通信设备发送的第二目标数据，所述第二目标数据包括第二AM组，所述第二AM组与所述N个接收逻辑通道对应，N为正整数，且N与M不同；所述第二通信设备从所述第二目标数据中移除所述第二AM组。
可选地，第一AM组包括M个接收逻辑通道的M个AM，而第二AM包括N个接收逻辑通道的N个AM。作为一个示例，M＝4，4个接收逻辑通道分别为通道0～通道3，N＝6，6个接收逻辑通道分别为通道0～通道5，那么第一AM组包括通道0～通道3的AM，第二AM组包括通道0～通道5的AM。
在一种可能的实现方式中，所述第二通信设备从所述第一目标数据中移出所述第一AM组，包括：所述第二通信设备按照第一移除周期，从所述第一目标数据中移出所述第一AM组；所述第二通信设备从所述第二目标数据中移出所述第二AM组，包括：所述第二通信设备按照第二移除周期，从所述第二目标数据中移出所述第二AM组。
可选地，第一移除周期可以为相邻两个第一AM组之间相隔的FEC码字的个数，可以为相邻两个第一AM组之间间隔的转码码块的个数，还可以是相邻两个第一AM组之间间隔的比特数等。同样，第二移除周期可以为相邻两个第二AM组之间相隔的FEC码字的个数，可以为相邻两个第二AM组之间间隔的转码码块的个数，还可以是相邻两个第二AM组之间间隔的比特数等。
第二通信设备移除AM组的周期与第一通信设备插入AM组的周期相对应。在实际的数据处理中，要求AM必须出现在一个FEC码字的开端，这就要求AM组的插入是有一定周期的。在第一通信设备的处于工作状态的发送逻辑通道的数量发生改变后，第一通信设备对于第二AM组的插入周期与第一AM组的插入周期可能不同，在第二通信设备中，如果仍以第一移除周期移除第二AM组，则可能使得到的数据有误。上述技术方案中，对于第一AM组使用第一移除周期，对于第二AM使用第二移除周期，从而解决上述问题。
在一种可能的实现方式中，所述第一移除周期与所述第二移除周期不同。
在一种可能的实现方式中，所述第一AM组包括第一标识部分，所述第一标识部分包括M个AM，所述M个AM与所述M个接收逻辑通道一一对应；所述第二AM组包括第二标识部分，所述第二标识部分包括N个AM，所述N个AM与所述N个接收逻辑通道一一对应。
在一种可能的实现方式中，所述第一标识部分的编码符号的顺序与第二标识部分的编码符号的顺序不同，所述编码符号为在所述第二通信设备采用的纠错编码方式下的符号。
在一种可能的实现方式中，所述M个接收逻辑通道的AM按照通道号从小到大的顺序依次为AM_i 0，AM_i 1，…，AM_i M-1；
所述第一标识部分的第p*M+1个到第(p+2)*M个编码符号为：
{AM_i 0_p，AM_i 1_p，…，AM_i M-1_p，AM_i 0_p+1，AM_i 1_p+1，…，AM_i M-1_p+1}
或者，所述第一标识部分的第2p*M+1个到第(2p+2)*M个编码符号为：
{AM_i 0_2p，AM_i 1_2p，…，AM_i M-2_2p，AM_i M-1_2p，AM_i 1_2p+1，AM_i 0_2p+1，…，AM_i M-1_2p+1，AM_i M-2_2p+1}
或者，所述第一标识部分的第3p*M+1个到第(3p+3)*M个编码符号为：
{AM_i 0_3p，AM_i 1_3p，AM_i 2_3p，…，AM_i M-3_3p，AM_i M-2_3p，AM_i M-1_3p，AM_i 1_3p+1，AM_i 2_3p+1，AM_i 0_3p+1，…，AM_i M-2_3p+1，AM_i M-1_3p+1，AM_i M-3_3p+1，AM_i 2_3p+2，AM_i 0_3p+2，AM_i 1_3p+2，…，AM_i M-1_3p+2，AM_i M-3_3p+2，AM_i M-2_3p+2}
或者，所述第一标识部分的第4p*M+1个到第(4p+4)*M个编码符号为：
{AM_i 0_4p，AM_i 1_4p，AM_i 2_4p，AM_i 3_4p，…,AM_i M-4_4p，AM_i M-3_4p，AM_i M-2_4p，AM_i M-1_4p，AM_i 1_4p+1，AM_i 2_4p+1，AM_i 3_4p+1，AM_i 0_4p+1，…，AM_i M-3_4p+1，AM_i M-2_4p+1，AM_i M-1_4p+1，AM_i M-4_4p+1,AM_i 2_4p+2，AM_i 3_4p+2，AM_i 0_4p+2，AM_i 1_4p+2，…，AM_i M-2_4p+2，AM_i M-1_4p+2，AM_i M-4_4p+2，AM_i M-3_4p+2,AM_i 3_4p+3，AM_i 0_4p+3，AM_i 1_4p+3，AM_i 2_4p+3，…，AM_i M-1_4p+3，AM_i M-4_4p+3，AM_i M-3_4p+3，AM_i M-2_4p+3}
其中，p为非负整数，4p+3为小于或者等于Q-1的非负整数，Q为一个AM所包括的编码符号的数量。
在一种可能的实现方式中，所述N个接收逻辑通道的AM按照通道号从小到大的顺序依次为AM_i 0，AM_i 1，…，AM_i N-1；
所述第二标识部分的第p*N+1个到第(p+2)*N个编码符号为：
{AM_i 0_p，AM_i 1_p，…，AM_i N-1_p，AM_i 0_p+1，AM_i 1_p+1，…，AM_i N-1_p+1}
或者，所述第二标识部分的第2p*N+1个到第(2p+2)*N个编码符号为：
{AM_i 0_2p，AM_i 1_2p，…，AM_i N-2_2p，AM_i N-1_2p，AM_i 1_2p+1，AM_i 0_2p+1，…，AM_i N-1_2p+1，AM_i N-2_2p+1}
或者，所述第二标识部分的第3p*N+1个到第(3p+3)*N个编码符号为：
{AM_i 0_3p，AM_i 1_3p，AM_i 2_3p，…，AM_i N-3_3p，AM_i N-2_3p，AM_i N-1_3p，AM_i 1_3p+1，AM_i 2_3p+1，AM_i 0_3p+1，…，AM_i N-2_3p+1，AM_i N-1_3p+1，AM_i N-3_3p+1，AM_i 2_3p+2，AM_i 0_3p+2，AM_i 1_3p+2，…，AM_i N-1_3p+2，AM_i N-3_3p+2，AM_i N-2_3p+2}
或者，所述第二标识部分的第4p*N+1个到第(4p+4)*N个编码符号为：
{AM_i 0_4p，AM_i 1_4p，AM_i 2_4p，AM_i 3_4p，…,AM_i N-4_4p，AM_i N-3_4p，AM_i N-2_4p，AM_i N-1_4p，AM_i 1_4p+1，AM_i 2_4p+1，AM_i 3_4p+1，AM_i 0_4p+1，…，AM_i N-3_4p+1，AM_i N-2_4p+1，AM_i N-1_4p+1，AM_i N-4_4p+1,AM_i 2_4p+2，AM_i 3_4p+2，AM_i 0_4p+2，AM_i 1_4p+2，…，AM_i N-2_4p+2，AM_i N-1_4p+2，AM_i N-4_4p+2，AM_i N-3_4p+2,AM_i 3_4p+3，AM_i 0_4p+3，AM_i 1_4p+3，AM_i 2_4p+3，…，AM_i N-1_4p+3，AM_i N-4_4p+3，AM_i N-3_4p+3，AM_i N-2_4p+3}
其中，p为非负整数，4p+3为小于或者等于Q-1的非负整数，Q为一个AM所包括的编码符号的数量。
在一种可能的实现方式中，所述第一AM组还包括第一填充部分，所述第一填充部分的比特数与所述第一标识部分的比特数之和为一个标准码块的大小的整数倍，所述标准码块为在所述第一通信设备采用的转码方式下的码块；所述第二AM组还包括第二填充部分，所述第二填充部分的比特数与所述第二标识部分的比特数之和为所述标准码块的大小的整数倍；其中，所述第一填充部分的比特数与所述第二填充部分的比特数不同。
在一种可能的实现方式中，M大于N，所述方法还包括：在满足第三目标条件的情况下，所述第二通信设备控制所述M个接收逻辑通道中的第一接收逻辑通道退出工作状态，所述第三目标条件为以下条件中的至少一个：所述第一接收逻辑通道故障；所述第一接收逻辑通道对应的物理通道故障；与所述第一接收逻辑通道对应于同一物理通道的接收逻辑通道故障；所述第一通信设备中与所述第一接收逻辑通道对应的第一发送逻辑通道故障；所述第一通信设备中与所述第一发送逻辑通道对应的物理通道故障；所述第一通信设备中与所述第一发送逻辑通道对应于同一物理通道的发送逻辑通道故障；所述M个接收逻辑通道的数据流量低于预设流量值；所述第二通信设备接收到第三指令，所述第三指令用于指示所述第二通信设备控制所述第一接收逻辑通道退出工作状态。
当M大于N，意味着有部分接收逻辑通道退出了工作状态。上文给出了若干使得接收逻辑通道退出工作状态的情况，其中包括被动退出的情况(例如，接收逻辑通道出现故障)和主动退出的状况(例如，当数据流量较小时)。对于被动退出的情况，相较于现有技术中，一个逻辑通道或者物理通道出现故障就放弃整条链路的情况，上述技术方案，可以提高链路的利用率。对于主动退出的情况，可以根据实际情况关闭部分接收逻辑通道，以减少功耗。
在一种可能的实现方式中，M小于N，所述方法还包括：在满足第四目标条件的情况下，所述第二通信设备控制所述M个接收逻辑通道以外的第二接收逻辑通道恢复工作状 态，所述第四目标条件为以下条件中的至少一个：所述第二接收逻辑通道的故障消除；所述第二接收逻辑通道对应的物理通道的故障消除；与所述第二接收逻辑通道对应于同一物理通道的接收逻辑通道的故障消除；所述第一通信设备中与所述第二接收逻辑通道对应的第二发送逻辑通道的故障消除；所述第一通信设备中与所述第二发送逻辑通道对应的物理通道的故障消除；所述第一通信设备中与所述第二发送逻辑通道对应于同一物理通道的发送逻辑通道的故障消除；且所述M个接收逻辑通道的数据流量高于预设流量值；所述第二通信设备接收到第四指令，所述第四指令用于指示所述第二通信设备控制所述第二接收逻辑通道恢复工作状态。
当M小于N，意味着有部分接收逻辑通道恢复了工作状态。在接收逻辑通道在相应的条件下恢复工作状态，可以提高链路利用率，或者保证数据的快速传输。
第三方面，本申请提供了一种数据处理方法，所述方法包括：第一通信设备在第一待发送数据中插入第一对齐标识符AM组，得到第一目标数据，所述第一AM组与M个发送逻辑通道对应，M为正整数；所述第一通信设备在所述M个发送逻辑通道上，向第二通信设备发送所述第一目标数据；在所述第一通信设备采用的数据分发方式发生变化的情况下，所述第一通信设备在第二待发送数据中插入第二AM组，得到第二目标数据，所述第二AM组与N个发送逻辑通道对应，所述第二AM组与所述第一AM组不同，N为正整数。所述第一通信设备所述N个发送逻辑通道上，向第二通信设备发送所述第二目标数据。
在一种可能的实现方式中，M等于N。
在一种可能的实现方式中，所述M个发送逻辑通道的AM按照通道号从小到大的顺序依次为AM_i 0，AM_i 1，…，AM_i M-1；
所述第一标识部分的第p*M+1个到第(p+2)*M个编码符号为：
{AM_i 0_p，AM_i 1_p，…，AM_i M-1_p，AM_i 0_p+1，AM_i 1_p+1，…，AM_i M-1_p+1}
或者，所述第一标识部分的第2p*M+1个到第(2p+2)*M个编码符号为：
{AM_i 0_2p，AM_i 1_2p，…，AM_i M-2_2p，AM_i M-1_2p，AM_i 1_2p+1，AM_i 0_2p+1，…，AM_i M-1_2p+1，AM_i M-2_2p+1}
或者，所述第一标识部分的第3p*M+1个到第(3p+3)*M个编码符号为：
{AM_i 0_3p，AM_i 1_3p，AM_i 2_3p，…，AM_i M-3_3p，AM_i M-2_3p，AM_i M-1_3p，AM_i 1_3p+1，AM_i 2_3p+1，AM_i 0_3p+1，…，AM_i M-2_3p+1，AM_i M-1_3p+1，AM_i M-3_3p+1，AM_i 2_3p+2，AM_i 0_3p+2，AM_i 1_3p+2，…，AM_i M-1_3p+2，AM_i M-3_3p+2，AM_i M-2_3p+2}
或者，所述第一标识部分的第4p*M+1个到第(4p+4)*M个编码符号为：
{AM_i 0_4p，AM_i 1_4p，AM_i 2_4p，AM_i 3_4p，…,AM_i M-4_4p，AM_i M-3_4p，AM_i M-2_4p，AM_i M-1_4p，AM_i 1_4p+1，AM_i 2_4p+1，AM_i 3_4p+1，AM_i 0_4p+1，…，AM_i M-3_4p+1，AM_i M-2_4p+1，AM_i M-1_4p+1，AM_i M-4_4p+1,AM_i 2_4p+2，AM_i 3_4p+2，AM_i 0_4p+2，AM_i 1_4p+2，…，AM_i M-2_4p+2，AM_i M-1_4p+2，AM_i M-4_4p+2，AM_i M-3_4p+2,AM_i 3_4p+3，AM_i 0_4p+3，AM_i 1_4p+3，AM_i 2_4p+3，…，AM_i M-1_4p+3，AM_i M-4_4p+3，AM_i M-3_4p+3，AM_i M-2_4p+3}
其中，p为非负整数，4p+3为小于或者等于Q-1的非负整数，Q为一个AM所包括的编码符号的数量，所述编码符号为在所述第一通信设备采用的纠错编码方式下的一个符号的大小。
在一种可能的实现方式中，所述N个发送逻辑通道的AM按照通道号从小到大的顺序依次为AM_i 0，AM_i 1，…，AM_i N-1；
所述第二标识部分的第p*N+1个到第(p+2)*N个编码符号为：
{AM_i 0_p，AM_i 1_p，…，AM_i N-1_p，AM_i 0_p+1，AM_i 1_p+1，…，AM_i N-1_p+1}
或者，所述第二标识部分的第2p*N+1个到第(2p+2)*N个编码符号为：
{AM_i 0_2p，AM_i 1_2p，…，AM_i N-2_2p，AM_i N-1_2p，AM_i 1_2p+1，AM_i 0_2p+1，…，AM_i N-1_2p+1，AM_i N-2_2p+1}
或者，所述第二标识部分的第3p*N+1个到第(3p+3)*N个编码符号为：
{AM_i 0_3p，AM_i 1_3p，AM_i 2_3p，…，AM_i N-3_3p，AM_i N-2_3p，AM_i N-1_3p，AM_i 1_3p+1，AM_i 2_3p+1，AM_i 0_3p+1，…，AM_i N-2_3p+1，AM_i N-1_3p+1，AM_i N-3_3p+1，AM_i 2_3p+2，AM_i 0_3p+2，AM_i 1_3p+2，…，AM_i N-1_3p+2，AM_i N-3_3p+2，AM_i N-2_3p+2}
或者，所述第二标识部分的第4p*N+1个到第(4p+4)*N个编码符号为：
{AM_i 0_4p，AM_i 1_4p，AM_i 2_4p，AM_i 3_4p，…,AM_i N-4_4p，AM_i N-3_4p，AM_i N-2_4p，AM_i N-1_4p，AM_i 1_4p+1，AM_i 2_4p+1，AM_i 3_4p+1，AM_i 0_4p+1，…，AM_i N-3_4p+1，AM_i N-2_4p+1，AM_i N-1_4p+1，AM_i N-4_4p+1,AM_i 2_4p+2，AM_i 3_4p+2，AM_i 0_4p+2，AM_i 1_4p+2，…，AM_i N-2_4p+2，AM_i N-1_4p+2，AM_i N-4_4p+2，AM_i N-3_4p+2,AM_i 3_4p+3，AM_i 0_4p+3，AM_i 1_4p+3，AM_i 2_4p+3，…，AM_i N-1_4p+3，AM_i N-4_4p+3，AM_i N-3_4p+3，AM_i N-2_4p+3}
其中，p为非负整数，4p+3为小于或者等于Q-1的非负整数，Q为一个AM所包括的编码符号的数量，所述编码符号为在所述第一通信设备采用的纠错编码方式下的一个符号的大小。
第四方面，本申请提供一种数据处理方法，该方法包括：第二通信设备在M个接收逻辑通道上接收第一通信设备发送的第一目标数据，所述第一目标数据包括第一AM组，所述第一AM组与所述M个接收逻辑通道对应，M为正整数；所述第二通信设备从所述第一目标数据中移出所述第一AM组；在所述第二通信设备的处于工作状态的接收逻辑通道的数量由M变为N的情况下，所述第二通信设备在N个接收逻辑通道上接收第一通信设备发送的第二目标数据，所述第二目标数据包括第二AM组，所述第二AM组与所述N个接收逻辑通道对应，所述第二AM组与所述第一AM组不同，N为正整数；所述第二通信设备从所述第二目标数据中移除所述第二AM组。
在一种可能的实现方式中，M等于N。
在一种可能的实现方式中，所述M个发送逻辑通道的AM按照通道号从小到大的顺序依次为AM_i 0，AM_i 1，…，AM_i M-1；
所述第一标识部分的第p*M+1个到第(p+2)*M个编码符号为：
{AM_i 0_p，AM_i 1_p，…，AM_i M-1_p，AM_i 0_p+1，AM_i 1_p+1，…，AM_i M-1_p+1}
或者，所述第一标识部分的第2p*M+1个到第(2p+2)*M个编码符号为：
{AM_i 0_2p，AM_i 1_2p，…，AM_i M-2_2p，AM_i M-1_2p，AM_i 1_2p+1，AM_i 0_2p+1，…，AM_i M-1_2p+1，AM_i M-2_2p+1}
或者，所述第一标识部分的第3p*M+1个到第(3p+3)*M个编码符号为：
{AM_i 0_3p，AM_i 1_3p，AM_i 2_3p，…，AM_i M-3_3p，AM_i M-2_3p，AM_i M-1_3p， AM_i 1_3p+1，AM_i 2_3p+1，AM_i 0_3p+1，…，AM_i M-2_3p+1，AM_i M-1_3p+1，AM_i M-3_3p+1，AM_i 2_3p+2，AM_i 0_3p+2，AM_i 1_3p+2，…，AM_i M-1_3p+2，AM_i M-3_3p+2，AM_i M-2_3p+2}
或者，所述第一标识部分的第4p*M+1个到第(4p+4)*M个编码符号为：
{AM_i 0_4p，AM_i 1_4p，AM_i 2_4p，AM_i 3_4p，…,AM_i M-4_4p，AM_i M-3_4p，AM_i M-2_4p，AM_i M-1_4p，AM_i 1_4p+1，AM_i 2_4p+1，AM_i 3_4p+1，AM_i 0_4p+1，…，AM_i M-3_4p+1，AM_i M-2_4p+1，AM_i M-1_4p+1，AM_i M-4_4p+1,AM_i 2_4p+2，AM_i 3_4p+2，AM_i 0_4p+2，AM_i 1_4p+2，…，AM_i M-2_4p+2，AM_i M-1_4p+2，AM_i M-4_4p+2，AM_i M-3_4p+2,AM_i 3_4p+3，AM_i 0_4p+3，AM_i 1_4p+3，AM_i 2_4p+3，…，AM_i M-1_4p+3，AM_i M-4_4p+3，AM_i M-3_4p+3，AM_i M-2_4p+3}
其中，p为非负整数，4p+3为小于或者等于Q-1的非负整数，Q为一个AM所包括的编码符号的数量，所述编码符号为在所述第一通信设备采用的纠错编码方式下的一个符号的大小。
在一种可能的实现方式中，所述N个发送逻辑通道的AM按照通道号从小到大的顺序依次为AM_i 0，AM_i 1，…，AM_i N-1；
所述第二标识部分的第p*N+1个到第(p+2)*N个编码符号为：
{AM_i 0_p，AM_i 1_p，…，AM_i N-1_p，AM_i 0_p+1，AM_i 1_p+1，…，AM_i N-1_p+1}
或者，所述第二标识部分的第2p*N+1个到第(2p+2)*N个编码符号为：
{AM_i 0_2p，AM_i 1_2p，…，AM_i N-2_2p，AM_i N-1_2p，AM_i 1_2p+1，AM_i 0_2p+1，…，AM_i N-1_2p+1，AM_i N-2_2p+1}
或者，所述第二标识部分的第3p*N+1个到第(3p+3)*N个编码符号为：
{AM_i 0_3p，AM_i 1_3p，AM_i 2_3p，…，AM_i N-3_3p，AM_i N-2_3p，AM_i N-1_3p，AM_i 1_3p+1，AM_i 2_3p+1，AM_i 0_3p+1，…，AM_i N-2_3p+1，AM_i N-1_3p+1，AM_i N-3_3p+1，AM_i 2_3p+2，AM_i 0_3p+2，AM_i 1_3p+2，…，AM_i N-1_3p+2，AM_i N-3_3p+2，AM_i N-2_3p+2}
或者，所述第二标识部分的第4p*N+1个到第(4p+4)*N个编码符号为：
{AM_i 0_4p，AM_i 1_4p，AM_i 2_4p，AM_i 3_4p，…,AM_i N-4_4p，AM_i N-3_4p，AM_i N-2_4p，AM_i N-1_4p，AM_i 1_4p+1，AM_i 2_4p+1，AM_i 3_4p+1，AM_i 0_4p+1，…，AM_i N-3_4p+1，AM_i N-2_4p+1，AM_i N-1_4p+1，AM_i N-4_4p+1,AM_i 2_4p+2，AM_i 3_4p+2，AM_i 0_4p+2，AM_i 1_4p+2，…，AM_i N-2_4p+2，AM_i N-1_4p+2，AM_i N-4_4p+2，AM_i N-3_4p+2,AM_i 3_4p+3，AM_i 0_4p+3，AM_i 1_4p+3，AM_i 2_4p+3，…，AM_i N-1_4p+3，AM_i N-4_4p+3，AM_i N-3_4p+3，AM_i N-2_4p+3}
其中，p为非负整数，4p+3为小于或者等于Q-1的非负整数，Q为一个AM所包括的编码符号的数量，所述编码符号为在所述第一通信设备采用的纠错编码方式下的一个符号的大小。
第五方面，本申请提供了一种通信设备，包括用于执行第一方面或第一方面任意一种实现方式中的模块。
第六方面，本申请提供了一种通信设备，包括用于执行第二方面或第二方面任意一种实现方式中的模块。
第七方面，本申请提供了一种通信设备，包括用于执行第三方面或第三方面任意一种实现方式中的模块。
第八方面，本申请提供了一种通信设备，包括用于执行第四方面或第四方面任意一种实现方式中的模块。
第九方面，本申请提供了一种芯片，所述芯片与存储器相连，用于读取并执行所述存 储器中存储的软件程序，以实现第一方面或第一方面任意一种实现方式所述的方法。
第十方面，本申请提供了一种芯片，所述芯片与存储器相连，用于读取并执行所述存储器中存储的软件程序，以实现第一方面或第一方面任意一种实现方式所述的方法。
第十一方面，本申请提供了一种芯片，所述芯片与存储器相连，用于读取并执行所述存储器中存储的软件程序，以实现第一方面或第一方面任意一种实现方式所述的方法。
第十二方面，本申请提供了一种芯片，所述芯片与存储器相连，用于读取并执行所述存储器中存储的软件程序，以实现第一方面或第一方面任意一种实现方式所述的方法。
第十三方面，本申请提供了一种通信设备，包括收发器、处理器和存储器，用于执行第一方面或第一方面任意一种实现方式所述的方法。
第十四方面，本申请提供了一种通信设备，包括收发器、处理器和存储器，用于执行第二方面或第二方面任意一种实现方式所述的方法。
第十五方面，本申请提供了一种通信设备，包括收发器、处理器和存储器，用于执行第三方面或第三方面任意一种实现方式所述的方法。
第十六方面，本申请提供了一种通信设备，包括收发器、处理器和存储器，用于执行第四方面或第四方面任意一种实现方式所述的方法。
第十七方面，本申请提供了一种计算机可读存储介质，包括指令，当其在通信设备上运行时，使得通信设备执行第一方面或第一方面任意一种实现方式所述的方法。
第十八方面，本申请提供了一种计算机可读存储介质，包括指令，当其在通信设备上运行时，使得通信设备执行第二方面或第二方面任意一种实现方式所述的方法。
第十九方面，本申请提供了一种计算机可读存储介质，包括指令，当其在通信设备上运行时，使得通信设备执行第三方面或第三方面任意一种实现方式所述的方法。
第二十方面，本申请提供了一种计算机可读存储介质，包括指令，当其在通信设备上运行时，使得通信设备执行第四方面或第四方面任意一种实现方式所述的方法。
第二十一方面，本申请提供了一种计算机程序产品，当其在通信设备上运行时，使得通信设备执行第一方面或第一方面任意一种实现方式所述的方法。
第二十二方面，本申请提供了一种计算机程序产品，当其在通信设备上运行时，使得通信设备执行第二方面或第二方面任意一种实现方式所述的方法。
第二十三方面，本申请提供了一种计算机程序产品，当其在通信设备上运行时，使得通信设备执行第三方面或第三方面任意一种实现方式所述的方法。
第二十四方面，本申请提供了一种计算机程序产品，当其在通信设备上运行时，使得通信设备执行第四方面或第四方面任意一种实现方式所述的方法。
第二十五方面，本申请提供一种通信系统，所述通信系统包括上述第五方面、第七方面提供的通信设备；或者
所述通信系统包括上述第六方面、第八方面提供的通信设备；或者
所述通信系统包括上述第十三方面、第十五方面提供的通信设备；或者
所述通信系统包括上述第十四方面、第十六方面提供的通信设备。
附图说明
图1是本申请实施例提供的系统架构示意图。
图2是200G/400G以太网的AM格式。
图3是40G/100G以太网的AM格式。
图4是本申请实施例的第一通信设备和第二通信设备的数据处理过程的示意图。
图5是第一通信设备在多通道下进行数据分发的示意图。
图6是第一通信设备在多通道下进行数据分发的另一示意图。
图7是第二通信设备在多通道下接收数据的示意图。
图8是本申请实施例的数据处理方法的示意性流程图。
图9是计算插入/移除周期的功能电路图。
图10是另一计算插入/移除周期的功能电路图。
图11是第一通信设备码块分发的示意图。
图12是本申请实施例的AM组的GColumn内的编码符号进行调整的示意图。
图13是200G(4*50G)2个物理通道出现故障的示意图。
图14是本申请实施例提供的AM组。
图15是本申请实施例提供的另一AM组。
图16是本申请实施例提供的另一AM组。
图17是200G(4*50G)2个故障的物理通道中的1个故障消失的示意图。
图18是本申请实施例提供的另一AM组。
图19是400G(8*50G)2个物理通道出现故障的示意图。
图20是本申请实施例提供的另一AM组。
图21是本申请实施例提供的另一AM组。
图22是200G(4*50G)使用4路FEC码字进行数据分发的示意图。
图23是本申请实施例提供的另一AM组。
图24是本申请实施例提供的另一AM组。
图25是100G以太网技术数据分发的示意图。
图26是本申请实施例提供的另一AM组。
图27是本申请实施例提供的另一AM组。
图28是本申请实施例的通信设备的示意性结构图。
图29是本申请另一实施例的通信设备的示意性结构图。
图30是本申请另一实施例提供的通信设备的示意性结构图。
图31是本申请另一实施例提供的通信设备的示意性结构图。
具体实施方式
下面将结合附图，对本申请中的技术方案进行描述。
IEEE 802.3规范了40G/50G/100G/200G/400G多通道架构，数据可以在多条物理通道上进行传输。如图1所示的系统架构示意图，第一通信设备与第二通信设备通过若干个物理通道连接，多个物理通道并行传输，可以提高以太网的速度，例如，物理通道可以为高速总线，例如为铜线，这样，第一通信设备与第二通信设备可以通过铜线实现电互联。例如，对于200G的以太网技术，第一通信设备与第二通信设备可以通过8个物理通道或者4个物理通道或者2个物理通道连接或者1个物理通道连接；又例如，对于400G的以太 网技术，第一通信设备与第二通信设备可以通过16个物理通道或者8个物理通道或者4个物理通道或者2个物理通道连接或者1个物理通道连接。再例如，对于100G的以太网技术，第一通信设备与第二通信设备可以通过4个物理通道或者2个物理通道连接或者1个物理通道连接。
可以理解地，第一通信设备与第二通信设备可以是芯片或者是具有收发功能的单元或者实体设备。若第一通信设备发送数据，则第二通信设备接收数据；若第二通信设备发送数据，第一通信设备接收数据。第一通信设备的发送物理通道与第二通信设备的接收物理通道一一对应；第二通信设备的发送物理通道与第一通信设备的接收物理通道一一对应。本申请以第一通信设备为发送端设备，第二通信设备为接收端设备为例进行描述。
第一通信设备和第二通信设备中的物理通道与逻辑通道与具有映射关系，例如，1个物理通道对应于1个逻辑通道，或者1个物理通道对应于2个逻辑通道，或者1个物理通道对应于4个逻辑通道等。也就是说，一个物理通道可以承载一个或者多个逻辑通道的数据。
此外，IEEE 802.3对于不同速度的以太网技术定义了不同数量的逻辑通道。例如，100G以太网技术的逻辑通道的个数为4。又例如，200G以太网技术的逻辑通道的个数为8。再例如，400G以太网技术的逻辑通道的个数为16。
需要说明的是，这里所说的逻辑通道可以为PCS通道或者前向纠错(forward error correction，FEC)通道。例如，对于200G/400G的以太网接口，逻辑通道可以称之为PCS通道或者FEC通道。又例如，对于100G的以太网接口，逻辑通道可以称为FEC通道。由于PCS通道和FEC通道通常分布在实现单元内部，且出于与物理媒介接入子层(physical medium attachment，PMA)通道区分的目的，一般称为逻辑通道。在本申请中同样称之为逻辑通道。
在第一通信设备和第二通信设备通过多个逻辑通道传输数据的情况下，为了保证第二通信设备可以实现逻辑通道的锁定与对齐，IEEE 802.3还规范设计了对齐标识符(alignment marker，AM)，用以标识各逻辑通道。
AM具有特定的格式。以200G/400G以太网技术为例，AM格式如图2所示，其中，公共标识(common marker，CM)中的CM 0-CM 5是多个逻辑通道的共同标识，特定标识(unique marker，UM)中的UM 0-UM 5则用于唯一标识一个逻辑通道，特定填充(unique padding，UP)中的UP0，UP1和UP2则为填充比特。也就是说，每个逻辑通道的AM中的CM 0，CM 1，CM 2，CM 3，CM 4和CM 5相同的，任何两个逻辑通道的UM 0，UM 1，UM 2，UM 3，UM 4和UM 5以及UP 0，UP 1和UP 2是不同的。再以100G/40G以太网技术为例，AM的格式如图3所示，M 0，M 1，M 2，M 4，M 5，M 6中的M表示标记(marker)，BIP 3和BIP 7中的BIP为比特交织奇偶校验(bit interleave parity)，BIP 3或BIP 7也可以为填充域。
其他速度的以太网技术的AM的形式与200G和400G的AM的形式类似，或者可以在200G和400G的AM的形式上有所变化，为了避免赘述，在此不一一举例。
AM与逻辑通道一一对应。以200G以太网技术为例，第一通信设备和第二通信设备均存在8个逻辑通道，每个逻辑通道的AM如表1所示。在表1中，一个行代表一个通道的AM。也就是说，第二通信设备只有接收到除UP0-UP2以外的其他字段均与表1中的AM匹配的AM时，才能对一个逻辑通道进行锁定，并正确识别出该逻辑通道的通道号。
表1
逻辑通道号 {CM 0,CM 1,CM 2,UP 0,CM 3,CM 4,CM 5,UP 1,UM 0,UM 1,UM 2,UP 2,UM 3,UM 4,UM 5}
0 0x9A,0x4A,0x26,0x05,0x65,0xB5,0xD9,0xD6,0xB3,0xC0,0x8C,0x29,0x4C,0x3F,0x73
1 0x9A,0x4A,0x26,0x04,0x65,0xB5,0xD9,0x67,0x5A,0xDE,0x7E,0x98,0xA5,0x21,0x81
2 0x9A,0x4A,0x26,0x46,0x65,0xB5,0xD9,0xFE,0x3E,0xF3,0x56,0x01,0xC1,0x0C,0xA9
3 0x9A,0x4A,0x26,0x5A,0x65,0xB5,0xD9,0x84,0x86,0x80,0xD0,0x7B,0x79,0x7F,0x2F
4 0x9A,0x4A,0x26,0xE1,0x65,0xB5,0xD9,0x19,0x2A,0x51,0xF2,0xE6,0xD5,0xAE,0x0D
5 0x9A,0x4A,0x26,0xF2,0x65,0xB5,0xD9,0x4E,0x12,0x4F,0xD1,0xB1,0xED,0xB0,0x2E
6 0x9A,0x4A,0x26,0x3D,0x65,0xB5,0xD9,0xEE,0x42,0x9C,0xA1,0x11,0xBD,0x63,0x5E
7 0x9A,0x4A,0x26,0x22,0x65,0xB5,0xD9,0x32,0xD6,0x76,0x5B,0xCD,0x29,0x89,0xA4
第一通信设备是以AM组(AM group)的形式，将AM插入到待发送数据中的。相应地，第二通信设备同样以AM组的形式移除AM。第一通信设备可以按照一定周期，向待发送的数据中插入AM组，相应地，第二通信设备也可以按照一定周期，移除数据中的AM组。其中，AM组由各逻辑通道的AM组成的部分，以及填充部分两部分组成。
下面结合图4对第一通信设备和第二通信设备的数据处理过程进行描述。
图4中以200G以太网技术为例，如图4所示，第一通信设备从数据链路层接收到以太网帧，以太网帧到达媒体接入控制(media access control，MAC)层和协调子层(reconciliation sublayer，RS)，在MAC层对以太网帧进行校验，校验后的比特数据通过RS子层按照各种媒体独立接口(some kind of media independent interface，xMII)发送到PCS子层；PCS子层从xMII接收相关比特，并且按照特定的第一大小比特块进行编码和速率匹配；编码和速率匹配之后，对第一大小比特块的码块进行转码，得到成第二大小比特块的串行码块流；第二大小比特块的串行码块流经过加扰之后插入AM组，AM组包括若干个第二大小比特块；插入AM组之后，对串行的多个第二大小比特块进行前向纠错(forwarding error correction，FEC)编码加入校验比特；然后通过分发和交织将第二大小比特块码块按照一定数量的比特分发到若干个PCS通道或者FEC通道，组成AM组的每个AM会分布对应的PCS通道或FEC通道上；PCS通道或FEC通道上的比特可以通过PMA通道发送给第二通信设备。前述的物理通道可以是PMA通道。
第二通信设备通过PMD和PMA接收第一通信设备发送的比特，利用每个PCS通道或FEC通道上的AM进行通道锁定，并对各个通道重排序，得到串行码块流；然后对串行码块流进行FEC解码之后，移除串行码块流中的AM组；然后对移除AM组之后的串行码块流进行解扰和反向转码之后得到第一大小比特块的串行码块流；对第一大小比特块的串行码块流进行解码和速率匹配发送到RS子层和MAC层，通过MAC层将数据传送到数据链路层。
可以理解地，对于不同的以太网技术，第一大小比特块和第二大小比特块不同，例如，对于200G/400G以太网技术，第一大小比特块为64比特(bit，B)B/66B，第二大小比特块为256B/257B，AM组的由4个或8个257B码块组成。再例如，对于100G以太网技术，第一大小比特块为64B/66B，第二大小比特块为256B/257B，AM组由5个257B码块组成。
需要说明的是，为了方便理解，图4只是简述了以太网接口的处理流程，具体在应用 中可以增加其他的处理过程，或者不包括上述的处理过程，例如，对于40G和100G的以太网接口，可以不包括FEC编码和FEC解码的过程。对于不同的以太网技术，处理过程不同。例如，对于200G和400G的以太网技术，可以包括FEC编码和FEC解码的过程，FEC位于PCS子层内部。对于40G和100G的以太网技术可以包括FEC编码和FEC解码的过程也可以不包括FEC编码和FEC解码的过程。当40G和100G的以太网技术可以包括FEC编码和FEC解码的过程时，FEC子层作为独立子层位于PCS和PMA子层之间。
下面结合图5至图7对第一通信设备和第二通信设备通过多通道进行数据传输的过程进行更加详细地描述。
图5是第一通信设备在多通道下进行数据分发的示意图。以200G的数据分发流程为例，如图5所示，第一通信设备在串行的待发送数据中插入AM组后，通过两次分发过程，将串行的数据流分发到8个逻辑通道上。其中，通过分发1将插入AM组的待发送数据分发到2个并行数据流上，并进行FEC编码，得到FEC编码后的2个并行数据流(第一通信设备使用几路FEC码字，就可得到几个并行数据流)，如图5所示，可以得到A和B两个FEC编码后的并行数据流；通过分发2则可以将A、B两个FEC编码后的并行数据流的数据分发到8个逻辑通道上，进而通过物理通道将数据发送给第二通信设备。
同样以200G以太网技术为例，对上述两次分发进行详细描述。如图6所示，首先，已经插入AM组的串行数据流按照分发1的规则(即先取1个编码符号(symbol)分发到A路数据流，再取1个编码符号分发到B路数据流，依次类推，可以用A，B，A，B…来代表这个分发过程)形成2路并行的数据流A、B；然后，2路并行的数据流A、B按照分发2的规则(即A路数据流的第1个编码符号分发到逻辑通道0，B路数据流的第0个编码符号分发到逻辑通道1，A路数据流的第1个编码符号分发到逻辑通道2，B路数据流的第1个编码符号分发到逻辑通道3，A路数据流的第2个编码符号分发到逻辑通道4，B路数据流的第2个编码符号分发到逻辑通道5，A路数据流的第3个编码符号分发到逻辑通道6，B路数据流的第4个编码符号分发到逻辑通道7，可以用A，B，A，B，A，B，A，B来代表这个分发过程；接下来分发过程为B，A，B，A，B，A，B，A；再然后的分发过程为A，B，A，B，A，B，A，B；以此类推)分发到8个逻辑通道上。其中，编码符号为第一通信设备进行数据分发的数据单元，例如，编码符号可以是10比特、12比特等。应理解，分发2之所以使用上述分发方式，原因在于提高抗突发误码能力。
因此，为了保证各逻辑通道对应的AM按照期望的模式完整地出现在每个逻辑通道上，在串行数据流中插入AM组前，必须根据逻辑通道的AM格式以及具体的分发规则，构造AM组，从而使得第二通信设备接收到格式正确的AM，进而进行逻辑通道的锁定与对齐。
图7是第二通信设备在多通道下接收数据的示意图。同样以200G的数据分发流程为例，如图7所示，第二通信设备通过物理通道和逻辑通道接收来自第一通信设备的数据，在逻辑通道进行AM锁定、去抖、逻辑通道重排序和解交织等处理，形成A、B两路并行数据流，A、B两路并行数据流经过解码和交织得到包括AM组的串行数据，进一步在从数据中移除AM组，得到第一通信设备实际传输的数据。
图5至图7仅以200G以太网技术为例，对于40G、50G、100G和400G数据处理过程类似，在此不再赘述。
目前IEEE 802.3规范的AM组是按所有逻辑通道与物理通道都正常工作的情况构造的，也就是说，是按照满速率设计和规范的。但当通信设备中的逻辑通道或者物理通道的数量发生变化时(例如，部分逻辑通道出现故障、部分逻辑通道主动退出工作状态、部分逻辑通道故障消除、部分逻辑通道主动进入工作状态等)，现有的AM组将很难保证第二通信设备仍能够对逻辑通道进行锁定与对齐。
本申请提供了一种数据处理方法，能够在通信设备中的逻辑通道或者物理通道的数量发生变化时，保证接收端的通信设备对逻辑通道进行锁定与对齐。
图8是本申请实施例的数据处理方法的示意性流程图。图8所示的方法800可以包括810-870中的至少部分内容。
在810中，第一通信设备在第一待发送数据中插入第一AM组，得到第一目标数据，所述第一AM组与M个发送逻辑通道对应，M为正整数。
在820中，第一通信设备在所述M个发送逻辑通道上，向第二通信设备发送所述第一目标数据；第二通信设备在M个接收逻辑通道上接收第一通信设备发送的第一目标数据。
在830中，第二通信设备从所述第一目标数据中移除第一AM组。
在840中，第一通信设备的处于工作状态的发送逻辑通道的数量由M变为N，第二通信设备的处于工作状态的接收逻辑通道的数量由M变为N。
在850中，第一通信设备在第二待发送数据中插入第二AM组，得到第二目标数据，所述第二AM组与N个发送逻辑通道对应，N为正整数，且N与M不同。
在860中，第一通信设备在所述N个发送逻辑通道上，向第二通信设备发送所述第二目标数据；第二通信设备在N个接收逻辑通道上接收第一通信设备发送的第二目标数据。
在870中，第二通信设备从所述第二目标数据中移除第二AM组。
也就是说，当第一通信设备的处于工作状态的发送逻辑通道的数量和第二通信设备的处于工作状态的接收逻辑通道的数量发生变化时，第一通信设备会在待发送数据中插入与当前处于工作状态的发送逻辑通道对应的AM组，相应地，第二通信设备也会移除与当前处于工作状态的接收逻辑通道对应的AM组。
本申请实施例对第一通信设备的类型不作具体限定，只要其可以通过以太网技术与其他通信设备(例如，第二通信设备)进行通信即可。例如，第一通信设备为盒式或者框式的交换机、路由器等。
本申请实施例对第二通信设备的类型不作具体限定，只要其可以通过以太网技术与其他通信设备(例如，第一通信设备)进行通信即可。例如，第一通信设备为盒式或者框式的交换机、路由器等。
第一待发送数据与第二待发送数据可以为不同传输过程中的不同串行数据流，也可以为同一次传输过程中的串行数据流的两部分。第一待发送数据和第二待发送数据以第一通信设备和第二通信设备的使用的逻辑通道的数量发生变化为分界。例如，第一待发送数据与第二待发送数据为同一串行数据流的两部分时，第一待发送数据为第一通信设备的发送逻辑通道的数量，以及第二通信设备的接收逻辑通道的数量发生变化之前的部分，而第二待发送数据为第一通信设备的发送逻辑通道的数量，以及第二通信设备的接收逻辑通道的数量发生变化之后的部分。本申请实施例中为了描述方便，将其分别称为第一待发送数据 和第二待发送数据。
同样，第一目标数据和第二目标数据可以对应于不同传输过程中的不同串行数据流，也可以对应于同一次传输过程中的串行数据流的两部分。第一目标数据和第二目标数据以第一通信设备和第二通信设备的使用的逻辑通道的数量发生变化为分界。例如，第一目标数据与第二目标数据对应于同一串行数据流的两部分时，第一目标数据插入第一AM组的部分，而第二目标数据为插入第二AM的部分。本申请实施例中为了描述方便，将其分别称为第一目标数据和第二目标数据。
在本申请实施例中第一通信设备的发送逻辑通道与第二通信设备的接收逻辑通道一一对应。例如，第一通信设备由8个发送逻辑通道，第二通信设备中存在8个接收逻辑通道分别与第一通信设备的8个发送逻辑通道一一对应。因此，当第一通信设备与第二通信设备中的任意一个设备的逻辑通道的数量发生改变，对端通信设备的逻辑通道的数量发生相应变化。例如，第一通信设备的发送逻辑通道0由于出现故障而退出工作状态，那么第二通信设备的接收逻辑通道0不管有没有故障，同样会退出工作状态。
由于第一通信设备在在发送数据中插入的AM组与当前处于工作状态的发送逻辑通道的数量相关，因此在向待发送数据中插入AM组之前，第一通信设备会确定当前处于工作状态的发送逻辑通道，并获取与当前处于工作状态的发送逻辑通道对应的AM组。对于第二通信设备同样需要确定当前处于工作状态的接收逻辑通道，以便正确移除AM组。
可选地，对应于不同数量的发送逻辑通道的AM组可以为预配置的。
使得逻辑通道进入或者退出工作状态的情况有很多。以第一通信设备的发送逻辑通道的数量发生变化为例。
当M大于N时，M个发送逻辑通道中的第一发送逻辑通道会在满足以下条件中的至少一个时退出工作状态：所述第一发送逻辑通道故障；所述第一发送逻辑通道对应的物理通道故障；与所述第一发送逻辑通道对应于同一物理通道的发送逻辑通道故障；所述第二通信设备中与所述第一发送逻辑通道对应的第一接收逻辑通道故障；所述第二通信设备中与所述第一接收逻辑通道对应的物理通道故障；所述第二通信设备中与所述第一接收逻辑通道对应于同一物理通道的接收逻辑通道故障；所述M个发送逻辑通道的数据流量低于预设流量值；所述第一通信设备接收到第一指令，所述第一指令用于指示所述第一通信设备控制所述第一发送逻辑通道退出工作状态。其中，第一指令可以为人工指令。
当M小于N时，M个发送逻辑通道以外的第二发送逻辑通道会在满足以下条件中的至少一个时恢复工作状态：所述第二发送逻辑通道的故障消除；所述第二发送逻辑通道对应的物理通道的故障消除；与所述第二发送逻辑通道对应于同一物理通道的发送逻辑通道的故障消除；所述第二通信设备中与所述第二发送逻辑通道对应的第二接收逻辑通道的故障消除；所述第二通信设备中与所述第二接收逻辑通道对应的物理通道的故障消除；所述第二通信设备中与所述第二接收逻辑通道对应于同一物理通道的接收逻辑通道的故障消除；且所述M个发送逻辑通道的数据流量高于预设流量值；所述第一通信设备接收到第二指令，所述第二指令用于指示所述第一通信设备控制所述第二发送逻辑通道恢复工作状态。
第二通信设备中的接收逻辑通道的退出或进入工作状态与第一通信设备对于发送逻辑通道的处理类似，在此不再赘述。
第一通信设备的处于工作状态的发送逻辑通道的数量有M变为N存在很多种情况。作为一个示例，当M大于N的情况下，N个发送逻辑通道可以是M个发送逻辑通道的子集，也就是说，第一通信设备控制M个发送逻辑通道中的M-N个发送逻辑通道退出工作状态以使得发送逻辑通道的数量由M减少到N；和/或，当M小于N的情况下，M个发送逻辑通道可以是N个发送逻辑通道的子集，也就是说，第一通信设备控制M个发送逻辑通道以外的N-M个发送逻辑通道进入工作状态，以使得发送逻辑通道的数量由M增加到N。
作为另外一个示例，当M大于N的情况下，N个发送逻辑通道中的F个发送逻辑通道属于所述M个发送逻辑通道，F为小于或者等于N的非负整数，也就是说，在第一通信设备的发送逻辑通道的数量由M减少到N的过程中，存在M个发送逻辑通道以外的发送逻辑通道进入工作状态的情况，而M个发送逻辑通道中的部分或者全部退出工作状态，最终使得发送逻辑通道的数量由M减少到N；和/或，当M小于N的情况下，N个发送逻辑通道中的F个发送逻辑通道属于所述M个发送逻辑通道，F为小于或者等于M的非负整数，也就是说，在第一通信设备的发送逻辑通道的数量由M增加到N的过程中，存在M个发送逻辑通道中的部分或者全部退出工作状态的情况，通过使更多M个发送逻辑通道以外的发送逻辑通道进入工作状态，最终呈现出发送逻辑通道的数量由M减少到N。
在实际的数据处理中，要求AM必须出现在一个FEC码字(codeword)的开端，这就要求AM组的插入是有一定周期的。在第一通信设备的处于工作状态的发送逻辑通道的数量发生改变后，如果插入周期不发生改变，将无法确保AM始终出现在一个FEC码字的开端。因此，本申请实施例对于第一AM组使用第一插入周期，对于第二AM使用第二插入周期，从而解决上述问题。具体地，第一通信设备按照第一插入周期，将所述第一AM组插入所述第一待发送数据中；按照第二插入周期，将所述第二AM组插入所述第二待发送数据中。
其中，第一插入周期可以为相邻两个第一AM组之间相隔的FEC码字的个数，可以为相邻两个第一AM组之间间隔的转码码块的个数，还可以是相邻两个第一AM组之间间隔的比特数等。同样，第二插入周期可以为相邻两个第二AM组之间相隔的FEC码字的个数，可以为相邻两个第二AM组之间间隔的转码码块的个数，还可以是相邻两个第二AM组之间间隔的比特数等。
可选地，所述第一插入周期与所述第二插入周期不同。
作为一个示例，第一通信设备的处于工作状态的发送逻辑通道的数量由M变为N时，第一通信设备可以根据N，确定第二插入周期。表2示出了一种400G标准中不同逻辑通道个数对应的插入周期的对应关系。表3示出了一种200G标准中不同逻辑通道个数对应的插入周期的对应关系。表2和表3中的插入周期以FEC码字为单位。例如，插入周期为512，则表明每隔512个FEC码字插入一个AM组。应理解，表2和表3均为示例性的。
表2
逻辑通道个数 插入周期
1 512
2 1024
3 1536
4 2048
5 2560
6 3072
7 3584
8 4096
9 4608
10 5120
11 5632
12 6144
13 6656
14 7168
15 7680
16 8192
表3
逻辑通道个数 插入周期
1 512
2 1024
3 1536
4 2048
5 2560
6 3072
7 3584
8 4096
表2和表3是根据图9所示的功能电路图计算得到。其中，图9中的N effLane代表处于工作状态的发送逻辑通道的个数，N NewFECPayload代表当前所选择的FEC一个码字的负载部分所包含的64B/66B的个数，N standLane表示标准中定义的发送逻辑通道的个数，N standdis表示标准中定义的FEC码字的距离，N standFECPayload表示标准中定义的FEC一个码字的负载部分所包含的64B/66B的个数，C NewFECSymbol表示当前所选择的FEC一个码字所包含的编码符号的个数，mod表示求余。
作为另外一个示例，当第一通信设备的处于工作状态的发送逻辑通道的数量由M变为时，第二插入周期也可以等于第一插入周期。可选地，针对每一种可能的发送逻辑通道的个数，可以选择一个相同的插入周期，该插入周期可以满足在每一种可能的发送逻辑通道的个数下，均可以保证AM出现在一个FEC码字的开端。
具体地，该插入周期可以通过图10所示的功能电路图计算得到。其中，图10中的N effLane1～N effLaneM代表处于工作状态的发送逻辑通道的个数分别为1～M，C NewFECSymbol表示当前所选择的FEC一个码字所包含的编码符号的个数，mod表示求余，处理单元(processing element，PE)1～PE M表示处理单元1～处理单元M。
由于第一通信设备插入AM组的插入周期发生变化会导致AM组在串行数据流中的出 现周期发生变化，因此第二通信设备移除AM组的周期需与第一通信设备插入AM组的周期相对应，对于第一AM组使用第一移除周期，对于第二AM使用第二移除周期，从而避免第二通信设备最终获得的数据有误。具体地，第二通信设备按照第一移除周期，从所述第一目标数据中移出所述第一AM组；按照第二移除周期，从所述第二目标数据中移出所述第二AM组。
同样，第一移除周期可以为相邻两个第一AM组之间相隔的FEC码字的个数，可以为相邻两个第一AM组之间间隔的转码码块的个数，还可以是相邻两个第一AM组之间间隔的比特数等。同样，第二移除周期可以为相邻两个第二AM组之间相隔的FEC码字的个数，可以为相邻两个第二AM组之间间隔的转码码块的个数，还可以是相邻两个第二AM组之间间隔的比特数等。
可选地，所述第一移除周期与所述第二移除周期不同。第二移除周期的确定方式与第二插入周期的方式类似，只不过发送逻辑通道相应的变为接收逻辑通道，在此不再赘述。
AM组与发送逻辑通道对应的方式有很多种。作为一个示例，第一AM组包括M个AM，所述M个AM分别与M个发送逻辑通道一一对应，第二AM组包括N个AM，所述N个AM分别与N个发送逻辑通道一一对应。例如，M＝4，4个发送逻辑通道分别为通道0～通道3，N＝6，6个发送逻辑通道分别为通道0～通道5，那么第一AM组包括通道0～通道3的AM，第二AM组包括通道0～通道5的AM。
作为另外一个示例，第一AM组可以包括第一标识部分和第一填充部分，其中，第一标识部分包括M个AM，所述M个AM分别与M个发送逻辑通道一一对应。第二AM组可以包括第二标识部分和第二填充部分，第二标识部分包括N个AM，所述N个AM分别与N个发送逻辑通道一一对应。第一填充部分的比特数与第一标识部分的比特数之和为一个标准码块的大小的整数倍，第二填充部分的比特数与第二标识部分的比特数之和为所述标准码块的大小的整数倍。其中，标准码块为在第一通信设备采用的转码方式下的码块。例如，第一通信设备采用的转码方式为256B/257B的情况下，标准码块为257B。又例如，第一通信设备采用的转码方式为512B/513B的情况下，标准码块为513B。
可选地，第一填充部分的比特数与第一标识部分的比特数之和为一个标准码块的大小的最小整数倍，第二填充部分的比特数与第二标识部分的比特数之和为所述标准码块的大小的最小整数倍。
可选地，第一填充部分的比特数与第二填充部分的比特数不同。
可选地，M个和N个发送逻辑通道的AM可以为IEEE 802.3中规范的AM的格式。
AM组与接收逻辑通道对应的方式与AM组与发送逻辑通道对应的方式类似，在此不再赘述。
本申请实施例的第一标识部分的编码符号的顺序与第二标识部分的编码符号的顺序不同，其中，编码符号为在所述第一通信设备采用的纠错编码方式下的符号。影响AM组中编码符号的顺序的因素有多种。本申请实施例主要涉及AM组包括的AM的数量(或者说当前处于工作状态的发送逻辑通道的数量)、第一通信设备采用的数据分发方式以及第一通信设备采用的FEC的个数。只要上述三个因素中的任意一个发生变化，AM组的标识部分的编码符号的顺序都会发生变化。
作为一个示例，对于第一通信设备不进行FEC编码或者第一通信设备采用1个FEC， 且第一通信设备采用第一数据分发方式的情况，当AM组包括的AM的数量由M变为N的情况下，M个AM按照通道号从小到大的顺序依次为AM_i 0，AM_i 1，…，AM_i M-1，第一标识部分的第p*M+1个到第(p+2)*M个编码符号为：
{AM_i 0_p，AM_i 1_p，…，AM_i M-1_p，AM_i 0_p+1，AM_i 1_p+1，…，AM_i M-1_p+1}
N个发送逻辑通道的AM按照通道号从小到大的顺序依次为AM_i 0，AM_i 1，…，AM_i N-1，第二标识部分的第p*N+1个到第(p+2)*N个编码符号为：
{AM_i 0_p，AM_i 1_p，…，AM_i N-1_p，AM_i 0_p+1，AM_i 1_p+1，…，AM_i N-1_p+1}
其中，p+1为小于或者等于Q-1的非负整数，Q为一个AM所包括的编码符号的数量，第一数据分发方式为以编码符号为单位，按照0，1，…，R-1，0，1，…，R-1，0，1，…，R-1，…的顺序向R个发送逻辑通道分发目标数据，得到R个并行数据流，0，1，…，R-1表示R个发送逻辑通道的通道号。
作为另一个示例，对于第一通信设备采用2个FEC，且第一通信设备采用第二数据分发方式，且AM组包括的AM的数量由M变为N的情况下，M个发送逻辑通道的AM按照通道号从小到大的顺序依次为AM_i 0，AM_i 1，…，AM_i M-1，第一标识部分的第2p*M+1个到第(2p+2)*M个编码符号为：
{AM_i 0_2p，AM_i 1_2p，…，AM_i M-2_2p，AM_i M-1_2p，AM_i 1_2p+1，AM_i 0_2p+1，…，AM_i M-1_2p+1，AM_i M-2_2p+1}
N个发送逻辑通道的AM按照通道号从小到大的顺序依次为AM_i 0，AM_i 1，…，AM_i N-1，第二标识部分的第2p*N+1个到第(2p+2)*N个编码符号为：
{AM_i 0_2p，AM_i 1_2p，…，AM_i N-2_2p，AM_i N-1_2p，AM_i 1_2p+1，AM_i 0_2p+1，…，AM_i N-1_2p+1，AM_i N-2_2p+1}
其中，2p+1为小于或者等于Q-1的非负整数，Q为一个AM所包括的分发符号的数量，第二数据分发方式为以所述编码符号为单位，按照A，B，A，B，…的顺序将所述目标数据转换为2个并行数据流，所述A，B表示从第A个数据流和第B个数据流，继续以所述编码符号为单位，按照A，B，A，B，A，B，…的顺序依次向R个发送逻辑通道分发一次，再按照B，A，B，A，B，A，…的顺序依次向R个发送逻辑通道分发一次，再按照A，B，A，B，A，B，…的顺序依次向R个发送逻辑通道分发一次，以此类推。
作为另一个示例，对于第一通信设备采用3个FEC，且第一通信设备采用第三数据分发方式，且AM组包括的AM的数量由M变为N的情况下，M个发送逻辑通道的AM按照通道号从小到大的顺序依次为AM_i 0，AM_i 1，…，AM_i M-1，第一标识部分的第3p*M+1个到第(3p+3)*M个编码符号为：
{AM_i 0_3p，AM_i 1_3p，AM_i 2_3p，…，AM_i M-3_3p，AM_i M-2_3p，AM_i M-1_3p，AM_i 1_3p+1，AM_i 2_3p+1，AM_i 0_3p+1，…，AM_i M-2_3p+1，AM_i M-1_3p+1，AM_i M-3_3p+1，AM_i 2_3p+2，AM_i 0_3p+2，AM_i 1_3p+2，…，AM_i M-1_3p+2，AM_i M-3_3p+2，AM_i M-2_3p+2}
N个发送逻辑通道的AM按照通道号从小到大的顺序依次为AM_i 0，AM_i 1，…，AM_i N-1，第二标识部分的第3p*N+1个到第(3p+3)*N个编码符号为：
{AM_i 0_3p，AM_i 1_3p，AM_i 2_3p，…，AM_i N-3_3p，AM_i N-2_3p，AM_i N-1_3p， AM_i 1_3p+1，AM_i 2_3p+1，AM_i 0_3p+1，…，AM_i N-2_3p+1，AM_i N-1_3p+1，AM_i N-3_3p+1，AM_i 2_3p+2，AM_i 0_3p+2，AM_i 1_3p+2，…，AM_i N-1_3p+2，AM_i N-3_3p+2，AM_i N-2_3p+2}
其中，3p+2为小于或者等于Q-1的非负整数，Q为一个AM所包括的分发符号的数量，第三数据分发方式为以所述编码符号为单位，按照A，B，C，A，B，C，A，B，C，…的顺序将所述目标数据转换为3个并行数据流，所述A，B，C表示从第A个数据流、第B个数据流、第C个数据流，继续以所述编码符号为单位，按照A，B，C，A，B，C，A，B，C，…的顺序依次向R个发送逻辑通道分发一次，再按照B，C，A，B，C，A，B，C，A，…的顺序依次向R个发送逻辑通道分发一次，再按照C，A，B，C，A，B，C，A，B，…的顺序依次向R个发送逻辑通道分发一次，以此类推。
作为另一个示例，对于第一通信设备采用4个FEC，且第一通信设备采用第四数据分发方式，且AM组包括的AM的数量由M变为N的情况下，M个发送逻辑通道的AM按照通道号从小到大的顺序依次为AM_i 0，AM_i 1，…，AM_i M-1，第一标识部分的第3p*M+1个到第(3p+3)*M个编码符号为：
{AM_i 0_4p，AM_i 1_4p，AM_i 2_4p，AM_i 3_4p，…,AM_i M-4_4p，AM_i M-3_4p，AM_i M-2_4p，AM_i M-1_4p，AM_i 1_4p+1，AM_i 2_4p+1，AM_i 3_4p+1，AM_i 0_4p+1，…，AM_i M-3_4p+1，AM_i M-2_4p+1，AM_i M-1_4p+1，AM_i M-4_4p+1,AM_i 2_4p+2，AM_i 3_4p+2，AM_i 0_4p+2，AM_i 1_4p+2，…，AM_i M-2_4p+2，AM_i M-1_4p+2，AM_i M-4_4p+2，AM_i M-3_4p+2,AM_i 3_4p+3，AM_i 0_4p+3，AM_i 1_4p+3，AM_i 2_4p+3，…，AM_i M-1_4p+3，AM_i M-4_4p+3，AM_i M-3_4p+3，AM_i M-2_4p+3}
N个发送逻辑通道的AM按照通道号从小到大的顺序依次为AM_i 0，AM_i 1，…，AM_i N-1，第二标识部分的第4p*N+1个到第(4p+4)*N个编码符号为：
{AM_i 0_4p，AM_i 1_4p，AM_i 2_4p，AM_i 3_4p，…,AM_i N-4_4p，AM_i N-3_4p，AM_i N-2_4p，AM_i N-1_4p，AM_i 1_4p+1，AM_i 2_4p+1，AM_i 3_4p+1，AM_i 0_4p+1，…，AM_i N-3_4p+1，AM_i N-2_4p+1，AM_i N-1_4p+1，AM_i N-4_4p+1,AM_i 2_4p+2，AM_i 3_4p+2，AM_i 0_4p+2，AM_i 1_4p+2，…，AM_i N-2_4p+2，AM_i N-1_4p+2，AM_i N-4_4p+2，AM_i N-3_4p+2,AM_i 3_4p+3，AM_i 0_4p+3，AM_i 1_4p+3，AM_i 2_4p+3，…，AM_i N-1_4p+3，AM_i N-4_4p+3，AM_i N-3_4p+3，AM_i N-2_4p+3}
其中，4p+3为小于或者等于Q-1的非负整数，Q为一个AM所包括的分发符号的数量，第四数据分发方式为以所述编码符号为单位，按照A，B，C，D，A，B，C，D，A，B，C，D，A，B，C，D，…的顺序将所述目标数据转换为4个并行数据流，所述A，B，C、D表示从第A个数据流、第B个数据流、第C个数据流、第D个数据流，继续以所述编码符号为单位，按照A，B，C，D，A，B，C，D，A，B，C，D，A，B，C，D，…的顺序依次向R个发送逻辑通道分发一次，再按照B，C，D，A，B，C，D，A，B，C，D，A，B，C，D，A，…的顺序依次向R个发送逻辑通道分发一次，再按照C，D，A，B，C，D，A，B，C，D，A，B，C，D，A，B，…的顺序依次向R个发送逻辑通道分发一次，再按照D，A，B，C，D，A，B，C，D，A，B，C，D，A，B，C，…的顺序依次向R个发送逻辑通道分发一次，以此类推。
作为另一个示例，在第一通信设备的处于工作状态的发送逻辑通道的数量由M变为N，第一通信设备采用的FEC的个数(以4个FEC变为2个FEC为例)也发生改变的情况，且第一通信设备采用的分发方式由第四数据分发方式变为第二数据分发方式的情况下，M个发送逻辑通道的AM按照通道号从小到大的顺序依次为AM_i 0，AM_i 1，…，AM_i M-1，第一标识部分的第4p*M+1个到第(4p+4)*M个编码符号为：
{AM_i 0_4p，AM_i 1_4p，AM_i 2_4p，AM_i 3_4p，…，AM_i M-4_4p，AM_i M-3_4p，AM_i M-2_4p，AM_i M-1_4p， AM_i 1_4p+1，AM_i 2_4p+1，AM_i 3_4p+1，AM_i 0_4p+1，…，AM_i M-3_4p+1，AM_i M-2_4p+1，AM_i M-1_4p+1，AM_i M-4_4p+1,AM_i 2_4p+2，AM_i 3_4p+2，AM_i 0_4p+2，AM_i 1_4p+2，…，AM_i M-2_4p+2，AM_i M-1_4p+2，AM_i M-4_4p+2，AM_i M-3_4p+2,AM_i 3_4p+3，AM_i 0_4p+3，AM_i 1_4p+3，AM_i 2_4p+3，…，AM_i M-1_4p+3，AM_i M-4_4p+3，AM_i M-3_4p+3，AM_i M-2_4p+3}
N个发送逻辑通道的AM按照通道号从小到大的顺序依次为AM_i 0，AM_i 1，…，AM_i N-1，第二标识部分的第2p*N+1个到第(2p+2)*N个编码符号为：
{AM_i 0_2p，AM_i 1_2p，…，AM_i N-2_2p，AM_i N-1_2p，AM_i 1_2p+1，AM_i 0_2p+1，…，AM_i N-1_2p+1，AM_i N-2_2p+1}
其中，4p+3为小于或者等于Q-1的非负整数，Q为一个AM所包括的分发符号的数量。
作为另一个示例，在第一通信设备的处于工作状态的发送逻辑通道的数量为M不变，第一通信设备采用的FEC的个数(以2个FEC变为4个FEC为例)发生改变的情况，且第一通信设备采用的分发方式由第二数据分发方式变为第四数据分发方式，M个发送逻辑通道的AM按照通道号从小到大的顺序依次为AM_i 0，AM_i 1，…，AM_i M-1，变化前，第一标识部分的第2p*M+1个到第(2p+2)*M个编码符号为：
{AM_i 0_2p，AM_i 1_2p，…，AM_i M-2_2p，AM_i M-1_2p，AM_i 1_2p+1，AM_i 0_2p+1，…，AM_i M-1_2p+1，AM_i M-2_2p+1}
变化后，第一标识部分的第4p*M+1个到第(4p+4)*M个编码符号为：
{AM_i 0_4p，AM_i 1_4p，AM_i 2_4p，AM_i 3_4p，…,AM_i M-4_4p，AM_i M-3_4p，AM_i M-2_4p，AM_i M-1_4p，AM_i 1_4p+1，AM_i 2_4p+1，AM_i 3_4p+1，AM_i 0_4p+1，…，AM_i M-3_4p+1，AM_i M-2_4p+1，AM_i M-1_4p+1，AM_i M-4_4p+1,AM_i 2_4p+2，AM_i 3_4p+2，AM_i 0_4p+2，AM_i 1_4p+2，…，AM_i M-2_4p+2，AM_i M-1_4p+2，AM_i M-4_4p+2，AM_i M-3_4p+2,AM_i 3_4p+3，AM_i 0_4p+3，AM_i 1_4p+3，AM_i 2_4p+3，…，AM_i M-1_4p+3，AM_i M-4_4p+3，AM_i M-3_4p+3，AM_i M-2_4p+3}
其中，4p+3为小于或者等于Q-1的非负整数，Q为一个AM所包括的分发符号的数量。
应理解，上述各示例并未列出全部可能的情况。第一通信设备采用的FEC的数量可以更多，例如，采用8个FEC、16个FEC等；第一通信设备采用的FEC的数量可以由少变多，也可以由多变少；第一通信设备可以采用其他的数据分发方式，相应AM组的编码符号的顺序也做相应调整，例如对于采用4个FEC的情况，数据分发方式还可以是A，B，C，D，A，B，C，D，A，B，C，D，A，B，C，D，…。
下面对本申请实施例的AM组的具体映射流程进行详细描述。
图11是第一通信设备码块分发的示意图。如图11所示，控制单元可以生成处于工作状态的发送逻辑通道的配置信息，处于工作状态的发送逻辑通道的配置信息可以简称PCSLC，例如，PCSLC为[1,1,1,1,0,0,0,0]则表示8个发送逻辑通道中的通道0～通道3处于工作状态，而通道4～通道7处于非工作状态。AM组调整单元可以根据PCSLC进行AM组的映射与插入。可以理解地，第二通信设备中也包括控制单元，且功能与第一通信设备的控制单元功能相同，在此不再赘述。AM组的具体映射流程如下。
1)根据第一通信设备的控制单元生成的处于工作状态的发送逻辑通道的配置信息，确定处于工作状态的发送逻辑通道的个数Y，并取出每个处于工作状态的发送逻辑通道的AM。
2)根据本地的串行数据流向发送逻辑通道进行分发的规则，由1)中获得的Y个AM 构造映射后的AM组。具体地，
a.根据第一通信设备选取的FEC编码方式，确定编码符号symbol的大小N sym；
b.初始化AM组的映射：
b1.以N sym为单位，将Y个AM中的每一个均划分为(F+1)个编码符号，并将Y个AM按照发送逻辑通道的通道号从小到大排列为AM_i 0，AM_i 1，…，AM_i Y-1，其中，i 0<i 1<…i Y-1，即AM_i 0＝(AM_i 0_0，AM_i 0_1，…，AM_i 0_F)，AM_i 1＝(AM_i 1_0，AM_i 1_1，…，AM_i 1_F)，…，AM_i Y-1＝(AM_i Y-1_0，AM_i Y-1_1，…，AM_i Y-1_F)；
b2.依次取AM_i j的第k个编码符号，构成一列GColumn k＝(AM_i 0_k，AM_i 1_k，…，AM_i Y-1_k)，共(F+1)个GColumn，其中，i 0≤j≤…i Y-1，0≤k≤F；
c.根据使用的编码符号分发功能(symbol distribution function)的个数(即分发次数)，以及分发原则，进行AM组的调整：
c1.如果使用1个symbol distribution function，即将一个串行流变成Y个并行数据流，分发规则为0，1，2，3，…Y-1，0，1，2，3，…Y-1，…，则GColumn k保持不变；
c2.如果使用2个symbol distribution function，第1个symbol distribution function将一个串行数据流变成Y1个并行流，第2个symbol distribution function将Y1个并行数据流变成Y个并行数据流，则：
c21.第2个symbol distribution function分发原则为：
第一次分发：0，1，2，3，…Y1-1，0，1，2，3，…Y1-1，0，1，2，3，…Y1-1，…
第二次分发：0，1，2，3，…Y1-1，0，1，2，3，…Y1-1，0，1，2，3，…Y1-1，…
第三次分发：0，1，2，3，…Y1-1，0，1，2，3，…Y1-1，0，1，2，3，…Y1-1，…
此时，GColumn k保持不变；
c22.第2个symbol distribution function分发原则为：
第一次分发：0，1，2，3，…Y1-1，0，1，2，3，…Y1-1，0，1，2，3，…Y1-1，…
第二次分发：Y1-1，…，3，2，1，0，Y1-1，…，3，2，1，0，Y1-1，…，3，2，1，0，…
第三次分发：0，1，2，3，…Y1-1，0，1，2，3，…Y1-1，0，1，2，3，…Y1-1，…
当mod(Y，Y1)＝0时，将下标为奇数的GColumn k的编码符号进行如下处理：以Y1为单位，将第1个编码符号与第Y个编码符号交换，第2个编码符号与第Y-1个编码符号交换，依次类推，如图12所示；
当mod(Y，Y1)≠0且Y1＝2时，GColumn k保持不变；
3)根据第一通信设备采用的转码方式或者称转码类型，在AM组中添加填充部分(padding)，使得映射的AM组是标准码块的大小的的最小整数倍，输出的AM组为：
<GColumn 0，GColumn 1，GColumn 2，…，GColumn F，padding>；
其中，标准码块为在第一通信设备采用的转码方式下的码块。例如，第一通信设备采用的转码方式为256B/257B的情况下，标准码块为257B。又例如，第一通信设备采用的转码方式为512B/513B的情况下，标准码块为513B；
需要说明的是，对于可能包括状态域字段的以太网技术(例如，200G、400G以太网技术)，这些状态域字段在本申请实施例中也是属于padding的一部分；
4)根据处于工作状态的发送逻辑通道的数量、以及FEC编码方式，计算AM组的插 入周期，并以该插入周期插入映射得到的AM组。具体的计算方式可参见图9和图10，在此不再赘述。
应理解，图11和图12为示例性的，仅为方便理解本申请实施例的技术方案，当第一通信设备采用的FEC数量以及数据分发方式发生变化时，AM组同样需要做相应调整。
相应地，第二通信设备根据第二通信设备的控制单元生成的接收逻辑通道的配置信息PSCLC，确定处于工作状态的接收逻辑通道；按照检测周期，在处于工作状态的接收逻辑通道上进行AM检测、锁定与对齐、重排序和解交织等处理，得到Y1路并行数据流，Y1路并行数据流经过解码和交织得到包括AM组的串行数据，进一步按照移除周期从串行数据中移除AM组，得到第一通信设备实际传输的数据。其中，移除周期的具体计算方式可参见图9和图10，在此不再赘述。
下面结合具体的例子，对本申请实施例的技术方案进行更详细的描述。
实例一，在200G以太网中，所选择的FEC为里德-所罗门向前纠错码(Reed-Solomon forward error correction，RS-FEC)(544，514，10，15)，转码方式为256B/257B，使用2路FEC码字。RS-FEC子层在串行数据流中插入AM组。当进行FEC编码后，以10-Bit的编码符号依次分发到8个发送逻辑通道上。如图13所示，第一通信设备和第二通信设备均有2个物理通道出现故障，对应的处于工作状态的逻辑通道的数量由8个变化为4个，AM组也需要相应改变。
通道故障前，8个发送逻辑通道都处于工作状态，以10-bit为单位，分别将8个发送逻辑通道的AM，即AM_0，AM_1，AM_2，AM_3，AM_4，AM_5，AM_6，AM_7，划分为12个编码符号。由于转码方式为256B/257B转码，使得((L_padding+(11+1)×10×8))mod 257＝0的最小L_padding为68，因此需要添加的padding长度为68bit。此时映射的AM组如图14所示，插入周期为4096个FEC码字。
通道出现故障后，第一通信设备的控制单元生成的PCSLC＝[00001111]，发送逻辑通道4～7处于工作状态。以10-bit为单位，分别将4个发送逻辑通道的AM，即AM_4，AM_5，AM_6，AM_7，划分为12个编码符号。由于mod(4，2)＝0，因此，调整GColumn 1、GColumn 3、GColumn 5、GColumn 7、GColumn 9、GColumn 11，具体地，以2为单位，将GColumn k第1个编码符号与第2个编码符号交换，第3个编码符号与第4个编码符号交换，k＝1，3，5，7，9，11。由于转码方式为256B/257B转码，使得((L_padding+(11+1)×10×4))mod 257＝0的最小L_padding为34，因此需要添加的padding长度为34bit。此时映射的AM组如图15所示，插入周期为2048个FEC码字。
相应地，第二通信设备根据第二通信设备的控制单元生成的接收逻辑通道的配置信息PSCLC，确定处于工作状态的接收逻辑通道为4～7。计算得到AM组移除周期为2048。
在高速以太网链路中，当部分物理通道失效时，按照上述技术方案，将与失效的物理通道对应的逻辑通道排除在外，发送端然后重新进行AM的映射，并按照新的插入周期进行插入，第二通信设备就可以正常进行AM的锁定与对齐，有效保证码块的收发流程不受影响。
实例二，如图13所示，在200G以太网中，所选择的FEC为RS-FEC(544，514，10，15)，转码方式为256B/257B，使用2路FEC码字。RS-FEC子层在串行数据流中插入AM组。当进行FEC编码后，以10-Bit的编码符号依次分发到4个发送逻辑通道上。
如果第一通信设备选择的FEC为RS-FEC(372，342，12，15)，转码方式为512B/513B， AM组也需要相应改变。具体地，第一通信设备的控制单元生成的PCSLC＝[00001111]，发送逻辑通道4～7处于工作状态。以12-bit为单位，分别将4个发送逻辑通道的AM，即AM_4，AM_5，AM_6，AM_7，划分为10个编码符号。由于转码方式为512B/513B转码，使得((L_padding+(9+1)×12×4))mod 513＝0的最小L_padding为33，因此需要添加的padding长度为33bit。此时映射的AM组如图16所示，插入周期为2560个FEC码字。
相应地，第二通信设备根据第二通信设备的控制单元生成的接收逻辑通道的配置信息PSCLC，确定处于工作状态的接收逻辑通道为4～7。计算得到AM组移除周期为2560。
考虑200G高速以太网中，当第一通信设备使用的RS-FEC为RS(372，342，12，15)，转码方式为512B/513B，第一通信设备只要按照上述技术方案重新进行AM的映射，并按照新的插入周期插入AM组，第二通信设备就可以正常进行AM的锁定与对齐，有效保证码块的收发流程不受影响。
实例三，在200G以太网中，所选择的FEC为RS-FEC(544，514，10，15)，转码方式为256B/257B，使用2路FEC码字。RS-FEC子层在串行数据流中插入AM组。当进行FEC编码后，以10-Bit的编码符号依次分发到8个发送逻辑通道上。如图17所示，第一通信设备和第二通信设备2个故障物理通道中的一个通道的故障消失，对应的处于工作状态的逻辑通道的数量由4个变化为6个，AM组也需要相应改变。
通道故障消失前，即处于工作状态的逻辑通道的数量为4时，可参考实例一的相关描述，在此不再赘述。
通道故障消失后，第一通信设备的控制单元生成的PCSLC＝[00111111]，发送逻辑通道2～7处于工作状态。以10-bit为单位，分别将6个发送逻辑通道的AM，即AM_2，AM_3，AM_4，AM_5，AM_6，AM_7，划分为12个编码符号。由于转码方式为256B/257B转码，使得((L_padding+(11+1)×10×6))mod 257＝0的最小L_padding为51，因此需要添加的padding长度为51bit。此时映射的AM组如图18所示，插入周期为3072个FEC码字。
相应地，第二通信设备根据第二通信设备的控制单元生成的接收逻辑通道的配置信息PSCLC，确定处于工作状态的接收逻辑通道为2～7。计算得到AM组的移除周期为3072。
考虑200G高速以太网中，当2个故障的物理通道中有1个物理通道故障消失后，第一通信设备然后重新进行AM的映射，并按照新的插入周期插入AM组，第二通信设备就可以正常进行AM的锁定与对齐，有效保证码块的收发流程不受影响。
实例四，在400G以太网中，所选择的FEC为RS-FEC(544，514，10，15)，转码方式为256B/257B，使用2路FEC码字。RS-FEC子层在串行数据流中插入AM组。当进行FEC编码后，以10-Bit的编码符号依次分发到16个发送逻辑通道上。如图19所示，第一通信设备和第二通信设备均有2个物理通道出现故障，对应的处于工作状态的逻辑通道的数量由16个变化为12个，AM组也需要相应改变。
通道故障前，16个发送逻辑通道都处于工作状态，以10-bit为单位，分别将16个发送逻辑通道的AM，即AM_0，AM_1，…，AM_15，划分为12个编码符号。由于转码方式为256B/257B转码，使得((L_padding+(11+1)×10×16))mod 257＝0的最小L_padding为136，因此需要添加的padding长度为136bit。此时映射的AM组如图20所示，插入周期为8192个FEC码字。
通道出现故障后，第一通信设备的控制单元生成的PCSLC＝[0000111111111111]，发送逻辑通道4～15处于工作状态。以10-bit为单位，分别将12个发送逻辑通道的AM，即AM_4，AM_5，…，AM_15，划分为12个编码符号。由于转码方式为256B/257B转码，使得((L_padding+(11+1)×10×12))mod 257＝0的最小L_padding为102，因此需要添加的padding长度为102bit。此时映射的AM组如图21所示，插入周期为6144个FEC码字。
相应地，第二通信设备根据第二通信设备的控制单元生成的接收逻辑通道的配置信息PSCLC，确定处于工作状态的接收逻辑通道为4～15。计算得到AM组的移除周期为6144。
在高速以太网链路中，当部分物理通道失效时，按照上述技术方案，将与失效的物理通道对应的逻辑通道排除在外，发送端然后重新进行AM的映射，并按照新的插入周期进行插入，第二通信设备就可以正常进行AM的锁定与对齐，有效保证码块的收发流程不受影响。
实例五，在200G以太网中，所选择的FEC为RS-FEC(544，514，10，15)，转码方式为256B/257B，使用4路FEC码字。RS-FEC子层在串行数据流中插入AM组。当进行FEC编码后，以10-Bit的编码符号，依次分发到8个发送逻辑通道上，如图22所示。
第一通信设备的控制单元生成的PCSLC＝[11111111]，发送逻辑通道0～7处于工作状态。以10-bit为单位，分别将8个发送逻辑通道的AM，即AM_0，AM_1，…，AM_7，划分为12个编码符号。由于转码方式为256B/257B转码，使得((L_padding+(11+1)×10×8))mod 257＝0的最小L_padding为68，因此需要添加的padding长度为68bit。插入周期为4096个FEC码字。
当第一通信设备按照A，B，C，D，A，B，C，D，D，C，B，A，D，C，B，A，A，B，C，D，A，B，C，D，…的顺序，将FEC编码后的4路并行数据流依次分发到8个发送逻辑通道上时，此时映射的AM组如图23所示。
当第一通信设备按照A，B，C，D，A，B，C，D，B，C，D，A，B，C，D，A，C，D，A，B，C，D，A，B，D，A，B，C，D，A，B，C，…的顺序，将FEC编码后的4路并行数据流依次分发到8个发送逻辑通道上时，此时映射的AM组如图24所示。图24中仅示出了AM组的前4*8个编码符号，后续的编码符号的排序可参考前4*8个编码符号的排序。
相应地，第二通信设备根据第二通信设备的控制单元生成的接收逻辑通道的配置信息PSCLC，确定处于工作状态的接收逻辑通道为0～7。计算得到AM组的移除周期为4096。
实例六，在200G以太网中，所选择的FEC为RS-FEC(544，514，10，15)，转码方式为256B/257B。RS-FEC子层在串行数据流中插入AM组。当进行FEC编码后，以10-Bit的编码符号依次分发到8个发送逻辑通道上。如图13所示，第一通信设备和第二通信设备均有2个物理通道出现故障，对应的处于工作状态的逻辑通道的数量由8个变化为4个，由于发送逻辑通道和接收逻辑通道减少，第一通信设备和第二通信设备可以从4路FEC码字切换到2路FEC码字。变化前，第一通信设备的处理流程可参见图22的相关描述；变化后，第一通信设备的处理流程可参见图13的相关描述，在此不再赘述。
考虑到200G高速以太网在编码符号分发过程中使用4路FEC码字，当发送逻辑通道个数减少，FEC码字也减少时，第一通信设备只要按上述技术方案重新进行AM组的映射，并按照新的插入周期插入AM组，第二通信设备就可以正常进行AM的锁定与对齐，有效保证码块的收发流程不受影响。
实例七，在200G以太网中，所选择的FEC为RS-FEC(544，514，10，15)，转码方式为256B/257B。RS-FEC子层在串行数据流中插入AM组。当进行FEC编码后，以10-Bit的编码符号依次分发到8个发送逻辑通道上。第一通信设备和第二通信设备的2个故障的物理通道恢复正常，由于发送逻辑通道和接收逻辑通道增加，第一通信设备和第二通信设备可以从2路FEC码字切换到4路FEC码字。变化前，第一通信设备的处理流程可参见图13的相关描述；变化后，第一通信设备的处理流程可参见图22的相关描述，在此不再赘述。
实例八，在100G以太网中，所选择的FEC为RS-FEC(544，514，10，15)，转码方式为256B/257B，使用1路FEC码字。RS-FEC子层在串行数据流中插入AM组。当进行FEC编码后，以10-Bit的编码符号依次分发到4个发送逻辑通道上。如图25所示，第一通信设备和第二通信设备均有2个物理通道出现故障，对应的处于工作状态的FEC通道的数量由4个变化为2个，AM组也需要相应改变。
通道故障前，4个发送逻辑通道都处于工作状态，每一个FEC通道的AMFEC为AMFEC_0＝<AM_0，AM_4，AM_8，AM_12，AM_16>，AMFEC_1＝<AM_1，AM_5，AM_9，AM_13，AM_17>，AMFEC_2＝<AM_2，AM_6，AM_10，AM_14，AM_18>，AMFEC_3＝<AM_3，AM_7，AM_11，AM_15，AM_19>。以10-bit为单位，分别将4个发送逻辑通道的AMFEC，划分为32个编码符号。由于转码方式为256B/257B转码，使得((L_padding+(31+1)×10×4))mod 257＝0的最小L_padding为5，因此需要添加的padding长度为5bit。此时映射的AM组如图26所示，插入周期为4096个FEC码字。
通道出现故障后，第一通信设备的控制单元生成的PCSLC＝[0011]，FEC逻辑通道2和3处于工作状态。以10-bit为单位，分别将2个FEC逻辑通道的AMFEC，即AMFEC_2和AMFEC_3划分为32个编码符号。由于转码方式为256B/257B转码，使得((L_padding+(11+1)×10×2))mod 257＝0的最小L_padding为131，因此需要添加的padding长度为131bit。此时映射的AM组如图27所示，插入周期为2048个FEC码字。
相应地，第二通信设备根据第二通信设备的控制单元生成的接收逻辑通道的配置信息PSCLC，确定处于工作状态的接收逻辑通道为2和3。计算得到AM组的移除周期为2048。
考虑到100G高速以太网在编码符号分发过程中使用1路FEC码字(codeword)，第一通信设备只要按上述技术方案重新进行AM组的映射，并按照新的插入周期插入AM组，第二通信设备就可以正常进行AM的锁定与对齐，有效保证码块的收发流程不受影响。
下面结合图28至图31对本申请的装置实施例进行描述。
图28是本申请实施例的通信设备的示意性结构图。图28所示的通信设备2800可以对应于上文的第一通信设备，如图28所示，通信设备2800包括处理模块2830、发送模块2820。
处理模块2830，用于在第一待发送数据中插入第一对齐标识符AM组，得到第一目标数据，所述第一AM组与M个发送逻辑通道对应，M为正整数。
发送模块2820，用于在所述M个发送逻辑通道上，向第二通信设备发送所述第一目标数据。
在所述第一通信设备的处于工作状态的发送逻辑通道的数量由M变为N的情况下，所述处理模块2830，还用于在第二待发送数据中插入第二AM组，得到第二目标数据， 所述第二AM组与N个发送逻辑通道对应，N为正整数，且N与M不同。
所述发送模块2820，还用于在所述N个发送逻辑通道上，向第二通信设备发送所述第二目标数据。
可选地，所述处理模块2830，具体用于按照第一插入周期，将所述第一AM组插入所述第一待发送数据中；所述处理模块2830，具体还用于按照第二插入周期，将所述第二AM组插入所述第二待发送数据中。
可选地，所述第一插入周期与所述第二插入周期不同。
可选地，所述第一AM组包括第一标识部分，所述第一标识部分包括M个AM，所述M个AM与所述M个发送逻辑通道一一对应；所述第二AM组包括第二标识部分，所述第二标识部分包括N个AM，所述N个AM与所述N个发送逻辑通道一一对应。
可选地，所述第一标识部分的编码符号的顺序与第二标识部分的编码符号的顺序不同，所述编码符号为在所述第一通信设备采用的纠错编码方式下的符号。
可选地，所述M个发送逻辑通道的AM按照通道号从小到大的顺序依次为AM_i 0，AM_i 1，…，AM_i M-1；
所述第一标识部分的第p*M+1个到第(p+2)*M个编码符号为：
{AM_i 0_p，AM_i 1_p，…，AM_i M-1_p，AM_i 0_p+1，AM_i 1_p+1，…，AM_i M-1_p+1}
或者，所述第一标识部分的第2p*M+1个到第(2p+2)*M个编码符号为：
{AM_i 0_2p，AM_i 1_2p，…，AM_i M-2_2p，AM_i M-1_2p，AM_i 1_2p+1，AM_i 0_2p+1，…，AM_i M-1_2p+1，AM_i M-2_2p+1}
或者，所述第一标识部分的第3p*M+1个到第(3p+3)*M个编码符号为：
{AM_i 0_3p，AM_i 1_3p，AM_i 2_3p，…，AM_i M-3_3p，AM_i M-2_3p，AM_i M-1_3p，AM_i 1_3p+1，AM_i 2_3p+1，AM_i 0_3p+1，…，AM_i M-2_3p+1，AM_i M-1_3p+1，AM_i M-3_3p+1，AM_i 2_3p+2，AM_i 0_3p+2，AM_i 1_3p+2，…，AM_i M-1_3p+2，AM_i M-3_3p+2，AM_i M-2_3p+2}
或者，所述第一标识部分的第4p*M+1个到第(4p+4)*M个编码符号为：
{AM_i 0_4p，AM_i 1_4p，AM_i 2_4p，AM_i 3_4p，…,AM_i M-4_4p，AM_i M-3_4p，AM_i M-2_4p，AM_i M-1_4p，AM_i 1_4p+1，AM_i 2_4p+1，AM_i 3_4p+1，AM_i 0_4p+1，…，AM_i M-3_4p+1，AM_i M-2_4p+1，AM_i M-1_4p+1，AM_i M-4_4p+1,AM_i 2_4p+2，AM_i 3_4p+2，AM_i 0_4p+2，AM_i 1_4p+2，…，AM_i M-2_4p+2，AM_i M-1_4p+2，AM_i M-4_4p+2，AM_i M-3_4p+2,AM_i 3_4p+3，AM_i 0_4p+3，AM_i 1_4p+3，AM_i 2_4p+3，…，AM_i M-1_4p+3，AM_i M-4_4p+3，AM_i M-3_4p+3，AM_i M-2_4p+3}
其中，p为非负整数，4p+3为小于或者等于Q-1的非负整数，Q为一个AM所包括的编码符号的数量。
可选地，所述N个发送逻辑通道的AM按照通道号从小到大的顺序依次为AM_i 0，AM_i 1，…，AM_i N-1；
所述第二标识部分的第p*N+1个到第(p+2)*N个编码符号为：
{AM_i 0_p，AM_i 1_p，…，AM_i N-1_p，AM_i 0_p+1，AM_i 1_p+1，…，AM_i N-1_p+1}
或者，所述第二标识部分的第2p*N+1个到第(2p+2)*N个编码符号为：
{AM_i 0_2p，AM_i 1_2p，…，AM_i N-2_2p，AM_i N-1_2p，AM_i 1_2p+1，AM_i 0_2p+1，…，AM_i N-1_2p+1，AM_i N-2_2p+1}
或者，所述第二标识部分的第3p*N+1个到第(3p+3)*N个编码符号为：
{AM_i 0_3p，AM_i 1_3p，AM_i 2_3p，…，AM_i N-3_3p，AM_i N-2_3p，AM_i N-1_3p，AM_i 1_3p+1，AM_i 2_3p+1，AM_i 0_3p+1，…，AM_i N-2_3p+1，AM_i N-1_3p+1，AM_i N-3_3p+1，AM_i 2_3p+2，AM_i 0_3p+2，AM_i 1_3p+2，…，AM_i N-1_3p+2，AM_i N-3_3p+2，AM_i N-2_3p+2}
或者，所述第二标识部分的第4p*N+1个到第(4p+4)*N个编码符号为：
{AM_i 0_4p，AM_i 1_4p，AM_i 2_4p，AM_i 3_4p，…,AM_i N-4_4p，AM_i N-3_4p，AM_i N-2_4p，AM_i N-1_4p，AM_i 1_4p+1，AM_i 2_4p+1，AM_i 3_4p+1，AM_i 0_4p+1，…，AM_i N-3_4p+1，AM_i N-2_4p+1，AM_i N-1_4p+1，AM_i N-4_4p+1,AM_i 2_4p+2，AM_i 3_4p+2，AM_i 0_4p+2，AM_i 1_4p+2，…，AM_i N-2_4p+2，AM_i N-1_4p+2，AM_i N-4_4p+2，AM_i N-3_4p+2,AM_i 3_4p+3，AM_i 0_4p+3，AM_i 1_4p+3，AM_i 2_4p+3，…，AM_i N-1_4p+3，AM_i N-4_4p+3，AM_i N-3_4p+3，AM_i N-2_4p+3}
其中，p为非负整数，4p+3为小于或者等于Q-1的非负整数，Q为一个AM所包括的编码符号的数量。
可选地，所述第一AM组还包括第一填充部分，所述第一填充部分的比特数与所述第一标识部分的比特数之和为一个标准码块的大小的整数倍，所述标准码块为在所述第一通信设备采用的转码方式下的码块；所述第二AM组还包括第二填充部分，所述第二填充部分的比特数与所述第二标识部分的比特数之和为所述标准码块的大小的整数倍；其中，所述第一填充部分的比特数与所述第二填充部分的比特数不同。
可选地，M大于N，所述处理模块，还用于在满足第一目标条件的情况下，所述控制所述M个发送逻辑通道中的第一发送逻辑通道退出工作状态，所述第一目标条件为以下条件中的至少一个：
所述第一发送逻辑通道故障；
所述第一发送逻辑通道对应的物理通道故障；
与所述第一发送逻辑通道对应于同一物理通道的发送逻辑通道故障；
所述第二通信设备中与所述第一发送逻辑通道对应的第一接收逻辑通道故障；
所述第二通信设备中与所述第一接收逻辑通道对应的物理通道故障；
所述第二通信设备中与所述第一接收逻辑通道对应于同一物理通道的接收逻辑通道故障；
所述M个发送逻辑通道的数据流量低于预设流量值；
所述第一通信设备接收到第一指令，所述第一指令用于指示所述处理模块2830控制所述第一发送逻辑通道退出工作状态。
可选地，M小于N，所述处理模块，还用于在满足第二目标条件的情况下，控制所述M个发送逻辑通道以外的第二发送逻辑通道恢复工作状态，所述第二目标条件为以下条件中的至少一个：
所述第二发送逻辑通道的故障消除；
所述第二发送逻辑通道对应的物理通道的故障消除；
与所述第二发送逻辑通道对应于同一物理通道的发送逻辑通道的故障消除；
所述第二通信设备中与所述第二发送逻辑通道对应的第二接收逻辑通道的故障消除；
所述第二通信设备中与所述第二接收逻辑通道对应的物理通道的故障消除；
所述第二通信设备中与所述第二接收逻辑通道对应于同一物理通道的接收逻辑通道的故障消除；
且所述M个发送逻辑通道的数据流量高于预设流量值；
所述第一通信设备接收到第二指令，所述第二指令用于指示所述处理模块2830控制所述第二发送逻辑通道恢复工作状态。
发送模块2820可以由收发器实现。处理模块2830可以由处理器实现。发送模块2820、和处理模块2830的具体功能和有益效果可以参见图8所示的方法的相关描述，在此就不再赘述。
图29是本申请另一实施例的通信设备的示意性结构图。图29所示的通信设备2900可以对应于上文的第二通信设备，如图29所示，通信设备2900包括接收模块2910和处理模块2930。
接收模块2910，用于在M个接收逻辑通道上接收第一通信设备发送的第一目标数据，所述第一目标数据包括第一AM组，所述第一AM组与所述M个接收逻辑通道对应，M为正整数。
处理模块2930，用于从所述第一目标数据中移出所述第一AM组。
在所述第二通信设备的处于工作状态的接收逻辑通道的数量由M变为N的情况下，所述接收模块2910，还用于在N个接收逻辑通道上接收第一通信设备发送的第二目标数据，所述第二目标数据包括第二AM组，所述第二AM组与所述N个接收逻辑通道对应，N为正整数，且N与M不同。
所述处理模块2930，还用于从所述第二目标数据中移除所述第二AM组。
可选地，所述处理模块2930，具体用于按照第一移除周期，从所述第一目标数据中移出所述第一AM组；所述处理模块2930，具体还用于所述第二通信设备按照第二移除周期，从所述第二目标数据中移出所述第二AM组。
可选地，所述第一移除周期与所述第二移除周期不同。
可选地，所述第一AM组包括第一标识部分，所述第一标识部分包括M个AM，所述M个AM与所述M个接收逻辑通道一一对应；所述第二AM组包括第二标识部分，所述第二标识部分包括N个AM，所述N个AM与所述N个接收逻辑通道一一对应。
可选地，所述第一标识部分的编码符号的顺序与第二标识部分的编码符号的顺序不同，所述编码符号为在所述第二通信设备采用的纠错编码方式下的符号。
可选地，所述M个接收逻辑通道的AM按照通道号从小到大的顺序依次为AM_i 0，AM_i 1，…，AM_i M-1；
所述第一标识部分的第p*M+1个到第(p+2)*M个编码符号为：
{AM_i 0_p，AM_i 1_p，…，AM_i M-1_p，AM_i 0_p+1，AM_i 1_p+1，…，AM_i M-1_p+1}
或者，所述第一标识部分的第2p*M+1个到第(2p+2)*M个编码符号为：
{AM_i 0_2p，AM_i 1_2p，…，AM_i M-2_2p，AM_i M-1_2p，AM_i 1_2p+1，AM_i 0_2p+1，…，AM_i M-1_2p+1，AM_i M-2_2p+1}
或者，所述第一标识部分的第3p*M+1个到第(3p+3)*M个编码符号为：
{AM_i 0_3p，AM_i 1_3p，AM_i 2_3p，…，AM_i M-3_3p，AM_i M-2_3p，AM_i M-1_3p，AM_i 1_3p+1，AM_i 2_3p+1，AM_i 0_3p+1，…，AM_i M-2_3p+1，AM_i M-1_3p+1，AM_i M-3_3p+1，AM_i 2_3p+2，AM_i 0_3p+2，AM_i 1_3p+2，…，AM_i M-1_3p+2，AM_i M-3_3p+2，AM_i M-2_3p+2}
或者，所述第一标识部分的第4p*M+1个到第(4p+4)*M个编码符号为：
{AM_i 0_4p，AM_i 1_4p，AM_i 2_4p，AM_i 3_4p，…,AM_i M-4_4p，AM_i M-3_4p，AM_i M-2_4p，AM_i M-1_4p，AM_i 1_4p+1，AM_i 2_4p+1，AM_i 3_4p+1，AM_i 0_4p+1，…，AM_i M-3_4p+1，AM_i M-2_4p+1，AM_i M-1_4p+1，AM_i M-4_4p+1,AM_i 2_4p+2，AM_i 3_4p+2，AM_i 0_4p+2，AM_i 1_4p+2，…，AM_i M-2_4p+2，AM_i M-1_4p+2，AM_i M-4_4p+2，AM_i M-3_4p+2,AM_i 3_4p+3，AM_i 0_4p+3，AM_i 1_4p+3，AM_i 2_4p+3，…，AM_i M-1_4p+3，AM_i M-4_4p+3，AM_i M-3_4p+3，AM_i M-2_4p+3}
其中，p为非负整数，4p+3为小于或者等于Q-1的非负整数，Q为一个AM所包括的编码符号的数量。
可选地，所述N个接收逻辑通道的AM按照通道号从小到大的顺序依次为AM_i 0，AM_i 1，…，AM_i N-1；
所述第二标识部分的第p*N+1个到第(p+2)*N个编码符号为：
{AM_i 0_p，AM_i 1_p，…，AM_i N-1_p，AM_i 0_p+1，AM_i 1_p+1，…，AM_i N-1_p+1}
或者，所述第二标识部分的第2p*N+1个到第(2p+2)*N个编码符号为：
{AM_i 0_2p，AM_i 1_2p，…，AM_i N-2_2p，AM_i N-1_2p，AM_i 1_2p+1，AM_i 0_2p+1，…，AM_i N-1_2p+1，AM_i N-2_2p+1}
或者，所述第二标识部分的第3p*N+1个到第(3p+3)*N个编码符号为：
{AM_i 0_3p，AM_i 1_3p，AM_i 2_3p，…，AM_i N-3_3p，AM_i N-2_3p，AM_i N-1_3p，AM_i 1_3p+1，AM_i 2_3p+1，AM_i 0_3p+1，…，AM_i N-2_3p+1，AM_i N-1_3p+1，AM_i N-3_3p+1，AM_i 2_3p+2，AM_i 0_3p+2，AM_i 1_3p+2，…，AM_i N-1_3p+2，AM_i N-3_3p+2，AM_i N-2_3p+2}
或者，所述第二标识部分的第4p*N+1个到第(4p+4)*N个编码符号为：
{AM_i 0_4p，AM_i 1_4p，AM_i 2_4p，AM_i 3_4p，…,AM_i N-4_4p，AM_i N-3_4p，AM_i N-2_4p，AM_i N-1_4p，AM_i 1_4p+1，AM_i 2_4p+1，AM_i 3_4p+1，AM_i 0_4p+1，…，AM_i N-3_4p+1，AM_i N-2_4p+1，AM_i N-1_4p+1，AM_i N-4_4p+1,AM_i 2_4p+2，AM_i 3_4p+2，AM_i 0_4p+2，AM_i 1_4p+2，…，AM_i N-2_4p+2，AM_i N-1_4p+2，AM_i N-4_4p+2，AM_i N-3_4p+2,AM_i 3_4p+3，AM_i 0_4p+3，AM_i 1_4p+3，AM_i 2_4p+3，…，AM_i N-1_4p+3，AM_i N-4_4p+3，AM_i N-3_4p+3，AM_i N-2_4p+3}
其中，p为非负整数，4p+3为小于或者等于Q-1的非负整数，Q为一个AM所包括的编码符号的数量。
可选地，所述第一AM组还包括第一填充部分，所述第一填充部分的比特数与所述第一标识部分的比特数之和为一个标准码块的大小的整数倍，所述标准码块为在所述第一通信设备采用的转码方式下的码块；所述第二AM组还包括第二填充部分，所述第二填充部分的比特数与所述第二标识部分的比特数之和为所述标准码块的大小的整数倍；其中，所述第一填充部分的比特数与所述第二填充部分的比特数不同。
可选地，M大于N，所述处理模块2930，还用于在满足第三目标条件的情况下，控制所述M个接收逻辑通道中的第一接收逻辑通道退出工作状态，所述第三目标条件为以下条件中的至少一个：
所述第一接收逻辑通道故障；
所述第一接收逻辑通道对应的物理通道故障；
与所述第一接收逻辑通道对应于同一物理通道的接收逻辑通道故障；
所述第一通信设备中与所述第一接收逻辑通道对应的第一发送逻辑通道故障；
所述第一通信设备中与所述第一发送逻辑通道对应的物理通道故障；
所述第一通信设备中与所述第一发送逻辑通道对应于同一物理通道的发送逻辑通道故障；
所述M个接收逻辑通道的数据流量低于预设流量值；
所述第二通信设备接收到第三指令，所述第三指令用于指示所述处理模块2930控制所述第一接收逻辑通道退出工作状态。
可选地，M小于N，所述处理模块2930，还用于在满足第四目标条件的情况下，所述第二通信设备控制所述M个接收逻辑通道以外的第二接收逻辑通道恢复工作状态，所述第四目标条件为以下条件中的至少一个：
所述第二接收逻辑通道的故障消除；
所述第二接收逻辑通道对应的物理通道的故障消除；
与所述第二接收逻辑通道对应于同一物理通道的接收逻辑通道的故障消除；
所述第一通信设备中与所述第二接收逻辑通道对应的第二发送逻辑通道的故障消除；
所述第一通信设备中与所述第二发送逻辑通道对应的物理通道的故障消除；
所述第一通信设备中与所述第二发送逻辑通道对应于同一物理通道的发送逻辑通道的故障消除；
且所述M个接收逻辑通道的数据流量高于预设流量值；
所述第二通信设备接收到第四指令，所述第四指令用于指示所述所述处理模块2930控制所述第二接收逻辑通道恢复工作状态。
接收模块2910可以由收发器实现。处理模块2930可以由处理器实现。接收模块2910和处理模块2930的具体功能和有益效果可以参见图8所示的方法的相关描述，在此就不再赘述。
图30是本申请另一实施例提供的通信设备的示意性结构图。通信设备3000可以对应于上文的第一通信设备，如图30所示，通信设备3000可以包括收发器3010、处理器3020、存储器3030。
图30中仅示出了一个存储器和处理器。在实际的通信设备产品中，可以存在一个或多个处理器和一个或多个存储器。存储器也可以称为存储介质或者存储设备等。存储器可以是独立于处理器设置，也可以是与处理器集成在一起，本申请实施例对此不做限制。
收发器3010、处理器3020、存储器3030之间通过内部连接通路互相通信，传递控制和/或数据信号。
具体地，所述处理器3020，用于在第一待发送数据中插入第一对齐标识符AM组，得到第一目标数据，所述第一AM组与M个发送逻辑通道对应，M为正整数。
收发器3010，用于在所述M个发送逻辑通道上，向第二通信设备发送所述第一目标数据。
在所述第一通信设备的处于工作状态的发送逻辑通道的数量由M变为N的情况下，所述处理器3020，还用于在第二待发送数据中插入第二AM组，得到第二目标数据，所述第二AM组与N个发送逻辑通道对应，N为正整数，且N与M不同。
所述收发器3010，还用于在所述N个发送逻辑通道上，向第二通信设备发送所述第二目标数据。
通信设备3000的具体工作过程和有益效果可以参见图8所示实施例中的描述，在此 不再赘述。
图31是本申请另一实施例提供的通信设备的示意性结构图。通信设备3100可以对应于上文的第二通信设备，如图31所示，通信设备3100可以包括收发器3110、处理器3120、存储器3130。
图31中仅示出了一个存储器和处理器。在实际的通信设备产品中，可以存在一个或多个处理器和一个或多个存储器。存储器也可以称为存储介质或者存储设备等。存储器可以是独立于处理器设置，也可以是与处理器集成在一起，本申请实施例对此不做限制。
收发器3110、处理器3120、存储器3130之间通过内部连接通路互相通信，传递控制和/或数据信号。
具体地，所述收发器3110，用于在M个接收逻辑通道上接收第一通信设备发送的第一目标数据，所述第一目标数据包括第一AM组，所述第一AM组与所述M个接收逻辑通道对应，M为正整数。
所述处理器3120，用于从所述第一目标数据中移出所述第一AM组。
在所述第二通信设备的处于工作状态的接收逻辑通道的数量由M变为N的情况下，所述收发器3110，还用于在N个接收逻辑通道上接收第一通信设备发送的第二目标数据，所述第二目标数据包括第二AM组，所述第二AM组与所述N个接收逻辑通道对应，N为正整数，且N与M不同。
所述处理器3120，还用于从所述第二目标数据中移除所述第二AM组。
通信设备3100的具体工作过程和有益效果可以参见图8所示实施例中的描述，在此不再赘述。
本申请各实施例该的收发器也可以称为收发单元、收发机、收发装置等。处理器也可以称为处理单元，处理单板，处理模块、处理装置等。可选的，可以将收发器中用于实现接收功能的器件视为接收单元，将收发器中用于实现发送功能的器件视为发送单元，即收发器包括接收单元和发送单元。接收单元有时也可以称为接收机、接收器、或接收电路等。发送单元有时也可以称为发射机、发射器或者发射电路等。
本申请各实施例所述的存储器用于存储处理器运行所需的计算机指令和参数。
本申请各实施例所述的处理器可能是一种集成电路芯片，具有信号的处理能力。在实现过程中，上述方法的各步骤可以通过处理器中的硬件的集成逻辑电路或者软件形式的指令完成。本申请各实施例所述的处理器可以是通用处理器、数字信号处理器(digital signal processor，DSP)、专用集成电路(application specific integrated circuit，ASIC)、现成可编程门阵列(field programmable gate array，FPGA)或者其他可编程逻辑器件、分立门或者晶体管逻辑器件、分立硬件组件。可以实现或者执行本申请实施例中的公开的各方法、步骤及逻辑框图。通用处理器可以是微处理器或者该处理器也可以是任何常规的处理器等。结合本申请实施例所公开的方法的步骤可以直接体现为硬件译码处理器执行完成，或者用译码处理器中的硬件及软件模块组合执行完成。软件模块可以位于随机存取存储器(random access memory，RAM)、闪存、只读存储器(read-only memory，ROM)、可编程只读存储器或者电可擦写可编程存储器、寄存器等本领域成熟的存储介质中。该存储介质位于存储器，处理器读取存储器中的指令，结合其硬件完成上述方法的步骤。
在本申请的各种实施例中，各过程的序号的大小并不意味着执行顺序的先后，各过程 的执行顺序应以其功能和内在逻辑确定，而不应对本申请实施例的实施过程构成任何限定。
在上述实施例中，可以全部或部分地通过软件、硬件、固件或者其他任意组合来实现。当使用软件实现时，可以全部或部分地以计算机程序产品的形式实现。所述计算机程序产品包括一个或多个计算机指令。在计算机上加载和执行所述计算机程序指令时，全部或部分地产生按照本申请实施例所述的流程或功能。所述计算机可以是通用计算机、专用计算机、计算机网络、或者其他可编程装置。所述计算机指令可以存储在计算机可读存储介质中，或者从一个计算机可读存储介质向另一个计算机可读存储介质传输，例如，所述计算机指令可以从一个网站站点、计算机、服务器或数据中心通过有线(例如同轴电缆、光纤、数字用户线(digital subscriber line，DSL))或无线(例如红外、无线、微波等)方式向另一个网站站点、计算机、服务器或数据中心进行传输。所述计算机可读存储介质可以是计算机能够存取的任何可用介质或者是包括一个或多个可用介质集成的服务器、数据中心等数据存储设备。所述可用介质可以是磁性介质(例如，软盘、硬盘、磁带)、光介质(例如数字视频光盘(digital video disc，DVD))、或者半导体介质(例如固态硬盘(solid state disk，SSD))等。
本领域普通技术人员可以意识到，结合本文中所公开的实施例描述的各示例的单元及算法步骤，能够以电子硬件、或者计算机软件和电子硬件的结合来实现。这些功能究竟以硬件还是软件方式来执行，取决于技术方案的特定应用和设计约束条件。专业技术人员可以对每个特定的应用来使用不同方法来实现所描述的功能，但是这种实现不应认为超出本申请的范围。
所属领域的技术人员可以清楚地了解到，为描述的方便和简洁，上述描述的系统、装置和单元的具体工作过程，可以参考前述方法实施例中的对应过程，在此不再赘述。
在本申请所提供的几个实施例中，应该理解到，所揭露的系统、装置和方法，可以通过其它的方式实现。例如，以上所描述的装置实施例仅仅是示意性的，例如，所述单元的划分，仅仅为一种逻辑功能划分，实际实现时可以有另外的划分方式，例如多个单元或组件可以结合或者可以集成到另一个系统，或一些特征可以忽略，或不执行。另一点，所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口，装置或单元的间接耦合或通信连接，可以是电性，机械或其它的形式。
所述作为分离部件说明的单元可以是或者也可以不是物理上分开的，作为单元显示的部件可以是或者也可以不是物理单元，即可以位于一个地方，或者也可以分布到多个网络单元上。可以根据实际的需要选择其中的部分或者全部单元来实现本实施例方案的目的。
另外，在本申请各个实施例中的各功能单元可以集成在一个处理单元中，也可以是各个单元单独物理存在，也可以两个或两个以上单元集成在一个单元中。
所述功能如果以软件功能单元的形式实现并作为独立的产品销售或使用时，可以存储在一个计算机可读取存储介质中。基于这样的理解，本申请的技术方案本质上或者说对现有技术做出贡献的部分或者该技术方案的部分可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质中，包括若干指令用以使得一台计算机设备(可以是个人计算机，服务器，或者网络设备等)执行本申请各个实施例所述方法的全部或部分步骤。而前述的存储介质包括：U盘、移动硬盘、只读存储器(read-only memory，ROM)、随机 存取存储器(random access memory，RAM)、磁碟或者光盘等各种可以存储程序代码的介质。
以上所述，仅为本申请的具体实施方式，但本申请的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本申请揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本申请的保护范围之内。因此，本申请的保护范围应以所述权利要求的保护范围为准。

Claims (40)

  1. 一种数据处理方法，其特征在于，包括：
    第一通信设备在第一待发送数据中插入第一对齐标识符AM组，得到第一目标数据，所述第一AM组与M个发送逻辑通道对应，M为正整数；
    所述第一通信设备在所述M个发送逻辑通道上，向第二通信设备发送所述第一目标数据；
    在所述第一通信设备的处于工作状态的发送逻辑通道的数量由M变为N的情况下，所述第一通信设备在第二待发送数据中插入第二AM组，得到第二目标数据，所述第二AM组与N个发送逻辑通道对应，N为正整数，且N与M不同；
    所述第一通信设备在所述N个发送逻辑通道上，向第二通信设备发送所述第二目标数据。
  2. 根据权利要求1所述的方法，其特征在于，
    所述第一通信设备在第一待发送数据中插入第一AM组，包括：
    所述第一通信设备按照第一插入周期，将所述第一AM组插入所述第一待发送数据中；
    所述第一通信设备在第二待发送数据中插入第二AM组，包括：
    所述第一通信设备按照第二插入周期，将所述第二AM组插入所述第二待发送数据中。
  3. 根据权利要求2所述的方法，其特征在于，所述第一插入周期与所述第二插入周期不同。
  4. 根据权利要求1至3中任一项所述的方法，其特征在于，
    所述第一AM组包括第一标识部分，所述第一标识部分包括M个AM，所述M个AM与所述M个发送逻辑通道一一对应；
    所述第二AM组包括第二标识部分，所述第二标识部分包括N个AM，所述N个AM与所述N个发送逻辑通道一一对应。
  5. 根据权利要求4所述的方法，其特征在于，所述第一标识部分的编码符号的顺序与第二标识部分的编码符号的顺序不同，所述编码符号为在所述第一通信设备采用的纠错编码方式下的符号。
  6. 根据权利要求5所述的方法，其特征在于，所述M个发送逻辑通道的AM按照通道号从小到大的顺序依次为AM_i 0，AM_i 1，…，AM_i M-1；
    所述第一标识部分的第p*M+1个到第(p+2)*M个编码符号为：
    {AM_i 0_p，AM_i 1_p，…，AM_i M-1_p，AM_i 0_p+1，AM_i 1_p+1，…，AM_i M-1_p+1}
    或者，所述第一标识部分的第2p*M+1个到第(2p+2)*M个编码符号为：
    {AM_i 0_2p，AM_i 1_2p，…，AM_i M-2_2p，AM_i M-1_2p，AM_i 1_2p+1，AM_i 0_2p+1，…，AM_i M-1_2p+1，AM_i M-2_2p+1}
    或者，所述第一标识部分的第3p*M+1个到第(3p+3)*M个编码符号为：
    {AM_i 0_3p，AM_i 1_3p，AM_i 2_3p，…，AM_i M-3_3p，AM_i M-2_3p，AM_i M-1_3p，AM_i 1_3p+1，AM_i 2_3p+1，AM_i 0_3p+1，…，AM_i M-2_3p+1，AM_i M-1_3p+1，AM_i M-3_3p+1，AM_i 2_3p+2，AM_i 0_3p+2，AM_i 1_3p+2，…，AM_i M-1_3p+2，AM_i M-3_3p+2，AM_i M-2_3p+2}
    或者，所述第一标识部分的第4p*M+1个到第(4p+4)*M个编码符号为：
    {AM_i 0_4p，AM_i 1_4p，AM_i 2_4p，AM_i 3_4p，…,AM_i M-4_4p，AM_i M-3_4p，AM_i M-2_4p，AM_i M-1_4p，AM_i 1_4p+1，AM_i 2_4p+1，AM_i 3_4p+1，AM_i 0_4p+1，…，AM_i M-3_4p+1，AM_i M-2_4p+1，AM_i M-1_4p+1，AM_i M-4_4p+1,AM_i 2_4p+2，AM_i 3_4p+2，AM_i 0_4p+2，AM_i 1_4p+2，…，AM_i M-2_4p+2，AM_i M-1_4p+2，AM_i M-4_4p+2，AM_i M-3_4p+2,AM_i 3_4p+3，AM_i 0_4p+3，AM_i 1_4p+3，AM_i 2_4p+3，…，AM_i M-1_4p+3，AM_i M-4_4p+3，AM_i M-3_4p+3，AM_i M-2_4p+3}
    其中，p为非负整数，4p+3为小于或者等于Q-1的非负整数，Q为一个AM所包括的编码符号的数量。
  7. 根据权利要求5或6所述的方法，其特征在于，所述N个发送逻辑通道的AM按照通道号从小到大的顺序依次为AM_i 0，AM_i 1，…，AM_i N-1；
    所述第二标识部分的第p*N+1个到第(p+2)*N个编码符号为：
    {AM_i 0_p，AM_i 1_p，…，AM_i N-1_p，AM_i 0_p+1，AM_i 1_p+1，…，AM_i N-1_p+1}
    或者，所述第二标识部分的第2p*N+1个到第(2p+2)*N个编码符号为：
    {AM_i 0_2p，AM_i 1_2p，…，AM_i N-2_2p，AM_i N-1_2p，AM_i 1_2p+1，AM_i 0_2p+1，…，AM_i N-1_2p+1，AM_i N-2_2p+1}
    或者，所述第二标识部分的第3p*N+1个到第(3p+3)*N个编码符号为：
    {AM_i 0_3p，AM_i 1_3p，AM_i 2_3p，…，AM_i N-3_3p，AM_i N-2_3p，AM_i N-1_3p，AM_i 1_3p+1，AM_i 2_3p+1，AM_i 0_3p+1，…，AM_i N-2_3p+1，AM_i N-1_3p+1，AM_i N-3_3p+1，AM_i 2_3p+2，AM_i 0_3p+2，AM_i 1_3p+2，…，AM_i N-1_3p+2，AM_i N-3_3p+2，AM_i N-2_3p+2}
    或者，所述第二标识部分的第4p*N+1个到第(4p+4)*N个编码符号为：
    {AM_i 0_4p，AM_i 1_4p，AM_i 2_4p，AM_i 3_4p，…,AM_i N-4_4p，AM_i N-3_4p，AM_i N-2_4p，AM_i N-1_4p，AM_i 1_4p+1，AM_i 2_4p+1，AM_i 3_4p+1，AM_i 0_4p+1，…，AM_i N-3_4p+1，AM_i N-2_4p+1，AM_i N-1_4p+1，AM_i N-4_4p+1,AM_i 2_4p+2，AM_i 3_4p+2，AM_i 0_4p+2，AM_i 1_4p+2，…，AM_i N-2_4p+2，AM_i N-1_4p+2，AM_i N-4_4p+2，AM_i N-3_4p+2,AM_i 3_4p+3，AM_i 0_4p+3，AM_i 1_4p+3，AM_i 2_4p+3，…，AM_i N-1_4p+3，AM_i N-4_4p+3，AM_i N-3_4p+3，AM_i N-2_4p+3}
    其中，p为非负整数，4p+3为小于或者等于Q-1的非负整数，Q为一个AM所包括的编码符号的数量。
  8. 根据权利要求4至7中任一项所述的方法，其特征在于，
    所述第一AM组还包括第一填充部分，所述第一填充部分的比特数与所述第一标识部分的比特数之和为一个标准码块的大小的整数倍，所述标准码块为在所述第一通信设备采用的转码方式下的码块；
    所述第二AM组还包括第二填充部分，所述第二填充部分的比特数与所述第二标识部分的比特数之和为所述标准码块的大小的整数倍；
    其中，所述第一填充部分的比特数与所述第二填充部分的比特数不同。
  9. 根据权利要求1至8中任一项所述的方法，其特征在于，M大于N，所述方法还包括：
    在满足第一目标条件的情况下，所述第一通信设备控制所述M个发送逻辑通道中的 第一发送逻辑通道退出工作状态，所述第一目标条件为以下条件中的至少一个：
    所述第一发送逻辑通道故障；
    所述第一发送逻辑通道对应的物理通道故障；
    与所述第一发送逻辑通道对应于同一物理通道的发送逻辑通道故障；
    所述第二通信设备中与所述第一发送逻辑通道对应的第一接收逻辑通道故障；
    所述第二通信设备中与所述第一接收逻辑通道对应的物理通道故障；
    所述第二通信设备中与所述第一接收逻辑通道对应于同一物理通道的接收逻辑通道故障；
    所述M个发送逻辑通道的数据流量低于预设流量值；
    所述第一通信设备接收到第一指令，所述第一指令用于指示所述第一通信设备控制所述第一发送逻辑通道退出工作状态。
  10. 根据权利要求1至8中任一项所述的方法，其特征在于，M小于N，所述方法还包括：
    在满足第二目标条件的情况下，所述第一通信设备控制所述M个发送逻辑通道以外的第二发送逻辑通道恢复工作状态，所述第二目标条件为以下条件中的至少一个：
    所述第二发送逻辑通道的故障消除；
    所述第二发送逻辑通道对应的物理通道的故障消除；
    与所述第二发送逻辑通道对应于同一物理通道的发送逻辑通道的故障消除；
    所述第二通信设备中与所述第二发送逻辑通道对应的第二接收逻辑通道的故障消除；
    所述第二通信设备中与所述第二接收逻辑通道对应的物理通道的故障消除；
    所述第二通信设备中与所述第二接收逻辑通道对应于同一物理通道的接收逻辑通道的故障消除；
    且所述M个发送逻辑通道的数据流量高于预设流量值；
    所述第一通信设备接收到第二指令，所述第二指令用于指示所述第一通信设备控制所述第二发送逻辑通道恢复工作状态。
  11. 一种数据处理方法，其特征在于，包括：
    第二通信设备在M个接收逻辑通道上接收第一通信设备发送的第一目标数据，所述第一目标数据包括第一AM组，所述第一AM组与所述M个接收逻辑通道对应，M为正整数；
    所述第二通信设备从所述第一目标数据中移出所述第一AM组；
    在所述第二通信设备的处于工作状态的接收逻辑通道的数量由M变为N的情况下，所述第二通信设备在N个接收逻辑通道上接收第一通信设备发送的第二目标数据，所述第二目标数据包括第二AM组，所述第二AM组与所述N个接收逻辑通道对应，N为正整数，且N与M不同；
    所述第二通信设备从所述第二目标数据中移除所述第二AM组。
  12. 根据权利要求11所述的方法，其特征在于，
    所述第二通信设备从所述第一目标数据中移出所述第一AM组，包括：
    所述第二通信设备按照第一移除周期，从所述第一目标数据中移出所述第一AM组；
    所述第二通信设备从所述第二目标数据中移出所述第二AM组，包括：
    所述第二通信设备按照第二移除周期，从所述第二目标数据中移出所述第二AM组。
  13. 根据权利要求12所述的方法，其特征在于，所述第一移除周期与所述第二移除周期不同。
  14. 根据权利要求11至13中任一项所述的方法，其特征在于，
    所述第一AM组包括第一标识部分，所述第一标识部分包括M个AM，所述M个AM与所述M个接收逻辑通道一一对应；
    所述第二AM组包括第二标识部分，所述第二标识部分包括N个AM，所述N个AM与所述N个接收逻辑通道一一对应。
  15. 根据权利要求14所述的方法，其特征在于，所述第一标识部分的编码符号的顺序与第二标识部分的编码符号的顺序不同，所述编码符号为在所述第二通信设备采用的纠错编码方式下的符号。
  16. 根据权利要求15所述的方法，其特征在于，所述M个接收逻辑通道的AM按照通道号从小到大的顺序依次为AM_i 0，AM_i 1，…，AM_i M-1；
    所述第一标识部分的第p*M+1个到第(p+2)*M个编码符号为：
    {AM_i 0_p，AM_i 1_p，…，AM_i M-1_p，AM_i 0_p+1，AM_i 1_p+1，…，AM_i M-1_p+1}
    或者，所述第一标识部分的第2p*M+1个到第(2p+2)*M个编码符号为：
    {AM_i 0_2p，AM_i 1_2p，…，AM_i M-2_2p，AM_i M-1_2p，AM_i 1_2p+1，AM_i 0_2p+1，…，AM_i M-1_2p+1，AM_i M-2_2p+1}
    或者，所述第一标识部分的第3p*M+1个到第(3p+3)*M个编码符号为：
    {AM_i 0_3p，AM_i 1_3p，AM_i 2_3p，…，AM_i M-3_3p，AM_i M-2_3p，AM_i M-1_3p，AM_i 1_3p+1，AM_i 2_3p+1，AM_i 0_3p+1，…，AM_i M-2_3p+1，AM_i M-1_3p+1，AM_i M-3_3p+1，AM_i 2_3p+2，AM_i 0_3p+2，AM_i 1_3p+2，…，AM_i M-1_3p+2，AM_i M-3_3p+2，AM_i M-2_3p+2}
    或者，所述第一标识部分的第4p*M+1个到第(4p+4)*M个编码符号为：
    {AM_i 0_4p，AM_i 1_4p，AM_i 2_4p，AM_i 3_4p，…,AM_i M-4_4p，AM_i M-3_4p，AM_i M-2_4p，AM_i M-1_4p，AM_i 1_4p+1，AM_i 2_4p+1，AM_i 3_4p+1，AM_i 0_4p+1，…，AM_i M-3_4p+1，AM_i M-2_4p+1，AM_i M-1_4p+1，AM_i M-4_4p+1,AM_i 2_4p+2，AM_i 3_4p+2，AM_i 0_4p+2，AM_i 1_4p+2，…，AM_i M-2_4p+2，AM_i M-1_4p+2，AM_i M-4_4p+2，AM_i M-3_4p+2,AM_i 3_4p+3，AM_i 0_4p+3，AM_i 1_4p+3，AM_i 2_4p+3，…，AM_i M-1_4p+3，AM_i M-4_4p+3，AM_i M-3_4p+3，AM_i M-2_4p+3}
    其中，p为非负整数，4p+3为小于或者等于Q-1的非负整数，Q为一个AM所包括的编码符号的数量。
  17. 根据权利要求15或16所述的方法，其特征在于，所述N个接收逻辑通道的AM按照通道号从小到大的顺序依次为AM_i 0，AM_i 1，…，AM_i N-1；
    所述第二标识部分的第p*N+1个到第(p+2)*N个编码符号为：
    {AM_i 0_p，AM_i 1_p，…，AM_i N-1_p，AM_i 0_p+1，AM_i 1_p+1，…，AM_i N-1_p+1}
    或者，所述第二标识部分的第2p*N+1个到第(2p+2)*N个编码符号为：
    {AM_i 0_2p，AM_i 1_2p，…，AM_i N-2_2p，AM_i N-1_2p，AM_i 1_2p+1，AM_i 0_2p+1，…，AM_i N-1_2p+1，AM_i N-2_2p+1}
    或者，所述第二标识部分的第3p*N+1个到第(3p+3)*N个编码符号为：
    {AM_i 0_3p，AM_i 1_3p，AM_i 2_3p，…，AM_i N-3_3p，AM_i N-2_3p，AM_i N-1_3p，AM_i 1_3p+1，AM_i 2_3p+1，AM_i 0_3p+1，…，AM_i N-2_3p+1，AM_i N-1_3p+1，AM_i N-3_3p+1，AM_i 2_3p+2，AM_i 0_3p+2，AM_i 1_3p+2，…，AM_i N-1_3p+2，AM_i N-3_3p+2，AM_i N-2_3p+2}
    或者，所述第二标识部分的第4p*N+1个到第(4p+4)*N个编码符号为：
    {AM_i 0_4p，AM_i 1_4p，AM_i 2_4p，AM_i 3_4p，…,AM_i N-4_4p，AM_i N-3_4p，AM_i N-2_4p，AM_i N-1_4p，AM_i 1_4p+1，AM_i 2_4p+1，AM_i 3_4p+1，AM_i 0_4p+1，…，AM_i N-3_4p+1，AM_i N-2_4p+1，AM_i N-1_4p+1，AM_i N-4_4p+1,AM_i 2_4p+2，AM_i 3_4p+2，AM_i 0_4p+2，AM_i 1_4p+2，…，AM_i N-2_4p+2，AM_i N-1_4p+2，AM_i N-4_4p+2，AM_i N-3_4p+2,AM_i 3_4p+3，AM_i 0_4p+3，AM_i 1_4p+3，AM_i 2_4p+3，…，AM_i N-1_4p+3，AM_i N-4_4p+3，AM_i N-3_4p+3，AM_i N-2_4p+3}
    其中，p为非负整数，4p+3为小于或者等于Q-1的非负整数，Q为一个AM所包括的编码符号的数量。
  18. 根据权利要求14至17中任一项所述的方法，其特征在于，
    所述第一AM组还包括第一填充部分，所述第一填充部分的比特数与所述第一标识部分的比特数之和为一个标准码块的大小的整数倍，所述标准码块为在所述第一通信设备采用的转码方式下的码块；
    所述第二AM组还包括第二填充部分，所述第二填充部分的比特数与所述第二标识部分的比特数之和为所述标准码块的大小的整数倍；
    其中，所述第一填充部分的比特数与所述第二填充部分的比特数不同。
  19. 根据权利要求11至18中任一项所述的方法，其特征在于，M大于N，所述方法还包括：
    在满足第三目标条件的情况下，所述第二通信设备控制所述M个接收逻辑通道中的第一接收逻辑通道退出工作状态，所述第三目标条件为以下条件中的至少一个：
    所述第一接收逻辑通道故障；
    所述第一接收逻辑通道对应的物理通道故障；
    与所述第一接收逻辑通道对应于同一物理通道的接收逻辑通道故障；
    所述第一通信设备中与所述第一接收逻辑通道对应的第一发送逻辑通道故障；
    所述第一通信设备中与所述第一发送逻辑通道对应的物理通道故障；
    所述第一通信设备中与所述第一发送逻辑通道对应于同一物理通道的发送逻辑通道故障；
    所述M个接收逻辑通道的数据流量低于预设流量值；
    所述第二通信设备接收到第三指令，所述第三指令用于指示所述第二通信设备控制所述第一接收逻辑通道退出工作状态。
  20. 根据权利要求11至18中任一项所述的方法，其特征在于，M小于N，所述方法还包括：
    在满足第四目标条件的情况下，所述第二通信设备控制所述M个接收逻辑通道以外的第二接收逻辑通道恢复工作状态，所述第四目标条件为以下条件中的至少一个：
    所述第二接收逻辑通道的故障消除；
    所述第二接收逻辑通道对应的物理通道的故障消除；
    与所述第二接收逻辑通道对应于同一物理通道的接收逻辑通道的故障消除；
    所述第一通信设备中与所述第二接收逻辑通道对应的第二发送逻辑通道的故障消除；
    所述第一通信设备中与所述第二发送逻辑通道对应的物理通道的故障消除；
    所述第一通信设备中与所述第二发送逻辑通道对应于同一物理通道的发送逻辑通道的故障消除；
    且所述M个接收逻辑通道的数据流量高于预设流量值；
    所述第二通信设备接收到第四指令，所述第四指令用于指示所述第二通信设备控制所述第二接收逻辑通道恢复工作状态。
  21. 一种通信设备，其特征在于，包括：
    处理模块，用于在第一待发送数据中插入第一对齐标识符AM组，得到第一目标数据，所述第一AM组与M个发送逻辑通道对应，M为正整数；
    发送模块，用于在所述M个发送逻辑通道上，向第二通信设备发送所述第一目标数据；
    在所述第一通信设备的处于工作状态的发送逻辑通道的数量由M变为N的情况下，所述处理模块，还用于在第二待发送数据中插入第二AM组，得到第二目标数据，所述第二AM组与N个发送逻辑通道对应，N为正整数，且N与M不同；
    所述发送模块，还用于在所述N个发送逻辑通道上，向第二通信设备发送所述第二目标数据。
  22. 根据权利要求21所述的通信设备，其特征在于，
    所述处理模块，具体用于按照第一插入周期，将所述第一AM组插入所述第一待发送数据中；
    所述处理模块，具体还用于按照第二插入周期，将所述第二AM组插入所述第二待发送数据中。
  23. 根据权利要求22所述的通信设备，其特征在于，所述第一插入周期与所述第二插入周期不同。
  24. 根据权利要求21至23中任一项所述的通信设备，其特征在于，
    所述第一AM组包括第一标识部分，所述第一标识部分包括M个AM，所述M个AM与所述M个发送逻辑通道一一对应；
    所述第二AM组包括第二标识部分，所述第二标识部分包括N个AM，所述N个AM与所述N个发送逻辑通道一一对应。
  25. 根据权利要求24所述的通信设备，其特征在于，所述第一标识部分的编码符号的顺序与第二标识部分的编码符号的顺序不同，所述编码符号为在所述第一通信设备采用的纠错编码方式下的符号。
  26. 根据权利要求25所述的通信设备，其特征在于，所述M个发送逻辑通道的AM按照通道号从小到大的顺序依次为AM_i 0，AM_i 1，…，AM_i M-1；
    所述第一标识部分的第p*M+1个到第(p+2)*M个编码符号为：
    {AM_i 0_p，AM_i 1_p，…，AM_i M-1_p，AM_i 0_p+1，AM_i 1_p+1，…，AM_i M-1_p+1}
    或者，所述第一标识部分的第2p*M+1个到第(2p+2)*M个编码符号为：
    {AM_i 0_2p，AM_i 1_2p，…，AM_i M-2_2p，AM_i M-1_2p，AM_i 1_2p+1，AM_i 0_2p+1，…，AM_i M-1_2p+1，AM_i M-2_2p+1}
    或者，所述第一标识部分的第3p*M+1个到第(3p+3)*M个编码符号为：
    {AM_i 0_3p，AM_i 1_3p，AM_i 2_3p，…，AM_i M-3_3p，AM_i M-2_3p，AM_i M-1_3p，AM_i 1_3p+1，AM_i 2_3p+1，AM_i 0_3p+1，…，AM_i M-2_3p+1，AM_i M-1_3p+1，AM_i M-3_3p+1，AM_i 2_3p+2，AM_i 0_3p+2，AM_i 1_3p+2，…，AM_i M-1_3p+2，AM_i M-3_3p+2，AM_i M-2_3p+2}
    或者，所述第一标识部分的第4p*M+1个到第(4p+4)*M个编码符号为：
    {AM_i 0_4p，AM_i 1_4p，AM_i 2_4p，AM_i 3_4p，…,AM_i M-4_4p，AM_i M-3_4p，AM_i M-2_4p，AM_i M-1_4p，AM_i 1_4p+1，AM_i 2_4p+1，AM_i 3_4p+1，AM_i 0_4p+1，…，AM_i M-3_4p+1，AM_i M-2_4p+1，AM_i M-1_4p+1，AM_i M-4_4p+1,AM_i 2_4p+2，AM_i 3_4p+2，AM_i 0_4p+2，AM_i 1_4p+2，…，AM_i M-2_4p+2，AM_i M-1_4p+2，AM_i M-4_4p+2，AM_i M-3_4p+2,AM_i 3_4p+3，AM_i 0_4p+3，AM_i 1_4p+3，AM_i 2_4p+3，…，AM_i M-1_4p+3，AM_i M-4_4p+3，AM_i M-3_4p+3，AM_i M-2_4p+3}
    其中，p为非负整数，4p+3为小于或者等于Q-1的非负整数，Q为一个AM所包括的编码符号的数量。
  27. 根据权利要求25或26所述的通信设备，其特征在于，所述N个发送逻辑通道的AM按照通道号从小到大的顺序依次为AM_i 0，AM_i 1，…，AM_i N-1；
    所述第二标识部分的第p*N+1个到第(p+2)*N个编码符号为：
    {AM_i 0_p，AM_i 1_p，…，AM_i N-1_p，AM_i 0_p+1，AM_i 1_p+1，…，AM_i N-1_p+1}
    或者，所述第二标识部分的第2p*N+1个到第(2p+2)*N个编码符号为：
    {AM_i 0_2p，AM_i 1_2p，…，AM_i N-2_2p，AM_i N-1_2p，AM_i 1_2p+1，AM_i 0_2p+1，…，AM_i N-1_2p+1，AM_i N-2_2p+1}
    或者，所述第二标识部分的第3p*N+1个到第(3p+3)*N个编码符号为：
    {AM_i 0_3p，AM_i 1_3p，AM_i 2_3p，…，AM_i N-3_3p，AM_i N-2_3p，AM_i N-1_3p，AM_i 1_3p+1，AM_i 2_3p+1，AM_i 0_3p+1，…，AM_i N-2_3p+1，AM_i N-1_3p+1，AM_i N-3_3p+1，AM_i 2_3p+2，AM_i 0_3p+2，AM_i 1_3p+2，…，AM_i N-1_3p+2，AM_i N-3_3p+2，AM_i N-2_3p+2}
    或者，所述第二标识部分的第4p*N+1个到第(4p+4)*N个编码符号为：
    {AM_i 0_4p，AM_i 1_4p，AM_i 2_4p，AM_i 3_4p，…,AM_i N-4_4p，AM_i N-3_4p，AM_i N-2_4p，AM_i N-1_4p，AM_i 1_4p+1，AM_i 2_4p+1，AM_i 3_4p+1，AM_i 0_4p+1，…，AM_i N-3_4p+1，AM_i N-2_4p+1，AM_i N-1_4p+1，AM_i N-4_4p+1,AM_i 2_4p+2，AM_i 3_4p+2，AM_i 0_4p+2，AM_i 1_4p+2，…，AM_i N-2_4p+2，AM_i N-1_4p+2，AM_i N-4_4p+2，AM_i N-3_4p+2,AM_i 3_4p+3，AM_i 0_4p+3，AM_i 1_4p+3，AM_i 2_4p+3，…，AM_i N-1_4p+3，AM_i N-4_4p+3，AM_i N-3_4p+3，AM_i N-2_4p+3}
    其中，p为非负整数，4p+3为小于或者等于Q-1的非负整数，Q为一个AM所包括的编码符号的数量。
  28. 根据权利要求24至27中任一项所述的通信设备，其特征在于，
    所述第一AM组还包括第一填充部分，所述第一填充部分的比特数与所述第一标识部分的比特数之和为一个标准码块的大小的整数倍，所述标准码块为在所述第一通信设备采用的转码方式下的码块；
    所述第二AM组还包括第二填充部分，所述第二填充部分的比特数与所述第二标识部分的比特数之和为所述标准码块的大小的整数倍；
    其中，所述第一填充部分的比特数与所述第二填充部分的比特数不同。
  29. 根据权利要求21至28中任一项所述的通信设备，其特征在于，M大于N，所述处理模块还用于：
    在满足第一目标条件的情况下，所述控制所述M个发送逻辑通道中的第一发送逻辑通道退出工作状态，所述第一目标条件为以下条件中的至少一个：
    所述第一发送逻辑通道故障；
    所述第一发送逻辑通道对应的物理通道故障；
    与所述第一发送逻辑通道对应于同一物理通道的发送逻辑通道故障；
    所述第二通信设备中与所述第一发送逻辑通道对应的第一接收逻辑通道故障；
    所述第二通信设备中与所述第一接收逻辑通道对应的物理通道故障；
    所述第二通信设备中与所述第一接收逻辑通道对应于同一物理通道的接收逻辑通道故障；
    所述M个发送逻辑通道的数据流量低于预设流量值；
    所述第一通信设备接收到第一指令，所述第一指令用于指示所述处理模块控制所述第一发送逻辑通道退出工作状态。
  30. 根据权利要求21至28中任一项所述的通信设备，其特征在于，M小于N，所述处理模块还用于：
    在满足第二目标条件的情况下，控制所述M个发送逻辑通道以外的第二发送逻辑通道恢复工作状态，所述第二目标条件为以下条件中的至少一个：
    所述第二发送逻辑通道的故障消除；
    所述第二发送逻辑通道对应的物理通道的故障消除；
    与所述第二发送逻辑通道对应于同一物理通道的发送逻辑通道的故障消除；
    所述第二通信设备中与所述第二发送逻辑通道对应的第二接收逻辑通道的故障消除；
    所述第二通信设备中与所述第二接收逻辑通道对应的物理通道的故障消除；
    所述第二通信设备中与所述第二接收逻辑通道对应于同一物理通道的接收逻辑通道的故障消除；
    且所述M个发送逻辑通道的数据流量高于预设流量值；
    所述第一通信设备接收到第二指令，所述第二指令用于指示所述处理模块控制所述第二发送逻辑通道恢复工作状态。
  31. 一种通信设备，其特征在于，包括：
    接收模块，用于在M个接收逻辑通道上接收第一通信设备发送的第一目标数据，所述第一目标数据包括第一AM组，所述第一AM组与所述M个接收逻辑通道对应，M为正整数；
    处理模块，用于从所述第一目标数据中移出所述第一AM组；
    在所述第二通信设备的处于工作状态的接收逻辑通道的数量由M变为N的情况下，所述接收模块，还用于在N个接收逻辑通道上接收第一通信设备发送的第二目标数据，所述第二目标数据包括第二AM组，所述第二AM组与所述N个接收逻辑通道对应，N为正整数，且N与M不同；
    所述处理模块，还用于从所述第二目标数据中移除所述第二AM组。
  32. 根据权利要求31所述的通信设备，其特征在于，
    所述处理模块，具体用于按照第一移除周期，从所述第一目标数据中移出所述第一AM组；
    所述处理模块，具体还用于所述第二通信设备按照第二移除周期，从所述第二目标数据中移出所述第二AM组。
  33. 根据权利要求32所述的通信设备，其特征在于，所述第一移除周期与所述第二移除周期不同。
  34. 根据权利要求31至33中任一项所述的通信设备，其特征在于，
    所述第一AM组包括第一标识部分，所述第一标识部分包括M个AM，所述M个AM与所述M个接收逻辑通道一一对应；
    所述第二AM组包括第二标识部分，所述第二标识部分包括N个AM，所述N个AM与所述N个接收逻辑通道一一对应。
  35. 根据权利要求34所述的通信设备，其特征在于，所述第一标识部分的编码符号的顺序与第二标识部分的编码符号的顺序不同，所述编码符号为在所述第二通信设备采用的纠错编码方式下的符号。
  36. 根据权利要求35所述的通信设备，其特征在于，所述M个接收逻辑通道的AM按照通道号从小到大的顺序依次为AM_i 0，AM_i 1，…，AM_i M-1；
    所述第一标识部分的第p*M+1个到第(p+2)*M个编码符号为：
    {AM_i 0_p，AM_i 1_p，…，AM_i M-1_p，AM_i 0_p+1，AM_i 1_p+1，…，AM_i M-1_p+1}
    或者，所述第一标识部分的第2p*M+1个到第(2p+2)*M个编码符号为：
    {AM_i 0_2p，AM_i 1_2p，…，AM_i M-2_2p，AM_i M-1_2p，AM_i 1_2p+1，AM_i 0_2p+1，…，AM_i M-1_2p+1，AM_i M-2_2p+1}
    或者，所述第一标识部分的第3p*M+1个到第(3p+3)*M个编码符号为：
    {AM_i 0_3p，AM_i 1_3p，AM_i 2_3p，…，AM_i M-3_3p，AM_i M-2_3p，AM_i M-1_3p，AM_i 1_3p+1，AM_i 2_3p+1，AM_i 0_3p+1，…，AM_i M-2_3p+1，AM_i M-1_3p+1，AM_i M-3_3p+1，AM_i 2_3p+2，AM_i 0_3p+2，AM_i 1_3p+2，…，AM_i M-1_3p+2，AM_i M-3_3p+2，AM_i M-2_3p+2}
    或者，所述第一标识部分的第4p*M+1个到第(4p+4)*M个编码符号为：{AM_i 0_4p，AM_i 1_4p，AM_i 2_4p，AM_i 3_4p，…,AM_i M-4_4p，AM_i M-3_4p，AM_i M-2_4p，AM_i M-1_4p，AM_i 1_4p+1，AM_i 2_4p+1，AM_i 3_4p+1，AM_i 0_4p+1，…，AM_i M-3_4p+1，AM_i M-2_4p+1，AM_i M-1_4p+1，AM_i M-4_4p+1,AM_i 2_4p+2，AM_i 3_4p+2，AM_i 0_4p+2，AM_i 1_4p+2，…，AM_i M-2_4p+2，AM_i M-1_4p+2，AM_i M-4_4p+2，AM_i M-3_4p+2,AM_i 3_4p+3，AM_i 0_4p+3，AM_i 1_4p+3，AM_i 2_4p+3，…，AM_i M-1_4p+3，AM_i M-4_4p+3，AM_i M-3_4p+3，AM_i M-2_4p+3}
    其中，p为非负整数，4p+3为小于或者等于Q-1的非负整数，Q为一个AM所包括的编码符号的数量。
  37. 根据权利要求35或36所述的通信设备，其特征在于，所述N个接收逻辑通道的AM按照通道号从小到大的顺序依次为AM_i 0，AM_i 1，…，AM_i N-1；
    所述第二标识部分的第p*N+1个到第(p+2)*N个编码符号为：
    {AM_i 0_p，AM_i 1_p，…，AM_i N-1_p，AM_i 0_p+1，AM_i 1_p+1，…，AM_i N-1_p+1}
    或者，所述第二标识部分的第2p*N+1个到第(2p+2)*N个编码符号为：
    {AM_i 0_2p，AM_i 1_2p，…，AM_i N-2_2p，AM_i N-1_2p，AM_i 1_2p+1，AM_i 0_2p+1，…，AM_i N-1_2p+1，AM_i N-2_2p+1}
    或者，所述第二标识部分的第3p*N+1个到第(3p+3)*N个编码符号为：
    {AM_i 0_3p，AM_i 1_3p，AM_i 2_3p，…，AM_i N-3_3p，AM_i N-2_3p，AM_i N-1_3p，AM_i 1_3p+1，AM_i 2_3p+1，AM_i 0_3p+1，…，AM_i N-2_3p+1，AM_i N-1_3p+1，AM_i N-3_3p+1，AM_i 2_3p+2，AM_i 0_3p+2，AM_i 1_3p+2，…，AM_i N-1_3p+2，AM_i N-3_3p+2，AM_i N-2_3p+2}
    或者，所述第二标识部分的第4p*N+1个到第(4p+4)*N个编码符号为：
    {AM_i 0_4p，AM_i 1_4p，AM_i 2_4p，AM_i 3_4p，…,AM_i N-4_4p，AM_i N-3_4p，AM_i N-2_4p，AM_i N-1_4p，AM_i 1_4p+1，AM_i 2_4p+1，AM_i 3_4p+1，AM_i 0_4p+1，…，AM_i N-3_4p+1，AM_i N-2_4p+1，AM_i N-1_4p+1，AM_i N-4_4p+1,AM_i 2_4p+2，AM_i 3_4p+2，AM_i 0_4p+2，AM_i 1_4p+2，…，AM_i N-2_4p+2，AM_i N-1_4p+2，AM_i N-4_4p+2，AM_i N-3_4p+2,AM_i 3_4p+3，AM_i 0_4p+3，AM_i 1_4p+3，AM_i 2_4p+3，…，AM_i N-1_4p+3，AM_i N-4_4p+3，AM_i N-3_4p+3，AM_i N-2_4p+3}
    其中，p为非负整数，4p+3为小于或者等于Q-1的非负整数，Q为一个AM所包括的编码符号的数量。
  38. 根据权利要求34至37中任一项所述的通信设备，其特征在于，
    所述第一AM组还包括第一填充部分，所述第一填充部分的比特数与所述第一标识部分的比特数之和为一个标准码块的大小的整数倍，所述标准码块为在所述第一通信设备采用的转码方式下的码块；
    所述第二AM组还包括第二填充部分，所述第二填充部分的比特数与所述第二标识部分的比特数之和为所述标准码块的大小的整数倍；
    其中，所述第一填充部分的比特数与所述第二填充部分的比特数不同。
  39. 根据权利要求31至38中任一项所述的通信设备，其特征在于，M大于N，所述处理模块还用于：
    在满足第三目标条件的情况下，控制所述M个接收逻辑通道中的第一接收逻辑通道退出工作状态，所述第三目标条件为以下条件中的至少一个：
    所述第一接收逻辑通道故障；
    所述第一接收逻辑通道对应的物理通道故障；
    与所述第一接收逻辑通道对应于同一物理通道的接收逻辑通道故障；
    所述第一通信设备中与所述第一接收逻辑通道对应的第一发送逻辑通道故障；
    所述第一通信设备中与所述第一发送逻辑通道对应的物理通道故障；
    所述第一通信设备中与所述第一发送逻辑通道对应于同一物理通道的发送逻辑通道故障；
    所述M个接收逻辑通道的数据流量低于预设流量值；
    所述第二通信设备接收到第三指令，所述第三指令用于指示所述处理模块控制所述第一接收逻辑通道退出工作状态。
  40. 根据权利要求31至38中任一项所述的通信设备，其特征在于，M小于N，所述处理模块还用于：
    在满足第四目标条件的情况下，所述第二通信设备控制所述M个接收逻辑通道以外的第二接收逻辑通道恢复工作状态，所述第四目标条件为以下条件中的至少一个：
    所述第二接收逻辑通道的故障消除；
    所述第二接收逻辑通道对应的物理通道的故障消除；
    与所述第二接收逻辑通道对应于同一物理通道的接收逻辑通道的故障消除；
    所述第一通信设备中与所述第二接收逻辑通道对应的第二发送逻辑通道的故障消除；
    所述第一通信设备中与所述第二发送逻辑通道对应的物理通道的故障消除；
    所述第一通信设备中与所述第二发送逻辑通道对应于同一物理通道的发送逻辑通道的故障消除；
    且所述M个接收逻辑通道的数据流量高于预设流量值；
    所述第二通信设备接收到第四指令，所述第四指令用于指示所述所述处理模块控制所述第二接收逻辑通道恢复工作状态。
PCT/CN2020/092241 2019-06-04 2020-05-26 数据处理方法和通信设备 WO2020244413A1 (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201910482141.4A CN112039628B (zh) 2019-06-04 2019-06-04 数据处理方法和通信设备
CN201910482141.4 2019-06-04

Publications (1)

Publication Number Publication Date
WO2020244413A1 true WO2020244413A1 (zh) 2020-12-10

Family

ID=73576197

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2020/092241 WO2020244413A1 (zh) 2019-06-04 2020-05-26 数据处理方法和通信设备

Country Status (2)

Country Link
CN (1) CN112039628B (zh)
WO (1) WO2020244413A1 (zh)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114389747A (zh) * 2020-10-22 2022-04-22 华为技术有限公司 数据传输方法及其相关装置
CN114793147A (zh) * 2021-01-25 2022-07-26 华为技术有限公司 通信方法、装置、系统、存储介质及计算机程序产品
CN117896037A (zh) * 2022-10-13 2024-04-16 华为技术有限公司 一种数据处理方法和数据处理装置

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103534971A (zh) * 2013-05-17 2014-01-22 华为技术有限公司 一种fec编解码的数据处理方法和相关装置
WO2014052972A1 (en) * 2012-09-28 2014-04-03 Vitesse Semiconductor Corporation High accuracy 1588 timestamping over high speed multi lane distribution physical code sublayers
WO2015089705A1 (zh) * 2013-12-16 2015-06-25 华为技术有限公司 一种数据传输方法、设备及系统
US20160087753A1 (en) * 2014-09-22 2016-03-24 Adee O. Ran Technologies for high-speed pcs supporting fec block synchronization with alignment markers
CN106612203A (zh) * 2015-10-27 2017-05-03 中兴通讯股份有限公司 一种处理灵活以太网客户端数据流的方法及装置

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11038748B2 (en) * 2016-02-01 2021-06-15 Star-Dundee Limited Multi-lane communication
US10341020B2 (en) * 2016-03-17 2019-07-02 Avago Technologies International Sales Pte. Limited Flexible ethernet logical lane aggregation
US10404402B2 (en) * 2017-09-22 2019-09-03 Cisco Technology, Inc. Security protection of terabit ethernet PCS layer using alignment markers

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014052972A1 (en) * 2012-09-28 2014-04-03 Vitesse Semiconductor Corporation High accuracy 1588 timestamping over high speed multi lane distribution physical code sublayers
CN103534971A (zh) * 2013-05-17 2014-01-22 华为技术有限公司 一种fec编解码的数据处理方法和相关装置
WO2015089705A1 (zh) * 2013-12-16 2015-06-25 华为技术有限公司 一种数据传输方法、设备及系统
US20160087753A1 (en) * 2014-09-22 2016-03-24 Adee O. Ran Technologies for high-speed pcs supporting fec block synchronization with alignment markers
CN106612203A (zh) * 2015-10-27 2017-05-03 中兴通讯股份有限公司 一种处理灵活以太网客户端数据流的方法及装置

Also Published As

Publication number Publication date
CN112039628A (zh) 2020-12-04
CN112039628B (zh) 2024-10-18

Similar Documents

Publication Publication Date Title
WO2020244413A1 (zh) 数据处理方法和通信设备
US11936475B2 (en) Method, apparatus, and system for improving reliability of data transmission involving an ethernet device
EP3041177A1 (en) Data transmission method and apparatus
CN104869176B (zh) 使用共享数据路径的多个以太网端口以及端口类型
US20100229067A1 (en) Cable Interconnection Techniques
EP3972221A1 (en) Ethernet data transmission method and communication device
US20090086753A1 (en) Method and system for exploiting spare link bandwidth in a multilane communication channel
CN104426631A (zh) 对数据进行处理的方法及装置
US20230268932A1 (en) Ethernet coding method and apparatus
WO2021047228A1 (zh) 一种通信方法、设备及存储介质
US20190296860A1 (en) Data receiving method and device, and data sending method and device
WO2013079000A1 (zh) 一种列车环网组网的方法
WO2020244557A1 (zh) 指示故障状态的方法和装置
WO2020029892A1 (zh) 接收码块流的方法、发送码块流的方法和通信装置
WO2021017726A1 (zh) 改善传输速率的方法、处理器、网络设备和网络系统
WO2022257721A1 (zh) 编码方法、译码方法及光模块
CN112543080B (zh) 误码率检测的方法和装置
KR102187593B1 (ko) 한 쌍의 트위스트 페어 또는 두 쌍의 트위스트 페어를 통해 전송되는 이더넷 통신 시스템
EP4224753A1 (en) Data transmission method and apparatus related thereto
US20230327852A1 (en) Data transmission method, communication apparatus, and communication system
WO2024169284A1 (zh) 物理层传输数据的方法、装置、系统、设备及芯片
WO2024169744A1 (zh) 传输以太网物理层信号的方法、装置、计算机系统和网络系统
WO2021169184A1 (zh) 一种线路编码方法及装置
WO2019023824A1 (zh) 一种比特块流处理、速率匹配、交换的方法和装置
WO2023169194A1 (zh) 一种数据处理方法及第二通信装置

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 20819483

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 20819483

Country of ref document: EP

Kind code of ref document: A1