WO2020232948A1 - 阵列基板及其制造方法、有机发光二极管显示器 - Google Patents

阵列基板及其制造方法、有机发光二极管显示器 Download PDF

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Publication number
WO2020232948A1
WO2020232948A1 PCT/CN2019/109003 CN2019109003W WO2020232948A1 WO 2020232948 A1 WO2020232948 A1 WO 2020232948A1 CN 2019109003 W CN2019109003 W CN 2019109003W WO 2020232948 A1 WO2020232948 A1 WO 2020232948A1
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WIPO (PCT)
Prior art keywords
layer
organic light
opening
metal layer
light emitting
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PCT/CN2019/109003
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English (en)
French (fr)
Inventor
韩佰祥
曹昆
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深圳市华星光电半导体显示技术有限公司
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Publication of WO2020232948A1 publication Critical patent/WO2020232948A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals

Definitions

  • This application relates to the field of display technology, and in particular to an array substrate and a manufacturing method thereof, and an organic light emitting diode display.
  • Organic Light Emitting Diode (OLED) displays have broad application prospects due to their high quality characteristics such as self-luminescence, low power consumption, high brightness, and high response speed.
  • Organic light-emitting diode displays include top-emission type OLED displays and bottom-emission type OLED displays.
  • Top-emission type OLED displays are applied to large-size high-resolution display panels due to their high aperture ratio.
  • the cathode of top-emission type OLED displays is generally It is a semiconductor material with high transparency. Due to the high impedance of the semiconductor material, the distance of the supply circuit will cause the difference of the resistance voltage drop (IR-Drop) in different areas of the display panel, and the final display effect will be affected by uneven areas. Display quality.
  • the purpose of the present application is to provide an array substrate, a manufacturing method thereof, and an organic light emitting diode display, so as to solve the problem that the display quality of the organic light emitting diode display is affected by the varying degrees of the transparent cathode resistance voltage drop.
  • a substrate having a first area and a second area
  • a plurality of thin film transistors are formed in the first region of the substrate, and the thin film transistors include a gate, an active layer, and source and drain electrodes;
  • a first conductive layer is formed on the second area of the substrate
  • An anode, the anode is formed on the substrate and electrically connected to the drain electrode;
  • a second conductive layer where the second conductive layer and the anode are provided in the same layer and located in the second region, and the second conductive layer is electrically connected to the first conductive layer;
  • a pixel definition layer is located on a side of the plurality of thin film transistors away from the substrate and has a first opening and a second opening, the first opening exposes the anode portion, and the second opening Partially expose the second conductive layer;
  • a metal layer is formed on the pixel definition layer outside the first opening, and the metal layer is electrically connected to the second conductive layer through the second opening of the pixel definition layer ;
  • the cathode is formed above and in contact with the metal layer.
  • the metal layer is formed on the pixel definition layer and covers the pixel definition layer outside the first opening.
  • the array substrate further includes an organic light-emitting layer formed on the metal layer and the pixel defining layer, and the cathode is in contact with the metal layer through an opening on the organic light-emitting layer.
  • the array substrate further includes an electron transport layer formed on the metal layer and the pixel definition layer, and the cathode is in contact with the metal layer through an opening in the electron transport layer.
  • the array substrate further includes an organic light emitting layer and an electron transport layer sequentially formed on the metal layer and the pixel definition layer, and the cathode passes through the organic light emitting layer and the electron transport layer.
  • the opening of the layer is in contact with the metal layer.
  • the array substrate further includes an organic light-emitting layer located between the pixel defining layer and the metal layer, and the metal layer passes through the organic light-emitting layer and the pixel.
  • the opening of the definition layer is electrically connected to the second conductive layer, and the metal layer is in contact with the cathode outside the first opening.
  • the first conductive layer and the source and drain electrodes are provided in the same layer, or the first conductive layer and the gate are provided in the same layer.
  • the present application provides a manufacturing method of an array substrate.
  • the manufacturing method includes the following steps:
  • the substrate having a first area and a second area
  • a first conductive layer is formed in the second region of the substrate, and the thin film transistor includes a gate, an active layer, and source and drain electrodes;
  • a second conductive layer is formed in the same layer as the anode, located in the second region and electrically connected to the first conductive layer ;
  • a pixel definition layer having a first opening and a second opening is formed on the side of the plurality of thin film transistors away from the substrate, the first opening exposes the anode portion, and the second opening makes the second Part of the conductive layer is exposed;
  • a cathode in contact with the metal layer is formed above the metal layer.
  • the metal layer is formed on the pixel definition layer and covers the pixel definition layer outside the first opening.
  • the manufacturing method further includes the following steps: forming an organic light-emitting layer on the metal layer and the pixel defining layer, and the cathode passes through the opening on the organic light-emitting layer and the Metal layer contact, or,
  • An organic light-emitting layer and an electron transport layer are sequentially formed on the metal layer and the pixel definition layer, and the cathode is in contact with the metal layer through an opening penetrating the organic light-emitting layer and the electron transport layer.
  • the present application also provides an organic light emitting diode display, the organic light emitting diode display array substrate, and the array substrate includes:
  • a substrate having a first area and a second area
  • a plurality of thin film transistors are formed in the first region of the substrate, and the thin film transistors include a gate, an active layer, and source and drain electrodes;
  • a first conductive layer is formed on the second area of the substrate
  • An anode, the anode is formed on the substrate and electrically connected to the drain electrode;
  • a second conductive layer where the second conductive layer and the anode are provided in the same layer and located in the second region, and the second conductive layer is electrically connected to the first conductive layer;
  • a pixel definition layer is located on a side of the plurality of thin film transistors away from the substrate and has a first opening and a second opening, the first opening exposes the anode portion, and the second opening Partially expose the second conductive layer;
  • a metal layer is formed on the pixel definition layer outside the first opening, and the metal layer is electrically connected to the second conductive layer through the second opening of the pixel definition layer ;
  • the cathode is formed above and in contact with the metal layer.
  • the metal layer is formed on the pixel definition layer and covers the pixel definition layer outside the first opening.
  • the array substrate further includes an organic light emitting layer formed on the metal layer and the pixel definition layer, and the cathode is in contact with the metal layer through an opening on the organic light emitting layer .
  • the array substrate further includes an electron transport layer formed on the metal layer and the pixel definition layer, and the cathode is in contact with the metal layer through an opening on the electron transport layer .
  • the array substrate further includes an organic light emitting layer and an electron transport layer sequentially formed on the metal layer and the pixel defining layer, and the cathode passes through the organic light emitting layer and the The opening of the electron transport layer is in contact with the metal layer.
  • the array substrate further includes an organic light emitting layer, the organic light emitting layer is located between the pixel defining layer and the metal layer, and the metal layer passes through the organic light emitting layer and the metal layer.
  • the opening of the pixel definition layer is electrically connected to the second conductive layer, and the metal layer is in contact with the cathode outside the first opening.
  • the first conductive layer and the source and drain electrodes are provided in the same layer, or the first conductive layer and the gate are provided in the same layer.
  • the present application provides an array substrate, a manufacturing method thereof, and an organic light emitting diode display.
  • a metal layer in contact with a cathode, a first conductive layer, and a second conductive layer are provided.
  • the first conductive layer is electrically connected to the metal layer through the second conductive layer. It is connected to avoid the problem of affecting the display quality of the organic light emitting diode display in a large-size display panel due to the different voltage drops of the cathode resistance in different regions.
  • FIG. 1 is a schematic structural diagram of an organic light emitting diode display according to the first embodiment of the application
  • FIG. 2 is a top view of a metal layer in the organic light emitting diode display shown in FIG. 1;
  • FIG. 3 is a schematic structural diagram of an organic light emitting diode display according to a second embodiment of the application.
  • FIG. 4 is a schematic structural diagram of an organic light emitting diode display according to a third embodiment of the application.
  • FIG. 5 is a schematic structural diagram of an organic light emitting diode display according to a fourth embodiment of the application.
  • FIG. 6 is a flowchart of the first embodiment of the manufacturing method of the array substrate of the organic light emitting diode display of this application.
  • organic light emitting diode display 101 first area; 102 second area; 11 thin film transistor; 111 gate; 112 active layer; 1131 source electrode; 1132 drain electrode; 12 first conductive layer; 13 planarization 131 third opening; 132 fourth opening; 141 anode; 142 second conductive layer; 15 pixel definition layer; 151 first opening; 152 second opening; 16 metal layer; 17 organic light emitting layer; 171 fifth opening; 18 electron transport layer; 181 sixth opening; 19 cathode.
  • FIG. 1 is a schematic structural diagram of an organic light emitting diode device 100 according to a first embodiment of the application.
  • the organic light emitting diode display 100 is a top-emitting white light organic light emitting diode display.
  • the organic light emitting diode display 100 includes an array substrate and a color film substrate.
  • the array substrate includes:
  • a substrate the substrate has a first area 101 and a second area 102;
  • a plurality of thin film transistors 11 are formed in the first region 101 of the substrate.
  • the thin film transistor 11 includes a gate 111, an active layer 112, and source and drain electrodes (1131, 1132);
  • the first conductive layer 12 is formed on the second area 102 of the substrate;
  • the anode 141 is formed on the substrate and is electrically connected to the drain electrode 1132;
  • the second conductive layer 142, the second conductive layer 142 and the anode 141 are provided in the same layer and located in the second region 102, and the second conductive layer 142 is electrically connected to the first conductive layer 12;
  • the pixel definition layer 15 is located on the side of the plurality of thin film transistors 11 away from the substrate and has a first opening 151 and a second opening 152.
  • the first opening 151 partially exposes the anode 141, and the second opening 152 makes the second conductive Part of layer 142 is exposed;
  • the metal layer 16 is formed on the pixel definition layer 15 outside the first opening 151, and the metal layer 16 is electrically connected to the second conductive layer 142 through the second opening 152 of the pixel definition layer 15;
  • the cathode 19 is formed on and in contact with the metal layer 16.
  • the substrate is a glass substrate or a flexible substrate
  • the flexible substrate is a polyimide substrate, a polyethylene terephthalate substrate, or the like.
  • the substrate has a first area 101 and a second area 102, and both the first area 101 and the second area 102 are non-light emitting areas.
  • the thin film transistor 11 is located in the first area 101 of the substrate.
  • the thin film transistor 11 may be a top gate thin film transistor or a bottom gate thin film transistor, and the thin film transistor 11 may be a polysilicon thin film transistor or a metal oxide thin film transistor.
  • the thin film transistor 11 is a bottom-gate thin film transistor, and the thin film transistor 11 includes a gate 111, an active layer 112, and source and drain electrodes (1131, 1132).
  • the gate 111 is formed by a physical vapor deposition process (for example, sputtering, co-sputtering, reactive sputtering or thermal evaporation) and a yellowing process.
  • the material of the gate 111 includes Al, Mo, Ti, W, Cu, or other materials. alloy.
  • the active layer 112 is a metal oxide semiconductor or polysilicon.
  • the source and drain electrodes (1131, 1132) are also formed by physical vapor deposition processes (for example, sputtering, co-sputtering, reactive sputtering or thermal evaporation) and yellow light processes.
  • the source and drain electrodes (1131, 1132) are made of materials including Al, Mo, Ti, W, Cu or their alloys.
  • a gate insulating layer is formed between the gate 111 and the active layer 112. The gate insulating layer is formed on the entire substrate.
  • the preparation method of the gate insulating layer is chemical vapor deposition, and the preparation material of the gate insulating layer is nitride Silicon, silicon oxide or silicon oxynitride.
  • An interlayer insulating layer is formed between the active layer 112 and the source and drain electrodes (1131, 1132).
  • the interlayer insulating layer is formed on the entire substrate.
  • the preparation method of the interlayer insulating layer is chemical vapor deposition.
  • the preparation material is silicon nitride, silicon oxide, silicon oxynitride or aluminum oxide.
  • the first conductive layer 12 is used for inputting electrical signals to output to the metal layer 16.
  • the first conductive layer 12 and the source and drain electrodes (1131, 1132) are arranged in the same layer, and the first conductive layer 12 is connected to the source and drain electrodes.
  • the poles (1131, 1132) are formed through the same manufacturing process, that is, the material of the first conductive layer 12 is Al, Mo, Ti, W, Cu or alloys thereof.
  • the planarization layer 13 is used to level the surface of the substrate on which the thin film transistor 11 is formed.
  • the planarization layer 13 covers the thin film transistor 11 and the first conductive layer 12.
  • the planarization layer 13 is an organic layer with a thickness of 20,000 angstroms to 35,000 angstroms.
  • the planarization layer 13 has a third opening 131 and a fourth opening 132. After the planarization layer is formed on the entire surface by spin coating or evaporation (Evaporation), the entire planarization layer A third opening 131 and a fourth opening 132 are formed thereon, the third opening 131 is located in the first area 101 of the substrate, and the fourth opening 132 is located in the second area 102 of the substrate.
  • a passivation layer with openings can be formed on the substrate.
  • the passivation layer is an inorganic layer for blocking the ions in the flattening layer 13 from entering the thin film transistor to prevent the ions from affecting the electrical performance of the thin film transistor.
  • the anode 141 is a reflective electrode, and the anode 141 is electrically connected to the drain electrode 1131 through the third opening 131 on the planarization layer 13, and the electrical signal input of the anode 141 is controlled through the thin film transistor 11.
  • the anode inputs holes to the organic light-emitting layer 17; on the other hand, it reflects the light emitted by the organic light-emitting layer 17 to the light-emitting direction.
  • the preparation materials include but are not limited to aluminum, silver or alloys thereof.
  • the second conductive layer 142 is provided in the same layer as the anode 141 and is formed by the same process as the anode 141.
  • the second conductive layer 142 is used to connect the first conductive layer 12 and the metal layer 16, and the second conductive layer 142 passes through
  • the fourth opening 132 is electrically connected to the first conductive layer 12, and the material of the second conductive layer 142 includes but is not limited to aluminum, silver or alloys thereof.
  • the pixel definition layer 15 is formed on the entire substrate and has a first opening 151 and a second opening 152.
  • the first opening 151 partially exposes the anode 141 and defines the light-emitting area of the substrate; the second opening 152 is located The second area 102 of the substrate and the second conductive layer 142 are partially exposed.
  • the pixel definition layer is an organic layer.
  • the preparation materials of the organic layer include but are not limited to polyimide, polymethyl methacrylate and phenolic resin. The thickness is 1 ⁇ m-2 ⁇ m.
  • the metal layer 16 is used to contact the transparent cathode 19 to prevent the large-size top-emission organic light emitting diode display 100 from affecting the display quality due to different resistance voltage drops of the transparent cathode 18 in different regions.
  • the metal layer 16 is formed on the pixel definition layer 15 and covers the pixel definition layer 15 outside the first opening 151, that is, the metal layer 16 is located in the area outside the light-emitting area, so that the area of the metal layer 16 is large and the transparent cathode is improved.
  • the metal layer 16 is electrically connected to the second conductive layer 142 through the second opening 152 on the pixel definition layer 15 to be electrically connected to the first conductive layer 12.
  • the metal layer 16 is formed by sputtering deposition and a yellow light process.
  • the thickness of the metal layer 16 is 300 nm to 800 nm.
  • the material of the metal layer 16 is copper, aluminum, silver or alloys thereof.
  • the array substrate further includes an organic light emitting layer 17 formed on the metal layer 16 and the pixel defining layer 15, and the cathode 19 is electrically connected to the metal layer 16 through an opening on the organic light emitting layer 17.
  • the organic light-emitting layer 17 is formed on the metal layer 16 and in the first opening 151.
  • the organic light-emitting layer 17 in the first opening 151 is in contact with the exposed portion of the anode 142 to facilitate the injection of holes output from the anode 142 into the organic light-emitting layer 17, and
  • the light emitting layer 17 is a white light organic light emitting layer to emit white light.
  • the organic light emitting layer 17 has a fifth opening 171 located in the first area 101 of the substrate and the second area 102 of the substrate.
  • the fifth opening 171 exposes the metal layer 16.
  • the organic light-emitting layer 17 is formed by vacuum evaporation, it is formed by yellow light process or fixed-point laser etching. Due to the large area of the metal layer 16 in this embodiment, the accuracy requirements of the yellowing process or fixed-point laser etching are reduced, and the contact area between the metal layer 16 and the subsequently formed cathode is large to ensure more reliable electrical transmission.
  • the cathode 19 is a transparent electrode or a semi-transparent electrode.
  • the cathode 19 is formed on the organic light-emitting layer 17 and the metal layer 16, and the cathode 19 contacts the metal layer 16 through the fifth opening 171 on the organic light-emitting layer 17.
  • the cathode 19 is formed by sputtering deposition, and the material of the cathode 19 includes indium tin oxide and indium zinc oxide.
  • the color film substrate includes a glass substrate and a color film layer and a black matrix formed on the substrate.
  • the color film layer includes a red photoresist, a green photoresist and a blue photoresist arranged in sequence, and the black matrix is arranged adjacent to each other. Between the two photoresists.
  • FIG. 3 is a schematic structural diagram of an organic light emitting diode display 200 according to a second embodiment of the application.
  • the organic light emitting diode display 200 is basically similar to the organic light emitting diode display 100 of the first embodiment, except that the first conductive layer 12 and the gate 111 are provided in the same layer, and the second conductive layer 142 penetrates the planarization layer 13 and the gate 111.
  • the via holes on the polar insulating layer and the interlayer insulating layer are electrically connected to the first conductive layer 12; the array substrate in this embodiment further includes an organic light emitting layer 17 and electrons formed on the metal layer 16 and the pixel definition layer 15 in sequence.
  • the transport layer 18 and the cathode 19 contact the metal layer 16 through the openings (171, 181) penetrating through the organic light-emitting layer 17 and the electron transport layer 18.
  • the opening on the organic light-emitting layer 17 is the fifth opening 171
  • the opening on the electron transport layer 18 It is the sixth opening 181.
  • FIG. 4 is a schematic structural diagram of an organic light emitting diode display 300 according to a third embodiment of the application.
  • the organic light emitting diode display 300 is basically similar to the organic light emitting diode display 100 of the first embodiment, except that the organic light emitting layer 17 is formed in the opening 151 of the pixel definition layer 15.
  • the organic light emitting layer 17 includes a red organic light emitting layer and a green light emitting layer.
  • the organic light emitting layer and the blue organic light emitting layer, the red organic light emitting layer emits red light, the green organic light emitting layer emits green light, and the blue organic light emitting layer emits blue light.
  • the organic light-emitting layer 17 is formed by vacuum evaporation or inkjet printing.
  • the array substrate further includes an electron transport layer 18 formed on the metal layer 16 and the pixel definition layer 15, and the cathode 19 is in contact with the metal layer 16 through an opening 181 on the electron transport layer 18.
  • the color film substrate includes a glass substrate and a black matrix formed on the glass substrate.
  • FIG. 5 is a schematic structural diagram of an organic light emitting diode display 400 according to a fourth embodiment of the application.
  • the organic light emitting diode display 400 is basically similar to the organic light emitting diode display 100. The difference is that the organic light emitting layer 17 is located between the pixel defining layer 15 and the metal layer 16. The metal layer 16 passes through the organic light emitting layer 17 and the pixel defining layer. The openings (152, 171) of 15 are electrically connected to the second conductive layer 142, the metal layer 16 covers the organic light emitting layer 17 outside the first opening 151, and the metal layer 16 is in contact with the cathode 19 outside the first opening 151.
  • the organic light emitting diode display 400 may also include functional layers such as an electron transport layer, an electron injection layer, a hole transport layer, and a hole injection layer.
  • the metal layer 16 can be in direct contact with the cathode, and the metal layer 16 can also be Located between the organic light-emitting layer, electron transport layer, electron injection layer, hole transport layer, hole injection layer and other functional layers and passes through the opening on the functional layer to contact the cathode, the metal layer 16 can also be located on the functional layer and pixel definition Between the layers 15, the larger the contact area between the cathode 19 and the metal layer 16, the more beneficial it is to avoid the difference in the display effect of the transparent cathode in different areas due to the resistance voltage drop in the large-size display panel.
  • the above embodiments respectively describe the provision of a metal layer in contact with the cathode, a second conductive layer connected to the metal layer, and a first conductive layer connected to the second conductive layer in a white light organic light emitting diode display and an RGB type organic light emitting diode display. Avoid the problem that the cathode resistance voltage drop in different regions of the top-emission organic light-emitting diode display in the large-size display panel is different, which affects the display quality.
  • the metal layer is located on the pixel definition layer and covers the pixel definition layer other than the first opening
  • the metal layer is located on the organic light-emitting layer and covers the organic light-emitting layer except the first opening.
  • the metal layer can be located at any position between the pixel definition layer and the cathode, and the metal layer is located at a position other than the first opening to ensure light transmittance;
  • the first conductive layer can be provided on the same layer as the gate electrode.
  • a conductive layer can also be provided in the same layer as the source and drain electrodes.
  • FIG. 6 is a flowchart of the first embodiment of the manufacturing method of the array substrate of the organic light emitting diode display of the present application.
  • the manufacturing method includes the following steps:
  • S10 Provide a substrate, and the substrate has a first area and a second area;
  • S11 While forming a plurality of thin film transistors in the first area of the substrate, forming a first conductive layer in the second area of the substrate.
  • the thin film transistors include gates, active layers, and source and drain electrodes;
  • a second conductive layer is formed on the same layer as the anode, located in the second area and electrically connected to the first conductive layer;
  • the metal layer is formed on the pixel definition layer and covers the pixel definition layer outside the first opening.
  • the manufacturing method further includes the following steps: forming an organic light-emitting layer on the metal layer and the pixel definition layer, and the cathode is in contact with the metal layer through an opening on the organic light-emitting layer, or,
  • An electron transport layer is formed on the metal layer and the pixel definition layer, and the cathode is in contact with the metal layer through the opening on the electron transport layer, or,
  • An organic light emitting layer and an electron transport layer are sequentially formed on the metal layer and the pixel sense layer, and the cathode is in contact with the metal layer through an opening penetrating the organic light emitting layer and the electron transport layer.
  • the method for manufacturing the array substrate of the organic light emitting diode display of the present application is to form a metal layer in contact with the cathode, a first conductive layer, and a second conductive layer.
  • the first conductive layer is electrically connected to the metal layer through the second conductive layer to avoid organic
  • the LED display has a problem that the display quality is affected by the difference in the voltage drop of the cathode resistance in different regions in the large-size display panel.

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Abstract

本申请提供一种阵列基板及其制造方法、有机发光二极管显示器，通过设置与阴极接触的金属层、第一导电层以及第二导电层，第一导电层通过第二导电层与金属层电性连接，以避免有机发光二极管显示器在大尺寸显示面板中由于不同区域的阴极电阻压降不同而影响显示品质的问题。

Description

阵列基板及其制造方法、有机发光二极管显示器 技术领域
本申请涉及显示技术领域，尤其涉及一种阵列基板及其制造方法、有机发光二极管显示器。
 背景技术
有机发光二极管（Organic Light Emitting Diode，OLED）显示器由于具有自发光、低功耗、高亮度以及高响应速度等高质量特性而拥有广阔的应用前景。有机发光二极管显示器包括顶发光型OLED显示器和底发光型OLED显示器，其中，顶发光型OLED显示器由于具有高开口率而应用于大尺寸高解析度显示面板，然而，顶发光型OLED显示器的阴极通常为具有高透明度的半导体材料，半导体材料由于阻抗较高，会导致供给电路距离不同而造成显示面板的不同区域的电阻压降（IR-Drop）程度不一，最终显示效果的区域不均匀而影响显示品质。
 技术问题
本申请的目的在于提供一种阵列基板及其制造方法、有机发光二极管显示器，以解决有机发光二极管显示器由于透明阴极电阻压降程度不一而影响显示品质的问题。
 技术解决方案
一种阵列基板，所述阵列基板包括：
一基板，所述基板具有第一区域以及第二区域；
多个薄膜晶体管，多个所述薄膜晶体管形成于所述基板的所述第一区域，所述薄膜晶体管包括栅极、有源层以及源漏电极；
第一导电层，所述第一导电层形成于所述基板的所述第二区域；
阳极，所述阳极形成于所述基板上且与所述漏电极电性连接；
第二导电层，所述第二导电层与所述阳极同层设置且位于所述第二区域，所述第二导电层与所述第一导电层电性连接；
像素定义层，所述像素定义层位于多个所述薄膜晶体管远离所述基板的一侧且具有第一开口和第二开口，所述第一开口使所述阳极部分显露，所述第二开口使所述第二导电层部分显露；
金属层，所述金属层形成于所述第一开口之外的所述像素定义层上，所述金属层通过所述像素定义层的所述第二开口与所述第二导电层电性连接；
阴极，所述阴极形成于所述金属层上方且与所述金属层接触。
在上述阵列基板中，所述金属层形成于所述像素定义层上且覆盖所述第一开口之外的所述像素定义层。
在上述阵列基板中，所述阵列基板还包括形成于所述金属层和所述像素定义层上的有机发光层，所述阴极通过所述有机发光层上的开口与所述金属层接触。
在上述阵列基板中，所述阵列基板还包括形成于所述金属层和所述像素定义层上的电子传输层，所述阴极通过所述电子传输层上的开口与所述金属层接触。
在上述阵列基板中，所述阵列基板还包括依次形成于所述金属层和所述像素定义层上的有机发光层和电子传输层，所述阴极通过贯穿所述有机发光层和所述电子传输层的开口与所述金属层接触。
在上述阵列基板中，所述阵列基板还包括有机发光层，所述有机发光层位于所述像素定义层以及所述金属层之间，所述金属层通过贯穿所述有机发光层和所述像素定义层的开口与所述第二导电层电性连接，所述金属层与所述第一开口之外的所述阴极接触。
在上述阵列基板中，所述第一导电层与所述源漏电极同层设置，或，所述第一导电层与所述栅极同层设置。
本申请提供一种阵列基板的制造方法，所述制造方法包括如下步骤：
提供一基板，所述基板具有第一区域和第二区域；
于所述基板的所述第一区域形成多个薄膜晶体管的同时，于所述基板的所述第二区域形成第一导电层，所述薄膜晶体管包括栅极、有源层以及源漏电极；
于所述基板上形成与所述漏电极电性连接的阳极的同时，形成与所述阳极同层设置、位于所述第二区域且与所述第一导电层电性连接的第二导电层；
于多个所述薄膜晶体管远离所述基板的一侧形成具有第一开口和第二开口的像素定义层，所述第一开口使所述阳极部分显露，所述第二开口使所述第二导电层部分显露；
于所述像素定义层上形成金属层，所述金属层通过所述像素定义层上的所述第二开口与所述第二导电层电性连接；
于所述金属层上方形成与所述金属层接触的阴极。
在上述阵列基板的制造方法中，所述金属层形成于所述像素定义层上且覆盖所述第一开口之外的所述像素定义层。
在上述阵列基板的制造方法中，所述制造方法还包括如下步骤：于所述金属层和所述像素定义层上形成有机发光层，所述阴极通过所述有机发光层上的开口与所述金属层接触，或，
于所述金属层和所述像素定义层上形成电子传输层，所述阴极通过所述电子传输层上的开口与所述金属层接触，或，
依次于所述金属层和所述像素定义层上形成有机发光层和电子传输层，所述阴极通过贯穿所述有机发光层和所述电子传输层的开口与所述金属层接触。
本申请还提供一种有机发光二极管显示器，所述有机发光二极管显示器阵列基板，所述阵列基板包括：
一基板，所述基板具有第一区域以及第二区域；
多个薄膜晶体管，多个所述薄膜晶体管形成于所述基板的所述第一区域，所述薄膜晶体管包括栅极、有源层以及源漏电极；
第一导电层，所述第一导电层形成于所述基板的所述第二区域；
阳极，所述阳极形成于所述基板上且与所述漏电极电性连接；
第二导电层，所述第二导电层与所述阳极同层设置且位于所述第二区域，所述第二导电层与所述第一导电层电性连接；
像素定义层，所述像素定义层位于多个所述薄膜晶体管远离所述基板的一侧且具有第一开口和第二开口，所述第一开口使所述阳极部分显露，所述第二开口使所述第二导电层部分显露；
金属层，所述金属层形成于所述第一开口之外的所述像素定义层上，所述金属层通过所述像素定义层的所述第二开口与所述第二导电层电性连接；
阴极，所述阴极形成于所述金属层上方且与所述金属层接触。
在上述有机发光二极管显示器中，述金属层形成于所述像素定义层上且覆盖所述第一开口之外的所述像素定义层。
在上述有机发光二极管显示器中，所述阵列基板还包括形成于所述金属层和所述像素定义层上的有机发光层，所述阴极通过所述有机发光层上的开口与所述金属层接触。
在上述有机发光二极管显示器中，所述阵列基板还包括形成于所述金属层和所述像素定义层上的电子传输层，所述阴极通过所述电子传输层上的开口与所述金属层接触。
在上述有机发光二极管显示器中，所述阵列基板还包括依次形成于所述金属层和所述像素定义层上的有机发光层和电子传输层，所述阴极通过贯穿所述有机发光层和所述电子传输层的开口与所述金属层接触。
在上述有机发光二极管显示器中，所述阵列基板还包括有机发光层，所述有机发光层位于所述像素定义层以及所述金属层之间，所述金属层通过贯穿所述有机发光层和所述像素定义层的开口与所述第二导电层电性连接，所述金属层与所述第一开口之外的所述阴极接触。
在上述有机发光二极管显示器中，所述第一导电层与所述源漏电极同层设置，或，所述第一导电层与所述栅极同层设置。
 有益效果
本申请提供一种阵列基板及其制造方法、有机发光二极管显示器，通过设置与阴极接触的金属层、第一导电层以及第二导电层，第一导电层通过第二导电层与金属层电性连接，以避免有机发光二极管显示器在大尺寸显示面板中由于不同区域的阴极电阻压降不同而影响显示品质的问题。
 附图说明
图1为本申请第一实施例有机发光二极管显示器的结构示意图；
图2为图1所示有机发光二极管显示器中金属层的俯视图；
图3为本申请第二实施例有机发光二极管显示器的结构示意图；
图4为本申请第三实施例有机发光二极管显示器的结构示意图；
图5为本申请第四实施例有机发光二极管显示器的结构示意图；
图6为本申请有机发光二极管显示器的阵列基板的制造方法的第一实施例流程图。
附图标注：
100、200、300 有机发光二极管显示器； 101第一区域； 102第二区域； 11薄膜晶体管； 111栅极； 112有源层； 1131源电极； 1132漏电极；12第一导电层； 13平坦化层； 131第三开口； 132第四开口； 141阳极；  142第二导电层； 15像素定义层； 151第一开口；152 第二开口； 16金属层； 17有机发光层；  171第五开口； 18电子传输层； 181第六开口；19阴极。
 本发明的实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述。显然，所描述的实施例仅仅是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
请参阅图1，其为本申请第一实施例有机发光二极管器100的结构示意图，有机发光二极管显示器100为顶发光型白光有机发光二极管显示器，有机发光二极管显示器100包括阵列基板及彩膜基板，阵列基板包括：
一基板，基板具有第一区域101以及第二区域102；
多个薄膜晶体管11，多个薄膜晶体管11形成于基板的第一区域101，薄膜晶体管11包括栅极111、有源层112以及源漏电极（1131，1132）；
第一导电层12，第一导电层12形成于基板的第二区域102；
阳极141，阳极141形成于基板上且与漏电极1132电性连接；
第二导电层142，第二导电层142与阳极141同层设置且位于第二区域102，第二导电层142与第一导电层12电性连接；
像素定义层15，像素定义层15位于多个薄膜晶体管11远离基板的一侧且具有第一开口151和第二开口152，第一开口151使阳极141部分显露，第二开口152使第二导电层142部分显露；
金属层16，金属层16形成于第一开口151之外的像素定义层15上，金属层16通过像素定义层15的第二开口152与第二导电层142电性连接；
阴极19，阴极19形成于金属层16上方且与金属层16接触。
在本实施例中，基板为玻璃基板或柔性基板，柔性基板为聚酰亚胺基板、聚对苯二甲酸乙二醇酯基板等。基板具有第一区域101和第二区域102，第一区域101和第二区域102均为非发光区域。
薄膜晶体管11位于基板的第一区域101，薄膜晶体管11可以为顶栅型薄膜晶体管或底栅型薄膜晶体管，薄膜晶体管11可以为多晶硅薄膜晶体管或金属氧化物薄膜晶体管。具体地，薄膜晶体管11为底栅型薄膜晶体管，薄膜晶体管11包括栅极111、有源层112以及源漏电极（1131，1132）。栅极111通过物理气相沉积工艺(例如，溅射、共同溅射、反应溅射或热蒸镀)及黄光工艺形成，栅极111的制备材料包括Al、Mo、Ti、W、Cu或者其合金。有源层112为金属氧化物半导体或者多晶硅。源漏电极（1131，1132）也通过物理气相沉积工艺(例如，溅射、共同溅射、反应溅射或热蒸镀)及黄光工艺形成，源漏电极（1131，1132）的制备材料包括Al、Mo、Ti、W、Cu或者其合金。在栅极111和有源层112之间形成有栅极绝缘层，栅极绝缘层形成于整个基板上，栅极绝缘层的制备方法为化学气相沉积，栅极绝缘层的制备材料为氮化硅、氧化硅或氮氧化硅。在有源层112和源漏电极（1131，1132）之间形成有层间绝缘层，层间绝缘层形成于整个基板上，层间绝缘层的制备方法为化学气相沉积，层间绝缘层的制备材料为氮化硅、氧化硅、氮氧化硅或三氧化二铝。
在本实施例中，第一导电层12用于输入电信号以输出至金属层16，第一导电层12与源漏电极（1131，1132）同层设置，且第一导电层12与源漏电极（1131，1132）是通过同一制程形成，即第一导电层12的制备材料为Al、Mo、Ti、W、Cu或者其合金。
在本实施例中，平坦化层13用于使形成有薄膜晶体管11的基板表面平整。平坦化层13覆盖薄膜晶体管11以及第一导电层12。平坦化层13为有机层，其厚度为20000埃-35000埃。平坦化层13上具有第三开口131和第四开口132，通过旋转涂布（Spin Coating）或蒸镀(Evaporation)以形成于整面的平坦化层于基板上之后，于整面平坦化层上形成第三开口131和第四开口132，第三开口131位于基板的第一区域101，第四开口132位于基板的第二区域102。在形成平坦层13之前，可于基板上形成具有开口的钝化层，钝化层为无机层以用于阻隔平坦化层13中的离子进入薄膜晶体管中，避免离子影响薄膜晶体管的电性能。
在本实施例中，阳极141为反射电极，阳极141通过平坦化层13上的第三开口131与漏电极1131电性连接，通过薄膜晶体管11以控制阳极141的电信号输入。一方面阳极向有机发光层17输入空穴，另一方面将有机发光层17发出的光反射至出光方向，其制备材料包括但不限于铝、银或其合金。
在本实施例中，第二导电层142与阳极141同层设置且与阳极141通过同一制程形成，第二导电层142用于连接第一导电层12以及金属层16，第二导电层142通过第四开口132与第一导电层12电性连接，第二导电层142的制备材料包括但不限于铝、银或其合金。
在本实施例中，像素定义层15形成于整面的基板上且具有第一开口151和第二开口152，第一开口151使阳极141部分显露且定义基板的发光区域；第二开口152位于基板的第二区域102且使第二导电层142部分显露，像素定义层为有机层，有机层的制备材料包括但不限于聚酰亚胺、聚甲基丙烯酸甲酯以及酚醛树脂，有机层的厚度为1微米-2微米。
在本实施例中，金属层16用于与透明阴极19接触，以避免大尺寸顶发光型有机发光二极管显示器100由于不同区域的透明阴极18的电阻压降不同而影响显示品质。金属层16形成于像素定义层15上且覆盖第一开口151之外的像素定义层15上，即金属层16位于发光区域之外的区域，以使得金属层16的面积大而改善透明阴极在大尺寸面板中不同区域的电阻压降不同的现象。如图2所示，其为金属层16的俯视图。金属层16通过像素定义层15上第二开口152与第二导电层142电性连接从而与第一导电层12电性连接。金属层16通过溅射沉积以及黄光工艺形成，金属层16的厚度为300纳米-800纳米，金属层16的制备材料为铜、铝、银或其合金。
在本实施例中，阵列基板还包括形成于金属层16和像素定义层15上的有机发光层17，阴极19通过有机发光层17上的开口与金属层16电性连接。有机发光层17形成于金属层16上以及第一开口151中，第一开口151中的有机发光层17与阳极142显露的部分接触以便于阳极142输出的空穴注入至有机发光层17，有机发光层17为白光有机发光层以发出白光。有机发光层17上具有第五开口171，第五开口171位于基板的第一区域101和基板的第二区域102，第五开口171使金属层16显露。有机发光层17通过真空蒸镀形成后，再通过黄光工艺或定点激光刻蚀形成。由于本实施例中，金属层16的面积大使得黄光工艺或定点激光刻蚀的精度要求降低且使得金属层16与后续形成的阴极接触的面积大保证电性传输更加可靠。
在本实施例中，阴极19为透明电极或半透明电极，阴极19形成于有机发光层17以及金属层16上，阴极19通过有机发光层17上的第五开口171与金属层16接触。阴极19通过溅射沉积形成，阴极19的制备材料包括氧化铟锡、氧化铟锌。
在本实施例中，彩膜基板包括玻璃基板以及形成于基板上的彩膜层以及黑色矩阵，彩膜层包括依次设置的红色光阻、绿色光阻以及蓝色光阻，黑色矩阵设置于相邻的两个光阻之间。
请参阅图3，其为本申请第二实施例有机发光二极管显示器200的结构示意图。有机发光二极管显示器200与第一实施例的有机发光二极管显示器100基本相似，不同之处在于，第一导电层12与栅极111同层设置，第二导电层142通过贯穿平坦化层13、栅极绝缘层以及层间绝缘层上的过孔与第一导电层12电性连接；本实施例中的阵列基板还包括依次形成于金属层16和像素定义层15上的有机发光层17和电子传输层18，阴极19通过贯穿有机发光层17和电子传输层18的开口（171，181）与金属层16接触，有机发光层17上的开口为第五开口171，电子传输层18上的开口为第六开口181。
请参阅图4，其为本申请第三实施例的有机发光二极管显示器300的结构示意图。有机发光二极管显示器300与第一实施例的有机发光二极管显示器100基本相似，不同之处在于，有机发光层17形成于像素定义层15的开口151中，有机发光层17包括红色有机发光层、绿色有机发光层以及蓝色有机发光层，红色有机发光层发出红光，绿色有机发光层发出绿光，蓝色有机发光层发出蓝光。有机发光层17通过真空蒸镀或者喷墨打印形成。阵列基板还包括形成于金属层16和像素定义层15上的电子传输层18，阴极19通过电子传输层18上的开口181与金属层16接触。彩膜基板包括玻璃基板及形成于玻璃基板上的黑色矩阵。
请参阅图5，其为本申请第四实施例有机发光二极管显示器400的结构示意图。有机发光二极管显示器400与有机发光二极管显示器100基本相似，不同之处在于，有机发光层17位于像素定义层15以及金属层16之间，金属层16通过贯穿所述有机发光层17和像素定义层15的开口（152，171）与第二导电层142电性连接，金属层16覆盖第一开口151之外的有机发光层17，金属层16与第一开口151之外的阴极19接触。
可以理解的是，有机发光二极管显示器400还可以包括电子传输层、电子注入层、空穴传输层以及空穴注入层等功能层，金属层16所在位置可以直接与阴极接触，金属层16也可以位于有机发光层、电子传输层、电子注入层、空穴传输层以及空穴注入层等功能层之间并通过功能层上的开口以与阴极接触，金属层16也可以位于功能层以及像素定义层15之间，阴极19与金属层16接触的面积越大，越有利于避免透明阴极在大尺寸显示面板中由于电阻压降导致不同区域显示效果差异。
上述实施例分别描述了在白光有机发光二极管显示器以及RGB型有机发光二极管显示器中设置与阴极接触的金属层、与金属层连接的第二导电层以及与第二导电层连接的第一导电层以避免顶发光型有机发光二极管显示器在大尺寸显示面板中不同区域的阴极电阻压降不同而影响显示品质的问题。本申请第一实施例中金属层位于像素定义层上且覆盖第一开口之外的像素定义层，第四实施例金属层位于有机发光层上且覆盖除第一开口之外的有机发光层，可以理解的是，金属层可以位于像素定义层以及阴极之间的任意位置，金属层位于除了第一开口之外的位置以保证透光率；第一导电层可以与栅极同层设置，第一导电层也可以与源漏电极同层设置。
请参阅图6，其为本申请有机发光二极管显示器的阵列基板的制造方法的第一实施例流程图。该制造方法包括如下步骤：
S10:提供一基板，基板具有第一区域和第二区域；
S11:于基板的第一区域形成多个薄膜晶体管的同时，于基板的第二区域形成第一导电层，薄膜晶体管包括栅极、有源层以及源漏电极；
S12:于基板上形成与漏电极电性连接的阳极的同时，形成与阳极同层设置、位于第二区域且与第一导电层电性连接的第二导电层；
S13:于多个薄膜晶体管远离基板的一侧形成具有第一开口和第二开口的像素定义层，第一开口使阳极部分显露，第二开口使第二导电层部分显露；
S14:于第一开口之外的像素定义层上形成金属层，金属层通过像素定义层上的第二开口与第二导电层电性连接；
S15:于金属层上方形成与金属层接触的阴极。
在本实施例中，金属层形成于像素定义层上且覆盖第一开口之外的像素定义层。
在本实施例中，该制造方法还包括如下步骤：于金属层和像素定义层上形成有机发光层，阴极通过有机发光层上的开口与金属层接触，或，
于金属层和像素定义层上形成电子传输层，阴极通过电子传输层上的开口与金属层接触，或，
依次于金属层和像素义层上形成有机发光层和电子传输层，阴极通过贯穿有机发光层和电子传输层的开口与金属层接触。
本申请有机发光二极管显示器的阵列基板的制造方法通过形成与阴极接触的金属层、第一导电层以及第二导电层，第一导电层通过第二导电层与金属层电性连接，以避免有机发光二极管显示器在大尺寸显示面板中由于不同区域的阴极电阻压降不同而影响显示品质的问题。
以上实施例的说明只是用于帮助理解本申请的技术方案及其核心思想；本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本申请各实施例的技术方案的范围。

Claims (17)

  1. 一种阵列基板，其中，所述阵列基板包括：
    一基板，所述基板具有第一区域以及第二区域；
    多个薄膜晶体管，多个所述薄膜晶体管形成于所述基板的所述第一区域，所述薄膜晶体管包括栅极、有源层以及源漏电极；
    第一导电层，所述第一导电层形成于所述基板的所述第二区域；
    阳极，所述阳极形成于所述基板上且与所述漏电极电性连接；
    第二导电层，所述第二导电层与所述阳极同层设置且位于所述第二区域，所述第二导电层与所述第一导电层电性连接；
    像素定义层，所述像素定义层位于多个所述薄膜晶体管远离所述基板的一侧且具有第一开口和第二开口，所述第一开口使所述阳极部分显露，所述第二开口使所述第二导电层部分显露；
    金属层，所述金属层形成于所述第一开口之外的所述像素定义层上，所述金属层通过所述像素定义层的所述第二开口与所述第二导电层电性连接；
    阴极，所述阴极形成于所述金属层上方且与所述金属层接触。
  2. 根据权利要求1所述的阵列基板，其中，所述金属层形成于所述像素定义层上且覆盖所述第一开口之外的所述像素定义层。
  3. 根据权利要求2所述的阵列基板，其中，所述阵列基板还包括形成于所述金属层和所述像素定义层上的有机发光层，所述阴极通过所述有机发光层上的开口与所述金属层接触。
  4. 根据权利要求2所述的阵列基板，其中，所述阵列基板还包括形成于所述金属层和所述像素定义层上的电子传输层，所述阴极通过所述电子传输层上的开口与所述金属层接触。
  5. 根据权利要求2所述的阵列基板，其中，所述阵列基板还包括依次形成于所述金属层和所述像素定义层上的有机发光层和电子传输层，所述阴极通过贯穿所述有机发光层和所述电子传输层的开口与所述金属层接触。
  6. 根据权利要求1所述的阵列基板，其中，所述阵列基板还包括有机发光层，所述有机发光层位于所述像素定义层以及所述金属层之间，所述金属层通过贯穿所述有机发光层和所述像素定义层的开口与所述第二导电层电性连接，所述金属层与所述第一开口之外的所述阴极接触。
  7. 根据权利要求1所述的阵列基板，其中，所述第一导电层与所述源漏电极同层设置，或，所述第一导电层与所述栅极同层设置。
  8. 一种阵列基板的制造方法，其中，所述制造方法包括如下步骤：
    提供一基板，所述基板具有第一区域和第二区域；
    于所述基板的所述第一区域形成多个薄膜晶体管的同时，于所述基板的所述第二区域形成第一导电层，所述薄膜晶体管包括栅极、有源层以及源漏电极；
    于所述基板上形成与所述漏电极电性连接的阳极的同时，形成与所述阳极同层设置、位于所述第二区域且与所述第一导电层电性连接的第二导电层；
    于多个所述薄膜晶体管远离所述基板的一侧形成具有第一开口和第二开口的像素定义层，所述第一开口使所述阳极部分显露，所述第二开口使所述第二导电层部分显露；
    于所述第一开口之外的所述像素定义层上形成金属层，所述金属层通过所述像素定义层上的所述第二开口与所述第二导电层电性连接；
    于所述金属层上方形成与所述金属层接触的阴极。
  9. 根据权利要求8所述的阵列基板的制造方法，其中，所述金属层形成于所述像素定义层上且覆盖所述第一开口之外的所述像素定义层。
  10. 根据权利要求8所述的阵列基板的制造方法，其中，所述制造方法还包括如下步骤：于所述金属层和所述像素定义层上形成有机发光层，所述阴极通过所述有机发光层上的开口与所述金属层接触，或，
    于所述金属层和所述像素定义层上形成电子传输层，所述阴极通过所述电子传输层上的开口与所述金属层接触，或，
    依次于所述金属层和所述像素定义层上形成有机发光层和电子传输层，所述阴极通过贯穿所述有机发光层和所述电子传输层的开口与所述金属层接触。
  11. 一种有机发光二极管显示器，其中，所述有机发光二极管显示器包括阵列基板，所述阵列基板包括：
    一基板，所述基板具有第一区域以及第二区域；
    多个薄膜晶体管，多个所述薄膜晶体管形成于所述基板的所述第一区域，所述薄膜晶体管包括栅极、有源层以及源漏电极；
    第一导电层，所述第一导电层形成于所述基板的所述第二区域；
    阳极，所述阳极形成于所述基板上且与所述漏电极电性连接；
    第二导电层，所述第二导电层与所述阳极同层设置且位于所述第二区域，所述第二导电层与所述第一导电层电性连接；
    像素定义层，所述像素定义层位于多个所述薄膜晶体管远离所述基板的一侧且具有第一开口和第二开口，所述第一开口使所述阳极部分显露，所述第二开口使所述第二导电层部分显露；
    金属层，所述金属层形成于所述第一开口之外的所述像素定义层上，所述金属层通过所述像素定义层的所述第二开口与所述第二导电层电性连接；
    阴极，所述阴极形成于所述金属层上方且与所述金属层接触。
  12. 根据权利要求11所述的有机发光二极管显示器，其中，所述金属层形成于所述像素定义层上且覆盖所述第一开口之外的所述像素定义层。
  13. 根据权利要求12所述的有机发光二极管显示器，其中，所述阵列基板还包括形成于所述金属层和所述像素定义层上的有机发光层，所述阴极通过所述有机发光层上的开口与所述金属层接触。
  14. 根据权利要求12所述的有机发光二极管显示器，其中，所述阵列基板还包括形成于所述金属层和所述像素定义层上的电子传输层，所述阴极通过所述电子传输层上的开口与所述金属层接触。
  15. 根据权利要求12所述的有机发光二极管显示器，其中，所述阵列基板还包括依次形成于所述金属层和所述像素定义层上的有机发光层和电子传输层，所述阴极通过贯穿所述有机发光层和所述电子传输层的开口与所述金属层接触。
  16. 根据权利要求11所述的有机发光二极管显示器，其中，所述阵列基板还包括有机发光层，所述有机发光层位于所述像素定义层以及所述金属层之间，所述金属层通过贯穿所述有机发光层和所述像素定义层的开口与所述第二导电层电性连接，所述金属层与所述第一开口之外的所述阴极接触。
  17. 根据权利要求11所述的有机发光二极管显示器，其中，所述第一导电层与所述源漏电极同层设置，或，所述第一导电层与所述栅极同层设置。
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113764489A (zh) * 2021-09-02 2021-12-07 深圳市华星光电半导体显示技术有限公司 阵列基板、阵列基板的制作方法以及显示装置

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110211994B (zh) * 2019-05-17 2021-11-02 深圳市华星光电半导体显示技术有限公司 阵列基板及其制造方法、有机发光二极管显示器
CN110911579B (zh) * 2019-11-13 2022-05-03 深圳市华星光电半导体显示技术有限公司 有机发光二极管显示面板及其制备方法
CN113284921B (zh) * 2020-02-19 2023-05-09 合肥鑫晟光电科技有限公司 阵列基板及显示装置
CN112164757A (zh) * 2020-09-24 2021-01-01 深圳市华星光电半导体显示技术有限公司 显示面板及其制作方法

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105552249A (zh) * 2016-03-16 2016-05-04 京东方科技集团股份有限公司 Oled显示基板及其制作方法、显示装置
WO2016176886A1 (zh) * 2015-05-06 2016-11-10 深圳市华星光电技术有限公司 柔性oled及其制作方法
CN109037277A (zh) * 2018-07-17 2018-12-18 深圳市华星光电技术有限公司 一种oled显示面板的制备方法及oled显示面板、显示装置
CN109166896A (zh) * 2018-09-03 2019-01-08 深圳市华星光电半导体显示技术有限公司 显示面板及其制作方法
CN109728054A (zh) * 2019-01-02 2019-05-07 京东方科技集团股份有限公司 显示面板及其制备方法、显示装置
CN110211994A (zh) * 2019-05-17 2019-09-06 深圳市华星光电半导体显示技术有限公司 阵列基板及其制造方法、有机发光二极管显示器

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107611283B (zh) * 2017-10-13 2023-10-17 深圳市华星光电半导体显示技术有限公司 Oled面板的制作方法及oled面板

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2016176886A1 (zh) * 2015-05-06 2016-11-10 深圳市华星光电技术有限公司 柔性oled及其制作方法
CN105552249A (zh) * 2016-03-16 2016-05-04 京东方科技集团股份有限公司 Oled显示基板及其制作方法、显示装置
CN109037277A (zh) * 2018-07-17 2018-12-18 深圳市华星光电技术有限公司 一种oled显示面板的制备方法及oled显示面板、显示装置
CN109166896A (zh) * 2018-09-03 2019-01-08 深圳市华星光电半导体显示技术有限公司 显示面板及其制作方法
CN109728054A (zh) * 2019-01-02 2019-05-07 京东方科技集团股份有限公司 显示面板及其制备方法、显示装置
CN110211994A (zh) * 2019-05-17 2019-09-06 深圳市华星光电半导体显示技术有限公司 阵列基板及其制造方法、有机发光二极管显示器

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113764489A (zh) * 2021-09-02 2021-12-07 深圳市华星光电半导体显示技术有限公司 阵列基板、阵列基板的制作方法以及显示装置

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