WO2020220496A1 - 改善goa电路电磁辐射的驱动装置及其方法 - Google Patents

改善goa电路电磁辐射的驱动装置及其方法 Download PDF

Info

Publication number
WO2020220496A1
WO2020220496A1 PCT/CN2019/099088 CN2019099088W WO2020220496A1 WO 2020220496 A1 WO2020220496 A1 WO 2020220496A1 CN 2019099088 W CN2019099088 W CN 2019099088W WO 2020220496 A1 WO2020220496 A1 WO 2020220496A1
Authority
WO
WIPO (PCT)
Prior art keywords
clock signal
electromagnetic radiation
improving
goa
frequency
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2019/099088
Other languages
English (en)
French (fr)
Inventor
杨铮
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
Original Assignee
Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd filed Critical Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
Publication of WO2020220496A1 publication Critical patent/WO2020220496A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0267—Details of drivers for scan electrodes, other than drivers for liquid crystal, plasma or OLED displays

Definitions

  • the present disclosure relates to the field of display technology, and in particular to a driving device and method for improving electromagnetic radiation of GOA circuits.
  • GOA Gate Driver On Array
  • GOA circuits due to the electromagnetic radiation of the circuit It is a superposition effect. The energy of each frequency multiplication point emitted by different modules is superimposed, and the sum of this energy cannot exceed the standard at each frequency multiplication point.
  • the known prior art improves the electromagnetic radiation problem of the GOA circuit by adjusting the rising or falling edge time of the GOA clock signal.
  • the existing GOA clock signal adjustment parameters cannot completely improve the electromagnetic radiation problem.
  • the present disclosure provides a driving device and a method for improving the electromagnetic radiation of the GOA circuit, and solves the technical problem that the high-order harmonic energy generated by the GOA circuit clock signal in the prior art exceeds the standard for meeting electromagnetic radiation, resulting in non-compliance with national standards.
  • the present disclosure provides a method for improving the electromagnetic radiation of GOA circuit, including the following steps:
  • step S10 The timing controller provides an initial clock signal to the level converter, and the fundamental frequency of the initial clock signal depends on the resolution of the final display, and then step S20 is performed;
  • step S20 The level converter performs level conversion on the initial clock signal to obtain a target clock signal, and then proceeds to step S30;
  • step S30 Provide the target clock signal to the GOA control circuit, and calculate the harmonic energy of each frequency multiplication point by Fourier transform according to the frequency of the target clock signal, and superimpose the energy of the corresponding frequency point of the core board part at the same time , Then proceed to step S40;
  • step S40 Compare the superimposed harmonic energy of each frequency doubling point with the standard of electromagnetic radiation to determine whether the harmonic energy of each frequency doubling point exceeds the standard, and then proceed to step S50;
  • step S50 If the harmonic energy of each frequency multiplication point exceeds the standard, adjust the duty cycle of the initial clock signal, and then proceed to step S10; if the harmonic energy of each frequency multiplication point does not exceed the standard, then proceed to step S10 S60; and
  • the GOA control circuit outputs a corresponding gate scan driving signal to drive the display panel to generate current.
  • the fundamental frequency of the initial clock signal is 16.5khz.
  • the duty cycle adjustment range of the initial clock signal is 40%-60%.
  • the fundamental frequency energy of the target clock signal has a maximum value.
  • the embodiment of the present disclosure provides a driving device for improving the electromagnetic radiation of the GOA circuit, including:
  • a timing controller for adjusting the duty cycle of the initial clock signal and outputting the initial clock signal
  • a level converter connected to the timing controller, and used for level conversion of the received initial clock signal to obtain a target clock signal
  • a GOA control circuit connected to the level converter, for receiving the target clock signal, wherein the target clock signal generates harmonic energy at each frequency multiplication point, and the GOA control circuit is based on the target clock signal
  • the display panel is driven to generate current.
  • the fundamental frequency of the initial clock signal depends on the resolution of the final display.
  • the fundamental frequency of the initial clock signal is 16.5khz.
  • the adjustable range of the duty cycle of the initial clock signal is 40%-60%.
  • the fundamental frequency energy of the target clock signal has the maximum value.
  • the embodiment of the present disclosure provides a method for improving the electromagnetic radiation of GOA circuit, including the following steps:
  • step S10 The timing controller provides an initial clock signal to the level converter, and then proceeds to step S20;
  • step S20 The level converter performs level conversion on the initial clock signal to obtain a target clock signal, and then proceeds to step S30;
  • step S30 Provide the target clock signal to the GOA control circuit, calculate the harmonic energy of each frequency multiplication point according to the frequency of the target clock signal, and superimpose the energy of the corresponding frequency point of the movement board part at the same time, and then proceed to step S40 ;
  • step S40 Compare the superimposed harmonic energy of each frequency doubling point with the standard of electromagnetic radiation to determine whether the harmonic energy of each frequency doubling point exceeds the standard, and then proceed to step S50;
  • step S50 If the harmonic energy of each frequency multiplication point exceeds the standard, adjust the duty cycle of the initial clock signal, and then proceed to step S10; if the harmonic energy of each frequency multiplication point does not exceed the standard, then proceed to step S10 S60; and
  • the GOA control circuit outputs a corresponding gate scan driving signal to drive the display panel to generate current.
  • the fundamental frequency of the initial clock signal depends on the resolution of the final display.
  • the fundamental frequency of the initial clock signal is 16.5khz.
  • the duty cycle adjustment range of the initial clock signal is 40%-60%.
  • the fundamental frequency energy of the target clock signal has the maximum value.
  • the harmonic energy of each frequency multiplication point of the target clock signal is calculated by Fourier transform.
  • the driving device and method for improving the electromagnetic radiation of the GOA circuit provided by the present disclosure can adjust the distribution of harmonic energy by adjusting the duty cycle of the clock signal of the GOA control circuit, and change the corresponding different magnification
  • the magnitude of the high-order harmonic energy reduces the total energy of the corresponding frequency points of the GOA control circuit and the core board part, so that the whole can meet the electromagnetic radiation standard.
  • FIG. 1 is a schematic structural diagram of a driving device for improving the electromagnetic radiation of the GOA circuit provided by the first embodiment of the disclosure
  • FIG. 2 is a harmonic spectrum energy waveform diagram of a GOA circuit provided in the first embodiment of the disclosure
  • FIG. 3 is a flow chart of a method for improving electromagnetic radiation of GOA circuit provided by the second embodiment of the disclosure.
  • FIG. 5 is a harmonic energy waveform diagram of a clock signal with a duty ratio of 60% provided in the second embodiment of the disclosure
  • FIG. 6 is a harmonic energy waveform diagram of a clock signal with a duty ratio of 40% provided in the second embodiment of the disclosure.
  • the present disclosure is directed to the prior art driving device and method for improving the electromagnetic radiation of GOA circuit.
  • the high-order harmonic energy generated by the clock signal of the GOA circuit exceeds the electromagnetic radiation standard and will not meet the national 3C standard, and sales are not allowed.
  • the embodiments provided by the present disclosure can solve this defect.
  • the driving device 100 for improving the electromagnetic radiation of the GOA circuit provided by this embodiment includes:
  • a timing controller (Timer Control Register, TCON) 101 is used to adjust the duty cycle of the initial clock signal CK and output the initial clock signal CK;
  • the level converter 102 is connected to the timing controller 101, and is used to perform level conversion on the received initial clock signal CK to obtain a target clock signal CK';
  • the GOA control circuit 103 is connected to the level shifter 102 and is configured to receive the target clock signal CK'.
  • the target clock signal CK' generates harmonic energy at each frequency multiplication point of the clock frequency, and the GOA
  • the control circuit 103 drives the display panel 104 to generate current according to the target clock signal CK'.
  • the timing controller 101 is electrically connected to the level shifter 102, and the level shifter 102 is electrically connected to the GOA control circuit 103.
  • the timing controller 101 is used to output an initial clock signal CK to the level shifter 102, and the level shifter 102 is used to convert the input low-level initial clock signal CK into a high-level
  • the target clock signal CK' increases the voltage peak value of the initial clock signal CK, so that the peak value of the high-level target clock signal CK' is greater than the peak value of the low-level initial clock signal CK, so that the The target clock signal CK' can overcome the attenuation of the transfer process and drive the GOA control circuit 103 to complete the subsequent driving process of the display panel 104.
  • the initial clock signal CK undergoes level conversion by the level converter 102, and after obtaining the target clock signal CK', it is passed to the GOA circuit 103, and the target clock signal CK' will be at each frequency multiplication point. Generate harmonic energy.
  • the fundamental frequency of the initial clock signal CK depends on the resolution of the final display. Depending on the resolution of the final display, the fundamental frequency of the initial clock signal CK may be different. For example, when the final display resolution is 3840*2160, a clock signal with a fundamental frequency of 16.5khz can be selected. Since there is a strong interference signal at the higher harmonic frequency of the clock signal, that is, the There may be interference signals on the second, third, fourth... and other high-order harmonics of the target clock signal CK', causing electromagnetic radiation.
  • the second, third, fourth... The wave frequencies are 33khz, 49.5khz, 66khz...
  • Figure 2 shows the harmonic spectrum energy waveform diagram of the GOA control circuit 103.
  • the initial The duty cycle of the clock signal CK is used to adjust the spectral distribution of its harmonic energy, and then adjust the energy of the over-standard frequency point to meet the electromagnetic radiation standard.
  • the duty cycle of the initial clock signal CK is usually adjusted in a range of 40% to 60%, wherein when the duty cycle of the initial clock signal CK is 50%, the base frequency energy of the target clock signal CK' is the largest . As the duty cycle increases or decreases, the fundamental frequency energy of the target clock signal CK' decreases, and the harmonic energy of the target clock signal CK' increases at part of the frequency multiplication point, and at part The energy decreases at the doubling point.
  • the method for improving the electromagnetic radiation of the GOA circuit provided by this embodiment adopts the driving device 100 for improving the electromagnetic radiation of the GOA circuit in the first embodiment, and includes the following steps:
  • step S10 The timing controller 101 provides the initial clock signal CK to the level converter 102, and then proceeds to step S20;
  • the timing controller 101 is electrically connected to the level shifter 102, and the timing controller 101 outputs the initial clock signal CK with a certain duty cycle to the level shifter 102.
  • step S20 The level converter 102 performs level conversion on the initial clock signal CK to obtain a target clock signal CK', and then proceeds to step S30;
  • the level converter 102 is electrically connected to the GOA control circuit 103, and the level converter 102 performs level conversion on the received initial clock signal CK to increase the initial clock signal.
  • the voltage peak value of the signal CK makes the voltage peak value of the target clock signal CK' at a high level greater than the voltage peak value of the initial clock signal CK at a low level, so that the target clock signal CK' can overcome the transfer process
  • the GOA control circuit 103 is driven by attenuation, and the subsequent driving process of the display panel 104 is completed.
  • step S30 Provide the target clock signal CK' to the GOA control circuit 103, and calculate the harmonic energy of each frequency multiplication point according to the frequency of the target clock signal CK', and superimpose the energy of the corresponding frequency point of the movement board part at the same time , Then proceed to step S40;
  • the harmonic energy distribution of the target clock signal CK' at each frequency multiplication point is calculated according to the Fourier transform, and the fundamental frequency of the initial clock signal CK depends on the resolution of the final display, according to the resolution of the final display
  • the fundamental frequency of the initial clock signal CK will be different depending on the rate. For example, when the final display resolution is 3840*2160, a clock signal with a fundamental frequency of 16.5khz can be selected.
  • the duty cycle of the initial clock signal CK is 50%
  • the harmonic energy distribution of the target clock signal CK' at each frequency point is shown in FIG. 4; when the duty cycle of the initial clock signal CK When it is 60%, the harmonic energy distribution of the target clock signal CK' at each frequency point is shown in FIG. 5; when the duty cycle of the initial clock signal CK is 40%, the target clock signal CK
  • the harmonic energy distribution at each frequency point is shown in Figure 6.
  • step S40 Compare the superimposed total harmonic energy of each frequency doubling point with the electromagnetic radiation standard to determine whether the total harmonic energy of each frequency doubling point exceeds the standard, and then proceed to step S50;
  • step S50 If the total harmonic energy of each frequency multiplication point exceeds the standard, adjust the duty cycle of the initial clock signal CK, and then proceed to step S10; if the total harmonic energy of each frequency multiplication point does not exceed the standard, then Then proceed to step S60;
  • the adjustment range of the duty cycle of the initial clock signal CK is between 40% and 60%. Therefore, the specific value of the duty cycle of the initial clock signal CK can be designed according to specific design. Make matching adjustments. As shown in FIGS. 3, 4, and 5, when the duty cycle of the initial clock signal CK is 50%, the base frequency energy of the target clock signal CK' is the largest. As the duty cycle increases or decreases, the fundamental frequency energy of the target clock signal CK' decreases.
  • the high-order harmonic energy of the target clock signal CK' increases at part of the frequency multiplication point and decreases at the part of the frequency multiplication point, for example, as
  • the duty cycle increases from 50% to 60%
  • the energy of the second, fourth, and fifth harmonics increases, and the energy of the third harmonic decreases; for example, as the duty cycle decreases from 50% to 40 %, the energy of the second and fourth harmonics increases, and the energy of the third and fifth harmonics decreases.
  • the GOA control circuit 103 outputs a corresponding gate scan driving signal to drive the display panel 104 to generate current.
  • the GOA control circuit 103 If after adjustment, the harmonic energy of each frequency multiplication point does not exceed the standard, the GOA control circuit 103 outputs a corresponding gate scan driving signal to drive the display panel 104 to generate current for image display.
  • the method for improving the electromagnetic radiation of the GOA circuit provided by the embodiments of the present disclosure, when the high-order harmonic energy of the target clock signal CK' exceeds the electromagnetic radiation standard, the duty cycle of the initial clock signal CK is adjusted, and then the whole is repeated. Therefore, the method steps provided in this embodiment can form a closed loop, which can improve the electromagnetic radiation problem of the GOA circuit 103 to a greater extent.
  • the beneficial effects are: the driving device and method for improving the electromagnetic radiation of the GOA circuit provided by the embodiments of the present disclosure, by adjusting the duty cycle of the GOA circuit clock signal, adjusting the distribution of its harmonic energy, and changing the corresponding high-order harmonics of different magnifications.
  • the size of the wave energy reduces its total energy to meet the electromagnetic radiation standard, thereby suppressing the interference of higher harmonics of the GOA clock signal.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Liquid Crystal Display Device Control (AREA)

Abstract

一种改善GOA电路电磁辐射的驱动装置(100)及其方法，其中改善GOA电路电磁辐射的驱动装置(100)包括：时序控制器(101)、电平转换器(102)以及GOA控制电路(103)，通过调整GOA控制电路(103)中时钟信号的占空比来调整其谐波能量的分布，改变对应不同倍率的高次谐波能量大小，降低其与机芯板部分的相应频率点的总能量，使其整体满足电磁辐射的标准。

Description

改善GOA电路电磁辐射的驱动装置及其方法 技术领域
本揭示涉及显示技术领域，尤其涉及一种改善GOA电路电磁辐射的驱动装置及其方法。
 背景技术
阵列栅极驱动(Gate driver On Array，简称GOA)技术是一种将栅极驱动集成电路(Gate Driver Integrated Circuit)集成在阵列(Array)基板上的技术，在GOA电路中，由于电路的电磁辐射是叠加效应，由不同模块所发射出的各个倍频点的能量叠加，此能量的总和在各个倍频点都不能超标。已知的现有技术是通过调整GOA时钟信号的上升沿或下降沿时间，来改善GOA电路的电磁辐射问题。然而，现有的GOA时钟信号调整的参数并不能完全改善该电磁辐射问题。
因此，需要提供一种新的改善GOA电路电磁辐射的驱动装置及其方法，来解决上述技术问题。
 技术问题
本揭示提供一种改善GOA电路电磁辐射的驱动装置及其方法，解决了现有技术中GOA电路时钟信号产生的高次谐波能量超出满足电磁辐射的标准，导致不符合国家标准的技术问题。
 技术解决方案
为解决上述问题，本揭示提供的技术方案如下：
本揭示提供一种改善GOA电路电磁辐射的方法，包括以下步骤：
S10：时序控制器向电平转换器提供初始时钟信号，所述初始时钟信号的基频取决于最终显示的分辨率，接着进行步骤S20；
S20：所述电平转换器对所述初始时钟信号进行电平转换，获得目标时钟信号，接着进行步骤S30；
S30：将所述目标时钟信号提供给GOA控制电路，并根据所述目标时钟信号的频率通过傅里叶变换计算得到各个倍频点的谐波能量，同时叠加机芯板部分相应频点的能量，接着进行步骤S40；
S40：将叠加后的所述各个倍频点的谐波能量与电磁辐射的标准进行比较，判断所述各个倍频点的谐波能量是否超标，接着进行步骤S50；
S50：若所述各个倍频点的谐波能量超标，则调整所述初始时钟信号的占空比，接着进行步骤S10；若所述各个倍频点的谐波能量未超标，则接着进行步骤S60；以及
S60：所述GOA控制电路输出相应的栅极扫描驱动信号，驱动显示面板以产生电流。
根据本揭示实施例提供的改善GOA电路电磁辐射的方法，所述最终显示的分辨率为3840*2160时，所述初始时钟信号的基频为16.5khz。
根据本揭示实施例提供的改善GOA电路电磁辐射的方法，所述初始时钟信号的占空比调整范围为40%~60%。
根据本揭示实施例提供的改善GOA电路电磁辐射的方法，其中当所述初始时钟信号的占空比为50%时，所述目标时钟信号的基频能量具有最大值。
本揭示实施例提供一种改善GOA电路电磁辐射的驱动装置，包括：
时序控制器，用于调整初始时钟信号的占空比并输出所述初始时钟信号；
电平转换器，与所述时序控制器连接，用于将接收到的所述初始时钟信号进行电平转换，获得目标时钟信号；以及
GOA控制电路，与所述电平转换器连接，用于接收所述目标时钟信号，其中所述目标时钟信号在各个倍频点处产生谐波能量，所述GOA控制电路根据所述目标时钟信号驱动显示面板以产生电流。
根据本揭示实施例提供的改善GOA电路电磁辐射的驱动装置，所述初始时钟信号的基频取决于最终显示的分辨率。
根据本揭示实施例提供的改善GOA电路电磁辐射的驱动装置，所述最终显示的分辨率为3840*2160时，所述初始时钟信号的基频为16.5khz。
根据本揭示实施例提供的改善GOA电路电磁辐射的驱动装置，所述初始时钟信号的占空比的可调范围为40%~60%。
根据本揭示实施例提供的改善GOA电路电磁辐射的驱动装置，当所述初始时钟信号的占空比为50%时，所述目标时钟信号的基频能量具有最大值。
本揭示实施例提供一种改善GOA电路电磁辐射的方法，包括以下步骤：
S10：时序控制器向电平转换器提供初始时钟信号，接着进行步骤S20；
S20：所述电平转换器对所述初始时钟信号进行电平转换，获得目标时钟信号，接着进行步骤S30；
S30：将所述目标时钟信号提供给GOA控制电路，并根据所述目标时钟信号的频率计算得到各个倍频点的谐波能量，同时叠加机芯板部分相应频点的能量，接着进行步骤S40；
S40：将叠加后的所述各个倍频点的谐波能量与电磁辐射的标准进行比较，判断所述各个倍频点的谐波能量是否超标，接着进行步骤S50；
S50：若所述各个倍频点的谐波能量超标，则调整所述初始时钟信号的占空比，接着进行步骤S10；若所述各个倍频点的谐波能量未超标，则接着进行步骤S60；以及
S60：所述GOA控制电路输出相应的栅极扫描驱动信号，驱动显示面板以产生电流。
根据本揭示实施例提供的改善GOA电路电磁辐射的方法，所述初始时钟信号的基频取决于最终显示的分辨率。
根据本揭示实施例提供的改善GOA电路电磁辐射的方法，所述最终显示的分辨率为3840*2160时，所述初始时钟信号的基频为16.5khz。
根据本揭示实施例提供的改善GOA电路电磁辐射的方法，所述初始时钟信号的占空比调整范围为40%~60%。
根据本揭示实施例提供的改善GOA电路电磁辐射的方法，当所述初始时钟信号的占空比为50%时，所述目标时钟信号的基频能量具有最大值。
根据本揭示实施例提供的改善GOA电路电磁辐射的方法，所述步骤S30中，通过傅里叶变换计算得到所述目标时钟信号的各个倍频点的谐波能量。
 有益效果
本揭示的有益效果为：本揭示提供的改善GOA电路电磁辐射的驱动装置及其方法，通过调整GOA控制电路时钟信号的占空比，能够调整其谐波能量的分布，改变对应的不同倍率的高次谐波能量的大小，进而降低所述GOA控制电路与机芯板部分的相应频率点的总能量，使其整体满足电磁辐射的标准。
 附图说明
为了更清楚地说明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单介绍，显而易见地，下面描述中的附图仅仅是揭示的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本揭示实施例一提供的一种改善GOA电路电磁辐射的驱动装置的结构示意图；
图2为本揭示实施例一提供的为一种GOA电路的谐波频谱能量波形图；
图3为本揭示实施例二提供的一种改善GOA电路电磁辐射的方法的流程图；
图4为本揭示实施例二提供的一种时钟信号占空比为50%的谐波能量波形图；
图5为本揭示实施例二提供的一种时钟信号占空比为60%的谐波能量波形图；
图6为本揭示实施例二提供的一种时钟信号占空比为40%的谐波能量波形图。
 本发明的实施方式
以下各实施例的说明是参考附加的图示，用以例示本揭示可用以实施的特定实施例。本揭示所提到的方向用语，例如[上]、[下]、[前]、[后]、[左]、[右]、[内]、[外]、[侧面]等，仅是参考附加图式的方向。因此，使用的方向用语是用以说明及理解本揭示，而非用以限制本揭示。在图中，结构相似的单元是用以相同标号表示。
本揭示针对现有技术的改善GOA电路电磁辐射的驱动装置及其方法，GOA电路时钟信号产生的高次谐波能量超出满足电磁辐射的标准，将不能满足国家3C标准，不允许售卖。本揭示提供的实施例能够解决该缺陷。
实施例一
如图1所示，本实施例提供的改善GOA电路电磁辐射的驱动装置100，包括：
时序控制器(Timer Control Register，TCON)101，用于调整初始时钟信号CK的占空比并输出所述初始时钟信号CK；
电平转换器102，与所述时序控制器101连接，用于将接收到的所述初始时钟信号CK进行电平转换，获得目标时钟信号CK＇；以及
GOA控制电路103，与所述电平转换器102连接，用于接收所述目标时钟信号CK＇，所述目标时钟信号CK＇在时钟频率的各个倍频点处产生谐波能量，所述GOA控制电路103根据所述目标时钟信号CK＇驱动所述显示面板104以产生电流。
所述时序控制器101与所述电平转换器102进行电性连接，所述电平转换器102与所述GOA控制电路103进行电性连接。所述时序控制器101用于向所述电平转换器102输出初始时钟信号CK，所述电平转换器102用于将输入的低电平的所述初始时钟信号CK转换为高电平的目标时钟信号CK＇，加大所述初始时钟信号CK的电压峰值，使得高电平的所述目标时钟信号CK＇的峰值大于低电平的所述初始时钟信号CK的峰值，进而使得所述目标时钟信号CK＇能够克服传递过程的衰减而驱动所述GOA控制电路103，完成后续所述显示面板104的驱动过程。
所述初始时钟信号CK经过所述电平转换器102进行电平转换，获得所述目标时钟信号CK＇之后，传递给所述GOA电路103，所述目标时钟信号CK＇会在各个倍频点产生谐波能量。所述初始时钟信号CK的基频取决于最终显示的分辨率，根据所述最终显示的分辨率的不同，所述初始时钟信号CK的基频会有不同。例如，在所述最终显示的分辨率为3840*2160时，可选为基频为16.5khz的时钟信号，由于在时钟信号的高次谐波频点上存在较强的干扰信号，即所述目标时钟信号CK＇的2次、3次、4次……等高次谐波上可能存在干扰信号，引起电磁辐射，所述目标时钟信号CK＇的2次、3次、4次……谐波频率分别为33khz、49.5khz、66khz……。
如图2所示为所述GOA控制电路103的谐波频谱能量波形图，根据傅里叶变换可知，所述GOA控制电路103时钟信号的频谱能量Am=4/asinc（2m/a）,所述GOA控制电路103的时钟信号的频谱能量与a有关，又根据占空比的定义可计算得知所述GOA控制电路103时钟信号的占空比=2/a。因此，调整所述GOA控制电路103时钟信号的占空比可影响所述GOA控制电路103时钟信号的频谱能量的大小，进而调整其谐波能量的分布。
因此，随着所述初始时钟信号CK的占空比的变化，不同的谐波的频谱分量也跟着变化，因此，若存在任一频点的能量超出电磁辐射的标准，可通过调整所述初始时钟信号CK的占空比，来调整其谐波能量的频谱分布，进而调整该超标频点的能量，使其满足电磁辐射的标准。
所述初始时钟信号CK的占空比通常调整范围位于40%~60%，其中，当所述初始时钟信号CK的占空比为50%时，所述目标时钟信号CK＇的基频能量最大。随着占空比的增大或减小，所述目标时钟信号CK＇的基频能量减小，所述目标时钟信号CK＇的谐波能量，在部分倍频点处能量增大，在部分倍频点处能量减小。
实施例二
如图3所示，本实施例提供的改善GOA电路电磁辐射的方法，采用实施例一中的所述改善GOA电路电磁辐射的驱动装置100，包括以下步骤：
S10：时序控制器101向电平转换器102提供初始时钟信号CK，接着进行步骤S20；
具体地，所述时序控制器101与所述电平转换器102电性连接，所述时序控制器101向所述电平转换器102输出具有一定占空比的所述初始时钟信号CK。
S20：所述电平转换器102对所述初始时钟信号CK进行电平转换，获得目标时钟信号CK＇，接着进行步骤S30；
具体地，所述电平转换器102与所述GOA控制电路103进行电性连接，所述电平转换器102对接收到的所述初始时钟信号CK进行电平转换，加大所述初始时钟信号CK的电压峰值，使得高电平的所述目标时钟信号CK＇的电压峰值大于低电平的所述初始时钟信号CK的电压峰值，进而使得所述目标时钟信号CK＇能够克服传递过程的衰减而驱动所述GOA控制电路103，完成后续显示面板104的驱动过程。
S30：将所述目标时钟信号CK＇提供给GOA控制电路103，并根据所述目标时钟信号CK＇的频率计算得到各个倍频点的谐波能量，同时叠加机芯板部分相应频点的能量，接着进行步骤S40；
根据傅里叶变换计算得到所述目标时钟信号CK＇的位于各个倍频点的谐波能量分布，所述初始时钟信号CK的基频取决于最终显示的分辨率，根据所述最终显示的分辨率的不同，所述初始时钟信号CK的基频会有不同。例如，在所述最终显示的分辨率为3840*2160时，可选为基频为16.5khz的时钟信号。当所述初始时钟信号CK的占空比为50%时，所述目标时钟信号CK＇的在各个频点的谐波能量分布如图4所示；当所述初始时钟信号CK的占空比为60%时，所述目标时钟信号CK＇的在各个频点的谐波能量分布如图5所示；当所述初始时钟信号CK的占空比为40%时，所述目标时钟信号CK＇的在各个频点的谐波能量分布如图6所示。
S40：将叠加后的所述各个倍频点的谐波总能量与电磁辐射的标准进行比较，判断所述各个倍频点的谐波总能量是否超标，接着进行步骤S50；
S50：若所述各个倍频点的谐波总能量超标，则调整所述初始时钟信号CK的占空比，接着进行步骤S10；若所述各个倍频点的谐波总能量未超标，则接着进行步骤S60；
由于根据傅里叶级数展开，随着所述初始时钟信号CK的占空比的变化，不同的谐波的频谱分量也跟着变化，因此，若存在任一频点的能量超出电磁辐射的标准，可通过调整所述初始时钟信号CK的占空比，来调整所述目标时钟信号CK＇谐波能量的频谱分布，进而调整该超标频点的能量，直到使其满足电磁辐射的标准，避免产生电磁干扰。
根据多次实验结果得知，通常所述初始时钟信号CK的占空比的调整范围在40%~60%之间，因此，所述初始时钟信号CK的占空比的具体数值可根据具体设计进行匹配调整。如图3、图4、图5所示，当所述初始时钟信号CK的占空比为50%时，所述目标时钟信号CK＇的基频能量最大。随着占空比的增大或减小，所述目标时钟信号CK＇的基频能量减小。随着占空比的增大或减小，所述目标时钟信号CK＇的高次谐波能量，在部分倍频点处能量增大，在部分倍频点处能量减小，例如，随着占空比从50%增大至60%时，2次、4次、5次谐波能量增大，3次谐波能量减小；再如，随着占空比从50%减小至40%时，2次、4次谐波能量增大，3次、5次谐波能量减小。以及
S60：所述GOA控制电路103输出相应的栅极扫描驱动信号，驱动显示面板104产生电流。
若经过调整之后，所述各个倍频点的谐波能量未超标，则所述GOA控制电路103输出相应的栅极扫描驱动信号，驱动所述显示面板104产生电流，进行图像显示。
本揭示实施例提供的改善GOA电路电磁辐射的方法，当所述目标时钟信号CK＇的高次谐波能量超出电磁辐射标准时，则通过调整所述初始时钟信号CK的占空比，之后重复整个过程，因此本实施例提供的方法步骤可形成一个闭环，能够更大程度地改善所述GOA电路103的电磁辐射问题。
有益效果为：本揭示实施例提供的改善GOA电路电磁辐射的驱动装置及其方法，通过调整GOA电路时钟信号的占空比，调整其谐波能量的分布，改变对应的不同倍率的高次谐波能量的大小，降低其总能量，使其满足电磁辐射的标准，进而抑制GOA时钟信号的高次谐波的干扰。
综上所述，虽然本揭示已以优选实施例揭露如上，但上述优选实施例并非用以限制本揭示，本领域的普通技术人员，在不脱离本揭示的精神和范围内，均可作各种更动与润饰，因此本揭示的保护范围以权利要求界定的范围为准。

Claims (15)

  1. 一种改善GOA电路电磁辐射的方法，包括以下步骤：
    S10：时序控制器向电平转换器提供初始时钟信号，所述初始时钟信号的基频取决于最终显示的分辨率，接着进行步骤S20；
    S20：所述电平转换器对所述初始时钟信号进行电平转换，获得目标时钟信号，接着进行步骤S30；
    S30：将所述目标时钟信号提供给GOA控制电路，并根据所述目标时钟信号的频率通过傅里叶变换计算得到各个倍频点的谐波能量，同时叠加机芯板部分相应频点的能量，接着进行步骤S40；
    S40：将叠加后的所述各个倍频点的谐波能量与电磁辐射的标准进行比较，判断所述各个倍频点的谐波能量是否超标，接着进行步骤S50；
    S50：若所述各个倍频点的谐波能量超标，则调整所述初始时钟信号的占空比，接着进行步骤S10；若所述各个倍频点的谐波能量未超标，则接着进行步骤S60；以及
    S60：所述GOA控制电路输出相应的栅极扫描驱动信号，驱动显示面板以产生电流。
  2. 根据权利要求1所述的改善GOA电路电磁辐射的方法，其中所述最终显示的分辨率为3840*2160时，所述初始时钟信号的基频为16.5khz。
  3. 根据权利要求1所述的改善GOA电路电磁辐射的方法，其中所述初始时钟信号的占空比调整范围为40%~60%。
  4. 根据权利要求3所述的改善GOA电路电磁辐射的方法，其中当所述初始时钟信号的占空比为50%时，所述目标时钟信号的基频能量具有最大值。
  5. 一种改善GOA电路电磁辐射的驱动装置，包括：
    时序控制器，用于调整初始时钟信号的占空比并输出所述初始时钟信号；
    电平转换器，与所述时序控制器连接，用于将接收到的所述初始时钟信号进行电平转换，获得目标时钟信号；以及
    GOA控制电路，与所述电平转换器连接，用于接收所述目标时钟信号，其中所述目标时钟信号在各个倍频点处产生谐波能量，所述GOA控制电路根据所述目标时钟信号驱动显示面板以产生电流。
  6. 根据权利要求5所述的改善GOA电路电磁辐射的驱动装置，其中所述初始时钟信号的基频取决于最终显示的分辨率。
  7. 根据权利要求6所述的改善GOA电路电磁辐射的驱动装置，其中所述最终显示的分辨率为3840*2160时，所述初始时钟信号的基频为16.5khz。
  8. 根据权利要求5所述的改善GOA电路电磁辐射的驱动装置，其中所述初始时钟信号的占空比的可调范围为40%~60%。
  9. 根据权利要求5所述的改善GOA电路电磁辐射的驱动装置，其中当所述初始时钟信号的占空比为50%时，所述目标时钟信号的基频能量具有最大值。
  10. 一种改善GOA电路电磁辐射的方法，包括以下步骤：
    S10：时序控制器向电平转换器提供初始时钟信号，接着进行步骤S20；
    S20：所述电平转换器对所述初始时钟信号进行电平转换，获得目标时钟信号，接着进行步骤S30；
    S30：将所述目标时钟信号提供给GOA控制电路，并根据所述目标时钟信号的频率计算得到各个倍频点的谐波能量，同时叠加机芯板部分相应频点的能量，接着进行步骤S40；
    S40：将叠加后的所述各个倍频点的谐波能量与电磁辐射的标准进行比较，判断所述各个倍频点的谐波能量是否超标，接着进行步骤S50；
    S50：若所述各个倍频点的谐波能量超标，则调整所述初始时钟信号的占空比，接着进行步骤S10；若所述各个倍频点的谐波能量未超标，则接着进行步骤S60；以及
    S60：所述GOA控制电路输出相应的栅极扫描驱动信号，驱动显示面板以产生电流。
  11. 根据权利要求10所述的改善GOA电路电磁辐射的方法，其中所述初始时钟信号的基频取决于最终显示的分辨率。
  12. 根据权利要求11所述的改善GOA电路电磁辐射的方法，其中所述最终显示的分辨率为3840*2160时，所述初始时钟信号的基频为16.5khz。
  13. 根据权利要求10所述的改善GOA电路电磁辐射的方法，其中所述初始时钟信号的占空比调整范围为40%~60%。
  14. 根据权利要求13所述的改善GOA电路电磁辐射的方法，其中当所述初始时钟信号的占空比为50%时，所述目标时钟信号的基频能量具有最大值。
  15. 根据权利要求10所述的改善GOA电路电磁辐射的方法，其中所述步骤S30中，通过傅里叶变换计算得到所述目标时钟信号的各个倍频点的谐波能量。
PCT/CN2019/099088 2019-04-30 2019-08-02 改善goa电路电磁辐射的驱动装置及其方法 Ceased WO2020220496A1 (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201910358129.2A CN110047419A (zh) 2019-04-30 2019-04-30 改善goa电路电磁辐射的驱动装置及其方法
CN201910358129.2 2019-04-30

Publications (1)

Publication Number Publication Date
WO2020220496A1 true WO2020220496A1 (zh) 2020-11-05

Family

ID=67280386

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2019/099088 Ceased WO2020220496A1 (zh) 2019-04-30 2019-08-02 改善goa电路电磁辐射的驱动装置及其方法

Country Status (2)

Country Link
CN (1) CN110047419A (zh)
WO (1) WO2020220496A1 (zh)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110047419A (zh) * 2019-04-30 2019-07-23 深圳市华星光电半导体显示技术有限公司 改善goa电路电磁辐射的驱动装置及其方法

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1628422A (zh) * 2002-02-04 2005-06-15 Xemi公司 降低电磁干扰辐射的方法和系统
CN104852729A (zh) * 2015-04-14 2015-08-19 华为技术有限公司 一种抑制数字时钟的高次谐波干扰的电路和方法
US20160345395A1 (en) * 2015-05-22 2016-11-24 Apple Inc. Pfm scheme for boost and flyback converter in led backlight application
CN107481682A (zh) * 2017-07-21 2017-12-15 惠科股份有限公司 显示面板的驱动方法及驱动装置
CN107689203A (zh) * 2016-08-04 2018-02-13 瑞鼎科技股份有限公司 显示装置及其驱动电路
CN109345996A (zh) * 2018-12-05 2019-02-15 惠科股份有限公司 时序控制芯片、显示驱动组件和显示装置
CN109410881A (zh) * 2018-12-20 2019-03-01 深圳市华星光电技术有限公司 信号传输系统及信号传输方法
CN110047419A (zh) * 2019-04-30 2019-07-23 深圳市华星光电半导体显示技术有限公司 改善goa电路电磁辐射的驱动装置及其方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004348573A (ja) * 2003-05-23 2004-12-09 Renesas Technology Corp クロック生成回路およびそれを含むシステム
KR20130048632A (ko) * 2011-11-02 2013-05-10 삼성전자주식회사 클럭 버퍼회로 및 이를 포함하는 데이터 출력회로
CN103927962B (zh) * 2013-12-31 2017-02-08 厦门天马微电子有限公司 一种显示装置的驱动电路及其驱动方法
CN105975713B (zh) * 2016-05-20 2019-02-05 北京航空航天大学 一种采用源重建方法预测电子电路电磁辐射的方法
CN109064982B (zh) * 2018-08-06 2020-04-28 深圳市华星光电技术有限公司 Goa电路驱动系统及goa电路驱动方法与显示装置
CN109617622A (zh) * 2018-12-28 2019-04-12 杭州迪普科技股份有限公司 降低框式设备电磁干扰的方法、装置、设备及存储介质

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1628422A (zh) * 2002-02-04 2005-06-15 Xemi公司 降低电磁干扰辐射的方法和系统
CN104852729A (zh) * 2015-04-14 2015-08-19 华为技术有限公司 一种抑制数字时钟的高次谐波干扰的电路和方法
US20160345395A1 (en) * 2015-05-22 2016-11-24 Apple Inc. Pfm scheme for boost and flyback converter in led backlight application
CN107689203A (zh) * 2016-08-04 2018-02-13 瑞鼎科技股份有限公司 显示装置及其驱动电路
CN107481682A (zh) * 2017-07-21 2017-12-15 惠科股份有限公司 显示面板的驱动方法及驱动装置
CN109345996A (zh) * 2018-12-05 2019-02-15 惠科股份有限公司 时序控制芯片、显示驱动组件和显示装置
CN109410881A (zh) * 2018-12-20 2019-03-01 深圳市华星光电技术有限公司 信号传输系统及信号传输方法
CN110047419A (zh) * 2019-04-30 2019-07-23 深圳市华星光电半导体显示技术有限公司 改善goa电路电磁辐射的驱动装置及其方法

Also Published As

Publication number Publication date
CN110047419A (zh) 2019-07-23

Similar Documents

Publication Publication Date Title
CN109859696B (zh) 同步背光装置及其操作方法
US10796624B2 (en) Converter and display apparatus including the same
US9837024B2 (en) Scan driving circuit and driving method thereof, array substrate and display apparatus
CN104586435B (zh) 脉宽幅值可调的宽带高压窄脉冲系统及脉冲产生方法
JP7340014B2 (ja) バックライト輝度制御方法、装置及び表示デバイス
JP2009290867A (ja) 信号を合成するためのシステムおよび方法
JP2005534055A (ja) 液晶表示装置
US20140184582A1 (en) Display device, driving method of display device and data processing and outputting method of timing control circuit
WO2020220496A1 (zh) 改善goa电路电磁辐射的驱动装置及其方法
JPH05152908A (ja) クロツク信号生成回路
TWI805368B (zh) 驅動觸控面板之方法及其觸控控制電路
JP2001337735A (ja) クロック変調装置
KR20050008880A (ko) 신호 처리 장치 및 방법
KR20120113145A (ko) 멀티-레벨 인버터 구동 장치 및 방법
US7295048B2 (en) Method and apparatus for generating spread spectrum clock signals having harmonic emission suppressions
CN117475952B (zh) 消除水波纹的展频方法、显示面板及存储介质
CN216053836U (zh) 一种新型闸极驱动电路
WO2021109223A1 (zh) 亮度调节方法、调光装置及显示面板
US7948187B2 (en) Electronically controlling acoustic energy from piezoelectric transformers
CN116582010A (zh) 一种可编程交流电源的闭环反馈复合电路及控制方法
US20100271294A1 (en) Method for Reducing Resonance Energy of an LCD panel and Related LCD Device
CN204445946U (zh) 脉宽幅值可调的宽带高压窄脉冲系统
CN106208784A (zh) 一种逆变器数字控制响应延迟的控制方法
TWI683203B (zh) 用來進行訊號調整之方法及相關之時序控制器
Zhou et al. Research on the application of GaN HEMT in the fast corrector power supply system of HALF

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 19927170

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 19927170

Country of ref document: EP

Kind code of ref document: A1