WO2020218850A1 - 발광 다이오드 디스플레이 패널, 그것을 갖는 디스플레이 장치 및 그것을 제조하는 방법 - Google Patents
발광 다이오드 디스플레이 패널, 그것을 갖는 디스플레이 장치 및 그것을 제조하는 방법 Download PDFInfo
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- WO2020218850A1 WO2020218850A1 PCT/KR2020/005382 KR2020005382W WO2020218850A1 WO 2020218850 A1 WO2020218850 A1 WO 2020218850A1 KR 2020005382 W KR2020005382 W KR 2020005382W WO 2020218850 A1 WO2020218850 A1 WO 2020218850A1
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- light
- light emitting
- pads
- circuit board
- material layer
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- 238000000034 method Methods 0.000 title claims description 37
- 238000004519 manufacturing process Methods 0.000 title description 21
- 239000000463 material Substances 0.000 claims abstract description 92
- 239000002245 particle Substances 0.000 claims description 55
- 239000000758 substrate Substances 0.000 claims description 55
- 230000000903 blocking effect Effects 0.000 claims description 31
- 229910000679 solder Inorganic materials 0.000 claims description 11
- 229920000642 polymer Polymers 0.000 claims description 8
- 239000011347 resin Substances 0.000 claims description 7
- 229920005989 resin Polymers 0.000 claims description 7
- 229910016347 CuSn Inorganic materials 0.000 claims description 6
- 229910052738 indium Inorganic materials 0.000 claims description 4
- 229910052745 lead Inorganic materials 0.000 claims description 3
- -1 AuSn Inorganic materials 0.000 claims description 2
- 239000011810 insulating material Substances 0.000 description 29
- 239000004065 semiconductor Substances 0.000 description 20
- 239000011159 matrix material Substances 0.000 description 10
- UMIVXZPTRXBADB-UHFFFAOYSA-N benzocyclobutene Chemical compound C1=CC=C2CCC2=C1 UMIVXZPTRXBADB-UHFFFAOYSA-N 0.000 description 7
- 230000007547 defect Effects 0.000 description 7
- 239000004593 Epoxy Substances 0.000 description 6
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 6
- 239000011521 glass Substances 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- 229910052737 gold Inorganic materials 0.000 description 5
- 239000003086 colorant Substances 0.000 description 4
- 230000001678 irradiating effect Effects 0.000 description 4
- 229910052759 nickel Inorganic materials 0.000 description 4
- 238000005530 etching Methods 0.000 description 3
- 229910052594 sapphire Inorganic materials 0.000 description 3
- 239000010980 sapphire Substances 0.000 description 3
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- 229910010272 inorganic material Inorganic materials 0.000 description 2
- 239000011147 inorganic material Substances 0.000 description 2
- 238000002844 melting Methods 0.000 description 2
- 230000008018 melting Effects 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 239000011368 organic material Substances 0.000 description 2
- 238000000059 patterning Methods 0.000 description 2
- 238000007650 screen-printing Methods 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- 229910002601 GaN Inorganic materials 0.000 description 1
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 1
- VVQNEPGJFQJSBK-UHFFFAOYSA-N Methyl methacrylate Chemical compound COC(=O)C(C)=C VVQNEPGJFQJSBK-UHFFFAOYSA-N 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- 229910004205 SiNX Inorganic materials 0.000 description 1
- 239000011358 absorbing material Substances 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 238000000149 argon plasma sintering Methods 0.000 description 1
- 230000003190 augmentative effect Effects 0.000 description 1
- 229910052797 bismuth Inorganic materials 0.000 description 1
- 229910021418 black silicon Inorganic materials 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 239000006229 carbon black Substances 0.000 description 1
- 229910052681 coesite Inorganic materials 0.000 description 1
- 239000011370 conductive nanoparticle Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 229910052593 corundum Inorganic materials 0.000 description 1
- 229910052906 cristobalite Inorganic materials 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 230000001788 irregular Effects 0.000 description 1
- 239000002923 metal particle Substances 0.000 description 1
- 239000012778 molding material Substances 0.000 description 1
- 239000002071 nanotube Substances 0.000 description 1
- 239000002070 nanowire Substances 0.000 description 1
- 239000012811 non-conductive material Substances 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 229920003229 poly(methyl methacrylate) Polymers 0.000 description 1
- 229920000052 poly(p-xylylene) Polymers 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 239000004926 polymethyl methacrylate Substances 0.000 description 1
- 238000001338 self-assembly Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 229910052682 stishovite Inorganic materials 0.000 description 1
- 229910052718 tin Inorganic materials 0.000 description 1
- 229910052905 tridymite Inorganic materials 0.000 description 1
- 229910001845 yogo sapphire Inorganic materials 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/135—Liquid crystal cells structurally associated with a photoconducting or a ferro-electric layer, the properties of which can be optically or electrically varied
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
- H01L25/0753—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0093—Wafer bonding; Removal of the growth substrate
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/135—Liquid crystal cells structurally associated with a photoconducting or a ferro-electric layer, the properties of which can be optically or electrically varied
- G02F1/1351—Light-absorbing or blocking layers
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/135—Liquid crystal cells structurally associated with a photoconducting or a ferro-electric layer, the properties of which can be optically or electrically varied
- G02F1/1354—Liquid crystal cells structurally associated with a photoconducting or a ferro-electric layer, the properties of which can be optically or electrically varied having a particular photoconducting structure or material
- G02F1/1355—Materials or manufacture processes thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0033—Processes relating to semiconductor body packages
- H01L2933/0058—Processes relating to semiconductor body packages relating to optical field-shaping elements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0033—Processes relating to semiconductor body packages
- H01L2933/0066—Processes relating to semiconductor body packages relating to arrangements for conducting electric current to or from the semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/58—Optical field-shaping elements
Definitions
- the present disclosure relates to a light emitting diode display panel capable of safely transferring a plurality of light emitting elements for displays, an apparatus having the same, and a method of manufacturing the same.
- Light-emitting diodes are inorganic light sources and are used in various fields such as display devices, vehicle lamps, and general lighting. Light-emitting diodes have the advantages of long lifespan, low power consumption, and fast response speed, so they are rapidly replacing existing light sources.
- a display device implements various colors using a mixed color of blue, green, and red.
- a display device includes a plurality of pixels to implement various images, and each pixel includes blue, green, and red sub-pixels, and a color of a specific pixel is determined through the colors of these sub-pixels, and a combination of these pixels.
- the LED can emit light of various colors according to its material, and thus individual LED chips emitting blue, green, and red colors can be arranged on a two-dimensional plane to provide a display device.
- LEDs used in conventional large-sized electronic boards are manufactured as packages, and then light-emitting diode packages are arranged in pixel units, so individual packages have been mounted on circuit boards.
- a display of a small electronic product such as a smart watch, a mobile phone, a VR headset, or AR glasses, or a display such as a TV needs to be equipped with micro LEDs having a smaller size than that of a conventional LED package in order to realize clear image quality.
- the sub-pixels are arranged on a 2D plane, an area occupied by one pixel including blue, green, and red sub-pixels is relatively wide. Therefore, in order to arrange sub-pixels within a limited area, the area of each LED chip must be reduced. However, the reduction in the size of the LED chip may make it difficult to mount the LED chip, and furthermore, a reduction in the light emitting area is caused.
- the problem to be solved by the present disclosure is to provide an LED display device capable of safely transferring a plurality of light emitting elements to a circuit board.
- Another problem to be solved by the present disclosure is to provide a light emitting device transfer method capable of easily transferring light emitting devices manufactured from a wafer to a circuit board as a group.
- Another problem to be solved by the present disclosure is to provide a method and a display apparatus for safely transferring a light emitting device for a display capable of increasing the area of each sub-pixel within a limited pixel area.
- a display panel includes: a circuit board having pads; Light-emitting elements electrically connected to the pads and arranged on the circuit board; And a buffer material layer disposed between the circuit board and the light-emitting elements to fill a space between the circuit board and the light-emitting elements, wherein the buffer material layer is located under the upper surfaces of the light-emitting elements.
- a display device includes a display panel, the display panel comprising: a circuit board having pads; Light-emitting elements electrically connected to the pads and arranged on the circuit board; And a buffer material layer disposed between the circuit board and the light-emitting elements to fill a space between the circuit board and the light-emitting elements, wherein the buffer material layer is located under the upper surfaces of the light-emitting elements.
- FIG. 1 is a schematic perspective view illustrating display devices according to exemplary embodiments of the present disclosure.
- FIG. 2 is a schematic plan view illustrating a display panel according to an exemplary embodiment of the present disclosure.
- FIG. 3 is a schematic enlarged cross-sectional view taken along the cut line A-A of FIG. 2.
- FIG. 4 is a schematic plan view illustrating a light emitting device according to an exemplary embodiment of the present disclosure.
- FIG. 5 is a schematic cross-sectional view taken along line B-B of FIG. 4 to describe a light emitting device according to an exemplary embodiment of the present disclosure.
- FIG. 6 is a schematic circuit diagram of a light emitting device according to an embodiment of the present disclosure.
- FIG. 7 is a schematic circuit diagram of a light emitting device according to another embodiment of the present disclosure.
- FIG. 8 is a schematic plan view illustrating a light emitting device according to another exemplary embodiment of the present disclosure.
- FIG. 9 is a schematic cross-sectional view taken along line C-C of FIG. 8 to describe a light emitting device according to another exemplary embodiment of the present disclosure.
- FIG. 10 is a schematic circuit diagram of a light emitting device according to another exemplary embodiment of the present disclosure.
- FIG. 11 is a schematic circuit diagram of a light emitting device according to another embodiment of the present disclosure.
- 12A, 12B, 12C, 12D, and 12E are schematic cross-sectional views illustrating a method of manufacturing a display panel according to an exemplary embodiment of the present disclosure.
- 13A, 13B, 13C, 13D, and 13E are schematic cross-sectional views illustrating a method of manufacturing a display panel according to another exemplary embodiment of the present disclosure.
- 14A, 14B, 14C, and 14D are schematic cross-sectional views illustrating a method of manufacturing a display panel according to still another exemplary embodiment of the present disclosure.
- 15A, 15B, 15C, and 15D are schematic cross-sectional views illustrating a method of manufacturing a display panel according to another exemplary embodiment of the present disclosure.
- 16A, 16B, 16C, 16D, and 16E are schematic cross-sectional views illustrating a method of manufacturing a display panel according to another exemplary embodiment of the present disclosure.
- 17A, 17B, 17C, 17D, and 17E are schematic cross-sectional views illustrating a method of manufacturing a display panel according to still another exemplary embodiment of the present disclosure.
- 18A, 18B, 18C, and 18D are schematic cross-sectional views illustrating a method of manufacturing a display panel according to still another exemplary embodiment of the present disclosure.
- a display panel includes: a circuit board having pads; Light-emitting elements electrically connected to the pads and arranged on the circuit board; And a buffer material layer disposed between the circuit board and the light-emitting elements to fill a space between the circuit board and the light-emitting elements, wherein the buffer material layer is located under the upper surfaces of the light-emitting elements.
- the light-emitting elements can be safely collectively transferred to the circuit board.
- the buffer material layer may cover a surface of the circuit board positioned between the light emitting devices, and may have a plurality of grooves in a region between the two light emitting devices.
- each light emitting device may include electrode pads, and the electrode pads may be electrically connected to the pads. Furthermore, the grooves may have a shape corresponding to the shape of the electrode pads.
- the display panel may further include conductive particles disposed between pads on the circuit board and electrode pads of the light emitting device, and the pads and the electrode pads are formed on the conductive particles. Can be electrically connected by
- the buffer material layer may further include conductive particles spaced apart from each other in a region between the light emitting devices.
- the display panel may further include a light blocking material layer disposed in a region between the light emitting devices to block light emitted through side surfaces of the light emitting devices.
- the contrast ratio of the display panel may be improved by the light blocking material layer.
- the light blocking material layer may cover a part of the upper surface of the buffer material layer.
- the display panel may further include a solder layer formed between the pads and the electrode pads, and the pads and the electrode pads may be electrically connected by the solder layer.
- the light emitting devices include: a first LED stack, a second LED stack, and a third LED stack for emitting light of different wavelengths; Electrode pads electrically connected to the first to third LED stacks; And bump pads disposed on the electrode pads, and the bump pads may be electrically connected to pads on the circuit board.
- the plurality of grooves may have a shape corresponding to the shape of the bump pads.
- the display panel may further include a bonding layer between the pads of the circuit board and the bump pads, and the bonding layer may include In, Pb, AuSn, CuSn, or solder.
- the buffer material layer may be cured resin, polymer, BCB, or SOG.
- Each of the light emitting devices may include a first LED stack, a second LED stack, and a third LED stack, and the first to third LED stacks may emit light having different wavelengths.
- the light emitting devices may emit light generated by the stacking of the first to third LEDs through the stacking of the third LEDs.
- the third LED stack may be separated from the growth substrate. That is, the light emitting devices may not include the growth substrate used to grow the third LED stack.
- a gap between the light emitting devices may be greater than a width of the light emitting devices.
- the buffer material layer may cover the surface of the circuit board positioned between the light emitting devices, and may include conductive particles. Furthermore, the conductive particles may be located more densely in a region between the circuit board and the light emitting device than in the region between the light emitting devices.
- a display device includes a display panel, the display panel comprising: a circuit board having pads; Light-emitting elements electrically connected to the pads and arranged on the circuit board; And a buffer material layer disposed between the circuit board and the light-emitting elements to fill a space between the circuit board and the light-emitting elements, wherein the buffer material layer is located under the upper surfaces of the light-emitting elements.
- the buffer material layer may cover a surface of the circuit board positioned between the light emitting devices, and may have a plurality of grooves in a region between the two light emitting devices.
- each light-emitting device may include electrode pads, and the electrode pads may be electrically connected to the pads.
- the grooves may correspond to the shape of the electrode pads.
- the light emitting devices may each include a first LED stack, a second LED stack, and a third LED stack, and the first to third LED stacks may emit light of different wavelengths, and the light emitting device They may emit light generated from the first to third LED stacks through the third LED stack.
- the third LED stack may be separated from the growth substrate.
- the display device may further include a growth substrate disposed on the third LED stack.
- the display device may further include a light blocking material layer disposed in a region between the light emitting elements to block light emitted to the side of the light emitting elements.
- FIG. 1 is a schematic perspective view illustrating display devices according to exemplary embodiments of the present disclosure.
- the light emitting device of the present disclosure is not particularly limited, but may be particularly used in a VR display device such as a smart watch 1000a, a VR headset 1000b, or an AR display device such as augmented reality glasses 1000c.
- a display panel for implementing an image is mounted in the display device.
- 2 is a schematic plan view illustrating a display panel 1000 according to an exemplary embodiment of the present disclosure
- FIG. 3 is a cross-sectional view taken along a cut line A-A of FIG. 2.
- the display panel includes a circuit board 1001, light-emitting elements 100, and a buffer material layer 1005.
- the circuit board 1001 or the panel board may include a circuit for passive matrix driving or active matrix driving.
- the circuit board 1001 may include wirings and resistors therein.
- the circuit board 1001 may include wiring, transistors, and capacitors.
- the circuit board 1001 may also have pads 1003 on its upper surface for allowing electrical connection to a circuit disposed therein.
- the plurality of light emitting devices 100 are arranged on the circuit board 1001.
- the light-emitting elements 100 may be small-sized light-emitting elements having a size of a micro unit, and the width W1 may be 300 ⁇ m or less, further, 200 ⁇ m or less, and more specifically 100 ⁇ m or less.
- the light-emitting elements 100 may have a size of, for example, 200 ⁇ m ⁇ 200 ⁇ m or less, and further, 100 ⁇ m ⁇ 100 ⁇ m or less.
- the distance L1 between the light emitting elements 100 in the direction in which the light emitting elements 100 are aligned may be wider than the width W1 of the light emitting element 100 in that direction.
- the light-emitting element 100 has electrode pads 101, and the electrode pads 101 are electrically connected to the circuit board 1001.
- the electrode pads 101 may be bonded to the pads 1003 exposed on the circuit board 1001.
- the electrode pads 101 may have the same size or different sizes.
- the electrode pads 101 have a relatively large area, and the maximum width of each electrode pad may be about 1/4 to about 3/4 of the maximum width of the light emitting device 100. Meanwhile, the minimum width of each electrode pad may be about 1/5 to 3/4 or less of the minimum width of the light emitting device 100.
- the spacing between the electrode pads 101 may be about 3 ⁇ m or more, specifically 5 ⁇ m or more, and further 10 ⁇ m or more.
- Each light-emitting element 100 constitutes one pixel.
- each light emitting device 100 may include blue, green, and red subpixels.
- 4 is a schematic plan view illustrating a light emitting device 100 according to an embodiment of the present disclosure
- FIG. 5 is a cut line BB of FIG. 4 to describe the light emitting device 100 according to an embodiment of the present disclosure.
- It is a schematic cross-sectional view taken along the line
- FIG. 6 is a schematic circuit diagram for explaining the light emitting device 100 according to an embodiment of the present disclosure.
- the electrode pads 101a, 101b, 101c, and 101d are shown and described as being disposed above in FIGS. 4 and 5, but the light emitting device 100 is a circuit board as shown in FIG. It is flip-bonded on the (1001), in this case, the electrode pads (101a, 101b, 101c, 101d) are disposed below.
- the light emitting device 100 includes a first LED stack 23, a second LED stack 33, a third LED stack 43, a first bonding layer 30, and 2 A bonding layer 40, a first insulating layer 51, and electrode pads 101a, 101b, 101c, and 101d may be included.
- the first to third LED stacks 23, 33 and 43 are formed using semiconductor layers grown on different growth substrates, respectively, and the growth substrates are all first to third LED stacks 23 and 33 , 43). Accordingly, the light emitting device 100 may not include a substrate used to grow the first to third LED stacks 23, 33, and 43. However, the present disclosure is not necessarily limited thereto, and at least one growth substrate may remain without being removed.
- the first to third LED stacks 23, 33 and 43 are stacked in a vertical direction.
- the first LED stack 23, the second LED stack 33, and the third LED stack 43 are each of a first conductive type semiconductor layer 23a, 33a, or 43a, and a second conductive type semiconductor layer 23c, 33c. , Or 43c) and the active layers 23b, 33b, and 43b interposed therebetween.
- the active layer may in particular have a multiple quantum well structure.
- the second LED stack 33 is disposed under the first LED stack 23, and the third LED stack 43 is disposed under the second LED stack 33.
- the second LED stack 33 is disposed under the first LED stack 23 and the third LED stack 43 is disposed under the second LED stack 33, but it should be noted that, the light emitting element can be flip bonded, and thus, the top and bottom positions of these first to third LED stacks can be reversed.
- the first LED stack 23 emits light of a longer wavelength compared to the second and third LED stacks 33 and 43
- the second LED stack 33 has a longer wavelength than the third LED stack 43
- the first LED stack 23 may be an inorganic light emitting diode emitting red light
- the second LED stack 33 is an inorganic light emitting diode emitting green light
- the third LED stack 43 is an inorganic light emitting diode emitting blue light. It may be a light emitting diode.
- the first LED stack 23 may include an AlGaInP-based well layer
- the second LED stack 33 may include an AlGaInP-based or AlGaInN-based well layer
- the third LED stack 43 may include AlGaInN It may include a series of well layers.
- the light generated from the first LED stack 23 is the second and third LED stacks. (33, 43) can be transmitted to the outside.
- the second LED stack 33 emits light of a longer wavelength compared to the third LED stack 43
- the light generated by the second LED stack 33 passes through the third LED stack 43 to the outside. Can be released.
- the first conductivity-type semiconductor layers 23a, 33a, and 43a of each LED stack 23, 33, or 43 are n-type semiconductor layers, and the second conductivity-type semiconductor layers 23c, 33c, and 43c are p-type. It may be a semiconductor layer.
- the lower surfaces of the first to third LED stacks 23, 33, and 43 are all the first conductivity type semiconductor layers and the upper surfaces are both the second conductivity type semiconductor layers, but at least one The order of the LED stacking can be reversed.
- the top surface of the first LED stack 23 is a first conductivity type semiconductor layer 23a
- the top surfaces of the second LED stack 33 and the third LED stack 43 are both second conductivity type semiconductor layers. (33c, 43c).
- the first LED stack 23, the second LED stack 33 and the third LED stack 43 overlap each other.
- the first LED stack 23, the second LED stack 33, and the third LED stack 43 may have a light emitting area of substantially the same size.
- the first and second LED stacks 23 and 33 may have through holes for allowing electrical connection, and thus, may have a relatively small area compared to the third LED stack 43.
- the first bonding layer 30 bonds the first LED stack 23 to the second LED stack 33.
- the first bonding layer 30 may be disposed between the first conductivity type semiconductor layer 23a and the second conductivity type semiconductor layer 33c.
- the first bonding layer 30 may be formed of a transparent organic material layer or a transparent inorganic material layer.
- the organic material layer may include SU8, poly(methylmethacrylate: PMMA), polyimide, parylene, benzocyclobutene (BCB), and the like, and the inorganic material layer may include Al2O3, SiO2, SiNx, etc. Can be lifted.
- the first bonding layer 30 may be formed of spin-on-glass (SOG).
- the second bonding layer 40 couples the second LED stack 33 to the third LED stack 43. As shown, the second bonding layer 40 may be disposed between the first conductivity type semiconductor layer 33a and the second conductivity type semiconductor layer 43c. The second bonding layer 40 may be formed of the same material as the material described for the first bonding layer 30 above, and detailed descriptions will be omitted to avoid redundancy.
- the first insulating layer 51 may cover the first LED stack 23.
- the first insulating layer 51 may also cover side surfaces of the first to third LED stacks 23, 33, 43.
- the first insulating layer 51 may be formed of a silicon oxide film or a silicon nitride film.
- the electrode pads 101 may be disposed on the first insulating layer 51.
- the electrode pads 101a, 101b, 101c, and 101d may be electrically connected to the first to third LED stacks 23, 33 and 43 through the first insulating layer 51.
- the electrode pads 101a, 101b, and 101c are electrically connected to the anodes of the first to third LED stacks 23, 33, and 43, respectively, and the electrode pads 101d are first to It may be commonly connected to cathodes of the third LED stacks 23, 33, and 43.
- the first to third LED stacks 23, 33, 43 A transparent electrode may be formed on at least one of the second conductivity type semiconductor layers 23c, 33c, and 43c.
- the electrode pad 101d is commonly connected to the cathodes of the first to third LED stacks 23, 33, 43, but as shown in FIG. 101d) may be commonly connected to anodes of the first to third LEdD stacks 23, 33, and 43.
- the electrode pads 101a, 101b, and 10c may be connected to the cathodes of the first to third LED stacks 23, 33, and 43, respectively.
- the first to third LED stacks 23, 33, and 43 may be individually driven by the electrode pads 101a, 101b, 101c, and 101d.
- the electrode pads 101a, 101b, 101c, and 101d may be formed to have a relatively large area for stable electrical connection.
- each of the electrode pads 101a, 101b, 101c, and 101d may have an area larger than 1/4 of the top surface of the light emitting device 100.
- the buffer material layer 1005 fills a region between the light emitting devices 100 and the circuit board 1001. Further, the buffer material layer 1005 may cover the circuit board 1001 between the light emitting devices 100. The buffer material layer 1005 may cover side surfaces of the electrode pads 101 and may contact the lower surface of the light emitting device 100. The upper surface of the buffer material layer 1005 is generally located under the upper surface of the light emitting devices 100. A part of the buffer material layer 1005 may partially cover the side surface of the light emitting device 100. However, a portion of the buffer material layer 1005 covering the side surfaces of the light emitting devices does not exceed the height of the top surfaces of the light emitting devices 100.
- the buffer material layer 1005 may include conductive particles 1005a and 1005b dispersed in a matrix.
- the conductive particles 1005a are disposed apart from each other in a region between the pads 1003 and thus do not provide an electrical path.
- the conductive particles 1005a may have a generally spherical shape, but are not limited thereto.
- the conductive particles 1005b are disposed between the pads 1003 and the electrode pads 101 to electrically connect them.
- the conductive particles 1005b may have a shape having a larger width in the horizontal direction than the thickness in the vertical direction by being pressed by pressure.
- the conductive particles 1005b may be spaced apart from each other, but may contact each other.
- the conductive particles 1005a and 1005b may be, for example, metal particles such as Ni, Au, and Sn, or conductive nanoparticles such as nanotubes or nanowires.
- the conductive particles 1005a and 1005b may be conductive particles coated with a metal layer on the polymer particles.
- the conductive particles coated with the polymer with a metal layer are easily deformed by pressure, they are suitable for electrically connecting them between the pads 1003 and the electrode pads 101.
- the buffer material layer 1005 may also include a light-transparent matrix, but the present disclosure is not limited thereto.
- the buffer material layer 1005 may reflect or absorb light, and for this purpose, a matrix having a light reflecting property or a matrix having a light absorbing property may be used.
- a light absorbing material such as carbon black or a light scattering material such as silica may be contained in the matrix.
- the buffer material layer 1005 may have grooves 101g formed concave in a region between the light emitting devices 100.
- the grooves 101g correspond to the shape of the electrode pads 101.
- the grooves 101g may be formed by the electrode pads 101.
- the present disclosure is not limited thereto, and the buffer material layer 1005 may be removed in a region between the light emitting devices 100.
- the buffer material layer 1005 may be formed of, for example, an anisotropic conductive film (ACF).
- ACF anisotropic conductive film
- the conductive particles 1005a may be substantially uniformly distributed over the entire area of the buffer material layer 1005.
- the conductive particles 1005b are disposed closer to each other and are disposed more densely than the conductive particles 1005a.
- the buffer material layer 1005 may be formed using an anisotropic conductive paste (ACP), and further, the buffer material layer 1005 is self-assembled anisotropic including solder particles. It may be formed using a conductive paste (self assembly anisotropic conductive paste; SAP). Accordingly, the conductive particles 1005a may be aggregated between the pads 1003 and the electrode pads 101, and the conductive particles 1005a rarely remain or remain in the region between the light emitting devices 100. I can't.
- ACP anisotropic conductive paste
- SAP self assembly anisotropic conductive paste
- the buffer material layer 1005 may be a non-conductive material layer not including the conductive particles 1005a and 1005b, and the pads 1003 and the electrode pads 101 are In, Pb, AuSn. , CuSn or solder may be used to bond.
- the buffer material layer 1005 may be formed of spin-on-glass (SOG) or BCB.
- a light blocking material layer may be disposed in a region between the light emitting devices 100.
- the light-blocking material layer absorbs or reflects light, and thus prevents optical interference between light-emitting elements, thereby improving the contrast ratio of the display.
- the light blocking material layer may cover the light emitting devices 100. The light blocking material layer will be described in detail later through a method of manufacturing a display panel.
- FIG. 8 is a schematic plan view for explaining a light emitting device 100a according to another exemplary embodiment of the present disclosure
- FIG. 9 is a schematic cross-sectional view taken along line C-C of FIG. 8.
- the second insulating layer 61 may cover the first insulating layer 51 and the electrode pads 101a, 101b, 101c, and 101d.
- the second insulating layer 61 may be formed of a silicon oxide film or a silicon nitride film.
- the second insulating layer 61 may have openings exposing the electrode pads 101a, 101b, 101c, and 101d, and may be disposed on the exposed electrode pads of the bump pads 103a, 103b, 103c, and 103d. I can.
- the bump pads 103a, 103b, 103c, and 103d may be disposed in openings of the second insulating layer 61, and upper surfaces of the bump pads may be flat surfaces.
- the bump pads 103a, 103b, 103c, and 103d may be formed of Au/In, for example, Au may be formed to a thickness of 3 ⁇ m, and In may be formed to a thickness of about 1 ⁇ m.
- the light emitting device 100 may be bonded to the pads 1003 on the circuit board 1001 using In. In the present embodiment, bonding of the bump pads using In will be described, but the bonding is not limited to In, and may be bonded using Pb or AuSn.
- the upper surfaces of the bump pads 103a, 103b, 103c, and 103d are described and illustrated as being flat, but the present disclosure is not limited thereto.
- upper surfaces of the bump pads 103a, 103b, 103c, and 103d may be irregular, and some of the bump pads may be located on the second insulating layer 61.
- the first LED stack 23 is electrically connected to the bump pads 103a and 103d
- the second LED stack 33 is electrically connected to the bump pads 103b and 103d
- the third LED stack 43 may be electrically connected to the bump pads 103c and 103d. That is, the cathodes of the first LED stack 23, the second LED stack 33, and the third LED stack 43 are electrically connected to the bump pad 103d in common, and the anodes are the bump pads 103a and 103b, Connect electrically to 103c). Accordingly, the first to third LED stacks 23, 33, and 43 can be independently driven.
- the anodes of the first LED stack 23, the second LED stack 33, and the third LED stack 43 are electrically connected to the bump pad 103d in common, and the cathodes are the bump pads. Each of them may be electrically connected to each of 103a, 103b, and 103c.
- the bump pads 103a, 103b, 103c, and 103d may be connected to the pads 1003 of the circuit board 1001.
- 12A, 12B, 12C, 12D, and 12E are schematic cross-sectional views illustrating a method of manufacturing a display panel according to an exemplary embodiment of the present disclosure.
- a plurality of light emitting devices 100 are formed on a substrate 41.
- the light-emitting elements 100 include electrode pads 101. Since the light emitting device 100 is the same as described with reference to FIGS. 4 and 5, detailed descriptions are omitted to avoid redundancy.
- the substrate 41 may be a growth substrate for growing the semiconductor layers 43a, 43b, and 43c of the third LED stack 43.
- the substrate 41 may be a gallium nitride substrate, a SiC substrate, a sapphire substrate, or a patterned sapphire substrate.
- the second LED stack 33 may be bonded to the third LED stack 43 through the second bonding layer 40, and the first LED stack 23 is a second LED through the first bonding layer 30. It may be bonded to the stack 33.
- a patterning process may be performed to separate them into a plurality of light emitting device regions. Subsequently, the first insulating layer 51 and electrode pads 101 may be formed. Further, although not shown and described in detail, the first and second LED stacks 23 and 33 are used to electrically connect the electrode pads 101 and the first to third LED stacks 23, 33, and 43. ) May be formed through holes, and the second conductivity-type semiconductor layer 43c and the active layer 43b of the third LED stack 43 may be partially patterned. Also, as described above, a transparent electrode may be formed on the second conductive semiconductor layers 23c, 33c, and 43c of the first to third LED stacks 23, 33, and 43.
- an anisotropic conductive film 1005 is attached on a circuit board 1001 on which pads 1003 are formed in each pixel area.
- the anisotropic conductive film 1005 includes conductive particles 1005a and 1005b in a matrix.
- the anisotropic conductive film 1005 covers the pads 1003 on the circuit board 1001.
- the conductive particles 1005b in the anisotropic conductive film 1005 are positioned on the pads 1003.
- the conductive particles 1005a represent conductive particles located outside the upper region of the pads 1003, and the conductive particles 1005b represent conductive particles located above the pads 1003.
- the conductive particles 1005a and 1005b have the same structure and shape. Meanwhile, the thickness of the anisotropic conductive film 1005 positioned on the pads 1003 is similar to or greater than that of the electrode pads 101.
- the light emitting devices 100 formed on the substrate 41 are bonded to the pads 1003 through the anisotropic conductive film 1005.
- the light emitting elements 100 of the substrate 41 may be disposed more densely than the pixel regions. Accordingly, as shown, some of the light emitting devices 100 on the substrate 41 may be located between pixel regions and are not bonded to the pads 1003.
- the pad 1003 and the electrode pad 101 are electrically connected by conductive particles 1005b in the anisotropic conductive film 1005.
- the substrate 41 may be pressed toward the circuit board 1001, and thus, the conductive particles 1005b may be deformed in shape by the pressure.
- heat may be applied while the light emitting devices 100 are adhered to the anisotropic conductive film 1005.
- the matrix of the anisotropic conductive film 1005 may be cured by heat.
- a part of the anisotropic conductive film 1005 may at least partially fill the gaps between the light emitting devices 100, and thus, may at least partially cover the side surfaces of the light emitting devices 100.
- a laser is irradiated to the light-emitting elements 100 connected to the pads 1003 through the substrate 41 so that the light-emitting elements 100 It is separated from the substrate 41.
- the display panel 1000 in which the light emitting elements 100 are bonded to the pixel regions of the circuit board 1001 is manufactured.
- grooves 101g due to the electrode pads 101 may be formed on the surface of the anisotropic conductive film 1005.
- a light blocking material layer 1007 filling an area between the light emitting devices 100 may be further formed.
- the light-blocking material layer 1007 may cover side surfaces of the light-emitting elements 100, and further, may cover an upper surface of the light-emitting elements 100.
- the light blocking material layer 1007 may cover the buffer material layer 1005 covering the circuit board 1001 and may fill the grooves 101g.
- the light blocking material layer 1007 absorbs or reflects light emitted through the side surfaces of the light-emitting elements 100 to prevent light interference between the light-emitting elements.
- the light blocking material layer 1007 may be formed of, for example, a black molding material such as black epoxy or black silicon.
- the light blocking material layer 1007 may be formed of a light reflective material such as white epoxy or white silicon.
- the light-blocking material layer 1007 is shown to cover the upper surfaces of the light-emitting elements 100, but the light-blocking material layer 1007 fills the area between the light-emitting elements 100 It may be formed to expose the upper surface of the field (100). In this case, the height of the light blocking material layer 1007 may match the height of the top surfaces of the light emitting devices 100.
- the anisotropic conductive film 1005 by using the anisotropic conductive film 1005, the impact applied to the light emitting devices 100 while irradiating the laser for laser lift-off can be alleviated by the anisotropic conductive film 1005. That is, the anisotropic conductive film 1005 is used as a buffer material layer that mitigates the impact applied to the light emitting devices 100, and therefore, it is possible to prevent device failure from occurring while transferring the light emitting devices 100. have.
- the anisotropic conductive film 1005 is shown and described to be attached to the circuit board 1001 side, but the anisotropic conductive film 1005 is on the substrate 41 so as to cover the light-emitting elements 100. It can also be attached.
- anisotropic conductive film 1005 is attached to the circuit board 1001 side, but an anisotropic conductive paste may be used.
- 13A, 13B, 13C, 13D, and 13E are schematic cross-sectional views illustrating a method of manufacturing a display panel according to another exemplary embodiment of the present disclosure.
- a plurality of light emitting devices 100 are formed on a substrate 41.
- a self-assembled anisotropic conductive paste (SAP) 2005 is formed on a circuit board 1001 on which pads 1003 are formed in each pixel area.
- SAP (2005) has a structure in which conductive particles (2005a) are dispersed in a resin such as epoxy.
- the SAP 2005 may be formed on the circuit board 1001 using, for example, screen printing technology.
- the conductive particles 2005a may be, for example, solder particles.
- the solder particles contain Sn, and may contain at least one selected from Au, Ag, Bi, Cu, and In.
- the melting point of the solder particles may be lower than the curing temperature of the resin.
- a substrate 41 on which the light emitting elements 100 are formed is placed on the SAP 2005. It is not necessary to apply additional pressure to the substrate 41. Subsequently, heat is applied to the SAP (2005). Heat may be applied by the oven using a hot plate, or may be applied locally using spot heating. As heat is applied to the SAP 2005, the conductive particles 2005a are aggregated on the pads 1003 and the electrode pads 101 to form an aggregated conductive particle layer 2005c. The temperature at which the conductive particles 2005a are aggregated may be lower than the curing temperature of the resin, and thus, the conductive particles are aggregated before the resin is cured.
- a part of the SAP 2005 may at least partially fill the gap between the light-emitting elements 100, and thus, may at least partially cover the side surfaces of the light-emitting elements 100.
- the pads 1003 and the electrode pads 101 are electrically connected.
- the conductive particles 2005a may remain in the region between the light emitting devices 100, but as a large number of conductive particles 2005a are aggregated on the pads 1003, the density becomes thin.
- the light-emitting elements 100 are attached to the SAP 2005 by curing the resin.
- the conductive particle layer 2005c aggregated between the pads 1003 and the electrode pads 101 may maintain a particle shape, but the shape of the particles is maintained by maintaining a temperature higher than the melting point of the conductive particles 2005a. It can disappear and become a layer.
- the light-emitting elements 100 are then separated from the substrate 41 by separating the light-emitting elements 100 connected to the pads 1003 using a laser lift-off technique that selectively irradiates the laser. It is transferred to the circuit board 1001.
- the light emitting devices 100 not connected to the pads 1003 are separated from the SAP 2005 together with the substrate 41, and thus, grooves 101g may be formed on the surface of the SAP 2005. have.
- the light blocking material layer 1007 may fill a region between the light emitting devices 100.
- the height of the top surface of the light blocking material layer 1007 may be the same as the height of the top surfaces of the light emitting devices 100.
- the light blocking material layer 1007 may cover the upper surfaces of the light emitting devices 100.
- the pads 1003 and the electrode pads 101 can be stably electrically connected, and the occurrence of an electrical short can be prevented.
- the impact can be alleviated by using the SAP (2005), it is possible to prevent defects such as cracks from occurring in the light emitting elements 100 due to the impact caused by laser lift-off. It can be safely and collectively transferred onto the circuit board 1001.
- 14A, 14B, 14C, and 14D are schematic cross-sectional views illustrating a method of manufacturing a display panel according to still another exemplary embodiment of the present disclosure.
- a plurality of light emitting devices 100 are formed on a substrate 41.
- an insulating material layer 3005 is formed on a circuit board 1001 having pads 1003.
- the insulating material layer 3005 may be formed of epoxy, polymer, spin-on-glass (SOG), BCB, or the like.
- the insulating material layer 3005 is formed to expose the pads 1003.
- the insulating material layer 3005 may be patterned using photographic and etching techniques.
- a substrate 41 on which light-emitting elements 100 are formed is disposed on a circuit board 1001.
- the pads 1003 and the electrode pads 101 may be bonded to each other by the bonding layer 3007.
- the bonding layer 3007 may be formed of, for example, AuIn, AuSn, CuSn, Au, Ni, or the like.
- the bonding layer 3007 may be formed by forming a bonding material on the pads 1003 or on the electrode pads 101 and bonding the pads and the electrode pads to each other.
- the insulating material layer 3005 may be cured after the pads 1003 and the electrode pads 101 are bonded to each other. A portion of the insulating material layer 3005 may at least partially fill a gap between the light emitting devices 100.
- the light emitting devices 100 may be separated from the substrate 41 and transferred onto the circuit board 1001 by using a selective laser lift-off technique.
- grooves 101g may be formed on the surface of the insulating material layer 3005.
- the light blocking material layer 1007 may fill a region between the light emitting devices 100.
- the impact applied to the light-emitting elements 100 while irradiating the laser can be alleviated by the insulating material layer 3005, and thus, defects such as cracks occur in the light-emitting elements 100 Can be prevented.
- 15A, 15B, 15C, and 15D are schematic cross-sectional views illustrating a method of manufacturing a display panel according to another exemplary embodiment of the present disclosure.
- a plurality of light emitting devices 100 are formed on a substrate 41.
- a substrate 41 on which light-emitting elements 100 are formed is disposed on a circuit board 1001 on which pads 1003 are formed in pixel regions.
- the electrode pads 101 of the light emitting devices 100 may be bonded to the pads 1003 by the bonding layer 3007.
- the bonding layer 3007 may be formed of, for example, AuIn, AuSn, CuSn, Au, Ni, or the like.
- the bonding layer 3007 may be formed by forming a bonding material on the pads 1003 or on the electrode pads 101 and bonding the pads and the electrode pads to each other.
- the area between the substrate 41 and the circuit board 1001 is filled with an insulating material layer 4005.
- the insulating material layer 4005 may be formed of epoxy, polymer, BCB, or the like.
- the insulating material layer 4005 may contact the lower surfaces of the light emitting devices 100 and may cover the side surfaces of the pads 1003 and the electrode pads 101. Further, a part of the insulating material layer 4005 may at least partially fill the gap between the light emitting devices 100. Subsequently, the insulating material layer 4005 may be cured.
- the light emitting devices 100 may be separated from the substrate 41 and transferred onto the circuit board 1001 using a selective laser lift-off technique.
- grooves 101g may be formed on the surface of the insulating material layer 4005.
- the light blocking material layer 1007 may fill a region between the light emitting devices 100.
- the impact applied to the light emitting devices 100 while irradiating the laser can be alleviated by the insulating material layer 4005, and thus, defects such as cracks are generated in the light emitting devices 100 Can be prevented.
- 16A, 16B, 16C, 16D, and 16E are schematic cross-sectional views illustrating a method of manufacturing a display panel according to another exemplary embodiment of the present disclosure.
- a plurality of light emitting devices 100 are formed on a substrate 41.
- an insulating material layer 3005 is formed on a circuit board 1001 having pads 1003.
- the insulating material layer 3005 may be formed of epoxy, polymer, spin-on-glass (SOG), BCB, or the like.
- the insulating material layer 3005 may be formed to expose a part of the circuit board 1001 as well as the pads 1003.
- the insulating material layer 3005 may be patterned so that the circuit board 1001 is exposed in a region between the pads 1003, and thus, an opening 3005a may be formed.
- the insulating material layer 3005 may be patterned using photographic and etching techniques.
- a substrate 41 on which light-emitting elements 100 are formed is disposed on a circuit board 1001.
- the pads 1003 and the electrode pads 101 may be bonded to each other by the bonding layer 3007.
- the bonding layer 3007 may be formed of, for example, AuIn, AuSn, CuSn, Au, Ni, or the like.
- the bonding layer 3007 may be formed by forming a bonding material on the pads 1003 or on the electrode pads 101 and bonding the pads and the electrode pads to each other.
- the insulating material layer 3005 may be cured after the pads 1003 and the electrode pads 101 are bonded to each other. A part of the insulating material layer 3005 may at least partially cover side surfaces of the light emitting devices 100.
- a light-emitting element positioned between the light-emitting elements 100 bonded to the circuit board 1001 is positioned on the opening 3005a of the insulating material layer 3005 on the circuit board 1001.
- the light emitting devices 100 may be separated from the substrate 41 and transferred onto the circuit board 1001 using a selective laser lift-off technique.
- the light emitting devices 100 are removed from the circuit board 1001 together with the board 41.
- the light emitting elements 100 removed together with the substrate 41 are disposed above the opening 3005a of the insulating material layer 3005, the grooves 101g as in the previous embodiments are in the insulating material layer 3005. ) Is not formed.
- a light blocking material layer 1007 may fill a region between the light emitting devices 100.
- the light blocking material layer 1007 may cover a part of the upper surface of the insulating material layer 3005.
- the light blocking material layer 1007 may cover the upper surfaces of the light emitting devices 100.
- the impact applied to the light-emitting elements 100 while irradiating the laser can be alleviated by the insulating material layer 3005, and thus, defects such as cracks occur in the light-emitting elements 100 Can be prevented.
- 17A, 17B, 17C, 17D, and 17E are schematic cross-sectional views illustrating a method of manufacturing a display panel according to still another exemplary embodiment of the present disclosure.
- FIGS. 12A, 12B, 12C, 12D, and 12E a method of manufacturing a display panel according to the present embodiment is described with reference to FIGS. 12A, 12B, 12C, 12D, and 12E.
- FIGS. 12A, 12B, 12C, 12D, and 12E Although generally similar to, there is a difference in patterning of the anisotropic conductive film 1005 or the anisotropic conductive paste before bonding the light emitting devices 100.
- the manufacturing method of the present embodiment different matters from the previous embodiment will be described in detail in order to avoid duplication of description.
- the anisotropic conductive film 1005 or the anisotropic conductive paste may be patterned to have an opening 1005c exposing the surface of the circuit board 1001 between the pads 1003.
- an anisotropic conductive paste when used, it may be patterned using a screen printing technique or the like.
- an anisotropic conductive film 1005 or an anisotropic conductive paste may be formed of a photosensitive polymer or the like, and patterned using photographic and etching techniques.
- the anisotropic conductive film 1005 or the anisotropic conductive paste may be patterned to have a width wider than that of the light emitting device 100, and thus, the lower surface of the light emitting device 100 is an anisotropic conductive film 1005) or both can be attached to the anisotropic conductive paste. Further, the side surface of the light emitting device 100 may be partially covered with an anisotropic conductive film 1005 or an anisotropic conductive paste.
- the light-emitting element 100 Since all the lower surfaces of the light-emitting elements 100 are in contact with the anisotropic conductive film 1005 or the anisotropic conductive paste, when the laser is irradiated to the light-emitting elements 100, the light-emitting element is formed by the anisotropic conductive film 1005 or the anisotropic conductive paste The impact applied to the field 100 can be alleviated.
- the light emitting devices 100 are transferred onto the circuit board 1001, and the circuit board 1001 may be exposed in a region between the light emitting devices 100. Therefore, unlike the previous embodiment, the grooves 101g are not formed.
- a region between the light emitting devices 100 may be filled with a light blocking material layer 1007.
- the light blocking material layer 1007 may contact the surface of the circuit board 1001. Further, the light blocking material layer 1007 may partially cover the upper surface of the anisotropic conductive film 1005 or the anisotropic conductive paste. Further, although not shown, the light blocking material layer 1007 may cover the upper surfaces of the light emitting devices 100 as described with reference to FIG. 12E.
- 18A, 18B, 18C, and 18D are schematic cross-sectional views illustrating a method of manufacturing a display panel according to still another exemplary embodiment of the present disclosure.
- the above-described embodiments are directed to manufacturing a display panel by selectively transferring the light emitting elements 100 positioned on the substrate 41 onto the circuit board 1001 using a laser lift-off technique.
- the substrate 41 may be a growth substrate, for example, a sapphire substrate used to grow the third LED stack 43.
- the present disclosure is not limited to transferring the light-emitting elements 100 using a laser lift-off technique. That is, the individual light emitting device chips may be rearranged according to the spacing of the pads 1003 in advance, and then the light emitting devices may be transferred to the circuit board 1001 using a temporary tape.
- 18A, 18B, 18C, and 18D show a method of transferring the previously rearranged light emitting device chips to the circuit board 1001 using a tape.
- light emitting device chips on which the light emitting device 100 is formed on a substrate 41 are arranged and prepared on a tape 121.
- the light emitting device chips may be arranged to correspond to the spacing of the pads 1003 of the circuit board 1001.
- the tape 121 may be provided on a temporary substrate (not shown).
- the light emitting device chips may be provided by forming the light emitting devices 100 on the substrate 41 and then dividing the substrate 41 into individual chip units.
- an anisotropic conductive film 1005 is formed on the circuit board 1001.
- An anisotropic conductive paste may be used instead of the anisotropic conductive film 1005.
- the light emitting device chips attached to the tape 121 are bonded to the pads 1003 through the anisotropic conductive film 1005.
- the light emitting device chips are bonded to the pads 1003 corresponding to the pixel regions.
- the pad 1003 and the electrode pad 101 are electrically connected by conductive particles 1005b in the anisotropic conductive film 1005.
- the substrate 41 may be pressed toward the circuit board 1001, and thus, the conductive particles 1005b may be deformed in shape by the pressure.
- heat may be applied while the light emitting devices 100 are adhered to the anisotropic conductive film 1005.
- the matrix of the anisotropic conductive film 1005 may be cured by heat.
- a part of the anisotropic conductive film 1005 may at least partially cover the side surfaces of the light emitting devices 100.
- the light emitting device chips are transferred onto the circuit board 1001, and accordingly, the light emitting device chips are bonded to the pixel regions of the circuit board 1001.
- the display panel 1000 is manufactured.
- the light emitting device chips may each include a light emitting device 100 and a substrate 41.
- a light blocking material layer may be disposed in a region between the light emitting device chips.
- the light blocking material layer covers the side surfaces of the light emitting devices 100 and may further cover the side surfaces of the substrate 41.
- the light blocking material layer may cover the surface of the substrate 41.
- the light emitting device chips arranged on the tape 121 are transferred to the circuit board 1001 using the anisotropic conductive film 1005 or an anisotropic conductive paste, but the present disclosure is not limited thereto.
- alignment on the tape 121 also in the previous embodiments described with reference to FIGS. 13A to 13E, 14A to 14D, 15A to 15D, 16A to 16E, and 17A to 17E.
- a method of transferring the light emitting device chips may be applied.
- the electrode pads 101 are illustrated and described as being connected to the pads 1003, but the present disclosure is not limited thereto.
- the light emitting devices 100a as described with reference to FIGS. 8 and 9 may be transferred to the circuit board 1001, and thus, the bump pads 103a, 103b, and 103c of the light emitting device 100a , 103d) may be connected to the pads 1003.
- the grooves 101g formed in the buffer material layers 1005, 2005, 3005, and 4005 between the light emitting devices 100 may be formed by the bump pads 103a, 103b, 103c, and 103d.
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Abstract
Description
Claims (21)
- 패드들을 갖는 회로 기판;상기 패드들에 전기적으로 접속되어 상기 회로 기판 상에 정렬된 발광 소자들; 및상기 회로 기판과 상기 발광 소자들 사이에 배치되어 상기 회로 기판과 상기 발광 소자들 사이의 공간을 채우는 완충 물질층을 포함하되,상기 완충 물질층은 상기 발광 소자들의 상면 아래에 위치하는 디스플레이 패널.
- 청구항 1에 있어서,상기 완충 물질층은 상기 발광 소자들 사이에 위치하는 상기 회로 기판의 표면을 덮되, 두 개의 발광 소자들 사이의 영역에 복수의 홈들을 갖는 디스플레이 패널.
- 청구항 1에 있어서,각각의 발광 소자는 전극 패드들을 포함하며,상기 전극 패드들이 상기 패드들에 전기적으로 접속하는 디스플레이 패널.
- 청구항 3에 있어서,상기 회로 기판 상의 패드들과 상기 발광 소자의 전극 패드들 사이에 배치된 도전성 입자들을 더 포함하되,상기 패드들과 상기 전극 패드들은 상기 도전성 입자들에 의해 전기적으로 연결된 디스플레이 패널.
- 청구항 4에 있어서,상기 완충 물질층은 상기 발광 소자들 사이의 영역에 서로 이격된 도전성 입자들을 더 포함하는 디스플레이 패널.
- 청구항 3에 있어서,상기 발광 소자들 사이의 영역에 배치되어 발광 소자들의 측면을 통해 방출되는 광을 차단하는 광 차단 물질층을 더 포함하는 디스플레이 패널.
- 청구항 6에 있어서,상기 광 차단 물질층은 상기 완충 물질층의 상면 일부를 덮는 디스플레이 패널.
- 청구항 3에 있어서,상기 패드들과 전극 패드들 사이에 형성된 솔더층을 더 포함하되,상기 패드들과 상기 전극 패드들은 상기 솔더층에 의해 전기적으로 연결된 디스플레이 패널.
- 청구항 1에 있어서,서로 다른 파장의 광을 방출하는 제1 LED 적층, 제2 LED 적층, 제3 LED 적층들;상기 발광 소자들은 상기 제1 내지 제3 LED 적층들에 전기적으로 접속된 전극 패드들; 및상기 전극 패드들 상에 배치된 범프 패드들을 포함하고,상기 범프 패드들이 상기 회로 기판 상의 패드들에 전기적으로 접속된 디스플레이 패널.
- 청구항 9에 있어서,상기 회로 기판의 패드들과 상기 범프 패드들 사이에 본딩층을 더 포함하되,상기 본딩층은 In, Pb, AuSn, CuSn 또는 솔더를 포함하는 디스플레이 패널.
- 청구항 1에 있어서,상기 완충 물질층은 경화된 레진, 폴리머, BCB, 또는 SOG인 디스플레이 패널.
- 청구항 1에 있어서,상기 발광 소자들은 각각 제1 LED 적층, 제2 LED 적층 및 제3 LED 적층을 포함하되, 제1 내지 제3 LED 적층들은 서로 다른 파장의 광을 방출하는 디스플레이 패널.
- 청구항 12에 있어서,상기 발광 소자들은 상기 제1 내지 제3 LED 적층에서 생성된 광을 상기 제3 LED 적층을 통해 방출하는 디스플레이 패널.
- 청구항 13에 있어서,상기 제3 LED 적층은 성장 기판으로부터 분리된 디스플레이 패널.
- 청구항 1에 있어서,상기 발광 소자들 사이의 간격은 상기 발광 소자의 폭보다 더 큰 디스플레이 패널.
- 청구항 1에 있어서,상기 완충 물질층은 상기 발광 소자들 사이에 위치하는 상기 회로 기판의 표면을 덮으며,상기 완충 물질층은 도전성 입자들을 포함하되,상기 도전성 입자들은 상기 발광 소자들 사이의 영역에 비해 상기 회로 기판과 상기 발광 소자 사이의 영역에 더 조밀하게 위치하는 디스플레이 패널.
- 디스플레이 패널을 포함하는 디스플레이 장치로서,상기 디스플레이 패널은,패드들을 갖는 회로 기판;상기 패드들에 전기적으로 접속되어 상기 회로 기판 상에 정렬된 발광 소자들; 및상기 회로 기판과 상기 발광 소자들 사이에 배치되어 상기 회로 기판과 상기 발광 소자들 사이의 공간을 채우는 완충 물질층을 포함하되,상기 완충 물질층은 상기 발광 소자들의 상면 아래에 위치하는 디스플레이 장치.
- 청구항 17에 있어서,상기 완충 물질층은 상기 발광 소자들 사이에 위치하는 상기 회로 기판의 표면을 덮되, 두 개의 발광 소자들 사이의 영역에 복수의 홈들을 갖는 디스플레이 장치.
- 청구항 17에 있어서,각각의 발광 소자는 전극 패드들을 포함하며,상기 전극 패드들이 상기 패드들에 전기적으로 접속하는 디스플레이 장치.
- 청구항 17에 있어서,상기 발광 소자들은 각각 제1 LED 적층, 제2 LED 적층 및 제3 LED 적층을 포함하되, 제1 내지 제3 LED 적층들은 서로 다른 파장의 광을 방출하고,상기 발광 소자들은 상기 제1 내지 제3 LED 적층에서 생성된 광을 상기 제3 LED 적층을 통해 방출하는 디스플레이 장치.
- 청구항 17에 있어서,상기 발광 소자들 사이의 영역에 배치되어 상기 발광 소자들의 측면으로 방출되는 광을 차단하는 광 차단 물질층을 더 포함하는 디스플레이 장치.
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MX2021012963A MX2021012963A (es) | 2019-04-24 | 2020-04-23 | Panel de visualizacion de diodos emisores de luz, dispositivo de visualizacion que tiene el mismo y su metodo de fabricacion. |
CN202080030011.8A CN113711120A (zh) | 2019-04-24 | 2020-04-23 | 发光二极管显示面板、具有其的显示装置及制造其的方法 |
KR1020217025297A KR20210145724A (ko) | 2019-04-24 | 2020-04-23 | 발광 다이오드 디스플레이 패널, 그것을 갖는 디스플레이 장치 및 그것을 제조하는 방법 |
EP20795899.2A EP3961299A4 (en) | 2019-04-24 | 2020-04-23 | DISPLAY PANEL WITH LIGHT EMITTING DIODE, DISPLAY DEVICE THEREFOR AND METHOD OF MANUFACTURE THEREOF |
BR112021021218A BR112021021218A2 (pt) | 2019-04-24 | 2020-04-23 | Painel de exibição e aparelho de exibição compreendendo o mesmo |
JP2021562103A JP2022530370A (ja) | 2019-04-24 | 2020-04-23 | 発光ダイオードディスプレイパネル、それを有するディスプレイ装置及びそれを製造する方法 |
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US201962837800P | 2019-04-24 | 2019-04-24 | |
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US16/855,258 US11424224B2 (en) | 2019-04-24 | 2020-04-22 | LED display panel, LED display apparatus having the same and method of fabricating the same |
US16/855,258 | 2020-04-22 |
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CN (2) | CN113711120A (ko) |
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JP2022530370A (ja) | 2022-06-29 |
EP3961299A4 (en) | 2023-01-25 |
CN211789018U (zh) | 2020-10-27 |
US20240105686A1 (en) | 2024-03-28 |
BR112021021218A2 (pt) | 2021-12-21 |
US11842987B2 (en) | 2023-12-12 |
CN113711120A (zh) | 2021-11-26 |
US11424224B2 (en) | 2022-08-23 |
MX2021012963A (es) | 2022-01-04 |
US20220367427A1 (en) | 2022-11-17 |
US20200343227A1 (en) | 2020-10-29 |
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