WO2020207463A1 - Oled显示基板及其制作方法、oled显示装置、亮度补偿方法 - Google Patents

Oled显示基板及其制作方法、oled显示装置、亮度补偿方法 Download PDF

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WO2020207463A1
WO2020207463A1 PCT/CN2020/084174 CN2020084174W WO2020207463A1 WO 2020207463 A1 WO2020207463 A1 WO 2020207463A1 CN 2020084174 W CN2020084174 W CN 2020084174W WO 2020207463 A1 WO2020207463 A1 WO 2020207463A1
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layer
sub
light
opening
brightness
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PCT/CN2020/084174
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English (en)
French (fr)
Inventor
谢学武
刘博文
陈建宇
艾雨
刘浩
孔玉宝
孙诗
张阿猛
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京东方科技集团股份有限公司
合肥鑫晟光电科技有限公司
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Priority to US17/040,952 priority Critical patent/US11508942B2/en
Publication of WO2020207463A1 publication Critical patent/WO2020207463A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/85—Arrangements for extracting light from the devices
    • H10K50/858—Arrangements for extracting light from the devices comprising refractive means, e.g. lenses
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/124—Insulating layers formed between TFT elements and OLED elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/875—Arrangements for extracting light from the devices
    • H10K59/879—Arrangements for extracting light from the devices comprising refractive means, e.g. lenses
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0439—Pixel structures
    • G09G2300/0452—Details of colour pixel setup, e.g. pixel composed of a red, a blue and two green components
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/029—Improving the quality of display appearance by monitoring one or more pixels in the display panel, e.g. by monitoring a fixed reference pixel
    • G09G2320/0295—Improving the quality of display appearance by monitoring one or more pixels in the display panel, e.g. by monitoring a fixed reference pixel by monitoring each display pixel
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/04—Maintaining the quality of display appearance
    • G09G2320/043—Preventing or counteracting the effects of ageing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/06—Adjustment of display parameters
    • G09G2320/0626—Adjustment of display parameters for control of overall brightness
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00—Aspects of the architecture of display systems
    • G09G2360/14—Detecting light within display terminals, e.g. using a single or a plurality of photosensors
    • G09G2360/145—Detecting light within display terminals, e.g. using a single or a plurality of photosensors the light originating from the display screen
    • G09G2360/147—Detecting light within display terminals, e.g. using a single or a plurality of photosensors the light originating from the display screen the originated light output being determined for each pixel
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment

Definitions

  • the present disclosure relates to the technical field of display product manufacturing, in particular to an OLED display substrate and a manufacturing method thereof, an OLED display device, and a brightness compensation method.
  • the active driving method of OLED (Organic Light-Emitting Diode) devices generally adopts the voltage driving method.
  • the voltage drive structure is simpler, more suitable for large-size displays, and the drive speed is high, but it needs to compensate for the non-uniformity of the Thin Film Transistor (TFT), the power supply voltage drop and the display caused by the non-uniformity of OLED The brightness is uneven.
  • the current driving method realizes the gray scale control by directly providing a certain current, which can well compensate the non-uniformity of the TFT and the power supply voltage drop, but the low gray scale current writing time is too long and the structure is more complicated.
  • the digital driving method uses the light-emitting time modulation method to achieve different gray levels, that is: the longer the light-emitting time per unit time, the larger the duty cycle, the higher the brightness perceived by the human eye, but this driving method is due to frequent switching circuits , The power consumption is too large, and first of all, the scanning speed and scanning drive structure can not achieve more gray scales.
  • the present disclosure provides an OLED display substrate, including a base substrate, a thin film transistor array layer and a flat layer on the base substrate, and an anode, a pixel defining layer, and an anode located on the side of the flat layer away from the base substrate.
  • a cathode and a light-emitting layer A cathode and a light-emitting layer.
  • the pixel-defining layer defines a pixel area.
  • the light-emitting layer is located on the side of the pixel-defining layer away from the base substrate.
  • the display substrate further includes a light source in contact with the light-emitting layer and The derived light guide can test the derived light and adjust the light emission.
  • the pixel defining layer includes a first sub-pixel defining layer and a second sub-pixel defining layer stacked in a direction away from the base substrate, and the light guide is located between the first sub-pixel defining layer and the Between the second sub-pixel defining layers, and the light guide includes a contact portion exposed to the pixel defining layer to contact the light-emitting layer.
  • the refractive index of the light guide is greater than the refractive index of the pixel defining layer.
  • the light guide includes a first side in contact with the light-emitting layer, the contact portion is located on the first side, and a second side disposed opposite to the first side, the second The side is provided with a concave-convex structure so that the light entering the light guide body is totally reflected on the second side.
  • the light guide includes a plurality of rows of light guides arranged in parallel with the data line, the number of the row of light guides is equal to the number of rows of the pixel area, and each row of pixel area is correspondingly connected to a row of light guides.
  • the light guide body further includes at least one column light guide body, and the at least one column light guide body intersects the row light guide body.
  • the thin film transistor array layer includes a gate insulating layer, a first flat layer, an etching stop layer, a passivation layer, and a second flat layer disposed on the base substrate;
  • a first opening is provided at a first position of the gate insulating layer, and the first flat layer is located in the first opening;
  • a second opening is provided at the second position of the etch stop layer and the passivation layer, the second opening penetrates the etch stop layer and the passivation layer, and is located in the second opening
  • the part of the etch stop layer forms a first sub-etch stop layer
  • the second flat layer is filled between the first sub-etch stop layer and the rest of the etch stop layer, and is located in the second opening
  • the part of the passivation layer inside forms a first sub-passivation layer
  • the second flat layer is filled between the first sub-passivation layer and the rest of the passivation layer;
  • the second flat layer has a third opening at the second position to expose the first sub-passivation layer, the first sub-etch barrier layer and the first sub-passivation layer to form the conductive layer.
  • a light body wherein the light guide body further includes an anode, and the anode is disposed between the first sub-passivation layer and the light-emitting layer,
  • the orthographic projection of the second opening and the third opening on the base substrate falls within the orthographic projection of the first opening.
  • the refractive index of the etch stop layer is greater than the refractive index of the first flat layer
  • the refractive index of the etch stop layer is greater than the refractive index of the second flat layer
  • the passivation layer The refractive index is greater than the refractive index of the first flat layer
  • the refractive index of the passivation layer is greater than the refractive index of the second flat layer.
  • the thin film transistor array layer includes a gate insulating layer, a gate electrode, a first metal film layer, an etching stop layer, a passivation layer, a second metal film layer, and a flattening layer disposed on the base substrate ;
  • the first metal film layer is made in the same layer as the gate electrode, and is formed at a first position;
  • a fourth opening is provided at the second position of the etch stop layer and the passivation layer, the fourth opening penetrates the etch stop layer and the passivation layer, and is located in the fourth opening
  • the part of the etch stop layer forms a second sub-etch stop layer, and the second metal film layer is filled between the second sub-etch stop layer and the rest of the etch stop layer, and is located in the fourth opening
  • a portion of the passivation layer of ⁇ 2 forms a second sub-passivation layer, and the second metal film layer is filled between the second sub-passivation layer and the rest of the passivation layer;
  • the flat layer has a fifth opening at the second position to expose the second sub-passivation layer
  • the second sub-etching barrier layer and the second sub-passivation layer constitute the light guide
  • the orthographic projection of the fifth opening on the base substrate falls within the orthographic projection of the fourth opening.
  • the present disclosure also provides a manufacturing method of the OLED display substrate, including:
  • Forming a light guide the light guide being in contact with the light emitting layer, and used for deriving the light from the luminescent layer and testing the derived light and adjusting the light emission;
  • a cathode is formed on the light-emitting layer.
  • the pixel defining layer includes a first sub-pixel defining layer and a second sub-pixel defining layer, and after the step of forming a flat layer, the method includes:
  • a cathode is formed on the light-emitting layer.
  • the light guide is composed of a passivation layer and an etching barrier layer, and the method includes:
  • the passivation layer and the etch stop layer are etched to form a second opening penetrating the passivation layer and the etch stop layer, and the etch stop layer located in the second opening A first sub-etching barrier layer is partially formed, and a portion of the passivation layer located in the second opening forms a first sub-passivation layer;
  • a second flat layer is formed, a part of the second flat layer filled in the second opening is enclosed with the first flat layer to cover the first sub-passivation layer and the first sub-etching barrier layer ;
  • the second flat layer is etched at the second position to form a third opening exposing the first sub-passivation layer.
  • the light guide is composed of a passivation layer and an etching barrier layer, and the method includes:
  • the passivation layer and the etch stop layer are patterned to form a fourth opening, and the part of the etch stop layer in the fourth opening forms a second sub-etch stop layer, which is located in the first The part of the passivation layer in the four openings forms the second sub-passivation layer;
  • a second metal film layer is formed in the fourth opening, and the second metal film layer is filled between the second sub-etch stop layer and the rest of the etching stop layer, and is filled in the second Between the sub-passivation layer and the rest of the passivation layer;
  • An anode, a pixel defining layer, a cathode, and a light emitting layer located in the pixel area defined by the pixel defining layer are formed.
  • the present disclosure also provides an OLED display device, including the above-mentioned OLED display substrate, and connected with the light guide to collect the brightness information of the light-emitting layer, and compensate the brightness of the corresponding pixel area according to the brightness information The brightness compensation mechanism.
  • the brightness compensation mechanism includes:
  • a brightness information collection module configured to collect brightness information of the light-emitting layer in each pixel area, where the brightness information includes brightness corresponding to a plurality of gray levels one-to-one;
  • a gray-scale brightness curve obtaining module configured to obtain a measured gray-scale brightness curve according to the brightness information
  • a gray-scale compensation value acquisition module configured to compare the measured gray-scale brightness curve with a standard gray-scale brightness curve to obtain a gray-scale compensation value of a preset gray scale
  • the compensation module is used to perform brightness compensation according to the grayscale compensation value.
  • the brightness correction module includes:
  • a standard photoelectric sensor connected to the light guide to obtain the measured brightness L1 of the light-emitting layer in the current pixel area;
  • Image sensor for obtaining the actual brightness L2 of the current pixel area
  • the brightness information acquired by the brightness information collection module is the product of the first brightness acquired through the light guide and the brightness correction coefficient.
  • the present disclosure also provides a brightness compensation method applied to the above-mentioned OLED display device, including the following steps:
  • Figure 1a shows a schematic diagram of a voltage-type external electrical compensation circuit layout in related technologies
  • Figure 1b shows a schematic diagram of a voltage-type external electrical compensation circuit in the related art
  • FIG. 2 shows a schematic diagram of the film structure of an OLED display substrate in the related art
  • Fig. 3a shows the first schematic diagram of the circuit layout in the embodiment of the present disclosure
  • Figure 3b shows a schematic diagram of a circuit in an embodiment of the present disclosure
  • FIG. 4 shows the first schematic diagram of the film layer structure of the OLED display substrate in the embodiment of the present disclosure
  • FIG. 5 shows a schematic diagram of a partial structure of a light guide in an embodiment of the present disclosure
  • FIG. 6a shows the first schematic diagram of a partial film structure of an OLED display substrate in an embodiment of the present disclosure
  • FIG. 6b shows a second schematic diagram of a partial film structure of an OLED display substrate in an embodiment of the present disclosure
  • FIG. 7 shows the second schematic diagram of the film layer structure of the OLED display substrate in the embodiment of the present disclosure
  • FIG. 8 is a schematic diagram showing the structure of a part of the film layer without the third opening on the flat layer
  • FIG. 9 shows the third schematic diagram of the film layer structure of the OLED display substrate in the embodiment of the present disclosure.
  • FIG. 10a shows the second schematic diagram of the circuit layout in the embodiment of the present disclosure
  • FIG. 10b shows the third schematic diagram of the circuit layout in the embodiment of the present disclosure
  • 11a shows the fourth schematic diagram of the film layer structure of the OLED display substrate in the embodiment of the present disclosure
  • FIG. 11b shows the fifth schematic diagram of the film layer structure of the OLED display substrate in the embodiment of the present disclosure.
  • the current compensation methods of related technologies can be divided into electrical compensation and optical compensation according to the compensation object.
  • Electrical compensation can be divided into internal compensation and external compensation.
  • Internal compensation is mainly for TFT Vth, while external compensation can compensate for more content, including TFT Vth, mobility, and OLED aging.
  • these do not represent all electrical parameter differences, let alone differences other than electrical parameters. Therefore, compensation has certain limitations, and the brightness uniformity after compensation is not good enough; in addition, electrical parameter compensation has a compensation range, electrical parameters The uniformity after compensation for poor uniformity will still be poor.
  • Optical compensation directly uses brightness as the object of compensation. After compensation, the uniformity of pixel brightness can be achieved. Therefore, optical compensation is highly expected.
  • the existing optical compensation technology uses a CCD camera to collect the brightness of each pixel for compensation. This method requires relatively large equipment, so it is limited to one-time compensation before the product leaves the factory, and cannot be used for the brightness caused by long-term use of the product. The difference is compensated.
  • Figures 1a and 1b are schematic diagrams of the principle of voltage-based external electrical compensation currently used.
  • Figure 1a is a schematic diagram of the circuit layout of devices and circuits
  • Figure 1b is an equivalent circuit diagram of the circuit layout shown in Figure 1a.
  • the area marked with RGBW letters is each sub-pixel. For example, the mark R indicates a red sub-pixel, G indicates a green sub-pixel, B indicates a blue sub-pixel, and W indicates a white sub-pixel.
  • the above-mentioned sensing line Sense is connected to the 4 sub-pixels in turn through an inverted T-shaped circuit, and the pixel unit compensation circuit is connected to the sensing line Sense through the transistor T3 in each sub-pixel, thereby realizing the sensing collection of electrical parameters.
  • the film structure shown in FIG. 2 is a schematic cross-sectional view along the AA' direction of the film structure corresponding to the schematic diagram of the device and circuit layout of the circuit shown in FIG. 1a.
  • the display substrate includes a base substrate 1, a thin film transistor array layer 2 located on the base substrate 1, a flat layer 8, and an anode 3, a pixel defining layer 7, a cathode 5 located on the flat layer 8.
  • the light-emitting layer 4, the pixel defining layer 7 defines a pixel area, and the light-emitting layer 4 is located on the side of the pixel defining layer 7 away from the base substrate.
  • the voltage-based external electrical compensation method extracts the TFT/OLED current (pixel drive current) of each pixel through an internal sense circuit and an external sense IC (drive circuit), and converts it into a digital signal for processing. At the same time, the driving voltage corresponding to the TFT/OLED current is also recorded, so that the I-V curve corresponding to each TFT and OLED can be known. Then calculate the compensation coefficient and feed it back to the source driver for compensation.
  • the present disclosure replaces the sensing line in FIG. 1a by the light guide body, can realize the collection of the brightness of each pixel, and then calculate the brightness gray scale curve of each pixel, and then calculate the amount of gray scale that needs to be compensated, and then realize the brightness of the display Difference compensation.
  • its structure has fewer electrical parameter sensing structures and more optical parameter sensing channels. Since electrical compensation is ultimately to correct the difference in brightness, the use of optical compensation in the present disclosure is more direct than electrical compensation, and the compensation effect is better. And it has the advantages of simple structure.
  • this embodiment provides an OLED display substrate, which includes a base substrate 1, a thin film transistor array layer 2 located on the base substrate 1, a flat layer 8, and an anode 3 located on the flat layer 8, pixel definition Layer 7, cathode 5, light-emitting layer 4.
  • the pixel defining layer 7 defines a pixel area, and the light-emitting layer 4 is located on the side of the pixel defining layer 7 away from the base substrate.
  • the display substrate further includes the light-emitting layer 4
  • the light guide body 101 is provided in contact with the light guide body 101 for guiding the light of the light emitting layer 4. The light guide body 101 is used to test the derived light and adjust the light emission.
  • the light guide 101 provided in contact with the light-emitting layer 4 directly replaces the sensing line in FIG. 1, referring to FIG. 3a, the light guide 101 It includes a row light guide 01 parallel to the data line and a plurality of column light guides 02 perpendicular to the data line. One end of each column light guide 02 is in contact with the light emitting layer 4 of a plurality of pixel regions to connect the plurality of The light of the pixel area is exported to the row light guide 01, which is connected with an external sensor to obtain the brightness of the corresponding pixel area, so as to collect the brightness of the pixel.
  • the light guide of this embodiment The circuit structure of the OLED display substrate is simplified, and the T3 tube, sense line and other corresponding lines are omitted.
  • the specific structure of the light guide body 101 can be in various forms.
  • the pixel defining layer 7 includes a first sub-pixel defining layer 102 and a second sub-pixel defining layer 103 that are stacked, and the light guide 101 is located on the first sub-pixel defining layer 102.
  • the second sub-pixel defining layer 103, and the light guide 101 includes a contact portion exposed to the pixel defining layer 7 to contact the light-emitting layer 4.
  • the refractive index of the light guide 101 is greater than the refractive index of the pixel defining layer 7.
  • the refractive index of the light guide body 101 relative to the refractive index of the pixel defining layer 7 is as large as possible, so as to enhance the total reflection of light in the light guide body 101, thereby enabling the light to follow the light guide body 101 conducts out.
  • the light guide body 101 includes a first side 1011 in contact with the light-emitting layer 4, and the contact portion is located on the first side 1011 and a second side disposed opposite to the first side 1011.
  • the second side 1012 is provided with a concave-convex structure so that the light entering the light guide 101 is totally reflected on the second side 1012, Refer to Figure 5.
  • the arrangement of the concave-convex structure increases the propagation angle of light and allows more light to be totally reflected at the adjacent interface between the light guide 101 and the pixel defining layer 7.
  • there can be other ways to increase the amount of collected light which is not limited here.
  • the specific shape of the concave-convex structure can be various.
  • the concave-convex structure is a saw-tooth structure, as shown in FIG. 5, but it is not limited thereto.
  • the anode 3 is formed and patterned
  • the arrangement of the second sub-pixel defining layer 103 requires that the contact portion of the light guide 101 for contacting the light-emitting layer 4 is not covered (that is, the contact portion is not covered by the second sub-pixel defining layer. 103), so that the light guide 101 can directly contact the light-emitting layer 4 to receive incident light, the second side 1012 of the light guide 101 (opposite to the first side 1011 where the contact portion is provided) One side) is covered to achieve total reflection of light.
  • the cathode layer 5 and the encapsulation layer 6 are sequentially formed.
  • the light entering the light guide 101 propagates along the C'C direction.
  • Figure 4 simplifies the overall film structure, only reflecting the up-and-down relationship between layers, and does not describe the specific features of the film in detail.
  • Figures 6a and 6b show the specific details of the partial film structure. Features are also depicted. The following description will also only describe the positional relationship between the film layers, without reflecting specific features.
  • the thin film transistor array layer 2 includes a gate insulating layer 21, a first flat layer 81, an etching stop layer 22, and a gate insulating layer 21 disposed on the base substrate 1.
  • a first opening is provided at a first position of the gate insulating layer 21, and the first flat layer 81 is located in the first opening;
  • a second opening is provided at the second position of the etching stop layer 22 and the passivation layer 23, and the second opening penetrates the etching stop layer 22 and the passivation layer 23, as shown in FIG.
  • the part of the etch stop layer 22 in the two openings forms the first sub-etch stop layer 221, and the second flat layer 82 is filled between the first sub-etch stop layer 221 and the rest of the etch stop layer 22,
  • the part of the passivation layer 23 located in the second opening forms a first sub-passivation layer 231, and the second flat layer 82 is filled between the first sub-passivation layer 231 and the rest of the passivation layer 23;
  • the second flat layer 82 has a third opening at the second position to expose the first sub-passivation layer 231, so that the first sub-passivation layer 231 (through the anode 3) is derived from the light-emitting layer 4 Light, wherein the orthographic projection of the second opening and the third opening on the base substrate falls within the orthographic projection of the first opening.
  • the first sub-etching barrier layer 221 and the first sub-passivation layer 231 jointly form a light guide structure, which functions similarly to the light guide 101 described above with reference to FIG. 4.
  • the schematic diagram of the circuit device and circuit layout of the OLED display substrate may be similar to that shown in FIG. 3a, but the specific structure and arrangement position of the light guide body 101 have changed.
  • the body 101 is disposed on the side of the second flat layer 82 away from the anode 3, as shown in FIG. 7.
  • the refractive index of the first sub-etching stop layer 221 is greater than the refractive index of the first flat layer 81, and the refractive index of the first sub-etching stop layer 221 is greater than that of the second flat layer
  • the refractive index of the passivation layer 23 is greater than the refractive index of the first flat layer 81, and the refractive index of the passivation layer 23 is greater than the refractive index of the second flat layer 82.
  • the light from the light-emitting layer 4 enters the first sub-passivation layer 23 and the first sub-etching barrier layer 221, and is formed between the first sub-passivation layer 23 and the second flat layer 82.
  • Total reflection occurs at the interface between the first sub-etching barrier layer 221 and the first flat layer 81, so that light is reflected between the first sub-passivation layer 23 and the first sub-passivation layer.
  • the light guide formed by the sub-etching barrier layer 22 propagates and is led out.
  • the gate insulating layer is etched away to form the first opening, Then, a first flat layer 81 is formed on the first opening;
  • An IGZO (Indium Gallium Zinc Oxide) film layer, an etching stop layer 22, a source electrode, a drain electrode, and a passivation layer 23 are sequentially formed;
  • the passivation layer 23 and the etch stop layer 22 are etched to form the second opening that penetrates the passivation layer 23 and the etch stop layer 22, (located between the first opening and the second
  • the passivation layer 23 and the etching stop layer 22 in the opening are respectively named the first sub-passivation layer 23 and the first sub-etching stop layer 22);
  • a second flat layer 82 is formed, and part of the second flat layer 82 is filled in the second opening and enclosed with the first flat layer 81 to cover the first sub-passivation layer 23 and the first sub-passivation layer.
  • the third opening is arranged so that after the light-emitting layer 4 is formed, the light-emitting layer 4 is in contact with the first sub-passivation layer 23, so that light can pass through the first sub-passivation layer 23 and the The first sub-etching barrier layer 221 constitutes the light guide body 101 to propagate. If the third opening is not formed, the first sub-passivation layer 231 cannot contact the light-emitting layer 4, that is, the light guide 101 cannot contact the light-emitting layer 4, regardless of the angle of the light When entering the light guide body 101, all will exit at the same angle, and the light cannot be allowed to propagate in the light guide body 101, refer to FIG. 8.
  • the anode 3 is made of a transparent conductive material, such as ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxide), which does not affect the light from the light-emitting layer 4 entering the first sub-passivation layer 231 .
  • ITO Indium Tin Oxide
  • IZO Indium Zinc Oxide
  • the schematic diagram of the circuit device and circuit layout of the OLED display substrate is shown in FIG. 3a, and the film structure of the OLED display substrate is shown in FIG. 9, and the thin film transistor array Layer 2 includes a gate insulating layer 21, a gate electrode, a first metal film layer 91, an etching stop layer 22, a passivation layer 23, a second metal film layer 92 and a flat layer 8 disposed on the base substrate 1;
  • the first metal film layer 91 is made in the same layer as the gate electrode, and is formed at the first position;
  • a fourth opening is provided at the second position of the etching stop layer 22 and the passivation layer 23, and the fourth opening penetrates the etching stop layer 22 and the passivation layer 23, as shown in FIG.
  • the part of the etch stop layer 22 in the four openings forms the second sub-etch stop layer 222, and the second metal film layer 92 is filled between the second sub-etch stop layer 222 and the rest of the etch stop layer 22
  • the portion of the passivation layer 23 located in the fourth opening forms a second sub-passivation layer 232, and the second metal film layer 92 is filled between the second sub-passivation layer 232 and the rest of the passivation layer 23 between;
  • the flat layer 8 has a fifth opening at the second position to expose the second sub-passivation layer 232, so that the second sub-passivation layer 232 (through the anode 3) extracts light from the light-emitting layer 4, Wherein, the orthographic projection of the fourth opening and the fifth opening on the base substrate falls within the orthographic projection of the first opening;
  • the second sub-etching barrier layer 222 and the second sub-passivation layer 232 together form a light guide structure, which functions similar to the light guide body 101 described above with reference to FIG. 4. .
  • the cathode 5 is above the light-emitting layer 4, the light emitted by the light-emitting layer 4 is restricted to the light guide 101 (the second sub-passivation layer 232 and The second sub-etching barrier layer 222) propagates inside. Compared with the second embodiment, the amount of light derived from the light guide 101 in this embodiment is greatly increased.
  • the first metal film layer 91 can be made in the same layer as the gate layer to form the pattern of the fourth opening, and the pattern of the source and drain vias can be formed simultaneously, and the second The metal film layer 92 is made in the same layer as the source electrode and the drain electrode.
  • the OLED display template in this embodiment can also be manufactured by other manufacturing methods.
  • the anode 3, the pixel defining layer 7, the cathode 5, and the light emitting layer 4 located in the pixel area defined by the pixel defining layer 7 are formed.
  • FIG. 10a the circuit device and circuit layout of the OLED display device of this embodiment are shown in FIG. 10a, and the film structure diagram of the OLED display substrate corresponding to FIG. 10a is shown in FIG. 11a.
  • the light guide body 101 includes a plurality of row light guide bodies 01 arranged in parallel with the data line.
  • the number of row light guide bodies 01 has the same number of pixel regions, that is, each row of pixel region corresponds to one row light guide body 01,
  • the light propagates along a straight line.
  • the change of the light propagation angle caused by the turning of the light is reduced, thereby reducing the phenomenon of reducing the total reflected light.
  • the pixel defining layer 7 includes a first sub-pixel defining layer 102 and a second sub-pixel defining layer 103 that are stacked, and the light guide 101 is located on the first sub-pixel defining layer 102 and the Between the second sub-pixel defining layers 103, and the light guide 101 includes a contact portion exposed to the pixel defining layer 7 to contact the light-emitting layer 4.
  • the refractive index of the light guide 101 is greater than the refractive index of the pixel defining layer 7.
  • the refractive index of the light guide body 101 relative to the refractive index of the pixel defining layer 7 is as large as possible, so as to enhance the total reflection of light in the light guide body 101, thereby enabling the light to follow the light guide body 101 conducts out.
  • the light guide body 101 includes a first side 1011 in contact with the light-emitting layer 4, and the contact portion is located on the first side 1011 and a second side disposed opposite to the first side 1011.
  • the second side 1012 is provided with a concave-convex structure so that the light entering the light guide 101 is totally reflected on the second side 1012.
  • the arrangement of the concave-convex structure increases the propagation angle of light and allows more light to be totally reflected at the adjacent interface between the light guide 101 and the pixel defining layer 7.
  • there can be other ways to increase the amount of collected light which is not limited here.
  • the anode 3 is formed and patterned
  • the arrangement of the second sub-pixel defining layer 103 requires that the contact portion of the light guide 101 for contacting the light-emitting layer 4 is not covered (that is, the contact portion is not covered by the second sub-pixel defining layer. 103), so that the light guide 101 can directly contact the light-emitting layer 4 to receive incident light, the second side 1012 of the light guide 101 (opposite to the first side 1011 where the contact portion is provided) One side) is covered to achieve total reflection of light.
  • the cathode 5 layers and the encapsulation layer 6 are sequentially formed.
  • the circuit devices and circuit layout of the OLED display device in this embodiment are shown in FIG. 10b, and the film structure of the OLED display substrate corresponding to FIG. 10b is shown in FIG. 11b.
  • the light guide 101 includes a plurality of row light guides 01 arranged in parallel with the data line.
  • the number of the row light guides 01 is equal to the number of rows in the pixel area, that is, each row of pixel area is connected to one row of light guides. 01.
  • the light propagates along a straight line.
  • the layout in Figure 3a the light propagates along a straight line, which reduces the change in the light propagation angle caused by the turning of the light, thereby reducing the phenomenon of reducing the total reflected light. occur.
  • the thin film transistor array layer 2 includes a gate insulating layer 21, a first flat layer 81, an etching stop layer 22, a passivation layer 23, and a second flat layer 82 disposed on the base substrate 1. ;
  • a first opening is provided at a first position of the gate insulating layer 21, and the first flat layer 81 is located in the first opening;
  • a second opening is provided at the second position of the etching stop layer 22 and the passivation layer 23, and the second opening penetrates the etching stop layer 22 and the passivation layer 23, as shown in FIG.
  • the part of the etch stop layer 22 in the two openings forms the first sub-etch stop layer 221, and the second flat layer 82 is filled between the first sub-etch stop layer 221 and the rest of the etch stop layer 22,
  • the part of the passivation layer 23 located in the second opening forms a first sub-passivation layer 231, and the second flat layer 82 is filled between the first sub-passivation layer 231 and the rest of the passivation layer 23;
  • the second flat layer 82 has a third opening at the second position to expose the first sub-passivation layer 231, so that the first sub-passivation layer 231 (through the anode 3) is derived from the light-emitting layer 4 Light, wherein the orthographic projection of the second opening and the third opening on the base substrate falls within the orthographic projection of the first opening.
  • the first sub-etching barrier layer 221 and the first sub-passivation layer 231 jointly form a light guide structure, which functions similarly to the light guide 101 described above with reference to FIG. 4.
  • the refractive index of the etching stop layer 22 is greater than the refractive index of the first flat layer 81, and the refractive index of the etching stop layer 22 is greater than the refractive index of the second flat layer 82, so
  • the refractive index of the passivation layer 23 is greater than the refractive index of the first flat layer 81, and the refractive index of the passivation layer 23 is greater than the refractive index of the second flat layer 82.
  • the light from the light-emitting layer 4 enters the first sub-passivation layer 231 and the second sub-etching barrier layer 222, and is separated between the first sub-passivation layer 231 and the second flat
  • the interface of the layer 82 is totally reflected, and the interface between the first sub-etching stop layer 221 and the first flat layer 81 is totally reflected, so that the light is in the first sub-passivation layer 231 and the
  • the light guide body 101 formed by the first sub-etching barrier layer 221 propagates and is led out.
  • the gate insulating layer is etched away to form the first opening, Then, a first flat layer 81 is formed on the first opening;
  • An IGZO (Indium Gallium Zinc Oxide) film layer, an etching stop layer 22, a source electrode, a drain electrode, and a passivation layer 23 are sequentially formed;
  • the passivation layer 23 and the etch stop layer 22 are etched to form the second opening that penetrates the passivation layer 23 and the etch stop layer 22, (the passivation layer located in the second opening 23 and the etch stop layer 22 are respectively named the first sub-passivation layer 231 and the first sub-etch stop layer 221);
  • a second flat layer 82 is formed, and part of the second flat layer 82 is filled in the second opening and enclosed with the first flat layer 81 to cover the first sub-passivation layer 231 and the first Sub-etching barrier layer 221;
  • the third opening is arranged so that after the light-emitting layer 4 is formed, the light-emitting layer 4 is in contact with the first sub-passivation layer 231, so that light can pass through the first sub-passivation layer 231 and the first sub-passivation layer 231 in a total reflection manner.
  • the first sub-etching barrier layer 221 constitutes the light guide body 101 to propagate.
  • the anode 3 is made of a transparent conductive material, which does not affect the light from the light-emitting layer 4 to enter the first sub-passivation layer 231.
  • the circuit devices and circuit layout of the OLED display device of this embodiment are shown in FIG. 10b, and the film structure of the OLED display substrate corresponding to FIG. 10b is shown in FIG. 11b.
  • the light guide body 101 includes a plurality of row light guide bodies 01 arranged in parallel with the data line, and the number of row light guide bodies 01 is the same as the number of rows in the pixel area, that is, each row of pixel area corresponds to a row light guide body 01. ,
  • the light propagates along a straight line.
  • the layout in Figure 3a the light propagates along a straight line, which reduces the change of the light propagation angle caused by the turning of the light, thereby reducing the occurrence of the phenomenon that leads to the reduction of total reflected light. .
  • the thin film transistor array layer 2 includes a gate insulating layer 21, a gate electrode, a first metal film layer 91, an etching stop layer 22, a passivation layer 23, and a second metal film layer 92 disposed on the base substrate 1. And flat layer 8;
  • the first metal film layer 91 is made in the same layer as the gate;
  • the passivation layer 23 is provided with a fourth opening penetrating the etch stop layer 22 to form a second sub-etch stop layer 22 and a second sub-passivation layer 232, and the second metal film layer 92 is located Inside the fourth opening and surrounding the first metal film layer 91 to cover the second sub-passivation layer 232 and the second sub-etching stop layer 222;
  • the flat layer 8 has a fifth opening to expose the second sub-passivation layer 232;
  • the second sub-etching stop layer 222 and the second sub-passivation layer 232 constitute the light guide 101.
  • the cathode 5 is above the light-emitting layer 4, the light emitted by the light-emitting layer 4 is restricted to the light guide 101 (the second sub-passivation layer 232 and The second sub-etching barrier layer 222) propagates inside.
  • the amount of light derived from the light guide 101 in this embodiment is greatly increased.
  • the first metal film layer 91 can be made in the same layer as the gate layer to form the pattern of the fourth opening, and the pattern of the source and drain vias can be formed simultaneously, and the second The metal film layer 92 is made in the same layer as the source electrode and the drain electrode.
  • the OLED display template in this embodiment can also be manufactured by other manufacturing methods.
  • the anode 3, the pixel defining layer 7, the cathode 5, and the light emitting layer 4 located in the pixel area defined by the pixel defining layer 7 are formed.
  • This embodiment also provides an OLED display device, which includes the above-mentioned OLED display substrate, and is connected to the light guide 101 to collect the brightness information of the light-emitting layer 4, and to determine the corresponding pixel area according to the brightness information.
  • a brightness compensation mechanism that compensates for brightness.
  • the brightness of each pixel can be collected, and then the brightness grayscale curve of each pixel can be calculated, and then the amount of grayscale that needs to be compensated can be calculated to realize the brightness difference of the display. make up.
  • its structure has fewer electrical parameter sensing structures and more optical parameter sensing channels. Since electrical compensation is ultimately to correct the difference in brightness, the OLED display device of this embodiment adopts optical compensation to be more direct than electrical compensation, and the compensation effect is better. And it has the advantages of simple structure.
  • the brightness compensation mechanism includes:
  • the brightness information collection module is used to collect brightness information of the light-emitting layer 4 in each pixel area, and the brightness information includes the brightness corresponding to a plurality of gray levels one to one;
  • a gray-scale brightness curve acquisition module for acquiring and measuring the gray-scale brightness curve of each pixel area according to the brightness information
  • a gray-scale compensation value acquisition module configured to compare the measured gray-scale brightness curve with a standard gray-scale brightness curve to obtain a gray-scale compensation value of a preset gray scale
  • the compensation module is used to perform brightness compensation according to the grayscale compensation value.
  • a brightness correction module is further included, and the brightness correction module includes:
  • a standard photoelectric sensor connected to the light guide 101 to obtain the measured brightness L1 of the light-emitting layer 4 in the current pixel area;
  • Image sensor for obtaining the actual brightness L2 of the current pixel area
  • the brightness information acquired by the brightness information collection module is the product of the first brightness acquired through the light guide 101 and the brightness correction coefficient.
  • the parameters of each sensor have a certain difference, and the luminous brightness of any position in each pixel area will also have a certain difference.
  • the setting of the brightness correction module reduces the difference in the brightness information collection caused by the difference in sensor parameters, and improves The accuracy of brightness collection.
  • This embodiment also provides a brightness compensation method, which is applied to the above-mentioned OLED display device, and includes the following steps:
  • the measured gray-scale brightness curve is compared with the standard gray-scale brightness curve to obtain the gray-scale compensation value of the preset gray-scale. Specifically, the measured gray-scale brightness curve is compared with the standard gray-scale brightness curve to calculate The brightness corresponding to the gray scale G in the standard gray scale brightness curve.
  • Perform brightness compensation according to the gray scale compensation value Specifically, calculate the compensated gray scale according to the gray scale compensation value and the display gray scale provided by the signal generator, and then output it to the row and column selection control unit to control the display screen display.

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Abstract

本公开涉及一种OLED显示基板，包括衬底基板，位于衬底基板上的薄膜晶体管阵列层、平坦层，以及位于所述平坦层远离所述衬底基板一侧的阳极、像素界定层、阴极、发光层，所述像素界定层限定出像素区域，所述发光层位于像素限定层远离衬底基板一侧，所述显示基板还包括与所述发光层接触并用于将所述发光层的光导出的导光体，以对导出的光进行测试并调节发光。

Description

OLED显示基板及其制作方法、OLED显示装置、亮度补偿方法
相关申请的交叉引用
本申请主张在2019年4月10日在中国提交的中国专利申请号No.201910285986.4的优先权，其全部内容通过引用包含于此。
技术领域
本公开涉及显示产品制作技术领域，尤其涉及一种OLED显示基板及其制作方法、OLED显示装置、亮度补偿方法。
背景技术
目前OLED(Organic Light-Emitting Diode)器件的主动驱动方式普遍采用电压驱动方式。相较于电流驱动，电压驱动结构简单，更适合大尺寸显示，而且驱动速度块，但是需要补偿薄膜晶体管(Thin Film Transistor，TFT)的非均匀性、电源压降以及OLED非均匀性造成的显示亮度不均匀。电流式的驱动方式通过直接提供一定的电流实现控制灰阶，可以很好的补偿TFT的非均匀性、电源压降，但是低灰阶电流写入时间过长，结构也较为复杂。数字式的驱动方式用发光时间调制方式实现不同的灰度级，即：单位时间内发光时间越长，占空比越大，人眼感知的亮度越高，但是这种驱动方式由于频繁开关电路，功耗太大，而且首先扫描速度及其扫描驱动结构，无法实现较多灰阶。
发明内容
本公开提供了一种OLED显示基板，包括衬底基板，位于衬底基板上的薄膜晶体管阵列层、平坦层，以及位于所述平坦层远离所述衬底基板一侧的阳极、像素界定层、阴极、发光层，所述像素界定层限定出像素区域，所述发光层位于像素限定层远离衬底基板一侧，所述显示基板还包括与所述发光层接触并将所述发光层的光导出的导光体，以对导出的光进行测试并调节发光。
可选的，所述像素界定层包括沿远离衬底基板的方向层叠设置的第一子像素界定层和第二子像素界定层，所述导光体位于所述第一子像素界定层和所述第二子像素界定层之间，且所述导光体包括外露于所述像素界定层以与所述发光层接触的接触部。
可选的，所述导光体的折射率大于所述像素界定层的折射率。
可选的，所述导光体包括与所述发光层接触的第一侧，所述接触部位于所述第一侧，和与所述第一侧相对设置的第二侧，所述第二侧设置有凹凸结构以使得进入所述导光体的光线在所述第二侧发生全反射。
可选的，所述导光体包括与数据线平行设置的多个行导光体，所述行导光体的数量等于像素区域的行数，每一行像素区域对应连接一个行导光体。
可选的，所述导光体还包括至少一个列导光体，所述至少一个列导光体与所述行导光体相交。
可选的，所述薄膜晶体管阵列层包括设置于所述衬底基板上的栅绝缘层、第一平坦层、刻蚀阻挡层、钝化层和第二平坦层；
所述栅绝缘层的第一位置设置有第一开口，所述第一平坦层位于所述第一开口内；
在所述刻蚀阻挡层和所述钝化层的第二位置处设有第二开口，所述第二开口贯穿所述刻蚀阻挡层和所述钝化层，位于所述第二开口内的刻蚀阻挡层的部分形成第一子刻蚀阻挡层，所述第二平坦层填充在所述第一子刻蚀阻挡层与刻蚀阻挡层的其余部分之间，位于所述第二开口内的钝化层的部分形成第一子钝化层，所述第二平坦层填充在所述第一子钝化层与钝化层的其余部分之间；
所述第二平坦层在所述第二位置处具有第三开口、以露出所述第一子钝化层所述第一子刻蚀阻挡层和所述第一子钝化层构成所述导光体，其中所述导光体还包括阳极，所述阳极设置在所述第一子钝化层和所述发光层之间，
其中，所述第二开口和所述第三开口在所述衬底基板上的正投影落在所述第一开口的正投影之内。
可选的，所述刻蚀阻挡层的折射率大于所述第一平坦层的折射率，所述刻蚀阻挡层的折射率大于所述第二平坦层的折射率，所述钝化层的折射率大 于所述第一平坦层的折射率，所述钝化层的折射率大于所述第二平坦层的折射率。
可选的，所述薄膜晶体管阵列层包括设置于所述衬底基板上的栅绝缘层、栅极、第一金属膜层、刻蚀阻挡层、钝化层、第二金属膜层和平坦层；
所述第一金属膜层与所述栅极同层制作，并形成在第一位置处；
在所述刻蚀阻挡层和所述钝化层的第二位置处设有第四开口，所述第四开口贯穿所述刻蚀阻挡层和所述钝化层，位于所述第四开口内的刻蚀阻挡层的部分形成第二子刻蚀阻挡层，第二金属膜层填充在所述第二子刻蚀阻挡层与刻蚀阻挡层的其余部分之间，位于所述第四开口内的钝化层的部分形成第二子钝化层，所述第二金属膜层填充在所述第二子钝化层与钝化层的其余部分之间；
所述平坦层在所述第二位置处具有第五开口、以露出所述第二子钝化层；
所述第二子刻蚀阻挡层和所述第二子钝化层构成所述导光体，
其中，所述第五开口在所述衬底基板上的正投影落在所述第四开口的正投影之内。
本公开还提供一种OLED显示基板的制作方法，包括：
在衬底基板上形成薄膜晶体管阵列层；
形成平坦层；
在所述平坦层远离所述衬底基板的一侧形成阳极和像素界定层；
在所述像素界定层远离所述衬底基板的一侧形成发光层；
形成导光体，所述导光体与所述发光层接触，用于将所述发光层的光导出并且对导出的光进行测试并调节发光；以及
在所述发光层上形成阴极。
可选的，所述像素界定层包括第一子像素界定层和第二子像素界定层，在所述形成平坦层的步骤之后，所述方法包括：
形成阳极并进行图案化处理；
形成第一子像素界定层并进行图案化处理；
在所述第一子像素界定层上形成导光体，并进行图案化处理；
在所述第一子像素界定层和所述导光体上形成第二子像素界定层，并进 行图案化处理；
在所述第二子像素界定层上形成发光层；以及
在所述发光层上形成阴极。
可选的，所述导光体由钝化层和刻蚀阻挡层构成，所述方法包括：
在所述衬底基板上形成栅极层和栅极绝缘层；
在第一位置对栅极绝缘层进行刻蚀以形成第一开口；
在所述第一开口中形成第一平坦层；
形成刻蚀阻挡层和钝化层；
对所述钝化层和所述刻蚀阻挡层进行刻蚀，以形成贯穿所述钝化层和所述刻蚀阻挡层的第二开口，位于所述第二开口内的刻蚀阻挡层的部分形成第一子刻蚀阻挡层，位于所述第二开口内的钝化层的部分形成第一子钝化层；
形成第二平坦层，填充于所述第二开口内的部分第二平坦层、与所述第一平坦层合围以包覆所述第一子钝化层和所述第一子刻蚀阻挡层；
在所述第二位置处对所述第二平坦层进行刻蚀，以形成露出所述第一子钝化层的第三开口。
可选的，所述导光体由钝化层和刻蚀阻挡层构成，所述方法包括：
在所述衬底基板上同层形成栅极和第一金属膜层，其中所述第一金属膜层形成在第一位置处；
形成栅绝缘层、钝化层和刻蚀阻挡层；
对所述钝化层和所述刻蚀阻挡层进行图案化处理以形成第四开口，位于所述第四开口内的刻蚀阻挡层的部分形成第二子刻蚀阻挡层，位于所述第四开口内的钝化层的部分形成第二子钝化层；
在所述第四开口中形成第二金属膜层，所述第二金属膜层填充在所述第二子刻蚀阻挡层与刻蚀阻挡层的其余部分之间，并且填充在所述第二子钝化层与钝化层的其余部分之间；
形成平坦层并进行图案化处理，以形成所述第五开口；
形成阳极、像素界定层、阴极以及位于像素界定层界定的像素区域内的发光层。本公开还提供一种OLED显示装置，包括上述的OLED显示基板，以及与所述导光体连接以采集所述发光层的亮度信息、并根据所述亮度信息 对相应的像素区域的亮度进行补偿的亮度补偿机构。
可选的，所述亮度补偿机构包括：
亮度信息采集模块，用于采集每一像素区域内的所述发光层的亮度信息，所述亮度信息包括与多个灰阶一一对应的亮度；
灰阶亮度曲线获取模块，用于根据所述亮度信息获取测量的灰阶亮度曲线；
灰阶补偿值获取模块，用于将所述测量灰阶亮度曲线与标准灰阶亮度曲线进行对比，以获得预设灰阶的灰阶补偿值；
补偿模块，用于根据所述灰阶补偿值进行亮度补偿。
可选的，还包括亮度校正模块，所述亮度校正模块包括：
标准光电传感器，与所述导光体连接，以获取当前像素区域内的所述发光层的测量亮度L1；
图像传感器，用于获取当前像素区域的实际亮度L2；
亮度校正系数获取单元，用于根据所述测量亮度L1和所述实际亮度L2获取亮度校正系数A＝L2/L1；
所述亮度信息采集模块获取的所述亮度信息为通过所述导光体获取的第一亮度与所述亮度校正系数的乘积。
本公开还提供一种亮度补偿方法，应用于上述OLED显示装置，包括以下步骤：
采集每一像素区域的发光层的亮度信息；
根据所述亮度信息获取测量的灰阶亮度曲线；
将所述测量灰阶亮度曲线与标准灰阶亮度曲线进行对比，以获得预设灰阶的灰阶补偿值；
根据所述灰阶补偿值进行亮度补偿。
附图说明
图1a表示相关技术中电压式外部电学补偿线路布局示意图；
图1b表示相关技术中电压式外部电学补偿电路示意图；
图2表示相关技术中OLED显示基板的膜层结构示意图；
图3a表示本公开实施例中线路布局示意图一；
图3b表示本公开实施例中电路示意图；
图4表示本公开实施例中OLED显示基板膜层结构示意图一；
图5表示本公开实施例中导光体部分结构示意图；
图6a表示本公开实施例中OLED显示基板部分膜层结构示意图一；
图6b表示本公开实施例中OLED显示基板部分膜层结构示意图二；
图7表示本公开实施例中OLED显示基板膜层结构示意图二；
图8表示平坦层上未设置第三开口的部分膜层结构示意图；
图9表示本公开实施例中OLED显示基板膜层结构示意图三；
图10a表示本公开实施例中线路布局示意图二；
图10b表示本公开实施例中线路布局示意图三；
图11a表示本公开实施例中OLED显示基板膜层结构示意图四；
图11b表示本公开实施例中OLED显示基板膜层结构示意图五。
具体实施方式
为使本公开实施例的目的、技术方案和优点更加清楚，下面将结合本公开实施例的附图，对本公开实施例的技术方案进行清楚、完整地描述。显然，所描述的实施例是本公开的一部分实施例，而不是全部的实施例。基于所描述的本公开的实施例，本领域普通技术人员所获得的所有其他实施例，都属于本公开保护的范围。
针对产品应用较多的电压驱动方式，目前相关技术的补偿方式按补偿对象可以分为电学补偿和光学补偿。电学补偿又可以分为内部补偿和外部补偿，内部补偿主要针对TFT Vth进行补偿，外部补偿则可以补偿更多内容，包括TFT Vth、迁移率以及OLED老化。当然这些并不能代表全部的电学参数差异，更不包含电学参数以外的差异事项，因此补偿存在一定的局限性，补偿后的亮度均一性不够好；另外，电学参数补偿都有补偿范围，电学参数均一性较差的补偿后均一性仍然会很差。
光学补偿直接以亮度作为补偿对象，补偿后可以实现像素亮度高度的均一，因此光学补偿被给予厚望。然而，目前已有的光学补偿技术采用CCD摄 像头采集各个像素的亮度进行补偿，这种方法需要较为庞大的设备，因此仅限于产品出厂前做一次性的补偿，无法针对长期使用产品老化造成的亮度差异进行补偿。
图1a和图1b为目前采用的电压式外部电学补偿的原理示意图，其中，图1a为电路的器件、线路平面布局示意图，图1b为图1a所示电路布局的等效电路图。图1a所示的像素单元的布局示意图中，标有RGBW字母的区域为各个子像素，例如标记R指示红色子像素，G指示绿色子像素，B指示蓝色子像素，W指示白色子像素。如图1a和图1b所示，以标记为B的蓝色子像素为例，其中晶体管T1连接至发光元件，晶体管T2连接至数据线Data，晶体管T3连接至感测线Sense，C为存储电容。
上述感测线Sense通过倒T型线路依次连接至4个子像素，该像素单元补偿电路通过每个子像素中的晶体管T3连接至感测线Sense，从而实现电学参数的感应采集。
图2所示的膜层结构为图1a所示的电路的器件、线路平面布局示意图对应的膜层结构沿AA’方向的截面示意图。如图2所示，该显示基板包括衬底基板1、位于衬底基板1上的薄膜晶体管阵列层2、平坦层8、以及位于平坦层8上的阳极3、像素界定层7、阴极5、发光层4，所述像素界定层7限定出像素区域，所述发光层4位于像素限定层7远离衬底基板的一侧。
电压式外部电学补偿的方式通过内部sense(感应)电路和外部感应IC(驱动电路)将每一个像素的TFT/OLED电流(像素驱动电流)抽取出来，并转化成数字信号进行处理。与此同时TFT/OLED电流所对应的驱动电压也被记录下来，这样就可以知道每个TFT和OLED所对应的I-V曲线。再进行补偿系数的计算，反馈给源驱动器进行补偿。
本公开通过导光体替换图1a中的感测线，可以实现每个像素亮度的采集，进而计算出各个像素的亮度灰阶曲线，再计算出需要补偿的灰阶量，进而实现显示器的亮度差异补偿。其结构相较与目前的OLED器件结构少了电学参数感应结构，多了光学参数感应通道。由于电学补偿最终是要修正亮度的差异性，因此，本公开采用光学补偿相对于电学补偿更直接，补偿效果更好。而且具有结构简单等优点。
如图4所示，本实施例提供一种OLED显示基板，包括衬底基板1、位于衬底基板1上的薄膜晶体管阵列层2、平坦层8，以及位于平坦层8上阳极3、像素界定层7、阴极5、发光层4，所述像素界定层7限定出像素区域，所述发光层4位于像素限定层7远离衬底基板的一侧，该显示基板还包括与所述发光层4接触设置、并用于将所述发光层4的光导出的导光体101。所述导光体101用于对导出的光进行测试并调节发光。
如图3a和图3b所示，本实施例通过与所述发光层4接触设置的所述导光体101直接代替图1中的所述感测线，参考图3a，所述导光体101包括与数据线平行的行导光体01和与数据线相垂直的多个列导光体02，每一个列导光体02的一端与多个像素区域的发光层4接触、以将多个像素区域的光导出至行导光体01，行导光体01与外部传感器连接以获得相应的像素区域的亮度，以便进行像素亮度的采集，相比于图1a和图1b，本实施例的OLED显示基板的电路结构得到简化，少了T3管、sense line以及对应的其他线路。
所述导光体101的具体结构形式可以有多种，本实施例的一实施方式(实施方式一)中的所述导光体101的设置可以参考图4、图6a和图6b，图4表示本实施例的OLED显示基板的膜层结构在图3a的AA'方向的截面示意图。如图6a和6b所示，所述像素界定层7包括层叠设置的第一子像素界定层102和第二子像素界定层103，所述导光体101位于所述第一子像素界定层102和所述第二子像素界定层103之间，且所述导光体101包括外露于所述像素界定层7以与所述发光层4接触的接触部。
本实施方式中，所述导光体101的折射率大于所述像素界定层7的折射率。
所述导光体101的折射率相对于所述像素界定层7的折射率越大越好，以增强光在所述导光体101里的全反射，进而能使光沿着所述导光体101传导出去。
本实施方式中，所述导光体101包括与所述发光层4接触的第一侧1011，所述接触部位于所述第一侧1011，和与所述第一侧1011相对设置的第二侧1012，为了增加从所述导光体101导出的光的数量，所述第二侧1012设置有凹凸结构以使得进入所述导光体101的光线在所述第二侧1012发生全反射， 参考图5。
凹凸结构的设置，增大了光的传播角度，让更多的光线在所述导光体101与所述像素界定层7相邻的界面发生全反射。当然可以有其它提高采集的光线数量的方法，在此并不做限定。
所述凹凸结构的具体形状可以有多种，本实施例中，所述凹凸结构为锯齿状结构，如图5所示，但并不以此为限。
本实施方式中的OLED的显示基板的具体制作方法，如下：
在所述衬底基板1上形成薄膜晶体管阵列层2；
形成平坦层8；
形成阳极3，并进行图案化处理；
形成第一子像素界定层102，并对其进行图案化处理；
在所述第一子像素界定层102上形成所述导光体101，并进行图案化处理；
形成第二子像素界定层103，并进行图案化处理；
其中，所述第二子像素界定层103的设置需要使得所述导光体101用于与发光层4接触的接触部不被覆盖(即所述接触部不被所述第二子像素界定层103覆盖)，以便所述导光体101能够直接与发光层4接触，以接收入射光，所述导光体101的第二侧1012(与设置所述接触部的第一侧1011相对设置的一侧)被覆盖以实现光的全反射。
在由所述第一子像素界定层102和所述第二子像素界定层103构成的像素界定层7界定的像素区域形成发光层4；
依次形成阴极层5、封装层6。
本实施方式的OLED显示基板上的膜层结构的制作可参考图6a和图6b，进入所述导光体101的光沿C’C方向传播。
需要说明的是，图4对整体的膜层结构进行了简化，仅反映了层与层的上下关系，对膜层具体特征没有详细的描绘，图6a和图6b则对局部膜层结构的具体特征也做了描绘。下面的介绍内容也将只描绘膜层之间的位置关系，不体现具体特征。
本实施例的另一实施方式(实施方式二)中，所述薄膜晶体管阵列层2 包括设置于所述衬底基板1上的栅绝缘层21、第一平坦层81、刻蚀阻挡层22、钝化层23和第二平坦层82；
所述栅绝缘层21的第一位置设置有第一开口，所述第一平坦层81位于所述第一开口内；
在刻蚀阻挡层22和钝化层23的第二位置处设有第二开口，该第二开口贯穿所述刻蚀阻挡层22和钝化层23，如图7所示，位于所述第二开口内的刻蚀阻挡层22的部分形成第一子刻蚀阻挡层221，第二平坦层82填充在第一子刻蚀阻挡层221与所述刻蚀阻挡层22的其余部分之间，位于所述第二开口内的钝化层23的部分形成第一子钝化层231，第二平坦层82填充在第一子钝化层231与所述钝化层23的其余部分之间；
所述第二平坦层82在所述第二位置处具有第三开口、以露出所述第一子钝化层231，使得第一子钝化层231(透过阳极3)从发光层4导出光，其中，所述第二开口与第三开口在所述衬底基板上的正投影落在所述第一开口的正投影之内。
所述第一子刻蚀阻挡层221和所述第一子钝化层231共同形成导光结构，其作用与上述参照附图4描述的导光体101近似。
相对于实施方式一，本实施方式中，OLED显示基板的电路器件、线路布局示意图可以与图3a所示相似，但是所述导光体101的具体结构以及设置位置发生了变化，所述导光体101设置于所述第二平坦层82远离所述阳极3的一侧，如图7所示。
本实施方式中，所述第一子刻蚀阻挡层221的折射率大于所述第一平坦层81的折射率，所述第一子刻蚀阻挡层221的折射率大于所述第二平坦层82的折射率，所述钝化层23的折射率大于所述第一平坦层81的折射率，所述钝化层23的折射率大于所述第二平坦层82的折射率。
采用上述方案，所述发光层4的光线进入所述第一子钝化层23和第一子刻蚀阻挡层221，并在所述第一子钝化层23与所述第二平坦层82的界面发生全反射，以及在所述第一子刻蚀阻挡层221与所述第一平坦层81的界面发生全反射，从而使得光线在所述第一子钝化层23和所述第一子刻蚀阻挡层22构成的导光体内传播并导出。
本实施方式中的OLED显示基板的制作方法如下：
在衬底基板1上形成栅极层和栅极绝缘层；
在图3a所示的平面布局图中所述导光体101在栅极绝缘层上的正投影的位置(所述第一位置)，将栅极绝缘层刻蚀掉形成所述第一开口，然后在所述第一开口上形成第一平坦层81；
依次形成IGZO(铟镓锌氧化物)膜层、刻蚀阻挡层22、源极、漏极、钝化层23；
对钝化层23和刻蚀阻挡层22进行刻蚀以形成贯穿所述钝化层23和所述刻蚀阻挡层22的所述第二开口，(位于所述第一开口和所述第二开口内的钝化层23和刻蚀阻挡层22分别命名为第一子钝化层23和第一子刻蚀阻挡层22)；
形成第二平坦层82，部分所述第二平坦层82填充于所述第二开口内、与所述第一平坦层81合围以包覆所述第一子钝化层23和所述第一子刻蚀阻挡层22；
对所述第二平坦层82进行刻蚀以形成使得所述第一子钝化层23外露的第三开口；
第三开口的设置使得在形成发光层4后，发光层4与所述第一子钝化层23接触，进而使得光能够以全反射方式在由所述第一子钝化层23和所述第一子刻蚀阻挡层221构成的所述导光体101中进行传播。如果不形成所述第三开口，则所述第一子钝化层231不能与所述发光层4接触，即所述导光体101不能与所述发光层4接触，则无论光以多大角度进入所述导光体101，都将以相同的角度出射出去，无法让光在所述导光体101内传播，参考图8。
需要说明的是，阳极3为透明导电材料制成，例如ITO(氧化铟锡)或IZO(铟锌氧化物)，并不影响所述发光层4的光进入所述第一子钝化层231。
本实施例的另一实施方式(实施方式三)中，OLED显示基板的电路器件、线路布局示意图如图3a所示，OLED显示基板的膜层结构示意图如图9所示，所述薄膜晶体管阵列层2包括设置于所述衬底基板1上的栅绝缘层21、栅极、第一金属膜层91、刻蚀阻挡层22、钝化层23、第二金属膜层92和平坦层8；
所述第一金属膜层91与所述栅极同层制作，并形成在第一位置处；
在刻蚀阻挡层22和钝化层23的第二位置处设有第四开口，该第四开口贯穿所述刻蚀阻挡层22和钝化层23，如图9所示，位于所述第四开口内的刻蚀阻挡层22的部分形成第二子刻蚀阻挡层222，第二金属膜层92填充在第二子刻蚀阻挡层222与所述刻蚀阻挡层22的其余部分之间，位于所述第四开口内的钝化层23的部分形成第二子钝化层232，第二金属膜层92填充在第二子钝化层232与所述钝化层23的其余部分之间；
所述平坦层8在所述第二位置处具有第五开口、以露出所述第二子钝化层232，使得第二子钝化层232(透过阳极3)从发光层4导出光，其中，所述第四开口与第五开口在所述衬底基板上的正投影落在所述第一开口的正投影之内；
所述第二子刻蚀阻挡层222和所述第二子钝化层232共同形成导光结构，其作用与上述参照附图4描述的导光体101近似。。
采用上述技术方案，由于所述发光层4上方是阴极5，因此由于金属反光，所述发光层4发出的光全被限制在所述导光体101(所述第二子钝化层232和所述第二子刻蚀阻挡层222)内传播，相对于实施方式二，本实施方式的所述导光体101的导出的光的数量有很大提高。
本实施方式中，所述第一金属膜层91可以和栅极层同层制作，形成所述第四开口的图案，可形成源极、漏极的过孔的图案同时形成，所述第二金属膜层92和源极、漏极同层制作。当然本实施方式中的OLED显示模板的制作还可以采用其他制作方法。
本实施方式的OLED显示基板的具体制作方法如下：
在衬底基板1上形成栅极、第一金属膜层91；
形成栅绝缘层21和刻蚀阻挡层22；
对刻蚀阻挡层22进行图案化处理，以形成对应于源极、漏极的过孔和所述第四开口；
形成所述第二金属膜层92和所述源极、漏极；
形成钝化层23；
形成平坦层8，并进行图案化处理，以形成所述第五开口；
形成阳极3、像素界定层7、阴极5以及位于像素界定层7界定的像素区域内的发光层4。
本实施例另一实施方式(实施方式四)中，本实施例的OLED显示装置的电路器件、线路布局如图10a所示，图10a对应的OLED显示基板的膜层结构示意图如图11a所示，所述导光体101包括与数据线平行设置的多个行导光体01，行导光体01的数量像素区域的行数相同，即每一行像素区域对应连接一个行导光体01，光沿着一条直线传播，相对于图3a中的布局方式，减少了光线转向时造成的光传播角度的变化，进而降低了导致全反射光的减少的现象的发生。
本实施方式中，所述像素界定层7包括层叠设置的第一子像素界定层102和第二子像素界定层103，所述导光体101位于所述第一子像素界定层102和所述第二子像素界定层103之间，且所述导光体101包括外露于所述像素界定层7以与所述发光层4接触的接触部。
本实施方式中，所述导光体101的折射率大于所述像素界定层7的折射率。
所述导光体101的折射率相对于所述像素界定层7的折射率越大越好，以增强光在所述导光体101里的全反射，进而能使光沿着所述导光体101传导出去。
本实施方式中，所述导光体101包括与所述发光层4接触的第一侧1011，所述接触部位于所述第一侧1011，和与所述第一侧1011相对设置的第二侧1012，为了增加从所述导光体101导出的光的数量，所述第二侧1012设置有凹凸结构以使得进入所述导光体101的光线在所述第二侧1012发生全反射。
凹凸结构的设置，增大了光的传播角度，让更多的光线在所述导光体101与所述像素界定层7相邻的界面发生全反射。当然可以有其它提高采集的光线数量的方法，在此并不做限定。
本实施方式中的OLED的显示基板的具体制作方法，如下：
在所述衬底基板1上形成薄膜晶体管阵列层2；
形成平坦层8；
形成阳极3，并进行图案化处理；
形成第一子像素界定层102，并对其进行图案化处理；
在所述第一子像素界定层102上形成所述导光体101，并进行图案化处理；
形成第二子像素界定层103，并进行图案化处理；
其中，所述第二子像素界定层103的设置需要使得所述导光体101用于与发光层4接触的接触部不被覆盖(即所述接触部不被所述第二子像素界定层103覆盖)，以便所述导光体101能够直接与发光层4接触，以接收入射光，所述导光体101的第二侧1012(与设置所述接触部的第一侧1011相对设置的一侧)被覆盖以实现光的全反射。
在由所述第一子像素界定层102和所述第二子像素界定层103构成的像素界定层7界定的像素区域形成发光层4；
依次形成阴极5层、封装层6。
本实施例的另一实施方式(实施方式五)中，本实施方式中的OLED显示装置的电路器件、线路布局如图10b所示，图10b对应的OLED显示基板的膜层结构示意图如图11b所示，所述导光体101包括与数据线平行设置的多个行导光体01，行导光体01的数量等于像素区域的行数，即每一行像素区域对应连接一个行导光体01，光沿着一条直线传播，相对于图3a中的布局方式，光沿着一条直线传播，减少了光线转向时造成的光传播角度的变化，进而降低了导致全反射光的减少的现象的发生。
本实施方式中，所述薄膜晶体管阵列层2包括设置于所述衬底基板1上的栅绝缘层21、第一平坦层81、刻蚀阻挡层22、钝化层23和第二平坦层82；
所述栅绝缘层21的第一位置设置有第一开口，所述第一平坦层81位于所述第一开口内；
在刻蚀阻挡层22和钝化层23的第二位置处设有第二开口，该第二开口贯穿所述刻蚀阻挡层22和钝化层23，如图7所示，位于所述第二开口内的刻蚀阻挡层22的部分形成第一子刻蚀阻挡层221，第二平坦层82填充在第一子刻蚀阻挡层221与所述刻蚀阻挡层22的其余部分之间，位于所述第二开口内的钝化层23的部分形成第一子钝化层231，第二平坦层82填充在第一子钝化层231与所述钝化层23的其余部分之间；
所述第二平坦层82在所述第二位置处具有第三开口、以露出所述第一子钝化层231，使得第一子钝化层231(透过阳极3)从发光层4导出光，其中，所述第二开口与第三开口在所述衬底基板上的正投影落在所述第一开口的正投影之内。
所述第一子刻蚀阻挡层221和所述第一子钝化层231共同形成导光结构，其作用与上述参照附图4描述的导光体101近似。
。
本实施方式中，所述刻蚀阻挡层22的折射率大于所述第一平坦层81的折射率，所述刻蚀阻挡层22的折射率大于所述第二平坦层82的折射率，所述钝化层23的折射率大于所述第一平坦层81的折射率，所述钝化层23的折射率大于所述第二平坦层82的折射率。
采用上述方案，所述发光层4的光线进入所述第一子钝化层231和所述第二子刻蚀阻挡层222，并在所述第一子钝化层231与所述第二平坦层82的界面发生全反射，并在所述第一子刻蚀阻挡层221与所述第一平坦层81的界面发生全反射，从而使得光线在所述第一子钝化层231和所述第一子刻蚀阻挡层221构成的所述导光体101内传播并导出。
本实施方式中的OLED显示基板的制作方法如下：
在衬底基板1上形成栅极层和栅极绝缘层；
在图11b所示的平面布局图中所述导光体101在栅极绝缘层上的正投影的位置(所述第一位置)，将栅极绝缘层刻蚀掉形成所述第一开口，然后在所述第一开口上形成第一平坦层81；
依次形成IGZO(铟镓锌氧化物)膜层、刻蚀阻挡层22、源极、漏极、钝化层23；
对钝化层23和刻蚀阻挡层22进行刻蚀以形成贯穿所述钝化层23和所述刻蚀阻挡层22的所述第二开口，(位于所述第二开口内的钝化层23和刻蚀阻挡层22分别命名为第一子钝化层231和第一子刻蚀阻挡层221)；
形成第二平坦层82，部分所述第二平坦层82填充于所述第二开口内、与所述第一平坦层81合围以包覆所述第一子钝化层231和所述第一子刻蚀阻挡层221；
对所述第二平坦层82进行刻蚀以形成使得所述第一子钝化层231外露的第三开口；
第三开口的设置使得在形成发光层4后，发光层4与所述第一子钝化层231接触，进而使得光能够以全反射方式在由所述第一子钝化层231和所述第一子刻蚀阻挡层221构成的所述导光体101中进行传播。
需要说明的是，阳极3为透明导电材料制成，并不影响所述发光层4的光进入所述第一子钝化层231。
本实施例的另一实施方式(实施方式六)中，本实施方式的OLED显示装置的电路器件、线路布局如图10b所示，图10b对应的OLED显示基板的膜层结构示意图如图11b所示，所述导光体101包括与数据线平行设置的多个行导光体01，行导光体01的数量像素区域的行数相同，即每一行像素区域对应连接一个行导光体01，光沿着一条直线传播，相对于图3a中的布局方式，光沿着一条直线传播，减少了光线转向时造成的光传播角度的变化，进而降低了导致全反射光的减少的现象的发生。
所述薄膜晶体管阵列层2包括设置于所述衬底基板1上的栅绝缘层21、栅极、第一金属膜层91、刻蚀阻挡层22、钝化层23、第二金属膜层92和平坦层8；
所述第一金属膜层91与所述栅极同层制作；
所述钝化层23上设置有贯穿所述刻蚀阻挡层22的第四开口、以形成第二子刻蚀阻挡层22和第二子钝化层232，所述第二金属膜层92位于所述第四开口内、且与所述第一金属膜层91合围以包覆所述第二子钝化层232和所述第二子刻蚀阻挡层222；
所述平坦层8具有第五开口、以露出所述第二子钝化层232；
所述第二子刻蚀阻挡层222和所述第二子钝化层232构成所述导光体101。
采用上述技术方案，由于所述发光层4上方是阴极5，因此由于金属反光，所述发光层4发出的光全被限制在所述导光体101(所述第二子钝化层232和所述第二子刻蚀阻挡层222)内传播，相对于实施方式五，本实施方式的所述导光体101的导出的光的数量有很大提高。
本实施方式中，所述第一金属膜层91可以和栅极层同层制作，形成所述 第四开口的图案，可形成源极、漏极的过孔的图案同时形成，所述第二金属膜层92和源极、漏极同层制作。当然本实施方式中的OLED显示模板的制作还可以采用其他制作方法。
本实施方式的OLED显示基板的具体制作方法如下：
在衬底基板1上形成栅极、第一金属膜层91；
形成栅绝缘层21、刻蚀阻挡层22和钝化层23；
对刻蚀阻挡层22和钝化层23进行图案化处理，以形成对应于源极、漏极的过孔和所述第四开口；
形成所述第二金属膜层92和所述源极、漏极；
形成平坦层8，并进行图案化处理，以形成所述第五开口；
形成阳极3、像素界定层7、阴极5以及位于像素界定层7界定的像素区域内的发光层4。
本实施例还提供一种OLED显示装置，包括上述的OLED显示基板，以及与所述导光体101连接以采集所述发光层4的亮度信息、并根据所述亮度信息对相应的像素区域的亮度进行补偿的亮度补偿机构。
通过导光体101替换图1a中的感测线，可以实现每个像素亮度的采集，进而计算出各个像素的亮度灰阶曲线，再计算出需要补偿的灰阶量，进而实现显示器的亮度差异补偿。其结构相较与目前的OLED器件结构少了电学参数感应结构，多了光学参数感应通道。由于电学补偿最终是要修正亮度的差异性，因此，本实施例OLED显示装置采用光学补偿相对于电学补偿更直接，补偿效果更好。而且具有结构简单等优点。
本实施例中，所述亮度补偿机构包括：
亮度信息采集模块，用于采集每一像素区域内的所述发光层4的亮度信息，所述亮度信息包括与多个灰阶一一对应的亮度；
灰阶亮度曲线获取模块，用于根据所述亮度信息获取测量每一像素区域的灰阶亮度曲线；
灰阶补偿值获取模块，用于将所述测量灰阶亮度曲线与标准灰阶亮度曲线进行对比，以获得预设灰阶的灰阶补偿值；
补偿模块，用于根据所述灰阶补偿值进行亮度补偿。
本实施例中，还包括亮度校正模块，所述亮度校正模块包括：
标准光电传感器，与所述导光体101连接，以获取当前像素区域内的所述发光层4的测量亮度L1；
图像传感器，用于获取当前像素区域的实际亮度L2；
亮度校正系数获取单元，用于根据所述测量亮度L1和所述实际亮度L2获取亮度校正系数A＝L2/L1；
所述亮度信息采集模块获取的所述亮度信息为通过所述导光体101获取的第一亮度与所述亮度校正系数的乘积。
每个传感器的参数具有一定的差异，每一个像素区域的任一位置的发光亮度也会存在一定的差异，亮度校正模块的设置缩小了传感器参数等差异带来的亮度信息采集的差异，提高了亮度采集的精确性。
本实施例还提供一种亮度补偿方法，应用于上述OLED显示装置，包括以下步骤：
采集每一像素区域的发光层4的亮度信息，具体的，选择第i行、第j列对得像素区域，使其发光，通过与所述导光体101连接的光电传感器进行亮度采集；
根据所述亮度信息获取测量每一像素区域的灰阶亮度曲线，具体的，在所有灰阶中选取K个不同灰阶用来测量，分别点亮这K个灰阶，这里仍然是对每个像素区域逐个点亮，测量每个像素区域的亮度信息，由此可以拟合得到每个像素区域的灰阶亮度曲线；
将所述测量灰阶亮度曲线与标准灰阶亮度曲线进行对比，以获得预设灰阶的灰阶补偿值，具体的，将测量灰阶亮度曲线与标准灰阶亮度曲线做对比，计算出在标准灰阶亮度曲线中灰阶G对应的亮度，在测量灰阶亮度曲线中的实际灰阶值G'，则Δ＝G'-G为目标亮度的灰阶补偿值；
根据所述灰阶补偿值进行亮度补偿，具体的，根据灰阶补偿值和信号发生器提供的的显示灰阶，计算出补偿后的灰阶，再输出给行列的选择控制单元，控制显示屏显示。
以上所述为本公开较佳实施例，需要说明的是，对于本领域普通技术人员来说，在不脱离本公开所述原理的前提下，还可以做出若干改进和润饰， 这些改进和润饰也应视为本公开保护范围。

Claims (17)

  1. 一种OLED显示基板，包括衬底基板，位于衬底基板上的薄膜晶体管阵列层、平坦层，以及位于所述平坦层远离所述衬底基板一侧的阳极、像素界定层、阴极、发光层，所述像素界定层限定出像素区域，所述发光层位于像素限定层远离衬底基板一侧，所述显示基板还包括与所述发光层接触并用于将所述发光层的光导出的导光体，以对导出的光进行测试并调节发光。
  2. 根据权利要求1所述的OLED显示基板，其中，所述像素界定层包括沿远离衬底基板的方向层叠设置的第一子像素界定层和第二子像素界定层，所述导光体位于所述第一子像素界定层和所述第二子像素界定层之间，且所述导光体包括外露于所述像素界定层以与所述发光层接触的接触部。
  3. 根据权利要求2所述的OLED显示基板，其中，所述导光体的折射率大于所述像素界定层的折射率。
  4. 根据权利要求2所述的OLED显示基板，其中，所述导光体包括与所述发光层接触的第一侧，所述接触部位于所述第一侧，和与所述第一侧相对设置的第二侧，所述第二侧设置有凹凸结构以使得进入所述导光体的光线在所述第二侧发生全反射。
  5. 根据权利要求2所述的OLED显示基板，其中所述导光体包括与数据线平行设置的多个行导光体，所述行导光体的数量等于像素区域的行数，每一行像素区域对应连接一个行导光体。
  6. 根据权利要求5所述的OLED显示基板，其中所述导光体还包括至少一个列导光体，所述至少一个列导光体与所述行导光体相交。
  7. 根据权利要求1所述的OLED显示基板，其中，所述薄膜晶体管阵列层包括设置于所述衬底基板上的栅绝缘层、第一平坦层、刻蚀阻挡层、钝化层和第二平坦层；
    所述栅绝缘层的第一位置设置有第一开口，所述第一平坦层位于所述第一开口内；
    在所述刻蚀阻挡层和所述钝化层的第二位置处设有第二开口，所述第二开口贯穿所述刻蚀阻挡层和所述钝化层，位于所述第二开口内的刻蚀阻挡层 的部分形成第一子刻蚀阻挡层，所述第二平坦层填充在所述第一子刻蚀阻挡层与刻蚀阻挡层的其余部分之间，位于所述第二开口内的钝化层的部分形成第一子钝化层，所述第二平坦层填充在所述第一子钝化层与钝化层的其余部分之间；
    所述第二平坦层在所述第二位置处具有第三开口、以露出所述第一子钝化层所述第一子刻蚀阻挡层和所述第一子钝化层构成所述导光体，其中所述导光体还包括阳极，所述阳极设置在所述第一子钝化层和所述发光层之间，其中，所述第二开口和所述第三开口在所述衬底基板上的正投影落在所述第一开口的正投影之内。
  8. 根据权利要求7所述的OLED显示基板，其中，所述刻蚀阻挡层的折射率大于所述第一平坦层的折射率，所述刻蚀阻挡层的折射率大于所述第二平坦层的折射率，所述钝化层的折射率大于所述第一平坦层的折射率，所述钝化层的折射率大于所述第二平坦层的折射率。
  9. 根据权利要求1所述的OLED显示基板，其中，所述薄膜晶体管阵列层包括设置于所述衬底基板上的栅绝缘层、栅极、第一金属膜层、刻蚀阻挡层、钝化层、第二金属膜层和平坦层；
    所述第一金属膜层与所述栅极同层制作，并形成在第一位置处；
    在所述刻蚀阻挡层和所述钝化层的第二位置处设有第四开口，所述第四开口贯穿所述刻蚀阻挡层和所述钝化层，位于所述第四开口内的刻蚀阻挡层的部分形成第二子刻蚀阻挡层，第二金属膜层填充在所述第二子刻蚀阻挡层与刻蚀阻挡层的其余部分之间，位于所述第四开口内的钝化层的部分形成第二子钝化层，所述第二金属膜层填充在所述第二子钝化层与钝化层的其余部分之间；
    所述平坦层在所述第二位置处具有第五开口、以露出所述第二子钝化层；
    所述第二子刻蚀阻挡层和所述第二子钝化层构成所述导光体，
    其中，所述第五开口在所述衬底基板上的正投影落在所述第四开口的正投影之内。
  10. 一种OLED显示基板的制作方法，包括：
    在衬底基板上形成薄膜晶体管阵列层；
    形成平坦层；
    在所述平坦层远离所述衬底基板的一侧形成阳极和像素界定层；
    在所述像素界定层远离所述衬底基板的一侧形成发光层；
    形成导光体，所述导光体与所述发光层接触，用于将所述发光层的光导出并且对导出的光进行测试并调节发光；以及
    在所述发光层上形成阴极。
  11. 如权利要求10所述的制作方法，其中所述像素界定层包括第一子像素界定层和第二子像素界定层，在所述形成平坦层的步骤之后，所述方法包括：
    形成阳极并进行图案化处理；
    形成第一子像素界定层并进行图案化处理；
    在所述第一子像素界定层上形成导光体，并进行图案化处理；
    在所述第一子像素界定层和所述导光体上形成第二子像素界定层，并进行图案化处理；
    在所述第二子像素界定层上形成发光层；以及
    在所述发光层上形成阴极。
  12. 如权利要求10所述的制作方法，其中所述导光体由钝化层和刻蚀阻挡层构成，所述方法包括：
    在所述衬底基板上形成栅极层和栅极绝缘层；
    在第一位置对栅极绝缘层进行刻蚀以形成第一开口；
    在所述第一开口中形成第一平坦层；
    形成刻蚀阻挡层和钝化层；
    对所述钝化层和所述刻蚀阻挡层进行刻蚀，以形成贯穿所述钝化层和所述刻蚀阻挡层的第二开口，位于所述第二开口内的刻蚀阻挡层的部分形成第一子刻蚀阻挡层，位于所述第二开口内的钝化层的部分形成第一子钝化层；
    形成第二平坦层，填充于所述第二开口内的部分第二平坦层、与所述第一平坦层合围以包覆所述第一子钝化层和所述第一子刻蚀阻挡层；
    在所述第二位置处对所述第二平坦层进行刻蚀，以形成露出所述第一子钝化层的第三开口。
  13. 如权利要求10所述的制作方法，其中所述导光体由钝化层和刻蚀阻挡层构成，所述方法包括：
    在所述衬底基板上同层形成栅极和第一金属膜层，其中所述第一金属膜层形成在第一位置处；
    形成栅绝缘层、钝化层和刻蚀阻挡层；
    对所述钝化层和所述刻蚀阻挡层进行图案化处理以形成第四开口，位于所述第四开口内的刻蚀阻挡层的部分形成第二子刻蚀阻挡层，位于所述第四开口内的钝化层的部分形成第二子钝化层；
    在所述第四开口中形成第二金属膜层，所述第二金属膜层填充在所述第二子刻蚀阻挡层与刻蚀阻挡层的其余部分之间，并且填充在所述第二子钝化层与钝化层的其余部分之间；
    形成平坦层并进行图案化处理，以形成所述第五开口；
    形成阳极、像素界定层、阴极以及位于像素界定层界定的像素区域内的发光层。
  14. 一种OLED显示装置，包括权利要求1-11任一项所述的OLED显示基板，以及与所述导光体连接以采集所述发光层的亮度信息、并根据所述亮度信息对相应的像素区域的亮度进行补偿的亮度补偿机构。
  15. 根据权利要求14所述的OLED显示装置，其中，所述亮度补偿机构包括：
    亮度信息采集模块，用于采集每一像素区域内的所述发光层的亮度信息，所述亮度信息包括与多个灰阶一一对应的亮度；
    灰阶亮度曲线获取模块，用于根据所述亮度信息获取测量的灰阶亮度曲线；
    灰阶补偿值获取模块，用于将所述测量灰阶亮度曲线与标准灰阶亮度曲线进行对比，以获得预设灰阶的灰阶补偿值；
    补偿模块，用于根据所述灰阶补偿值进行亮度补偿。
  16. 根据权利要求15所述的OLED显示装置，还包括亮度校正模块，所述亮度校正模块包括：
    标准光电传感器，与所述导光体连接，以获取当前像素区域内的所述发 光层的测量亮度L1；
    图像传感器，用于获取当前像素区域的实际亮度L2；
    亮度校正系数获取单元，用于根据所述测量亮度L1和所述实际亮度L2获取亮度校正系数A＝L2/L1；
    所述亮度信息采集模块获取的所述亮度信息为通过所述导光体获取的第一亮度与所述亮度校正系数的乘积。
  17. 一种亮度补偿方法，应用于权利要求14-16任一项所述OLED显示装置，包括以下步骤：
    采集每一像素区域的发光层的亮度信息；
    根据所述亮度信息获取测量的灰阶亮度曲线；
    将所述测量灰阶亮度曲线与标准灰阶亮度曲线进行对比，以获得预设灰阶的灰阶补偿值；
    根据所述灰阶补偿值进行亮度补偿。
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