WO2020191606A1 - 一种推挽型驱动电路 - Google Patents

一种推挽型驱动电路 Download PDF

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Publication number
WO2020191606A1
WO2020191606A1 PCT/CN2019/079641 CN2019079641W WO2020191606A1 WO 2020191606 A1 WO2020191606 A1 WO 2020191606A1 CN 2019079641 W CN2019079641 W CN 2019079641W WO 2020191606 A1 WO2020191606 A1 WO 2020191606A1
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WIPO (PCT)
Prior art keywords
driver
signal
push
drive circuit
pull drive
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PCT/CN2019/079641
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English (en)
French (fr)
Inventor
李晓波
Original Assignee
华为技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Priority to CN201980091308.2A priority Critical patent/CN113396536A/zh
Priority to PCT/CN2019/079641 priority patent/WO2020191606A1/zh
Publication of WO2020191606A1 publication Critical patent/WO2020191606A1/zh

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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/26—Push-pull amplifiers; Phase-splitters therefor

Definitions

  • This application relates to the field of communications, and more particularly to a push-pull drive circuit.
  • the emitter follower is a common driving device.
  • the ordinary emitter follower has only one driving transistor to provide driving capability.
  • the driving capability is only determined by the current source, and has nothing to do with driving the triode.
  • the radio frequency signal has two states: up or down, so when the signal is up or down, it is a better solution to have a transistor on to provide driving capability.
  • Its classic circuit structure is a Class B output driver, which consists of an NPN three-stage Tube and a PNP transistor.
  • the embodiment of the application provides a push-pull drive circuit.
  • the push-pull drive circuit can provide paths for uplink signals and downlink signals respectively during the process of transmitting radio frequency signals, thereby avoiding
  • the use of PNP transistors provides the possibility to be applied to high-performance radio frequency circuits, with a wide range of applications, single-ended design and simple structure.
  • the first aspect of the present application provides a push-pull drive circuit, which can be used in amplifiers or drivers and other devices that require an amplification function.
  • Electronic devices involved in the operation of the push-pull drive circuit Corresponding functional entities in amplifiers or drivers and other devices that require amplifying functions.
  • the circuit may include: a first driver, a load device, a second driver, an input interface, and an output interface; wherein the base of the first driver is connected to the input interface, and the emitter of the first driver is connected to the output interface,
  • the collector of the first driver is connected to the first terminal of the load device, the second terminal of the load device is grounded or powered, the collector of the first driver is connected to the base of the second driver, and the second driver is The collector is connected to the output interface;
  • the first driver is used to receive the first signal through the input interface and transmit the in-phase signal of the first signal to the output interface;
  • the load device is used to generate the first signal in response to the first signal
  • the second signal, the phase of the second signal is opposite to the phase of the first signal;
  • the second driver is used for receiving the second signal, and transmitting the inverted signal of the second signal to the output interface.
  • the push-pull drive circuit can provide paths for uplink signals and downlink signals respectively during the transmission of radio frequency signals, avoiding the use of PNP transistors, and making it possible to apply to high-performance radio frequency circuits. wide range.
  • the push-pull drive circuit further includes: a feedback device, the first end of the feedback device is connected to the collector of the first driver, and the second end of the feedback device is connected to the collector of the first driver.
  • the base of the second driver is connected; the feedback device is used to couple the second signal, and feed back the coupled second signal to the base of the second driver.
  • the push-pull drive circuit further includes: a biasing device, the first end of the biasing device is connected to the base of the second driver, and the first end of the biasing device The two ends are connected to the power supply, and the third end of the bias device is grounded; the bias device is used to provide a bias voltage for the second driver, so that the second driver is in a required bias state; and is also used for isolation The bias circuit and the second signal. It can be seen from this possible implementation that the bias voltage provided by the bias device ensures that the second driver can be at a suitable working voltage, which improves the stability of the circuit.
  • the push-pull drive circuit may further include: a matching device, the first end of the matching device is connected to the emitter of the second driver, and the second end of the matching device Ground; the matching device is used to obtain the current of the emitter of the second driver, adjust the voltage of the emitter of the second driver, and then adjust the current of the emitter of the second driver, so that the adjusted emitter of the second driver
  • the matching degree between the current of and the current source current of the second driver is less than the preset threshold.
  • the feedback device includes: a first capacitor or a feedback circuit. It can be seen from this possible implementation that the feedback device can not only use simple capacitors to achieve corresponding functional effects, but also can improve the applicability of the push-pull drive circuit through the form of feedback circuits adapted to different scenarios.
  • the bias device includes: a first resistor, a first inductor, or other radio frequency isolation circuit, and a bias circuit that can provide a suitable bias voltage. It can be seen from this possible implementation that the biasing device can not only use simple resistors or inductors to achieve corresponding functional effects, but also can improve the applicability of push-pull drive circuits by adopting feedback circuit forms adapted to different scenarios.
  • the first driver and the second driver include: a bipolar junction transistor, a metal-oxide semiconductor field effect transistor, or a metal-semiconductor field effect transistor. It can be seen from this possible implementation that the driver can be adaptively selected for different driving scenarios, indicating that the push-pull driving circuit has good applicability.
  • the load device includes: a second resistor, a second inductor, or an active device. It can be seen from this possible implementation that the load device can not only use simple resistors or inductors to achieve corresponding functional effects, but also can improve the applicability of push-pull drive circuits through active device forms adapted to different scenarios.
  • the matching device includes: a third resistor. It can be seen from this possible implementation that the matching device can use simple resistors to achieve corresponding functional effects, has a simple structure and is easy to operate.
  • a second aspect of the embodiments of the present application provides a terminal device, including: a receiving device, a gain device, a transmitting device, and a controller.
  • the radio frequency amplifier includes the signal amplification circuit in any possible implementation manner of the first aspect.
  • a third aspect of the embodiments of the present application provides a gain device, including: a digital-to-analog converter, a quadrature modulator, a driver amplifier, and a radio frequency amplifier.
  • the gain device includes the signal amplification circuit in any possible implementation manner of the first aspect. .
  • the base of the first driver is connected to the input interface
  • the emitter of the first driver is connected to the output interface
  • the collector of the first driver is connected to the load device, and the load device Ground or power
  • the collector of the first driver is connected to the base of the second driver
  • the collector of the second driver is connected to the output interface, so that the push-pull drive circuit can be used for transmitting radio frequency signals.
  • the uplink signal and the downlink signal provide paths, avoiding the use of PNP transistors, and providing the possibility of being applied to high-performance radio frequency circuits. It has a wide range of applications and adopts a single-ended design with a simple structure.
  • Figure 1 is a circuit diagram of an emitter follower in the prior art
  • Figure 2 is a circuit diagram of a push-pull drive circuit in the prior art
  • Figure 3 is a circuit diagram of another push-pull drive circuit in the prior art
  • FIG. 4 is a schematic diagram of a push-pull drive circuit provided by an embodiment of the present application.
  • FIG. 5 is a schematic diagram of another push-pull drive circuit provided by an embodiment of the present application.
  • FIG. 6 is a schematic diagram of another push-pull drive circuit provided by an embodiment of the present application.
  • FIG. 7 is a schematic diagram of another push-pull drive circuit provided by an embodiment of the present application.
  • FIG. 8 is a diagram of a push-pull drive circuit provided by an embodiment of the present application.
  • FIG. 9 is a diagram of another push-pull drive circuit provided by an embodiment of the present application.
  • FIG. 10 is a schematic structural diagram of a terminal device provided by an embodiment of the present application.
  • FIG. 11 is a schematic structural diagram of a gain device provided by an embodiment of the present application.
  • the embodiment of the application provides a push-pull drive circuit, which is connected to an input interface through the base of a first driver, the emitter of the first driver is connected to the output interface, and the collector of the first driver is connected to the load device
  • the load device is grounded or powered, the collector of the first driver is connected to the base of the second driver, and the collector of the second driver is connected to the output interface, so that the push-pull drive circuit is in the process of transmitting radio frequency signals It can provide paths for uplink signals and downlink signals separately, avoiding the use of PNP transistors, and making it possible to be applied to high-performance radio frequency circuits, with a wide range of applications, single-ended design, and simple structure.
  • the emitter follower is a common driving device. As shown in Figure 1, it is a circuit diagram of the emitter follower in the prior art.
  • the common emitter follower has only one driving transistor to provide driving capability. When the input signal is downstream at a large rate, the driving capability is only determined by the current source, and has nothing to do with the driving transistor.
  • the radio frequency signal has two states: up or down, so when the signal is up or down, it is a better solution to have a transistor on to provide driving capability.
  • the classic circuit structure is a Class B output drive circuit, as shown in Figure 2.
  • the Class B output drive circuit is composed of an NPN triode Q1 and a PNP triode Q2.
  • FIG. 3 is another push-pull drive circuit in the prior art.
  • Circuit diagram of type drive circuit Wherein the input signals V ip and V in have two paths. Taking V ip as an example, one path is to directly drive the output V op through Q1; the other path is to reach the base of Q6 through the emitter of Q3, and a signal opposite to Vip is generated at the collector of Q6 to drive V on .
  • V in is similar to V ip , one path is directly output to V on through Q2, and the other is through Q4 and Q5 to output a signal that is inverted to V in to V op ; from the perspective of output mode, V op is provided by Q1 and Q5 Driving force, V on is provided by Q2 and Q6.
  • This differential DC-coupled push-pull drive circuit avoids the use of PNP transistors and avoids the working area where the output transistors are in the off state at the same time, but the first aspect must use a differential circuit, and single-ended circuits cannot be applied; the second aspect, the circuit structure It is more complicated and requires additional current sources I1 and I2, which increases power consumption.
  • the circuit also needs to be careful about voltage margin issues, that is, excessive voltage swings may cause the collectors of Q5 and Q6 to be biased, making Circuit failure, affecting circuit function.
  • an embodiment of the present application proposes a push-pull drive circuit, which can be applied to the driving and amplification scenarios of radio frequency signals. It is understandable that the embodiment of the present application proposes a push-pull drive circuit that can also be applied to In other scenarios that require enhanced electrical signal driving capabilities, such as terminal mobile networks, optical communication networks, or wired communication networks, the specific scenarios depend on actual conditions and are not limited here.
  • FIG. 4 it is a schematic diagram of a push-pull drive circuit provided by an embodiment of the present application.
  • the push-pull drive circuit includes but not It is limited to the following modules: the first driver 401, the load device 402, and the second driver 403.
  • the base a1 of the first driver 401 is connected to the input interface
  • the emitter a3 of the first driver 401 is connected to the output interface
  • the collector a2 of the first driver 401 is connected to the first end of the load device 402
  • the second terminal of the load device 402 is grounded or powered
  • the collector a2 of the first driver 401 is connected to the base b1 of the second driver 403
  • the collector b2 of the second driver 403 is connected to the output interface.
  • the first driver 401 is configured to receive a first signal through the input interface, and transmit an in-phase signal of the first signal to the output interface.
  • the load device 402 is used to generate a second signal in response to the first signal, and the phase of the second signal is opposite to the phase of the first signal.
  • the second driver 403 is used for receiving the second signal and transmitting the inverted signal of the second signal to the output interface.
  • the first driver 401 and the second driver 403 may be bipolar junction transistors (BJT), metal-oxide-semiconductor field-effect transistors (MOSFET) Or metal-semiconductor [contact barrier] field effect transistors (Metal Epitaxial-semiconductor Field Effect Transistor, MESFET).
  • BJT bipolar junction transistors
  • MOSFET metal-oxide-semiconductor field-effect transistors
  • MESFET metal-semiconductor [contact barrier] field effect transistors
  • first driver 401 and the second driver 403 are NPN transistors in bipolar junction transistors, a1 is the base, a2 is the collector, and a3 is the emitter; when the first driver is a MOSFET, a1 is the source, a2 is the gate, and a3 is the drain; among them, the naming of a1, a2, and a3 is only to illustrate their functions, and the corresponding device is not limited by the naming.
  • the input interface is connected to the first signal.
  • the emitter a3 of the first driver 401 can be directly driven to the output interface, or the collector a2 of the first driver 401 can be responded by the load device.
  • the first signal generates a second signal, the second signal is inverted from the first signal, and the second signal is driven by the second driver 403 to be output to the output interface to realize the push-pull driving function.
  • an embodiment of the present application provides a push-pull drive circuit with a feedback device to solve the problem of voltage margin when the DC point of the second signal is large, which is described below with reference to the accompanying drawings.
  • FIG. 5 it is a schematic diagram of another push-pull drive circuit provided by an embodiment of the present application.
  • the push-pull drive circuit includes but is not limited to the following modules:
  • the base a1 of the first driver 501 is connected to the input interface, the emitter a3 of the first driver 501 is connected to the output interface, and the collector a2 of the first driver 501 is connected to the first end of the load device 502 ,
  • the second terminal of the load device 502 is grounded or powered, the collector a2 of the first driver 501 is connected to the first terminal of the feedback device 504, and the second terminal of the feedback device 504 is connected to the base of the second driver 503 b1 is connected, the collector b2 of the second driver 503 is connected to the output interface, and the emitter b3 of the second driver 503 is grounded.
  • the first driver 501 is configured to receive a first signal through the input interface, and transmit an in-phase signal of the first signal to the output interface.
  • the load device 502 is configured to generate a second signal in response to the first signal, and the phase of the second signal is opposite to the phase of the first signal.
  • the second driver 503 is configured to receive the second signal and transmit the inverted signal of the second signal to the output interface.
  • the feedback device 504 is configured to couple the second signal, and feed back the coupled second signal to the base b1 of the second driver.
  • the descriptions of the first driver 501, the load device 502, and the second driver 503 can refer to the description of the relevant components in FIG. 4, which will not be repeated here.
  • the feedback device 504 may be a capacitor or a circuit with a coupling function.
  • the specific device depends on the actual scene and is not limited here.
  • the input interface is connected to the first signal.
  • the emitter a3 of the first driver 501 can be directly driven to the output interface; or the collector a2 of the first driver 501 can be driven by the load device 502.
  • a second signal is generated in response to the first signal.
  • the second signal is inverted from the first signal.
  • the second signal is coupled by the feedback device 504 and then fed back to the second driver 503.
  • the second signal is then driven by the second driver 503 to output to the output interface , Realize the function of push-pull drive.
  • the push-pull drive circuit avoids the problem of voltage margin and has a wider application range.
  • the feedback device 504 may not be able to generate a suitable DC voltage (for example, When the transistor is made of silicon tube, the input voltage must be above 0.7V). When the voltage between the base and the emitter is less than 0.7V, the base, collector, and emitter currents can be considered as zero. However, in practice, the signal to be amplified is often much smaller than 0.7V. If the bias is not applied, such a small signal is not enough to cause a change in the base current. Therefore, the embodiment of the present application provides a booster including a bias device.
  • the pull-type drive circuit is used to solve the problems in the above-mentioned scenarios, which will be described below with reference to the drawings.
  • FIG. 6 it is a schematic diagram of another push-pull drive circuit provided by an embodiment of the present application.
  • the push-pull drive circuit includes but is not limited to the following modules:
  • the base a1 of the first driver 601 is connected to the input interface
  • the emitter a3 of the first driver 601 is connected to the output interface
  • the collector a2 of the first driver 601 is connected to the first end of the load device 602
  • the second terminal of the load device 602 is grounded or powered
  • the collector a2 of the first driver 601 is connected to the first terminal of the feedback device 604
  • the second terminal of the feedback device 604 is connected to the base of the second driver 603 b1 is connected
  • the collector b2 of the second driver 603 is connected to the output interface
  • the emitter b3 of the second driver 603 is grounded
  • the first end of the bias device 605 is connected to the base b1 of the second driver 603,
  • the second end of the bias device 605 is connected to an external power source.
  • the first driver 601 is configured to receive a first signal through the input interface, and transmit an in-phase signal of the first signal to the output interface.
  • the load device 602 is configured to generate a second signal in response to the first signal, and the phase of the second signal is opposite to the phase of the first signal.
  • the second driver 603 is configured to receive the second signal and transmit an inverted signal of the second signal to the output interface.
  • the feedback device 604 is used for coupling the second signal, and feeding back the coupled second signal to the base b1 of the second driver.
  • the bias device 605 includes a bias circuit for providing a DC bias voltage to the second driver 603, so that the second driver 603 is in a required DC bias state; the bias device 605 also includes an isolation circuit Used to isolate the bias circuit from the second signal.
  • the description of the first driver 601, the load device 602, and the second driver 603 can refer to the description of the related components in FIG. 4, and the description of the feedback device 604 can refer to the description of the related components in FIG. 5, which will not be repeated here. .
  • the biasing device 605 can be a device, such as a resistor or an inductor, or a circuit, such as a radio frequency isolation circuit plus a current source that can provide a bias voltage, where the current source can be It is a mirror current source, a proportional current source, or a micro current source.
  • the selection of specific devices or circuits depends on specific scenarios, and the possible devices or circuits of the biasing device 605 in this embodiment can be applied to the circuit of FIG. 4 or FIG. 5 .
  • the input interface is connected to the first signal.
  • the emitter a3 of the first driver 601 can be directly driven to the output interface; or the collector a2 of the first driver 601 can be driven by the load device 602.
  • a second signal is generated in response to the first signal.
  • the second signal is inverted from the first signal.
  • the second signal is coupled by the feedback device 604 and then fed back to the second driver 603.
  • the The device 605 adjusts the second driver 603 to be in a preset bias state, and then the second signal is driven and output to the output interface through the second driver 503 to realize the function of push-pull driving.
  • the setting of the preset bias state can be based on the requirements of the device, or adjusted based on the experience of the relevant staff. The specific method depends on the actual scenario and is not limited here.
  • the second driver is equivalent to the current source of the second signal in the push-pull drive circuit, and the actual current source of the MOSFET source or BJT emitter when a resistance value in series is much larger than the derivative of the MOSFET or BJT transmission admittance,
  • the current supplied by it has almost nothing to do with the matching of MOFETS or BJT, and its characteristics are closer to an ideal current source, so a matching device can be connected in series with the emitter of the second driver to adjust the voltage of the emitter of the second driver, and then The current of the emitter of the second driver is adjusted so that the matching degree between the adjusted current of the emitter of the second driver and the current of the mirror source is smaller than the preset threshold.
  • FIG. 7 it is a schematic diagram of another push-pull drive circuit provided by an embodiment of the present application.
  • the first end of the matching device 706 is connected to the emitter b3 of the second driver 703, and the second end of the matching device 706 is connected to the emitter b3 of the second driver 703. Terminal is grounded;
  • the description of the first driver 701, the load device 702 and the second driver 703 can refer to the description of the relevant components in Figure 4,
  • the description of the feedback device 704 can refer to the description of the relevant components in Figure 5, and the description of the bias device 705 can be Refer to the description of the relevant components in FIG. 6, which will not be repeated here.
  • the push-pull driving circuit provided in this embodiment may adopt the circuit diagram form shown in FIG. 8. As shown in FIG. 8, it is a push-pull driving circuit diagram provided by an embodiment of the present application.
  • first transistor Q 1 and second transistor Q 2 may also be MOSFETs, and the second resistor R B may be an inductor I 1.
  • the circuit diagram can be referred to as shown in FIG. 9
  • the method, as shown in FIG. 9, is another push-pull driving circuit diagram provided by an embodiment of the present application. For the specific working method, refer to the description in FIG. 6, and will not be repeated here.
  • FIG. 10 is a structure of a terminal device provided by an embodiment of the application. Schematic.
  • the terminal device 1000 may receive an input signal through a receiving device at one end, and the input signal may be input in a wireless manner.
  • the receiving device 1001 may include an antenna or other wireless receiving unit; The input signal may also be input via a wired cable.
  • the receiving device 1001 may include a demodulator or other wired receiving unit.
  • the other end of the terminal device 1000 sends an output signal through the sending device 1003.
  • the type of the sending device 1003 is related to the form of the output signal. For details, refer to the above description of the receiving device 1001, which will not be repeated here.
  • the terminal equipment 1000 further includes a gain device 1002 and a controller 1004.
  • the first end of the gain device 1002 is connected to the receiving device 1001, and the gain device 1002 is used to receive the input signal to be processed; the second end of the gain device 1002 is connected to The transmitting device 1003 is connected, and the gain device 1002 is used to amplify the input signal and transmit the amplified signal to the transmitting device 1003; the third end of the gain device 1002 is connected to the first end of the controller 1004, and the gain device 1002 is used for The gain status of the input signal is fed back and related information is sent to the controller 1004.
  • the second end of the controller 1004 is connected to the receiving device 1001, the controller 1004 is used to monitor the fluctuation state of the input signal, and generate a corresponding gain parameter according to the fluctuation state and transmit the parameter to the gain device 1002; the controller The third end of 1004 is connected to the sending device 1003, and the controller 1004 is used to monitor the signal strength of the output signal to obtain the working status of the sending device 1003.
  • the push-pull drive circuit provided in this embodiment can not only be applied to a single radio frequency signal amplification or a single digital signal amplification, but also can be applied to a conversion scene between a digital signal and a radio frequency signal.
  • the gain device 1002 can be understood with reference to FIG. 11.
  • FIG. 11 is a schematic structural diagram of a gain device provided by an embodiment of the present application.
  • the gain device 1100 of this embodiment may include the push-pull driving circuit provided in the above-mentioned embodiment. Specifically, the push-pull driving circuit may be applied to driving The amplifier 1103 or the radio frequency amplifier 1104.
  • the gain device 1100 may include: a digital-to-analog converter 1101, a quadrature modulator 1102, a driving amplifier 1103, and a radio frequency amplifier 1104.
  • the digital-to-analog converter 1101 performs digital-to-analog conversion on a pair of digital quadrature signal I/Q to convert the digital signal into an analog signal
  • the quadrature modulator 1102 is connected to the digital-to-analog converter 1101 to convert the digital-to-analog converter 1101
  • the obtained analog quadrature signal is subjected to quadrature modulation to generate a modulated signal
  • the driving amplifier 1103 is connected to the quadrature modulator 1102, and the modulated signal obtained by the modulation of the quadrature modulator 1102 is driven and amplified
  • the radio frequency amplifier 1104 and the controller 1105 is connected, the radio frequency amplifier 1104 receives the gain parameter provided by the controller 1105 and the drive-amplified modulation signal provided by the drive amplifier 1103, and performs radio frequency amplification on the
  • the naming or numbering of steps appearing in this application does not mean that the steps in the method flow must be executed in the time/logical order indicated by the naming or numbering.
  • the named or numbered process steps can be implemented according to the The technical purpose changes the execution order, as long as the same or similar technical effects can be achieved.
  • the division of modules presented in this application is a logical division. In actual applications, there may be other divisions. For example, multiple modules can be combined or integrated in another system, or some features can be ignored , Or not to execute, in addition, the displayed or discussed mutual coupling or direct coupling or communication connection may be through some interfaces, and the indirect coupling or communication connection between modules may be electrical or other similar forms. There are no restrictions in the application.
  • the modules or sub-modules described as separate components may or may not be physically separate, may or may not be physical modules, or may be distributed to multiple circuit modules, and some or all of them may be selected according to actual needs Module to achieve the purpose of this application program.

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Abstract

一种推挽型驱动电路，通过第一驱动器(401)的基极(a1)与输入接口相连，第一驱动器(401)的发射极(a3)与输出接口相连，第一驱动器(401)的集电极(a2)与负载装置(402)相连，负载装置(402)接地或电源，第一驱动器(401)的集电极(a2)与第二驱动器(403)的基极(b1)相连，第二驱动器(403)的集电极(b2)与输出接口相连，使得推挽型驱动电路在传输射频信号的过程中可以分别为上行信号和下行信号提供路径，避免了PNP三极管的使用。

Description

一种推挽型驱动电路 技术领域
本申请涉及通信领域，尤其涉及一种推挽型驱动电路。
背景技术
在射频信号需要加强驱动能力的场景中，常用到放大装置或驱动装置，其中，射级跟随器就是一种常见的驱动装置，普通的射级跟随器只有一个驱动三极管提供驱动能力，当输入信号大速率下行的时候，驱动能力仅由电流源决定，而与驱动三级管无关。
然而，射频信号有上行或下行两种状态，故信号上行或下行时各有一个三极管开启提供驱动能力是更优的解决方案，其经典电路结构为Class B型输出驱动器，其由一个NPN三级管和一个PNP三极管组成。
由于在射频电路中需要高性能PNP管，然而目前很多高性能工艺并不提供高性能PNP管，使得在射频电路中无法使用Class B型输出驱动器，影响驱动器的驱动性能以及应用范围。
发明内容
本申请实施例提供了一种推挽型驱动电路，通过两个NPN管的联合使用，使得该推挽型驱动电路在传输射频信号的过程中可以分别为上行信号和下行信号提供路径，避免了PNP三极管的使用，为应用于高性能射频电路提供可能，应用范围广，且采用单端设计，结构简单。
为达到上述目的，本申请实施例提供如下技术方案：
本申请第一方面提供一种推挽型驱动电路，该推挽型驱动电路可应用于放大器或驱动器及其他需要放大功能的设备中，该推挽型驱动电路在运行过程中涉及到的电子器件在放大器或驱动器及其他需要放大功能的设备中对应相应的功能实体。该电路可以包括：第一驱动器、负载装置、第二驱动器、输入接口和输出接口；其中，该第一驱动器的基极与该输入接口相连，该第一驱动器的发射极与该输出接口相连，该第一驱动器的集电极与该负载装置的第一端相连，该负载装置的第二端接地或电源，该第一驱动器的集电极与该第二驱动器的基极相连，该第二驱动器的集电极与该输出接口相连；该第一驱动器，用于通过该输入接口接收第一信号，向该输出接口传输该第一信号的同相信号；该负载装置，用于响应该第一信号产生第二信号，该第二信号的相位与该第一信号的相位相反；该第二驱动器，用于接收该第二信号，向该输出接口传输该第二信号的反相信号。由该可能的实现方式可见，该推挽型驱动电路在传输射频信号的过程中可以分别为上行信号和下行信号提供路径，避免了PNP三极管的使用，为应用于高性能射频电路提供可能，应用范围广。
可选的，在本申请的一些实施例中，该推挽型驱动电路还包括：反馈装置，该反馈装置的第一端与该第一驱动器的集电极相连，该反馈装置的第二端与该第二驱动器的基极相连；该反馈装置，用于耦合该第二信号，反馈耦合后的该第二信号至该第二驱动器的基极。 由该可能的实现方式可见，由于第二信号可能直流点较大，直接传输至第二驱动器易导致第二驱动器的集电极正偏，导致电路失效，影响电路功能，通过反馈装置的接入，可以解决第二信号直流点较大时电压裕度的问题，提高了电路的稳定性。
可选的，在本申请的一些实施例中，该推挽型驱动电路还包括：偏置装置，该偏置装置的第一端与该第二驱动器的基极相连，该偏置装置的第二端与电源连接，该偏置装置的第三端接地；该偏置装置，用于为该第二驱动器提供偏置电压，使得该第二驱动器处于所需要的偏置状态；还用于隔离该偏置电路与该第二信号。由该可能的实现方式可见，通过偏置装置提供的偏置电压，保证了该第二驱动器可以处于合适的工作电压，提高了电路的稳定性。
可选的，在本申请的一些实施例中，该推挽型驱动电路还可以包括：匹配装置，该匹配装置的第一端与该第二驱动器的发射极相连，该匹配装置的第二端接地；该匹配装置，用于获取该第二驱动器发射极的电流，调整该第二驱动器发射极的电压，进而调整该第二驱动器发射极的电流，使得该调整后的该第二驱动器发射极的电流与该第二驱动器电流源电流的匹配度小于预置阈值。由该可能的实现方式可见，通过在第二驱动器射极串联一个匹配装置，可以调整第二驱动器发射极的电压，进而调整第二驱动器发射极的电流，使得调整后的第二驱动器发射极的电流与其镜像源电流的匹配度小于预置阈值。
可选的，在本申请的一些实施例中，该反馈装置包括：第一电容或反馈电路。由该可能的实现方式可见，该反馈装置既可以使用简易的电容达到相应的功能效果，也可以通过适应于不同场景的反馈电路形式，提高了推挽型驱动电路的适用性。
可选的，在本申请的一些实施例中，该偏置装置包括：第一电阻、第一电感或其它射频隔离电路及可提供合适偏置电压的偏置电路。由该可能的实现方式可见，该偏置装置既可以使用简易的电阻或电感达到相应的功能效果，也可以通过适应于不同场景的反馈电路形式，提高了推挽型驱动电路的适用性。
可选的，在本申请的一些实施例中，该第一驱动器和该第二驱动器包括：双极结型晶体管、金属-氧化物半导体场效应晶体管或金属-半导体场效应晶体管。由该可能的实现方式可见，针对不同的驱动场景，驱动器可以适应性的选择，说明该推挽型驱动电路具有良好的适用性。
可选的，在本申请的一些实施例中，该负载装置包括：第二电阻、第二电感或有源器件。由该可能的实现方式可见，该负载装置既可以使用简易的电阻或电感达到相应的功能效果，也可以通过适应于不同场景的有源器件形式，提高了推挽型驱动电路的适用性。
可选的，在本申请的一些实施例中，其特征在于，该匹配装置包括：第三电阻。由该可能的实现方式可见，该匹配装置可以使用简易的电阻达到相应的功能效果，结构简单，容易操作。
本申请实施例第二方面提供了一种终端设备，包括：接收装置、增益装置、发送装置和控制器，该射频放大器包括上述第一方面任一可能实现方式中的信号放大电路。
本申请实施例第三方面提供了一种增益装置，包括：数模转换器、正交调制器、驱动放大器以及射频放大器，该增益装置包括上述第一方面任一可能实现方式中的信号放大电 路。
从以上技术方案可以看出，本申请实施例具有以下优点：
本申请实施例提供的技术方案中，通过第一驱动器的基极与输入接口相连，该第一驱动器的发射极与输出接口相连，该第一驱动器的集电极与该负载装置相连，该负载装置接地或电源，该第一驱动器的集电极与第二驱动器的基极相连，该第二驱动器的集电极与该输出接口相连，使得该推挽型驱动电路在传输射频信号的过程中可以分别为上行信号和下行信号提供路径，避免了PNP三极管的使用，为应用于高性能射频电路提供可能，应用范围广，且采用单端设计，结构简单。
附图说明
图1是现有技术中射级跟随器的电路图；
图2是现有技术中一种推挽型驱动电路的电路图；
图3是现有技术中另一种推挽型驱动电路的电路图；
图4是本申请实施例提供的一种推挽型驱动电路的示意图；
图5是本申请实施例提供的另一种推挽型驱动电路的示意图；
图6是本申请实施例提供的另一种推挽型驱动电路的示意图；
图7是本申请实施例提供的另一种推挽型驱动电路的示意图；
图8是本申请实施例提供的一种推挽型驱动电路图；
图9是本申请实施例提供的另一种推挽型驱动电路图；
图10是本申请实施例提供的一种终端设备的结构示意图；
图11是本申请实施例提供的一种增益装置的结构示意图。
具体实施方式
本申请实施例提供了一种推挽型驱动电路，通过第一驱动器的基极与输入接口相连，该第一驱动器的发射极与输出接口相连，该第一驱动器的集电极与该负载装置相连，该负载装置接地或电源，该第一驱动器的集电极与第二驱动器的基极相连，该第二驱动器的集电极与该输出接口相连，使得该推挽型驱动电路在传输射频信号的过程中可以分别为上行信号和下行信号提供路径，避免了PNP三极管的使用，为应用于高性能射频电路提供可能，应用范围广，且采用单端设计，结构简单。
为了使本技术领域的人员更好地理解本申请方案，下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行描述，显然，所描述的实施例仅仅是本申请一部分的实施例，而不是全部的实施例。基于本申请中的实施例，都应当属于本申请保护的范围。
在射频信号需要加强驱动能力的场景中，常用到放大装置或驱动装置，其中，射级跟随器就是一种常见的驱动装置，如图1所示，是现有技术中射级跟随器的电路图，普通的射级跟随器只有一个驱动三极管提供驱动能力，当输入信号大速率下行的时候，驱动能力仅由电流源决定，而与驱动三级管无关。
然而，射频信号有上行或下行两种状态，故信号上行或下行时各有一个三极管开启提 供驱动能力是更优的解决方案，其经典电路结构为Class B型输出驱动电路，如图2所示，是现有技术中一种推挽型驱动电路的电路图，Class B型输出驱动电路是由一个NPN三级管Q1和一个PNP三极管Q2组成。
由于在射频电路中需要高性能PNP管，然而目前很多高性能工艺并不提供高性能PNP管，使得在射频电路中无法使用Class B型输出驱动电路，影响驱动器的驱动性能以及应用范围。
而且经典Class B型输出驱动器只有当输入电压V in减去输出电压V o的差值大于Q1的开启电压V BE(on,Q1)时，Q1才会开启；输出电压减去输入电压的差值大于Q2的开启电压V BE(on,Q2)时，Q2才会开启；用公式可以表达为：V in>V o+V BE(on,Q1)或V in<V o-V BE(on,Q2)时，Q1和Q2会分别开启，提供驱动能力；而当V o-V BE(on,Q2)<V in<V o+V BE(on,Q1)时，Q1和Q2都处于关断状态，无信号输出，这会影响到驱动电路的应用范围，不适用于线性度要求高的场景。
在另一种现有技术的推挽型驱动电路中，采用了差分直流的方法，使得该电路可以应用于高性能射频电路中，如图3所示，是现有技术中另一种推挽型驱动电路的电路图。其中，输入信号V ip和V in都有两条路径。以V ip为例，一条路径是通过Q1直接驱动输出V op；另一条路径是通过Q3射级到达Q6的基极，在Q6的集电极端产生一个与Vip反相的信号来驱动V on。V in与V ip类似，一条路径通过Q2直接输出到V on，另一条则通过Q4与Q5输出一个与V in反相的信号到V op；从输出方式来看，V op由Q1和Q5提供驱动力，V on由Q2和Q6提供驱动力。这种差分直流耦合推挽型驱动电路避免了使用PNP管，避免了输出三极管同时处于关断状态的工作区域，但是第一方面必须使用差分电路，单端电路无法应用；第二方面，电路结构较为复杂，需要额外的电流源I1和I2，增加了功耗；第三方面，该电路还需要小心电压裕度的问题，即过大的电压摆幅可能导致Q5和Q6集电极正偏，使得电路失效，影响电路功能。
为解决上述问题，本申请实施例提出一种推挽型驱动电路，可以应用于射频信号的驱动放大场景中，可以理解的是，本申请实施例提出一种推挽型驱动电路也可以应用于其他需要加强电信号驱动能力的场景中，例如：终端移动网络、光通讯网络或有线通讯网络，具体场景因实际情况而定，此处不做限定。
下面结合附图对本申请技术方案以实施例的方式做进一步的说明，如图4所示，是本申请实施例提供的一种推挽型驱动电路的示意图，该推挽型驱动电路包括但不限于如下模块：第一驱动器401、负载装置402和第二驱动器403。
其中，该第一驱动器401的基极a1与输入接口相连，该第一驱动器401的发射极a3与该输出接口相连，该第一驱动器401的集电极a2与该负载装置402的第一端相连，该负载装置402的第二端接地或电源，该第一驱动器401的集电极a2与该第二驱动器403的基极b1相连，该第二驱动器403的集电极b2与该输出接口相连。
该第一驱动器401，用于通过该输入接口接收第一信号，向该输出接口传输该第一信号的同相信号。
该负载装置402，用于响应该第一信号产生第二信号，该第二信号的相位与该第一信 号的相位相反。
该第二驱动器403，用于接收该第二信号，向该输出接口传输该第二信号的反相信号。
本实施例中，第一驱动器401和第二驱动器403可以为双极结型晶体管(bipolar junction transistor，BJT)、金属-氧化物半导体场效应晶体管(metal-oxide-semiconductor field-effect transistor，MOSFET)或金属-半导体[接触势垒]场效应晶体管(metal epitaxial-semiconductor field effect transistor，MESFET)。
应当注意的是，当第一驱动器401和第二驱动器403为双极结型晶体管中的NPN三极管时，a1为基极，a2为集电极，a3为发射极；当第一驱动器为MOSFET时，a1为源极，a2为栅极，a3为漏极；其中，a1、a2和a3的命名方式仅为说明其功能，并不因命名方式对所对应的器件进行限定。
在一种可能的场景中，输入接口接入第一信号，此时，可以直接由第一驱动器401的发射极a3驱动至输出接口，也可以在第一驱动器401的集电极a2由负载装置响应第一信号产生第二信号，第二信号与第一信号反相，该第二信号再经第二驱动器403驱动输出到输出接口，实现推挽驱动的功能。
应当注意的是，由于第二信号可能直流点较大，直接传输至第二驱动器易导致第二驱动器的集电极正偏，导致电路失效，影响电路功能。为应对该场景的发生，本申请实施例提供了一种具有反馈装置的推挽型驱动电路，以解决第二信号直流点较大时电压裕度的问题，下面结合附图进行说明。
如图5所示，是本申请实施例提供的另一种推挽型驱动电路的示意图，该推挽型驱动电路包括但不限于如下模块：
第一驱动器501、负载装置502、第二驱动器503和反馈装置504。
其中，该第一驱动器501的基极a1与输入接口相连，该第一驱动器501的发射极a3与该输出接口相连，该第一驱动器501的集电极a2与该负载装置502的第一端相连，该负载装置502的第二端接地或电源，该第一驱动器501的集电极a2与该反馈装置504的第一端相连，该反馈装置504的第二端与该第二驱动器503的基极b1相连，该第二驱动器503的集电极b2与该输出接口相连，该第二驱动器503的发射极b3接地。
该第一驱动器501，用于通过该输入接口接收第一信号，向该输出接口传输该第一信号的同相信号。
该负载装置502，用于响应该第一信号产生第二信号，该第二信号的相位与该第一信号的相位相反。
该第二驱动器503，用于接收该第二信号，向该输出接口传输该第二信号的反相信号。
该反馈装置504，用于耦合该第二信号，反馈耦合后的第二信号至第二驱动器的基极b1。
本实施例中，第一驱动器501、负载装置502和第二驱动器503的说明可参照图4中相关部件的描述，此处不再赘述。
本实施例中，反馈装置504可以是电容，也可以是具有耦合作用的电路，具体器件因 实际场景而定，此处不做限定。
在一种可能的场景中，输入接口接入第一信号，此时，可以直接由第一驱动器501的发射极a3驱动至输出接口；也可以在第一驱动器501的集电极a2由负载装置502响应第一信号产生第二信号，第二信号与第一信号反相，该第二信号经反馈装置504耦合后反馈至第二驱动器503，第二信号再经第二驱动器503驱动输出到输出接口，实现推挽驱动的功能。
通过反馈装置的接入，使得该推挽型驱动电路避免了电压裕度的问题，应用范围更加广泛，但是，在一种可能的场景中，由于反馈装置504未必能产生合适的直流电压(例如三极管材质为硅管时，输入电压需达到0.7V以上)。当基极与发射极之间的电压小于0.7V时，基极、集电极、发射极电流就可以认为是0。但实际中要放大的信号往往远比0.7V要小，如果不加偏置的话，这么小的信号就不足以引起基极电流的改变，故本申请实施例提供一种包括偏置装置的推挽型驱动电路，以解决上述场景中的问题，下面结合附图进行说明。
如图6所示，是本申请实施例提供的另一种推挽型驱动电路的示意图，该推挽型驱动电路包括但不限于如下模块：
第一驱动器601、负载装置602、第二驱动器603和反馈装置604。
其中，该第一驱动器601的基极a1与输入接口相连，该第一驱动器601的发射极a3与该输出接口相连，该第一驱动器601的集电极a2与该负载装置602的第一端相连，该负载装置602的第二端接地或电源，该第一驱动器601的集电极a2与该反馈装置604的第一端相连，该反馈装置604的第二端与该第二驱动器603的基极b1相连，该第二驱动器603的集电极b2与该输出接口相连，该第二驱动器603的发射极b3接地，该偏置装置605的第一端与该第二驱动器603的基级b1相连，该偏置装置605的第二端外接电源。
该第一驱动器601，用于通过该输入接口接收第一信号，向该输出接口传输该第一信号的同相信号。
该负载装置602，用于响应该第一信号产生第二信号，该第二信号的相位与该第一信号的相位相反。
该第二驱动器603，用于接收该第二信号，向该输出接口传输该第二信号的反相信号。
该反馈装置604，用于耦合该第二信号，反馈耦合后的第二信号至第二驱动器的基极b1。
该偏置装置605，包括偏置电路用于为所述第二驱动器603提供直流偏置电压，使得所述第二驱动器603处于所需要的直流偏置状态；该偏置装置605还包括隔离电路用于隔离所述偏置电路与所述第二信号。
本实施例中，第一驱动器601、负载装置602和第二驱动器603的说明可参照图4中相关部件的描述，反馈装置604的说明可参照图5中相关部件的描述，此处不再赘述。
本实施例中，该偏置装置605可以是一种器件，例如：电阻或电感，还可以是一种电路，例如：射频隔离电路加上可提供偏置电压的电流源，其中，电流源可以是镜像电流源、比例电流源或微电流源，具体器件或电路的选择因具体场景而定，且本实施例中偏置装置 605可能的器件或电路可以应用于图4或图5的电路中。
在一种可能的场景中，输入接口接入第一信号，此时，可以直接由第一驱动器601的发射极a3驱动至输出接口；也可以在第一驱动器601的集电极a2由负载装置602响应第一信号产生第二信号，第二信号与第一信号反相，该第二信号经反馈装置604耦合后反馈至第二驱动器603，在第二驱动器603接收到第二信号之前，偏置装置605会调整第二驱动器603处于预设偏置状态，第二信号再经第二驱动器503驱动输出到输出接口，实现推挽驱动的功能。应当注意的是，预设偏置状态的设定可以是根据器件的需求认为的设定，也可以是根据相关工作人员的经验调整所得，具体方式因实际场景而定，此处不做限制。
由于第二驱动器在推挽型驱动电路中相当于第二信号的电流源，而实际电流源的MOSFET源极或BJT发射极当串联一个电阻值远大于该MOSFET或BJT传输导纳的导数时，它所供出的电流几乎与MOFETS或BJT的匹配无关，其特性就接较为接近于一个理想电流源，故可以在第二驱动器射极串联一个匹配装置，以调整第二驱动器发射极的电压，进而调整第二驱动器发射极的电流，使得调整后的第二驱动器发射极的电流与其镜像源电流的匹配度小于预置阈值。
如图7所示，是本申请实施例提供的另一种推挽型驱动电路的示意图，图中匹配装置706的第一端与第二驱动器703的发射极b3相连，匹配装置706的第二端接地；第一驱动器701、负载装置702和第二驱动器703的说明可参照图4中相关部件的描述，反馈装置704的说明可参照图5中相关部件的描述，偏置装置705的说明可参照图6中相关部件的描述，此处不再赘述。
在一种可能的场景中，本实施例提供的推挽型驱动电路可采用图8所示的电路图形式，如图8所示，是本申请实施例提供的一种推挽型驱动电路图。
本实施例中，涉及第一三极管Q 1、第二三极管Q 2、第一电阻R L、电容C 1、第二电阻R B、第三电阻R E、输入电压V in输出电压V 0偏置电压V B；具体的，当V in为上行信号时，Q 1启动，Q 2关闭，由Q 1提供上行驱动能力；当V in为下行信号时，Q 1关闭，但在Q 1的集电极A点会产生反相信号，该反相信号经C 1耦合后反馈至Q 2，并由V B提供偏置电压，Q 2开启，由Q 2提供下行驱动能力，以此实现射频场景中推挽驱动的功能。
在另一种可能的场景中，上述第一三极管Q 1、第二三极管Q 2也可以为MOSFET，第二电阻R B可以为电感I 1，其电路图可参照图9所示的方式，如图9所示，是本申请实施例提供的另一种推挽型驱动电路图，具体工作方式可参照图6中的说明，此处不做赘述。
可以理解的是，上述电路结构可应用于具有信号放大功能的设备中，为便于理解，本实施例以中继放大器为例进行说明，图10是本申请实施例提供的一种终端设备的结构示意图。
如图10所示，本申请实施例提供的终端设备1000可以一端通过接收装置接收输入信号，该输入信号可以是通过无线方式输入，对应的，接收装置1001可包括天线或其他无线接收单元；该输入信号也可以是通过线缆的有线方式输入，对应的，接收装置1001可包括解调器或其他有线接收单元。
终端设备1000的另一端通过发送装置1003发送输出信号，发送装置1003的种类根据输 出信号的形式相关，具体参照上述关于接收装置1001的描述，此处不做赘述。
该终端设备1000还包括增益装置1002和控制器1004，该增益装置1002的第一端与接收装置1001相连，该增益装置1002用于接收待处理的输入信号；该增益装置1002的第二端与发送装置1003相连，该增益装置1002用于放大输入信号并将放大后的信号传输至发送装置1003；该增益装置1002的第三端与控制器1004的第一端相连，该增益装置1002用于反馈输入信号的增益状态并向控制器1004发送相关信息。
该控制器1004的第二端与接收装置1001相连，该控制器1004用于监测输入信号的波动状态，并根据该波动状态生成相应的增益参数并将该参数传输至增益装置1002；该控制器1004的第三端与发送装置1003相连，该控制器1004用于监测输出信号的信号强度，以获取发送装置1003的工作状态。
可以理解的是，本实施例提供的推挽型驱动电路不仅可应用于单一的射频信号放大或单一的数字信号放大中，还可以应用于数字信号与射频信号的转换场景中，此时，关于增益装置1002可以参照图11进行理解。
图11是本申请实施例提供的一种增益装置的结构示意图，本实施例的增益装置1100可以包括上述实施例中提供的推挽型驱动电路，具体的，推挽型驱动电路可应用于驱动放大器1103或射频放大器1104中。
在本实施例中，增益装置1100可以包括：数模转换器1101、正交调制器1102、驱动放大器1103以及射频放大器1104。其中，数模转换器1101将一对数字正交信号I/Q进行数模转换，将数字信号转换为模拟信号；正交调制器1102与数模转换器1101相连，将数模转换器1101转换后得到的模拟正交信号进行正交调制，生成调制信号；驱动放大器1103与正交调制器1102相连，将经正交调制器1102调制得到的调制信号进行驱动放大处理；射频放大器1104与控制器1105相连，射频放大器1104接收控制器1105提供的增益参数和驱动放大器1103提供的经驱动放大后的调制信号，并根据增益参数对射频放大器1104的漏极或集电极的供电对调制信号进行射频放大，生成射频信号。
本申请的说明书和权利要求书及上述附图中的术语“第一”、“第二”等是用于区别类似的对象，而不必用于描述特定的顺序或先后次序。应该理解这样使用的数据在适当情况下可以互换，以便这里描述的实施例能够以除了在这里图示或描述的内容以外的顺序实施。此外，术语“包括”和“具有”以及他们的任何变形，意图在于覆盖不排他的包含，例如，包含了一系列步骤或模块的过程、方法、系统、产品或设备不必限于清楚地列出的那些步骤或模块，而是可包括没有清楚地列出的或对于这些过程、方法、产品或设备固有的其它步骤或模块。在本申请中出现的对步骤进行的命名或者编号，并不意味着必须按照命名或者编号所指示的时间/逻辑先后顺序执行方法流程中的步骤，已经命名或者编号的流程步骤可以根据要实现的技术目的变更执行次序，只要能达到相同或者相类似的技术效果即可。本申请中所出现的模块的划分，是一种逻辑上的划分，实际应用中实现时可以有另外的划分方式，例如多个模块可以结合成或集成在另一个系统中，或一些特征可以忽略，或不执行，另外，所显示的或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口，模块之间的间接耦合或通信连接可以是电性或其他类似的形式，本申请中均不作限定。并 且，作为分离部件说明的模块或子模块可以是也可以不是物理上的分离，可以是也可以不是物理模块，或者可以分布到多个电路模块中，可以根据实际的需要选择其中的部分或全部模块来实现本申请方案的目的。
以上对本申请实施例所提供的推挽型驱动电路进行了详细介绍，本文中应用了具体个例对本申请的原理及实施方式进行了阐述，以上实施例的说明只是用于帮助理解本申请的方法及其核心思想；同时，对于本领域的一般技术人员，依据本申请的思想，在具体实施方式及应用范围上均会有改变之处，综上所述，本说明书内容不应理解为对本申请的限制。

Claims (9)

  1. 一种推挽型驱动电路，其特征在于，包括：
    第一驱动器、负载装置、第二驱动器、输入接口和输出接口；
    其中，所述第一驱动器的基极与所述输入接口相连，所述第一驱动器的发射极与所述输出接口相连，所述第一驱动器的集电极与所述负载装置的第一端相连，所述负载装置的第二端接地或电源，所述第一驱动器的集电极与所述第二驱动器的基极相连，所述第二驱动器的集电极与所述输出接口相连；
    所述第一驱动器，用于通过所述输入接口接收第一信号，向所述输出接口传输所述第一信号的同相信号；
    所述负载装置，用于响应所述第一信号产生第二信号，所述第二信号的相位与所述第一信号的相位相反；
    所述第二驱动器，用于接收所述第二信号，向所述输出接口传输所述第二信号的反相信号。
  2. 根据权利要求1所述的推挽型驱动电路，其特征在于，所述推挽型驱动电路还包括：反馈装置，所述反馈装置的第一端与所述第一驱动器的集电极相连，所述反馈装置的第二端与所述第二驱动器的基极相连；
    所述反馈装置，用于耦合所述第二信号，反馈耦合后的所述第二信号至所述第二驱动器的基极。
  3. 根据权利要求1所述的推挽型驱动电路，其特征在于，所述推挽型驱动电路还包括：偏置装置，所述偏置装置的第一端与所述第二驱动器的基极相连，所述偏置装置的第二端与电源连接，所述偏置装置的第三端接地；
    所述偏置装置，用于为所述第二驱动器提供偏置电压，使得所述第二驱动器处于所需要的偏置状态；还用于隔离所述偏置电路与所述第二信号。
  4. 根据权利要求1所述的推挽型驱动电路，其特征在于，所述推挽型驱动电路还可以包括：匹配装置，所述匹配装置的第一端与所述第二驱动器的发射极相连，所述匹配装置的第二端接地；
    所述匹配装置，用于获取所述第二驱动器发射极的电流，调整所述第二驱动器发射极的电压，进而调整所述第二驱动器发射极的电流，使得所述调整后的所述第二驱动器发射极的电流与所述第二驱动器电流源电流的匹配度小于预置阈值。
  5. 根据权利要求2所述的推挽型驱动电路，其特征在于，所述反馈装置包括：第一电容或反馈电路。
  6. 根据权利要求3所述的推挽型驱动电路，其特征在于，所述偏置装置包括：第一电阻、第一电感或其它射频隔离电路及可提供合适偏置电压的偏置电路。
  7. 根据权利要求1-6任一项所述的推挽型驱动电路，其特征在于，所述第一驱动器和所述第二驱动器包括：双极结型晶体管、金属-氧化物半导体场效应晶体管或金属-半导体场效应晶体管。
  8. 根据权利要求1-6任一项所述的推挽型驱动电路，其特征在于，所述负载装置包括： 第二电阻、第二电感或有源器件。
  9. 根据权利要求1-6任一项所述的推挽型驱动电路，其特征在于，所述匹配装置包括：第三电阻。
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