WO2020186565A1 - 基板的制作方法及基板 - Google Patents
基板的制作方法及基板 Download PDFInfo
- Publication number
- WO2020186565A1 WO2020186565A1 PCT/CN2019/081574 CN2019081574W WO2020186565A1 WO 2020186565 A1 WO2020186565 A1 WO 2020186565A1 CN 2019081574 W CN2019081574 W CN 2019081574W WO 2020186565 A1 WO2020186565 A1 WO 2020186565A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- electrode layer
- area
- black matrix
- substrate
- display area
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1337—Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
Definitions
- the present invention relates to the field of display technology, in particular to a method for manufacturing a substrate and a substrate.
- TFT Thin Film Transistor
- LCD Liquid Crystal Display
- AMOLED Active Matrix Organic Light-Emitting Diode
- liquid crystal displays which include a liquid crystal display panel and a backlight module.
- the working principle of the liquid crystal display panel is based on the thin film transistor array substrate (Thin Film Transistor Array Substrate, TFT Array Substrate) and the color filter (Color Filter, CF)
- the liquid crystal molecules are filled between the substrates, and the pixel voltage and the common voltage are applied to the two substrates.
- the electric field formed between the pixel voltage and the common voltage controls the rotation direction of the liquid crystal molecules to reduce the backlight module
- the light is transmitted out to produce a picture.
- the liquid crystal display panel molding process generally includes: the front-end array (film, yellow light, etching and stripping), the middle-stage cell process (the TFT substrate is bonded to the CF substrate), and the back-end module assembly process (The driver IC is pressed against the printed circuit board).
- the front Array process is mainly to form TFT substrates to control the movement of liquid crystal molecules
- the middle Cell process is mainly to add liquid crystal between the TFT substrate and the CF substrate
- the back module assembly process is mainly to drive IC pressing and printed circuits
- the integration of the board drives the rotation of the liquid crystal molecules to display images.
- PI polyimide
- the design of the dummy area on the CF substrate is uniform and the topography is flat, which is different from the design of the display (AA) area.
- the film structure pattern of the AA area is complicated, resulting in uneven PI distribution in the dummy area and the AA area.
- the PI of the dummy area and the AA area will have a difference in the pretilt angle formed by the liquid crystal, which will affect the display quality.
- the object of the present invention is to provide a method for manufacturing a substrate, which can improve the uniformity of the film thickness of the alignment film.
- the object of the present invention is also to provide a substrate with good film thickness uniformity of the alignment film.
- the present invention provides a method for manufacturing a substrate, which includes the following steps:
- Step S1 Provide a base substrate, and form a ring of sealant on the base substrate;
- the base substrate includes a display area and a dummy area between the display area and the sealant;
- Step S2 forming a black matrix located in the display area and the dummy area on the base substrate; forming an electrode layer on the black matrix;
- Step S3 etching the black matrix and the electrode layer in the dummy area to form at least one groove penetrating the black matrix and the electrode layer;
- Step S4 coating an alignment film solution on the electrode layer and the base substrate to form an alignment film covering the electrode layer and the groove.
- the specific steps of the step S2 are: forming a black matrix material layer located in the display area and the dummy area on the base substrate, and patterning the black matrix material layer located in the display area through a photomask Processing to get the black matrix.
- a laser is used to etch the black matrix and the electrode layer in the dummy area to obtain at least one groove penetrating the black matrix and the electrode layer.
- step S3 before the laser is etched, scribing is performed on the black matrix and the electrode layer in the virtual area to form at least one etching line, and the laser is located in the virtual area along the etching line.
- the black matrix and electrode layer are etched.
- the line width of the etching line is 50-70um.
- the area where the electrode layer located in the display area is located, and the area where the portion of the electrode layer located in the dummy area is connected to the electrode layer located in the display area are both high voltage areas;
- the area of the electrode layer located in the dummy area that is not connected to the electrode layer located in the display area is a low-voltage area.
- the width of the groove is 50-70um.
- the present invention also provides a substrate, including: a base substrate, a sealant arranged on the base substrate, a black matrix arranged on the base substrate and surrounded by the sealant, and a black matrix arranged on the black An electrode layer on the matrix and an alignment film provided on the electrode layer;
- the base substrate includes a display area and a dummy area between the display area and the sealant; the substrate has at least one groove penetrating the black matrix and the electrode layer in the dummy area; the alignment The film covers the electrode layer and the groove.
- the area where the electrode layer located in the display area is located, and the area where the portion of the electrode layer located in the dummy area is connected to the electrode layer located in the display area are both high voltage areas;
- the area of the electrode layer located in the dummy area that is not connected to the electrode layer located in the display area is a low-voltage area.
- the width of the groove is 50-70um.
- the method for manufacturing the substrate of the present invention is to form at least one groove penetrating the black matrix and the electrode layer by etching the black matrix and the electrode layer located in the virtual area, and then in the electrode layer and the substrate
- the alignment film solution is coated on the substrate, since the topography of the film structure in the virtual area is similar to that of the display area, it can be ensured that the thickness of the alignment film in the display area is the same as that of the virtual area.
- the thickness of the alignment film tends to be the same, thereby improving the uniformity of the film thickness of the alignment film.
- the thickness of the alignment film of the substrate in the display area of the present invention is approximately the same as the thickness of the alignment film of the dummy area, and the film thickness of the alignment film is uniform.
- Figure 1 is a flow chart of the method for manufacturing a substrate of the present invention
- 3 to 5 are schematic diagrams of step S2 of the manufacturing method of the substrate of the present invention.
- FIGS 6 to 7 are schematic diagrams of step S3 of the manufacturing method of the substrate of the present invention.
- FIG. 8 is a schematic diagram of step S4 of the manufacturing method of the substrate of the present invention and a schematic diagram of the substrate of the present invention.
- the present invention provides a method for manufacturing a substrate, including the following steps:
- step S1 Please refer to the figure 2 ,Provide the base plate 10 , On the base substrate 10 Frame glue 20 ;
- the base substrate 10 Including display area 11 And in the display area 11 With box glue 20 Virtual zone 12 ;
- step S2 Please refer to the figure 3 To map 5 , On the base substrate 10 On the display area 11 Virtual zone 12 Black matrix 30 ; In the black matrix 30 Electrode layer 40 ;
- step S3 Please refer to the figure 6 To map 7 , On the virtual area 12 Black matrix 30 And electrode layer 40 Perform etching to form at least one penetrating black matrix 30 And electrode layer 40 Groove 41 ;
- step S4 Please refer to the figure 8 , In the electrode layer 40 And substrate 10 Coat the alignment film solution to form a covering electrode layer 40 And groove 41 Alignment film 50 .
- the present invention will be located in the virtual area 12 Black matrix 30 And electrode layer 40 Perform etching to form at least one penetrating black matrix 30 And electrode layer 40 Groove 41 , And then in the electrode layer 40 And substrate 10
- the alignment film solution is applied, it is located in the virtual area 12 Topography and display area of the film structure 12
- the topography of the film structure is similar, which can be guaranteed to be located in the display area 11
- Alignment film 50 The thickness of the virtual area 12 Alignment film 50 The thickness tends to be the same, thereby increasing the alignment film 50 The film thickness uniformity.
- the steps S2 The specific steps are: on the base substrate 10 On the display area 11 Virtual zone 12 Black matrix material layer in 30 ’, located in the display area through the mask pair 11 Black matrix material layer in 30 ’Patternization process to get black matrix 30 . At this time, in the virtual area 12 Black matrix 30 The terrain is flat.
- the steps S3 Since the laser can not only affect the electrode layer 40 For etching, but also for the black matrix 30 To etch, so the laser is used to locate the virtual area 12 Black matrix 30 And electrode layer 40 Perform etching and change virtual area 12 Black matrix 30 Terrain, making it more complicated, and the display area 12 Black matrix 30 The terrain is similar.
- the etching line 42 The line width is 50-70um .
- Electrode layer 40 The area, and the virtual area 12 Electrode layer 40 In the display area 11 Electrode layer 40
- the area where the connected part is located is divided into high voltage areas, which will be located in the virtual area 12 Electrode layer 40 In the display area 11 Electrode layer 40
- the area where the connected part is located is divided into a low voltage area, and then the electrode layer of the high voltage area 40 Apply high voltage to the electrode layer in the low voltage area 40 Apply low voltage to complete the alignment film 50 ⁇ Alignment.
- the electrode layer 40 The material is ITO (Indium Tin Oxide).
- the groove 41 The width is 50-70um .
- the alignment film 50 The material is PI .
- the groove 41 The quantity can be based on the actual product PI Solution leveling needs to be set.
- the present invention also provides a substrate, including: a base substrate 10 , Located on the base substrate 10 Box glue 20 , Located on the base substrate 10 Frame glue 20 Black matrix 30 , Located in the black matrix 30 Upper electrode layer 40 And on the electrode layer 40 Alignment film 50 ;
- the base substrate 10 Including display area 11 And in the display area 11 With box glue 20 Virtual zone 12 ;
- the substrate has at least one through the virtual area 12 Black matrix 30 And electrode layer 40 Groove 41 ;
- the alignment film 50 Cover the electrode layer 40 And groove 41 .
- the substrate of the present invention has at least one penetrating portion located in the virtual area 12 Black matrix 30 And electrode layer 40 Groove 41 , Make it located in the virtual area 12 Topography and display area of the film structure 12
- the topography of the film structure is similar, which can be guaranteed to be located in the display area 11
- Alignment film 50 The thickness of the virtual area 12 Alignment film 50 The thickness tends to be the same, thereby increasing the alignment film 50 The film thickness uniformity.
- the black matrix 30 The forming method is: on the base substrate 10 On the display area 11 Virtual zone 12 Black matrix material layer in 30 ’, located in the display area through the mask pair 11 Black matrix material layer in 30 ’Patternization process to get black matrix 30 . At this time, in the virtual area 12 Black matrix 30 The terrain is flat.
- the groove 41 The forming method is: because the laser can not only affect the electrode layer 40 For etching, but also for the black matrix 30 To etch, so the laser is used to locate the virtual area 12 Black matrix 30 And electrode layer 40 Perform etching and change virtual area 12 Black matrix 30 Terrain, making it more complicated, and the display area 12 Black matrix 30 The terrain is similar.
- the laser is etched, it is located in the virtual area 12 Black matrix 30 And electrode layer 40 Scribe on the top to form at least one etching line 42 , The laser is along the etching line 42 In the virtual area 12 Black matrix 30 And electrode layer 40 Perform etching.
- the etching line 42 The line width is 50-70um .
- Electrode layer 40 The area, and the virtual area 12 Electrode layer 40 In the display area 11 Electrode layer 40
- the area where the connected part is located is divided into high voltage areas, which will be located in the virtual area 12 Electrode layer 40 In the display area 11 Electrode layer 40
- the area where the connected part is located is divided into a low voltage area, and then the electrode layer of the high voltage area 40 Apply high voltage to the electrode layer in the low voltage area 40 Apply low voltage to complete the alignment film 50 ⁇ Alignment.
- the electrode layer 40 The material is ITO (Indium Tin Oxide).
- the groove 41 The width is 50-70um .
- the alignment film 50 The material is PI .
- the groove 41 The quantity can be based on the actual product PI Solution leveling needs to be set.
- the manufacturing method of the substrate of the present invention etches the black matrix and the electrode layer located in the virtual area to form at least one groove penetrating the black matrix and the electrode layer, and subsequently in the electrode layer and the base substrate
- the alignment film solution is applied on the topography
- the thickness of the alignment film in the display area and the alignment of the virtual area can be guaranteed
- the thickness of the film tends to be the same, thereby improving the uniformity of the film thickness of the alignment film.
- the thickness of the alignment film of the substrate in the display area of the present invention is approximately the same as the thickness of the alignment film of the dummy area, and the film thickness of the alignment film is uniform.
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Spectroscopy & Molecular Physics (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
- Optical Filters (AREA)
Abstract
一种基板的制作方法及基板。该基板的制作方法通过将位于虚拟区(12)中的黑色矩阵(30)及电极层(40)进行蚀刻,形成至少一个贯穿黑色矩阵(30)及电极层(40)的凹槽(41),后续在所述电极层(40)及衬底基板(10)上涂布配向膜溶液时,由于位于所述虚拟区(12)的膜层结构的地形与显示区(11)的膜层结构的地形相似,可以保证位于所述显示区(11)的配向膜(50)的厚度与所述虚拟区(12)的配向膜(50)的厚度趋近于相同,从而提高配向膜(50)的膜厚均一性。该基板(10)位于所述显示区(11)的配向膜(50)的厚度与所述虚拟区(12)的配向膜(50)的厚度趋近于相同,配向膜(50)的膜厚均一性好。
Description
本发明涉及显示技术领域,尤其涉及一种基板的制作方法及基板。
薄膜晶体管(Thin Film Transistor,TFT)是目前液晶显示装置(Liquid Crystal Display,LCD)和有源矩阵驱动式有机电致发光显示装置(Active Matrix Organic Light-Emitting
Diode,AMOLED)中的主要驱动元件,直接关系平板显示装置的显示性能。
现有市场上的液晶显示器大部分为背光型液晶显示器,其包括液晶显示面板及背光模组(backlight module)。液晶显示面板的工作原理是在薄膜晶体管阵列基板(Thin Film Transistor Array Substrate,TFT Array Substrate)与彩色滤光片(Color
Filter,CF)基板之间灌入液晶分子,并在两片基板上分别施加像素电压和公共电压,通过像素电压和公共电压之间形成的电场控制液晶分子的旋转方向,以将背光模组的光线透射出来产生画面。液晶显示面板成型工艺一般包括:前段阵列(Array)制程(薄膜、黄光、刻蚀及剥膜)、中段成盒(Cell)制程(TFT基板与CF基板贴合)及后段模组组装制程(驱动IC与印刷电路板压合)。其中,前段Array制程主要是形成TFT基板,以便于控制液晶分子的运动;中段Cell制程主要是在TFT基板与CF基板之间添加液晶;后段模组组装制程主要是驱动IC压合与印刷电路板的整合,进而驱动液晶分子转动,显示图像。
目前绝大部分的LCD面板采用聚酰亚胺(PI)为液晶配向膜,PI在LCD面板的涂布性以及膜厚均一性直接影响液晶的配向状况,影响PI涂布性主要关联为PI材料溶剂特性以及在LCD面板的地形设计。
例如,在CF基板上的虚拟(dummy)区域设计均一,地形平坦,与显示(AA)区设计有差异,AA区的膜层结构图案复杂,造成dummy区域与AA区域的PI分布不均一,PI膜厚差异到150A~300A,则会造成dummy区域与AA区域的PI分别对液晶形成的预倾角产生差异,影响显示质量。
本发明的目的在于提供一种基板的制作方法,可以提高配向膜的膜厚均一性。
本发明的目的还在于提供一种基板,配向膜的膜厚均一性好。
为实现上述目的,本发明提供了一种基板的制作方法,包括如下步骤:
步骤S1、提供衬底基板,在所述衬底基板上形成一圈框胶;所述衬底基板包括显示区以及位于所述显示区与框胶之间的虚拟区;
步骤S2、在所述衬底基板上形成位于所述显示区及虚拟区中的黑色矩阵;在黑色矩阵上形成电极层;
步骤S3、对位于所述虚拟区中的黑色矩阵及电极层进行蚀刻,形成至少一个贯穿黑色矩阵及电极层的凹槽;
步骤S4、在所述电极层及衬底基板上涂布配向膜溶液,形成覆盖电极层及凹槽的配向膜。
所述步骤S2的具体步骤为:在所述衬底基板上形成位于所述显示区及虚拟区中的黑色矩阵材料层,通过光罩对位于所述显示区中的黑色矩阵材料层进行图案化处理,得到黑色矩阵。
所述步骤S3中,采用激光对位于所述虚拟区中的黑色矩阵及电极层进行蚀刻,得到至少一个贯穿黑色矩阵及电极层的凹槽。
所述步骤S3中,在激光进行蚀刻之前,在位于所述虚拟区中的黑色矩阵及电极层上进行划线,形成至少一条蚀刻线,所述激光沿着蚀刻线对位于所述虚拟区中的黑色矩阵及电极层进行蚀刻。
所述蚀刻线的线宽为50-70um。
位于显示区中的电极层所在的区域,和位于虚拟区中的电极层中与位于显示区中的电极层连接的部分所在的区域均为高电压区域;
位于虚拟区中的电极层中不与位于显示区中的电极层连接的部分所在的区域为低电压区域。
所述凹槽的宽度为50-70um。
本发明还提供一种基板,包括:衬底基板、设于所述衬底基板上的框胶、设于所述衬底基板上并被所述框胶包围的黑色矩阵、设于所述黑色矩阵上的电极层以及设于所述电极层上的配向膜;
所述衬底基板包括显示区以及位于所述显示区与框胶之间的虚拟区;所述基板上具有至少一个贯穿位于所述虚拟区中的黑色矩阵及电极层的凹槽;所述配向膜覆盖所述电极层及凹槽。
位于显示区中的电极层所在的区域,和位于虚拟区中的电极层中与位于显示区中的电极层连接的部分所在的区域均为高电压区域;
位于虚拟区中的电极层中不与位于显示区中的电极层连接的部分所在的区域为低电压区域。
所述凹槽的宽度为50-70um。
本发明的有益效果:本发明的基板的制作方法通过将位于虚拟区中的黑色矩阵及电极层进行蚀刻,形成至少一个贯穿黑色矩阵及电极层的凹槽,后续在所述电极层及衬底基板上涂布配向膜溶液时,由于位于所述虚拟区的膜层结构的地形与显示区的膜层结构的地形相似,可以保证位于所述显示区的配向膜的厚度与所述虚拟区的配向膜的厚度趋近于相同,从而提高配向膜的膜厚均一性。本发明的基板位于所述显示区的配向膜的厚度与所述虚拟区的配向膜的厚度趋近于相同,配向膜的膜厚均一性好。
为了能更进一步了解本发明的特征以及技术内容,请参阅以下有关本发明的详细说明与附图,然而附图仅提供参考与说明用,并非用来对本发明加以限制。
附图中,
图1为本发明的基板的制作方法的流程图;
图2为本发明的基板的制作方法步骤S1的示意图;
图3至图5为本发明的基板的制作方法步骤S2的示意图;
图6至图7为本发明的基板的制作方法步骤S3的示意图;
图8为本发明的基板的制作方法步骤S4的示意图暨本发明的基板的示意图。
为更进一步阐述本发明所采取的技术手段及其效果,以下结合本发明的优选实施例及其附图进行详细描述。
请参阅图
1
至图
8
,本发明提供一种基板的制作方法,包括如下步骤:
步骤
S1
、请参阅图
2
,提供衬底基板
10
,在所述衬底基板
10
上形成一圈框胶
20
;所述衬底基板
10
包括显示区
11
以及位于所述显示区
11
与框胶
20
之间的虚拟区
12
;
步骤
S2
、请参阅图
3
至图
5
,在所述衬底基板
10
上形成位于所述显示区
11
及虚拟区
12
中的黑色矩阵
30
;在黑色矩阵
30
上形成电极层
40
;
步骤
S3
、请参阅图
6
至图
7
,对位于所述虚拟区
12
中的黑色矩阵
30
及电极层
40
进行蚀刻,形成至少一个贯穿黑色矩阵
30
及电极层
40
的凹槽
41
;
步骤
S4
、请参阅图
8
,在所述电极层
40
及衬底基板
10
上涂布配向膜溶液,形成覆盖电极层
40
及凹槽
41
的配向膜
50
。
需要说明的是,本发明将位于所述虚拟区
12
中的黑色矩阵
30
及电极层
40
进行蚀刻,形成至少一个贯穿黑色矩阵
30
及电极层
40
的凹槽
41
,后续在所述电极层
40
及衬底基板
10
上涂布配向膜溶液时,由于位于所述虚拟区
12
的膜层结构的地形与显示区
12
的膜层结构的地形相似,可以保证位于所述显示区
11
的配向膜
50
的厚度与所述虚拟区
12
的配向膜
50
的厚度趋近于相同,从而提高配向膜
50
的膜厚均一性。
具体的,请参阅图
3
至图
5
,所述步骤
S2
的具体步骤为:在所述衬底基板
10
上形成位于所述显示区
11
及虚拟区
12
中的黑色矩阵材料层
30
’,通过光罩对位于所述显示区
11
中的黑色矩阵材料层
30
’进行图案化处理,得到黑色矩阵
30
。此时,位于所述虚拟区
12
中的黑色矩阵
30
的地形平坦。
具体的,所述步骤
S3
中,由于激光不仅能对电极层
40
进行蚀刻,还能对黑色矩阵
30
进行蚀刻,因此采用激光对位于所述虚拟区
12
中的黑色矩阵
30
及电极层
40
进行蚀刻,改变虚拟区
12
中的黑色矩阵
30
的地形,使其变得复杂,与显示区
12
的黑色矩阵
30
的地形相似。
进一步的,请参阅图
6
,所述步骤
S3
中,在激光进行蚀刻之前,在位于所述虚拟区
12
中的黑色矩阵
30
及电极层
40
上进行划线,形成至少一条蚀刻线
42
,所述激光沿着蚀刻线
42
对位于所述虚拟区
12
中的黑色矩阵
30
及电极层
40
进行蚀刻。
具体的,所述蚀刻线
42
的线宽为
50-70um
。
具体的,以凹槽
41
(也就是蚀刻线
42
)为界,将位于显示区
11
中的电极层
40
所在的区域,和位于虚拟区
12
中的电极层
40
中与位于显示区
11
中的电极层
40
连接的部分所在的区域均划分为高电压区域,将位于虚拟区
12
中的电极层
40
中不与位于显示区
11
中的电极层
40
连接的部分所在的区域划分为低电压区域,后续分别给高电压区域的电极层
40
施加高电压,给低电压区域的电极层
40
施加低电压,以完成配向膜
50
的配向。
具体的,所述电极层
40
的材料为
ITO
(氧化铟锡)。
具体的,所述凹槽
41
的宽度为
50-70um
。
具体的,所述配向膜
50
的材料为
PI
。
具体的,所述凹槽
41
的数量可以根据实际产品的
PI
溶液流平性的需求来设置。
请参阅图
8
,基于上述基板的制作方法,本发明还提供一种基板,包括:衬底基板
10
、设于所述衬底基板
10
上的框胶
20
、设于所述衬底基板
10
上并被所述框胶
20
包围的黑色矩阵
30
、设于所述黑色矩阵
30
上的电极层
40
以及设于所述电极层
40
上的配向膜
50
;
所述衬底基板
10
包括显示区
11
以及位于所述显示区
11
与框胶
20
之间的虚拟区
12
;所述基板上具有至少一个贯穿位于所述虚拟区
12
中的黑色矩阵
30
及电极层
40
的凹槽
41
;所述配向膜
50
覆盖所述电极层
40
及凹槽
41
。
需要说明的是,本发明的基板上具有至少一个贯穿位于所述虚拟区
12
中的黑色矩阵
30
及电极层
40
的凹槽
41
,使位于所述虚拟区
12
的膜层结构的地形与显示区
12
的膜层结构的地形相似,可以保证位于所述显示区
11
的配向膜
50
的厚度与所述虚拟区
12
的配向膜
50
的厚度趋近于相同,从而提高配向膜
50
的膜厚均一性。
具体的,所述黑色矩阵
30
的形成方法为:在所述衬底基板
10
上形成位于所述显示区
11
及虚拟区
12
中的黑色矩阵材料层
30
’,通过光罩对位于所述显示区
11
中的黑色矩阵材料层
30
’进行图案化处理,得到黑色矩阵
30
。此时,位于所述虚拟区
12
中的黑色矩阵
30
的地形平坦。
具体的,所述凹槽
41
的形成方法为:由于激光不仅能对电极层
40
进行蚀刻,还能对黑色矩阵
30
进行蚀刻,因此采用激光对位于所述虚拟区
12
中的黑色矩阵
30
及电极层
40
进行蚀刻,改变虚拟区
12
中的黑色矩阵
30
的地形,使其变得复杂,与显示区
12
的黑色矩阵
30
的地形相似。
进一步的,在激光进行蚀刻之前,在位于所述虚拟区
12
中的黑色矩阵
30
及电极层
40
上进行划线,形成至少一条蚀刻线
42
,所述激光沿着蚀刻线
42
对位于所述虚拟区
12
中的黑色矩阵
30
及电极层
40
进行蚀刻。
具体的,所述蚀刻线
42
的线宽为
50-70um
。
具体的,以凹槽
41
(也就是蚀刻线
42
)为界,将位于显示区
11
中的电极层
40
所在的区域,和位于虚拟区
12
中的电极层
40
中与位于显示区
11
中的电极层
40
连接的部分所在的区域均划分为高电压区域,将位于虚拟区
12
中的电极层
40
中不与位于显示区
11
中的电极层
40
连接的部分所在的区域划分为低电压区域,后续分别给高电压区域的电极层
40
施加高电压,给低电压区域的电极层
40
施加低电压,以完成配向膜
50
的配向。
具体的,所述电极层
40
的材料为
ITO
(氧化铟锡)。
具体的,所述凹槽
41
的宽度为
50-70um
。
具体的,所述配向膜
50
的材料为
PI
。
具体的,所述凹槽
41
的数量可以根据实际产品的
PI
溶液流平性的需求来设置。
综上所述,本发明的基板的制作方法通过将位于虚拟区中的黑色矩阵及电极层进行蚀刻,形成至少一个贯穿黑色矩阵及电极层的凹槽,后续在所述电极层及衬底基板上涂布配向膜溶液时,由于位于所述虚拟区的膜层结构的地形与显示区的膜层结构的地形相似,可以保证位于所述显示区的配向膜的厚度与所述虚拟区的配向膜的厚度趋近于相同,从而提高配向膜的膜厚均一性。本发明的基板位于所述显示区的配向膜的厚度与所述虚拟区的配向膜的厚度趋近于相同,配向膜的膜厚均一性好。
以上所述,对于本领域的普通技术人员来说,可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形,而所有这些改变和变形都应属于本发明权利要求的保护范围。
Claims (10)
- 一种基板的制作方法,包括如下步骤:步骤S1、提供衬底基板,在所述衬底基板上形成一圈框胶;所述衬底基板包括显示区以及位于所述显示区与框胶之间的虚拟区;步骤S2、在所述衬底基板上形成位于所述显示区及虚拟区中的黑色矩阵;在黑色矩阵上形成电极层;步骤S3、对位于所述虚拟区中的黑色矩阵及电极层进行蚀刻,形成至少一个贯穿黑色矩阵及电极层的凹槽;步骤S4、在所述电极层及衬底基板上涂布配向膜溶液,形成覆盖电极层及凹槽的配向膜。
- 如权利要求1所述的基板的制作方法,其中,所述步骤S2的具体步骤为:在所述衬底基板上形成位于所述显示区及虚拟区中的黑色矩阵材料层,通过光罩对位于所述显示区中的黑色矩阵材料层进行图案化处理,得到黑色矩阵。
- 如权利要求1所述的基板的制作方法,其中,所述步骤S3中,采用激光对位于所述虚拟区中的黑色矩阵及电极层进行蚀刻,得到至少一个贯穿黑色矩阵及电极层的凹槽。
- 如权利要求3所述的基板的制作方法,其中,所述步骤S3中,在激光进行蚀刻之前,在位于所述虚拟区中的黑色矩阵及电极层上进行划线,形成至少一条蚀刻线,所述激光沿着蚀刻线对位于所述虚拟区中的黑色矩阵及电极层进行蚀刻。
- 如权利要求4所述的基板的制作方法,其中,所述蚀刻线的线宽为50-70um。
- 如权利要求1所述的基板的制作方法,其中,位于显示区中的电极层所在的区域,和位于虚拟区中的电极层中与位于显示区中的电极层连接的部分所在的区域均为高电压区域;位于虚拟区中的电极层中不与位于显示区中的电极层连接的部分所在的区域为低电压区域。
- 如权利要求1所述的基板的制作方法,其中,所述凹槽的宽度为50-70um。
- 一种基板,包括:衬底基板、设于所述衬底基板上的框胶、设于所述衬底基板上并被所述框胶包围的黑色矩阵、设于所述黑色矩阵上的电极层以及设于所述电极层上的配向膜;所述衬底基板包括显示区以及位于所述显示区与框胶之间的虚拟区;所述基板上具有至少一个贯穿位于所述虚拟区中的黑色矩阵及电极层的凹槽;所述配向膜覆盖所述电极层及凹槽。
- 如权利要求8所述的基板,其中,位于显示区中的电极层所在的区域,和位于虚拟区中的电极层中与位于显示区中的电极层连接的部分所在的区域均为高电压区域;位于虚拟区中的电极层中不与位于显示区中的电极层连接的部分所在的区域为低电压区域。
- 如权利要求8所述的基板,其中,所述凹槽的宽度为50-70um。
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910219080.2 | 2019-03-21 | ||
| CN201910219080.2A CN109765719A (zh) | 2019-03-21 | 2019-03-21 | 基板的制作方法及基板 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| WO2020186565A1 true WO2020186565A1 (zh) | 2020-09-24 |
Family
ID=66458477
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/CN2019/081574 Ceased WO2020186565A1 (zh) | 2019-03-21 | 2019-04-04 | 基板的制作方法及基板 |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN109765719A (zh) |
| WO (1) | WO2020186565A1 (zh) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110316971B (zh) * | 2019-07-03 | 2021-09-24 | Tcl华星光电技术有限公司 | 蚀刻混切玻璃基板的方法 |
| CN113540308B (zh) * | 2020-04-22 | 2023-06-09 | 东莞市中麒光电技术有限公司 | Led显示模组的基板结构及制作方法 |
| CN113589594B (zh) * | 2021-07-19 | 2022-07-12 | Tcl华星光电技术有限公司 | 显示面板及其制备方法 |
| CN114442381A (zh) | 2022-03-07 | 2022-05-06 | 苏州华星光电技术有限公司 | 一种显示面板及显示装置 |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070279565A1 (en) * | 2006-05-31 | 2007-12-06 | Hitachi Displays, Ltd. | Liquid crystal display device |
| CN102799029A (zh) * | 2012-08-22 | 2012-11-28 | 京东方科技集团股份有限公司 | 液晶显示基板和液晶显示装置 |
| CN103033992A (zh) * | 2012-12-21 | 2013-04-10 | 京东方科技集团股份有限公司 | 液晶显示基板及其制备方法、液晶显示装置 |
| CN105549269A (zh) * | 2016-02-18 | 2016-05-04 | 深圳市华星光电技术有限公司 | 配向膜厚度均一性的优化方法及液晶显示面板 |
| CN106773340A (zh) * | 2016-12-26 | 2017-05-31 | 友达光电股份有限公司 | 显示面板 |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104950508B (zh) * | 2015-06-17 | 2019-03-26 | 深圳市华星光电技术有限公司 | 液晶显示面板 |
| KR20170038964A (ko) * | 2015-09-30 | 2017-04-10 | 삼성디스플레이 주식회사 | 표시 패널 및 그의 제조 방법 |
| CN106647053B (zh) * | 2016-11-11 | 2020-02-07 | 惠科股份有限公司 | 一种液晶显示屏及其制作方法 |
| CN107991804A (zh) * | 2018-01-29 | 2018-05-04 | 武汉华星光电技术有限公司 | 液晶显示面板 |
-
2019
- 2019-03-21 CN CN201910219080.2A patent/CN109765719A/zh active Pending
- 2019-04-04 WO PCT/CN2019/081574 patent/WO2020186565A1/zh not_active Ceased
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070279565A1 (en) * | 2006-05-31 | 2007-12-06 | Hitachi Displays, Ltd. | Liquid crystal display device |
| CN102799029A (zh) * | 2012-08-22 | 2012-11-28 | 京东方科技集团股份有限公司 | 液晶显示基板和液晶显示装置 |
| CN103033992A (zh) * | 2012-12-21 | 2013-04-10 | 京东方科技集团股份有限公司 | 液晶显示基板及其制备方法、液晶显示装置 |
| CN105549269A (zh) * | 2016-02-18 | 2016-05-04 | 深圳市华星光电技术有限公司 | 配向膜厚度均一性的优化方法及液晶显示面板 |
| CN106773340A (zh) * | 2016-12-26 | 2017-05-31 | 友达光电股份有限公司 | 显示面板 |
Also Published As
| Publication number | Publication date |
|---|---|
| CN109765719A (zh) | 2019-05-17 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP4344725B2 (ja) | 液晶表示装置およびその製造方法 | |
| CN104965333A (zh) | Coa型液晶显示面板及其制作方法 | |
| US20170200750A1 (en) | Method for manufacturing array substrate | |
| WO2021077490A1 (zh) | 显示面板及其制备方法、显示装置 | |
| WO2021174599A1 (zh) | 液晶显示面板及液晶显示装置 | |
| CN108732840A (zh) | 阵列基板及其制作方法 | |
| CN109471279B (zh) | 阵列基板以及液晶显示面板 | |
| US9651840B1 (en) | Array substrate and method of repairing broken lines therefor | |
| CN109765719A (zh) | 基板的制作方法及基板 | |
| EP3686664A1 (en) | Display panel and manufacturing method thereof and display device | |
| WO2020051996A1 (zh) | 一种显示面板和显示装置 | |
| JP3741372B2 (ja) | 液晶表示器の自己位置合わせ画素電極の製造方法 | |
| WO2020082718A1 (zh) | 胶框的制作方法及显示面板 | |
| CN108919575A (zh) | 阵列基板、显示面板及其制造方法 | |
| US9147697B2 (en) | Manufacturing method of array substrate, array substrate, and display apparatus | |
| KR20070072179A (ko) | 액정표시장치의 제조방법 | |
| KR20070055820A (ko) | 액정표시소자 및 그 제조방법 | |
| CN103235444A (zh) | 一种显示装置、彩膜基板及其制作方法 | |
| TWM595775U (zh) | 顯示裝置 | |
| WO2020186574A1 (zh) | 显示面板及显示装置 | |
| CN107966844A (zh) | 彩膜基板、显示面板及彩膜基板的制备方法 | |
| WO2019061737A1 (zh) | 液晶显示面板的制作方法及液晶显示面板 | |
| WO2019075887A1 (zh) | 阵列基板及显示面板 | |
| WO2022062064A1 (zh) | 显示面板及显示装置 | |
| KR20050025826A (ko) | 인쇄 장비 및 이를 이용한 패턴 형성 방법 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 121 | Ep: the epo has been informed by wipo that ep was designated in this application |
Ref document number: 19919634 Country of ref document: EP Kind code of ref document: A1 |
|
| NENP | Non-entry into the national phase |
Ref country code: DE |
|
| 122 | Ep: pct application non-entry in european phase |
Ref document number: 19919634 Country of ref document: EP Kind code of ref document: A1 |