WO2020153190A1 - Semiconductor module and ac/dc converter unit - Google Patents

Semiconductor module and ac/dc converter unit Download PDF

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Publication number
WO2020153190A1
WO2020153190A1 PCT/JP2020/001046 JP2020001046W WO2020153190A1 WO 2020153190 A1 WO2020153190 A1 WO 2020153190A1 JP 2020001046 W JP2020001046 W JP 2020001046W WO 2020153190 A1 WO2020153190 A1 WO 2020153190A1
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Prior art keywords
terminal
semiconductor module
module
output
input
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PCT/JP2020/001046
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French (fr)
Japanese (ja)
Inventor
秀喜 澤田
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ローム株式会社
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Priority to JP2020568082A priority Critical patent/JP7461307B2/en
Priority to CN202080009197.9A priority patent/CN113302736B/en
Priority to DE212020000058.1U priority patent/DE212020000058U1/en
Publication of WO2020153190A1 publication Critical patent/WO2020153190A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/0601—Structure
    • H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/061—Disposition
    • H01L2224/0618—Disposition being disposed on at least two different sides of the body, e.g. dual array
    • H01L2224/06181—On opposite sides of the body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/4901—Structure
    • H01L2224/4903—Connectors having different sizes, e.g. different diameters
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/4917—Crossed wires
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49175—Parallel arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19107—Disposition of discrete passive components off-chip wires

Definitions

  • the present disclosure relates to a semiconductor module and an AC/DC converter unit.
  • Patent Document 1 discloses a semiconductor module including a semiconductor device having a semiconductor element having a switching function.
  • the semiconductor element for example, an IGBT chip is adopted.
  • Such a semiconductor device has an input/output terminal for inputting/outputting a current which is an object of switching control, and a control terminal for inputting a control signal.
  • the present disclosure has been devised under the circumstances described above, and provides a semiconductor module and an AC/DC converter unit capable of facilitating terminal connection and more reliable conduction. Let's take that issue.
  • a semiconductor module provided by the first aspect of the present disclosure is a semiconductor device having a plurality of semiconductor elements, a plurality of input/output terminals, a plurality of control terminals, and a sealing resin covering the plurality of semiconductor elements, and a first substrate. And a first connector fixed to the first substrate and connected to the control terminal, the first connector being perpendicular to a thickness direction of the first substrate and parallel to each other. The relative movement of the control terminal is permitted in at least one of the second directions.
  • An AC/DC converter unit provided by the second aspect of the present disclosure includes an input module to which AC power is input and a semiconductor module provided by the first aspect of the present disclosure, and outputs from the input module.
  • a first semiconductor module that receives an alternating current and outputs a direct current, and a semiconductor module provided by the first aspect of the present disclosure, and the direct current power output from the first semiconductor module is input.
  • a second semiconductor module that outputs DC power, and an output module that receives the DC power output from the second semiconductor module and outputs DC power, the first semiconductor device of the first semiconductor module
  • the output terminals included in the plurality of input/output terminals and the input terminals included in the plurality of input/output terminals of the second semiconductor device of the second semiconductor module are directly connected by the first fixing means.
  • FIG. 1 is an exploded perspective view showing a semiconductor module according to a first embodiment of the present disclosure.
  • 1 is a perspective view showing a semiconductor module according to a first embodiment of the present disclosure.
  • 1 is a perspective view showing a semiconductor module according to a first embodiment of the present disclosure. It is a top view showing a semiconductor module concerning a 1st embodiment of this indication.
  • FIG. 3 is a bottom view showing the semiconductor module according to the first embodiment of the present disclosure.
  • FIG. 3 is a front view showing the semiconductor module according to the first embodiment of the present disclosure.
  • 1 is a side view showing a semiconductor module according to a first embodiment of the present disclosure. It is sectional drawing which follows the VIII-VIII line of FIG.
  • FIG. 5 is a sectional view taken along line IX-IX in FIG. 4.
  • FIG. 5 is a sectional view taken along line XX of FIG. 4.
  • FIG. 3 is a plan view showing a semiconductor device of the semiconductor module according to the first embodiment of the present disclosure. It is sectional drawing which follows the XII-XII line of FIG. It is sectional drawing which follows the XIII-XIII line of FIG.
  • FIG. 3 is an enlarged plan view of a main portion showing the semiconductor device of the semiconductor module according to the first embodiment of the present disclosure.
  • FIG. 15 is an enlarged sectional view of an essential part taken along line XV-XV in FIG. 14.
  • FIG. 1 is a circuit diagram showing a semiconductor device of a semiconductor module according to a first embodiment of the present disclosure.
  • FIG. 1 is a circuit diagram showing a semiconductor device of a semiconductor module according to a first embodiment of the present disclosure.
  • FIG. 8 is a cross-sectional view showing a modified example of the semiconductor module according to the first embodiment of the present disclosure. It is a top view which shows the modification of a semiconductor device.
  • FIG. 3 is a block diagram showing an AC/DC converter unit according to the first embodiment of the present disclosure.
  • FIG. 3 is a plan view showing an AC/DC converter unit according to the first embodiment of the present disclosure.
  • FIG. 3 is a main part plan view showing the AC/DC converter unit according to the first embodiment of the present disclosure.
  • 1 is a front view showing a semiconductor module of an AC/DC converter unit according to a first embodiment of the present disclosure.
  • FIG. 22 is a cross-sectional view of main parts taken along the line XXIII-XXIII in FIG. 21.
  • FIG. 22 is a cross-sectional view of main parts taken along the line XXIV-XXIV of FIG. 21.
  • FIG. 22 is a cross-sectional view of main parts taken along the line XXV-XXV of FIG. 21.
  • FIG. 22 is a cross-sectional view of main parts taken along the line XXVI-XXVI of FIG. 21.
  • FIG. 21 is a cross-sectional view taken along the line XXVII-XXVII in FIG. 20.
  • FIG. 21 is a cross-sectional view taken along the line XXVIII-XXVIII in FIG. 20.
  • FIG. 8 is a plan view showing a first modified example of the AC/DC converter unit according to the first embodiment of the present disclosure.
  • FIG. 8 is a plan view showing a first modified example of the AC/DC converter unit according to the first embodiment of the present disclosure.
  • FIG. 8 is a plan view showing a second modified example of the AC/DC converter unit according to the first embodiment of the present disclosure.
  • FIG. 8 is a plan view showing a third modified example of the AC/DC converter unit according to the first embodiment of the present disclosure.
  • FIG. 9 is a main-portion cross-sectional view showing an input terminal of a third semiconductor device of a third modification example of the AC/DC converter unit according to the first embodiment of the present disclosure.
  • FIG. 10 is a main-portion cross-sectional view showing an output terminal of a third semiconductor device of a third modification example of the AC/DC converter unit according to the first embodiment of the present disclosure.
  • FIG. 8 is a plan view showing a fourth modified example of the AC/DC converter unit according to the first embodiment of the present disclosure.
  • FIG. 11 is a plan view showing a fifth modified example of the AC/DC converter unit according to the first embodiment of the present disclosure.
  • FIG. 6 is a plan view showing an AC/DC converter unit according to a second embodiment of the present disclosure.
  • FIG. 4 is a plan view of a main part showing an AC/DC converter unit according to a second embodiment of the present disclosure. It is sectional drawing which follows the XXXVIII-XXXVIII line of FIG. It is sectional drawing which follows the XXIX-XXXIX line of FIG. It is sectional drawing which follows the XL-XL line of FIG. It is sectional drawing which follows the XLI-XLI line of FIG. It is sectional drawing which follows the XLII-XLII line of FIG. FIG.
  • FIG. 11 is a plan view showing a first modified example of the AC/DC converter unit according to the second embodiment of the present disclosure.
  • FIG. 11 is a plan view showing a second modified example of the AC/DC converter unit according to the second embodiment of the present disclosure.
  • It is a perspective view showing a semiconductor module concerning a 3rd embodiment of this indication.
  • It is a top view showing a semiconductor module concerning a 3rd embodiment of this indication.
  • It is a perspective view showing a modification of a semiconductor module concerning a 3rd embodiment of this indication.
  • It is a top view showing a modification of a semiconductor module concerning a 3rd embodiment of this indication.
  • It is a front view showing a modification of a semiconductor module concerning a 3rd embodiment of this indication.
  • the semiconductor module A1 of this embodiment includes a semiconductor device B1, a first substrate 7, a plurality of electronic components 700, a plurality of connection terminals 76, and a plurality of first connectors 8.
  • FIG. 1 is an exploded perspective view showing the semiconductor module A1.
  • FIG. 2 is a perspective view showing the semiconductor module A1.
  • FIG. 3 is a perspective view showing the semiconductor module A1.
  • FIG. 4 is a plan view showing the semiconductor module A1.
  • FIG. 5 is a bottom view showing the semiconductor module A1.
  • FIG. 6 is a front view showing the semiconductor module A1.
  • FIG. 7 is a side view showing the semiconductor module A1.
  • FIG. 8 is a sectional view taken along the line VIII-VIII of FIG.
  • FIG. 9 is a sectional view taken along the line IX-IX in FIG.
  • FIG. 10 is a sectional view taken along line XX of FIG.
  • FIG. 11 is a plan view showing the semiconductor device B1 of the semiconductor module A1.
  • FIG. 1 is an exploded perspective view showing the semiconductor module A1.
  • FIG. 2 is a perspective view showing the semiconductor module A1.
  • FIG. 3 is a perspective view showing the semiconductor module A1.
  • FIG. 4 is
  • FIG. 12 is a sectional view taken along the line XII-XII in FIG.
  • FIG. 13 is a sectional view taken along line XIII-XIII in FIG.
  • FIG. 14 is an enlarged plan view of an essential part showing the semiconductor device B1 of the semiconductor module A1.
  • FIG. 15 is an enlarged cross-sectional view of the main part taken along the line XV-XV in FIG.
  • FIG. 16 is a circuit diagram showing the semiconductor device B1 of the semiconductor module A1.
  • a semiconductor device B1 shown in FIG. 11 is a power conversion device equipped with a plurality of switching elements such as MOSFETs.
  • the semiconductor device B1 is used as a drive source such as a motor and an inverter device for various electric products.
  • the semiconductor device B1 includes a base material 10, a conductive member 20, an auxiliary conductive member 21, a plurality of input/output terminals 3A, a plurality of control terminals 3B, a plurality of semiconductor elements 40, and a sealing resin 60.
  • the plurality of semiconductor elements 40 include a first switching element 40A and a second switching element 40B.
  • the thickness direction of the first substrate 7 described later is referred to as “z direction” for convenience.
  • the thickness direction of the base material 10 coincides with the z direction.
  • the x direction which is a direction perpendicular to the z direction, corresponds to the first direction.
  • the y direction which is a direction perpendicular to the x direction and the z direction, corresponds to the second direction.
  • the semiconductor device B1 has a rectangular shape when viewed from the z direction, that is, in a plan view.
  • the y direction corresponds to the lateral direction of the semiconductor device B1.
  • the x direction corresponds to the longitudinal direction of the semiconductor device B1.
  • the side in which the pair of input terminals 31 is located in the y direction is referred to as “one side in the y direction”.
  • the side where the pair of output terminals 32 are located in the y direction is referred to as "the other side in the y direction”.
  • the base material 10 has conductive members 20 arranged thereon.
  • the base material 10 serves as a support member for the conductive member 20 and the plurality of semiconductor elements 40.
  • the base material 10 has electrical insulation.
  • the constituent material of the base material 10 is ceramics having excellent thermal conductivity. Examples of such ceramics include aluminum nitride (AlN).
  • the base material 10 has a first main surface 11A and a first back surface 12A.
  • the first main surface 11A and the first rear surface 12A face opposite sides in the z direction.
  • 11 A of 1st main surfaces face the side in which the electroconductive member 20 is arrange
  • the first main surface 11A is covered with the sealing resin 60 together with the conductive member 20 and the plurality of semiconductor elements 40.
  • the first back surface 12A is exposed from the resin back surface 62 of the sealing resin 60.
  • the conductive member 20 is arranged on the first main surface 11A of the base material 10, as shown in FIGS. 11, 12, and 13.
  • the conductive member 20 is a metal plate.
  • the constituent material of the metal plate is copper (Cu) or a copper alloy.
  • the conductive member 20 is bonded to the first main surface 11A with a bonding material (not shown) such as silver (Ag) paste.
  • the surface of the conductive member 20 may be plated with silver, for example.
  • the conductive member 20 may be a metal foil such as a copper foil instead of the metal plate.
  • the conductive member 20 includes a first conductive portion 20A and a pair of second conductive portions 20B.
  • the configuration of the conductive member 20 is not limited to this embodiment, and can be freely set based on the number of the plurality of semiconductor elements 40 set according to the performance required for the semiconductor device B1.
  • the first conductive portion 20A is located on one side in the y direction on the first major surface 11A.
  • the pair of first conductive portions 20A has a rectangular shape when viewed from the z direction.
  • a pair of first switching elements 40A is electrically joined to the surface of the first conductive portion 20A.
  • the pair of second conductive portions 20B are located on the other side in the y direction on the first major surface 11A.
  • the first conductive portion 20A and the pair of second conductive portions 20B are separated from each other in the y direction.
  • the second conductive portion 20B has a rectangular shape when viewed from the z direction.
  • the pair of second conductive portions 20B are separated from each other in the x direction.
  • the second switching element 40B is electrically joined to the surface of each of the pair of second conductive portions 20B.
  • the pair of auxiliary conductive members 21 are arranged on the first main surface 11A of the base material 10, as shown in FIGS. 11 and 13.
  • the pair of auxiliary conductive members 21 are arranged on the one side of the first principal surface 11A in the y direction and in the x direction with the first conductive portion 20A interposed therebetween.
  • the auxiliary conductive member 21 has a rectangular shape when viewed from the z direction.
  • the auxiliary conductive member 21 is a metal plate.
  • the constituent material of the auxiliary conductive member 21 is the same as the constituent material of the conductive member 20.
  • the auxiliary conductive member 21 is bonded to the first main surface 11A with a bonding material (not shown) such as silver (Ag) paste.
  • the surface of the auxiliary conductive member 21 may be plated with silver, for example.
  • the auxiliary conductive member 21 may be a metal foil such as a copper foil instead of the metal plate.
  • the semiconductor device B1 further includes a connecting conductive member 29.
  • the connecting conductive member 29 is connected to the surfaces of the pair of auxiliary conductive members 21 along the x direction and across the first conductive portion 20A.
  • the pair of auxiliary conductive members 21 are electrically connected to each other via the connecting conductive member 29.
  • the connecting conductive member 29 is composed of a plurality of wires.
  • the constituent material of the wire is, for example, aluminum (Al).
  • the connecting conductive member 29 may be a metal piece made of copper or the like and extending in the x direction when viewed from the z direction, instead of the plurality of wires.
  • the plurality of input/output terminals 3A include a pair of input terminals 31 and a pair of output terminals 32.
  • the plurality of input/output terminals 3A are terminals for inputting/outputting a main current that is a target of switching of the semiconductor device B1.
  • the pair of input terminals 31 is located on one side in the y direction of the semiconductor device B1.
  • the pair of input terminals 31 are separated from each other in the x direction.
  • a direct current power supply from the outside is supplied to the pair of input terminals 31.
  • the pair of input terminals 31 is composed of the same lead frame together with the pair of output terminals 32 and the plurality of control terminals 3B.
  • the constituent material of the lead frame is copper or a copper alloy.
  • the pair of input terminals 31 includes an input terminal 31A and an input terminal 31B.
  • Each of the input terminal 31A and the input terminal 31B has a pad portion 311 and a terminal portion 312.
  • the pad portion 311 is separated from the base material 10 when viewed from the z direction, and is covered with the sealing resin 60. As a result, the pair of input terminals 31 are supported by the sealing resin 60.
  • the first connection wire 51 is connected to the surface of the pad portion 311.
  • the constituent material of the first connection wire 51 is, for example, aluminum.
  • the surface of the pad portion 311 may be plated with silver, for example.
  • the input terminal 31A constitutes the positive electrode (P terminal) of the pair of input terminals 31.
  • the first connecting wire 51 connected to the surface of the pad portion 311 of the input terminal 31A is connected to the surface of the first conductive portion 20A.
  • the input terminal 31A is electrically connected to the first conductive portion 20A.
  • the input terminal 31B forms the negative electrode (N terminal) of the pair of input terminals 31.
  • the first connecting wire 51 connected to the surface of the pad portion 311 of the input terminal 31B is connected to the surface of one auxiliary conductive member 21.
  • the input terminal 31B is electrically connected to the pair of auxiliary conductive members 21.
  • the terminal portion 312 is connected to the pad portion 311 and is exposed from the sealing resin 60.
  • the terminal portion 312 is used when the semiconductor device B1 is mounted on the wiring board.
  • the terminal portion 312 has a base portion 312A and a standing portion 312B.
  • the base portion 312A is connected to the pad portion 311 and extends in the y direction from the resin first side surface 631 (details will be described later) of the sealing resin 60 located on one side in the y direction.
  • the upright portion 312B extends from the tip in the y direction of the base portion 312A toward the side facing the first major surface 11A of the base material 10 in the z direction.
  • the terminal portion 312 has an L shape when viewed from the x direction.
  • the pair of output terminals 32 are located on the other side in the y direction of the semiconductor device B1 as shown in FIG.
  • the pair of output terminals 32 are separated from each other in the x direction. From the pair of output terminals 32, alternating-current power (voltage) converted by the plurality of semiconductor elements 40 is output.
  • Each of the pair of output terminals 32 has a pad portion 321 and a terminal portion 322.
  • the number of output terminals 32 is not limited to that in the present embodiment, and can be set freely according to the performance required for the semiconductor device B1.
  • the pad portion 321 is separated from the base material 10 when viewed from the z direction, and is covered with the sealing resin 60. As a result, the pair of output terminals 32 are supported by the sealing resin 60.
  • the second connecting wire 52 is connected to the surface of the pad portion 321.
  • the constituent material of the second connection wire 52 is, for example, aluminum.
  • the surface of the pad portion 321 may be plated with silver, for example.
  • the plurality of second connection wires 52 connected to the surfaces of the pair of pad portions 321 are connected to the surfaces of the pair of second conductive portions 20B. As a result, the pair of output terminals 32 are electrically connected to the pair of second conductive portions 20B.
  • the terminal portion 322 is connected to the pad portion 321 and exposed from the sealing resin 60.
  • the terminal portion 322 is used when the semiconductor device B1 is mounted on the wiring board.
  • the terminal portion 322 has a base portion 322A and a standing portion 322B.
  • the base portion 322A is connected to the pad portion 321 and extends in the y direction from the resin first side surface 631 (details will be described later) of the sealing resin 60 located on the other side in the y direction.
  • the standing portion 322B extends from the tip in the y direction of the base portion 322A toward the side toward the first major surface 11A of the base material 10 in the z direction.
  • the terminal portion 322 has an L shape when viewed from the x direction.
  • the shape of the terminal portion 322 is the same as the shape of the terminal portion 312 of the pair of input terminals 31.
  • the plurality of semiconductor elements 40 are electrically bonded to the first conductive portion 20A and the pair of second conductive portions 20B of the conductive member 20.
  • the plurality of semiconductor elements 40 have a rectangular shape (square shape in the semiconductor device B1) when viewed from the z direction.
  • the plurality of semiconductor elements 40 include a pair of first switching elements 40A and a pair of second switching elements 40B.
  • the number of the plurality of semiconductor elements 40 is not limited to this embodiment, and can be set freely according to the performance required for the semiconductor device B1.
  • the pair of first switching elements 40A and the pair of second switching elements 40B are MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors) configured using a semiconductor material mainly containing silicon carbide (SiC).
  • MOSFETs Metal-Oxide-Semiconductor Field-Effect Transistors
  • the pair of first switching elements 40A and the pair of second switching elements 40B are not limited to MOSFETs, but include field effect transistors including MISFETs (Metal-Insulator-Semiconductor Field-Effect Transistors) and IGBTs (Insulated Gate Bipolar Transistors). Such a bipolar transistor may be used.
  • the plurality of semiconductor elements 40 may be not only switching elements but also rectifying elements such as Schottky barrier diodes.
  • the plurality of semiconductor elements 40 includes a pair of first switching elements 40A and a pair of second switching elements 40B, and these are n-channel MOSFETs.
  • each of the pair of first switching elements 40A and the pair of second switching elements 40B includes an element main surface 401, an element back surface 402, a main surface electrode 41, a back surface electrode 42, and a gate electrode 43. And an insulating film 44.
  • the element main surface 401 and the element back surface 402 face each other in the z direction. Of these, the element main surface 401 faces the side to which the first main surface 11A of the base material 10 faces.
  • the principal surface electrode 41 is provided on the element principal surface 401.
  • a source current flows through the main surface electrode 41.
  • the principal surface electrode 41 is divided into four regions.
  • the first wire 501 is connected to each of the four divided regions.
  • the constituent material of the first wire 501 is, for example, aluminum.
  • the plurality of first wires 501 connected to the main surface electrodes 41 of the pair of first switching elements 40A are connected to the surfaces of the pair of second conductive portions 20B. Thereby, the principal surface electrodes 41 of the pair of first switching elements 40A are individually conducted to the pair of second conductive portions 20B.
  • the second wire 502 is connected to each of the four divided regions.
  • the constituent material of the second wire 502 is, for example, aluminum.
  • the plurality of second wires 502 connected to the main surface electrodes 41 of the pair of second switching elements 40B are individually connected to the surfaces of the pair of auxiliary conductive members 21. Thereby, the principal surface electrodes 41 of the pair of second switching elements 40B are individually conducted to the pair of auxiliary conductive members 21. Therefore, the input terminal 31B is electrically connected to the pair of second switching elements 40B via the auxiliary conductive member 21.
  • the back surface electrode 42 is provided over the entire element back surface 402. A drain current flows through the back surface electrode 42.
  • the back surface electrode 42 of the first switching element 40A is electrically bonded to the surface of the first conductive portion 20A by a conductive bonding layer 49 having conductivity.
  • the constituent material of the conductive bonding layer 49 is, for example, lead-free solder whose main component is tin (Sn).
  • the back surface electrodes 42 of the pair of first switching elements 40A are electrically connected to the pair of first conductive portions 20A.
  • the back surface electrode 42 of the second switching element 40B is electrically bonded to the surface of the second conductive portion 20B by the conductive bonding layer 49. Thereby, the back surface electrodes 42 of the pair of second switching elements 40B are electrically connected to the pair of second conductive portions 20B.
  • the gate electrode 43 is provided on the element main surface 401.
  • a gate voltage for driving each of the pair of first switching elements 40A and the pair of second switching elements 40B is applied to the gate electrode 43.
  • the size of the gate electrode 43 is smaller than that of the principal surface electrode 41.
  • the insulating film 44 is provided on the element main surface 401.
  • the insulating film 44 has electrical insulation.
  • the insulating film 44 surrounds the principal surface electrode 41 when viewed from the z direction.
  • the insulating film 44 is formed by stacking, for example, a silicon dioxide (SiO 2 ) layer, a silicon nitride (Si 3 N 4 ) layer, and a polybenzoxazole (PBO) layer in this order from the element main surface 401.
  • a polyimide layer may be used instead of the polybenzoxazole layer.
  • the plurality of control terminals 3B include a plurality of gate terminals 33 and a plurality of detection terminals 34, as shown in FIG.
  • the plurality of control terminals 3B are separately arranged on both sides in the y direction of the semiconductor device B1.
  • the plurality of gate terminals 33 are located on both sides in the y direction of the semiconductor device B1.
  • the plurality of gate terminals 33 are arranged corresponding to the numbers of the pair of first switching elements 40A and the pair of second switching elements 40B.
  • a gate voltage for driving one of the pair of first switching elements 40A and the pair of second switching elements 40B corresponding to the plurality of gate terminals 33 is applied to each of the plurality of gate terminals 33.
  • Each of the plurality of gate terminals 33 has a pad portion 331 and a terminal portion 332.
  • the pad portion 331 is separated from the base material 10 when viewed from the z direction, and is covered with the sealing resin 60. Thereby, the plurality of gate terminals 33 are supported by the sealing resin 60.
  • the gate wire 503 is connected to the surface of the pad portion 331.
  • the constituent material of the gate wire 503 is, for example, aluminum.
  • the surface of the pad portion 331 may be plated with silver, for example.
  • each of the plurality of gate wires 503 connected to the surfaces of the plurality of pad portions 331 is one of the corresponding pair of first switching elements 40A and pair of second switching elements 40B. Of the gate electrode 43.
  • the plurality of gate terminals 33 are individually conducted to the gate electrodes 43 of the pair of first switching elements 40A and the gate electrodes 43 of the pair of second switching elements 40B.
  • the terminal portion 332 is connected to the pad portion 331 and is exposed from the sealing resin 60.
  • the terminal portion 332 is used when the semiconductor device B1 is mounted on the wiring board.
  • the terminal portion 332 has a base portion 332A and a standing portion 332B.
  • the base portion 332A is connected to the pad portion 331 and extends in the y direction from either of the pair of resin first side surfaces 631 (details will be described later) of the sealing resin 60.
  • the dimension in the y direction of the base portion 332A is smaller than the dimension in the y direction of each of the base portions 312A of the pair of input terminals 31 and the base portions 322A of the pair of output terminals 32.
  • the standing portion 332B extends from the tip of the base portion 332A in the y direction toward the side in which the first main surface 11A of the base material 10 in the z direction faces.
  • the terminal portion 332 has an L shape when viewed from the x direction.
  • the pair of gate terminals 33 corresponding to the pair of first switching elements 40A are located on the other side in the y direction of the semiconductor device B1.
  • the pair of gate terminals 33 are located between the pair of output terminals 32 in the x direction.
  • the pair of gate terminals 33 corresponding to the pair of second switching elements 40B are located on one side in the y direction of the semiconductor device B1.
  • the pair of gate terminals 33 are located between the pair of input terminals 31 in the x direction.
  • the plurality of detection terminals 34 are located on both sides of the semiconductor device B1 in the y direction, as shown in FIG.
  • the plurality of detection terminals 34 are arranged corresponding to the numbers of the pair of first switching elements 40A and the pair of second switching elements 40B.
  • Each of the plurality of detection terminals 34 is located next to the gate terminal 33 that is electrically connected to the gate electrode 43 of either of the pair of first switching elements 40A and the pair of second switching elements 40B to which the detection terminals 34 correspond.
  • a voltage corresponding to the source current flowing through the principal surface electrode 41 of one of the pair of first switching elements 40A and the pair of second switching elements 40B is applied. Based on the voltage applied to each of the plurality of detection terminals 34, the source current flowing through the main surface electrode 41 is detected in the external circuit of the semiconductor device B1.
  • Each of the plurality of detection terminals 34 has a pad portion 341 and a terminal portion 342.
  • the pad portion 341 is separated from the base material 10 when viewed from the z direction, and is covered with the sealing resin 60. Thereby, the plurality of detection terminals 34 are supported by the sealing resin 60.
  • the detection wire 504 is connected to the surface of the pad portion 341.
  • the constituent material of the detection wire 504 is, for example, aluminum.
  • the surface of the pad portion 341 may be plated with silver, for example.
  • each of the plurality of detection wires 504 connected to the surfaces of the plurality of pad portions 341 is one of the corresponding pair of first switching elements 40A and pair of second switching elements 40B. Of the main surface electrode 41.
  • the plurality of detection terminals 34 are individually conducted to the main surface electrodes 41 of the pair of first switching elements 40A and the main surface electrodes 41 of the pair of second switching elements 40B.
  • the terminal portion 342 is connected to the pad portion 341 and is exposed from the sealing resin 60.
  • the terminal portion 342 is used when the semiconductor device B1 is mounted on the wiring board.
  • the terminal portion 342 has a base portion 342A and a standing portion 342B.
  • the base portion 342A is connected to the pad portion 341 and extends in the y direction from either of the pair of resin first side surfaces 631 (details will be described later) of the sealing resin 60.
  • the dimension in the y direction of the base portion 342A is smaller than the dimension in the y direction of each of the base portions 312A of the pair of input terminals 31 and the base portions 322A of the pair of output terminals 32. As shown in FIG.
  • the standing portion 342B extends from the tip in the y direction of the base portion 342A toward the side facing the first main surface 11A of the base material 10 in the z direction.
  • the terminal portion 342 has an L shape when viewed from the x direction.
  • the shape of the terminal portion 342 is the same as the shape of the terminal portions 332 of the plurality of gate terminals 33.
  • the upright portions 342 ⁇ /b>B of 34 are substantially aligned with each other in the y direction.
  • the upright portion 312B of the input terminal 31A, the upright portion 312B of the input terminal 31B, the upright portion 332B of the gate terminal 33 on one side in the y direction and the upright portion 342B of the detection terminal 34 on the one side in the y direction are viewed in the x direction. Overlap each other.
  • the upright portion 322B of the pair of output terminals 32, the upright portion 332B of the gate terminal 33 on the other side in the y direction and the upright portion 342B of the detection terminal 34 on the other side in the y direction are formed.
  • the positions in the y direction are substantially the same.
  • the upright portion 322B of the pair of output terminals 32, the upright portion 332B of the gate terminal 33 on the other side in the y direction and the upright portion 342B of the detection terminal 34 on the other side in the y direction overlap each other when viewed in the x direction.
  • FIG. 16 shows an electric circuit of the semiconductor device B1 including the plurality of semiconductor elements 40, the conductive member 20, the auxiliary conductive member 21, the connecting conductive member 29, the plurality of input/output terminals 3A and the plurality of control terminals 3B described above.
  • the semiconductor device B1 having such a configuration is used as, for example, an AC/DC converter.
  • the encapsulating resin 60 is used for the conductive material 20, the auxiliary conductive member 21, the connecting conductive member 29, and the base material 10 (excluding the first back surface 12A). It covers the plurality of semiconductor elements 40 (the pair of first switching elements 40A and the pair of second switching elements 40B).
  • the sealing resin 60 further covers the plurality of first wires 501, the plurality of second wires 502, the plurality of gate wires 503, the plurality of detection wires 504, the plurality of first connecting wires 51, and the plurality of second connecting wires 52. ing.
  • the constituent material of the sealing resin 60 is, for example, an epoxy resin.
  • the sealing resin 60 has a resin main surface 61, a resin back surface 62, a pair of resin first side surfaces 631, a pair of resin second side surfaces 632, and a pair of through holes 64.
  • the resin main surface 61 faces the side facing the first main surface 11A of the base material 10 in the z direction.
  • the resin back surface 62 faces the side to which the first back surface 12A of the base material 10 in the z direction faces.
  • the first back surface 12A is exposed from the resin back surface 62.
  • the resin back surface 62 has a frame shape surrounding the first back surface 12A.
  • the pair of resin first side surfaces 631 is connected to both the resin main surface 61 and the resin back surface 62 and faces the y direction. From one side of the resin first side surface 631 in the y direction, the terminal portions 312 of the pair of input terminals 31, the terminal portions 332 of the pair of gate terminals 33 arranged corresponding to the pair of second switching elements 40B, and The terminal portion 342 of the pair of detection terminals 34 is exposed. From the other side of the resin first side surface 631 in the y direction, the terminal portions 322 of the pair of output terminals 32, the terminal portions 332 of the pair of gate terminals 33 arranged corresponding to the pair of first switching elements 40A, and The terminal portion 342 of the pair of detection terminals 34 is exposed.
  • the pair of resin second side surfaces 632 are connected to both the resin main surface 61 and the resin back surface 62 and face the x direction.
  • the pair of through holes 64 penetrate the sealing resin 60 from the resin main surface 61 to the resin back surface 62 in the z direction.
  • the hole edges of the pair of through holes 64 are circular.
  • the pair of through holes 64 are located on both sides of the base material 10 in the x direction.
  • the pair of recesses 65 are recessed from the resin back surface 62, as shown in FIGS. 5 and 9.
  • the pair of recesses 65 are for positioning the semiconductor device B1 with respect to the heat sink X1, as described later.
  • the first substrate 7 is connected to the semiconductor module A1, and in the present embodiment, a plurality of electronic components 700 are mounted.
  • the first substrate 7 of the present embodiment includes a first substrate main surface 71, a first substrate back surface 72, a plurality of input/output penetrating portions 73, a plurality of control penetrating portions 74, It has a pair of recesses 75.
  • the shape of the first substrate 7 is not particularly limited, and is rectangular in the z direction in the illustrated example.
  • the first substrate 7 has, for example, an insulating base material made of epoxy resin and a wiring pattern (not shown) formed on the base material.
  • the first substrate main surface 71 is a surface facing one side in the z direction.
  • the first substrate back surface 72 is a surface facing the side opposite to the first substrate main surface 71 in the z direction. In the present embodiment, the first substrate back surface 72 faces the resin main surface 61 of the sealing resin 60 of the semiconductor module A1.
  • the plurality of input/output penetrating portions 73 are for inserting the plurality of input/output terminals 3A of the semiconductor module A1, that is, the input terminal 31A, the input terminal 31B, and the pair of output terminals 32, each of which is the first substrate. 7 through in the z direction.
  • four input/output penetrating portions 73 are provided.
  • the upright portion 312B of the input terminal 31A, the upright portion 312B of the input terminal 31B, and the upright portion 322B of the pair of output terminals 32 are individually inserted into the four input/output penetrating portions 73.
  • the rising portion 312B of the input terminal 31A, the rising portion 312B of the input terminal 31B, and the rising portions 322B of the pair of output terminals 32 project from the first substrate main surface 71 in the z direction.
  • the plurality of control penetrating portions 74 are for inserting a part of the plurality of first connectors 8 to which the plurality of gate terminals 33 which are the plurality of control terminals 3B of the semiconductor module A1 and the plurality of detection terminals 34 are connected. And each penetrates the first substrate 7 in the z direction.
  • four control penetrating portions 74 are provided.
  • the two control penetrating portions 74 are located between the two input/output penetrating portions 73 in the x direction and overlap these control penetrating portions 74 when viewed in the x direction.
  • the other two control penetrating portions 74 are located between the other two input/output penetrating portions 73 in the x direction and overlap these control penetrating portions 74 when viewed in the x direction.
  • a part of the first connector 8 is inserted through the control penetrating portion 74, and one gate terminal 33 and one detection terminal 34 are inserted through the first connector 8.
  • the pair of recesses 75 are provided at both ends of the first substrate 7 in the x direction and are recessed inward in the x direction. As shown in FIG. 4, the recess 75 encloses the through hole 64 of the sealing resin 60 of the semiconductor module A1 when viewed in the z direction.
  • connection terminal 76 is a terminal used for inputting/outputting a control signal to/from the semiconductor module A1.
  • the plurality of connection terminals 76 are arranged near the center of the first substrate 7 in the x direction and the y direction.
  • the plurality of connection terminals 76 are arranged between the pair of recesses 75.
  • the connection terminal 76 has a support portion 761 and a plurality of connection pins 762.
  • the support portion 761 is fixed to the first substrate 7 and supports the plurality of connection pins 762.
  • the support portion 761 is attached to the first substrate main surface 71 of the first substrate 7.
  • the plurality of connection pins 762 protrude from the support portion 761 in the z direction.
  • the connection pin 762 is electrically connected to the wiring pattern (not shown) of the first substrate 7.
  • a plurality of electronic components 700 are mounted on the first board 7.
  • the uses and functions of the plurality of electronic components 700 are not particularly limited, and, for example, from the control signals input from the plurality of connection terminals 76, the plurality of control terminals 3B (the plurality of gates) of the semiconductor module A1 are controlled.
  • a circuit having a function of generating a control signal input to the terminal 33) and converting a detection signal from the plurality of control terminals 3B (detection terminals 34) into an output signal to be output to the outside is configured.
  • the plurality of electronic components 700 include a plurality of electronic components 701, a plurality of electronic components 702, a plurality of electronic components 703, a plurality of electronic components 704, It includes a plurality of electronic components 705, a plurality of electronic components 706, a plurality of electronic components 707, a plurality of electronic components 708, and a plurality of electronic components 709.
  • the plurality of electronic components 701, the plurality of electronic components 702, the plurality of electronic components 703, the plurality of electronic components 704, and the plurality of electronic components 705 are It is mounted on the first substrate main surface 71 of the substrate 7.
  • the plurality of electronic components 706, the plurality of electronic components 707, the plurality of electronic components 708, and the plurality of electronic components 709 are mounted on the first substrate back surface 72 of the first substrate 7.
  • the plurality of electronic components 701 are arranged on both sides in the y direction with respect to the plurality of connection terminals 76.
  • the electronic component 701 is, for example, a Schottky barrier diode.
  • the plurality of electronic components 702 are arranged side by side in the x direction with respect to the plurality of connection terminals 76.
  • the electronic component 702 is, for example, a chip resistor.
  • the plurality of electronic components 703 are arranged on the outside in the y direction with respect to the plurality of connection terminals 76 with the plurality of electronic components 701 sandwiched therebetween.
  • the plurality of electronic components 703 are arranged in the x direction.
  • the electronic component 703 is, for example, a chip resistor.
  • the plurality of electronic components 704 are arranged outside the plurality of electronic components 703 in the y direction.
  • the electronic component 704 is, for example, a Schottky barrier diode.
  • the plurality of electronic components 705 are arranged outside the plurality of electronic components 704 in the y direction.
  • the plurality of electronic components 705 are arranged at a position closest to the control penetrating portion 74 on the first substrate main surface 71.
  • the electronic component 705 is, for example, a ceramic capacitor.
  • the plurality of electronic components 706 are arranged on both sides in the y direction with respect to the plurality of connection terminals 76.
  • the electronic component 706 is, for example, a bipolar transistor.
  • the plurality of electronic components 707 are arranged outside the plurality of 706 in the y direction.
  • the electronic component 707 is, for example, a ceramic capacitor.
  • the multiple electronic components 708 are arranged side by side in the x direction with respect to the multiple 707.
  • the electronic component 708 is, for example, a MOS-FET.
  • the plurality of electronic components 709 are arranged between the plurality of electronic components 707 and the plurality of electronic components 708.
  • the electronic component 709 is, for example, a chip resistor.
  • the plurality of first connectors 8 are fixed to the first substrate 7, and are connected to the plurality of control terminals 3B (the plurality of 33 and the plurality of detection terminals 34).
  • the fixing position and the fixing method of the first connector 8 to the first substrate 7 are not particularly limited.
  • the plurality of first connectors 8 are attached to the first substrate 7 on the first substrate back surface 72 side. Further, in the illustrated example, a part of the first connector 8 is inserted into the control penetrating portion 74 of the first substrate 7.
  • the first connector 8 of this embodiment has a housing 81 and a plurality of insertion holes 82.
  • the housing 81 is made of, for example, resin and constitutes the main body of the housing 81.
  • the insertion hole 82 penetrates in the z direction, and the upright portion 332B of the gate terminal 33 or the upright portion 342B of the detection terminal 34 is inserted therethrough.
  • the first connector 8 electrically connects the gate terminal 33 and the detection terminal 34 to a proper place of the wiring pattern (not shown) of the first substrate 7. Further, the first connector 8 allows the gate terminal 33 and the detection terminal 34 to move relative to the first substrate 7 in at least one of the x direction and the y direction. In the illustrated example, the first connector 8 allows the gate terminal 33 and the detection terminal 34 to move relative to the first substrate 7 in the y direction, as shown in FIG. As shown, the gate terminal 33 and the detection terminal 34 are allowed to move relative to the first substrate 7 in the x direction. Further, the first connector 8 may be configured to allow the gate terminal 33 and the detection terminal 34 to move relative to the first substrate 7 in the z direction. As such a first connector 8, for example, a conventionally known connector disclosed in JP-A-2018-113163, JP-A-2018-63886, JP-A-2017-139101 or the like can be adopted. ..
  • the gate terminal 33 and the detection terminal 34 are inserted into the two insertion holes 82 of one first connector 8. Further, the four first connectors 8 are arranged side by side in the x direction and the y direction.
  • the plurality of first connectors 8 are arranged outside the sealing resin 60 in the y direction.
  • the first connector 8 overlaps the sealing resin 60 of the semiconductor module A1 when viewed in the y direction.
  • the plurality of control terminals 3B (the plurality of gate terminals 33 and the plurality of detection terminals 34) of the semiconductor device B1 are inserted via the first connector 8. Are connected to the first substrate 7.
  • the first connector 8 allows the plurality of gate terminals 33 to move relative to the first substrate 7 in at least one of the x direction and the y direction. Therefore, even if the rising angles of the rising portions 332B of the plurality of gate terminals 33 and the rising portions 342B of the plurality of detection terminals 34 are varied, the first connector 8 causes the positional deviation in the x direction and the y direction. It is possible to absorb. Therefore, it is possible to prevent the angles and positions of the gate terminal 33 and the detection terminal 34 from being corrected with reference to the first substrate 7. Therefore, according to the semiconductor module A1, it is possible to facilitate the terminal connection and achieve more reliable conduction.
  • the first connector 8 overlaps the sealing resin 60 when viewed in the y direction, it is possible to prevent the size of the semiconductor module A1 in the z direction from increasing due to the provision of the first connector 8.
  • the plurality of input/output terminals 3A (the input terminal 31A, the input terminal 31B and the pair of output terminals 32) of the semiconductor module A1 and the plurality of connection pins 762 of the plurality of connection terminals 76 are the same in the z direction.
  • the side the side on which the first substrate main surface 71 faces.
  • the boards or the like to be connected to the plurality of input/output terminals 3A and the plurality of connection terminals 76 can be collectively arranged on the side of the first board 7 facing the first board main surface 71.
  • FIG. 17 shows a modification of the semiconductor module A1.
  • the same or similar elements as those in the above-described embodiment are designated by the same reference numerals as those in the above-described example.
  • the semiconductor module A11 of this modification further includes a second substrate 91, a third substrate 92, and a heat sink X1 in addition to the components of the semiconductor module A1.
  • the second substrate 91 is arranged on the side facing the first substrate main surface 71 in the z direction with respect to the first substrate 7.
  • a plurality of second connectors 911 are attached to the second board 91, for example.
  • the second connector 911 allows the upright portion 312B and the upright portion 322B of the input/output terminal 3A to move relative to the second substrate 91 in the x direction and the y direction, and The proper position of the second substrate 91 and the plurality of input/output terminals 3A are electrically connected.
  • the second connector 911 is provided on the surface of the second substrate 91 facing the side opposite to the first substrate 7.
  • the second substrate 91 is supplied with a current, which is a switching target of the semiconductor module A1, for example.
  • the third substrate 92 is arranged on the side opposite to the first substrate 7 in the z direction with respect to the second substrate 91.
  • a plurality of third connectors 921 are attached to the third substrate 92.
  • the third connector 921 allows the connection pin 762 of the connection terminal 76 to move relative to the third substrate 92 in the x direction and the y direction, and The proper position of the third substrate 92 and the plurality of connection pins 762 are electrically connected.
  • the second substrate 91 has a through hole (not shown) into which the plurality of connection pins 762 are inserted.
  • the third substrate 92 is energized with control signals input to and output from the plurality of connection terminals 76, for example.
  • the heat sink X1 is for releasing heat generated from the plurality of semiconductor elements 40 to the outside.
  • the heat sink X1 is made of metal such as aluminum. Further, the heat sink X1 may have a water channel for water cooling inside.
  • the semiconductor device B1 is attached to the heat sink X1 with a bolt X2.
  • the bolt X2 is inserted into the through hole 64 of the sealing resin 60 and is screwed into the female screw provided on the heat sink X1.
  • the heat sink X1 is provided with a plurality of convex portions X11.
  • the plurality of convex portions X11 are for fitting the semiconductor device B1 and the heat sink X1 more accurately by fitting into the plurality of concave portions 65 of the sealing resin 60.
  • FIG. 18 shows a modification of the semiconductor device B1.
  • the standing portions 312B and 322B of the plurality of input/output terminals 3A and the standing portions 332B and 342B of the plurality of control terminals 3B are different from each other in the y direction. More specifically, the rising portions 332B and the rising portions 342B of the plurality of control terminals 3B are located inward in the y direction (positions closer to the sealing resin 60) than the rising portions 312B and the rising portions 322B of the plurality of input/output terminals 3A. ) Is located.
  • the input/output penetrating portion 73 is provided on the first substrate 7 by arranging the upright portion 312B and the upright portion 322B outside the first substrate 7 in the y direction in the example shown in FIG. It is possible to omit that.
  • the AC/DC converter unit C1 of this embodiment includes a first semiconductor module A21, a second semiconductor module A22, an input module D, an output module E, a capacitor module F, an insulated power supply module G, and a transformer module H.
  • the application of the AC/DC converter unit C1 is not particularly limited, and one example thereof is to convert the AC power (for example, 200V-36A) input to the input module D and to convert the DC power (for example, 800V-) from the output module E. 9A, 7.2 kW) used for AC/DC conversion.
  • FIG. 19 is a block diagram showing the AC/DC converter unit C1.
  • FIG. 20 is a plan view showing the AC/DC converter unit C1.
  • FIG. 21 is a main part plan view showing the AC/DC converter unit C1.
  • FIG. 22 is a front view showing the semiconductor module of the AC/DC converter unit C1.
  • FIG. 23 is a cross-sectional view of essential parts taken along the line XXIII-XXIII in FIG.
  • FIG. 24 is a cross-sectional view of main parts taken along the line XXIV-XXIV of FIG.
  • FIG. 25 is a cross-sectional view of essential parts along the line XXV-XXV in FIG.
  • the first semiconductor module A21 has a configuration that is partially common to the above-described semiconductor module A1. As shown in FIG. 22, the first semiconductor module A21 includes a semiconductor device B21, a first substrate 7, a plurality of electronic components 700, a plurality of connection terminals 76, and a plurality of first connectors 8.
  • the first substrate 7, the plurality of electronic components 700, the plurality of connection terminals 76, and the plurality of first connectors 8 have, for example, the same configuration as that of the semiconductor module A1.
  • the gate driver, the control board, and the like in FIG. 19 may be configured by a plurality of electronic components 700 mounted on the first substrate 7, for example.
  • the semiconductor device B21 includes two first switching elements 40A and second switching elements 40B.
  • the semiconductor device B21 constitutes, for example, a PFC (power factor correction) circuit and fulfills an AC/DC conversion function.
  • the semiconductor device B21 has an input terminal 31A, an input terminal 31B, an output terminal 32A and an output terminal 32B. Unlike the configuration of the semiconductor device B1, the input terminal 31A, the input terminal 31B, the terminal portion 312 of the output terminal 32A, and the terminal portion 322 of the output terminal 32B do not have the standing portion 312B and the standing portion 322B, and have a straight shape. Is.
  • the terminal portion 312 of the input terminal 31A and the terminal portion 312 of the input terminal 31B project to one side in the y direction and are separated from each other in the x direction.
  • the terminal portion 322 of the output terminal 32A and the terminal portion 322 of the output terminal 32B project to the other side in the y direction and are separated from each other in the x direction.
  • the input terminal 31A is connected to the source electrode (main surface electrode 41) of the first switching element 40A and the drain electrode (back surface electrode 42) of the second switching element 40B.
  • the input terminal 31B is connected to a connection point of two diodes connected in series via a coil.
  • the output terminal 32A is connected to the cathode of one diode.
  • the output terminal 32B is connected to the anode of the other diode.
  • the terminal portions 312 of the input terminals 31A and 31B have fastening holes 313.
  • the fastening hole 313 is provided near the tip of the terminal portion 312 and penetrates the terminal portion 312 in the z direction.
  • the second semiconductor module A22 has a configuration that is partially common to the above-described semiconductor module A1. As shown in FIG. 22, the second semiconductor module A22 includes a semiconductor device B22, a first substrate 7, a plurality of electronic components 700, a plurality of connection terminals 76, and a plurality of first connectors 8.
  • the first substrate 7, the plurality of electronic components 700, the plurality of connection terminals 76, and the plurality of first connectors 8 have, for example, the same configuration as that of the semiconductor module A1.
  • the gate driver, the control board, and the like in FIG. 19 may be configured by a plurality of electronic components 700 mounted on the first substrate 7, for example.
  • the semiconductor device B22 includes two first switching elements 40A and two second switching elements 40B, as shown in FIG.
  • the semiconductor device B22 is, for example, an H bridge (full bridge) circuit for forming an LLC resonance DC/DC converter together with the semiconductor device B23 of the transformer module H and the output module E.
  • the semiconductor device B22 has an input terminal 31A, an input terminal 31B, an output terminal 32A and an output terminal 32B. Unlike the configuration of the semiconductor device B1, the input terminal 31A, the input terminal 31B, the terminal portion 312 of the output terminal 32A, and the terminal portion 322 of the output terminal 32B of the semiconductor device B22 do not have the rising portion 312B and the rising portion 322B. It has a straight shape.
  • the terminal portion 312 of the input terminal 31A and the terminal portion 312 of the input terminal 31B project to one side in the y direction and are separated from each other in the x direction.
  • the terminal portion 322 of the output terminal 32A and the terminal portion 322 of the output terminal 32B project to the other side in the y direction and are separated from each other in the x direction.
  • the input terminal 31A is connected to the drain electrodes (back surface electrodes 42) of the two first switching elements 40A.
  • the input terminal 31B is connected to the source electrodes (main surface electrodes 41) of the two second switching elements 40B.
  • the output terminal 32A is connected to the source electrode (main surface electrode 41) of the one first switching element 40A and the drain electrode (back surface electrode 42) of the one second switching element 40B.
  • the output terminal 32B is connected to the source electrode (main surface electrode 41) of the other first switching element 40A and the drain electrode (back surface electrode 42) of the other second switching element 40B.
  • the input terminal 31A of the semiconductor device B22 and the terminal portion 312 of the input terminal 31B have fastening holes 313.
  • the fastening hole 313 is provided near the tip of the terminal portion 312 and penetrates the terminal portion 312 in the z direction.
  • the input module D is a module to which electric power is input to the AC/DC converter unit C1.
  • the specific configuration of the input module D is not limited at all, and in the present embodiment, as shown in FIGS. 19 and 20, it has an input connector D1, an input filter D2, a reactor D3, an output terminal D41 and an output terminal D42. ..
  • the input connector D1 is a part to which AC power (for example, 200V-36A) is input by being connected to an external connector or the like.
  • the input filter D2 is a part that performs arbitrary filtering on the AC power input to the input connector D1.
  • the reactor D3 is interposed between the input filter D2 and the output terminal D41.
  • the output terminal D41 and the output terminal D42 are for outputting from the input connector D1 to the first semiconductor module A21 (semiconductor device B21). As shown in FIGS. 20, 21, 23, and 24, the output terminal D41 and the output terminal D42 project to the other side in the y direction and are separated from each other in the x direction.
  • the output terminal D41 and the output terminal D42 are made of, for example, a metal plate.
  • the constituent material of the metal plate is copper (Cu) or a copper alloy.
  • the output terminal D41 and the output terminal D42 have a shape in which the tips thereof extend directly upward in the y direction.
  • the output terminal D41 and the output terminal D42 have a fastening hole D43.
  • the fastening hole D43 is provided near the tips of the output terminals D41 and D42 and penetrates the output terminals D41 and D42 in the z direction.
  • the output module E is a module to which the electric power from the AC/DC converter unit C1 is output.
  • the specific configuration of the output module E is not limited at all, and in the present embodiment, as shown in FIGS. 19, 20, and 28, the output module E has an output connector E1, an output filter E2, an output substrate E3, and a semiconductor device B23. ..
  • the output connector E1 is for outputting DC power (for example, 800V-9A, 7.2 kW) by being connected to an external connector or the like.
  • the output filter E2 is a part that performs arbitrary filtering processing on the DC power output from the output connector E1.
  • the output board E3 is a wiring board having a base material made of, for example, a glass epoxy resin and a wiring pattern formed on the base material. For example, the output filter E2 and the semiconductor device B23 are mounted.
  • the semiconductor device B23 has four diode elements 40C, an input terminal 31A, an input terminal 31B, an output terminal 32A and an output terminal 32B, and forms a bridge type rectification circuit.
  • the input terminal 31A and the input terminal 31B project to one side in the y direction and are separated from each other in the x direction.
  • the output terminal 32A and the output terminal 32B project to the other side in the y direction and are separated from each other in the x direction.
  • the capacitor module F includes the terminal portion 322 (output terminal 32A) of the semiconductor device B21 of the first semiconductor module A21 and the semiconductor device B22 of the second semiconductor module A22.
  • the terminal portion 312 (input terminal 31A) is connected to the terminal portion 322 (output terminal 32B) of the semiconductor device B21 and the terminal portion 312 (input terminal 31B) of the semiconductor device B22.
  • the specific configuration of the capacitor module F is not limited at all, and in the present embodiment, it has a plurality of snubber capacitors F1, a connection terminal F21 and a connection terminal F22.
  • the plurality of snubber capacitors F1 have a function of, for example, absorbing a surge voltage at the time of switch-off due to parasitic inductance in the connection path between the first semiconductor module A21 (semiconductor device B21) and the second semiconductor module A22 (semiconductor device B22). Fulfill.
  • connection terminal F21 and the connection terminal F22 are made of, for example, a metal plate.
  • the constituent material of the metal plate is copper (Cu) or a copper alloy.
  • the connection terminal F21 is connected to the terminal portion 322 (output terminal 32A) of the semiconductor device B21 and the terminal portion 312 (input terminal 31A) of the semiconductor device B22.
  • the connection terminal F22 is connected to the terminal portion 322 (output terminal 32B) of the semiconductor device B21 and the terminal portion 312 (input terminal 31B) of the semiconductor device B22.
  • the insulated power supply module G is a module that supplies electric power for driving the first semiconductor module A21, the second semiconductor module A22, and the like of the AC/DC converter unit C1.
  • the insulated power supply module G is connected to the first semiconductor module A21, the second semiconductor module A22, etc. via a cable (not shown), for example.
  • Transformer module H As shown in FIGS. 19 and 20, the transformer module H is interposed between the second semiconductor module A22 and the output module E.
  • the transformer module H functions as a DC/DC converter together with the second semiconductor module A22 and the output module E.
  • the specific configuration of the transformer module H is not limited at all, and in this embodiment, it has a transformer H3, an input terminal H11, an input terminal H12, an output terminal H21, and an output terminal H22.
  • the transformer H3 performs a predetermined voltage changing function while insulating the second semiconductor module A22 side (primary side) and the output module E side (secondary side).
  • the input terminal H11 is connected to the output terminal 32A of the second semiconductor module A22 (semiconductor device B22).
  • the input terminal H12 is connected to the output terminal 32B of the second semiconductor module A22 (semiconductor device B22).
  • the output terminal H21 is connected to the input terminal 31A of the semiconductor device B23 of the output module E.
  • the output terminal H22 is connected to the input terminal 31B of the semiconductor device B23 of the output module E.
  • the first semiconductor module A21, the capacitor module F, and the insulated power supply module G are arranged on the other side in the y direction of the input module D.
  • the first semiconductor module A21 is arranged so as to be sandwiched between the capacitor module F and the insulated power supply module G in the x direction.
  • the second semiconductor module A22 is arranged on the other side in the y direction of the first semiconductor module A21.
  • the second semiconductor module A22 is arranged so as to be sandwiched between the capacitor module F and the insulated power supply module G in the x direction.
  • the transformer module H is arranged on the other side in the y direction of the capacitor module F, the second semiconductor module A22, and the insulated power supply module G.
  • the output module E is arranged on the other side in the y direction of the transformer module H.
  • the semiconductor device B23 is arranged so that the position in the x direction is substantially the same as the semiconductor device B21 and the semiconductor device B22.
  • the output terminal D41 of the input module D and the terminal portion 312 of the input terminal 31A of the first semiconductor module A21 are directly connected by a bolt 351 and a nut 361.
  • the bolt 351 and the nut 361 are specific examples of the fastening member of the present disclosure, and are examples of the fixing means of the present disclosure.
  • the output terminal D41 and the terminal portion 312 are overlapped with each other such that the fastening hole D43 and the fastening hole 313 are substantially aligned when viewed in the z direction.
  • the bolt 351 is inserted through the fastening hole D43 and the fastening hole 313.
  • the nut 361 is screwed into the bolt 351.
  • the output terminal D41 and the terminal portion 312 (input terminal 31A) are fastened (fixed) by the fastening force between the bolt 351 and the nut 361, and are directly connected.
  • the output terminal D42 of the input module D and the terminal portion 312 of the input terminal 31B of the first semiconductor module A21 are directly connected by a bolt 352 and a nut 362.
  • the bolt 352 and the nut 362 are specific examples of the fastening member of the present disclosure, and are examples of the fixing means of the present disclosure.
  • the output terminal D42 and the terminal portion 312 are overlapped with each other such that the fastening hole D43 and the fastening hole 313 are substantially aligned when viewed in the z direction.
  • the bolt 352 is inserted through the fastening hole D43 and the fastening hole 313.
  • the nut 362 is screwed onto the bolt 352.
  • the output terminal D42 and the terminal portion 312 (input terminal 31B) are fastened (fixed) by the fastening force between the bolt 352 and the nut 362, and are directly connected.
  • the terminal portion 312 is directly connected by a bolt 353 and a nut 363.
  • the bolt 353 and the nut 363 are specific examples of the fastening member of the present disclosure, and are examples of the fixing means of the present disclosure.
  • the terminal portion 322 of the output terminal 32A of the semiconductor device B21 and the terminal portion 312 of the input terminal 31A of the semiconductor device B22 are overlapped with each other such that the fastening holes 323 and the fastening holes 313 are substantially aligned when viewed in the z direction. ..
  • the bolt 353 is inserted through the fastening hole 323 and the fastening hole 313.
  • the nut 363 is screwed into the bolt 353.
  • connection terminal F21 is fastened together with the terminal portion 322 of the output terminal 32A of the semiconductor device B21 and the terminal portion 312 of the input terminal 31A of the semiconductor device B22.
  • the connection terminal F21 of this embodiment has a first portion F211, a second portion F212, and a third portion F213.
  • the first portion F211 is a portion that extends straight in the x direction from the snubber capacitor F1 side.
  • the second portion F212 is a tip portion in the y direction of the connection terminal F21, and is located below the first portion F211 in the z direction in the drawing.
  • the third portion F213 is interposed between the first portion F211 and the second portion F212 and is inclined with respect to the x direction and the z direction.
  • a fastening hole F214 is formed in the second portion F212.
  • the second portion F212, the terminal portion 322, and the terminal portion 312 are overlapped with each other such that the fastening hole F214, the fastening hole 323, and the fastening hole 313 are substantially aligned when viewed in the z direction.
  • the bolt 353 is inserted through the fastening hole F214, the fastening hole 323, and the fastening hole 313.
  • the nut 363 is screwed into the bolt 353.
  • the bolt 354 and the nut 364 are specific examples of the fastening member of the present disclosure, and are examples of the fixing means of the present disclosure.
  • the terminal portion 322 of the output terminal 32B of the semiconductor device B21 and the terminal portion 312 of the input terminal 31B of the semiconductor device B22 are overlapped with each other such that the fastening holes 323 and the fastening holes 313 are substantially aligned when viewed in the z direction. ..
  • the bolt 354 is inserted through the fastening hole 323 and the fastening hole 313.
  • the nut 364 is screwed onto the bolt 354. By the fastening force between the bolt 354 and the nut 364, the terminal portion 322 of the output terminal 32B of the semiconductor device B21 and the terminal portion 312 of the input terminal 31B of the semiconductor device B22 are fastened (fixed) and directly connected.
  • connection terminal F22 is fastened together with the terminal portion 322 of the output terminal 32B of the semiconductor device B21 and the terminal portion 312 of the input terminal 31B of the semiconductor device B22.
  • the connection terminal F22 of this embodiment has a first portion F221, a second portion F222, and a third portion F223.
  • the first portion F221 is a portion that extends straight in the x direction from the snubber capacitor F1 side.
  • the first portion F221 overlaps the terminal portion 312, the terminal portion 322, and the second portion F212 fixed by the bolt 353 and the nut 363 when viewed in the z direction.
  • the first portion F221 is located below the terminal portion 312, the terminal portion 322, and the second portion F212 fixed by the bolt 353 and the nut 363 in the z direction in the figure.
  • the second portion F222 is a tip portion in the y direction of the connection terminal F22, and is located above the first portion F221 in the z direction in the figure.
  • the third portion F223 is interposed between the first portion F221 and the second portion F222, and is inclined with respect to the x direction and the z direction.
  • a fastening hole F224 is formed in the second portion F222.
  • the second portion F222, the terminal portion 322, and the terminal portion 312 are overlapped with each other such that the fastening hole F224, the fastening hole 323, and the fastening hole 313 are substantially aligned when viewed in the z direction.
  • the bolt 354 is inserted through the fastening hole F224, the fastening hole 323, and the fastening hole 313.
  • the nut 364 is screwed onto the bolt 354.
  • the terminal portion 322 of the output terminal 32A of the second semiconductor module A22 (semiconductor device B22) and the input terminal H11 of the transformer module H are directly connected by the bolt 355 and the nut 365. It is connected.
  • the bolt 355 and the nut 365 are specific examples of the fastening member of the present disclosure, and are examples of the fixing means of the present disclosure.
  • the terminal portion 322 of the output terminal 32A of the semiconductor device B22 and the input terminal H11 of the transformer module H are overlapped with each other such that the fastening hole 323 and the fastening hole H13 are substantially aligned when viewed in the z direction.
  • the bolt 355 is inserted through the fastening hole 323 and the fastening hole H13.
  • the nut 365 is screwed into the bolt 355.
  • the terminal portion 322 of the output terminal 32B of the second semiconductor module A22 (semiconductor device B22) and the input terminal H12 of the transformer module H are directly connected by the bolt 356 and the nut 366.
  • the bolt 356 and the nut 366 are specific examples of the fastening member of the present disclosure, and are examples of the fixing means of the present disclosure.
  • the terminal portion 322 of the output terminal 32B of the semiconductor device B22 and the input terminal H12 of the transformer module H are overlapped with each other such that the fastening hole 323 and the fastening hole H13 are substantially aligned when viewed in the z direction.
  • the bolt 356 is inserted through the fastening hole 323 and the fastening hole H13.
  • the nut 366 is screwed onto the bolt 356.
  • the terminal portion 322 of the output terminal 32B of the semiconductor device B22 and the fastening hole H13 of the transformer module H are fastened (fixed) and directly connected.
  • the output terminal H21 of the transformer module H and the terminal portion 312 of the input terminal 31A of the semiconductor device B23 are directly connected by a bolt 357 and a nut 367.
  • the bolt 357 and the nut 367 are specific examples of the fastening member of the present disclosure, and are examples of the fixing means of the present disclosure.
  • the output terminal H21 of the transformer module H and the terminal portion 312 of the input terminal 31A of the semiconductor device B23 are overlapped with each other such that the fastening hole H23 and the fastening hole 313 are substantially aligned when viewed in the z direction.
  • the bolt 357 is inserted through the fastening hole H23 and the fastening hole 313.
  • the nut 367 is screwed onto the bolt 357.
  • the output terminal H21 of the transformer module H and the terminal portion 312 of the input terminal 31A of the semiconductor device B23 are fastened (fixed) and directly connected.
  • the output terminal H22 of the transformer module H and the terminal portion 312 of the input terminal 31B of the semiconductor device B23 are directly connected by a bolt 358 and a nut 368.
  • the bolt 358 and the nut 368 are specific examples of the fastening member of the present disclosure, and are examples of the fixing means of the present disclosure.
  • the output terminal H22 of the transformer module H and the terminal portion 312 of the input terminal 31B of the semiconductor device B23 are overlapped with each other such that the fastening hole H23 and the fastening hole 313 are substantially aligned when viewed in the z direction.
  • the bolt 358 is inserted through the fastening hole H23 and the fastening hole 313.
  • the nut 368 is screwed onto the bolt 358.
  • the output terminal 32A of the semiconductor device B23 and the output board E3 are directly connected by the bolt 359 and the nut 369.
  • the bolt 359 and the nut 369 are specific examples of the fastening member of the present disclosure, and are examples of the fixing means of the present disclosure.
  • the terminal portion 322 of the output terminal 32A of the semiconductor device B23 and the output board E3 are overlapped with each other such that the fastening hole 323 and the fastening hole E31 are substantially aligned when viewed in the z direction.
  • the bolt 359 is inserted through the fastening hole 323 and the fastening hole E31.
  • the nut 369 is screwed onto the bolt 359.
  • the terminal portion 322 of the output terminal 32A of the semiconductor device B23 and the output substrate E3 are fastened (fixed) by the fastening force of the bolt 359 and the nut 369, and are directly connected.
  • the output terminal 32B of the semiconductor device B23 and the output board E3 are directly connected by the bolt 35a and the nut 36a.
  • the bolt 35a and the nut 36a are specific examples of the fastening member of the present disclosure, and are examples of the fixing means of the present disclosure.
  • the terminal portion 322 of the output terminal 32B of the semiconductor device B23 and the output board E3 are overlapped with each other such that the fastening hole 323 and the fastening hole E31 are substantially aligned when viewed in the z direction.
  • the bolt 35a is inserted through the fastening hole 323 and the fastening hole E31.
  • the nut 36a is screwed into the bolt 35a.
  • the terminal portion 322 of the output terminal 32B of the semiconductor device B23 and the output board E3 are fastened (fixed) by the fastening force between the bolt 35a and the nut 36a, and are directly connected.
  • the terminal portion 312 of the input terminal 31A of B22) is directly connected by the bolt 353 and the nut 363 which are fixing means.
  • the inductance in the connection path between the output terminal 32A and the input terminal 31A can be reduced, and the responsiveness of the AC/DC converter unit C1 can be further enhanced.
  • terminal portion 322 of the output terminal 32B of the first semiconductor module A21 (semiconductor device B21) and the terminal portion 312 of the input terminal 31B of the second semiconductor module A22 (semiconductor device B22) are fixing means such as a bolt 354 and a nut. It is directly connected by 364. As a result, the inductance in the connection path between the output terminal 32B and the input terminal 31B can be reduced, and the responsiveness of the AC/DC converter unit C1 can be further enhanced.
  • the terminal portion 312 and the terminal portion 322 protruding from the sealing resin 60 have a shape that extends straight in the y direction. This makes it possible to reduce the inductance of the terminal portion 312 and the terminal portion 322 itself, which is preferable for further enhancing the responsiveness of the AC/DC converter unit C1.
  • the bolt 353 and the nut 363 or the bolt 354 and the nut 364 which are the fastening means as the fixing means, a reliable connection is realized, and the first semiconductor module A21 (semiconductor device B21) and the second semiconductor module A22 (semiconductor module). Either one of the devices B22) can be easily removed from the AC/DC converter unit C1 and then attached. This makes it possible to more easily replace one of the first semiconductor module A21 (semiconductor device B21) and the second semiconductor module A22 (semiconductor device B22).
  • the second portion F212 of the connection terminal F21 is fixed together with the terminal portion 322 of the output terminal 32A and the terminal portion 312 of the input terminal 31A. They are directly connected to each other by means of bolts 353 and nuts 363. Thereby, the inductance of the connection path connecting the first semiconductor module A21 (semiconductor device B21), the second semiconductor module A22 (semiconductor device B22) and the capacitor module F can be reduced.
  • the second portion F222 of the connection terminal F22 is directly connected to the terminal portion 322 of the output terminal 32B and the terminal portion 312 of the input terminal 31B by bolts 354 and nuts 364 that are fixing means. ing. Thereby, the inductance of the connection path connecting the first semiconductor module A21 (semiconductor device B21), the second semiconductor module A22 (semiconductor device B22) and the capacitor module F can be reduced.
  • the output terminal D41 of the input module D and the terminal portion 312 of the input terminal 31A of the first semiconductor module A21 are fixing means such as a bolt 351 and a nut. It is directly connected by 361.
  • the output terminal D42 of the input module D and the terminal portion 312 of the input terminal 31B of the first semiconductor module A21 (semiconductor device B21) are directly connected by the bolt 352 and the nut 362. Thereby, the inductance in the connection path between the output terminals D41, D42 and the input terminals 31A, 31B can be reduced, and the responsiveness of the AC/DC converter unit C1 can be further enhanced.
  • the output terminals D41, D42 and the terminal portion 312 have a shape that extends straight in the y direction. This makes it possible to reduce the inductance of the output terminals D41, D42 and the terminal portion 312 itself, which is preferable for further enhancing the responsiveness of the AC/DC converter unit C1.
  • the bolt 351 and the nut 361 or the bolt 352 and the nut 362 which are the fastening means as the fixing means, a reliable connection is realized and at the same time, one of the input module D and the first semiconductor module A21 (semiconductor device B21) is provided. Can be easily removed from the AC/DC converter unit C1 and then attached. Thereby, either the input module D or the first semiconductor module A21 (semiconductor device B21) can be replaced more easily.
  • the terminal portion 322 of the output terminal 32A of the second semiconductor module A22 (semiconductor device B22) and the input terminal H11 of the transformer module H are bolts 355 and nuts that are fixing means. It is directly connected by 365. Further, the terminal portion 322 of the output terminal 32B of the second semiconductor module A22 (semiconductor device B22) and the input terminal H12 of the transformer module H are directly connected by the bolt 356 and the nut 366 which are fixing means. As a result, the inductance in the connection path between the output terminals 32A and 32B and the input terminals H11 and H12 can be reduced, and the responsiveness of the AC/DC converter unit C1 can be further enhanced.
  • the terminal portion 322 and the input terminals H11 and H12 have a shape that extends straight in the y direction. This makes it possible to reduce the inductance of the terminal portion 322 and the input terminals H11 and H12 itself, which is preferable for further enhancing the responsiveness of the AC/DC converter unit C1.
  • the bolt 355 and the nut 365 or the bolt 356 and the nut 366 which are the fastening means as the fixing means, a reliable connection is realized, and at least one of the second semiconductor module A22 (semiconductor device B22) and the output module E is provided. Can be easily removed from the AC/DC converter unit C1 and then attached. As a result, either the second semiconductor module A22 (semiconductor device B22) or the output module E can be replaced more easily.
  • the output terminal H21 of the transformer module H and the terminal portion 312 of the input terminal 31A of the semiconductor device B23 are directly connected by a bolt 357 and a nut 367 which are fixing means. Further, the output terminal H22 of the transformer module H and the terminal portion 312 of the input terminal 31B of the semiconductor device B23 are directly connected by the bolt 358 and the nut 368 which are fixing means. As a result, the inductance in the connection path between the output terminals H21, H22 and the input terminals 31A, 31B can be reduced, and the responsiveness of the AC/DC converter unit C1 can be further enhanced.
  • the output terminals H21, H22 and the terminal portion 312 have a shape that extends straight in the y direction. This makes it possible to reduce the inductance of the output terminals H21, H22 and the terminal portion 312 itself, which is preferable for further enhancing the responsiveness of the AC/DC converter unit C1.
  • the bolt 357 and the nut 367 or the bolt 358 and the nut 368 which are the fastening means as the fixing means, a reliable connection is realized, and at least one of the transformer module H and the semiconductor device B23 is connected to the AC/DC converter unit C1. It can be easily removed and then attached. As a result, either the transformer module H or the semiconductor device B23 can be replaced more easily.
  • the terminal portion 322 of the output terminal 32A of the semiconductor device B23 and the output board E3 are directly connected by the bolt 359 and the nut 369 which are fixing means. Further, the terminal portion 322 of the output terminal 32B of the semiconductor device B23 and the output board E3 are directly connected by the bolt 35a and the nut 36a which are fixing means. As a result, the inductance in the connection path between the output terminals 32A and 32B and the output board E3 can be reduced, and the responsiveness of the AC/DC converter unit C1 can be further enhanced.
  • the semiconductor device B23 By using the bolt 359 and the nut 369 or the bolt 35a and the nut 36a which are the fastening means as the fixing means, a reliable connection is realized, and the semiconductor device B23 is easily removed from the AC/DC converter unit C1 and then attached. Can be done. Thereby, the semiconductor device B23 can be replaced more easily.
  • FIG. 29 shows a first modification of the AC/DC converter unit C1.
  • the AC/DC converter unit C11 of this modification is different from the above-mentioned AC/DC converter unit C1 in the arrangement of the first semiconductor module A21, the second semiconductor module A22, the capacitor module F, the insulated power supply module G, and the semiconductor device B23. ..
  • the capacitor module F is arranged between the insulated power supply module G and the first semiconductor module A21 and the second semiconductor module A22 in the x direction. Further, the semiconductor device B23 is arranged so that the position in the x direction is the same as that of the semiconductor devices B21 and B22, and is arranged deviated from the center of the output module E in the x direction.
  • the responsiveness can be further enhanced as in the AC/DC converter unit C1.
  • the arrangement of the first semiconductor module A21, the second semiconductor module A22, the capacitor module F, the insulated power supply module G, and the semiconductor device B23 can be changed variously.
  • FIG. 30 shows a second modification of the AC/DC converter unit C1.
  • the AC/DC converter unit C12 of this modification is different from the above-described AC/DC converter unit C1 in the arrangement of the semiconductor device B23.
  • the semiconductor device B23 is arranged at a position shifted in the x direction with respect to the semiconductor devices B21 and B22. In other words, the semiconductor device B23 is separated from the semiconductor devices B21 and B22 when viewed in the y direction. Also according to this modification, the responsiveness can be further enhanced as in the AC/DC converter unit C1.
  • AC/DC Converter Unit C1 Third Modification 31 to 33 show a third modification of the AC/DC converter unit C1.
  • the output terminal H21 and the output terminal H22, and the input terminal 31A, the input terminal 31B, the output terminal 32A, and the output terminal 32B of the semiconductor device B23 are fixed in the above-described AC/DC. It is different from the converter unit C1.
  • the terminal portion 312 of the input terminal 31A of the semiconductor device B23 is directly fixed to the output substrate E3 by the welding portion 377 which is an example of fixing means.
  • the terminal portion 312 is inserted into the welding hole E32 of the output board E3, and the welding portion 377 is provided.
  • the specific welding form of the welded portion 377 is not limited at all.
  • a so-called welding rod may be used to form the welding bead, or a welding bead may be formed by melting the terminal portion 312 or the like. This point is the same for each welded portion described below.
  • the terminal portion 312 of the input terminal 31B of the semiconductor device B23 is directly fixed to the output board E3 by the welded portion 378 which is an example of fixing means.
  • the terminal portion 312 is inserted through the welding hole E32 of the output board E3, and the welding portion 378 is provided.
  • the specific welding form of the welded portion 378 is not limited at all.
  • the terminal portion 322 of the output terminal 32A of the semiconductor device B23 is directly fixed to the output substrate E3 by the welded portion 379 which is an example of a fixing means.
  • the terminal portion 322 is inserted through the welding hole E32 of the output substrate E3, and the welding portion 379 is provided.
  • the specific welding form of the welded portion 379 is not limited at all.
  • the terminal portion 322 of the output terminal 32B of the semiconductor device B23 is directly fixed to the output substrate E3 by the welded portion 37a which is an example of fixing means.
  • the terminal portion 322 is inserted through the welding hole E32 of the output substrate E3, and the welding portion 37a is provided.
  • the specific welding form of the welded portion 37a is not limited at all.
  • the responsiveness can be further enhanced as in the AC/DC converter unit C1. Further, even when the welded parts 377, 378, 379, 37a are used as the fixing means, the inductance can be reduced. Further, the configuration of the present disclosure directly connected is a concept including a configuration in which both are fixed via a welding bead derived from a welding rod.
  • FIG. 34 shows a fourth modification of the AC/DC converter unit C1.
  • the AC/DC converter unit C14 of this modification is different from the above-described AC/DC converter unit C13 in the arrangement of the first semiconductor module A21, the second semiconductor module A22, the capacitor module F, the insulated power supply module G, and the semiconductor device B23. ..
  • the capacitor module F is arranged between the insulated power supply module G and the first semiconductor module A21 and the second semiconductor module A22 in the x direction.
  • the semiconductor device B23 is arranged so that the position in the x direction is the same as that of the semiconductor devices B21 and B22, and the semiconductor device B23 is arranged so as to be deviated from the center of the output module E in the x direction.
  • the responsiveness can be further enhanced as in the AC/DC converter unit C1.
  • the arrangement of the first semiconductor module A21, the second semiconductor module A22, the capacitor module F, the insulated power supply module G, and the semiconductor device B23 can be changed variously.
  • FIG. 35 shows a fifth modification of the AC/DC converter unit C1.
  • the AC/DC converter unit C15 of this modification is different from the above-described AC/DC converter unit C13 in the arrangement of the semiconductor device B23.
  • the semiconductor device B23 is arranged at a position shifted in the x direction with respect to the semiconductor devices B21 and B22. In other words, the semiconductor device B23 is separated from the semiconductor devices B21 and B22 when viewed in the y direction. Also according to this modification, the responsiveness can be further enhanced as in the AC/DC converter unit C1.
  • FIG. 36 to 42 show an AC/DC converter unit according to the second embodiment of the present disclosure.
  • the AC/DC converter unit C2 of this embodiment is different from the above-described embodiments in the fixed form of the input terminals 31A, the input terminals 31B, the output terminals 32A, and the output terminals 32B of the semiconductor devices B21 and B22.
  • the output terminal D41 of the input module D and the terminal portion 312 of the input terminal 31A of the first semiconductor module A21 are welded as a fixing means. Directly connected by the portion 371.
  • the welding form of the welded portion 371 is not limited at all.
  • the output terminal D42 of the input module D and the terminal portion 312 of the input terminal 31B of the first semiconductor module A21 (semiconductor device B21) are directly connected by the welding portion 372 which is a fixing means.
  • the welding form of the welded portion 371 is not limited at all.
  • the terminal portion 312 of 31A is directly connected by a welding portion 373 which is a fixing means.
  • the second portion F212 of the connection terminal F21 is directly connected to the terminal portion 322 of the output terminal 32A and the terminal portion 312 of the input terminal 31A by the welding portion 373.
  • weld 373 includes weld 373a and weld 373b. The welded portion 373a fixes the terminal portion 322 and the second portion F212.
  • the welded portion 373b fixes the terminal portion 312 and the second portion F212.
  • the specific form of the welded portion 373 is not limited at all.
  • the terminal portion 322, the terminal portion 312, and the second portion F212 may be collectively fixed by one welding portion 373 in a state where they are all overlapped.
  • the terminal portion 322 of the output terminal 32B of the first semiconductor module A21 (semiconductor device B21) and the input terminal 31B of the second semiconductor module A22 (semiconductor device B22) are connected.
  • the terminal portion 312 is directly connected by a welding portion 374 which is a fixing means.
  • the second portion F222 of the connection terminal F22 is directly connected to the terminal portion 322 of the output terminal 32A and the terminal portion 312 of the input terminal 31A by the welding portion 374.
  • weld 374 includes weld 374a and weld 374b. The welded portion 374a fixes the terminal portion 322 and the second portion F222.
  • the welded portion 374b fixes the terminal portion 312 and the second portion F222.
  • the specific form of the welded portion 374 is not limited at all.
  • the terminal portion 322, the terminal portion 312, and the second portion F222 may be collectively fixed by one welding portion 374 in a state where they are all overlapped.
  • the output terminal 32A of the second semiconductor module A22 (semiconductor device B22) and the input terminal H11 of the transformer module H are directly connected by the welded portion 375 which is a fixing means. There is.
  • the welding type of the welded portion 375 is not limited at all.
  • the output terminal 32B of the second semiconductor module A22 (semiconductor device B22) and the input terminal H12 of the transformer module H are directly connected by the welded portion 376 which is a fixing means.
  • the welding type of the welded portion 376 is not limited at all.
  • the responsiveness can be further enhanced as in the AC/DC converter unit C1.
  • the fixing mode contributes to the reduction of the inductance, it is not limited to the fastening means and the welding portion, and various fixing means can be used.
  • FIG. 43 shows a first modification of the AC/DC converter unit C2.
  • the AC/DC converter unit C21 of the present modification is different from the AC/DC converter unit C2 described above in the arrangement of the first semiconductor module A21, the second semiconductor module A22, the capacitor module F, and the insulated power supply module G.
  • the capacitor module F is arranged between the insulated power supply module G and the first semiconductor module A21 and the second semiconductor module A22 in the x direction.
  • the semiconductor device B23 is arranged at a position different from the semiconductor device B21 and the semiconductor device B22 in the x direction. According to this modified example, the responsiveness can be further enhanced as in the AC/DC converter unit C2.
  • FIG. 44 shows a second modification of the AC/DC converter unit C2.
  • the AC/DC converter unit C22 of this modification is different from the above-described AC/DC converter unit C2 in the arrangement of the semiconductor device B23.
  • the semiconductor device B23 is arranged at a position different from the semiconductor device B21 and the semiconductor device B22 in the x direction, and is arranged so as to be deviated from the center of the output module E in the x direction. According to this modified example, the responsiveness can be further enhanced as in the AC/DC converter unit C2.
  • FIG. 45 to 47 show a semiconductor module according to the third embodiment of the present disclosure.
  • the semiconductor module A3 of the present embodiment is different from the above-described embodiments mainly in the configuration of the input/output terminal 3A and the control terminal 3B and the specific configuration of the first substrate 7.
  • the semiconductor module A3 includes a semiconductor device B3.
  • the semiconductor device B3 has, for example, the same function as that of the above-described semiconductor device B1.
  • the semiconductor device B3 has a plurality of input/output terminals 3A and a plurality of control terminals 3B.
  • the plurality of input/output terminals 3A correspond to, for example, the above-mentioned input terminal 31A, input terminal 31B, output terminal 32A, and output terminal 32B.
  • the plurality of control terminals 3B correspond to, for example, the gate terminal 33 and the detection terminal 34 described above.
  • the plurality of input/output terminals 3A include one that projects from the sealing resin 60 to one side in the x direction and one that projects to the other side in the x direction. That is, the plurality of input/output terminals 3A project from the sealing resin 60 on both sides in the x direction. Further, the input/output terminal 3A of the present embodiment has a flat plate shape or a strip plate shape having a thickness direction in the z direction.
  • the plurality of control terminals 3B protrude from the sealing resin 60 to one side in the y direction.
  • the plurality of control terminals 3B are connected to the first substrate 7 by the first connector 8.
  • a plurality of convex portions 66 are formed on the sealing resin 60.
  • the plurality of protrusions 66 contact the first substrate back surface 72 of the first substrate 7 to define the positional relationship between the first substrate 7 and the sealing resin 60 (semiconductor device B3) in the z direction. ..
  • the number of the plurality of convex portions 66 is not limited at all, and in the illustrated example, four convex portions 66 are arranged at the four corners of the sealing resin 60.
  • the first substrate 7 of this embodiment has a first region L1, a second region L2, and a third region L3.
  • the first region L1, the second region L2, and the third region L3 are portions of the wiring pattern formed on the first substrate 7 that are separated from each other.
  • the plurality of electronic components 700 include an electronic component 722 and an electronic component 723.
  • the electronic component 722 is mounted across the first region L1 and the second region L2.
  • the electronic component 723 is mounted across the first region L1 and the third region L3.
  • the electronic component 722 and the electronic component 723 are, for example, dedicated control ICs for controlling the switching elements.
  • a connector 721 is mounted on the first board 7.
  • the connector 721 is for connecting the semiconductor module A3 and an external circuit.
  • the present embodiment it is possible to facilitate terminal connection and ensure more reliable conduction. Further, since the plurality of input/output terminals 3A project on both sides in the x direction, it is suitable to use the plurality of semiconductor modules A3 arranged in the y direction.
  • FIG. 48 to 50 show modifications of the semiconductor module A3.
  • the semiconductor module A31 of the present modification mainly differs from the above-described embodiment in the configuration of the input/output terminal 3A.
  • the plurality of control terminals 3B are projected from the sealing resin 60 to one side in the y direction, and the plurality of input/output terminals 3A are projected from the sealing resin 60 to the other side in the y direction.
  • the plurality of input/output terminals 3A are arranged in two rows in the x direction.
  • Electronic components 724 and 725 are mounted on the first substrate 7.
  • the electronic component 724 is mounted together with the electronic component 722 across the first region L1 and the second region L2.
  • the electronic component 725 is mounted over the first region L1 and the third region L3 together with the electronic component 723.
  • the electronic component 724 and the electronic component 725 are, for example, insulating transformers that perform transformation and insulate the input side and the output side.
  • the plurality of input/output terminals 3A collectively project on the other side in the y direction. Accordingly, when the plurality of semiconductor modules A3 are arranged in the x direction, all the input/output terminals 3A project to the other side in the y direction. This has the advantage that when connecting to the plurality of input/output terminals 3A of the plurality of semiconductor modules A31 from the outside, it is only necessary to connect from the other side in the y direction.
  • the semiconductor module and the AC/DC converter unit according to the present disclosure are not limited to the above embodiments.
  • the specific configurations of the respective portions of the semiconductor module and the AC/DC converter unit according to the present disclosure can be changed in design in various ways.
  • a semiconductor device having a plurality of semiconductor elements, a plurality of input/output terminals, a plurality of control terminals, and a sealing resin covering the plurality of semiconductor elements; A first substrate, A first connector fixed to the first substrate and connected to the control terminal; The semiconductor module, wherein the first connector allows relative movement of the control terminal in at least one of a first direction and a second direction which are perpendicular to a thickness direction of the first substrate and are parallel to each other.
  • the control terminal has a standing portion extending in the thickness direction, The semiconductor module according to appendix 1, wherein the first connector has an insertion hole through which the upright portion is inserted.
  • the control terminal has a base portion protruding from the sealing resin in the second direction, The semiconductor module according to appendix 2, wherein the upright portion is connected to a tip of the base portion.
  • [Appendix 4] 4.
  • [Appendix 5] 5.
  • the semiconductor module according to appendix 4, wherein the plurality of control terminals are arranged separately in the second direction with the sealing resin interposed therebetween.
  • the semiconductor module according to appendix 6] The semiconductor module according to appendix 4 or 5, wherein the plurality of input/output terminals are arranged outside the plurality of control terminals in the first direction.
  • the semiconductor module according to appendix 4 wherein the plurality of input/output terminals are arranged separately in the second direction with the sealing resin interposed therebetween.
  • Appendix 8 8. The semiconductor module according to any one of appendices 2 to 7, wherein the first substrate has an input/output penetrating portion through which the input/output terminal is inserted.
  • Appendix 9 The first substrate has a first substrate main surface and a first substrate rear surface facing opposite sides in the thickness direction, 9.
  • Appendix 15 15.
  • Appendix 16 16.
  • the sealing resin has a through hole for inserting a bolt in the thickness direction, 17.
  • the output terminals included in the plurality of input/output terminals of the first semiconductor device of the first semiconductor module and the input terminals included in the plurality of input/output terminals of the second semiconductor device of the second semiconductor module are: 1. AC/DC converter unit directly connected by fixing means. [Appendix 19] 19.
  • the input module has an output terminal, 23.
  • the AC/DC converter unit according to appendix 22, wherein the output terminal of the input module and the input terminal of the first semiconductor module are directly connected by second fixing means.
  • [Appendix 27] 27 27.
  • the AC/DC converter unit according to appendix 26, wherein the capacitor module is directly connected to the output terminal of the first semiconductor module and the input terminal of the second semiconductor module by the first fixing means.
  • the AC/DC converter unit according to appendix 26 or 27, comprising a transformer module interposed between the second semiconductor module and the output module.
  • the transformer module has an input terminal and an output terminal, 29.
  • the AC/DC converter unit according to appendix 28, wherein the output terminal of the second semiconductor module and the input terminal of the transformer module are directly connected by third fixing means.
  • the AC/DC converter unit according to attachment 29, wherein the third fixing means is a fastening member.
  • the AC/DC converter unit according to appendix 29, wherein the third fixing means is a welded portion.
  • the output module includes a third semiconductor device having an input terminal and an output terminal, 32.
  • the AC/DC converter unit according to appendix 31 wherein the output terminal of the transformer module and the input terminal of the third semiconductor device are directly connected by a fourth fixing means.
  • the output module has an output board, 34.
  • the AC/DC converter unit according to appendix 32 or 33, wherein the output terminal of the third semiconductor device is directly connected to the output substrate by fifth fixing means.

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Abstract

This semiconductor module A1 comprises: a semiconductor device B1 including a plurality of semiconductor elements 40, a plurality of input/output terminals 3A, a plurality of control terminals 3B, and a sealing resin 60 that covers the plurality of semiconductor elements 40; a first substrate 7; and a first connector 8 fixed to the first substrate 7 and connected to the control terminal 3B. The first connector 8 allows relative movement of the control terminal 3B in at least one among an x direction and a y direction which are perpendicular to a z direction that is the thickness direction of the first substrate 7 and which are parallel to each other. With such a configuration, the terminal connection can be facilitated and more reliable conduction can be achieved.

Description

半導体モジュールおよびＡＣ／ＤＣコンバータユニットSemiconductor module and AC/DC converter unit
　本開示は、半導体モジュールおよびＡＣ／ＤＣコンバータユニットに関する。 The present disclosure relates to a semiconductor module and an AC/DC converter unit.
　特許文献１には、スイッチング機能を有する半導体素子を有する半導体装置を備えた半導体モジュールが開示されている。半導体素子としては、たとえばＩＧＢＴチップが採用される。このような半導体装置は、スイッチング制御の対象である電流を入出力する入出力端子と、制御信号が入力される制御端子とを有する。 Patent Document 1 discloses a semiconductor module including a semiconductor device having a semiconductor element having a switching function. As the semiconductor element, for example, an IGBT chip is adopted. Such a semiconductor device has an input/output terminal for inputting/outputting a current which is an object of switching control, and a control terminal for inputting a control signal.
特開２０００－２９９４１９号公報Japanese Patent Laid-Open No. 2000-299419
　半導体モジュールを構成する基板等と、入出力端子や制御端子との接続は、半導体モジュールの特性や製造効率に影響を及ぼす。 -The connection between the input/output terminals and control terminals of the boards that make up the semiconductor module will affect the characteristics and manufacturing efficiency of the semiconductor module.
　本開示は、上記した事情のもとで考え出されたものであって、端子接続の容易化とより確実な導通とを図ることが可能な半導体モジュールおよびＡＣ／ＤＣコンバータユニットを提供することをその課題とする。 The present disclosure has been devised under the circumstances described above, and provides a semiconductor module and an AC/DC converter unit capable of facilitating terminal connection and more reliable conduction. Let's take that issue.
　本開示の第１の側面によって提供される半導体モジュールは、複数の半導体素子、複数の入出力端子、複数の制御端子および前記複数の半導体素子を覆う封止樹脂を有する半導体装置と、第１基板と、前記第１基板に固定され且つ前記制御端子と接続する第１コネクタとを備え、前記第１コネクタは、前記第１基板の厚さ方向と直角であって互いに平行である第１方向および第２方向の少なくともいずれかにおいて前記制御端子が相対動することを許容する。 A semiconductor module provided by the first aspect of the present disclosure is a semiconductor device having a plurality of semiconductor elements, a plurality of input/output terminals, a plurality of control terminals, and a sealing resin covering the plurality of semiconductor elements, and a first substrate. And a first connector fixed to the first substrate and connected to the control terminal, the first connector being perpendicular to a thickness direction of the first substrate and parallel to each other. The relative movement of the control terminal is permitted in at least one of the second directions.
　本開示の第２の側面によって提供されるＡＣ／ＤＣコンバータユニットは、交流電力が入力される入力モジュールと、本開示の第１の側面によって提供される半導体モジュールからなり、前記入力モジュールから出力された交流電流が入力され、且つ直流電流を出力する第１半導体モジュールと、本開示の第１の側面によって提供される半導体モジュールからなり、前記第１半導体モジュールから出力された直流電力が入力され、且つ直流電力を出力する第２半導体モジュールと、前記第２半導体モジュールから出力された直流電力が入力され、且つ直流電力を出力する出力モジュールと、を備え、前記第１半導体モジュールの第１半導体装置の前記複数の入出力端子に含まれる出力端子と、前記第２半導体モジュールの第２半導体装置の前記複数の入出力端子に含まれる入力端子とは、第１固定手段によって直接接続されている。 An AC/DC converter unit provided by the second aspect of the present disclosure includes an input module to which AC power is input and a semiconductor module provided by the first aspect of the present disclosure, and outputs from the input module. A first semiconductor module that receives an alternating current and outputs a direct current, and a semiconductor module provided by the first aspect of the present disclosure, and the direct current power output from the first semiconductor module is input. And a second semiconductor module that outputs DC power, and an output module that receives the DC power output from the second semiconductor module and outputs DC power, the first semiconductor device of the first semiconductor module The output terminals included in the plurality of input/output terminals and the input terminals included in the plurality of input/output terminals of the second semiconductor device of the second semiconductor module are directly connected by the first fixing means.
　本開示の半導体モジュールによれば、端子接続の容易化とより確実な導通とを図ることができる。 According to the semiconductor module of the present disclosure, easy terminal connection and more reliable conduction can be achieved.
　本開示のその他の特徴および利点は、添付図面を参照して以下に行う詳細な説明によって、より明らかとなろう。 Other features and advantages of the present disclosure will be more apparent from the detailed description given below with reference to the accompanying drawings.
本開示の第１実施形態に係る半導体モジュールを示す分解斜視図である。1 is an exploded perspective view showing a semiconductor module according to a first embodiment of the present disclosure. 本開示の第１実施形態に係る半導体モジュールを示す斜視図である。1 is a perspective view showing a semiconductor module according to a first embodiment of the present disclosure. 本開示の第１実施形態に係る半導体モジュールを示す斜視図である。1 is a perspective view showing a semiconductor module according to a first embodiment of the present disclosure. 本開示の第１実施形態に係る半導体モジュールを示す平面図である。It is a top view showing a semiconductor module concerning a 1st embodiment of this indication. 本開示の第１実施形態に係る半導体モジュールを示す底面図である。FIG. 3 is a bottom view showing the semiconductor module according to the first embodiment of the present disclosure. 本開示の第１実施形態に係る半導体モジュールを示す正面図である。FIG. 3 is a front view showing the semiconductor module according to the first embodiment of the present disclosure. 本開示の第１実施形態に係る半導体モジュールを示す側面図である。1 is a side view showing a semiconductor module according to a first embodiment of the present disclosure. 図４のＶＩＩＩ－ＶＩＩＩ線に沿う断面図である。It is sectional drawing which follows the VIII-VIII line of FIG. 図４のＩＸ－ＩＸ線に沿う断面図である。FIG. 5 is a sectional view taken along line IX-IX in FIG. 4. 図４のＸ－Ｘ線に沿う断面図である。FIG. 5 is a sectional view taken along line XX of FIG. 4. 本開示の第１実施形態に係る半導体モジュールの半導体装置を示す平面図である。FIG. 3 is a plan view showing a semiconductor device of the semiconductor module according to the first embodiment of the present disclosure. 図１１のＸＩＩ－ＸＩＩ線に沿う断面図である。It is sectional drawing which follows the XII-XII line of FIG. 図１１のＸＩＩＩ－ＸＩＩＩ線に沿う断面図である。It is sectional drawing which follows the XIII-XIII line of FIG. 本開示の第１実施形態に係る半導体モジュールの半導体装置を示す要部拡大平面図である。FIG. 3 is an enlarged plan view of a main portion showing the semiconductor device of the semiconductor module according to the first embodiment of the present disclosure. 図１４のＸＶ－ＸＶ線に沿う要部拡大断面図である。FIG. 15 is an enlarged sectional view of an essential part taken along line XV-XV in FIG. 14. 本開示の第１実施形態に係る半導体モジュールの半導体装置を示す回路図である。FIG. 1 is a circuit diagram showing a semiconductor device of a semiconductor module according to a first embodiment of the present disclosure. 本開示の第１実施形態に係る半導体モジュールの変形例を示す断面図である。FIG. 8 is a cross-sectional view showing a modified example of the semiconductor module according to the first embodiment of the present disclosure. 半導体装置の変形例を示す平面図である。It is a top view which shows the modification of a semiconductor device. 本開示の第１実施形態に係るＡＣ／ＤＣコンバータユニットを示すブロック図である。FIG. 3 is a block diagram showing an AC/DC converter unit according to the first embodiment of the present disclosure. 本開示の第１実施形態に係るＡＣ／ＤＣコンバータユニットを示す平面図である。FIG. 3 is a plan view showing an AC/DC converter unit according to the first embodiment of the present disclosure. 本開示の第１実施形態に係るＡＣ／ＤＣコンバータユニットを示す要部平面図である。FIG. 3 is a main part plan view showing the AC/DC converter unit according to the first embodiment of the present disclosure. 本開示の第１実施形態に係るＡＣ／ＤＣコンバータユニットの半導体モジュールを示す正面図である。1 is a front view showing a semiconductor module of an AC/DC converter unit according to a first embodiment of the present disclosure. 図２１のＸＸＩＩＩ－ＸＸＩＩＩ線に沿う要部断面図である。FIG. 22 is a cross-sectional view of main parts taken along the line XXIII-XXIII in FIG. 21. 図２１のＸＸＩＶ－ＸＸＩＶ線に沿う要部断面図である。FIG. 22 is a cross-sectional view of main parts taken along the line XXIV-XXIV of FIG. 21. 図２１のＸＸＶ－ＸＸＶ線に沿う要部断面図である。FIG. 22 is a cross-sectional view of main parts taken along the line XXV-XXV of FIG. 21. 図２１のＸＸＶＩ－ＸＸＶＩ線に沿う要部断面図である。FIG. 22 is a cross-sectional view of main parts taken along the line XXVI-XXVI of FIG. 21. 図２０のＸＸＶＩＩ－ＸＸＶＩＩ線に沿う断面図である。FIG. 21 is a cross-sectional view taken along the line XXVII-XXVII in FIG. 20. 図２０のＸＸＶＩＩＩ－ＸＸＶＩＩＩ線に沿う断面図である。FIG. 21 is a cross-sectional view taken along the line XXVIII-XXVIII in FIG. 20. 本開示の第１実施形態に係るＡＣ／ＤＣコンバータユニットの第１変形例を示す平面図である。FIG. 8 is a plan view showing a first modified example of the AC/DC converter unit according to the first embodiment of the present disclosure. 本開示の第１実施形態に係るＡＣ／ＤＣコンバータユニットの第２変形例を示す平面図である。FIG. 8 is a plan view showing a second modified example of the AC/DC converter unit according to the first embodiment of the present disclosure. 本開示の第１実施形態に係るＡＣ／ＤＣコンバータユニットの第３変形例を示す平面図である。FIG. 8 is a plan view showing a third modified example of the AC/DC converter unit according to the first embodiment of the present disclosure. 本開示の第１実施形態に係るＡＣ／ＤＣコンバータユニットの第３変形例の第３半導体装置の入力端子を示す要部断面図である。FIG. 9 is a main-portion cross-sectional view showing an input terminal of a third semiconductor device of a third modification example of the AC/DC converter unit according to the first embodiment of the present disclosure. 本開示の第１実施形態に係るＡＣ／ＤＣコンバータユニットの第３変形例の第３半導体装置の出力端子を示す要部断面図である。FIG. 10 is a main-portion cross-sectional view showing an output terminal of a third semiconductor device of a third modification example of the AC/DC converter unit according to the first embodiment of the present disclosure. 本開示の第１実施形態に係るＡＣ／ＤＣコンバータユニットの第４変形例を示す平面図である。FIG. 8 is a plan view showing a fourth modified example of the AC/DC converter unit according to the first embodiment of the present disclosure. 本開示の第１実施形態に係るＡＣ／ＤＣコンバータユニットの第５変形例を示す平面図である。FIG. 11 is a plan view showing a fifth modified example of the AC/DC converter unit according to the first embodiment of the present disclosure. 本開示の第２実施形態に係るＡＣ／ＤＣコンバータユニットを示す平面図である。FIG. 6 is a plan view showing an AC/DC converter unit according to a second embodiment of the present disclosure. 本開示の第２実施形態に係るＡＣ／ＤＣコンバータユニットを示す要部平面図である。FIG. 4 is a plan view of a main part showing an AC/DC converter unit according to a second embodiment of the present disclosure. 図３７のＸＸＸＶＩＩＩ－ＸＸＸＶＩＩＩ線に沿う断面図である。It is sectional drawing which follows the XXXVIII-XXXVIII line of FIG. 図３７のＸＸＸＩＸ－ＸＸＸＩＸ線に沿う断面図である。It is sectional drawing which follows the XXXIX-XXXIX line of FIG. 図３７のＸＬ－ＸＬ線に沿う断面図である。It is sectional drawing which follows the XL-XL line of FIG. 図３７のＸＬＩ－ＸＬＩ線に沿う断面図である。It is sectional drawing which follows the XLI-XLI line of FIG. 図３７のＸＬＩＩ－ＸＬＩＩ線に沿う断面図である。It is sectional drawing which follows the XLII-XLII line of FIG. 本開示の第２実施形態に係るＡＣ／ＤＣコンバータユニットの第１変形例を示す平面図である。FIG. 11 is a plan view showing a first modified example of the AC/DC converter unit according to the second embodiment of the present disclosure. 本開示の第２実施形態に係るＡＣ／ＤＣコンバータユニットの第２変形例を示す平面図である。FIG. 11 is a plan view showing a second modified example of the AC/DC converter unit according to the second embodiment of the present disclosure. 本開示の第３実施形態に係る半導体モジュールを示す斜視図である。It is a perspective view showing a semiconductor module concerning a 3rd embodiment of this indication. 本開示の第３実施形態に係る半導体モジュールを示す平面図である。It is a top view showing a semiconductor module concerning a 3rd embodiment of this indication. 本開示の第３実施形態に係る半導体モジュールを示す正面図である。It is a front view showing a semiconductor module concerning a 3rd embodiment of this indication. 本開示の第３実施形態に係る半導体モジュールの変形例を示す斜視図である。It is a perspective view showing a modification of a semiconductor module concerning a 3rd embodiment of this indication. 本開示の第３実施形態に係る半導体モジュールの変形例を示す平面図である。It is a top view showing a modification of a semiconductor module concerning a 3rd embodiment of this indication. 本開示の第３実施形態に係る半導体モジュールの変形例を示す正面図である。It is a front view showing a modification of a semiconductor module concerning a 3rd embodiment of this indication.
　以下、本開示の好ましい実施の形態につき、図面を参照して具体的に説明する。 Hereinafter, preferred embodiments of the present disclosure will be specifically described with reference to the drawings.
　本開示における「第１」、「第２」、「第３」等の用語は、単にラベルとして用いたものであり、必ずしもそれらの対象物に順列を付することを意図していない。 The terms “first”, “second”, “third” and the like in the present disclosure are merely used as labels, and do not necessarily mean that those objects are permuted.
〔第１実施形態　半導体モジュールＡ１〕
　図１～図１６は、本開示の第１実施形態に係る半導体モジュールを示している。本実施形態の半導体モジュールＡ１は、半導体装置Ｂ１、第１基板７、複数の電子部品７００、複数の接続端子７６および複数の第１コネクタ８を備えている。 [First Embodiment Semiconductor Module A1]
1 to 16 show a semiconductor module according to the first embodiment of the present disclosure. The semiconductor module A1 of this embodiment includes a semiconductor device B1, a first substrate 7, a plurality of electronic components 700, a plurality of connection terminals 76, and a plurality of first connectors 8.
　図１は、半導体モジュールＡ１を示す分解斜視図である。図２は、半導体モジュールＡ１を示す斜視図である。図３は、半導体モジュールＡ１を示す斜視図である。図４は、半導体モジュールＡ１を示す平面図である。図５は、半導体モジュールＡ１を示す底面図である。図６は、半導体モジュールＡ１を示す正面図である。図７は、半導体モジュールＡ１を示す側面図である。図８は、図４のＶＩＩＩ－ＶＩＩＩ線に沿う断面図である。図９は、図４のＩＸ－ＩＸ線に沿う断面図である。図１０は、図４のＸ－Ｘ線に沿う断面図である。図１１は、半導体モジュールＡ１の半導体装置Ｂ１を示す平面図である。図１２は、図１１のＸＩＩ－ＸＩＩ線に沿う断面図である。図１３は、図１１のＸＩＩＩ－ＸＩＩＩ線に沿う断面図である。図１４は、半導体モジュールＡ１の半導体装置Ｂ１を示す要部拡大平面図である。図１５は、図１４のＸＶ－ＸＶ線に沿う要部拡大断面図である。図１６は、半導体モジュールＡ１の半導体装置Ｂ１を示す回路図である。 1 is an exploded perspective view showing the semiconductor module A1. FIG. 2 is a perspective view showing the semiconductor module A1. FIG. 3 is a perspective view showing the semiconductor module A1. FIG. 4 is a plan view showing the semiconductor module A1. FIG. 5 is a bottom view showing the semiconductor module A1. FIG. 6 is a front view showing the semiconductor module A1. FIG. 7 is a side view showing the semiconductor module A1. FIG. 8 is a sectional view taken along the line VIII-VIII of FIG. FIG. 9 is a sectional view taken along the line IX-IX in FIG. FIG. 10 is a sectional view taken along line XX of FIG. FIG. 11 is a plan view showing the semiconductor device B1 of the semiconductor module A1. FIG. 12 is a sectional view taken along the line XII-XII in FIG. FIG. 13 is a sectional view taken along line XIII-XIII in FIG. FIG. 14 is an enlarged plan view of an essential part showing the semiconductor device B1 of the semiconductor module A1. FIG. 15 is an enlarged cross-sectional view of the main part taken along the line XV-XV in FIG. FIG. 16 is a circuit diagram showing the semiconductor device B1 of the semiconductor module A1.
＜半導体装置Ｂ１＞
　以下、半導体モジュールＡ１を構成する半導体装置Ｂ１について説明する。図１１に示す半導体装置Ｂ１は、ＭＯＳＦＥＴなどの複数のスイッチング素子を搭載した電力変換装置である。半導体装置Ｂ１は、モータなどの駆動源や、様々な電気製品のインバータ装置に用いられる。半導体装置Ｂ１は、基材１０、導電部材２０、補助導電部材２１、複数の入出力端子３Ａ、複数の制御端子３Ｂ、複数の半導体素子４０、および封止樹脂６０を備える。複数の半導体素子４０は、第１スイッチング素子４０Ａおよび第２スイッチング素子４０Ｂを含む。 <Semiconductor device B1>
The semiconductor device B1 that constitutes the semiconductor module A1 will be described below. A semiconductor device B1 shown in FIG. 11 is a power conversion device equipped with a plurality of switching elements such as MOSFETs. The semiconductor device B1 is used as a drive source such as a motor and an inverter device for various electric products. The semiconductor device B1 includes a base material 10, a conductive member 20, an auxiliary conductive member 21, a plurality of input/output terminals 3A, a plurality of control terminals 3B, a plurality of semiconductor elements 40, and a sealing resin 60. The plurality of semiconductor elements 40 include a first switching element 40A and a second switching element 40B.
　本実施形態の説明においては、便宜上、後述の第１基板７の厚さ方向を「ｚ方向」と呼ぶ。本実施形態の説明においては、基材１０の厚さ方向がｚ方向と一致する。ｚ方向に対して直角の方向であるｘ方向は、第１方向に相当する。ｘ方向およびｚ方向に対して直角の方向であるｙ方向は、第２方向に相当する。半導体装置Ｂ１は、ｚ方向から視て、すなわち平面視において矩形状である。ｙ方向は、半導体装置Ｂ１の短手方向に対応する。ｘ方向は、半導体装置Ｂ１の長手方向に対応する。また、半導体装置Ｂ１の説明においては、便宜上、ｙ方向のうち一対の入力端子３１が位置する側を「ｙ方向の一方側」と呼ぶ。ｙ方向のうち一対の出力端子３２が位置する側を「ｙ方向の他方側」と呼ぶ。 In the description of this embodiment, the thickness direction of the first substrate 7 described later is referred to as “z direction” for convenience. In the description of this embodiment, the thickness direction of the base material 10 coincides with the z direction. The x direction, which is a direction perpendicular to the z direction, corresponds to the first direction. The y direction, which is a direction perpendicular to the x direction and the z direction, corresponds to the second direction. The semiconductor device B1 has a rectangular shape when viewed from the z direction, that is, in a plan view. The y direction corresponds to the lateral direction of the semiconductor device B1. The x direction corresponds to the longitudinal direction of the semiconductor device B1. Further, in the description of the semiconductor device B1, for convenience, the side in which the pair of input terminals 31 is located in the y direction is referred to as “one side in the y direction”. The side where the pair of output terminals 32 are located in the y direction is referred to as "the other side in the y direction".
　基材１０は、図１１、図１２および図１３に示すように、導電部材２０が配置されている。基材１０は、導電部材２０および複数の半導体素子４０の支持部材をなす。基材１０は、電気絶縁性を有する。基材１０の構成材料は、熱伝導性に優れたセラミックスである。このようなセラミックスとして、たとえば窒化アルミニウム（ＡｌＮ）が挙げられる。基材１０は、第１主面１１Ａおよび第１裏面１２Ａを有する。第１主面１１Ａおよび第１裏面１２Ａは、ｚ方向において互いに反対側を向く。第１主面１１Ａは、ｚ方向のうち導電部材２０が配置される側を向く。第１主面１１Ａは、導電部材２０および複数の半導体素子４０とともに封止樹脂６０に覆われている。図５に示すように、第１裏面１２Ａは、封止樹脂６０の樹脂裏面６２から露出している。 As shown in FIGS. 11, 12, and 13, the base material 10 has conductive members 20 arranged thereon. The base material 10 serves as a support member for the conductive member 20 and the plurality of semiconductor elements 40. The base material 10 has electrical insulation. The constituent material of the base material 10 is ceramics having excellent thermal conductivity. Examples of such ceramics include aluminum nitride (AlN). The base material 10 has a first main surface 11A and a first back surface 12A. The first main surface 11A and the first rear surface 12A face opposite sides in the z direction. 11 A of 1st main surfaces face the side in which the electroconductive member 20 is arrange|positioned among z directions. The first main surface 11A is covered with the sealing resin 60 together with the conductive member 20 and the plurality of semiconductor elements 40. As shown in FIG. 5, the first back surface 12A is exposed from the resin back surface 62 of the sealing resin 60.
　導電部材２０は、図１１、図１２および図１３に示すように、基材１０の第１主面１１Ａに配置されている。導電部材２０は、補助導電部材２１、一対の入力端子３１および一対の出力端子３２とともに、複数の半導体素子４０と、半導体装置Ｂ１に実装される配線基板との導電経路を構成している。導電部材２０は、金属板である。当該金属板の構成材料は、銅（Ｃｕ）または銅合金である。導電部材２０は、たとえば銀（Ａｇ）ペーストのような接合材（図示略）により第１主面１１Ａに接合されている。導電部材２０の表面には、たとえば銀めっきを施してもよい。なお、導電部材２０は、金属板に替えて、銅箔などの金属箔でもよい。 The conductive member 20 is arranged on the first main surface 11A of the base material 10, as shown in FIGS. 11, 12, and 13. The conductive member 20, together with the auxiliary conductive member 21, the pair of input terminals 31, and the pair of output terminals 32, forms a conductive path between the plurality of semiconductor elements 40 and the wiring board mounted on the semiconductor device B1. The conductive member 20 is a metal plate. The constituent material of the metal plate is copper (Cu) or a copper alloy. The conductive member 20 is bonded to the first main surface 11A with a bonding material (not shown) such as silver (Ag) paste. The surface of the conductive member 20 may be plated with silver, for example. The conductive member 20 may be a metal foil such as a copper foil instead of the metal plate.
　図１１に示すように、半導体装置Ｂ１が示す例においては、導電部材２０は、第１導電部２０Ａおよび一対の第２導電部２０Ｂを含む。なお、導電部材２０の構成は本実施形態に限定されず、半導体装置Ｂ１に要求される性能に応じて設定された複数の半導体素子４０の個数に基づき、自在に設定可能である。 As shown in FIG. 11, in the example shown by the semiconductor device B1, the conductive member 20 includes a first conductive portion 20A and a pair of second conductive portions 20B. The configuration of the conductive member 20 is not limited to this embodiment, and can be freely set based on the number of the plurality of semiconductor elements 40 set according to the performance required for the semiconductor device B1.
　図１１に示すように第１導電部２０Ａは、第１主面１１Ａにおいてｙ方向の一方側に位置する。ｚ方向から視て、一対の第１導電部２０Ａは矩形状である。第１導電部２０Ａの表面には、一対の第１スイッチング素子４０Ａが電気的に接合されている。 As shown in FIG. 11, the first conductive portion 20A is located on one side in the y direction on the first major surface 11A. The pair of first conductive portions 20A has a rectangular shape when viewed from the z direction. A pair of first switching elements 40A is electrically joined to the surface of the first conductive portion 20A.
　図１１に示すように、一対の第２導電部２０Ｂは、第１主面１１Ａにおいてｙ方向の他方側に位置する。第１導電部２０Ａおよび一対の第２導電部２０Ｂは、ｙ方向において互いに離間している。ｚ方向から視て、第２導電部２０Ｂは矩形状である。一対の第２導電部２０Ｂは、ｘ方向において互いに離間している。一対の第２導電部２０Ｂの各々の表面には、第２スイッチング素子４０Ｂが電気的に接合されている。 As shown in FIG. 11, the pair of second conductive portions 20B are located on the other side in the y direction on the first major surface 11A. The first conductive portion 20A and the pair of second conductive portions 20B are separated from each other in the y direction. The second conductive portion 20B has a rectangular shape when viewed from the z direction. The pair of second conductive portions 20B are separated from each other in the x direction. The second switching element 40B is electrically joined to the surface of each of the pair of second conductive portions 20B.
　一対の補助導電部材２１は、図１１および図１３に示すように、基材１０の第１主面１１Ａに配置されている。一対の補助導電部材２１は、第１主面１１Ａにおいてｙ方向の一方側に、かつｘ方向において第１導電部２０Ａを挟んで離間配置されている。ｚ方向から視て、補助導電部材２１は矩形状である。補助導電部材２１は、金属板である。補助導電部材２１の構成材料は、導電部材２０の構成材料と同一である。補助導電部材２１は、たとえば銀（Ａｇ）ペーストのような接合材（図示略）により第１主面１１Ａに接合されている。補助導電部材２１の表面には、たとえば銀めっきを施してもよい。なお、補助導電部材２１は、金属板に替えて、銅箔などの金属箔でもよい。 The pair of auxiliary conductive members 21 are arranged on the first main surface 11A of the base material 10, as shown in FIGS. 11 and 13. The pair of auxiliary conductive members 21 are arranged on the one side of the first principal surface 11A in the y direction and in the x direction with the first conductive portion 20A interposed therebetween. The auxiliary conductive member 21 has a rectangular shape when viewed from the z direction. The auxiliary conductive member 21 is a metal plate. The constituent material of the auxiliary conductive member 21 is the same as the constituent material of the conductive member 20. The auxiliary conductive member 21 is bonded to the first main surface 11A with a bonding material (not shown) such as silver (Ag) paste. The surface of the auxiliary conductive member 21 may be plated with silver, for example. The auxiliary conductive member 21 may be a metal foil such as a copper foil instead of the metal plate.
　図１１および図１３に示すように、半導体装置Ｂ１は、連結導電部材２９をさらに備える。連結導電部材２９は、ｘ方向に沿って、かつ第１導電部２０Ａを跨いだ状態で一対の補助導電部材２１の表面に接続されている。これにより、一対の補助導電部材２１は、連結導電部材２９を介して相互に導通している。連結導電部材２９は、複数のワイヤから構成される。当該ワイヤの構成材料は、たとえばアルミニウム（Ａｌ）である。なお、連結導電部材２９は、複数のワイヤに替えて、銅などから構成され、かつｚ方向から視てｘ方向に延びる金属片でもよい。 As shown in FIGS. 11 and 13, the semiconductor device B1 further includes a connecting conductive member 29. The connecting conductive member 29 is connected to the surfaces of the pair of auxiliary conductive members 21 along the x direction and across the first conductive portion 20A. As a result, the pair of auxiliary conductive members 21 are electrically connected to each other via the connecting conductive member 29. The connecting conductive member 29 is composed of a plurality of wires. The constituent material of the wire is, for example, aluminum (Al). The connecting conductive member 29 may be a metal piece made of copper or the like and extending in the x direction when viewed from the z direction, instead of the plurality of wires.
　複数の入出力端子３Ａは、一対の入力端子３１および一対の出力端子３２を含む。複数の入出力端子３Ａは、半導体装置Ｂ１のスイッチングの対象である主電流が入出力される端子である。一対の入力端子３１は、図１１に示すように、半導体装置Ｂ１においてｙ方向の一方側に位置する。一対の入力端子３１は、ｘ方向において互いに離間している。一対の入力端子３１には、外部からの直流電源が供給される。半導体装置Ｂ１においては、一対の入力端子３１は、一対の出力端子３２、複数の制御端子３Ｂとともに、同一のリードフレームから構成される。当該リードフレームの構成材料は、銅または銅合金である。一対の入力端子３１は、入力端子３１Ａおよび入力端子３１Ｂを含む。入力端子３１Ａおよび入力端子３１Ｂの各々は、パッド部３１１および端子部３１２を有する。 The plurality of input/output terminals 3A include a pair of input terminals 31 and a pair of output terminals 32. The plurality of input/output terminals 3A are terminals for inputting/outputting a main current that is a target of switching of the semiconductor device B1. As shown in FIG. 11, the pair of input terminals 31 is located on one side in the y direction of the semiconductor device B1. The pair of input terminals 31 are separated from each other in the x direction. A direct current power supply from the outside is supplied to the pair of input terminals 31. In the semiconductor device B1, the pair of input terminals 31 is composed of the same lead frame together with the pair of output terminals 32 and the plurality of control terminals 3B. The constituent material of the lead frame is copper or a copper alloy. The pair of input terminals 31 includes an input terminal 31A and an input terminal 31B. Each of the input terminal 31A and the input terminal 31B has a pad portion 311 and a terminal portion 312.
　図１１に示すように、パッド部３１１は、ｚ方向から視て基材１０に対して離間しており、かつ封止樹脂６０に覆われている。これにより、一対の入力端子３１は、封止樹脂６０に支持されている。パッド部３１１の表面には、第１接続ワイヤ５１が接続されている。第１接続ワイヤ５１の構成材料は、たとえばアルミニウムである。なお、パッド部３１１の表面には、たとえば銀めっきを施してもよい。 As shown in FIG. 11, the pad portion 311 is separated from the base material 10 when viewed from the z direction, and is covered with the sealing resin 60. As a result, the pair of input terminals 31 are supported by the sealing resin 60. The first connection wire 51 is connected to the surface of the pad portion 311. The constituent material of the first connection wire 51 is, for example, aluminum. The surface of the pad portion 311 may be plated with silver, for example.
　入力端子３１Ａは、一対の入力端子３１の正極（Ｐ端子）をなしている。図１１および図１２に示すように、入力端子３１Ａのパッド部３１１の表面に接続された第１接続ワイヤ５１は、第１導電部２０Ａの表面に接続されている。これにより、入力端子３１Ａは、第１導電部２０Ａに導通している。 The input terminal 31A constitutes the positive electrode (P terminal) of the pair of input terminals 31. As shown in FIGS. 11 and 12, the first connecting wire 51 connected to the surface of the pad portion 311 of the input terminal 31A is connected to the surface of the first conductive portion 20A. As a result, the input terminal 31A is electrically connected to the first conductive portion 20A.
　入力端子３１Ｂは、一対の入力端子３１の負極（Ｎ端子）をなしている。図１１に示すように、入力端子３１Ｂのパッド部３１１の表面に接続された第１接続ワイヤ５１は、一方の補助導電部材２１の表面に接続されている。これにより、入力端子３１Ｂは、一対の補助導電部材２１に導通している。 The input terminal 31B forms the negative electrode (N terminal) of the pair of input terminals 31. As shown in FIG. 11, the first connecting wire 51 connected to the surface of the pad portion 311 of the input terminal 31B is connected to the surface of one auxiliary conductive member 21. As a result, the input terminal 31B is electrically connected to the pair of auxiliary conductive members 21.
　図１１に示すように、端子部３１２は、パッド部３１１につながり、かつ封止樹脂６０から露出している。端子部３１２は、半導体装置Ｂ１を配線基板に実装する際に用いられる。端子部３１２は、基部３１２Ａおよび起立部３１２Ｂを有する。基部３１２Ａは、パッド部３１１につながり、かつｙ方向の一方側に位置する封止樹脂６０の樹脂第１側面６３１（詳細は後述）からｙ方向に延びている。図６に示すように、起立部３１２Ｂは、基部３１２Ａのｙ方向における先端から、ｚ方向の基材１０の第１主面１１Ａが向く側に向けて延びている。これにより、図７～図１２に示すように、ｘ方向から視て、端子部３１２はＬ字状をなしている。 As shown in FIG. 11, the terminal portion 312 is connected to the pad portion 311 and is exposed from the sealing resin 60. The terminal portion 312 is used when the semiconductor device B1 is mounted on the wiring board. The terminal portion 312 has a base portion 312A and a standing portion 312B. The base portion 312A is connected to the pad portion 311 and extends in the y direction from the resin first side surface 631 (details will be described later) of the sealing resin 60 located on one side in the y direction. As shown in FIG. 6, the upright portion 312B extends from the tip in the y direction of the base portion 312A toward the side facing the first major surface 11A of the base material 10 in the z direction. As a result, as shown in FIGS. 7 to 12, the terminal portion 312 has an L shape when viewed from the x direction.
　一対の出力端子３２は、図１１に示すように、半導体装置Ｂ１においてｙ方向の他方側に位置する。一対の出力端子３２は、ｘ方向において互いに離間している。一対の出力端子３２から、複数の半導体素子４０により電力変換された交流電力（電圧）が出力される。一対の出力端子３２の各々は、パッド部３２１および端子部３２２を有する。なお、出力端子３２の本数は本実施形態に限定されず、半導体装置Ｂ１に要求される性能に応じて自在に設定可能である。 The pair of output terminals 32 are located on the other side in the y direction of the semiconductor device B1 as shown in FIG. The pair of output terminals 32 are separated from each other in the x direction. From the pair of output terminals 32, alternating-current power (voltage) converted by the plurality of semiconductor elements 40 is output. Each of the pair of output terminals 32 has a pad portion 321 and a terminal portion 322. The number of output terminals 32 is not limited to that in the present embodiment, and can be set freely according to the performance required for the semiconductor device B1.
　図１１に示すように、パッド部３２１は、ｚ方向から視て基材１０に対して離間しており、かつ封止樹脂６０に覆われている。これにより、一対の出力端子３２は、封止樹脂６０に支持されている。パッド部３２１の表面には、第２接続ワイヤ５２が接続されている。第２接続ワイヤ５２の構成材料は、たとえばアルミニウムである。なお、パッド部３２１の表面には、たとえば銀めっきを施してもよい。図１１に示すように、一対のパッド部３２１の表面に接続された複数の第２接続ワイヤ５２は、一対の第２導電部２０Ｂの表面に接続されている。これにより、一対の出力端子３２は、一対の第２導電部２０Ｂに導通している。 As shown in FIG. 11, the pad portion 321 is separated from the base material 10 when viewed from the z direction, and is covered with the sealing resin 60. As a result, the pair of output terminals 32 are supported by the sealing resin 60. The second connecting wire 52 is connected to the surface of the pad portion 321. The constituent material of the second connection wire 52 is, for example, aluminum. The surface of the pad portion 321 may be plated with silver, for example. As shown in FIG. 11, the plurality of second connection wires 52 connected to the surfaces of the pair of pad portions 321 are connected to the surfaces of the pair of second conductive portions 20B. As a result, the pair of output terminals 32 are electrically connected to the pair of second conductive portions 20B.
　図１１に示すように、端子部３２２は、パッド部３２１につながり、かつ封止樹脂６０から露出している。端子部３２２は、半導体装置Ｂ１を配線基板に実装する際に用いられる。端子部３２２は、基部３２２Ａおよび起立部３２２Ｂを有する。基部３２２Ａは、パッド部３２１につながり、かつｙ方向の他方側に位置する封止樹脂６０の樹脂第１側面６３１（詳細は後述）からｙ方向に延びている。図７～図１２に示すように、起立部３２２Ｂは、基部３２２Ａのｙ方向における先端から、ｚ方向の基材１０の第１主面１１Ａが向く側に向けて延びている。これにより、ｘ方向から視て、端子部３２２はＬ字状をなしている。なお、端子部３２２の形状は、一対の入力端子３１の端子部３１２の形状と同一である。 As shown in FIG. 11, the terminal portion 322 is connected to the pad portion 321 and exposed from the sealing resin 60. The terminal portion 322 is used when the semiconductor device B1 is mounted on the wiring board. The terminal portion 322 has a base portion 322A and a standing portion 322B. The base portion 322A is connected to the pad portion 321 and extends in the y direction from the resin first side surface 631 (details will be described later) of the sealing resin 60 located on the other side in the y direction. As shown in FIGS. 7 to 12, the standing portion 322B extends from the tip in the y direction of the base portion 322A toward the side toward the first major surface 11A of the base material 10 in the z direction. As a result, the terminal portion 322 has an L shape when viewed from the x direction. The shape of the terminal portion 322 is the same as the shape of the terminal portion 312 of the pair of input terminals 31.
　複数の半導体素子４０は、図１１および図１２に示すように、導電部材２０のうち、第１導電部２０Ａおよび一対の第２導電部２０Ｂに電気的に接合されている。複数の半導体素子４０は、ｚ方向から視て矩形状（半導体装置Ｂ１では正方形状）である。半導体装置Ｂ１が示す例においては、複数の半導体素子４０は、一対の第１スイッチング素子４０Ａおよび一対の第２スイッチング素子４０Ｂを含む。なお、複数の半導体素子４０の個数は本実施形態に限定されず、半導体装置Ｂ１に要求される性能に応じて自在に設定可能である。一対の第１スイッチング素子４０Ａおよび一対の第２スイッチング素子４０Ｂは、炭化ケイ素（ＳｉＣ）を主とする半導体材料を用いて構成されたＭＯＳＦＥＴ（Metal-Oxide-Semiconductor Field-Effect Transistor）である。なお、一対の第１スイッチング素子４０Ａおよび一対の第２スイッチング素子４０Ｂは、ＭＯＳＦＥＴに限らずＭＩＳＦＥＴ（Metal-Insulator-Semiconductor Field-Effect Transistor）を含む電界効果トランジスタや、ＩＧＢＴ（Insulated Gate Bipolar Transistor）のようなバイポーラトランジスタでもよい。さらには、複数の半導体素子４０は、スイッチング素子のみならず、ショットキーバリアダイオードのような整流素子でもよい。半導体装置Ｂ１の説明においては、複数の半導体素子４０は、一対の第１スイッチング素子４０Ａおよび一対の第２スイッチング素子４０Ｂを含み、かつこれらがｎチャンネル型のＭＯＳＦＥＴである場合を対象とする。 As shown in FIGS. 11 and 12, the plurality of semiconductor elements 40 are electrically bonded to the first conductive portion 20A and the pair of second conductive portions 20B of the conductive member 20. The plurality of semiconductor elements 40 have a rectangular shape (square shape in the semiconductor device B1) when viewed from the z direction. In the example illustrated by the semiconductor device B1, the plurality of semiconductor elements 40 include a pair of first switching elements 40A and a pair of second switching elements 40B. The number of the plurality of semiconductor elements 40 is not limited to this embodiment, and can be set freely according to the performance required for the semiconductor device B1. The pair of first switching elements 40A and the pair of second switching elements 40B are MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors) configured using a semiconductor material mainly containing silicon carbide (SiC). Note that the pair of first switching elements 40A and the pair of second switching elements 40B are not limited to MOSFETs, but include field effect transistors including MISFETs (Metal-Insulator-Semiconductor Field-Effect Transistors) and IGBTs (Insulated Gate Bipolar Transistors). Such a bipolar transistor may be used. Furthermore, the plurality of semiconductor elements 40 may be not only switching elements but also rectifying elements such as Schottky barrier diodes. In the description of the semiconductor device B1, the plurality of semiconductor elements 40 includes a pair of first switching elements 40A and a pair of second switching elements 40B, and these are n-channel MOSFETs.
　図１４および図１５に示すように、一対の第１スイッチング素子４０Ａおよび一対の第２スイッチング素子４０Ｂの各々は、素子主面４０１、素子裏面４０２、主面電極４１、裏面電極４２、ゲート電極４３および絶縁膜４４を有する。素子主面４０１および素子裏面４０２は、ｚ方向において互いに反対側を向く。このうち素子主面４０１は、基材１０の第１主面１１Ａが向く側を向く。 As shown in FIGS. 14 and 15, each of the pair of first switching elements 40A and the pair of second switching elements 40B includes an element main surface 401, an element back surface 402, a main surface electrode 41, a back surface electrode 42, and a gate electrode 43. And an insulating film 44. The element main surface 401 and the element back surface 402 face each other in the z direction. Of these, the element main surface 401 faces the side to which the first main surface 11A of the base material 10 faces.
　図１４および図１５に示すように、主面電極４１は、素子主面４０１に設けられている。主面電極４１には、ソース電流が流れる。半導体装置Ｂ１が示す例においては、主面電極４１は、４つの領域に分割されている。 As shown in FIGS. 14 and 15, the principal surface electrode 41 is provided on the element principal surface 401. A source current flows through the main surface electrode 41. In the example shown by the semiconductor device B1, the principal surface electrode 41 is divided into four regions.
　図１４に示すように、第１スイッチング素子４０Ａの主面電極４１においては、分割された４つの領域の各々に第１ワイヤ５０１が接続されている。第１ワイヤ５０１の構成材料は、たとえばアルミニウムである。一対の第１スイッチング素子４０Ａの主面電極４１に接続された複数の第１ワイヤ５０１は、一対の第２導電部２０Ｂの表面に接続されている。これにより、一対の第１スイッチング素子４０Ａの主面電極４１は、一対の第２導電部２０Ｂに個別に導通している。 As shown in FIG. 14, in the main surface electrode 41 of the first switching element 40A, the first wire 501 is connected to each of the four divided regions. The constituent material of the first wire 501 is, for example, aluminum. The plurality of first wires 501 connected to the main surface electrodes 41 of the pair of first switching elements 40A are connected to the surfaces of the pair of second conductive portions 20B. Thereby, the principal surface electrodes 41 of the pair of first switching elements 40A are individually conducted to the pair of second conductive portions 20B.
　図１４に示すように、第２スイッチング素子４０Ｂの主面電極４１においては、分割された４つの領域の各々に第２ワイヤ５０２が接続されている。第２ワイヤ５０２の構成材料は、たとえばアルミニウムである。一対の第２スイッチング素子４０Ｂの主面電極４１に接続された複数の第２ワイヤ５０２は、一対の補助導電部材２１の表面に個別に接続されている。これにより、一対の第２スイッチング素子４０Ｂの主面電極４１は、一対の補助導電部材２１に個別に導通している。したがって、入力端子３１Ｂは、補助導電部材２１を介して一対の第２スイッチング素子４０Ｂに導通している。 As shown in FIG. 14, in the main surface electrode 41 of the second switching element 40B, the second wire 502 is connected to each of the four divided regions. The constituent material of the second wire 502 is, for example, aluminum. The plurality of second wires 502 connected to the main surface electrodes 41 of the pair of second switching elements 40B are individually connected to the surfaces of the pair of auxiliary conductive members 21. Thereby, the principal surface electrodes 41 of the pair of second switching elements 40B are individually conducted to the pair of auxiliary conductive members 21. Therefore, the input terminal 31B is electrically connected to the pair of second switching elements 40B via the auxiliary conductive member 21.
　図１５に示すように、裏面電極４２は、素子裏面４０２の全体にわたって設けられている。裏面電極４２にはドレイン電流が流れる。図１５に示すように、第１スイッチング素子４０Ａの裏面電極４２は、導電性を有する導電接合層４９により第１導電部２０Ａの表面に電気的に接合されている。導電接合層４９の構成材料は、たとえば錫（Ｓｎ）を主成分とする鉛フリーはんだである。これにより、一対の第１スイッチング素子４０Ａの裏面電極４２は、一対の第１導電部２０Ａに導通している。第１スイッチング素子４０Ａの裏面電極４２と同様に、第２スイッチング素子４０Ｂの裏面電極４２は、導電接合層４９により第２導電部２０Ｂの表面に電気的に接合されている。これにより、一対の第２スイッチング素子４０Ｂの裏面電極４２は、一対の第２導電部２０Ｂに導通している。 As shown in FIG. 15, the back surface electrode 42 is provided over the entire element back surface 402. A drain current flows through the back surface electrode 42. As shown in FIG. 15, the back surface electrode 42 of the first switching element 40A is electrically bonded to the surface of the first conductive portion 20A by a conductive bonding layer 49 having conductivity. The constituent material of the conductive bonding layer 49 is, for example, lead-free solder whose main component is tin (Sn). Thereby, the back surface electrodes 42 of the pair of first switching elements 40A are electrically connected to the pair of first conductive portions 20A. Similar to the back surface electrode 42 of the first switching element 40A, the back surface electrode 42 of the second switching element 40B is electrically bonded to the surface of the second conductive portion 20B by the conductive bonding layer 49. Thereby, the back surface electrodes 42 of the pair of second switching elements 40B are electrically connected to the pair of second conductive portions 20B.
　図１４に示すように、ゲート電極４３は、素子主面４０１に設けられている。ゲート電極４３には、一対の第１スイッチング素子４０Ａおよび一対の第２スイッチング素子４０Ｂの各々を駆動させるためのゲート電圧が印加される。ゲート電極４３の大きさは、主面電極４１の大きさよりも小とされている。 As shown in FIG. 14, the gate electrode 43 is provided on the element main surface 401. A gate voltage for driving each of the pair of first switching elements 40A and the pair of second switching elements 40B is applied to the gate electrode 43. The size of the gate electrode 43 is smaller than that of the principal surface electrode 41.
　図１４および図１５に示すように、絶縁膜４４は、素子主面４０１に設けられている。絶縁膜４４は、電気絶縁性を有する。絶縁膜４４は、ｚ方向から視て主面電極４１を囲んでいる。絶縁膜４４は、たとえば二酸化ケイ素（ＳｉＯ2）層、窒化ケイ素（Ｓｉ3Ｎ4）層、ポリベンゾオキサゾール（ＰＢＯ）層が素子主面４０１からこの順番で積層されたものである。なお、絶縁膜４４においては、当該ポリベンゾオキサゾール層に代えてポリイミド層でもよい。 As shown in FIGS. 14 and 15, the insulating film 44 is provided on the element main surface 401. The insulating film 44 has electrical insulation. The insulating film 44 surrounds the principal surface electrode 41 when viewed from the z direction. The insulating film 44 is formed by stacking, for example, a silicon dioxide (SiO 2 ) layer, a silicon nitride (Si 3 N 4 ) layer, and a polybenzoxazole (PBO) layer in this order from the element main surface 401. In the insulating film 44, a polyimide layer may be used instead of the polybenzoxazole layer.
　複数の制御端子３Ｂは、図１１に示すように、複数のゲート端子３３および複数の検出端子３４を含む。本実施形態においては、複数の制御端子３Ｂは、半導体装置Ｂ１のｙ方向両側に分かれて配置されている。複数のゲート端子３３は、図１１に示すように、半導体装置Ｂ１においてｙ方向の両側に位置する。複数のゲート端子３３は、一対の第１スイッチング素子４０Ａおよび一対の第２スイッチング素子４０Ｂの個数に対応して配置されている。複数のゲート端子３３の各々には、それが対応する一対の第１スイッチング素子４０Ａおよび一対の第２スイッチング素子４０Ｂのいずれかを駆動させるためのゲート電圧が印加される。複数のゲート端子３３の各々は、パッド部３３１および端子部３３２を有する。 The plurality of control terminals 3B include a plurality of gate terminals 33 and a plurality of detection terminals 34, as shown in FIG. In the present embodiment, the plurality of control terminals 3B are separately arranged on both sides in the y direction of the semiconductor device B1. As shown in FIG. 11, the plurality of gate terminals 33 are located on both sides in the y direction of the semiconductor device B1. The plurality of gate terminals 33 are arranged corresponding to the numbers of the pair of first switching elements 40A and the pair of second switching elements 40B. A gate voltage for driving one of the pair of first switching elements 40A and the pair of second switching elements 40B corresponding to the plurality of gate terminals 33 is applied to each of the plurality of gate terminals 33. Each of the plurality of gate terminals 33 has a pad portion 331 and a terminal portion 332.
　図１１に示すように、パッド部３３１は、ｚ方向から視て基材１０に対して離間しており、かつ封止樹脂６０に覆われている。これにより、複数のゲート端子３３は、封止樹脂６０に支持されている。パッド部３３１の表面には、ゲートワイヤ５０３が接続されている。ゲートワイヤ５０３の構成材料は、たとえばアルミニウムである。なお、パッド部３３１の表面には、たとえば銀めっきを施してもよい。図１１および図１４に示すように、複数のパッド部３３１の表面に接続された複数のゲートワイヤ５０３の各々は、対応する一対の第１スイッチング素子４０Ａおよび一対の第２スイッチング素子４０Ｂのいずれかのゲート電極４３に接続されている。これにより、複数のゲート端子３３は、一対の第１スイッチング素子４０Ａのゲート電極４３、および一対の第２スイッチング素子４０Ｂのゲート電極４３に個別に導通している。 As shown in FIG. 11, the pad portion 331 is separated from the base material 10 when viewed from the z direction, and is covered with the sealing resin 60. Thereby, the plurality of gate terminals 33 are supported by the sealing resin 60. The gate wire 503 is connected to the surface of the pad portion 331. The constituent material of the gate wire 503 is, for example, aluminum. The surface of the pad portion 331 may be plated with silver, for example. As shown in FIGS. 11 and 14, each of the plurality of gate wires 503 connected to the surfaces of the plurality of pad portions 331 is one of the corresponding pair of first switching elements 40A and pair of second switching elements 40B. Of the gate electrode 43. Thereby, the plurality of gate terminals 33 are individually conducted to the gate electrodes 43 of the pair of first switching elements 40A and the gate electrodes 43 of the pair of second switching elements 40B.
　図１１に示すように、端子部３３２は、パッド部３３１につながり、かつ封止樹脂６０から露出している。端子部３３２は、半導体装置Ｂ１を配線基板に実装する際に用いられる。端子部３３２は、基部３３２Ａおよび起立部３３２Ｂを有する。基部３３２Ａは、パッド部３３１につながり、かつ封止樹脂６０の一対の樹脂第１側面６３１（詳細は後述）のいずれかからｙ方向に延びている。基部３３２Ａのｙ方向における寸法は、一対の入力端子３１の基部３１２Ａ、および一対の出力端子３２の基部３２２Ａの各々のｙ方向における寸法よりも小である。図６に示すように、起立部３３２Ｂは、基部３３２Ａのｙ方向における先端から、ｚ方向の基材１０の第１主面１１Ａが向く側に向けて延びている。これにより、図７～図１２に示すように、ｘ方向から視て、端子部３３２はＬ字状をなしている。 As shown in FIG. 11, the terminal portion 332 is connected to the pad portion 331 and is exposed from the sealing resin 60. The terminal portion 332 is used when the semiconductor device B1 is mounted on the wiring board. The terminal portion 332 has a base portion 332A and a standing portion 332B. The base portion 332A is connected to the pad portion 331 and extends in the y direction from either of the pair of resin first side surfaces 631 (details will be described later) of the sealing resin 60. The dimension in the y direction of the base portion 332A is smaller than the dimension in the y direction of each of the base portions 312A of the pair of input terminals 31 and the base portions 322A of the pair of output terminals 32. As shown in FIG. 6, the standing portion 332B extends from the tip of the base portion 332A in the y direction toward the side in which the first main surface 11A of the base material 10 in the z direction faces. As a result, as shown in FIGS. 7 to 12, the terminal portion 332 has an L shape when viewed from the x direction.
　図１１に示すように、一対の第１スイッチング素子４０Ａに対応する一対のゲート端子３３は、半導体装置Ｂ１においてｙ方向の他方側に位置する。当該一対のゲート端子３３は、ｘ方向において一対の出力端子３２の間に位置する。また、一対の第２スイッチング素子４０Ｂに対応する一対のゲート端子３３は、半導体装置Ｂ１においてｙ方向の一方側に位置する。当該一対のゲート端子３３は、ｘ方向において一対の入力端子３１の間に位置する。 As shown in FIG. 11, the pair of gate terminals 33 corresponding to the pair of first switching elements 40A are located on the other side in the y direction of the semiconductor device B1. The pair of gate terminals 33 are located between the pair of output terminals 32 in the x direction. The pair of gate terminals 33 corresponding to the pair of second switching elements 40B are located on one side in the y direction of the semiconductor device B1. The pair of gate terminals 33 are located between the pair of input terminals 31 in the x direction.
　複数の検出端子３４は、図１１に示すように、半導体装置Ｂ１においてｙ方向の両側に位置する。複数の検出端子３４は、一対の第１スイッチング素子４０Ａおよび一対の第２スイッチング素子４０Ｂの個数に対応して配置されている。複数の検出端子３４の各々は、それが対応する一対の第１スイッチング素子４０Ａおよび一対の第２スイッチング素子４０Ｂのいずれかのゲート電極４３に導通するゲート端子３３の隣に位置する。複数の検出端子３４の各々には、一対の第１スイッチング素子４０Ａおよび一対の第２スイッチング素子４０Ｂのいずれかの主面電極４１に流れるソース電流に対応した電圧が印加される。複数の検出端子３４の各々に印加された電圧に基づき、半導体装置Ｂ１の外部回路において主面電極４１に流れるソース電流が検出される。複数の検出端子３４の各々は、パッド部３４１および端子部３４２を有する。 The plurality of detection terminals 34 are located on both sides of the semiconductor device B1 in the y direction, as shown in FIG. The plurality of detection terminals 34 are arranged corresponding to the numbers of the pair of first switching elements 40A and the pair of second switching elements 40B. Each of the plurality of detection terminals 34 is located next to the gate terminal 33 that is electrically connected to the gate electrode 43 of either of the pair of first switching elements 40A and the pair of second switching elements 40B to which the detection terminals 34 correspond. To each of the plurality of detection terminals 34, a voltage corresponding to the source current flowing through the principal surface electrode 41 of one of the pair of first switching elements 40A and the pair of second switching elements 40B is applied. Based on the voltage applied to each of the plurality of detection terminals 34, the source current flowing through the main surface electrode 41 is detected in the external circuit of the semiconductor device B1. Each of the plurality of detection terminals 34 has a pad portion 341 and a terminal portion 342.
　図１１に示すように、パッド部３４１は、ｚ方向から視て基材１０に対して離間しており、かつ封止樹脂６０に覆われている。これにより、複数の検出端子３４は、封止樹脂６０に支持されている。パッド部３４１の表面には、検出ワイヤ５０４が接続されている。検出ワイヤ５０４の構成材料は、たとえばアルミニウムである。なお、パッド部３４１の表面には、たとえば銀めっきを施してもよい。図１１および図１４に示すように、複数のパッド部３４１の表面に接続された複数の検出ワイヤ５０４の各々は、対応する一対の第１スイッチング素子４０Ａおよび一対の第２スイッチング素子４０Ｂのいずれかの主面電極４１に接続されている。これにより、複数の検出端子３４は、一対の第１スイッチング素子４０Ａの主面電極４１、および一対の第２スイッチング素子４０Ｂの主面電極４１に個別に導通している。 As shown in FIG. 11, the pad portion 341 is separated from the base material 10 when viewed from the z direction, and is covered with the sealing resin 60. Thereby, the plurality of detection terminals 34 are supported by the sealing resin 60. The detection wire 504 is connected to the surface of the pad portion 341. The constituent material of the detection wire 504 is, for example, aluminum. The surface of the pad portion 341 may be plated with silver, for example. As shown in FIGS. 11 and 14, each of the plurality of detection wires 504 connected to the surfaces of the plurality of pad portions 341 is one of the corresponding pair of first switching elements 40A and pair of second switching elements 40B. Of the main surface electrode 41. Thereby, the plurality of detection terminals 34 are individually conducted to the main surface electrodes 41 of the pair of first switching elements 40A and the main surface electrodes 41 of the pair of second switching elements 40B.
　図１１に示すように、端子部３４２は、パッド部３４１につながり、かつ封止樹脂６０から露出している。端子部３４２は、半導体装置Ｂ１を配線基板に実装する際に用いられる。端子部３４２は、基部３４２Ａおよび起立部３４２Ｂを有する。基部３４２Ａは、パッド部３４１につながり、かつ封止樹脂６０の一対の樹脂第１側面６３１（詳細は後述）のいずれかからｙ方向に延びている。基部３４２Ａのｙ方向における寸法は、一対の入力端子３１の基部３１２Ａ、および一対の出力端子３２の基部３２２Ａの各々のｙ方向における寸法よりも小である。図６に示すように、起立部３４２Ｂは、基部３４２Ａのｙ方向における先端から、ｚ方向の基材１０の第１主面１１Ａが向く側に向けて延びている。これにより、図７～図１２に示すように、ｘ方向から視て、端子部３４２はＬ字状をなしている。なお、端子部３４２の形状は、複数のゲート端子３３の端子部３３２の形状と同一である。 As shown in FIG. 11, the terminal portion 342 is connected to the pad portion 341 and is exposed from the sealing resin 60. The terminal portion 342 is used when the semiconductor device B1 is mounted on the wiring board. The terminal portion 342 has a base portion 342A and a standing portion 342B. The base portion 342A is connected to the pad portion 341 and extends in the y direction from either of the pair of resin first side surfaces 631 (details will be described later) of the sealing resin 60. The dimension in the y direction of the base portion 342A is smaller than the dimension in the y direction of each of the base portions 312A of the pair of input terminals 31 and the base portions 322A of the pair of output terminals 32. As shown in FIG. 6, the standing portion 342B extends from the tip in the y direction of the base portion 342A toward the side facing the first main surface 11A of the base material 10 in the z direction. As a result, as shown in FIGS. 7 to 12, the terminal portion 342 has an L shape when viewed from the x direction. The shape of the terminal portion 342 is the same as the shape of the terminal portions 332 of the plurality of gate terminals 33.
　図１１に示すように、図示された例においては、入力端子３１Ａの起立部３１２Ｂ、入力端子３１Ｂの起立部３１２Ｂ、ｙ方向一方側のゲート端子３３の起立部３３２Ｂおよびｙ方向一方側の検出端子３４の起立部３４２Ｂのｙ方向における位置が略一致している。言い換えると、入力端子３１Ａの起立部３１２Ｂ、入力端子３１Ｂの起立部３１２Ｂ、ｙ方向一方側のゲート端子３３の起立部３３２Ｂおよびｙ方向一方側の検出端子３４の起立部３４２Ｂは、ｘ方向視において互いに重なる。 As shown in FIG. 11, in the illustrated example, the rising portion 312B of the input terminal 31A, the rising portion 312B of the input terminal 31B, the rising portion 332B of the gate terminal 33 on one side in the y direction, and the detection terminal on one side in the y direction. The upright portions 342</b>B of 34 are substantially aligned with each other in the y direction. In other words, the upright portion 312B of the input terminal 31A, the upright portion 312B of the input terminal 31B, the upright portion 332B of the gate terminal 33 on one side in the y direction and the upright portion 342B of the detection terminal 34 on the one side in the y direction are viewed in the x direction. Overlap each other.
　図１１に示すように、図示された例においては、一対の出力端子３２の起立部３２２Ｂ、ｙ方向他方側のゲート端子３３の起立部３３２Ｂおよびｙ方向他方側の検出端子３４の起立部３４２Ｂのｙ方向における位置が略一致している。言い換えると、一対の出力端子３２の起立部３２２Ｂ、ｙ方向他方側のゲート端子３３の起立部３３２Ｂおよびｙ方向他方側の検出端子３４の起立部３４２Ｂは、ｘ方向視において互いに重なる。 As shown in FIG. 11, in the illustrated example, the upright portion 322B of the pair of output terminals 32, the upright portion 332B of the gate terminal 33 on the other side in the y direction and the upright portion 342B of the detection terminal 34 on the other side in the y direction are formed. The positions in the y direction are substantially the same. In other words, the upright portion 322B of the pair of output terminals 32, the upright portion 332B of the gate terminal 33 on the other side in the y direction and the upright portion 342B of the detection terminal 34 on the other side in the y direction overlap each other when viewed in the x direction.
　図１６は、上述した複数の半導体素子４０、導電部材２０、補助導電部材２１、連結導電部材２９、複数の入出力端子３Ａおよび複数の制御端子３Ｂによって構成される半導体装置Ｂ１電気回路を示している。このような構成の半導体装置Ｂ１は、たとえばＡＣ／ＤＣコンバータとして用いられる。 FIG. 16 shows an electric circuit of the semiconductor device B1 including the plurality of semiconductor elements 40, the conductive member 20, the auxiliary conductive member 21, the connecting conductive member 29, the plurality of input/output terminals 3A and the plurality of control terminals 3B described above. There is. The semiconductor device B1 having such a configuration is used as, for example, an AC/DC converter.
　封止樹脂６０は、図１～図３、図５～図１３に示すように、基材１０（ただし、第１裏面１２Ａを除く。）導電部材２０、補助導電部材２１、連結導電部材２９、複数の半導体素子４０（一対の第１スイッチング素子４０Ａおよび一対の第２スイッチング素子４０Ｂ）を覆っている。封止樹脂６０は、複数の第１ワイヤ５０１、複数の第２ワイヤ５０２、複数のゲートワイヤ５０３、複数の検出ワイヤ５０４、複数の第１接続ワイヤ５１および複数の第２接続ワイヤ５２をさらに覆っている。封止樹脂６０の構成材料は、たとえばエポキシ樹脂である。封止樹脂６０は、樹脂主面６１、樹脂裏面６２、一対の樹脂第１側面６３１、一対の樹脂第２側面６３２、および一対の貫通孔６４を有する。 As shown in FIGS. 1 to 3 and 5 to 13, the encapsulating resin 60 is used for the conductive material 20, the auxiliary conductive member 21, the connecting conductive member 29, and the base material 10 (excluding the first back surface 12A). It covers the plurality of semiconductor elements 40 (the pair of first switching elements 40A and the pair of second switching elements 40B). The sealing resin 60 further covers the plurality of first wires 501, the plurality of second wires 502, the plurality of gate wires 503, the plurality of detection wires 504, the plurality of first connecting wires 51, and the plurality of second connecting wires 52. ing. The constituent material of the sealing resin 60 is, for example, an epoxy resin. The sealing resin 60 has a resin main surface 61, a resin back surface 62, a pair of resin first side surfaces 631, a pair of resin second side surfaces 632, and a pair of through holes 64.
　図１２および図１３に示すように、樹脂主面６１は、ｚ方向の基材１０の第１主面１１Ａが向く側を向く。樹脂裏面６２は、ｚ方向の基材１０の第１裏面１２Ａが向く側を向く。図５に示すように、第１裏面１２Ａは、樹脂裏面６２から露出している。樹脂裏面６２は、第１裏面１２Ａを囲む枠状である。 As shown in FIGS. 12 and 13, the resin main surface 61 faces the side facing the first main surface 11A of the base material 10 in the z direction. The resin back surface 62 faces the side to which the first back surface 12A of the base material 10 in the z direction faces. As shown in FIG. 5, the first back surface 12A is exposed from the resin back surface 62. The resin back surface 62 has a frame shape surrounding the first back surface 12A.
　図５および図６に示すように、一対の樹脂第１側面６３１は、樹脂主面６１および樹脂裏面６２の双方につながり、かつｙ方向を向く。樹脂第１側面６３１のｙ方向の一方側からは、一対の入力端子３１の端子部３１２と、一対の第２スイッチング素子４０Ｂに対応して配置された一対のゲート端子３３の端子部３３２、および一対の検出端子３４の端子部３４２とが露出している。樹脂第１側面６３１のｙ方向の他方側からは、一対の出力端子３２の端子部３２２と、一対の第１スイッチング素子４０Ａに対応して配置された一対のゲート端子３３の端子部３３２、および一対の検出端子３４の端子部３４２とが露出している。 As shown in FIGS. 5 and 6, the pair of resin first side surfaces 631 is connected to both the resin main surface 61 and the resin back surface 62 and faces the y direction. From one side of the resin first side surface 631 in the y direction, the terminal portions 312 of the pair of input terminals 31, the terminal portions 332 of the pair of gate terminals 33 arranged corresponding to the pair of second switching elements 40B, and The terminal portion 342 of the pair of detection terminals 34 is exposed. From the other side of the resin first side surface 631 in the y direction, the terminal portions 322 of the pair of output terminals 32, the terminal portions 332 of the pair of gate terminals 33 arranged corresponding to the pair of first switching elements 40A, and The terminal portion 342 of the pair of detection terminals 34 is exposed.
　図５および図７に示すように、一対の樹脂第２側面６３２は、樹脂主面６１および樹脂裏面６２の双方につながり、かつｘ方向を向く。 As shown in FIGS. 5 and 7, the pair of resin second side surfaces 632 are connected to both the resin main surface 61 and the resin back surface 62 and face the x direction.
　図５、図９および図１３に示すように、一対の貫通孔６４は、ｚ方向において樹脂主面６１から樹脂裏面６２に至って封止樹脂６０を貫通している。ｚ方向から視て、一対の貫通孔６４の孔縁は円形状である。一対の貫通孔６４は、基材１０のｘ方向の両側に位置する。 As shown in FIGS. 5, 9 and 13, the pair of through holes 64 penetrate the sealing resin 60 from the resin main surface 61 to the resin back surface 62 in the z direction. When viewed from the z direction, the hole edges of the pair of through holes 64 are circular. The pair of through holes 64 are located on both sides of the base material 10 in the x direction.
　一対の凹部６５は、図５および図９に示すように、樹脂裏面６２から凹んでいる。一対の凹部６５は、後述するように、半導体装置Ｂ１をヒートシンクＸ１に対して位置決めするためのものである。 The pair of recesses 65 are recessed from the resin back surface 62, as shown in FIGS. 5 and 9. The pair of recesses 65 are for positioning the semiconductor device B1 with respect to the heat sink X1, as described later.
＜第１基板７＞
　第１基板７は、半導体モジュールＡ１と接続されており、本実施形態においては、複数の電子部品７００が実装されている。図１～図１１に示すように、本実施形態の第１基板７は、第１基板主面７１、第１基板裏面７２、複数の入出力用貫通部７３、複数の制御用貫通部７４、一対の凹部７５を有する。第１基板７の形状は特に限定されず、図示された例においては、ｚ方向において矩形状である。第１基板７は、たとえば、エポキシ樹脂からなる絶縁性の基材と、当該基材に形成された配線パターン（図示略）を有する。 <First substrate 7>
The first substrate 7 is connected to the semiconductor module A1, and in the present embodiment, a plurality of electronic components 700 are mounted. As shown in FIGS. 1 to 11, the first substrate 7 of the present embodiment includes a first substrate main surface 71, a first substrate back surface 72, a plurality of input/output penetrating portions 73, a plurality of control penetrating portions 74, It has a pair of recesses 75. The shape of the first substrate 7 is not particularly limited, and is rectangular in the z direction in the illustrated example. The first substrate 7 has, for example, an insulating base material made of epoxy resin and a wiring pattern (not shown) formed on the base material.
　第１基板主面７１は、ｚ方向一方側を向く面である。第１基板裏面７２は、ｚ方向において第１基板主面７１とは反対側を向く面である。本実施形態においては、第１基板裏面７２は、半導体モジュールＡ１の封止樹脂６０の樹脂主面６１と対向している。 The first substrate main surface 71 is a surface facing one side in the z direction. The first substrate back surface 72 is a surface facing the side opposite to the first substrate main surface 71 in the z direction. In the present embodiment, the first substrate back surface 72 faces the resin main surface 61 of the sealing resin 60 of the semiconductor module A1.
　複数の入出力用貫通部７３は、半導体モジュールＡ１の複数の入出力端子３Ａである、入力端子３１Ａ、入力端子３１Ｂおよび一対の出力端子３２を挿通させるためのものであり、各々が第１基板７をｚ方向に貫通している。本実施形態においては、４つの入出力用貫通部７３が設けられている。入力端子３１Ａの起立部３１２Ｂ、入力端子３１Ｂの起立部３１２Ｂおよび一対の出力端子３２の起立部３２２Ｂが４つの入出力用貫通部７３に個別に挿通されている。図示された例においては、入力端子３１Ａの起立部３１２Ｂ、入力端子３１Ｂの起立部３１２Ｂおよび一対の出力端子３２の起立部３２２Ｂは、第１基板主面７１からｚ方向に突出している。 The plurality of input/output penetrating portions 73 are for inserting the plurality of input/output terminals 3A of the semiconductor module A1, that is, the input terminal 31A, the input terminal 31B, and the pair of output terminals 32, each of which is the first substrate. 7 through in the z direction. In this embodiment, four input/output penetrating portions 73 are provided. The upright portion 312B of the input terminal 31A, the upright portion 312B of the input terminal 31B, and the upright portion 322B of the pair of output terminals 32 are individually inserted into the four input/output penetrating portions 73. In the illustrated example, the rising portion 312B of the input terminal 31A, the rising portion 312B of the input terminal 31B, and the rising portions 322B of the pair of output terminals 32 project from the first substrate main surface 71 in the z direction.
　複数の制御用貫通部７４は、半導体モジュールＡ１の複数の制御端子３Ｂである複数のゲート端子３３および複数の検出端子３４が接続される複数の第１コネクタ８の一部を挿通させるためのものであり、各々が第１基板７をｚ方向に貫通している。図示された例においては、４つの制御用貫通部７４が設けられている。２つの制御用貫通部７４は、ｘ方向において２つの入出力用貫通部７３の間に位置しており、ｘ方向視においてこれらの制御用貫通部７４と重なる。他の２つの制御用貫通部７４は、ｘ方向において他の２つの入出力用貫通部７３の間に位置しており、ｘ方向視においてこれらの制御用貫通部７４と重なる。制御用貫通部７４には、第１コネクタ８の一部が挿通されており、第１コネクタ８を介して１つのゲート端子３３と１つの検出端子３４とが挿通されている。 The plurality of control penetrating portions 74 are for inserting a part of the plurality of first connectors 8 to which the plurality of gate terminals 33 which are the plurality of control terminals 3B of the semiconductor module A1 and the plurality of detection terminals 34 are connected. And each penetrates the first substrate 7 in the z direction. In the illustrated example, four control penetrating portions 74 are provided. The two control penetrating portions 74 are located between the two input/output penetrating portions 73 in the x direction and overlap these control penetrating portions 74 when viewed in the x direction. The other two control penetrating portions 74 are located between the other two input/output penetrating portions 73 in the x direction and overlap these control penetrating portions 74 when viewed in the x direction. A part of the first connector 8 is inserted through the control penetrating portion 74, and one gate terminal 33 and one detection terminal 34 are inserted through the first connector 8.
　一対の凹部７５は、第１基板７のｘ方向両端に設けられており、ｘ方向内方に凹んでいる。図４に示すように、凹部７５は、ｚ方向視において半導体モジュールＡ１の封止樹脂６０の貫通孔６４を内包している。 The pair of recesses 75 are provided at both ends of the first substrate 7 in the x direction and are recessed inward in the x direction. As shown in FIG. 4, the recess 75 encloses the through hole 64 of the sealing resin 60 of the semiconductor module A1 when viewed in the z direction.
　接続端子７６は、半導体モジュールＡ１への制御信号の入出力に用いられる端子である。本実施形態においては、複数の接続端子７６は、第１基板７のｘ方向およびｙ方向の中央寄りに配置されている。複数の接続端子７６は、一対の凹部７５の間に配置されている。 The connection terminal 76 is a terminal used for inputting/outputting a control signal to/from the semiconductor module A1. In the present embodiment, the plurality of connection terminals 76 are arranged near the center of the first substrate 7 in the x direction and the y direction. The plurality of connection terminals 76 are arranged between the pair of recesses 75.
　接続端子７６は、支持部７６１および複数の接続ピン７６２を有する。支持部７６１は、第１基板７に固定されており、複数の接続ピン７６２を支持している。図示された例においては、支持部７６１は、第１基板７の第１基板主面７１に取り付けられている。複数の接続ピン７６２は、支持部７６１からｚ方向に突出している。接続ピン７６２は、第１基板７の配線パターン（図示略）に導通している。 The connection terminal 76 has a support portion 761 and a plurality of connection pins 762. The support portion 761 is fixed to the first substrate 7 and supports the plurality of connection pins 762. In the illustrated example, the support portion 761 is attached to the first substrate main surface 71 of the first substrate 7. The plurality of connection pins 762 protrude from the support portion 761 in the z direction. The connection pin 762 is electrically connected to the wiring pattern (not shown) of the first substrate 7.
　複数の電子部品７００は、第１基板７に実装されている。本実施形態においては、複数の電子部品７００の用途や機能は、特に限定されず、たとえば、複数の接続端子７６から入力された制御信号から、半導体モジュールＡ１の複数の制御端子３Ｂ（複数のゲート端子３３）に入力される制御信号を生成したり、複数の制御端子３Ｂ（検出端子３４）からの検出信号を外部に出力すべき出力信号に変換したりする機能を果たす回路を構成する。 A plurality of electronic components 700 are mounted on the first board 7. In the present embodiment, the uses and functions of the plurality of electronic components 700 are not particularly limited, and, for example, from the control signals input from the plurality of connection terminals 76, the plurality of control terminals 3B (the plurality of gates) of the semiconductor module A1 are controlled. A circuit having a function of generating a control signal input to the terminal 33) and converting a detection signal from the plurality of control terminals 3B (detection terminals 34) into an output signal to be output to the outside is configured.
　図１、図３および図４に示すように、本実施形態においては、複数の電子部品７００は、複数の電子部品７０１、複数の電子部品７０２、複数の電子部品７０３、複数の電子部品７０４、複数の電子部品７０５、複数の電子部品７０６、複数の電子部品７０７、複数の電子部品７０８および複数の電子部品７０９を含む。 As shown in FIGS. 1, 3 and 4, in the present embodiment, the plurality of electronic components 700 include a plurality of electronic components 701, a plurality of electronic components 702, a plurality of electronic components 703, a plurality of electronic components 704, It includes a plurality of electronic components 705, a plurality of electronic components 706, a plurality of electronic components 707, a plurality of electronic components 708, and a plurality of electronic components 709.
　図示された例においては、図３および図４に示すように、複数の電子部品７０１、複数の電子部品７０２、複数の電子部品７０３、複数の電子部品７０４および複数の電子部品７０５は、第１基板７の第１基板主面７１に搭載されている。図１に示すように、複数の電子部品７０６、複数の電子部品７０７、複数の電子部品７０８および複数の電子部品７０９は、第１基板７の第１基板裏面７２に搭載されている。 In the illustrated example, as shown in FIGS. 3 and 4, the plurality of electronic components 701, the plurality of electronic components 702, the plurality of electronic components 703, the plurality of electronic components 704, and the plurality of electronic components 705 are It is mounted on the first substrate main surface 71 of the substrate 7. As shown in FIG. 1, the plurality of electronic components 706, the plurality of electronic components 707, the plurality of electronic components 708, and the plurality of electronic components 709 are mounted on the first substrate back surface 72 of the first substrate 7.
　図４に示すように、複数の電子部品７０１は、複数の接続端子７６に対してｙ方向両側に配置されている。電子部品７０１は、たとえばショットキーバリアダイオードである。 As shown in FIG. 4, the plurality of electronic components 701 are arranged on both sides in the y direction with respect to the plurality of connection terminals 76. The electronic component 701 is, for example, a Schottky barrier diode.
　複数の電子部品７０２は、複数の接続端子７６に対してｘ方向に並んで配置されている。電子部品７０２は、たとえばチップ抵抗である。 The plurality of electronic components 702 are arranged side by side in the x direction with respect to the plurality of connection terminals 76. The electronic component 702 is, for example, a chip resistor.
　複数の電子部品７０３は、複数の電子部品７０１を挟んで複数の接続端子７６に対してｙ方向外側に配置されている。複数の電子部品７０３は、ｘ方向に並んでいる。電子部品７０３は、たとえばチップ抵抗である。 The plurality of electronic components 703 are arranged on the outside in the y direction with respect to the plurality of connection terminals 76 with the plurality of electronic components 701 sandwiched therebetween. The plurality of electronic components 703 are arranged in the x direction. The electronic component 703 is, for example, a chip resistor.
　複数の電子部品７０４は、複数の電子部品７０３に対してｙ方向外側に配置されている。電子部品７０４は、たとえばショットキーバリアダイオードである。 The plurality of electronic components 704 are arranged outside the plurality of electronic components 703 in the y direction. The electronic component 704 is, for example, a Schottky barrier diode.
　複数の電子部品７０５は、複数の電子部品７０４に対してｙ方向外側に配置されている。複数の電子部品７０５は、第１基板主面７１において制御用貫通部７４に最も近い位置に配置されている。電子部品７０５は、たとえばセラミックコンデンサである。 The plurality of electronic components 705 are arranged outside the plurality of electronic components 704 in the y direction. The plurality of electronic components 705 are arranged at a position closest to the control penetrating portion 74 on the first substrate main surface 71. The electronic component 705 is, for example, a ceramic capacitor.
　図１に示すように、複数の電子部品７０６は、複数の接続端子７６に対してｙ方向両側に配置されている。電子部品７０６は、たとえばバイポーラトランジスタである。 As shown in FIG. 1, the plurality of electronic components 706 are arranged on both sides in the y direction with respect to the plurality of connection terminals 76. The electronic component 706 is, for example, a bipolar transistor.
　複数の電子部品７０７は、複数の７０６に対してｙ方向外側に配置されている。電子部品７０７は、たとえばセラミックコンデンサである。 The plurality of electronic components 707 are arranged outside the plurality of 706 in the y direction. The electronic component 707 is, for example, a ceramic capacitor.
　複数の電子部品７０８は、複数の７０７に対してｘ方向に並んで配置されている。電子部品７０８は、たとえばＭＯＳ－ＦＥＴである。 The multiple electronic components 708 are arranged side by side in the x direction with respect to the multiple 707. The electronic component 708 is, for example, a MOS-FET.
　複数の電子部品７０９は、複数の７０７と複数の電子部品７０８との間に配置されている。電子部品７０９は、たとえばチップ抵抗である。 The plurality of electronic components 709 are arranged between the plurality of electronic components 707 and the plurality of electronic components 708. The electronic component 709 is, for example, a chip resistor.
＜第１コネクタ８＞
　複数の第１コネクタ８は、第１基板７に固定されており、複数の制御端子３Ｂ（複数の３３および複数の検出端子３４）と接続する。第１コネクタ８の第１基板７に対する固定位置や固定方法は特に限定されない。本実施形態においては、複数の第１コネクタ８は、第１基板７の第１基板裏面７２側に取り付けられている。また、図示された例においては、第１コネクタ８の一部が、第１基板７の制御用貫通部７４に挿通されている。 <First connector 8>
The plurality of first connectors 8 are fixed to the first substrate 7, and are connected to the plurality of control terminals 3B (the plurality of 33 and the plurality of detection terminals 34). The fixing position and the fixing method of the first connector 8 to the first substrate 7 are not particularly limited. In the present embodiment, the plurality of first connectors 8 are attached to the first substrate 7 on the first substrate back surface 72 side. Further, in the illustrated example, a part of the first connector 8 is inserted into the control penetrating portion 74 of the first substrate 7.
　図１、図８および図９に示すように、本実施形態の第１コネクタ８は、筐体８１および複数の挿通孔８２を有する。筐体８１は、たとえば樹脂等からなり、筐体８１の本体部分を構成している。挿通孔８２は、ｚ方向に貫通しており、ゲート端子３３の起立部３３２Ｂまたは検出端子３４の起立部３４２Ｂが挿通される。 As shown in FIGS. 1, 8 and 9, the first connector 8 of this embodiment has a housing 81 and a plurality of insertion holes 82. The housing 81 is made of, for example, resin and constitutes the main body of the housing 81. The insertion hole 82 penetrates in the z direction, and the upright portion 332B of the gate terminal 33 or the upright portion 342B of the detection terminal 34 is inserted therethrough.
　第１コネクタ８は、ゲート端子３３および検出端子３４と、第１基板７の配線パターン（図示略）の適所とを導通させる。また、第１コネクタ８は、ゲート端子３３および検出端子３４が、第１基板７に対してｘ方向およびｙ方向の少なくともいずれかに相対動することを許容する。図示された例においては、第１コネクタ８は、図８に示すように、ゲート端子３３および検出端子３４がｙ方向において第１基板７に対して相対動することを許容するとともに、図１０に示すように、ゲート端子３３および検出端子３４がｘ方向において第１基板７に対して相対動することを許容する。また、第１コネクタ８は、ゲート端子３３および検出端子３４が第１基板７に対してｚ方向に相対動することを許容する構成であってもよい。このような第１コネクタ８としては、たとえば、特開２０１８－１１３１６３号公報、特開２０１８－６３８８６号公報、特開２０１７－１３９１０１号公報等に開示された従来公知のコネクタを採用することができる。 The first connector 8 electrically connects the gate terminal 33 and the detection terminal 34 to a proper place of the wiring pattern (not shown) of the first substrate 7. Further, the first connector 8 allows the gate terminal 33 and the detection terminal 34 to move relative to the first substrate 7 in at least one of the x direction and the y direction. In the illustrated example, the first connector 8 allows the gate terminal 33 and the detection terminal 34 to move relative to the first substrate 7 in the y direction, as shown in FIG. As shown, the gate terminal 33 and the detection terminal 34 are allowed to move relative to the first substrate 7 in the x direction. Further, the first connector 8 may be configured to allow the gate terminal 33 and the detection terminal 34 to move relative to the first substrate 7 in the z direction. As such a first connector 8, for example, a conventionally known connector disclosed in JP-A-2018-113163, JP-A-2018-63886, JP-A-2017-139101 or the like can be adopted. ..
　図示された例においては、１つの第１コネクタ８の２つの挿通孔８２に、ゲート端子３３および検出端子３４が挿通される。また、４つの第１コネクタ８がｘ方向およびｙ方向に並んで配置されている。 In the illustrated example, the gate terminal 33 and the detection terminal 34 are inserted into the two insertion holes 82 of one first connector 8. Further, the four first connectors 8 are arranged side by side in the x direction and the y direction.
　図６および図７に示すように、本実施形態においては、複数の第１コネクタ８は、封止樹脂６０に対してｙ方向外側に配置されている。また、第１コネクタ８は、ｙ方向視において半導体モジュールＡ１の封止樹脂６０と重なる。 As shown in FIGS. 6 and 7, in the present embodiment, the plurality of first connectors 8 are arranged outside the sealing resin 60 in the y direction. The first connector 8 overlaps the sealing resin 60 of the semiconductor module A1 when viewed in the y direction.
　本実施形態によれば、図１に示すように、半導体モジュールＡ１の組み立てに際して、第１コネクタ８を介して半導体装置Ｂ１の複数の制御端子３Ｂ（複数のゲート端子３３および複数の検出端子３４）を第１基板７に接続する。第１コネクタ８は、第１基板７に対して複数のゲート端子３３がｘ方向およびｙ方向の少なくともいずれかに相対動することを許容する。このため、複数のゲート端子３３の起立部３３２Ｂおよび複数の検出端子３４の起立部３４２Ｂが起立する角度が、ばらつきを有していても、第１コネクタ８によってｘ方向およびｙ方向における位置ずれを吸収することが可能である。したがって、ゲート端子３３および検出端子３４の角度や位置を第１基板７を基準として修正することが抑制される。したがって、半導体モジュールＡ１によれば、端子接続の容易化とより確実な導通とを図ることができる。 According to the present embodiment, as shown in FIG. 1, when assembling the semiconductor module A1, the plurality of control terminals 3B (the plurality of gate terminals 33 and the plurality of detection terminals 34) of the semiconductor device B1 are inserted via the first connector 8. Are connected to the first substrate 7. The first connector 8 allows the plurality of gate terminals 33 to move relative to the first substrate 7 in at least one of the x direction and the y direction. Therefore, even if the rising angles of the rising portions 332B of the plurality of gate terminals 33 and the rising portions 342B of the plurality of detection terminals 34 are varied, the first connector 8 causes the positional deviation in the x direction and the y direction. It is possible to absorb. Therefore, it is possible to prevent the angles and positions of the gate terminal 33 and the detection terminal 34 from being corrected with reference to the first substrate 7. Therefore, according to the semiconductor module A1, it is possible to facilitate the terminal connection and achieve more reliable conduction.
　第１コネクタ８がｙ方向視において封止樹脂６０と重なることにより、第１コネクタ８を設けることによって半導体モジュールＡ１のｚ方向寸法が大きくなることを抑制することができる。 Since the first connector 8 overlaps the sealing resin 60 when viewed in the y direction, it is possible to prevent the size of the semiconductor module A1 in the z direction from increasing due to the provision of the first connector 8.
　第１基板７からは、半導体モジュールＡ１の複数の入出力端子３Ａ（入力端子３１Ａ、入力端子３１Ｂおよび一対の出力端子３２）と複数の接続端子７６の複数の接続ピン７６２とがｚ方向において同じ側（第１基板主面７１が向く側）に突出している。これにより、複数の入出力端子３Ａおよび複数の接続端子７６に接続すべき基板等を、第１基板７の第１基板主面７１が向く側にまとめて配置することができる。 From the first substrate 7, the plurality of input/output terminals 3A (the input terminal 31A, the input terminal 31B and the pair of output terminals 32) of the semiconductor module A1 and the plurality of connection pins 762 of the plurality of connection terminals 76 are the same in the z direction. To the side (the side on which the first substrate main surface 71 faces). Thereby, the boards or the like to be connected to the plurality of input/output terminals 3A and the plurality of connection terminals 76 can be collectively arranged on the side of the first board 7 facing the first board main surface 71.
〔第１実施形態　変形例〕
　図１７は、半導体モジュールＡ１の変形例を示している。なお、本図において、上記実施形態と同一または類似の要素には、上述した例と同一の符号を付している。 [Modification of First Embodiment]
FIG. 17 shows a modification of the semiconductor module A1. In the figure, the same or similar elements as those in the above-described embodiment are designated by the same reference numerals as those in the above-described example.
　本変形例の半導体モジュールＡ１１は、半導体モジュールＡ１の構成要素に加えて、第２基板９１、第３基板９２およびヒートシンクＸ１をさらに備えている。 The semiconductor module A11 of this modification further includes a second substrate 91, a third substrate 92, and a heat sink X1 in addition to the components of the semiconductor module A1.
　第２基板９１は、第１基板７に対してｚ方向において第１基板主面７１が向く側に配置されている。第２基板９１には、たとえば複数の第２コネクタ９１１が取り付けられている。第２コネクタ９１１は、第１コネクタ８と同様に、入出力端子３Ａの起立部３１２Ｂや起立部３２２Ｂが、第２基板９１に対してｘ方向およびｙ方向に相対動することを許容するとともに、第２基板９１の適所と複数の入出力端子３Ａとを導通させる。図示された例においては、第２コネクタ９１１は、第２基板９１のうち第１基板７とは反対側を向く面に設けられている。第２基板９１は、たとえば半導体モジュールＡ１のスイッチング対象である電流が通電される。 The second substrate 91 is arranged on the side facing the first substrate main surface 71 in the z direction with respect to the first substrate 7. A plurality of second connectors 911 are attached to the second board 91, for example. Similarly to the first connector 8, the second connector 911 allows the upright portion 312B and the upright portion 322B of the input/output terminal 3A to move relative to the second substrate 91 in the x direction and the y direction, and The proper position of the second substrate 91 and the plurality of input/output terminals 3A are electrically connected. In the illustrated example, the second connector 911 is provided on the surface of the second substrate 91 facing the side opposite to the first substrate 7. The second substrate 91 is supplied with a current, which is a switching target of the semiconductor module A1, for example.
　第３基板９２は、第２基板９１に対してｚ方向において第１基板７とは反対側に配置されている。第３基板９２には、たとえば複数の第３コネクタ９２１が取り付けられている。第３コネクタ９２１は、第１コネクタ８および第２コネクタ９１１と同様に、接続端子７６の接続ピン７６２が、第３基板９２に対してｘ方向およびｙ方向に相対動することを許容するとともに、第３基板９２の適所と複数の接続ピン７６２とを導通させる。なお、本例においては、第２基板９１は、複数の接続ピン７６２を挿通させる貫通孔（図示略）を有する。第３基板９２は、たとえば、複数の接続端子７６に入出力される制御信号が通電される。 The third substrate 92 is arranged on the side opposite to the first substrate 7 in the z direction with respect to the second substrate 91. For example, a plurality of third connectors 921 are attached to the third substrate 92. Like the first connector 8 and the second connector 911, the third connector 921 allows the connection pin 762 of the connection terminal 76 to move relative to the third substrate 92 in the x direction and the y direction, and The proper position of the third substrate 92 and the plurality of connection pins 762 are electrically connected. In addition, in the present example, the second substrate 91 has a through hole (not shown) into which the plurality of connection pins 762 are inserted. The third substrate 92 is energized with control signals input to and output from the plurality of connection terminals 76, for example.
　ヒートシンクＸ１は、複数の半導体素子４０から生じる熱を外部に逃がすためのものである。ヒートシンクＸ１は、たとえばアルミ等の金属からなる。さらに、ヒートシンクＸ１は、内部に水冷用の水路を有するものであってもよい。半導体装置Ｂ１は、ボルトＸ２によってヒートシンクＸ１に取り付けられている。ボルトＸ２は、封止樹脂６０の貫通孔６４に挿通されており、ヒートシンクＸ１に設けられた雌ねじに螺合している。また、図示された例においては、ヒートシンクＸ１には、複数の凸部Ｘ１１が設けられている。複数の凸部Ｘ１１は、封止樹脂６０の複数の凹部６５に嵌まることにより、半導体装置Ｂ１とヒートシンクＸ１との位置決めをより正確に行うためのものである。 The heat sink X1 is for releasing heat generated from the plurality of semiconductor elements 40 to the outside. The heat sink X1 is made of metal such as aluminum. Further, the heat sink X1 may have a water channel for water cooling inside. The semiconductor device B1 is attached to the heat sink X1 with a bolt X2. The bolt X2 is inserted into the through hole 64 of the sealing resin 60 and is screwed into the female screw provided on the heat sink X1. Further, in the illustrated example, the heat sink X1 is provided with a plurality of convex portions X11. The plurality of convex portions X11 are for fitting the semiconductor device B1 and the heat sink X1 more accurately by fitting into the plurality of concave portions 65 of the sealing resin 60.
　本変形例によっても、端子接続の容易化とより確実な導通とを図ることができる。また、第２基板９１に第２コネクタ９１１を設け、第３基板９２に第３コネクタ９２１を設けることにより、半導体モジュールＡ１および第１基板７に加えて第２基板９１および第３基板９２を設ける作業をより容易に行うことができる。 -Even with this modification, it is possible to facilitate terminal connection and ensure more reliable conduction. By providing the second connector 911 on the second board 91 and the third connector 921 on the third board 92, the second board 91 and the third board 92 are provided in addition to the semiconductor module A1 and the first board 7. Work can be performed more easily.
〔半導体装置Ｂ１　変形例〕
　図１８は、半導体装置Ｂ１の変形例を示している。本変形例の半導体装置Ｂ１１は、複数の入出力端子３Ａの起立部３１２Ｂおよび起立部３２２Ｂと、複数の制御端子３Ｂの起立部３３２Ｂおよび起立部３４２Ｂとのｙ方向における位置が互いに異なっている。より具体的には、複数の制御端子３Ｂの起立部３３２Ｂおよび起立部３４２Ｂは、複数の入出力端子３Ａの起立部３１２Ｂおよび起立部３２２Ｂよりも、ｙ方向内方（封止樹脂６０に近い位置）に配置されている。 [Modification of Semiconductor Device B1]
FIG. 18 shows a modification of the semiconductor device B1. In the semiconductor device B11 of the present modification, the standing portions 312B and 322B of the plurality of input/output terminals 3A and the standing portions 332B and 342B of the plurality of control terminals 3B are different from each other in the y direction. More specifically, the rising portions 332B and the rising portions 342B of the plurality of control terminals 3B are located inward in the y direction (positions closer to the sealing resin 60) than the rising portions 312B and the rising portions 322B of the plurality of input/output terminals 3A. ) Is located.
　本変形例によれば、たとえば、図１７に示す例における第１基板７のｙ方向外側に起立部３１２Ｂおよび起立部３２２Ｂを位置させることにより、第１基板７に入出力用貫通部７３を設けることを省略することが可能である。 According to this modification, for example, the input/output penetrating portion 73 is provided on the first substrate 7 by arranging the upright portion 312B and the upright portion 322B outside the first substrate 7 in the y direction in the example shown in FIG. It is possible to omit that.
〔第１実施形態　ＡＣ／ＤＣコンバータユニットＣ１〕
　図１９～図２８は、本開示の第１実施形態に係るＡＣ／ＤＣコンバータユニットを示している。本実施形態のＡＣ／ＤＣコンバータユニットＣ１は、第１半導体モジュールＡ２１、第２半導体モジュールＡ２２、入力モジュールＤ、出力モジュールＥ、コンデンサモジュールＦ、絶縁電源モジュールＧおよびトランスモジュールＨを備えている。ＡＣ／ＤＣコンバータユニットＣ１の用途は特に限定されず、その一例を挙げると、入力モジュールＤに入力されたＡＣ電力（たとえば２００Ｖ－３６Ａ）を変換し、出力モジュールＥからＤＣ電力（たとえば、８００Ｖ－９Ａ，７．２ｋＷ）として出力するＡＣ／ＤＣ変換用途に用いられる。 [First Embodiment AC/DC Converter Unit C1]
19 to 28 show an AC/DC converter unit according to the first embodiment of the present disclosure. The AC/DC converter unit C1 of this embodiment includes a first semiconductor module A21, a second semiconductor module A22, an input module D, an output module E, a capacitor module F, an insulated power supply module G, and a transformer module H. The application of the AC/DC converter unit C1 is not particularly limited, and one example thereof is to convert the AC power (for example, 200V-36A) input to the input module D and to convert the DC power (for example, 800V-) from the output module E. 9A, 7.2 kW) used for AC/DC conversion.
　図１９は、ＡＣ／ＤＣコンバータユニットＣ１を示すブロック図である。図２０は、ＡＣ／ＤＣコンバータユニットＣ１を示す平面図である。図２１は、ＡＣ／ＤＣコンバータユニットＣ１を示す要部平面図である。図２２は、ＡＣ／ＤＣコンバータユニットＣ１の半導体モジュールを示す正面図である。図２３は、図２１のＸＸＩＩＩ－ＸＸＩＩＩ線に沿う要部断面図である。図２４は、図２１のＸＸＩＶ－ＸＸＩＶ線に沿う要部断面図である。図２５は、図２１のＸＸＶ－ＸＸＶ線に沿う要部断面図である。図２６は、図２１のＸＸＶＩ－ＸＸＶＩ線に沿う要部断面図である。図２７は、図２０のＸＸＶＩＩ－ＸＸＶＩＩ線に沿う断面図である。図２８は、図２０のＸＸＶＩＩＩ－ＸＸＶＩＩＩ線に沿う断面図である。 FIG. 19 is a block diagram showing the AC/DC converter unit C1. FIG. 20 is a plan view showing the AC/DC converter unit C1. FIG. 21 is a main part plan view showing the AC/DC converter unit C1. FIG. 22 is a front view showing the semiconductor module of the AC/DC converter unit C1. FIG. 23 is a cross-sectional view of essential parts taken along the line XXIII-XXIII in FIG. FIG. 24 is a cross-sectional view of main parts taken along the line XXIV-XXIV of FIG. FIG. 25 is a cross-sectional view of essential parts along the line XXV-XXV in FIG. FIG. 26 is a main-portion cross-sectional view taken along the line XXVI-XXVI of FIG. 27 is a sectional view taken along line XXVII-XXVII in FIG. 28 is a sectional view taken along line XXVIII-XXVIII in FIG.
〔第１半導体モジュールＡ２１〕
　第１半導体モジュールＡ２１は、上述した半導体モジュールＡ１と一部が共通した構成である。図２２に示すように、第１半導体モジュールＡ２１は、半導体装置Ｂ２１、第１基板７、複数の電子部品７００、複数の接続端子７６および複数の第１コネクタ８を備えている。第１基板７、複数の電子部品７００、複数の接続端子７６および複数の第１コネクタ８は、たとえば、半導体モジュールＡ１における構成と同様である。なお、図１９のゲートドライバおよびコントロールボード等は、たとえば第１基板７に実装された複数の電子部品７００によって構成されていてもよい。 [First semiconductor module A21]
The first semiconductor module A21 has a configuration that is partially common to the above-described semiconductor module A1. As shown in FIG. 22, the first semiconductor module A21 includes a semiconductor device B21, a first substrate 7, a plurality of electronic components 700, a plurality of connection terminals 76, and a plurality of first connectors 8. The first substrate 7, the plurality of electronic components 700, the plurality of connection terminals 76, and the plurality of first connectors 8 have, for example, the same configuration as that of the semiconductor module A1. Note that the gate driver, the control board, and the like in FIG. 19 may be configured by a plurality of electronic components 700 mounted on the first substrate 7, for example.
　半導体装置Ｂ２１は、図１９に示すように、２つの第１スイッチング素子４０Ａおよび第２スイッチング素子４０Ｂを備えている。本実施形態においては、半導体装置Ｂ２１は、たとえば、ＰＦＣ（power factor correction）回路を構成し、ＡＣ／ＤＣ変換機能を果たす。 As shown in FIG. 19, the semiconductor device B21 includes two first switching elements 40A and second switching elements 40B. In the present embodiment, the semiconductor device B21 constitutes, for example, a PFC (power factor correction) circuit and fulfills an AC/DC conversion function.
　図１９～図２２に示すように、半導体装置Ｂ２１は、入力端子３１Ａ、入力端子３１Ｂ、出力端子３２Ａおよび出力端子３２Ｂを有する。入力端子３１Ａ、入力端子３１Ｂ、出力端子３２Ａの端子部３１２および出力端子３２Ｂの端子部３２２は、半導体装置Ｂ１における構成とは異なり、起立部３１２Ｂおよび起立部３２２Ｂを有さない、直状の形状である。 As shown in FIGS. 19 to 22, the semiconductor device B21 has an input terminal 31A, an input terminal 31B, an output terminal 32A and an output terminal 32B. Unlike the configuration of the semiconductor device B1, the input terminal 31A, the input terminal 31B, the terminal portion 312 of the output terminal 32A, and the terminal portion 322 of the output terminal 32B do not have the standing portion 312B and the standing portion 322B, and have a straight shape. Is.
　図２０および図２１に示すように、入力端子３１Ａの端子部３１２および入力端子３１Ｂの端子部３１２は、ｙ方向一方側に突出しており、ｘ方向において互いに離間している。出力端子３２Ａの端子部３２２および出力端子３２Ｂの端子部３２２は、ｙ方向他方側に突出しており、ｘ方向において互いに離間している。 As shown in FIGS. 20 and 21, the terminal portion 312 of the input terminal 31A and the terminal portion 312 of the input terminal 31B project to one side in the y direction and are separated from each other in the x direction. The terminal portion 322 of the output terminal 32A and the terminal portion 322 of the output terminal 32B project to the other side in the y direction and are separated from each other in the x direction.
　図１９に示すように、入力端子３１Ａは、第１スイッチング素子４０Ａのソース電極（主面電極４１）および第２スイッチング素子４０Ｂのドレイン電極（裏面電極４２）に接続されている。入力端子３１Ｂは、コイルを介して直列に接続された２つのダイオードの接続点に接続されている。出力端子３２Ａは、一方のダイオードのカソードに接続されている。出力端子３２Ｂは、他方のダイオードのアノードに接続されている。 As shown in FIG. 19, the input terminal 31A is connected to the source electrode (main surface electrode 41) of the first switching element 40A and the drain electrode (back surface electrode 42) of the second switching element 40B. The input terminal 31B is connected to a connection point of two diodes connected in series via a coil. The output terminal 32A is connected to the cathode of one diode. The output terminal 32B is connected to the anode of the other diode.
　入力端子３１Ａおよび入力端子３１Ｂの端子部３１２は、締結用孔３１３を有する。締結用孔３１３は、端子部３１２の先端付近に設けられており、端子部３１２をｚ方向に貫通している。 The terminal portions 312 of the input terminals 31A and 31B have fastening holes 313. The fastening hole 313 is provided near the tip of the terminal portion 312 and penetrates the terminal portion 312 in the z direction.
〔第２半導体モジュールＡ２２〕
　第２半導体モジュールＡ２２は、上述した半導体モジュールＡ１と一部が共通した構成である。図２２に示すように、第２半導体モジュールＡ２２は、半導体装置Ｂ２２、第１基板７、複数の電子部品７００、複数の接続端子７６および複数の第１コネクタ８を備えている。第１基板７、複数の電子部品７００、複数の接続端子７６および複数の第１コネクタ８は、たとえば、半導体モジュールＡ１における構成と同様である。なお、図１９のゲートドライバおよびコントロールボード等は、たとえば第１基板７に実装された複数の電子部品７００によって構成されていてもよい。 [Second semiconductor module A22]
The second semiconductor module A22 has a configuration that is partially common to the above-described semiconductor module A1. As shown in FIG. 22, the second semiconductor module A22 includes a semiconductor device B22, a first substrate 7, a plurality of electronic components 700, a plurality of connection terminals 76, and a plurality of first connectors 8. The first substrate 7, the plurality of electronic components 700, the plurality of connection terminals 76, and the plurality of first connectors 8 have, for example, the same configuration as that of the semiconductor module A1. Note that the gate driver, the control board, and the like in FIG. 19 may be configured by a plurality of electronic components 700 mounted on the first substrate 7, for example.
　半導体装置Ｂ２２は、図１９に示すように、２つの第１スイッチング素子４０Ａおよび２つの第２スイッチング素子４０Ｂを備えている。本実施形態においては、半導体装置Ｂ２２は、たとえば、トランスモジュールＨおよび出力モジュールＥの半導体装置Ｂ２３とともにＬＬＣ共振ＤＣ／ＤＣコンバータを構成するためのＨブリッジ（フルブリッジ）回路である。 The semiconductor device B22 includes two first switching elements 40A and two second switching elements 40B, as shown in FIG. In the present embodiment, the semiconductor device B22 is, for example, an H bridge (full bridge) circuit for forming an LLC resonance DC/DC converter together with the semiconductor device B23 of the transformer module H and the output module E.
　図１９～図２２に示すように、半導体装置Ｂ２２は、入力端子３１Ａ、入力端子３１Ｂ、出力端子３２Ａおよび出力端子３２Ｂを有する。半導体装置Ｂ２２の入力端子３１Ａ、入力端子３１Ｂ、出力端子３２Ａの端子部３１２および出力端子３２Ｂの端子部３２２は、半導体装置Ｂ１における構成とは異なり、起立部３１２Ｂおよび起立部３２２Ｂを有さない、直状の形状である。 As shown in FIGS. 19 to 22, the semiconductor device B22 has an input terminal 31A, an input terminal 31B, an output terminal 32A and an output terminal 32B. Unlike the configuration of the semiconductor device B1, the input terminal 31A, the input terminal 31B, the terminal portion 312 of the output terminal 32A, and the terminal portion 322 of the output terminal 32B of the semiconductor device B22 do not have the rising portion 312B and the rising portion 322B. It has a straight shape.
　図２０および図２１に示すように、入力端子３１Ａの端子部３１２および入力端子３１Ｂの端子部３１２は、ｙ方向一方側に突出しており、ｘ方向において互いに離間している。出力端子３２Ａの端子部３２２および出力端子３２Ｂの端子部３２２は、ｙ方向他方側に突出しており、ｘ方向において互いに離間している。 As shown in FIGS. 20 and 21, the terminal portion 312 of the input terminal 31A and the terminal portion 312 of the input terminal 31B project to one side in the y direction and are separated from each other in the x direction. The terminal portion 322 of the output terminal 32A and the terminal portion 322 of the output terminal 32B project to the other side in the y direction and are separated from each other in the x direction.
　図１９に示すように、入力端子３１Ａは、２つの第１スイッチング素子４０Ａのドレイン電極（裏面電極４２）に接続されている。入力端子３１Ｂは、２つの第２スイッチング素子４０Ｂのソース電極（主面電極４１）に接続されている。出力端子３２Ａは、一方の第１スイッチング素子４０Ａのソース電極（主面電極４１）と一方の第２スイッチング素子４０Ｂのドレイン電極（裏面電極４２）とに接続されている。出力端子３２Ｂは、他方の第１スイッチング素子４０Ａのソース電極（主面電極４１）と他方の第２スイッチング素子４０Ｂのドレイン電極（裏面電極４２）とに接続されている。 As shown in FIG. 19, the input terminal 31A is connected to the drain electrodes (back surface electrodes 42) of the two first switching elements 40A. The input terminal 31B is connected to the source electrodes (main surface electrodes 41) of the two second switching elements 40B. The output terminal 32A is connected to the source electrode (main surface electrode 41) of the one first switching element 40A and the drain electrode (back surface electrode 42) of the one second switching element 40B. The output terminal 32B is connected to the source electrode (main surface electrode 41) of the other first switching element 40A and the drain electrode (back surface electrode 42) of the other second switching element 40B.
　半導体装置Ｂ２２の入力端子３１Ａおよび入力端子３１Ｂの端子部３１２は、締結用孔３１３を有する。締結用孔３１３は、端子部３１２の先端付近に設けられており、端子部３１２をｚ方向に貫通している。 The input terminal 31A of the semiconductor device B22 and the terminal portion 312 of the input terminal 31B have fastening holes 313. The fastening hole 313 is provided near the tip of the terminal portion 312 and penetrates the terminal portion 312 in the z direction.
〔入力モジュールＤ〕
　入力モジュールＤは、ＡＣ／ＤＣコンバータユニットＣ１への電力が入力されるモジュールである。入力モジュールＤの具体的な構成は何ら限定されず、本実施形態においては、図１９および図２０に示すように、入力コネクタＤ１、入力フィルタＤ２、リアクトルＤ３、出力端子Ｄ４１および出力端子Ｄ４２を有する。 [Input module D]
The input module D is a module to which electric power is input to the AC/DC converter unit C1. The specific configuration of the input module D is not limited at all, and in the present embodiment, as shown in FIGS. 19 and 20, it has an input connector D1, an input filter D2, a reactor D3, an output terminal D41 and an output terminal D42. ..
　入力コネクタＤ１は、外部のコネクタ等と接続されることにより、ＡＣ電力（たとえば２００Ｖ－３６Ａ）が入力される部位である。入力フィルタＤ２は、入力コネクタＤ１に入力されたＡＣ電力に、任意のフィルタ処理を施す部位である。リアクトルＤ３は、入力フィルタＤ２と出力端子Ｄ４１との間に介在している。 The input connector D1 is a part to which AC power (for example, 200V-36A) is input by being connected to an external connector or the like. The input filter D2 is a part that performs arbitrary filtering on the AC power input to the input connector D1. The reactor D3 is interposed between the input filter D2 and the output terminal D41.
　出力端子Ｄ４１および出力端子Ｄ４２は、入力コネクタＤ１から第１半導体モジュールＡ２１（半導体装置Ｂ２１）へと出力するためのものである。図２０、図２１、図２３および図２４に示すように、出力端子Ｄ４１および出力端子Ｄ４２は、ｙ方向他方側に突出しており、ｘ方向において互いに離間している。出力端子Ｄ４１および出力端子Ｄ４２は、たとえば、金属板からなる。当該金属板の構成材料は、銅（Ｃｕ）または銅合金である。出力端子Ｄ４１および出力端子Ｄ４２は、先端がｙ方向に直上に延びた形状である。出力端子Ｄ４１および出力端子Ｄ４２は、締結用孔Ｄ４３を有する。締結用孔Ｄ４３は、出力端子Ｄ４１および出力端子Ｄ４２の先端付近に設けられており、出力端子Ｄ４１および出力端子Ｄ４２をｚ方向に貫通している。 The output terminal D41 and the output terminal D42 are for outputting from the input connector D1 to the first semiconductor module A21 (semiconductor device B21). As shown in FIGS. 20, 21, 23, and 24, the output terminal D41 and the output terminal D42 project to the other side in the y direction and are separated from each other in the x direction. The output terminal D41 and the output terminal D42 are made of, for example, a metal plate. The constituent material of the metal plate is copper (Cu) or a copper alloy. The output terminal D41 and the output terminal D42 have a shape in which the tips thereof extend directly upward in the y direction. The output terminal D41 and the output terminal D42 have a fastening hole D43. The fastening hole D43 is provided near the tips of the output terminals D41 and D42 and penetrates the output terminals D41 and D42 in the z direction.
〔出力モジュールＥ〕
　出力モジュールＥは、ＡＣ／ＤＣコンバータユニットＣ１からの電力が出力されるモジュールである。出力モジュールＥの具体的な構成は何ら限定されず、本実施形態においては、図１９、図２０および図２８に示すように、出力コネクタＥ１、出力フィルタＥ２、出力基板Ｅ３および半導体装置Ｂ２３を有する。 [Output module E]
The output module E is a module to which the electric power from the AC/DC converter unit C1 is output. The specific configuration of the output module E is not limited at all, and in the present embodiment, as shown in FIGS. 19, 20, and 28, the output module E has an output connector E1, an output filter E2, an output substrate E3, and a semiconductor device B23. ..
　出力コネクタＥ１は、外部のコネクタ等と接続されることにより、ＤＣ電力（たとえば、８００Ｖ－９Ａ，７．２ｋＷ）を出力するためのものである。出力フィルタＥ２は、出力コネクタＥ１から出力するＤＣ電力に、任意のフィルタ処理を施す部位である。出力基板Ｅ３は、たとえばガラスエポキシ樹脂からなる基材および当該基材に形成された配線パターンを有する配線基板であり、たとえば、出力フィルタＥ２や半導体装置Ｂ２３が実装されている。 The output connector E1 is for outputting DC power (for example, 800V-9A, 7.2 kW) by being connected to an external connector or the like. The output filter E2 is a part that performs arbitrary filtering processing on the DC power output from the output connector E1. The output board E3 is a wiring board having a base material made of, for example, a glass epoxy resin and a wiring pattern formed on the base material. For example, the output filter E2 and the semiconductor device B23 are mounted.
　半導体装置Ｂ２３は、図１９に示すように、４つのダイオード素子４０Ｃ、入力端子３１Ａ、入力端子３１Ｂ、出力端子３２Ａおよび出力端子３２Ｂを有しており、ブリッジ形整流回路を構成している。図２０に示すように、入力端子３１Ａおよび入力端子３１Ｂは、ｙ方向一方側に突出しており、ｘ方向において互いに離間している。出力端子３２Ａおよび出力端子３２Ｂは、ｙ方向他方側に突出しており、ｘ方向において互いに離間している。 As shown in FIG. 19, the semiconductor device B23 has four diode elements 40C, an input terminal 31A, an input terminal 31B, an output terminal 32A and an output terminal 32B, and forms a bridge type rectification circuit. As shown in FIG. 20, the input terminal 31A and the input terminal 31B project to one side in the y direction and are separated from each other in the x direction. The output terminal 32A and the output terminal 32B project to the other side in the y direction and are separated from each other in the x direction.
〔コンデンサモジュールＦ〕
　コンデンサモジュールＦは、図１９～図２１、図２４および図２５に示すように、第１半導体モジュールＡ２１の半導体装置Ｂ２１の端子部３２２（出力端子３２Ａ）および第２半導体モジュールＡ２２の半導体装置Ｂ２２の端子部３１２（入力端子３１Ａ）と、半導体装置Ｂ２１の端子部３２２（出力端子３２Ｂ）および半導体装置Ｂ２２の端子部３１２（入力端子３１Ｂ）とに接続されている。コンデンサモジュールＦの具体的な構成は何ら限定されず、本実施形態においては、複数のスナバコンデンサＦ１、接続端子Ｆ２１および接続端子Ｆ２２を有する。 [Capacitor module F]
As shown in FIGS. 19 to 21, 24 and 25, the capacitor module F includes the terminal portion 322 (output terminal 32A) of the semiconductor device B21 of the first semiconductor module A21 and the semiconductor device B22 of the second semiconductor module A22. The terminal portion 312 (input terminal 31A) is connected to the terminal portion 322 (output terminal 32B) of the semiconductor device B21 and the terminal portion 312 (input terminal 31B) of the semiconductor device B22. The specific configuration of the capacitor module F is not limited at all, and in the present embodiment, it has a plurality of snubber capacitors F1, a connection terminal F21 and a connection terminal F22.
　複数のスナバコンデンサＦ１は、たとえば、第１半導体モジュールＡ２１（半導体装置Ｂ２１）と第２半導体モジュールＡ２２（半導体装置Ｂ２２）との接続経路における寄生インダクタンスに起因するスイッチオフ時のサージ電圧を吸収する機能を果たす。 The plurality of snubber capacitors F1 have a function of, for example, absorbing a surge voltage at the time of switch-off due to parasitic inductance in the connection path between the first semiconductor module A21 (semiconductor device B21) and the second semiconductor module A22 (semiconductor device B22). Fulfill.
　接続端子Ｆ２１および接続端子Ｆ２２は、たとえば、金属板からなる。当該金属板の構成材料は、銅（Ｃｕ）または銅合金である。接続端子Ｆ２１は、半導体装置Ｂ２１の端子部３２２（出力端子３２Ａ）および半導体装置Ｂ２２の端子部３１２（入力端子３１Ａ）に接続されている。接続端子Ｆ２２は、半導体装置Ｂ２１の端子部３２２（出力端子３２Ｂ）および半導体装置Ｂ２２の端子部３１２（入力端子３１Ｂ）に接続されている。 The connection terminal F21 and the connection terminal F22 are made of, for example, a metal plate. The constituent material of the metal plate is copper (Cu) or a copper alloy. The connection terminal F21 is connected to the terminal portion 322 (output terminal 32A) of the semiconductor device B21 and the terminal portion 312 (input terminal 31A) of the semiconductor device B22. The connection terminal F22 is connected to the terminal portion 322 (output terminal 32B) of the semiconductor device B21 and the terminal portion 312 (input terminal 31B) of the semiconductor device B22.
〔絶縁電源モジュールＧ〕
　絶縁電源モジュールＧは、ＡＣ／ＤＣコンバータユニットＣ１の第１半導体モジュールＡ２１および第２半導体モジュールＡ２２等を駆動するための電力を供給するモジュールである。絶縁電源モジュールＧは、たとえば図示しないケーブルを介して第１半導体モジュールＡ２１および第２半導体モジュールＡ２２等に接続される。 [Insulated power supply module G]
The insulated power supply module G is a module that supplies electric power for driving the first semiconductor module A21, the second semiconductor module A22, and the like of the AC/DC converter unit C1. The insulated power supply module G is connected to the first semiconductor module A21, the second semiconductor module A22, etc. via a cable (not shown), for example.
〔トランスモジュールＨ〕
　トランスモジュールＨは、図１９および図２０に示すように、第２半導体モジュールＡ２２と出力モジュールＥとの間に介在している。トランスモジュールＨは、第２半導体モジュールＡ２２および出力モジュールＥとともに、ＤＣ／ＤＣコンバータ機能を果たすものである。トランスモジュールＨの具体的な構成は何ら限定されず、本実施形態においては、トランスＨ３、入力端子Ｈ１１、入力端子Ｈ１２、出力端子Ｈ２１および出力端子Ｈ２２を有する。 [Transformer module H]
As shown in FIGS. 19 and 20, the transformer module H is interposed between the second semiconductor module A22 and the output module E. The transformer module H functions as a DC/DC converter together with the second semiconductor module A22 and the output module E. The specific configuration of the transformer module H is not limited at all, and in this embodiment, it has a transformer H3, an input terminal H11, an input terminal H12, an output terminal H21, and an output terminal H22.
　トランスＨ３は、第２半導体モジュールＡ２２側（１次側）と出力モジュールＥ側（２次側）とを絶縁しつつ、所定の電圧変化機能を果たす。入力端子Ｈ１１は、第２半導体モジュールＡ２２（半導体装置Ｂ２２）の出力端子３２Ａに接続されている。入力端子Ｈ１２は、第２半導体モジュールＡ２２（半導体装置Ｂ２２）の出力端子３２Ｂに接続されている。出力端子Ｈ２１は、出力モジュールＥの半導体装置Ｂ２３の入力端子３１Ａに接続されている。出力端子Ｈ２２は、出力モジュールＥの半導体装置Ｂ２３の入力端子３１Ｂに接続されている。 The transformer H3 performs a predetermined voltage changing function while insulating the second semiconductor module A22 side (primary side) and the output module E side (secondary side). The input terminal H11 is connected to the output terminal 32A of the second semiconductor module A22 (semiconductor device B22). The input terminal H12 is connected to the output terminal 32B of the second semiconductor module A22 (semiconductor device B22). The output terminal H21 is connected to the input terminal 31A of the semiconductor device B23 of the output module E. The output terminal H22 is connected to the input terminal 31B of the semiconductor device B23 of the output module E.
　本実施形態においては、図２０および図２１に示すように、入力モジュールＤのｙ方向他方側に第１半導体モジュールＡ２１、コンデンサモジュールＦおよび絶縁電源モジュールＧが配置されている。第１半導体モジュールＡ２１は、ｘ方向においてコンデンサモジュールＦと絶縁電源モジュールＧとに挟まれて配置されている。第２半導体モジュールＡ２２は、第１半導体モジュールＡ２１のｙ方向他方側に配置されている。第２半導体モジュールＡ２２は、ｘ方向においてコンデンサモジュールＦと絶縁電源モジュールＧとに挟まれて配置されている。トランスモジュールＨは、コンデンサモジュールＦ、第２半導体モジュールＡ２２および絶縁電源モジュールＧのｙ方向他方側に配置されている。出力モジュールＥは、トランスモジュールＨのｙ方向他方側に配置されている。半導体装置Ｂ２３は、ｘ方向における位置が、半導体装置Ｂ２１および半導体装置Ｂ２２と略同じとなるように配置されている。 In the present embodiment, as shown in FIGS. 20 and 21, the first semiconductor module A21, the capacitor module F, and the insulated power supply module G are arranged on the other side in the y direction of the input module D. The first semiconductor module A21 is arranged so as to be sandwiched between the capacitor module F and the insulated power supply module G in the x direction. The second semiconductor module A22 is arranged on the other side in the y direction of the first semiconductor module A21. The second semiconductor module A22 is arranged so as to be sandwiched between the capacitor module F and the insulated power supply module G in the x direction. The transformer module H is arranged on the other side in the y direction of the capacitor module F, the second semiconductor module A22, and the insulated power supply module G. The output module E is arranged on the other side in the y direction of the transformer module H. The semiconductor device B23 is arranged so that the position in the x direction is substantially the same as the semiconductor device B21 and the semiconductor device B22.
　図２０、図２１および図２３に示すように、入力モジュールＤの出力端子Ｄ４１と第１半導体モジュールＡ２１（半導体装置Ｂ２１）の入力端子３１Ａの端子部３１２とは、ボルト３５１およびナット３６１によって直接接続されている。ボルト３５１およびナット３６１は、本開示の締結部材の一具体例であり、本開示の固定手段の一例である。出力端子Ｄ４１と端子部３１２とは、締結用孔Ｄ４３および締結用孔３１３がｚ方向視において略一致するように互いに重ねられている。ボルト３５１は、締結用孔Ｄ４３および締結用孔３１３に挿通されている。ナット３６１は、ボルト３５１に螺合されている。ボルト３５１とナット３６１との締結力によって、出力端子Ｄ４１と端子部３１２（入力端子３１Ａ）とが締結（固定）されており、直接接続されている。 As shown in FIGS. 20, 21 and 23, the output terminal D41 of the input module D and the terminal portion 312 of the input terminal 31A of the first semiconductor module A21 (semiconductor device B21) are directly connected by a bolt 351 and a nut 361. Has been done. The bolt 351 and the nut 361 are specific examples of the fastening member of the present disclosure, and are examples of the fixing means of the present disclosure. The output terminal D41 and the terminal portion 312 are overlapped with each other such that the fastening hole D43 and the fastening hole 313 are substantially aligned when viewed in the z direction. The bolt 351 is inserted through the fastening hole D43 and the fastening hole 313. The nut 361 is screwed into the bolt 351. The output terminal D41 and the terminal portion 312 (input terminal 31A) are fastened (fixed) by the fastening force between the bolt 351 and the nut 361, and are directly connected.
　また、入力モジュールＤの出力端子Ｄ４２と第１半導体モジュールＡ２１（半導体装置Ｂ２１）の入力端子３１Ｂの端子部３１２とは、ボルト３５２およびナット３６２によって直接接続されている。ボルト３５２およびナット３６２は、本開示の締結部材の一具体例であり、本開示の固定手段の一例である。出力端子Ｄ４２と端子部３１２とは、締結用孔Ｄ４３および締結用孔３１３がｚ方向視において略一致するように互いに重ねられている。ボルト３５２は、締結用孔Ｄ４３および締結用孔３１３に挿通されている。ナット３６２は、ボルト３５２に螺合されている。ボルト３５２とナット３６２との締結力によって、出力端子Ｄ４２と端子部３１２（入力端子３１Ｂ）とが締結（固定）されており、直接接続されている。 The output terminal D42 of the input module D and the terminal portion 312 of the input terminal 31B of the first semiconductor module A21 (semiconductor device B21) are directly connected by a bolt 352 and a nut 362. The bolt 352 and the nut 362 are specific examples of the fastening member of the present disclosure, and are examples of the fixing means of the present disclosure. The output terminal D42 and the terminal portion 312 are overlapped with each other such that the fastening hole D43 and the fastening hole 313 are substantially aligned when viewed in the z direction. The bolt 352 is inserted through the fastening hole D43 and the fastening hole 313. The nut 362 is screwed onto the bolt 352. The output terminal D42 and the terminal portion 312 (input terminal 31B) are fastened (fixed) by the fastening force between the bolt 352 and the nut 362, and are directly connected.
　図２０、図２１、図２４および図２５に示すように、第１半導体モジュールＡ２１（半導体装置Ｂ２１）の出力端子３２Ａの端子部３２２と、第２半導体モジュールＡ２２（半導体装置Ｂ２２）の入力端子３１Ａの端子部３１２とは、ボルト３５３およびナット３６３によって直接接続されている。ボルト３５３およびナット３６３は、本開示の締結部材の一具体例であり、本開示の固定手段の一例である。半導体装置Ｂ２１の出力端子３２Ａの端子部３２２と半導体装置Ｂ２２の入力端子３１Ａの端子部３１２とは、締結用孔３２３および締結用孔３１３がｚ方向視において略一致するように互いに重ねられている。ボルト３５３は、締結用孔３２３および締結用孔３１３に挿通されている。ナット３６３は、ボルト３５３に螺合されている。ボルト３５３とナット３６３との締結力によって、半導体装置Ｂ２１の出力端子３２Ａの端子部３２２と半導体装置Ｂ２２の入力端子３１Ａの端子部３１２とが締結（固定）されており、直接接続されている。 As shown in FIGS. 20, 21, 24, and 25, the terminal portion 322 of the output terminal 32A of the first semiconductor module A21 (semiconductor device B21) and the input terminal 31A of the second semiconductor module A22 (semiconductor device B22). The terminal portion 312 is directly connected by a bolt 353 and a nut 363. The bolt 353 and the nut 363 are specific examples of the fastening member of the present disclosure, and are examples of the fixing means of the present disclosure. The terminal portion 322 of the output terminal 32A of the semiconductor device B21 and the terminal portion 312 of the input terminal 31A of the semiconductor device B22 are overlapped with each other such that the fastening holes 323 and the fastening holes 313 are substantially aligned when viewed in the z direction. .. The bolt 353 is inserted through the fastening hole 323 and the fastening hole 313. The nut 363 is screwed into the bolt 353. By the fastening force between the bolt 353 and the nut 363, the terminal portion 322 of the output terminal 32A of the semiconductor device B21 and the terminal portion 312 of the input terminal 31A of the semiconductor device B22 are fastened (fixed) and directly connected.
　また、本実施形態においては、半導体装置Ｂ２１の出力端子３２Ａの端子部３２２および半導体装置Ｂ２２の入力端子３１Ａの端子部３１２とともに接続端子Ｆ２１が締結されている。本実施形態の接続端子Ｆ２１は、第１部Ｆ２１１、第２部Ｆ２１２および第３部Ｆ２１３を有する。第１部Ｆ２１１は、スナバコンデンサＦ１の側からｘ方向に直状に延びる部分である。第２部Ｆ２１２は、接続端子Ｆ２１のｙ方向における先端部分であり、第１部Ｆ２１１に対してｚ方向図中下方に位置している。第３部Ｆ２１３は、第１部Ｆ２１１と第２部Ｆ２１２との間に介在しており、ｘ方向およびｚ方向に対して傾いている。第２部Ｆ２１２には、締結用孔Ｆ２１４が形成されている。第２部Ｆ２１２と端子部３２２および端子部３１２とは、締結用孔Ｆ２１４と締結用孔３２３および締結用孔３１３とがｚ方向視において略一致するように互いに重ねられている。ボルト３５３は、締結用孔Ｆ２１４、締結用孔３２３および締結用孔３１３に挿通されている。ナット３６３は、ボルト３５３に螺合されている。ボルト３５３とナット３６３との締結力によって、半導体装置Ｂ２１の出力端子３２Ａの端子部３２２および半導体装置Ｂ２２の入力端子３１Ａの端子部３１２と接続端子Ｆ２１の第２部Ｆ２１２とが締結（固定）されており、直接接続されている。 Further, in this embodiment, the connection terminal F21 is fastened together with the terminal portion 322 of the output terminal 32A of the semiconductor device B21 and the terminal portion 312 of the input terminal 31A of the semiconductor device B22. The connection terminal F21 of this embodiment has a first portion F211, a second portion F212, and a third portion F213. The first portion F211 is a portion that extends straight in the x direction from the snubber capacitor F1 side. The second portion F212 is a tip portion in the y direction of the connection terminal F21, and is located below the first portion F211 in the z direction in the drawing. The third portion F213 is interposed between the first portion F211 and the second portion F212 and is inclined with respect to the x direction and the z direction. A fastening hole F214 is formed in the second portion F212. The second portion F212, the terminal portion 322, and the terminal portion 312 are overlapped with each other such that the fastening hole F214, the fastening hole 323, and the fastening hole 313 are substantially aligned when viewed in the z direction. The bolt 353 is inserted through the fastening hole F214, the fastening hole 323, and the fastening hole 313. The nut 363 is screwed into the bolt 353. By the fastening force between the bolt 353 and the nut 363, the terminal portion 322 of the output terminal 32A of the semiconductor device B21, the terminal portion 312 of the input terminal 31A of the semiconductor device B22, and the second portion F212 of the connection terminal F21 are fastened (fixed). Are connected directly.
　図２０、図２１および図２５に示すように、第１半導体モジュールＡ２１（半導体装置Ｂ２１）の出力端子３２Ｂの端子部３２２と、第２半導体モジュールＡ２２（半導体装置Ｂ２２）の入力端子３１Ｂの端子部３１２とは、ボルト３５４およびナット３６４によって直接接続されている。ボルト３５４およびナット３６４は、本開示の締結部材の一具体例であり、本開示の固定手段の一例である。半導体装置Ｂ２１の出力端子３２Ｂの端子部３２２と半導体装置Ｂ２２の入力端子３１Ｂの端子部３１２とは、締結用孔３２３および締結用孔３１３がｚ方向視において略一致するように互いに重ねられている。ボルト３５４は、締結用孔３２３および締結用孔３１３に挿通されている。ナット３６４は、ボルト３５４に螺合されている。ボルト３５４とナット３６４との締結力によって、半導体装置Ｂ２１の出力端子３２Ｂの端子部３２２と半導体装置Ｂ２２の入力端子３１Ｂの端子部３１２とが締結（固定）されており、直接接続されている。 As shown in FIGS. 20, 21 and 25, the terminal portion 322 of the output terminal 32B of the first semiconductor module A21 (semiconductor device B21) and the terminal portion of the input terminal 31B of the second semiconductor module A22 (semiconductor device B22). It is directly connected to 312 by a bolt 354 and a nut 364. The bolt 354 and the nut 364 are specific examples of the fastening member of the present disclosure, and are examples of the fixing means of the present disclosure. The terminal portion 322 of the output terminal 32B of the semiconductor device B21 and the terminal portion 312 of the input terminal 31B of the semiconductor device B22 are overlapped with each other such that the fastening holes 323 and the fastening holes 313 are substantially aligned when viewed in the z direction. .. The bolt 354 is inserted through the fastening hole 323 and the fastening hole 313. The nut 364 is screwed onto the bolt 354. By the fastening force between the bolt 354 and the nut 364, the terminal portion 322 of the output terminal 32B of the semiconductor device B21 and the terminal portion 312 of the input terminal 31B of the semiconductor device B22 are fastened (fixed) and directly connected.
　また、本実施形態においては、半導体装置Ｂ２１の出力端子３２Ｂの端子部３２２および半導体装置Ｂ２２の入力端子３１Ｂの端子部３１２とともに接続端子Ｆ２２が締結されている。本実施形態の接続端子Ｆ２２は、第１部Ｆ２２１、第２部Ｆ２２２および第３部Ｆ２２３を有する。第１部Ｆ２２１は、スナバコンデンサＦ１の側からｘ方向に直状に延びる部分である。第１部Ｆ２２１は、ｚ方向視においてボルト３５３およびナット３６３によって固定された端子部３１２、端子部３２２および第２部Ｆ２１２と重なっている。また、第１部Ｆ２２１は、ボルト３５３およびナット３６３によって固定された端子部３１２、端子部３２２および第２部Ｆ２１２のｚ方向図中下方に位置している。第２部Ｆ２２２は、接続端子Ｆ２２のｙ方向における先端部分であり、第１部Ｆ２２１に対してｚ方向図中上方に位置している。第３部Ｆ２２３は、第１部Ｆ２２１と第２部Ｆ２２２との間に介在しており、ｘ方向およびｚ方向に対して傾いている。第２部Ｆ２２２には、締結用孔Ｆ２２４が形成されている。第２部Ｆ２２２と端子部３２２および端子部３１２とは、締結用孔Ｆ２２４と締結用孔３２３および締結用孔３１３とがｚ方向視において略一致するように互いに重ねられている。ボルト３５４は、締結用孔Ｆ２２４、締結用孔３２３および締結用孔３１３に挿通されている。ナット３６４は、ボルト３５４に螺合されている。ボルト３５４とナット３６４との締結力によって、半導体装置Ｂ２１の出力端子３２Ｂの端子部３２２および半導体装置Ｂ２２の入力端子３１Ｂの端子部３１２と接続端子Ｆ２２の第２部Ｆ２２２とが締結（固定）されており、直接接続されている。 Also, in the present embodiment, the connection terminal F22 is fastened together with the terminal portion 322 of the output terminal 32B of the semiconductor device B21 and the terminal portion 312 of the input terminal 31B of the semiconductor device B22. The connection terminal F22 of this embodiment has a first portion F221, a second portion F222, and a third portion F223. The first portion F221 is a portion that extends straight in the x direction from the snubber capacitor F1 side. The first portion F221 overlaps the terminal portion 312, the terminal portion 322, and the second portion F212 fixed by the bolt 353 and the nut 363 when viewed in the z direction. The first portion F221 is located below the terminal portion 312, the terminal portion 322, and the second portion F212 fixed by the bolt 353 and the nut 363 in the z direction in the figure. The second portion F222 is a tip portion in the y direction of the connection terminal F22, and is located above the first portion F221 in the z direction in the figure. The third portion F223 is interposed between the first portion F221 and the second portion F222, and is inclined with respect to the x direction and the z direction. A fastening hole F224 is formed in the second portion F222. The second portion F222, the terminal portion 322, and the terminal portion 312 are overlapped with each other such that the fastening hole F224, the fastening hole 323, and the fastening hole 313 are substantially aligned when viewed in the z direction. The bolt 354 is inserted through the fastening hole F224, the fastening hole 323, and the fastening hole 313. The nut 364 is screwed onto the bolt 354. By the fastening force between the bolt 354 and the nut 364, the terminal portion 322 of the output terminal 32B of the semiconductor device B21, the terminal portion 312 of the input terminal 31B of the semiconductor device B22, and the second portion F222 of the connection terminal F22 are fastened (fixed). Connected directly.
　図２０、図２１および図２６に示すように、第２半導体モジュールＡ２２（半導体装置Ｂ２２）の出力端子３２Ａの端子部３２２と、トランスモジュールＨの入力端子Ｈ１１とは、ボルト３５５およびナット３６５によって直接接続されている。ボルト３５５およびナット３６５は、本開示の締結部材の一具体例であり、本開示の固定手段の一例である。半導体装置Ｂ２２の出力端子３２Ａの端子部３２２とトランスモジュールＨの入力端子Ｈ１１とは、締結用孔３２３および締結用孔Ｈ１３がｚ方向視において略一致するように互いに重ねられている。ボルト３５５は、締結用孔３２３および締結用孔Ｈ１３に挿通されている。ナット３６５は、ボルト３５５に螺合されている。ボルト３５５とナット３６５との締結力によって、半導体装置Ｂ２２の出力端子３２Ａの端子部３２２とトランスモジュールＨの締結用孔Ｈ１３とが締結（固定）されており、直接接続されている。 As shown in FIGS. 20, 21 and 26, the terminal portion 322 of the output terminal 32A of the second semiconductor module A22 (semiconductor device B22) and the input terminal H11 of the transformer module H are directly connected by the bolt 355 and the nut 365. It is connected. The bolt 355 and the nut 365 are specific examples of the fastening member of the present disclosure, and are examples of the fixing means of the present disclosure. The terminal portion 322 of the output terminal 32A of the semiconductor device B22 and the input terminal H11 of the transformer module H are overlapped with each other such that the fastening hole 323 and the fastening hole H13 are substantially aligned when viewed in the z direction. The bolt 355 is inserted through the fastening hole 323 and the fastening hole H13. The nut 365 is screwed into the bolt 355. By the fastening force between the bolt 355 and the nut 365, the terminal portion 322 of the output terminal 32A of the semiconductor device B22 and the fastening hole H13 of the transformer module H are fastened (fixed) and directly connected.
　また、第２半導体モジュールＡ２２（半導体装置Ｂ２２）の出力端子３２Ｂの端子部３２２と、トランスモジュールＨの入力端子Ｈ１２とは、ボルト３５６およびナット３６６によって直接接続されている。ボルト３５６およびナット３６６は、本開示の締結部材の一具体例であり、本開示の固定手段の一例である。半導体装置Ｂ２２の出力端子３２Ｂの端子部３２２とトランスモジュールＨの入力端子Ｈ１２とは、締結用孔３２３および締結用孔Ｈ１３がｚ方向視において略一致するように互いに重ねられている。ボルト３５６は、締結用孔３２３および締結用孔Ｈ１３に挿通されている。ナット３６６は、ボルト３５６に螺合されている。ボルト３５６とナット３６６との締結力によって、半導体装置Ｂ２２の出力端子３２Ｂの端子部３２２とトランスモジュールＨの締結用孔Ｈ１３とが締結（固定）されており、直接接続されている。 The terminal portion 322 of the output terminal 32B of the second semiconductor module A22 (semiconductor device B22) and the input terminal H12 of the transformer module H are directly connected by the bolt 356 and the nut 366. The bolt 356 and the nut 366 are specific examples of the fastening member of the present disclosure, and are examples of the fixing means of the present disclosure. The terminal portion 322 of the output terminal 32B of the semiconductor device B22 and the input terminal H12 of the transformer module H are overlapped with each other such that the fastening hole 323 and the fastening hole H13 are substantially aligned when viewed in the z direction. The bolt 356 is inserted through the fastening hole 323 and the fastening hole H13. The nut 366 is screwed onto the bolt 356. By the fastening force between the bolt 356 and the nut 366, the terminal portion 322 of the output terminal 32B of the semiconductor device B22 and the fastening hole H13 of the transformer module H are fastened (fixed) and directly connected.
　図２０および図２７に示すように、トランスモジュールＨの出力端子Ｈ２１と、半導体装置Ｂ２３の入力端子３１Ａの端子部３１２とは、ボルト３５７およびナット３６７によって直接接続されている。ボルト３５７およびナット３６７は、本開示の締結部材の一具体例であり、本開示の固定手段の一例である。トランスモジュールＨの出力端子Ｈ２１と、半導体装置Ｂ２３の入力端子３１Ａの端子部３１２とは、締結用孔Ｈ２３および締結用孔３１３がｚ方向視において略一致するように互いに重ねられている。ボルト３５７は、締結用孔Ｈ２３および締結用孔３１３に挿通されている。ナット３６７は、ボルト３５７に螺合されている。ボルト３５７とナット３６７との締結力によって、トランスモジュールＨの出力端子Ｈ２１と、半導体装置Ｂ２３の入力端子３１Ａの端子部３１２とが締結（固定）されており、直接接続されている。 As shown in FIGS. 20 and 27, the output terminal H21 of the transformer module H and the terminal portion 312 of the input terminal 31A of the semiconductor device B23 are directly connected by a bolt 357 and a nut 367. The bolt 357 and the nut 367 are specific examples of the fastening member of the present disclosure, and are examples of the fixing means of the present disclosure. The output terminal H21 of the transformer module H and the terminal portion 312 of the input terminal 31A of the semiconductor device B23 are overlapped with each other such that the fastening hole H23 and the fastening hole 313 are substantially aligned when viewed in the z direction. The bolt 357 is inserted through the fastening hole H23 and the fastening hole 313. The nut 367 is screwed onto the bolt 357. By the fastening force between the bolt 357 and the nut 367, the output terminal H21 of the transformer module H and the terminal portion 312 of the input terminal 31A of the semiconductor device B23 are fastened (fixed) and directly connected.
　また、トランスモジュールＨの出力端子Ｈ２２と、半導体装置Ｂ２３の入力端子３１Ｂの端子部３１２とは、ボルト３５８およびナット３６８によって直接接続されている。ボルト３５８およびナット３６８は、本開示の締結部材の一具体例であり、本開示の固定手段の一例である。トランスモジュールＨの出力端子Ｈ２２と、半導体装置Ｂ２３の入力端子３１Ｂの端子部３１２とは、締結用孔Ｈ２３および締結用孔３１３がｚ方向視において略一致するように互いに重ねられている。ボルト３５８は、締結用孔Ｈ２３および締結用孔３１３に挿通されている。ナット３６８は、ボルト３５８に螺合されている。ボルト３５８とナット３６８との締結力によって、トランスモジュールＨの出力端子Ｈ２２と、半導体装置Ｂ２３の入力端子３１Ｂの端子部３１２とが締結（固定）されており、直接接続されている。 The output terminal H22 of the transformer module H and the terminal portion 312 of the input terminal 31B of the semiconductor device B23 are directly connected by a bolt 358 and a nut 368. The bolt 358 and the nut 368 are specific examples of the fastening member of the present disclosure, and are examples of the fixing means of the present disclosure. The output terminal H22 of the transformer module H and the terminal portion 312 of the input terminal 31B of the semiconductor device B23 are overlapped with each other such that the fastening hole H23 and the fastening hole 313 are substantially aligned when viewed in the z direction. The bolt 358 is inserted through the fastening hole H23 and the fastening hole 313. The nut 368 is screwed onto the bolt 358. By the fastening force between the bolt 358 and the nut 368, the output terminal H22 of the transformer module H and the terminal portion 312 of the input terminal 31B of the semiconductor device B23 are fastened (fixed) and directly connected.
　図２０および図２８に示すように、半導体装置Ｂ２３の出力端子３２Ａと、出力基板Ｅ３とは、ボルト３５９およびナット３６９によって直接接続されている。ボルト３５９およびナット３６９は、本開示の締結部材の一具体例であり、本開示の固定手段の一例である。半導体装置Ｂ２３の出力端子３２Ａの端子部３２２と出力基板Ｅ３とは、締結用孔３２３および締結用孔Ｅ３１がｚ方向視において略一致するように互いに重ねられている。ボルト３５９は、締結用孔３２３および締結用孔Ｅ３１に挿通されている。ナット３６９は、ボルト３５９に螺合されている。ボルト３５９とナット３６９との締結力によって、半導体装置Ｂ２３の出力端子３２Ａの端子部３２２と出力基板Ｅ３とが締結（固定）されており、直接接続されている。 As shown in FIGS. 20 and 28, the output terminal 32A of the semiconductor device B23 and the output board E3 are directly connected by the bolt 359 and the nut 369. The bolt 359 and the nut 369 are specific examples of the fastening member of the present disclosure, and are examples of the fixing means of the present disclosure. The terminal portion 322 of the output terminal 32A of the semiconductor device B23 and the output board E3 are overlapped with each other such that the fastening hole 323 and the fastening hole E31 are substantially aligned when viewed in the z direction. The bolt 359 is inserted through the fastening hole 323 and the fastening hole E31. The nut 369 is screwed onto the bolt 359. The terminal portion 322 of the output terminal 32A of the semiconductor device B23 and the output substrate E3 are fastened (fixed) by the fastening force of the bolt 359 and the nut 369, and are directly connected.
　また、半導体装置Ｂ２３の出力端子３２Ｂと、出力基板Ｅ３とは、ボルト３５ａおよびナット３６ａによって直接接続されている。ボルト３５ａおよびナット３６ａは、本開示の締結部材の一具体例であり、本開示の固定手段の一例である。半導体装置Ｂ２３の出力端子３２Ｂの端子部３２２と出力基板Ｅ３とは、締結用孔３２３および締結用孔Ｅ３１がｚ方向視において略一致するように互いに重ねられている。ボルト３５ａは、締結用孔３２３および締結用孔Ｅ３１に挿通されている。ナット３６ａは、ボルト３５ａに螺合されている。ボルト３５ａとナット３６ａとの締結力によって、半導体装置Ｂ２３の出力端子３２Ｂの端子部３２２と出力基板Ｅ３とが締結（固定）されており、直接接続されている。 The output terminal 32B of the semiconductor device B23 and the output board E3 are directly connected by the bolt 35a and the nut 36a. The bolt 35a and the nut 36a are specific examples of the fastening member of the present disclosure, and are examples of the fixing means of the present disclosure. The terminal portion 322 of the output terminal 32B of the semiconductor device B23 and the output board E3 are overlapped with each other such that the fastening hole 323 and the fastening hole E31 are substantially aligned when viewed in the z direction. The bolt 35a is inserted through the fastening hole 323 and the fastening hole E31. The nut 36a is screwed into the bolt 35a. The terminal portion 322 of the output terminal 32B of the semiconductor device B23 and the output board E3 are fastened (fixed) by the fastening force between the bolt 35a and the nut 36a, and are directly connected.
　本実施形態によれば、図２０～図２２、図２４および図２５に示すように、第１半導体モジュールＡ２１（半導体装置Ｂ２１）の出力端子３２Ａの端子部３２２と第２半導体モジュールＡ２２（半導体装置Ｂ２２）の入力端子３１Ａの端子部３１２とが、固定手段であるボルト３５３およびナット３６３によって直接接続されている。これにより、出力端子３２Ａと入力端子３１Ａとの接続経路におけるインダクタンスを低減することが可能であり、ＡＣ／ＤＣコンバータユニットＣ１の応答性をより高めることができる。また、第１半導体モジュールＡ２１（半導体装置Ｂ２１）の出力端子３２Ｂの端子部３２２と第２半導体モジュールＡ２２（半導体装置Ｂ２２）の入力端子３１Ｂの端子部３１２とが、固定手段であるボルト３５４およびナット３６４によって直接接続されている。これにより、出力端子３２Ｂと入力端子３１Ｂとの接続経路におけるインダクタンスを低減することが可能であり、ＡＣ／ＤＣコンバータユニットＣ１の応答性をより高めることができる。 According to the present embodiment, as shown in FIGS. 20 to 22, 24 and 25, the terminal portion 322 of the output terminal 32A of the first semiconductor module A21 (semiconductor device B21) and the second semiconductor module A22 (semiconductor device The terminal portion 312 of the input terminal 31A of B22) is directly connected by the bolt 353 and the nut 363 which are fixing means. Thereby, the inductance in the connection path between the output terminal 32A and the input terminal 31A can be reduced, and the responsiveness of the AC/DC converter unit C1 can be further enhanced. Further, the terminal portion 322 of the output terminal 32B of the first semiconductor module A21 (semiconductor device B21) and the terminal portion 312 of the input terminal 31B of the second semiconductor module A22 (semiconductor device B22) are fixing means such as a bolt 354 and a nut. It is directly connected by 364. As a result, the inductance in the connection path between the output terminal 32B and the input terminal 31B can be reduced, and the responsiveness of the AC/DC converter unit C1 can be further enhanced.
　封止樹脂６０から突出する端子部３１２および端子部３２２は、ｙ方向に直状に延びる形状である。これにより、端子部３１２および端子部３２２自体のインダクタンスを低減することが可能であり、ＡＣ／ＤＣコンバータユニットＣ１の応答性をより高めるのに好ましい。 The terminal portion 312 and the terminal portion 322 protruding from the sealing resin 60 have a shape that extends straight in the y direction. This makes it possible to reduce the inductance of the terminal portion 312 and the terminal portion 322 itself, which is preferable for further enhancing the responsiveness of the AC/DC converter unit C1.
　固定手段として、締結手段であるボルト３５３およびナット３６３やボルト３５４およびナット３６４を用いることは、確実な接続を実現するとともに、第１半導体モジュールＡ２１（半導体装置Ｂ２１）および第２半導体モジュールＡ２２（半導体装置Ｂ２２）のいずれか一方をＡＣ／ＤＣコンバータユニットＣ１から取り外し、その後取り付けることを容易に行うことができる。これにより、第１半導体モジュールＡ２１（半導体装置Ｂ２１）および第２半導体モジュールＡ２２（半導体装置Ｂ２２）のいずれか一方をより容易に交換可能である。 By using the bolt 353 and the nut 363 or the bolt 354 and the nut 364 which are the fastening means as the fixing means, a reliable connection is realized, and the first semiconductor module A21 (semiconductor device B21) and the second semiconductor module A22 (semiconductor module). Either one of the devices B22) can be easily removed from the AC/DC converter unit C1 and then attached. This makes it possible to more easily replace one of the first semiconductor module A21 (semiconductor device B21) and the second semiconductor module A22 (semiconductor device B22).
　図２０、図２１、図２４および図２５に示すように、本実施形態においては、接続端子Ｆ２１の第２部Ｆ２１２が、出力端子３２Ａの端子部３２２および入力端子３１Ａの端子部３１２とともに、固定手段であるボルト３５３およびナット３６３によって、互いに直接接続されている。これにより、第１半導体モジュールＡ２１（半導体装置Ｂ２１）、第２半導体モジュールＡ２２（半導体装置Ｂ２２）およびコンデンサモジュールＦを接続する接続経路のインダクタンスを低減することができる。 As shown in FIGS. 20, 21, 24, and 25, in the present embodiment, the second portion F212 of the connection terminal F21 is fixed together with the terminal portion 322 of the output terminal 32A and the terminal portion 312 of the input terminal 31A. They are directly connected to each other by means of bolts 353 and nuts 363. Thereby, the inductance of the connection path connecting the first semiconductor module A21 (semiconductor device B21), the second semiconductor module A22 (semiconductor device B22) and the capacitor module F can be reduced.
　また、本実施形態においては、接続端子Ｆ２２の第２部Ｆ２２２が、出力端子３２Ｂの端子部３２２および入力端子３１Ｂの端子部３１２とともに、固定手段であるボルト３５４およびナット３６４によって、互いに直接接続されている。これにより、第１半導体モジュールＡ２１（半導体装置Ｂ２１）、第２半導体モジュールＡ２２（半導体装置Ｂ２２）およびコンデンサモジュールＦを接続する接続経路のインダクタンスを低減することができる。 In addition, in the present embodiment, the second portion F222 of the connection terminal F22 is directly connected to the terminal portion 322 of the output terminal 32B and the terminal portion 312 of the input terminal 31B by bolts 354 and nuts 364 that are fixing means. ing. Thereby, the inductance of the connection path connecting the first semiconductor module A21 (semiconductor device B21), the second semiconductor module A22 (semiconductor device B22) and the capacitor module F can be reduced.
　図２０、図２１および図２３に示すように、入力モジュールＤの出力端子Ｄ４１と第１半導体モジュールＡ２１（半導体装置Ｂ２１）の入力端子３１Ａの端子部３１２とが、固定手段であるボルト３５１およびナット３６１によって直接接続されている。また、入力モジュールＤの出力端子Ｄ４２と第１半導体モジュールＡ２１（半導体装置Ｂ２１）の入力端子３１Ｂの端子部３１２とが、ボルト３５２およびナット３６２によって直接接続されている。これにより、出力端子Ｄ４１，Ｄ４２と入力端子３１Ａ，３１Ｂとの接続経路におけるインダクタンスを低減することが可能であり、ＡＣ／ＤＣコンバータユニットＣ１の応答性をより高めることができる。 As shown in FIGS. 20, 21 and 23, the output terminal D41 of the input module D and the terminal portion 312 of the input terminal 31A of the first semiconductor module A21 (semiconductor device B21) are fixing means such as a bolt 351 and a nut. It is directly connected by 361. The output terminal D42 of the input module D and the terminal portion 312 of the input terminal 31B of the first semiconductor module A21 (semiconductor device B21) are directly connected by the bolt 352 and the nut 362. Thereby, the inductance in the connection path between the output terminals D41, D42 and the input terminals 31A, 31B can be reduced, and the responsiveness of the AC/DC converter unit C1 can be further enhanced.
　出力端子Ｄ４１，Ｄ４２および端子部３１２は、ｙ方向に直状に延びる形状である。これにより、出力端子Ｄ４１，Ｄ４２および端子部３１２自体のインダクタンスを低減することが可能であり、ＡＣ／ＤＣコンバータユニットＣ１の応答性をより高めるのに好ましい。 The output terminals D41, D42 and the terminal portion 312 have a shape that extends straight in the y direction. This makes it possible to reduce the inductance of the output terminals D41, D42 and the terminal portion 312 itself, which is preferable for further enhancing the responsiveness of the AC/DC converter unit C1.
　固定手段として、締結手段であるボルト３５１およびナット３６１やボルト３５２およびナット３６２を用いることは、確実な接続を実現するとともに、入力モジュールＤおよび第１半導体モジュールＡ２１（半導体装置Ｂ２１）のいずれか一方をＡＣ／ＤＣコンバータユニットＣ１から取り外し、その後取り付けることを容易に行うことができる。これにより、入力モジュールＤおよび第１半導体モジュールＡ２１（半導体装置Ｂ２１）のいずれか一方をより容易に交換可能である。 By using the bolt 351 and the nut 361 or the bolt 352 and the nut 362 which are the fastening means as the fixing means, a reliable connection is realized and at the same time, one of the input module D and the first semiconductor module A21 (semiconductor device B21) is provided. Can be easily removed from the AC/DC converter unit C1 and then attached. Thereby, either the input module D or the first semiconductor module A21 (semiconductor device B21) can be replaced more easily.
　図２０、図２１および図２６に示すように、第２半導体モジュールＡ２２（半導体装置Ｂ２２）の出力端子３２Ａの端子部３２２とトランスモジュールＨの入力端子Ｈ１１とが、固定手段であるボルト３５５およびナット３６５によって直接接続されている。また、第２半導体モジュールＡ２２（半導体装置Ｂ２２）の出力端子３２Ｂの端子部３２２とトランスモジュールＨの入力端子Ｈ１２とが、固定手段であるボルト３５６およびナット３６６によって直接接続されている。これにより、出力端子３２Ａ，３２Ｂと入力端子Ｈ１１，Ｈ１２との接続経路におけるインダクタンスを低減することが可能であり、ＡＣ／ＤＣコンバータユニットＣ１の応答性をより高めることができる。 As shown in FIGS. 20, 21, and 26, the terminal portion 322 of the output terminal 32A of the second semiconductor module A22 (semiconductor device B22) and the input terminal H11 of the transformer module H are bolts 355 and nuts that are fixing means. It is directly connected by 365. Further, the terminal portion 322 of the output terminal 32B of the second semiconductor module A22 (semiconductor device B22) and the input terminal H12 of the transformer module H are directly connected by the bolt 356 and the nut 366 which are fixing means. As a result, the inductance in the connection path between the output terminals 32A and 32B and the input terminals H11 and H12 can be reduced, and the responsiveness of the AC/DC converter unit C1 can be further enhanced.
　端子部３２２および入力端子Ｈ１１，Ｈ１２は、ｙ方向に直状に延びる形状である。これにより、端子部３２２および入力端子Ｈ１１，Ｈ１２自体のインダクタンスを低減することが可能であり、ＡＣ／ＤＣコンバータユニットＣ１の応答性をより高めるのに好ましい。 The terminal portion 322 and the input terminals H11 and H12 have a shape that extends straight in the y direction. This makes it possible to reduce the inductance of the terminal portion 322 and the input terminals H11 and H12 itself, which is preferable for further enhancing the responsiveness of the AC/DC converter unit C1.
　固定手段として、締結手段であるボルト３５５およびナット３６５やボルト３５６およびナット３６６を用いることは、確実な接続を実現するとともに、第２半導体モジュールＡ２２（半導体装置Ｂ２２）および出力モジュールＥのいずれか一方をＡＣ／ＤＣコンバータユニットＣ１から取り外し、その後取り付けることを容易に行うことができる。これにより、第２半導体モジュールＡ２２（半導体装置Ｂ２２）および出力モジュールＥのいずれか一方をより容易に交換可能である。 By using the bolt 355 and the nut 365 or the bolt 356 and the nut 366 which are the fastening means as the fixing means, a reliable connection is realized, and at least one of the second semiconductor module A22 (semiconductor device B22) and the output module E is provided. Can be easily removed from the AC/DC converter unit C1 and then attached. As a result, either the second semiconductor module A22 (semiconductor device B22) or the output module E can be replaced more easily.
　図２０および図２７に示すように、トランスモジュールＨの出力端子Ｈ２１と、半導体装置Ｂ２３の入力端子３１Ａの端子部３１２とが、固定手段であるボルト３５７およびナット３６７によって直接接続されている。また、トランスモジュールＨの出力端子Ｈ２２と、半導体装置Ｂ２３の入力端子３１Ｂの端子部３１２とが、固定手段であるボルト３５８およびナット３６８によって直接接続されている。これにより、出力端子Ｈ２１，Ｈ２２と入力端子３１Ａ，３１Ｂとの接続経路におけるインダクタンスを低減することが可能であり、ＡＣ／ＤＣコンバータユニットＣ１の応答性をより高めることができる。 As shown in FIGS. 20 and 27, the output terminal H21 of the transformer module H and the terminal portion 312 of the input terminal 31A of the semiconductor device B23 are directly connected by a bolt 357 and a nut 367 which are fixing means. Further, the output terminal H22 of the transformer module H and the terminal portion 312 of the input terminal 31B of the semiconductor device B23 are directly connected by the bolt 358 and the nut 368 which are fixing means. As a result, the inductance in the connection path between the output terminals H21, H22 and the input terminals 31A, 31B can be reduced, and the responsiveness of the AC/DC converter unit C1 can be further enhanced.
　出力端子Ｈ２１，Ｈ２２および端子部３１２は、ｙ方向に直状に延びる形状である。これにより、出力端子Ｈ２１，Ｈ２２および端子部３１２自体のインダクタンスを低減することが可能であり、ＡＣ／ＤＣコンバータユニットＣ１の応答性をより高めるのに好ましい。 The output terminals H21, H22 and the terminal portion 312 have a shape that extends straight in the y direction. This makes it possible to reduce the inductance of the output terminals H21, H22 and the terminal portion 312 itself, which is preferable for further enhancing the responsiveness of the AC/DC converter unit C1.
　固定手段として、締結手段であるボルト３５７およびナット３６７やボルト３５８およびナット３６８を用いることは、確実な接続を実現するとともに、トランスモジュールＨおよび半導体装置Ｂ２３のいずれか一方をＡＣ／ＤＣコンバータユニットＣ１から取り外し、その後取り付けることを容易に行うことができる。これにより、トランスモジュールＨおよび半導体装置Ｂ２３のいずれか一方をより容易に交換可能である。 By using the bolt 357 and the nut 367 or the bolt 358 and the nut 368 which are the fastening means as the fixing means, a reliable connection is realized, and at least one of the transformer module H and the semiconductor device B23 is connected to the AC/DC converter unit C1. It can be easily removed and then attached. As a result, either the transformer module H or the semiconductor device B23 can be replaced more easily.
　図２０および図２８に示すように、半導体装置Ｂ２３の出力端子３２Ａの端子部３２２と、出力基板Ｅ３とが、固定手段であるボルト３５９およびナット３６９によって直接接続されている。また、半導体装置Ｂ２３の出力端子３２Ｂの端子部３２２と、出力基板Ｅ３とが、固定手段であるボルト３５ａおよびナット３６ａによって直接接続されている。これにより、出力端子３２Ａ，３２Ｂと出力基板Ｅ３との接続経路におけるインダクタンスを低減することが可能であり、ＡＣ／ＤＣコンバータユニットＣ１の応答性をより高めることができる。 As shown in FIGS. 20 and 28, the terminal portion 322 of the output terminal 32A of the semiconductor device B23 and the output board E3 are directly connected by the bolt 359 and the nut 369 which are fixing means. Further, the terminal portion 322 of the output terminal 32B of the semiconductor device B23 and the output board E3 are directly connected by the bolt 35a and the nut 36a which are fixing means. As a result, the inductance in the connection path between the output terminals 32A and 32B and the output board E3 can be reduced, and the responsiveness of the AC/DC converter unit C1 can be further enhanced.
　固定手段として、締結手段であるボルト３５９およびナット３６９やボルト３５ａおよびナット３６ａを用いることは、確実な接続を実現するとともに、半導体装置Ｂ２３をＡＣ／ＤＣコンバータユニットＣ１から取り外し、その後取り付けることを容易に行うことができる。これにより、半導体装置Ｂ２３をより容易に交換可能である。 By using the bolt 359 and the nut 369 or the bolt 35a and the nut 36a which are the fastening means as the fixing means, a reliable connection is realized, and the semiconductor device B23 is easily removed from the AC/DC converter unit C1 and then attached. Can be done. Thereby, the semiconductor device B23 can be replaced more easily.
　図２９～図５０は、本開示の変形例および他の実施形態を示している。なお、これらの図において、上記実施形態と同一または類似の要素には、上記実施形態と同一の符号を付している。 29 to 50 show modifications and other embodiments of the present disclosure. In these figures, the same or similar elements as those in the above-described embodiment are designated by the same reference numerals as those in the above-described embodiment.
〔ＡＣ／ＤＣコンバータユニットＣ１　第１変形例〕
　図２９は、ＡＣ／ＤＣコンバータユニットＣ１の第１変形例を示している。本変形例のＡＣ／ＤＣコンバータユニットＣ１１は、第１半導体モジュールＡ２１、第２半導体モジュールＡ２２、コンデンサモジュールＦ、絶縁電源モジュールＧおよび半導体装置Ｂ２３の配置が、上述したＡＣ／ＤＣコンバータユニットＣ１と異なる。 [AC/DC Converter Unit C1 First Modification]
FIG. 29 shows a first modification of the AC/DC converter unit C1. The AC/DC converter unit C11 of this modification is different from the above-mentioned AC/DC converter unit C1 in the arrangement of the first semiconductor module A21, the second semiconductor module A22, the capacitor module F, the insulated power supply module G, and the semiconductor device B23. ..
　本変形例においては、コンデンサモジュールＦが、ｘ方向において絶縁電源モジュールＧと第１半導体モジュールＡ２１および第２半導体モジュールＡ２２の間に配置されている。また、半導体装置Ｂ２３は、ｘ方向における位置が半導体装置Ｂ２１および半導体装置Ｂ２２と同じとなるように配置されており、出力モジュールＥのｘ方向中心に対して偏った配置とされている。 In this modification, the capacitor module F is arranged between the insulated power supply module G and the first semiconductor module A21 and the second semiconductor module A22 in the x direction. Further, the semiconductor device B23 is arranged so that the position in the x direction is the same as that of the semiconductor devices B21 and B22, and is arranged deviated from the center of the output module E in the x direction.
　本変形例によっても、ＡＣ／ＤＣコンバータユニットＣ１と同様に、応答性をより高めることができる。また、本変形例から理解されるように、第１半導体モジュールＡ２１、第２半導体モジュールＡ２２、コンデンサモジュールＦ、絶縁電源モジュールＧおよび半導体装置Ｂ２３の配置等の配置は種々に変更可能である。 According to this modification, the responsiveness can be further enhanced as in the AC/DC converter unit C1. Further, as understood from this modification, the arrangement of the first semiconductor module A21, the second semiconductor module A22, the capacitor module F, the insulated power supply module G, and the semiconductor device B23 can be changed variously.
〔ＡＣ／ＤＣコンバータユニットＣ１　第２変形例〕
　図３０は、ＡＣ／ＤＣコンバータユニットＣ１の第２変形例を示している。本変形例のＡＣ／ＤＣコンバータユニットＣ１２は、半導体装置Ｂ２３の配置が上述したＡＣ／ＤＣコンバータユニットＣ１と異なっている。 [AC/DC Converter Unit C1 Second Modification]
FIG. 30 shows a second modification of the AC/DC converter unit C1. The AC/DC converter unit C12 of this modification is different from the above-described AC/DC converter unit C1 in the arrangement of the semiconductor device B23.
　本変形例においては、半導体装置Ｂ２３は、半導体装置Ｂ２１および半導体装置Ｂ２２に対して、ｘ方向にシフトした位置に配置されている。言い換えると、半導体装置Ｂ２３は、ｙ方向視において半導体装置Ｂ２１および半導体装置Ｂ２２から離間している。本変形例によっても、ＡＣ／ＤＣコンバータユニットＣ１と同様に、応答性をより高めることができる。 In this modification, the semiconductor device B23 is arranged at a position shifted in the x direction with respect to the semiconductor devices B21 and B22. In other words, the semiconductor device B23 is separated from the semiconductor devices B21 and B22 when viewed in the y direction. Also according to this modification, the responsiveness can be further enhanced as in the AC/DC converter unit C1.
〔ＡＣ／ＤＣコンバータユニットＣ１　第３変形例〕
　図３１～図３３は、ＡＣ／ＤＣコンバータユニットＣ１の第３変形例を示している。本変形例のＡＣ／ＤＣコンバータユニットＣ１３は、出力端子Ｈ２１および出力端子Ｈ２２と、半導体装置Ｂ２３の入力端子３１Ａ、入力端子３１Ｂ、出力端子３２Ａおよび出力端子３２Ｂの固定態様が、上述したＡＣ／ＤＣコンバータユニットＣ１と異なっている。 [AC/DC Converter Unit C1 Third Modification]
31 to 33 show a third modification of the AC/DC converter unit C1. In the AC/DC converter unit C13 of this modification, the output terminal H21 and the output terminal H22, and the input terminal 31A, the input terminal 31B, the output terminal 32A, and the output terminal 32B of the semiconductor device B23 are fixed in the above-described AC/DC. It is different from the converter unit C1.
　本変形例においては、図３１および図３２に示すように、半導体装置Ｂ２３の入力端子３１Ａの端子部３１２は、固定手段の一例である溶接部３７７によって出力基板Ｅ３に直接固定されている。図示された例においては、出力基板Ｅ３の溶接用孔Ｅ３２に端子部３１２が挿通されており、溶接部３７７が設けられている。なお、溶接部３７７の具体的な溶接形式はなんら限定されない。いわゆる溶接棒を用いて溶接ビードを形成する形式であってもよいし、端子部３１２等を溶融させることによって溶接ビードを形成する形式であってもよい。この点は、以降に述べる各溶接部についても同様である。 In this modification, as shown in FIGS. 31 and 32, the terminal portion 312 of the input terminal 31A of the semiconductor device B23 is directly fixed to the output substrate E3 by the welding portion 377 which is an example of fixing means. In the illustrated example, the terminal portion 312 is inserted into the welding hole E32 of the output board E3, and the welding portion 377 is provided. The specific welding form of the welded portion 377 is not limited at all. A so-called welding rod may be used to form the welding bead, or a welding bead may be formed by melting the terminal portion 312 or the like. This point is the same for each welded portion described below.
　また、半導体装置Ｂ２３の入力端子３１Ｂの端子部３１２は、固定手段の一例である溶接部３７８によって出力基板Ｅ３に直接固定されている。図示された例においては、出力基板Ｅ３の溶接用孔Ｅ３２に端子部３１２が挿通されており、溶接部３７８が設けられている。なお、溶接部３７８の具体的な溶接形式はなんら限定されない。 Further, the terminal portion 312 of the input terminal 31B of the semiconductor device B23 is directly fixed to the output board E3 by the welded portion 378 which is an example of fixing means. In the illustrated example, the terminal portion 312 is inserted through the welding hole E32 of the output board E3, and the welding portion 378 is provided. The specific welding form of the welded portion 378 is not limited at all.
　図３１および図３２に示すように、半導体装置Ｂ２３の出力端子３２Ａの端子部３２２は、固定手段の一例である溶接部３７９によって出力基板Ｅ３に直接固定されている。図示された例においては、出力基板Ｅ３の溶接用孔Ｅ３２に端子部３２２が挿通されており、溶接部３７９が設けられている。なお、溶接部３７９の具体的な溶接形式はなんら限定されない。 As shown in FIGS. 31 and 32, the terminal portion 322 of the output terminal 32A of the semiconductor device B23 is directly fixed to the output substrate E3 by the welded portion 379 which is an example of a fixing means. In the illustrated example, the terminal portion 322 is inserted through the welding hole E32 of the output substrate E3, and the welding portion 379 is provided. The specific welding form of the welded portion 379 is not limited at all.
　また、半導体装置Ｂ２３の出力端子３２Ｂの端子部３２２は、固定手段の一例である溶接部３７ａによって出力基板Ｅ３に直接固定されている。図示された例においては、出力基板Ｅ３の溶接用孔Ｅ３２に端子部３２２が挿通されており、溶接部３７ａが設けられている。なお、溶接部３７ａの具体的な溶接形式はなんら限定されない。 Further, the terminal portion 322 of the output terminal 32B of the semiconductor device B23 is directly fixed to the output substrate E3 by the welded portion 37a which is an example of fixing means. In the illustrated example, the terminal portion 322 is inserted through the welding hole E32 of the output substrate E3, and the welding portion 37a is provided. The specific welding form of the welded portion 37a is not limited at all.
　本変形例によっても、ＡＣ／ＤＣコンバータユニットＣ１と同様に、応答性をより高めることができる。また、固定手段として溶接部３７７，３７８，３７９，３７ａを用いた場合であっても、インダクタンスの低減に寄与できる。また、本開示における直接接続された構成には、溶接棒由来の溶接ビードを介して双方が固定されている形態を含む概念である。 According to this modification, the responsiveness can be further enhanced as in the AC/DC converter unit C1. Further, even when the welded parts 377, 378, 379, 37a are used as the fixing means, the inductance can be reduced. Further, the configuration of the present disclosure directly connected is a concept including a configuration in which both are fixed via a welding bead derived from a welding rod.
〔ＡＣ／ＤＣコンバータユニットＣ１　第４変形例〕
　図３４は、ＡＣ／ＤＣコンバータユニットＣ１の第４変形例を示している。本変形例のＡＣ／ＤＣコンバータユニットＣ１４は、第１半導体モジュールＡ２１、第２半導体モジュールＡ２２、コンデンサモジュールＦ、絶縁電源モジュールＧおよび半導体装置Ｂ２３の配置が、上述したＡＣ／ＤＣコンバータユニットＣ１３と異なる。 [AC/DC Converter Unit C1 Fourth Modification]
FIG. 34 shows a fourth modification of the AC/DC converter unit C1. The AC/DC converter unit C14 of this modification is different from the above-described AC/DC converter unit C13 in the arrangement of the first semiconductor module A21, the second semiconductor module A22, the capacitor module F, the insulated power supply module G, and the semiconductor device B23. ..
　本変形例においては、コンデンサモジュールＦが、ｘ方向において絶縁電源モジュールＧと第１半導体モジュールＡ２１および第２半導体モジュールＡ２２の間に配置されている。また、半導体装置Ｂ２３は、ｘ方向における位置が半導体装置Ｂ２１および半導体装置Ｂ２２と同じとなるように配置されており、出力モジュールＥのｘ方向中心に対して偏った配置とされている。 In this modification, the capacitor module F is arranged between the insulated power supply module G and the first semiconductor module A21 and the second semiconductor module A22 in the x direction. Further, the semiconductor device B23 is arranged so that the position in the x direction is the same as that of the semiconductor devices B21 and B22, and the semiconductor device B23 is arranged so as to be deviated from the center of the output module E in the x direction.
　本変形例によっても、ＡＣ／ＤＣコンバータユニットＣ１と同様に、応答性をより高めることができる。また、本変形例から理解されるように、第１半導体モジュールＡ２１、第２半導体モジュールＡ２２、コンデンサモジュールＦ、絶縁電源モジュールＧおよび半導体装置Ｂ２３の配置等の配置は種々に変更可能である。 According to this modification, the responsiveness can be further enhanced as in the AC/DC converter unit C1. Further, as understood from this modification, the arrangement of the first semiconductor module A21, the second semiconductor module A22, the capacitor module F, the insulated power supply module G, and the semiconductor device B23 can be changed variously.
〔ＡＣ／ＤＣコンバータユニットＣ１　第５変形例〕
　図３５は、ＡＣ／ＤＣコンバータユニットＣ１の第５変形例を示している。本変形例のＡＣ／ＤＣコンバータユニットＣ１５は、半導体装置Ｂ２３の配置が上述したＡＣ／ＤＣコンバータユニットＣ１３と異なっている。 [AC/DC Converter Unit C1 Fifth Modification]
FIG. 35 shows a fifth modification of the AC/DC converter unit C1. The AC/DC converter unit C15 of this modification is different from the above-described AC/DC converter unit C13 in the arrangement of the semiconductor device B23.
　本変形例においては、半導体装置Ｂ２３は、半導体装置Ｂ２１および半導体装置Ｂ２２に対して、ｘ方向にシフトした位置に配置されている。言い換えると、半導体装置Ｂ２３は、ｙ方向視において半導体装置Ｂ２１および半導体装置Ｂ２２から離間している。本変形例によっても、ＡＣ／ＤＣコンバータユニットＣ１と同様に、応答性をより高めることができる。 In this modification, the semiconductor device B23 is arranged at a position shifted in the x direction with respect to the semiconductor devices B21 and B22. In other words, the semiconductor device B23 is separated from the semiconductor devices B21 and B22 when viewed in the y direction. Also according to this modification, the responsiveness can be further enhanced as in the AC/DC converter unit C1.
〔第２実施形態〕
　図３６～図４２は、本開示の第２実施形態に係るＡＣ／ＤＣコンバータユニットを示している。本実施形態のＡＣ／ＤＣコンバータユニットＣ２は、半導体装置Ｂ２１および半導体装置Ｂ２２の入力端子３１Ａ、入力端子３１Ｂ、出力端子３２Ａおよび出力端子３２Ｂの固定形態が、上述した実施形態と異なっている。 [Second Embodiment]
36 to 42 show an AC/DC converter unit according to the second embodiment of the present disclosure. The AC/DC converter unit C2 of this embodiment is different from the above-described embodiments in the fixed form of the input terminals 31A, the input terminals 31B, the output terminals 32A, and the output terminals 32B of the semiconductor devices B21 and B22.
　本実施形態においては、図３６～図３８に示すように、入力モジュールＤの出力端子Ｄ４１と第１半導体モジュールＡ２１（半導体装置Ｂ２１）の入力端子３１Ａの端子部３１２とは、固定手段である溶接部３７１によって直接接続されている。溶接部３７１の溶接形式は何ら限定されない。また、入力モジュールＤの出力端子Ｄ４２と第１半導体モジュールＡ２１（半導体装置Ｂ２１）の入力端子３１Ｂの端子部３１２とは、固定手段である溶接部３７２によって直接接続されている。溶接部３７１の溶接形式は何ら限定されない。 In this embodiment, as shown in FIGS. 36 to 38, the output terminal D41 of the input module D and the terminal portion 312 of the input terminal 31A of the first semiconductor module A21 (semiconductor device B21) are welded as a fixing means. Directly connected by the portion 371. The welding form of the welded portion 371 is not limited at all. Further, the output terminal D42 of the input module D and the terminal portion 312 of the input terminal 31B of the first semiconductor module A21 (semiconductor device B21) are directly connected by the welding portion 372 which is a fixing means. The welding form of the welded portion 371 is not limited at all.
　また、図３６、図３７、図３９～図４１に示すように、第１半導体モジュールＡ２１（半導体装置Ｂ２１）の出力端子３２Ａの端子部３２２と第２半導体モジュールＡ２２（半導体装置Ｂ２２）の入力端子３１Ａの端子部３１２とは、固定手段である溶接部３７３によって直接接続されている。また、本実施形態においては、接続端子Ｆ２１の第２部Ｆ２１２が、溶接部３７３によって出力端子３２Ａの端子部３２２および入力端子３１Ａの端子部３１２に直接接続されている。図示された例においては、溶接部３７３は、溶接部３７３ａと溶接部３７３ｂとを含む。溶接部３７３ａは、端子部３２２と第２部Ｆ２１２とを固定している。溶接部３７３ｂは、端子部３１２と第２部Ｆ２１２とを固定している。なお、溶接部３７３の具体的態様は何ら限定されない。たとえば、端子部３２２、端子部３１２および第２部Ｆ２１２がすべて重ね合わされた状態で、１つの溶接部３７３によって一括して固定されていてもよい。 Further, as shown in FIGS. 36, 37, and 39 to 41, the terminal portion 322 of the output terminal 32A of the first semiconductor module A21 (semiconductor device B21) and the input terminal of the second semiconductor module A22 (semiconductor device B22). The terminal portion 312 of 31A is directly connected by a welding portion 373 which is a fixing means. Further, in the present embodiment, the second portion F212 of the connection terminal F21 is directly connected to the terminal portion 322 of the output terminal 32A and the terminal portion 312 of the input terminal 31A by the welding portion 373. In the illustrated example, weld 373 includes weld 373a and weld 373b. The welded portion 373a fixes the terminal portion 322 and the second portion F212. The welded portion 373b fixes the terminal portion 312 and the second portion F212. The specific form of the welded portion 373 is not limited at all. For example, the terminal portion 322, the terminal portion 312, and the second portion F212 may be collectively fixed by one welding portion 373 in a state where they are all overlapped.
　図３６、図３７、図３９～図４１に示すように、第１半導体モジュールＡ２１（半導体装置Ｂ２１）の出力端子３２Ｂの端子部３２２と第２半導体モジュールＡ２２（半導体装置Ｂ２２）の入力端子３１Ｂの端子部３１２とは、固定手段である溶接部３７４によって直接接続されている。また、本実施形態においては、接続端子Ｆ２２の第２部Ｆ２２２が、溶接部３７４によって出力端子３２Ａの端子部３２２および入力端子３１Ａの端子部３１２に直接接続されている。図示された例においては、溶接部３７４は、溶接部３７４ａと溶接部３７４ｂとを含む。溶接部３７４ａは、端子部３２２と第２部Ｆ２２２とを固定している。溶接部３７４ｂは、端子部３１２と第２部Ｆ２２２とを固定している。なお、溶接部３７４の具体的態様は何ら限定されない。たとえば、端子部３２２、端子部３１２および第２部Ｆ２２２がすべて重ね合わされた状態で、１つの溶接部３７４によって一括して固定されていてもよい。 As shown in FIGS. 36, 37, and 39 to 41, the terminal portion 322 of the output terminal 32B of the first semiconductor module A21 (semiconductor device B21) and the input terminal 31B of the second semiconductor module A22 (semiconductor device B22) are connected. The terminal portion 312 is directly connected by a welding portion 374 which is a fixing means. In addition, in the present embodiment, the second portion F222 of the connection terminal F22 is directly connected to the terminal portion 322 of the output terminal 32A and the terminal portion 312 of the input terminal 31A by the welding portion 374. In the illustrated example, weld 374 includes weld 374a and weld 374b. The welded portion 374a fixes the terminal portion 322 and the second portion F222. The welded portion 374b fixes the terminal portion 312 and the second portion F222. The specific form of the welded portion 374 is not limited at all. For example, the terminal portion 322, the terminal portion 312, and the second portion F222 may be collectively fixed by one welding portion 374 in a state where they are all overlapped.
　図３６、図３７および図４２に示すように、第２半導体モジュールＡ２２（半導体装置Ｂ２２）の出力端子３２ＡとトランスモジュールＨの入力端子Ｈ１１とは、固定手段である溶接部３７５によって直接接続されている。溶接部３７５の溶接形式は何ら限定されない。また、第２半導体モジュールＡ２２（半導体装置Ｂ２２）の出力端子３２ＢとトランスモジュールＨの入力端子Ｈ１２とは、固定手段である溶接部３７６によって直接接続されている。溶接部３７６の溶接形式は何ら限定されない。 As shown in FIGS. 36, 37 and 42, the output terminal 32A of the second semiconductor module A22 (semiconductor device B22) and the input terminal H11 of the transformer module H are directly connected by the welded portion 375 which is a fixing means. There is. The welding type of the welded portion 375 is not limited at all. Further, the output terminal 32B of the second semiconductor module A22 (semiconductor device B22) and the input terminal H12 of the transformer module H are directly connected by the welded portion 376 which is a fixing means. The welding type of the welded portion 376 is not limited at all.
　本実施形態によっても、ＡＣ／ＤＣコンバータユニットＣ１と同様に応答性をより高めることができる。また、インダクタンスの低減に寄与する固定態様であれば、締結手段や溶接部に限定されず、様々な固定手段を用いることができる。 Also according to this embodiment, the responsiveness can be further enhanced as in the AC/DC converter unit C1. Further, as long as the fixing mode contributes to the reduction of the inductance, it is not limited to the fastening means and the welding portion, and various fixing means can be used.
〔ＡＣ／ＤＣコンバータユニットＣ２　第１変形例〕
　図４３は、ＡＣ／ＤＣコンバータユニットＣ２の第１変形例を示している。本変形例のＡＣ／ＤＣコンバータユニットＣ２１は、第１半導体モジュールＡ２１、第２半導体モジュールＡ２２、コンデンサモジュールＦおよび絶縁電源モジュールＧの配置が、上述したＡＣ／ＤＣコンバータユニットＣ２と異なる。 [AC/DC Converter Unit C2 First Modification]
FIG. 43 shows a first modification of the AC/DC converter unit C2. The AC/DC converter unit C21 of the present modification is different from the AC/DC converter unit C2 described above in the arrangement of the first semiconductor module A21, the second semiconductor module A22, the capacitor module F, and the insulated power supply module G.
　本変形例においては、コンデンサモジュールＦが、ｘ方向において絶縁電源モジュールＧと第１半導体モジュールＡ２１および第２半導体モジュールＡ２２の間に配置されている。また、半導体装置Ｂ２３は、ｘ方向における位置が半導体装置Ｂ２１および半導体装置Ｂ２２と異なる位置に配置されている。本変形例によっても、ＡＣ／ＤＣコンバータユニットＣ２と同様に、応答性をより高めることができる。 In this modification, the capacitor module F is arranged between the insulated power supply module G and the first semiconductor module A21 and the second semiconductor module A22 in the x direction. The semiconductor device B23 is arranged at a position different from the semiconductor device B21 and the semiconductor device B22 in the x direction. According to this modified example, the responsiveness can be further enhanced as in the AC/DC converter unit C2.
〔ＡＣ／ＤＣコンバータユニットＣ２　第２変形例〕
　図４４は、ＡＣ／ＤＣコンバータユニットＣ２の第２変形例を示している。本変形例のＡＣ／ＤＣコンバータユニットＣ２２は、半導体装置Ｂ２３の配置が、上述したＡＣ／ＤＣコンバータユニットＣ２と異なる。 [AC/DC Converter Unit C2 Second Modification]
FIG. 44 shows a second modification of the AC/DC converter unit C2. The AC/DC converter unit C22 of this modification is different from the above-described AC/DC converter unit C2 in the arrangement of the semiconductor device B23.
　本変形例においては、半導体装置Ｂ２３は、ｘ方向における位置が半導体装置Ｂ２１および半導体装置Ｂ２２と異なる位置に配置されており、出力モジュールＥのｘ方向中心に対して偏った配置とされている。本変形例によっても、ＡＣ／ＤＣコンバータユニットＣ２と同様に、応答性をより高めることができる。 In this modification, the semiconductor device B23 is arranged at a position different from the semiconductor device B21 and the semiconductor device B22 in the x direction, and is arranged so as to be deviated from the center of the output module E in the x direction. According to this modified example, the responsiveness can be further enhanced as in the AC/DC converter unit C2.
〔第３実施形態　半導体モジュールＡ３〕
　図４５～図４７は、本開示の第３実施形態に係る半導体モジュールを示している。本実施形態の半導体モジュールＡ３は、主に入出力端子３Ａおよび制御端子３Ｂの構成や、第１基板７の具体的構成が、上述した実施形態と異なっている。 [Third Embodiment Semiconductor Module A3]
45 to 47 show a semiconductor module according to the third embodiment of the present disclosure. The semiconductor module A3 of the present embodiment is different from the above-described embodiments mainly in the configuration of the input/output terminal 3A and the control terminal 3B and the specific configuration of the first substrate 7.
　半導体モジュールＡ３は、半導体装置Ｂ３を備えている。半導体装置Ｂ３は、たとえば、上述の半導体装置Ｂ１と同様の機能を果たす。半導体装置Ｂ３は、複数の入出力端子３Ａおよび複数の制御端子３Ｂを有している。複数の入出力端子３Ａは、たとえば、上述の入力端子３１Ａ、入力端子３１Ｂ、出力端子３２Ａおよび出力端子３２Ｂに該当するものである。複数の制御端子３Ｂは、たとえば、上述のゲート端子３３および検出端子３４に該当するものである。 The semiconductor module A3 includes a semiconductor device B3. The semiconductor device B3 has, for example, the same function as that of the above-described semiconductor device B1. The semiconductor device B3 has a plurality of input/output terminals 3A and a plurality of control terminals 3B. The plurality of input/output terminals 3A correspond to, for example, the above-mentioned input terminal 31A, input terminal 31B, output terminal 32A, and output terminal 32B. The plurality of control terminals 3B correspond to, for example, the gate terminal 33 and the detection terminal 34 described above.
　本実施形態においては、複数の入出力端子３Ａは、封止樹脂６０からｘ方向の一方側に突出するものと、ｘ方向の他方側に突出するものとを含んでいる。すなわち、複数の入出力端子３Ａは、封止樹脂６０からｘ方向の両側に突出している。また、本実施形態の入出力端子３Ａは、ｚ方向を厚さ方向とする平板状または帯板状の形態とされている。 In the present embodiment, the plurality of input/output terminals 3A include one that projects from the sealing resin 60 to one side in the x direction and one that projects to the other side in the x direction. That is, the plurality of input/output terminals 3A project from the sealing resin 60 on both sides in the x direction. Further, the input/output terminal 3A of the present embodiment has a flat plate shape or a strip plate shape having a thickness direction in the z direction.
　複数の制御端子３Ｂは、封止樹脂６０から、ｙ方向の一方側に突出している。複数の制御端子３Ｂは、第１コネクタ８によって第１基板７に接続されている。 The plurality of control terminals 3B protrude from the sealing resin 60 to one side in the y direction. The plurality of control terminals 3B are connected to the first substrate 7 by the first connector 8.
　図４７に示すように、封止樹脂６０には、複数の凸部６６が形成されている。複数の凸部６６は、第１基板７の第１基板裏面７２に当接することにより、第１基板７と封止樹脂６０（半導体装置Ｂ３）とのｚ方向における位置関係を規定するものである。複数の凸部６６の個数は何ら限定されず、図示された例においては、封止樹脂６０の四隅に４つの凸部６６が配置されている。 As shown in FIG. 47, a plurality of convex portions 66 are formed on the sealing resin 60. The plurality of protrusions 66 contact the first substrate back surface 72 of the first substrate 7 to define the positional relationship between the first substrate 7 and the sealing resin 60 (semiconductor device B3) in the z direction. .. The number of the plurality of convex portions 66 is not limited at all, and in the illustrated example, four convex portions 66 are arranged at the four corners of the sealing resin 60.
　図４６に示すように、本実施形態の第１基板７は、第１領域Ｌ１、第２領域Ｌ２および第３領域Ｌ３が設定されている。第１領域Ｌ１、第２領域Ｌ２および第３領域Ｌ３は、第１基板７に形成された配線パターンのうち、互いに離間した部位である。 As shown in FIG. 46, the first substrate 7 of this embodiment has a first region L1, a second region L2, and a third region L3. The first region L1, the second region L2, and the third region L3 are portions of the wiring pattern formed on the first substrate 7 that are separated from each other.
　複数の電子部品７００は、電子部品７２２および電子部品７２３を含む。電子部品７２２は、第１領域Ｌ１と第２領域Ｌ２とに跨って実装されている。電子部品７２３は、第１領域Ｌ１と第３領域Ｌ３とに跨って実装されている。電子部品７２２および電子部品７２３は、たとえば、スイッチング素子を制御するための専用の制御ＩＣである。 The plurality of electronic components 700 include an electronic component 722 and an electronic component 723. The electronic component 722 is mounted across the first region L1 and the second region L2. The electronic component 723 is mounted across the first region L1 and the third region L3. The electronic component 722 and the electronic component 723 are, for example, dedicated control ICs for controlling the switching elements.
　第１基板７には、コネクタ７２１が実装されている。コネクタ７２１は、半導体モジュールＡ３と外部回路とを接続するためのものである。 A connector 721 is mounted on the first board 7. The connector 721 is for connecting the semiconductor module A3 and an external circuit.
　本実施形態によっても、端子接続の容易化とより確実な導通とを図ることができる。また、複数の入出力端子３Ａが、ｘ方向の両側に突出していることにより、複数の半導体モジュールＡ３を、ｙ方向に並べた状態使用するに適している。 Also according to the present embodiment, it is possible to facilitate terminal connection and ensure more reliable conduction. Further, since the plurality of input/output terminals 3A project on both sides in the x direction, it is suitable to use the plurality of semiconductor modules A3 arranged in the y direction.
〔第３実施形態　変形例　半導体モジュールＡ３１〕
　図４８～図５０は、半導体モジュールＡ３の変形例を示している。本変形例の半導体モジュールＡ３１は、主に入出力端子３Ａの構成が、上述した実施形態と異なっている。 [Third Embodiment Modification Example Semiconductor Module A31]
48 to 50 show modifications of the semiconductor module A3. The semiconductor module A31 of the present modification mainly differs from the above-described embodiment in the configuration of the input/output terminal 3A.
　本変形例においては、複数の制御端子３Ｂが、封止樹脂６０からｙ方向の一方側に突出しており、複数の入出力端子３Ａが封止樹脂６０からｙ方向の他方側に突出している。複数の入出力端子３Ａは、ｘ方向において２列に配置されている。 In this modification, the plurality of control terminals 3B are projected from the sealing resin 60 to one side in the y direction, and the plurality of input/output terminals 3A are projected from the sealing resin 60 to the other side in the y direction. The plurality of input/output terminals 3A are arranged in two rows in the x direction.
　また、第１基板７には、電子部品７２４および電子部品７２５が実装されている。電子部品７２４は、電子部品７２２とともに第１領域Ｌ１および第２領域Ｌ２に跨って実装されている。電子部品７２５は、電子部品７２３とともに第１領域Ｌ１および第３領域Ｌ３に跨って実装されている。電子部品７２４および電子部品７２５は、たとえば変圧を行うとともに、入力側と出力側とを絶縁する絶縁トランスである。 Electronic components 724 and 725 are mounted on the first substrate 7. The electronic component 724 is mounted together with the electronic component 722 across the first region L1 and the second region L2. The electronic component 725 is mounted over the first region L1 and the third region L3 together with the electronic component 723. The electronic component 724 and the electronic component 725 are, for example, insulating transformers that perform transformation and insulate the input side and the output side.
　本変形例によっても、端子接続の容易化とより確実な導通とを図ることができる。また、複数の入出力端子３Ａが、ｙ方向の他方側にまとめて突出している。これにより、複数の半導体モジュールＡ３を、ｘ方向に並べた場合に、すべての入出力端子３Ａがｙ方向の他方側に突出する。これは、複数の半導体モジュールＡ３１の複数の入出力端子３Ａに外部から接続する際に、ｙ方向の他方側のみから接続すればよいという利点がある。 -Even with this modification, it is possible to facilitate terminal connection and ensure more reliable conduction. Further, the plurality of input/output terminals 3A collectively project on the other side in the y direction. Accordingly, when the plurality of semiconductor modules A3 are arranged in the x direction, all the input/output terminals 3A project to the other side in the y direction. This has the advantage that when connecting to the plurality of input/output terminals 3A of the plurality of semiconductor modules A31 from the outside, it is only necessary to connect from the other side in the y direction.
　本開示に係る半導体モジュールおよびＡＣ／ＤＣコンバータユニットは、上述した実施形態に限定されるものではない。本開示に係る半導体モジュールおよびＡＣ／ＤＣコンバータユニットの各部の具体的な構成は、種々に設計変更自在である。 The semiconductor module and the AC/DC converter unit according to the present disclosure are not limited to the above embodiments. The specific configurations of the respective portions of the semiconductor module and the AC/DC converter unit according to the present disclosure can be changed in design in various ways.
　　〔付記１〕
　複数の半導体素子、複数の入出力端子、複数の制御端子および前記複数の半導体素子を覆う封止樹脂を有する半導体装置と、
　第１基板と、
　前記第１基板に固定され且つ前記制御端子と接続する第１コネクタとを備え、
　前記第１コネクタは、前記第１基板の厚さ方向と直角であって互いに平行である第１方向および第２方向の少なくともいずれかにおいて前記制御端子が相対動することを許容する、半導体モジュール。
　　〔付記２〕
　前記制御端子は、前記厚さ方向に延びる起立部を有しており、
　前記第１コネクタは、前記起立部が挿通される挿通孔を有する、付記１に記載の半導体モジュール。
　　〔付記３〕
　前記制御端子は、前記封止樹脂から前記第２方向に突出する基部を有し、
　前記起立部は、前記基部の先端に繋がる、付記２に記載の半導体モジュール。
　　〔付記４〕
　複数の前記制御端子は、前記第１方向に並んでいる、付記２または３に記載の半導体モジュール。
　　〔付記５〕
　複数の前記制御端子は、前記封止樹脂を挟んで前記第２方向に分かれて配置されている、付記４に記載の半導体モジュール。
　　〔付記６〕
　複数の前記入出力端子は、前記第１方向において複数の前記制御端子の外側に配置されている、付記４または５に記載の半導体モジュール。
　　〔付記７〕
　複数の前記入出力端子は、前記封止樹脂を挟んで前記第２方向に分かれて配置されている、付記４に記載の半導体モジュール。
　　〔付記８〕
　前記第１基板は、前記入出力端子を挿通させる入出力用貫通部を有する、付記２ないし７のいずれかに記載の半導体モジュール。
　　〔付記９〕
　前記第１基板は、前記厚さ方向において互いに反対側を向く第１基板主面および第１基板裏面を有しており、
　前記第１基板裏面は、前記厚さ方向において前記封止樹脂と対向している、付記２ないし８のいずれかに記載の半導体モジュール。
　　〔付記１０〕
　前記第１コネクタは、前記第１基板に対して前記厚さ方向における前記第１基板裏面側に配置されている、付記９に記載の半導体モジュール。
　　〔付記１１〕
　複数の前記第１コネクタは、前記第１方向に並んで配置されている、付記１０に記載の半導体モジュール。
　　〔付記１２〕
　複数の前記第１コネクタは、前記第２方向において前記封止樹脂を挟んで分かれて配置されている、付記１１に記載の半導体モジュール。
　　〔付記１３〕
　前記第１基板は、前記第１コネクタの一部を挿通させる制御用貫通部を有する、付記１０ないし１２のいずれかに記載の半導体モジュール。
　　〔付記１４〕
　前記第１基板に搭載された複数の電子部品を備える、付記９ないし１３のいずれかに記載の半導体モジュール。
　　〔付記１５〕
　複数の前記電子部品は、前記第１基板主面に実装されたものを含む、付記１４に記載の半導体モジュール。
　　〔付記１６〕
　複数の前記電子部品は、前記第１基板裏面に実装されたものを含む、付記１４または１５に記載の半導体モジュール。
　　〔付記１７〕
　前記封止樹脂は、前記厚さ方向にボルトを挿通させるための貫通孔を有しており、
　前記第１基板は、前記厚さ方向視において前記貫通孔を内包する凹部を有する、付記９ないし１６のいずれかに記載の半導体モジュール。
　　〔付記１８〕
　交流電力が入力される入力モジュールと、
　付記１ないし５のいずれかに記載の半導体モジュールからなり、前記入力モジュールから出力された交流電流が入力され、且つ直流電流を出力する第１半導体モジュールと、
　付記１ないし５のいずれかに記載の半導体モジュールからなり、前記第１半導体モジュールから出力された直流電力が入力され、且つ直流電力を出力する第２半導体モジュールと、
　前記第２半導体モジュールから出力された直流電力が入力され、且つ直流電力を出力する出力モジュールと、を備え、
　前記第１半導体モジュールの第１半導体装置の前記複数の入出力端子に含まれる出力端子と、前記第２半導体モジュールの第２半導体装置の前記複数の入出力端子に含まれる入力端子とは、第１固定手段によって直接接続されている、ＡＣ／ＤＣコンバータユニット。
　〔付記１９〕
　前記第１固定手段は、締結部材である、付記１８に記載のＡＣ／ＤＣコンバータユニット。
　〔付記２０〕
　前記第１固定手段は、溶接部である、付記１８に記載のＡＣ／ＤＣコンバータユニット。
　　〔付記２１〕
　前記第１半導体モジュールは、ＰＦＣ用モジュールである、付記１８ないし２０のいずれかに記載のＡＣ／ＤＣコンバータユニット。
　　〔付記２２〕
　前記第２半導体モジュールは、ＬＬＣ用モジュールである、付記２１に記載のＡＣ／ＤＣコンバータユニット。
　　〔付記２３〕
　前記入力モジュールは、出力端子を有し、
　前記入力モジュールの前記出力端子と、前記第１半導体モジュールの前記入力端子とは、第２固定手段によって直接接続されている、付記２２に記載のＡＣ／ＤＣコンバータユニット。
　〔付記２４〕
　前記第２固定手段は、締結部材である、付記２３に記載のＡＣ／ＤＣコンバータユニット。
　〔付記２５〕
　前記第２固定手段は、溶接部である、付記２３に記載のＡＣ／ＤＣコンバータユニット。
　　〔付記２６〕
　前記第１半導体モジュールの前記出力端子と、前記第２半導体モジュールの前記入力端子とに接続されたコンデンサモジュールを備える、付記２３ないし２５のいずれかに記載のＡＣ／ＤＣコンバータユニット。
　　〔付記２７〕
　前記コンデンサモジュールは、前記第１固定手段によって前記第１半導体モジュールの前記出力端子と、前記第２半導体モジュールの前記入力端子とに直接接続されている、付記２６に記載のＡＣ／ＤＣコンバータユニット。
　　〔付記２８〕
　前記第２半導体モジュールと前記出力モジュールとの間に介在するトランスモジュールを備える、付記２６または２７に記載のＡＣ／ＤＣコンバータユニット。
　　〔付記２９〕
　前記トランスモジュールは、入力端子および出力端子を有し、
　前記第２半導体モジュールの前記出力端子と、前記トランスモジュールの前記入力端子とは、第３固定手段によって直接接続されている、付記２８に記載のＡＣ／ＤＣコンバータユニット。
　〔付記３０〕
　前記第３固定手段は、締結部材である、付記２９に記載のＡＣ／ＤＣコンバータユニット。
　〔付記３１〕
　前記第３固定手段は、溶接部である、付記２９に記載のＡＣ／ＤＣコンバータユニット。
　　〔付記３２〕
　前記出力モジュールは、入力端子および出力端子を有する第３半導体装置を具備し、
　前記トランスモジュールの前記出力端子と、前記第３半導体装置の前記入力端子とは、第４固定手段によって直接接続されている、付記３１に記載のＡＣ／ＤＣコンバータユニット。
　　〔付記３３〕
　前記第４固定手段は、締結部材である、付記３２に記載のＡＣ／ＤＣコンバータユニット。
　　〔付記３４〕
　前記出力モジュールは、出力基板を有しており、
　前記第３半導体装置の前記出力端子は、第５固定手段によって前記出力基板に直接接続されている、付記３２または３３に記載のＡＣ／ＤＣコンバータユニット。
　　〔付記３５〕
　前記第５固定手段は、締結部材である、付記３４に記載のＡＣ／ＤＣコンバータユニット。 [Appendix 1]
A semiconductor device having a plurality of semiconductor elements, a plurality of input/output terminals, a plurality of control terminals, and a sealing resin covering the plurality of semiconductor elements;
A first substrate,
A first connector fixed to the first substrate and connected to the control terminal;
The semiconductor module, wherein the first connector allows relative movement of the control terminal in at least one of a first direction and a second direction which are perpendicular to a thickness direction of the first substrate and are parallel to each other.
[Appendix 2]
The control terminal has a standing portion extending in the thickness direction,
The semiconductor module according to appendix 1, wherein the first connector has an insertion hole through which the upright portion is inserted.
[Appendix 3]
The control terminal has a base portion protruding from the sealing resin in the second direction,
The semiconductor module according to appendix 2, wherein the upright portion is connected to a tip of the base portion.
[Appendix 4]
4. The semiconductor module according to appendix 2 or 3, wherein the plurality of control terminals are arranged in the first direction.
[Appendix 5]
5. The semiconductor module according to appendix 4, wherein the plurality of control terminals are arranged separately in the second direction with the sealing resin interposed therebetween.
[Appendix 6]
The semiconductor module according to appendix 4 or 5, wherein the plurality of input/output terminals are arranged outside the plurality of control terminals in the first direction.
[Appendix 7]
5. The semiconductor module according to appendix 4, wherein the plurality of input/output terminals are arranged separately in the second direction with the sealing resin interposed therebetween.
[Appendix 8]
8. The semiconductor module according to any one of appendices 2 to 7, wherein the first substrate has an input/output penetrating portion through which the input/output terminal is inserted.
[Appendix 9]
The first substrate has a first substrate main surface and a first substrate rear surface facing opposite sides in the thickness direction,
9. The semiconductor module according to any one of appendices 2 to 8, wherein the back surface of the first substrate faces the sealing resin in the thickness direction.
[Appendix 10]
The semiconductor module according to appendix 9, wherein the first connector is arranged on the back surface side of the first substrate in the thickness direction with respect to the first substrate.
[Appendix 11]
The semiconductor module according to appendix 10, wherein the plurality of first connectors are arranged side by side in the first direction.
[Appendix 12]
The semiconductor module according to appendix 11, wherein the plurality of first connectors are separately arranged with the sealing resin interposed therebetween in the second direction.
[Appendix 13]
13. The semiconductor module according to any one of appendices 10 to 12, wherein the first substrate has a control penetrating portion that allows a part of the first connector to be inserted therethrough.
[Appendix 14]
14. The semiconductor module according to any one of appendices 9 to 13, comprising a plurality of electronic components mounted on the first substrate.
[Appendix 15]
15. The semiconductor module according to appendix 14, wherein the plurality of electronic components include ones mounted on the main surface of the first substrate.
[Appendix 16]
16. The semiconductor module according to appendix 14 or 15, including a plurality of the electronic components mounted on the back surface of the first substrate.
[Appendix 17]
The sealing resin has a through hole for inserting a bolt in the thickness direction,
17. The semiconductor module according to any one of appendices 9 to 16, wherein the first substrate has a recess that includes the through hole when viewed in the thickness direction.
[Appendix 18]
An input module to which AC power is input,
A first semiconductor module comprising the semiconductor module according to any one of appendices 1 to 5, which receives the alternating current output from the input module and outputs a direct current,
A second semiconductor module comprising the semiconductor module according to any one of appendices 1 to 5, receiving the DC power output from the first semiconductor module and outputting the DC power,
An output module receiving the DC power output from the second semiconductor module and outputting the DC power;
The output terminals included in the plurality of input/output terminals of the first semiconductor device of the first semiconductor module and the input terminals included in the plurality of input/output terminals of the second semiconductor device of the second semiconductor module are: 1. AC/DC converter unit directly connected by fixing means.
[Appendix 19]
19. The AC/DC converter unit according to appendix 18, wherein the first fixing means is a fastening member.
[Appendix 20]
19. The AC/DC converter unit according to appendix 18, wherein the first fixing means is a welded portion.
[Appendix 21]
21. The AC/DC converter unit according to any one of appendices 18 to 20, wherein the first semiconductor module is a PFC module.
[Appendix 22]
22. The AC/DC converter unit according to attachment 21, wherein the second semiconductor module is an LLC module.
[Appendix 23]
The input module has an output terminal,
23. The AC/DC converter unit according to appendix 22, wherein the output terminal of the input module and the input terminal of the first semiconductor module are directly connected by second fixing means.
[Appendix 24]
24. The AC/DC converter unit according to appendix 23, wherein the second fixing means is a fastening member.
[Appendix 25]
24. The AC/DC converter unit according to appendix 23, wherein the second fixing means is a welded portion.
[Appendix 26]
26. The AC/DC converter unit according to any one of appendices 23 to 25, comprising a capacitor module connected to the output terminal of the first semiconductor module and the input terminal of the second semiconductor module.
[Appendix 27]
27. The AC/DC converter unit according to appendix 26, wherein the capacitor module is directly connected to the output terminal of the first semiconductor module and the input terminal of the second semiconductor module by the first fixing means.
[Appendix 28]
28. The AC/DC converter unit according to appendix 26 or 27, comprising a transformer module interposed between the second semiconductor module and the output module.
[Appendix 29]
The transformer module has an input terminal and an output terminal,
29. The AC/DC converter unit according to appendix 28, wherein the output terminal of the second semiconductor module and the input terminal of the transformer module are directly connected by third fixing means.
[Appendix 30]
30. The AC/DC converter unit according to attachment 29, wherein the third fixing means is a fastening member.
[Appendix 31]
30. The AC/DC converter unit according to appendix 29, wherein the third fixing means is a welded portion.
[Appendix 32]
The output module includes a third semiconductor device having an input terminal and an output terminal,
32. The AC/DC converter unit according to appendix 31, wherein the output terminal of the transformer module and the input terminal of the third semiconductor device are directly connected by a fourth fixing means.
[Appendix 33]
33. The AC/DC converter unit according to appendix 32, wherein the fourth fixing means is a fastening member.
[Appendix 34]
The output module has an output board,
34. The AC/DC converter unit according to appendix 32 or 33, wherein the output terminal of the third semiconductor device is directly connected to the output substrate by fifth fixing means.
[Appendix 35]
The AC/DC converter unit according to appendix 34, wherein the fifth fixing means is a fastening member.

Claims (35)

  1. 　複数の半導体素子、複数の入出力端子、複数の制御端子および前記複数の半導体素子を覆う封止樹脂を有する半導体装置と、
    　第１基板と、
    　前記第１基板に固定され且つ前記制御端子と接続する第１コネクタとを備え、
    　前記第１コネクタは、前記第１基板の厚さ方向と直角であって互いに平行である第１方向および第２方向の少なくともいずれかにおいて前記制御端子が相対動することを許容する、半導体モジュール。     A semiconductor device having a plurality of semiconductor elements, a plurality of input/output terminals, a plurality of control terminals, and a sealing resin covering the plurality of semiconductor elements;
    A first substrate,
    A first connector fixed to the first substrate and connected to the control terminal;
    The semiconductor module, wherein the first connector allows relative movement of the control terminal in at least one of a first direction and a second direction which are perpendicular to a thickness direction of the first substrate and are parallel to each other.
  2. 　前記制御端子は、前記厚さ方向に延びる起立部を有しており、
    　前記第１コネクタは、前記起立部が挿通される挿通孔を有する、請求項１に記載の半導体モジュール。     The control terminal has a standing portion extending in the thickness direction,
    The semiconductor module according to claim 1, wherein the first connector has an insertion hole through which the upright portion is inserted.
  3. 　前記制御端子は、前記封止樹脂から前記第２方向に突出する基部を有し、
    　前記起立部は、前記基部の先端に繋がる、請求項２に記載の半導体モジュール。     The control terminal has a base portion protruding from the sealing resin in the second direction,
    The semiconductor module according to claim 2, wherein the standing portion is connected to a tip of the base portion.
  4. 　複数の前記制御端子は、前記第１方向に並んでいる、請求項２または３に記載の半導体モジュール。 The semiconductor module according to claim 2 or 3, wherein the plurality of control terminals are arranged in the first direction.
  5. 　複数の前記制御端子は、前記封止樹脂を挟んで前記第２方向に分かれて配置されている、請求項４に記載の半導体モジュール。 The semiconductor module according to claim 4, wherein the plurality of control terminals are separately arranged in the second direction with the sealing resin interposed therebetween.
  6. 　複数の前記入出力端子は、前記第１方向において複数の前記制御端子の外側に配置されている、請求項４または５に記載の半導体モジュール。 The semiconductor module according to claim 4 or 5, wherein the plurality of input/output terminals are arranged outside the plurality of control terminals in the first direction.
  7. 　複数の前記入出力端子は、前記封止樹を挟んで前記第２方向に分かれて配置されている、請求項４に記載の半導体モジュール。 The semiconductor module according to claim 4, wherein the plurality of input/output terminals are arranged separately in the second direction with the sealing tree interposed therebetween.
  8. 　前記第１基板は、前記入出力端子を挿通させる入出力用貫通部を有する、請求項２ないし７のいずれかに記載の半導体モジュール。 The semiconductor module according to any one of claims 2 to 7, wherein the first substrate has an input/output penetrating portion through which the input/output terminal is inserted.
  9. 　前記第１基板は、前記厚さ方向において互いに反対側を向く第１基板主面および第１基板裏面を有しており、
    　前記第１基板裏面は、前記厚さ方向において前記封止樹脂と対向している、請求項２ないし８のいずれかに記載の半導体モジュール。     The first substrate has a first substrate main surface and a first substrate rear surface facing opposite sides in the thickness direction,
    The semiconductor module according to claim 2, wherein the back surface of the first substrate faces the sealing resin in the thickness direction.
  10. 　前記第１コネクタは、前記第１基板に対して前記厚さ方向における前記第１基板裏面側に配置されている、請求項９に記載の半導体モジュール。 The semiconductor module according to claim 9, wherein the first connector is arranged on the back surface side of the first substrate in the thickness direction with respect to the first substrate.
  11. 　複数の前記第１コネクタは、前記第１方向に並んで配置されている、請求項１０に記載の半導体モジュール。 The semiconductor module according to claim 10, wherein the plurality of first connectors are arranged side by side in the first direction.
  12. 　複数の前記第１コネクタは、前記第２方向において前記封止樹脂を挟んで分かれて配置されている、請求項１１に記載の半導体モジュール。 The semiconductor module according to claim 11, wherein the plurality of first connectors are separately arranged in the second direction with the sealing resin interposed therebetween.
  13. 　前記第１基板は、前記第１コネクタの一部を挿通させる制御用貫通部を有する、請求項１０ないし１２のいずれかに記載の半導体モジュール。 The semiconductor module according to any one of claims 10 to 12, wherein the first substrate has a control penetrating portion through which a part of the first connector is inserted.
  14. 　前記第１基板に搭載された複数の電子部品を備える、請求項９ないし１３のいずれかに記載の半導体モジュール。 The semiconductor module according to claim 9, comprising a plurality of electronic components mounted on the first substrate.
  15. 　複数の前記電子部品は、前記第１基板主面に実装されたものを含む、請求項１４に記載の半導体モジュール。 The semiconductor module according to claim 14, wherein the plurality of electronic components include ones mounted on the main surface of the first substrate.
  16. 　複数の前記電子部品は、前記第１基板裏面に実装されたものを含む、請求項１４または１５に記載の半導体モジュール。 The semiconductor module according to claim 14 or 15, wherein the plurality of electronic components include ones mounted on the back surface of the first substrate.
  17. 　前記封止樹脂は、前記厚さ方向にボルトを挿通させるための貫通孔を有しており、
    　前記第１基板は、前記厚さ方向視において前記貫通孔を内包する凹部を有する、請求項９ないし１６のいずれかに記載の半導体モジュール。     The sealing resin has a through hole for inserting a bolt in the thickness direction,
    17. The semiconductor module according to claim 9, wherein the first substrate has a recess that includes the through hole when viewed in the thickness direction.
  18. 　交流電力が入力される入力モジュールと、
    　請求項１ないし５のいずれかに記載の半導体モジュールからなり、前記入力モジュールから出力された交流電流が入力され、且つ直流電流を出力する第１半導体モジュールと、
    　請求項１ないし５のいずれかに記載の半導体モジュールからなり、前記第１半導体モジュールから出力された直流電力が入力され、且つ直流電力を出力する第２半導体モジュールと、
    　前記第２半導体モジュールから出力された直流電力が入力され、且つ直流電力を出力する出力モジュールと、を備え、
    　前記第１半導体モジュールの第１半導体装置の前記複数の入出力端子に含まれる出力端子と、前記第２半導体モジュールの第２半導体装置の前記複数の入出力端子に含まれる入力端子とは、第１固定手段によって直接接続されている、ＡＣ／ＤＣコンバータユニット。     An input module to which AC power is input,
    A first semiconductor module comprising the semiconductor module according to claim 1, wherein the alternating current output from the input module is input, and a direct current is output.
    A second semiconductor module comprising the semiconductor module according to claim 1, wherein the DC power output from the first semiconductor module is input, and the DC power is output.
    An output module receiving the DC power output from the second semiconductor module and outputting the DC power;
    The output terminals included in the plurality of input/output terminals of the first semiconductor device of the first semiconductor module and the input terminals included in the plurality of input/output terminals of the second semiconductor device of the second semiconductor module are: 1. AC/DC converter unit directly connected by fixing means.
  19. 　前記第１固定手段は、締結部材である、請求項１８に記載のＡＣ／ＤＣコンバータユニット。 The AC/DC converter unit according to claim 18, wherein the first fixing means is a fastening member.
  20. 　前記第１固定手段は、溶接部である、請求項１８に記載のＡＣ／ＤＣコンバータユニット。 The AC/DC converter unit according to claim 18, wherein the first fixing means is a welded portion.
  21. 　前記第１半導体モジュールは、ＰＦＣ用モジュールである、請求項１８ないし２０のいずれかに記載のＡＣ／ＤＣコンバータユニット。 The AC/DC converter unit according to any one of claims 18 to 20, wherein the first semiconductor module is a PFC module.
  22. 　前記第２半導体モジュールは、ＬＬＣ用モジュールである、請求項２１に記載のＡＣ／ＤＣコンバータユニット。 The AC/DC converter unit according to claim 21, wherein the second semiconductor module is an LLC module.
  23. 　前記入力モジュールは、出力端子を有し、
    　前記入力モジュールの前記出力端子と、前記第１半導体モジュールの前記入力端子とは、第２固定手段によって直接接続されている、請求項２２に記載のＡＣ／ＤＣコンバータユニット。     The input module has an output terminal,
    23. The AC/DC converter unit according to claim 22, wherein the output terminal of the input module and the input terminal of the first semiconductor module are directly connected by a second fixing means.
  24. 　前記第２固定手段は、締結部材である、請求項２３に記載のＡＣ／ＤＣコンバータユニット。 The AC/DC converter unit according to claim 23, wherein the second fixing means is a fastening member.
  25. 　前記第２固定手段は、溶接部である、請求項２３に記載のＡＣ／ＤＣコンバータユニット。 The AC/DC converter unit according to claim 23, wherein the second fixing means is a welded portion.
  26. 　前記第１半導体モジュールの前記出力端子と、前記第２半導体モジュールの前記入力端子とに接続されたコンデンサモジュールを備える、請求項２３ないし２５のいずれかに記載のＡＣ／ＤＣコンバータユニット。 26. The AC/DC converter unit according to claim 23, further comprising a capacitor module connected to the output terminal of the first semiconductor module and the input terminal of the second semiconductor module.
  27. 　前記コンデンサモジュールは、前記第１固定手段によって前記第１半導体モジュールの前記出力端子と、前記第２半導体モジュールの前記入力端子とに直接接続されている、請求項２６に記載のＡＣ／ＤＣコンバータユニット。 27. The AC/DC converter unit according to claim 26, wherein the capacitor module is directly connected to the output terminal of the first semiconductor module and the input terminal of the second semiconductor module by the first fixing means. ..
  28. 　前記第２半導体モジュールと前記出力モジュールとの間に介在するトランスモジュールを備える、請求項２６または２７に記載のＡＣ／ＤＣコンバータユニット。 The AC/DC converter unit according to claim 26 or 27, further comprising a transformer module interposed between the second semiconductor module and the output module.
  29. 　前記トランスモジュールは、入力端子および出力端子を有し、
    　前記第２半導体モジュールの前記出力端子と、前記トランスモジュールの前記入力端子とは、第３固定手段によって直接接続されている、請求項２８に記載のＡＣ／ＤＣコンバータユニット。     The transformer module has an input terminal and an output terminal,
    29. The AC/DC converter unit according to claim 28, wherein the output terminal of the second semiconductor module and the input terminal of the transformer module are directly connected by third fixing means.
  30. 　前記第３固定手段は、締結部材である、請求項２９に記載のＡＣ／ＤＣコンバータユニット。 The AC/DC converter unit according to claim 29, wherein the third fixing means is a fastening member.
  31. 　前記第３固定手段は、溶接部である、請求項２９に記載のＡＣ／ＤＣコンバータユニット。 The AC/DC converter unit according to claim 29, wherein the third fixing means is a welded portion.
  32. 　前記出力モジュールは、入力端子および出力端子を有する第３半導体装置を具備し、
    　前記トランスモジュールの前記出力端子と、前記第３半導体装置の前記入力端子とは、第４固定手段によって直接接続されている、請求項３１に記載のＡＣ／ＤＣコンバータユニット。     The output module includes a third semiconductor device having an input terminal and an output terminal,
    32. The AC/DC converter unit according to claim 31, wherein the output terminal of the transformer module and the input terminal of the third semiconductor device are directly connected by a fourth fixing means.
  33. 　前記第４固定手段は、締結部材である、請求項３２に記載のＡＣ／ＤＣコンバータユニット。 The AC/DC converter unit according to claim 32, wherein the fourth fixing means is a fastening member.
  34. 　前記出力モジュールは、出力基板を有しており、
    　前記第３半導体装置の前記出力端子は、第５固定手段によって前記出力基板に直接接続されている、請求項３２または３３に記載のＡＣ／ＤＣコンバータユニット。     The output module has an output board,
    34. The AC/DC converter unit according to claim 32 or 33, wherein the output terminal of the third semiconductor device is directly connected to the output substrate by a fifth fixing means.
  35. 　前記第５固定手段は、締結部材である、請求項３４に記載のＡＣ／ＤＣコンバータユニット。 The AC/DC converter unit according to claim 34, wherein the fifth fixing means is a fastening member.
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WO2023243464A1 (en) * 2022-06-17 2023-12-21 ローム株式会社 Semiconductor device, semiconductor module, and semiconductor module mounting structure

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