WO2020134036A1

WO2020134036A1 - Test board for testing memory card, and test device

Info

Publication number: WO2020134036A1
Application number: PCT/CN2019/096432
Authority: WO
Inventors: 胡宏辉; 梁广庆; 李小强
Original assignee: 深圳市江波龙电子股份有限公司
Priority date: 2018-12-26
Filing date: 2019-07-17
Publication date: 2020-07-02
Also published as: CN209418157U

Abstract

A test board (10) and a test device. The test board (10) is used for testing a memory card, and comprises a circuit board (11) and a plurality of test circuits (12) disposed on the circuit board (11) and independent from each other, each of the plurality of test circuits (12) being coupled to one memory card to be tested so as to provide a test signal for said memory card. By providing the plurality of test circuits (12) on the circuit board (11), the test board (10) improves the test efficiency of the memory card.

Description

Test board and test equipment for testing memory card

【Technical field】

The disclosed embodiments of the present application relate to the field of storage technology, and more specifically, to a test board and test equipment for testing a memory card.

【Background technique】

Memory cards are independent storage media used on smart devices, such as smart phones, digital cameras, portable computers, etc., generally in the form of cards. Before a memory card is inserted into a smart device and put into use, a compatibility test needs to be performed on the memory card, for example, information recognition, reading, hot swapping, etc.

The current testing method is manual testing, and only a single memory card can be used at a time, and the testing efficiency is low.

[Invention content]

According to an embodiment of the present application, the present application proposes a test board and test equipment for testing a memory card, so as to improve the test efficiency of the memory card.

According to the first aspect of the present application, a test board is provided for testing a memory card. The test board includes: a circuit board; and a plurality of test circuits, which are disposed on the circuit board and are independent of each other. Each test circuit is coupled to a memory card to be tested to provide a test signal to the memory card to be tested.

Among them, each test circuit includes a controller for generating a test signal.

Among them, the controllers in the multiple test circuits are alternately arranged on opposite sides of the circuit board.

Each test circuit further includes a first transformer circuit, the input terminal is coupled to the power interface, and the output terminal is coupled to the controller to convert the external voltage into the first voltage and provide it to the controller.

Each test circuit also includes a second transformer circuit, a third transformer circuit, and a selection circuit, where the input terminals of the second transformer circuit and the third transformer circuit are coupled to the power supply interface, and the output terminal is The memory card to be tested is coupled to convert the external voltage into a second voltage and a third voltage respectively, and the second voltage or the third voltage is provided to the memory card to be tested through the selection circuit.

Among them, the first voltage is 1.2V, the second voltage is 1.8V, and the third voltage is 3.3V.

Among them, the memory card to be tested uses the eMMC protocol; each test circuit also includes an eMMC IO pin, which is provided at one end of the circuit board and is coupled to the memory card to be tested.

Among them, each test circuit also includes a light-emitting circuit, which is coupled to the controller.

Among them, the light-emitting circuits in the plurality of test circuits are arranged side by side and arranged at one end of the circuit board, and are arranged opposite to the controller at both ends of the circuit board.

According to the second aspect of the present application, a test device is provided. The test equipment includes at least one test board connected to a plurality of memory cards to be tested to test the plurality of memory cards to be tested at the same time, wherein the test board is the test board in the first aspect described above.

The beneficial effects of the present application are: multiple test circuits are provided on the circuit board, and multiple memory cards are tested at a time, thereby improving test efficiency.

[Description of the drawings]

FIG. 1 is a schematic diagram of a test board according to the first embodiment of the present application.

2 is a schematic circuit diagram of a test circuit on a test board according to an embodiment of the present application.

FIG. 3 is a top view of a test board according to a second embodiment of the application.

4 is a front view of a test board according to a second embodiment of the application.

【detailed description】

Certain terms used throughout this specification and claims refer to specific components. As those skilled in the art can understand, electronic device manufacturers can use different names to refer to the same component. This article does not distinguish parts by name, but by function. In the following description and claims, the term "including" is an open-ended qualified word, so it should be interpreted to mean "including but not limited to...". In addition, the term "coupled" is intended to mean indirect electrical coupling or direct electrical coupling. Therefore, when one device is coupled to another device, such coupling may be direct electrical coupling or indirect electrical coupling through other devices and coupling parts.

As shown in FIG. 1, it is a schematic diagram of the test board according to the first embodiment of the present application. The test board 10 is used to test a memory card, wherein the memory card includes but is not limited to SD (Secure Digital Memory Card) card, TF (Trans-flash Card) card, MMC (Multi-Media Card) card, EMMC (Embedded Multi Media Card) ) Card, EMCP (Embedded Multi-Chip Package) card, CF (Compact Flash) card. The test board 10 includes a circuit board 11 and a plurality of test circuits 12. A plurality of test circuits 12 are disposed on the circuit board 11 and are independent of each other. Each test circuit 12 is coupled to a memory card to be tested to provide a test signal to the memory card to be tested.

In this embodiment, multiple test circuits 12 are provided on the circuit board 11 to test multiple memory cards at a time to improve test efficiency.

It should be noted that in this application, the specific circuit part in the test circuit 12 and its position on the circuit board 11 are not limited, therefore, the test circuit 12 is shown as a dotted frame in FIG. 1, and FIG. 1 The position of the specific circuit part in the test circuit 12 on the circuit board 11 is not specifically shown in FIG.

In an embodiment, eight test circuits 12 are disposed on the circuit board 11.

The following uses an example in which eight test circuits 12 are provided on the circuit board 11 as an example.

As shown in FIG. 2, it is a schematic circuit diagram of a test circuit on a test board according to an embodiment of the present application. Each test circuit 12 includes a controller 121 for generating a test signal. In an example, the controller 121 may be implemented using an integrated chip. For example, the controller 121 may be a DM8371 controller.

At the same time, as shown in FIGS. 3 and 4, it is a top view and a front view of a test board according to a second embodiment of the present application. Controllers 121 in a plurality of test circuits 12 are alternately arranged on opposite sides of the circuit board 11. It should be noted that 8 test circuits 12 are shown on the circuit board 11 in FIG. 2, that is, the test board 10 includes 8 test circuits 12, but those skilled in the art can understand that according to the size of the circuit board 11, it can be set For other number of test circuits 12, for example, four, at this time, four test circuits are alternately arranged on opposite sides of the circuit board 11, so that the size of the circuit board 11 becomes smaller.

As shown in FIG. 2, the test circuit 12 further includes a first transformer circuit 122. The input terminal of the first transformer circuit 122 is coupled to the power interface 123, and the output terminal is coupled to the controller 121 to convert the external voltage V0 into the first voltage V1 and provide it to the controller 121. The controller 121 works under the action of the first voltage V1.

As shown in FIG. 2, the test circuit 12 further includes a second transformer circuit 124, a third transformer circuit 125 and a selection circuit 126, wherein the input terminals of the second transformer circuit 124 and the third transformer circuit 125 are both connected to the power supply 123 is coupled, and the output terminal is coupled to the memory card to be tested through the selection circuit 126. The second transformer circuit 124 converts the external voltage V0 to the second voltage V2, the third transformer circuit 125 converts the external voltage V0 to the third voltage V3, and the second voltage V2 or the third voltage V3 passes through the selection circuit 126 Provide to the memory card to be tested. The memory card to be tested operates under the action of the second voltage V2 or the third voltage V3.

In the above manner, the external voltage V0 is converted into the second voltage V2 and the third voltage V3 through the two transformer circuits, respectively, and is selected by the selection circuit 126 to be provided to the memory card to be tested, thereby enabling the memory to be tested The card works, so that memory cards with different operating voltages can be tested, increasing the type of memory card to be tested.

In one example, the first voltage V1 is 1.2V, the second voltage V2 is 1.8V, and the third voltage V3 is 3.3V.

In an embodiment, the memory card to be tested uses the eMMC protocol, that is, the memory card to be tested is a memory card of the eMMC protocol.

The following uses the eMMC protocol memory card as an example to illustrate, for example, NM card (multimedia memory card). When the memory card to be tested is a memory card of the eMMC protocol, the memory card to be tested includes an interface contact piece, which is used to establish an electrical connection between the memory card to be tested and an external device, for example, the test board 10.

As shown in FIG. 2, the test circuit 12 also includes an eMMC IO pin 127. The eMMC IO pin 127 is coupled to the controller 121, and it executes the eMMC protocol. The eMMC IO pin 127 is electrically connected to the interface contact of the memory card to be tested, and then the memory card to be tested receives the test signal for testing. In one example, the interface contacts of the eMMC protocol memory card include 3.3V power contacts (VCC), ground contacts (GND), clock contacts (CLK), command contacts (CMD), and 4 data contacts (D0-D3), in this example, the settings of 8 interface contacts are as follows:

子触片号Sub contact number	定义definition	子触片号Sub contact number	定义definition
11	D1D1	55	D2D2
22	CMDCMD	66	VCCVCC
33	GNDGND	77	D0D0
44	D3D3	88	CLKCLK

Among them, the 3.3V power contact (VCC) is used to receive the third voltage V3 output by the third transformer circuit 125. The standard eMMC protocol needs to provide two power inputs of VCC (3.3V) and VCCQ (3.3V or 1.8V), and 8 data pins. In order to reduce the area of the memory card, the NM card provided in this embodiment is provided with 8 Interface contacts, of which there are only VCC pins, so only 3.3V power input is reserved, and only four data interface contacts are set.

In this embodiment, as shown in FIG. 4 at the same time, the eMMC IO pins 127 of the plurality of test circuits 12 are provided at one end of the circuit board 11. As mentioned above, the eMMC IO pin 127 of the test circuit 12 is coupled to the memory card to be tested. In one example, the eMMC IO pin 127 of the test circuit 12 may be coupled to the memory card to be tested through a connector, for example, setting Another circuit board with a plug slot. The test board 10 is connected to another circuit board through the insertion slot, and the memory card to be tested is placed on the other circuit board, and then the eMMC IO pin 127 of the test circuit 12 is coupled to the memory card to be tested.

As shown in FIG. 2, the test circuit 12 further includes a light emitting circuit 128. The light emitting circuit 128 is coupled to the controller 121. The light emitting circuit 128 is used to indicate the test condition of the memory card to be tested. For example, it indicates whether the test of the memory card to be tested is normal. When the light-emitting circuit 128 emits light, it indicates that the memory card to be tested is being tested. When the light-emitting circuit 128 does not emit light, it indicates that the memory card to be tested is not tested, that is, a test failure occurs. In one embodiment, the light emitting circuit 128 includes an LED lamp. At the same time, as shown in FIG. 4, the light emitting circuits 128 in the plurality of test circuits 12 are arranged side by side and arranged at one end of the circuit board 11, and are arranged opposite to the controller 121 at both ends of the circuit board 11.

It should be noted that in this application, the position of each circuit part of the test circuit 12 on the circuit board 11 is not limited, so each circuit in the test circuit 12 is not specifically shown in FIGS. 3 and 4 The position of the part on the circuit board 11.

This application also provides a test device. The test device includes at least one test board, and the at least one test board is connected to a plurality of memory cards to be tested to test the plurality of memory cards to be tested at the same time. The test board is the test board 10 of the above embodiment.

In this embodiment, one test board can test multiple memory cards to be tested at the same time. With at least one test board, the number of memory cards to be tested that can be tested simultaneously increases, improving the efficiency of one test.

Those skilled in the art will readily know that many modifications and changes can be made to the device and method while maintaining the teaching content of the present application. Therefore, the above disclosure should be considered as limited only by the scope of the appended claims.

Claims

A test board for testing a memory card, characterized in that it includes:

Circuit board; and

A plurality of test circuits are provided on the circuit board and are independent of each other. Each test circuit is coupled to a memory card to be tested to provide a test signal to the memory card to be tested.
The test board according to claim 1, wherein each of the test circuits includes a controller for generating the test signal.
The test board according to claim 2, wherein the controllers in the plurality of test circuits are alternately arranged on opposite sides of the circuit board.
The test board according to claim 2, wherein each of the test circuits further includes a first transformer circuit, an input terminal is coupled to the power interface, and an output terminal is coupled to the controller to connect the external The voltage is converted to a first voltage and provided to the controller.
The test board according to claim 2, wherein each of the test circuits further includes a second transformer circuit, a third transformer circuit and a selection circuit, wherein the second transformer circuit and the first The input terminal of the three-transformer circuit is coupled to the power interface, and the output terminal is coupled to the memory card to be tested through the selection circuit to convert the external voltage into a second voltage and a third voltage, respectively, and The second voltage or the third voltage is provided to the memory card under test through the selection circuit.
The test board according to claim 4, wherein the first voltage is 1.2V.
The test board according to claim 5, wherein the second voltage is 1.8V and the third voltage is 3.3V.
The test board according to claim 6 or 7, wherein the memory card to be tested uses the eMMC protocol;

Each test circuit further includes an eMMC IO pin, which is provided at one end of the circuit board and is coupled to the memory card to be tested.
The test board according to claim 2, wherein each of the test circuits further includes a light-emitting circuit coupled to the controller.
The test board according to claim 9, wherein the light emitting circuits in the plurality of test circuits are arranged side by side and at one end of the circuit board, and are arranged opposite to the controller on the circuit board Both ends.
A test device, characterized by comprising at least one test board according to at least one of claims 1-10, connected to a plurality of memory cards to be tested to test the plurality of memory cards to be tested at the same time .