CN111007314B - Method for measuring stability of SOC signal through oscilloscope afterglow mode - Google Patents
Method for measuring stability of SOC signal through oscilloscope afterglow mode Download PDFInfo
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- CN111007314B CN111007314B CN201911127966.0A CN201911127966A CN111007314B CN 111007314 B CN111007314 B CN 111007314B CN 201911127966 A CN201911127966 A CN 201911127966A CN 111007314 B CN111007314 B CN 111007314B
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R23/00—Arrangements for measuring frequencies; Arrangements for analysing frequency spectra
- G01R23/16—Spectrum analysis; Fourier analysis
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R13/00—Arrangements for displaying electric variables or waveforms
- G01R13/02—Arrangements for displaying electric variables or waveforms for displaying measured electric variables in digital form
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- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
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Abstract
The invention provides a method for measuring the stability of an SOC signal through an oscilloscope afterglow mode, which comprises the following steps: (1) calling out an afterglow mode on an oscilloscope; (2) selecting a test point of the SOC: emmc_d0, emmc_cmd, emmc_clk; (3) Measuring the internal output signal of the SOC, and recording information comprising the internal output signal of the SOC by utilizing an afterglow mode of an oscilloscope; (4) And comparing the information containing the internal output signal of the SOC with the standard value of each item of preset data to judge whether enough margin exists to meet the stability of the SOC signal. By the method, whether the output signal of the SOC (System on chip) end is stable and reliable can be effectively tested and judged, and further guarantee is provided for the stability of system communication.
Description
Technical Field
The invention relates to the field of testing, in particular to a method for measuring the stability of an SOC signal through an oscilloscope afterglow mode.
Background
Whether SOC (System on chip) end output signals are stable and reliable or not greatly influences the stability of system communication, however, after the existing SOC leaves a factory, a user generally does not have a method for testing whether signals of the existing SOC have stability or not, so that development of a scheme for testing SOC (System on chip) end output signals is urgently needed, and whether the output signals are stable and reliable or not is judged.
Disclosure of Invention
In order to solve the problems, the invention provides a method for measuring the stability of the SOC signals through an oscilloscope afterglow mode, and the method can be used for effectively testing and judging whether the output signals of the SOC (System on chip) end are stable and reliable, so that further guarantee is provided for the stability of system communication.
The invention is realized by the following technical scheme:
the invention provides a method for measuring the stability of an SOC signal through an oscilloscope afterglow mode, which comprises the following steps:
(1) An afterglow mode is called out on an oscilloscope;
(2) Selecting a test point of the SOC: emmc_d0, emmc_cmd, emmc_clk;
(3) Measuring the internal output signal of the SOC, and recording information comprising the internal output signal of the SOC by utilizing an afterglow mode of an oscilloscope;
(4) And comparing the information containing the internal output signal of the SOC with the standard value of each item of preset data to judge whether enough margin exists to meet the stability of the SOC signal.
Further, the information including the SOC internal output signal includes a signal waveform, a signal jitter, parameter data of a clock signal, parameter data of an input instruction, parameter data of an output instruction, parameter data of input data, and parameter data of output data.
The invention has the beneficial effects that:
the method for measuring the stability of the SOC signal through the oscilloscope afterglow mode, provided by the invention, comprises the following steps of: (1) calling out an afterglow mode on an oscilloscope; (2) selecting a test point of the SOC: emmc_d0, emmc_cmd, emmc_clk; (3) Measuring the internal output signal of the SOC, and recording information comprising the internal output signal of the SOC by utilizing an afterglow mode of an oscilloscope; (4) And comparing the information containing the internal output signal of the SOC with the standard value of each item of preset data to judge whether enough margin exists to meet the stability of the SOC signal. By the method, whether the output signal of the SOC (System on chip) end is stable and reliable can be effectively tested and judged, and further guarantee is provided for the stability of system communication.
Drawings
FIG. 1 is a table of measurement results of the measurement of the SOC signal by the oscilloscope persistence mode in the present invention.
Detailed Description
In order to more clearly and completely describe the technical scheme of the invention, the invention is further described below with reference to the accompanying drawings.
The invention provides a method for measuring the stability of an SOC signal through an oscilloscope afterglow mode, which comprises the following steps:
(1) An afterglow mode is called out on an oscilloscope;
(2) Selecting a test point of the SOC: emmc_d0, emmc_cmd, emmc_clk;
(3) Measuring the internal output signal of the SOC, and recording information comprising the internal output signal of the SOC by utilizing an afterglow mode of an oscilloscope;
(4) And comparing the information containing the internal output signal of the SOC with the standard value of each item of preset data to judge whether enough margin exists to meet the stability of the SOC signal.
In this embodiment, the step (1) specifically includes: firstly, selecting a display button on an oscilloscope; then select the "Display Persistence" button in the drop-down menu of the "display" pop-up; finally, the "Display Persistence" pop-up drop-down menu selects the "Infinite Persistence" button, thereby completing the setting of the afterglow mode.
Further, the information including the SOC internal output signal includes a signal waveform, a signal jitter, parameter data of a clock signal, parameter data of an input instruction, parameter data of an output instruction, parameter data of input data, and parameter data of output data.
In this embodiment, the internal output signal of the SOC is unstable due to the influence of power supply ripple, temperature, etc., or the problem of the internal PLL design, thereby affecting the stability of system communication.
In this embodiment, by observing the width of the corresponding afterglow in the test item, it can be seen whether the shape of the signal waveform, the signal jitter, is severe.
In this embodiment, the parameter data of the clock signal mainly includes frequency, period, duty ratio, slope, pulse width, wherein the preset standard value of the frequency of the clock signal is 0-200 MHZ; the preset standard value of the period of the clock signal is not less than 5ns; the preset standard value of the duty ratio of the clock signal is 30% -70%; the preset standard value of the slope of the clock signal is not less than 1.125V/ns, and the preset standard value of the pulse width of the clock signal is not less than 2.2ns.
In this embodiment, the parameter data of the input instruction includes a setup time and a hold time, wherein the preset standard value of the setup time is not less than 1.4ns, and the preset standard value of the hold time is not less than 0.8ns.
In this embodiment, the parameter data of the output instruction includes a setup time and a hold time, where a preset standard value of the setup time is 0-2 ns, and a preset standard value of the hold time is not less than 0.575ns.
In this embodiment, the parameter data of the input data includes a setup time, a hold time, and a slope, wherein a preset standard value of the setup time is not less than 0.4ns, a preset standard value of the hold time is not less than 0.4ns, and a preset standard value of the slope is not less than 1.125V/ns.
In this embodiment, the parameter data of the output data includes an output deviation time, an output deviation holding time, and a slope, wherein a preset standard value of the output deviation time is not greater than 0.4ns, a preset standard value of the output deviation holding time is not greater than 0.4ns, and a preset standard value of the slope is not less than 1.125V/ns.
In the embodiment, the afterglow abrasion function of the oscilloscope is utilized to adjust the test recording length, the signal waveform of the device during operation is recorded as much as possible in unit time, the signal jitter boundary, the quality can be clearly shown, such as the upper boundary and the lower boundary range of a time sequence test, the slope, the overshoot and the like, the data are analyzed and summarized, and whether the current design is reasonable or not has enough margin to meet the reliability and the stability of the SOC signal is judged.
As shown in fig. 1, the test results of the information including the SOC internal output signal are all in the range of the respective preset standard values, for example, the clock in the test item has a jitter of 195ps, the period of the 200mhz clock is 5ns, the duty ratio is 3.9%, and for the whole clock, the influence is small, so that the clock can be judged to be relatively stable; the signal itself is relatively stable as compared with the test results of the signal line. As described above, the SOC signal is relatively stable, and the system stability can be judged to be relatively high by combining the test result and comparing the residual quantity of each parameter with the residual quantity of each parameter; for example, the setup time of the "input command" requires a minimum value of 1.4nS, but the test result is 2.325nS, the margin is 0.925nS (2.325-1.4), and even if 195ps of signal jitter is removed, the margin of 0.73nS is also provided, so that stable reading of the signal can be ensured, and parameters such as holding time and the like are also judged.
The method for measuring the stability of the SOC signal through the oscilloscope afterglow mode can effectively test and judge whether the output signal of the SOC (System on chip) end is stable and reliable, and further guarantee the stability of system communication.
Of course, the present invention can be implemented in various other embodiments, and based on this embodiment, those skilled in the art can obtain other embodiments without any inventive effort, which fall within the scope of the present invention.
Claims (1)
1. A method for measuring the stability of an SOC signal by an oscilloscope persistence mode, comprising the steps of:
(1) An afterglow mode is called out on an oscilloscope;
(2) The test points of the selected SOC comprise EMMC_D0, EMMC_CMD and EMMC_CLK, and the afterglow abrasion function of the oscilloscope is utilized to adjust the test record length so as to record the signal waveform of the SOC device during operation as much as possible in unit time, so that the signal jitter boundary and quality can be clearly shown;
(3) Measuring an internal output signal of the SOC, and recording information containing the internal output signal of the SOC by utilizing an afterglow mode of the oscilloscope, wherein the information of the internal output signal of the SOC comprises a signal waveform, signal jitter, parameter data of a clock signal, parameter data of an input instruction, parameter data of an output instruction, parameter data of the input data and parameter data of the output data, whether the signal waveform is serious or not can be seen by observing the width of corresponding afterglow in a test item, the parameter data of the clock signal mainly comprises frequency, period, duty ratio, slope and pulse width, the parameter data of the input instruction comprises an establishment time and a holding time, the parameter data of the output instruction comprises the establishment time and the holding time, the parameter data of the input data comprises an establishment time, a holding time and a slope, and the parameter data of the output data comprises an output deviation time, an output deviation holding time and a slope;
(4) And comparing the information containing the internal output signal of the SOC with the standard value of each item of preset data to judge whether enough margin exists to meet the stability of the SOC signal.
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| WO2008137458A2 (en) * | 2007-05-01 | 2008-11-13 | Mentor Graphics Corporation | Generating test sequences for testing circuit channels |
| CN103136138B (en) * | 2011-11-24 | 2015-07-01 | 炬力集成电路设计有限公司 | Chip, chip debugging method and communication method for chip and external devices |
| CN102768336A (en) * | 2012-07-20 | 2012-11-07 | 中国科学院深圳先进技术研究院 | Built-in self-test system based on on-chip system or system-in-package |
| CN203276862U (en) * | 2013-05-17 | 2013-11-06 | 深圳市江波龙电子有限公司 | Storage chip and storage equipment |
| CN106767992B (en) * | 2017-03-10 | 2019-09-20 | 上海麦歌恩微电子股份有限公司 | Hall switch sensor copped wave delay measuring method and system |
| CN109165178B (en) * | 2018-08-01 | 2020-04-03 | 北京遥感设备研究所 | Rapid IO-based high-speed communication method between SoC (system on a chip) chips of system on missile |
| CN209418157U (en) * | 2018-12-26 | 2019-09-20 | 深圳市江波龙电子股份有限公司 | It is a kind of for testing the test board and test equipment of storage card |
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