WO2020133968A1 - 显示装置及其显示面板、oled阵列基板 - Google Patents

显示装置及其显示面板、oled阵列基板 Download PDF

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Publication number
WO2020133968A1
WO2020133968A1 PCT/CN2019/092563 CN2019092563W WO2020133968A1 WO 2020133968 A1 WO2020133968 A1 WO 2020133968A1 CN 2019092563 W CN2019092563 W CN 2019092563W WO 2020133968 A1 WO2020133968 A1 WO 2020133968A1
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WIPO (PCT)
Prior art keywords
oled
sub
pixels
pixel
display area
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Ceased
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PCT/CN2019/092563
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English (en)
French (fr)
Inventor
楼均辉
胡凤章
张露
沈志华
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Yungu Guan Technology Co Ltd
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Yungu Guan Technology Co Ltd
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Publication of WO2020133968A1 publication Critical patent/WO2020133968A1/zh
Priority to US17/005,661 priority Critical patent/US11380262B2/en
Anticipated expiration legal-status Critical
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    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
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    • G09G3/3258—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element
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    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
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    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
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    • G09G3/3275—Details of drivers for data electrodes
    • H—ELECTRICITY
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    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
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    • H10K50/805—Electrodes
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Definitions

  • the present application relates to the technical field of OLED display equipment, in particular to a display device, a display panel thereof, and an OLED array substrate.
  • the purpose of the present application is to provide a display device, its display panel, and an OLED array substrate.
  • a first aspect of the present application provides an OLED array substrate.
  • the display area includes a non-transparent display area and a transparent display area.
  • the non-transparent display area is provided with first OLED sub-pixels arranged in an array
  • the transparent display area is provided with second OLED sub-pixels arranged in an array.
  • the driving of the first OLED sub-pixels in each column corresponds to a part of the data signal channels of the display driving integrated chip.
  • the driving of the second OLED sub-pixel corresponds to the data signal channel of the remaining part of the display driving integrated chip.
  • the data of all the data signal channels corresponds to a frame of the display area.
  • the first OLED sub-pixel In a direction perpendicular to the plane of the OLED array substrate, the first OLED sub-pixel includes a lower electrode, a first OLED light emitting structure located on the lower electrode, and an upper electrode located on the first OLED light emitting structure .
  • the second OLED sub-pixel includes a first electrode extending in the column direction, a second OLED light emitting structure extending in the column direction on the first electrode, and a second electrode located on the second OLED light emitting structure.
  • the second OLED subpixels arranged in the array include one row of several columns or two rows of several columns of the second OLED subpixels; when there are two rows of several columns, two rows of the second OLED subpixels in the same column
  • the OLED sub-pixels have the same color.
  • the driving method of the second OLED sub-pixel is active, and the OLED array substrate further includes at least one pixel driving circuit corresponding to the second OLED sub-pixel.
  • the OLED array substrate further includes a bezel area and a transition area, the bezel area is located in a peripheral area of the display area, and the transition area is located between the transparent display area and the non-transparent display area.
  • the pixel driving circuit is disposed in the non-transparent display area, the bezel area, or the transition area.
  • the second OLED sub-pixels are all the same color sub-pixels
  • the driving method of each second OLED sub-pixel is passive
  • the first electrode of each column of the second OLED sub-pixels in a row is connected to the display drive
  • the second OLED sub-pixel includes multiple color sub-pixels, adjacent rows of second-color second OLED sub-pixels in a row form a second OLED pixel unit, and each of the second OLED sub-pixels
  • the driving mode is passive, and the first electrodes of the same color sub-pixels in each row of a row are connected to the same data signal channel or different data signal channels of the display driving integrated chip.
  • each column of second OLED sub-pixels is a pixel of multiple colors, adjacent rows of second-color second OLED sub-pixels in a row form a pixel unit, and a driving method of each second OLED sub-pixel It is passive.
  • the first electrode of the second OLED sub-pixel in each row of a row is connected to the drain of a switching transistor, and the source of the switching transistor corresponding to the same-color sub-pixel in each column of the different second OLED pixel unit is connected to the display driving integrated chip
  • the gates of the switching transistors are connected to the same or different switching signals.
  • the second OLED sub-pixels are all the same color sub-pixels
  • the driving method of each second OLED sub-pixel is active
  • the first electrode of each second OLED sub-pixel is connected to the same pixel driving circuit
  • the drain of the driving transistor in the display, and the gate of the driving transistor corresponds to the same data signal channel of the display driving integrated chip
  • the second OLED sub-pixel pixel includes multiple color sub-pixels, adjacent rows of second-color second OLED sub-pixels in a row form a second OLED pixel unit, and each second OLED sub-pixel is driven In the active mode, the first electrodes of the same-color sub-pixels in each row of a row are connected to the drains of driving transistors in the same or different pixel driving circuits, and the gate of each driving transistor corresponds to a data signal for displaying and driving the integrated chip aisle.
  • the pixel driving circuit corresponding to each of the second OLED sub-pixels has a function of compensating for the threshold voltage of the driving transistor.
  • the switching signal in the pixel drive circuit corresponding to the second OLED sub-pixel of each row comes from a part of the scanning signal channel in the GIP circuit, and the switching signal in the pixel drive circuit corresponding to each of the first OLED sub-pixels comes from the The remaining part of the GIP circuit scans the signal channel.
  • the second electrode of the second OLED subpixel is a surface electrode, and/or the upper electrode of each first OLED subpixel is connected to the second electrode of each second OLED subpixel to One side electrode.
  • the first electrode and the second OLED of the second OLED sub-pixels in each column The light emitting structure extends in the column direction in a section in the middle of the transparent display area, or extends from the top of the transparent display area in the column direction to the middle or bottom end of the transparent display area, or from the The middle of the transparent display area extends to the bottom of the transparent display area along the column direction.
  • the first electrodes of the second OLED sub-pixels in the first row and each column and the second OLED light-emitting structure are in the transparent display area
  • a section in the middle and upper part of the battery extends in the column direction, or extends from the top of the transparent display area in the column direction to the middle upper portion or the middle of the transparent display area.
  • the first electrode of the second OLED sub-pixel in the second row and each column and the second OLED light-emitting structure extend in the column direction in a middle and lower section of the transparent display area, or from the bottom end of the transparent display area It extends to the middle or lower part of the transparent display area along the column direction.
  • a second aspect of the present application provides a display panel including any one of the OLED array substrates described above.
  • a third aspect of the present application provides a display device including any one of the above display panels.
  • the reason why the display of the transparent display area and the non-transparent display area are not synchronized is that the transparent display area and the non-transparent display area respectively use their own display drivers to provide switching signals and/or data signals, which are not related to each other.
  • this application uses the same display driver integrated chip to drive the second OLED pixel in the transparent display area and the first OLED pixel in the non-transparent display area on the same display panel, that is, part of the data signal channel in the display drive integrated chip is provided to The first OLED sub-pixels in each column, and the remaining part of the data signal channel are provided to the second OLED pixels in each column.
  • the sum of the number of all data signal channels corresponding to the first OLED sub-pixel and the number of all data signal channels corresponding to the driving of the second OLED pixel is the total number of data signal channels, that is, the data corresponding to all data signal channels A frame in the display area. In this way, the correlation of the data signal channels in the display drive integrated chip is used to achieve consistent screens and drive synchronization.
  • the first electrode of the second OLED pixel of the transparent display area extends in the column direction and is arranged in a row of several columns or two rows of several columns to reduce the boundary of the graphic film layer, reduce the PPI, and increase the parallelism appropriately
  • the structure spacing improves the diffraction problem during light transmission, so the photo sensor imaging effect in the transparent display area is good.
  • the driving method of the second OLED pixels in the transparent display area is a) active or b) passive. That is, the transparent display area is AMOLED or PMOLED.
  • the pixel drive circuit corresponding to the second OLED pixel of the transparent display area is provided in the non-transparent display area, the border area, or the transparent display area and the non-transparent display area The transition zone between.
  • the former scheme can further reduce the graphic film layer in the transparent display area and further reduce the diffraction problem in the light transmission mode.
  • the second OLED subpixels in each column are the same color subpixels; or d) the second OLED subpixels in each column are the subpixels of multiple colors, and adjacent rows of subpixels of different colors in a row A second OLED pixel unit is formed.
  • the solution c) when the transparent display area performs the display function, the area emits monochromatic light, such as red light, blue light, green light, etc.
  • the solution d) compared with the pixel unit in the non-transparent display area, it can be regarded as a pixel unit in one row with several columns or two rows with several columns.
  • each of the second OLED pixel units The sub-pixels emit light, and the display effect is closer to that of the non-transparent display area.
  • the first electrodes of the same-color sub-pixels in each column are connected to the drain of the driving transistor in the same pixel driving circuit, and the gate of the driving transistor corresponds to the display Drive a data signal channel of the integrated chip.
  • the first electrode of each sub-pixel may be connected to the drain of a driving transistor in a pixel driving circuit, and the gate of each driving transistor corresponds to a piece of data for displaying and driving an integrated chip Signal channel.
  • the pixel driving circuit in the former scheme has a smaller number of driving transistors and occupies less area; in addition, the number of data signal channels is smaller, the number of connection traces is also smaller, and the occupied area is smaller.
  • the first electrodes of the same-color sub-pixels of each column of each second OLED pixel unit are connected to the drains of the driving transistors in the same or different pixel driving circuits, and the gates of each driving transistor Corresponding to a data signal channel of the display driving integrated chip.
  • the pixel driving circuit in the former scheme has a smaller number of driving transistors and occupies less area; in addition, the number of data signal channels is smaller, the number of connection traces is also smaller, and the occupied area is smaller.
  • the first electrodes of the same-color sub-pixels in each column may be connected to the same data signal channel of the display driving integrated chip.
  • the first electrode of each pixel in the same-color sub-pixels of each column, may be connected to a data signal channel of the display driving integrated chip.
  • the third electrodes of the same-color sub-pixels in each column of each second OLED pixel unit are connected to the same data signal channel or different data signal channels of the display driving integrated chip.
  • the number of data signal channels in the former scheme is smaller, the number of connection traces is also smaller, and the occupied area is smaller.
  • the first electrode of each column of sub-pixels in each second OLED pixel unit is connected to the drain of a switching transistor, and the source of the switching transistor corresponding to the same-color sub-pixel in each column of each second OLED pixel unit is connected to the display driver
  • the gate is connected to the same or different switching signals.
  • the gate is connected to the same switching signal, in addition to the unified control of all the same-color sub-pixels to perform the display function or the light-transmitting function, when the switching signal is "off", it can also control all the same-color sub-pixels to perform the light-transmitting function to prevent adjacent other Color sub-pixels display crosstalk.
  • the pixel driving circuit corresponding to the second OLED sub-pixels in one row and each column has a function of compensating the threshold voltage of the driving transistor. The above compensation can improve the life span and display uniformity of the display panel.
  • the switching signal in the pixel drive circuit corresponding to the second OLED sub-pixels in one row and column comes from the partial scan signal channel of the GIP circuit (for the 2T1C pixel drive circuit, it is a scan signal channel; for the 7T1C pixel drive The current is two scanning signal channels), and the switching signal in the pixel driving circuit corresponding to the first OLED sub-pixel is derived from the scanning signal channel of the remaining part of the same GIP circuit.
  • the transparent display area and the non-transparent display area share the same GIP circuit, which can more easily improve the display synchronization of the two areas.
  • the first electrode and the light emitting structure of the second OLED sub-pixel of each column extend in the column direction in a middle section of the transparent display area, or are self-transparent
  • the top of the display area extends in the column direction to the middle or bottom of the transparent display area, or extends from the middle of the transparent display area in the column direction to the bottom of the transparent display area;
  • the first The first electrodes of the second OLED sub-pixels in one row and each column and the OLED light-emitting structure extend in the column direction in a middle section of the transparent display area, or extend from the top of the transparent display area in the column direction to the upper middle portion of the transparent display area Or the middle;
  • the first electrode of the second OLED sub-pixel in the second row and each column and the OLED light-emitting structure extend in the column direction in a middle section of the transparent display area, or extend from the bottom end of the transparent display area
  • each column of second OLED pixels in the transparent display area includes a first electrode, a second OLED light emitting structure, and a second electrode disposed in a direction perpendicular to the plane of the OLED array substrate, each second OLED pixel
  • the second electrode is connected as a side electrode.
  • Both the first electrode and the second OLED light emitting structure can be arranged in one row or several columns or two rows and several columns.
  • One second OLED light emitting structure corresponds to one first electrode, which can reduce the boundary of the graphic film layer and improve the diffraction problem.
  • FIG. 1 is a top view of the OLED array substrate in the first embodiment of the present application.
  • FIG. 2 is a cross-sectional view along the line AA in FIG. 1;
  • FIG. 3 is a schematic circuit diagram of a passive driving type of second OLED sub-pixels in each column of the transparent display area
  • FIG. 4 is a schematic circuit diagram of another passive driving type of second OLED sub-pixels in each column of the transparent display area;
  • FIG. 5 is a schematic circuit diagram of an active driving type of second OLED sub-pixels in each column of the transparent display area
  • Figure 6 is a GIP circuit structure and timing diagram
  • FIG. 7 is a schematic diagram of another actively driven circuit of the second OLED sub-pixel in each column of the transparent display area;
  • 8A and 8B are a circuit diagram and a timing diagram of a pixel driving circuit having a function of compensating for the threshold voltage of a driving transistor;
  • FIG. 9 is a top view of the OLED array substrate in the second embodiment of the present application.
  • FIG. 10 is a schematic diagram of a passive driving circuit of the second OLED sub-pixels in each column of the transparent display area
  • FIG. 11 is a schematic circuit diagram of another passive driving type of second OLED sub-pixels in each column of the transparent display area;
  • FIG. 12 is a schematic circuit diagram of yet another passive driving type of second OLED sub-pixels in each column of the transparent display area;
  • FIG. 13 is a schematic diagram of an actively driven circuit of the second OLED sub-pixels in each column of the transparent display area;
  • FIG. 16 is a plan view of the OLED array substrate in the fifth embodiment of the present application.
  • 17 is a schematic circuit diagram of a passive driving type of second OLED sub-pixels in two rows and columns of a transparent display area;
  • FIG. 18 is a schematic diagram of another passive driving circuit of the second OLED sub-pixel in two rows and columns of the transparent display area;
  • 19 is a schematic diagram of an actively driven circuit of the second OLED sub-pixel in two rows and columns of the transparent display area;
  • 20 is a schematic diagram of another actively driven circuit of the second OLED sub-pixel in two rows and columns of the transparent display area;
  • 21 is a top view of the OLED array substrate in the sixth embodiment of the present application.
  • 22 is a schematic diagram of a passively driven circuit of second OLED sub-pixels in two columns and rows of a transparent display area;
  • 23 is a schematic diagram of an actively driven circuit of the second OLED sub-pixels in two columns and rows of the transparent display area;
  • 24 is a schematic diagram of a passively driven circuit of second OLED sub-pixels in two columns and rows of a transparent display area
  • 25 is a schematic diagram of an actively driven circuit of the second OLED sub-pixels in two columns and rows of the transparent display area;
  • FIG. 26 is a top view of an OLED array substrate in a seventh embodiment of this application.
  • Non-transparent display area 10a Transparent display area 10b
  • Driving transistor X2 storage capacitor C, storage capacitor C
  • the first transistor T1, the second transistor T2 are connected to The first transistor T1 and the first transistor T1
  • the third transistor T3, the fourth transistor T4, and the fourth transistor T4 are the third transistor T3, the fourth transistor T4, and the fourth transistor T4
  • a part of the area above the display screen is reserved for the installation of cameras, sensors, earpieces and other components.
  • the design will easily affect the overall consistency of the display screen.
  • FIG. 1 is a top view of an OLED (Organic Light Emitting Diode) array substrate in the first embodiment of the present application;
  • FIG. 2 is a cross-sectional view taken along line AA in FIG. 1.
  • OLED Organic Light Emitting Diode
  • the OLED array substrate 1 includes: a display area 10, and the display area 10 includes a non-transparent display area 10a and a transparent display area 10b.
  • the non-transparent display area 10a includes first OLED sub-pixels 11 arranged in an array.
  • the first OLED sub-pixel 11 includes: a lower electrode, located on the first electrode and along the The first OLED light emitting structure extending in the column direction and the upper electrode on the first OLED light emitting structure.
  • the lower electrode of the first OLED sub-pixel 11 is disposed close to the OLED array substrate 1.
  • the driving of the first OLED sub-pixels 11 in each column corresponds to a part of the data signal channels of the display driving integrated chip 12.
  • the transparent display area 10b includes second OLED sub-pixels 13 arranged in an array.
  • the second OLED sub-pixel 13 includes: a first electrode extending in the column direction, a second OLED light emitting structure extending in the column direction on the first electrode, and a second OLED The second electrode on the light emitting structure.
  • the transparent display area 10b performs a display function.
  • the transparent display area 10b performs the light transmission function.
  • the driving of the second OLED sub-pixels 13 in each column corresponds to the data signal channel of the remaining part of the same display driving integrated chip 12.
  • the data of all data signal channels corresponding to the driving of the first OLED sub-pixels 11 of each column and the second OLED sub-pixels 13 of each column correspond to one frame of the display area 10.
  • the second OLED sub-pixels 13 arranged in the array include one row of several columns or two rows of several columns of second OLED sub-pixels.
  • the second OLED sub-pixel 13 includes a first electrode 131 extending in the column direction, a second OLED light emitting structure 133 and a second electrode 132. Each OLED light emitting structure 133 is separated by a pixel definition layer 14.
  • the structure of the first OLED sub-pixel 11 is the same as the structure of the second OLED sub-pixel 13. In other alternatives, there may be no pixel definition layer 14 between the OLED light-emitting structures 133.
  • the difference between the second OLED sub-pixel 13 and the first OLED sub-pixel 11 is that in each column of the first OLED sub-pixel 11, the lower electrode, the first OLED light-emitting structure and the upper electrode are in a non-transparent display area 10a with several rows and columns The array is arranged and separated from each other.
  • the first electrodes 131 and the OLED light-emitting structures 133 in the second OLED sub-pixels 13 of each column arranged in an array extend from the top to the bottom of the transparent display area 10b in the column direction.
  • the two electrodes 132 may extend from the top to the bottom of the transparent display area 10b, or as shown in FIG.
  • the second electrodes 132 of the second OLED sub-pixels 13 in each column may be connected as a surface electrode, and/or each first OLED sub
  • the upper electrode of the pixel and the second electrode of each second OLED sub-pixel are connected to form a surface electrode.
  • all the second OLED sub-pixels 13 are sub-pixels of the same color.
  • all the second OLED sub-pixels 13 of the transparent display area 10b may be one of a red sub-pixel, a green sub-pixel, a blue sub-pixel, and a yellow sub-pixel.
  • the transparent display area 10b performs a display function, the area emits monochrome light.
  • the array arrangement of the first electrode 131 and the second OLED light emitting structure 133 in the second OLED sub-pixel 13 may also be set to be completely the same as the first OLED sub-pixel 11.
  • the first electrode 131 and the second OLED light-emitting structure 133 in the second OLED sub-pixel 13 of the transparent display area 10b are arranged in an array of one row of several columns or two rows of several columns extending in the column direction.
  • the arrangement of the first OLED sub-pixel 11 with several rows and columns of cells separated from each other can reduce the boundary of the graphic film layer and improve the diffraction problem during light transmission.
  • the light emission driving method of each second OLED sub-pixel 13 of the transparent display area 10b may be an active type or a passive type.
  • Passively driven OLED Passively driven OLED
  • PMOLED Passive Matrix OLED
  • passively driven OLED simply sets the second electrode and the first electrode into a matrix, and scans the pixels at the intersection of rows and columns in the array, each The pixels are all operated in a short pulse mode, and emit high-intensity light instantly.
  • the external circuit can be controlled by a display driver integrated chip (Display Driver Integrated Circuit, DDIC).
  • Active drive OLED Active Matrix OLED, AMOLED
  • active drive OLED includes thin film transistor (Thin Film Transistor, TFT) array.
  • TFT Thin Film Transistor
  • Each thin film transistor in the thin film transistor array includes a storage capacitor.
  • AMOLED uses an independent thin film transistor to control each pixel to emit light, and each pixel can emit light continuously. In other words, the addressing of each second OLED sub-pixel 13 is directly controlled by the thin film transistor array.
  • the row selection signal of the thin film transistor array can be derived from the GIP (Gate In Panel) circuit, and the column selection signal can be derived from the display driver integrated chip (DDIC).
  • GIP Gate In Panel
  • DDIC display driver integrated chip
  • FIG. 3 is a schematic diagram of a passive driving circuit of each second OLED sub-pixel 13 of the transparent display area. 1 and 3, the first electrode of each second OLED sub-pixel 13 is connected to the same data signal channel of the display driving integrated chip 12, and the second electrode of each second OLED sub-pixel 13 is grounded.
  • the color data carried by the data signal channel is consistent with the color of each second OLED sub-pixel 13.
  • the transparent display area has only one row of second OLED sub-pixels 13, it is only necessary to apply the same driving current to each column of second OLED sub-pixels 13, and the driving current occupies one data signal channel of the display driving integrated chip (DDIC).
  • the remaining data channels of the display driving integrated chip may be provided to each column of the first OLED sub-pixels 11 of the non-transparent display area 10a, that is, each column of the first OLED sub-pixels 11 occupies one data signal channel.
  • the sum of the number of multiple data signal channels occupied by the non-transparent display area 10a and one data signal channel occupied by the transparent display area 10b is the total number of data signal channels, that is, the data of all data signal channels corresponds to one frame of the display area 10 .
  • the data of all data signal channels corresponding to one frame of the display area 10 means that within one image refresh period, the data of each data channel is processed by processing one image.
  • FIG. 4 is a schematic circuit diagram of another passive driving type of each second OLED sub-pixel 13 of the transparent display area.
  • the first electrodes of the second OLED sub-pixels 13 in each column are connected to different data signal channels of the display driving integrated chip 12, and the second electrodes of the second OLED sub-pixels 13 are grounded.
  • the color data carried by each data signal channel is consistent with the color of the second OLED sub-pixel 13 of the connected column.
  • each column of second OLED sub-pixels 13 occupies the display driving integrated chip (DDIC)
  • DDIC display driving integrated chip
  • the remaining data channels of the display driving integrated chip may be provided to each column of the first OLED sub-pixels 11 of the non-transparent display area 10a, that is, each column of the first OLED sub-pixels 11 occupies one data signal channel.
  • the sum of the number of data signal channels occupied by the non-transparent display area 10a and the number of data signal channels occupied by the transparent display area 10b is the total number of data signal channels, and the data of all data signal channels corresponds to one frame of the display area 10.
  • the wiring of the first electrode of each second OLED sub-pixel 13 is disposed in the border area of the OLED array substrate 1, and the border area is located in the peripheral area of the display area 10.
  • the wiring of the first electrode may also be disposed in the non-transparent display area 10a or the transparent display area 10b.
  • the scheme in which the traces of the first electrode are arranged in the frame area and the non-transparent display area 10a can further reduce the graphic film layer of the transparent display area 10b and further reduce the transparency Diffraction in light mode.
  • the number of data signal channels is small, the number of traces connecting the data signal channels and the sub-pixels is also small, and the occupied area is small.
  • FIG. 5 is a schematic circuit diagram of an active driving type of each second OLED sub-pixel 13 of the transparent display area.
  • the first electrode of each second OLED sub-pixel 13 is connected to the drain of the same driving transistor in the pixel driving circuit, and the second electrode of each second OLED sub-pixel 13 is grounded.
  • the gate of the driving transistor corresponds to the same data signal channel of the display driving integrated chip (DDIC); the source of the driving transistor is connected to the power supply voltage VDD.
  • the pixel driving circuit includes a switching transistor X1, a driving transistor X2, and a storage capacitor C.
  • the data line can be connected to a data signal channel (source line) of the display driver integrated chip (DDIC); the scan line can be connected to a scan signal channel of the GIP circuit.
  • the remaining data channels of the display driving integrated chip may be provided to each column of the first OLED sub-pixels 11 of the non-transparent display area 10a, and each column of the first OLED sub-pixels 11 occupies one data signal channel.
  • the remaining scanning signal channels of the GIP circuit may be provided to the first OLED sub-pixels 11 of each row of the non-transparent display area 10a, and the first OLED sub-pixels 11 of each row occupy one scanning signal channel.
  • the sum of the number of data signal channels occupied by the non-transparent display area 10a and one data signal channel occupied by the transparent display area 10b is the total number of data signal channels, that is, the data of all data signal channels corresponds to one frame of the display area 10.
  • Figure 6 is a GIP circuit structure and timing diagram.
  • the GIP circuit includes a first transistor T1, a second transistor T2, a third transistor T3, a fourth transistor T4, and a fifth transistor T5.
  • the first clock signal line XCK is connected to the gate of the first transistor T1 and the gate of the third transistor T3.
  • the second clock signal line CK is connected to the source of the second transistor T2.
  • the first gate line Vgh is connected to the source of the fourth transistor T4 and the source of the fifth transistor T5, and the second gate line Vgl is connected to the source of the third transistor T3.
  • the OLED array substrate 1 may include a multi-level GIP circuit.
  • the source of the first transistor T1 of the n-level GIP circuit is connected to an input signal line G n , which is the input signal of the n-level circuit.
  • the drain of the second transistor T2 of the nth stage GIP circuit is connected to the output signal line of the nth stage GIP circuit, and the output signal of the nth stage GIP circuit serves as the input signal G n+1 of the n+ 1th stage GIP circuit.
  • the first gate line Vgh is high level
  • the second gate line Vgl is low level
  • the first clock signal line XCK and the second clock signal line CK output high and low respectively Digital signals with opposite levels.
  • the first clock signal line XCK transitions to a low level
  • the first-stage GIP circuit input signal line G1 input a low level.
  • the second clock signal line CK transitions to a low level
  • the first-stage GIP circuit outputs a low level as the input signal G2 of the second-stage GIP circuit, and so on, and the output signal of the n-th stage GIP circuit serves as the first Input signal of n+1 level GIP circuit.
  • each driving transistor corresponds to a data signal channel of the display driving integrated chip.
  • the source of each driving transistor corresponds to the power supply voltage VDD.
  • the pixel driving circuit includes a transistor array, and each transistor unit in the transistor array includes: a switching transistor X1, a driving transistor X2, and a storage capacitor C. That is, each transistor unit includes 2T1C.
  • the data line in each transistor unit can be connected to a data signal channel (source line) of a display driver integrated chip (DDIC).
  • the scanning lines of each transistor unit can be connected to a scanning signal channel of the GIP circuit.
  • each transistor unit occupies one data signal channel of the display driving integrated chip, and all transistor units collectively occupy one scan signal channel of the GIP circuit.
  • the remaining data channels of the display driving integrated chip may be provided to each column of the first OLED sub-pixels 11 of the non-transparent display area 10a, and each column of the first OLED sub-pixels 11 occupies one data signal channel.
  • the remaining scanning signal channels of the GIP circuit may be provided to each row of first OLED sub-pixels 11 of the non-transparent display area 10a, that is, each row of first OLED sub-pixels 11 occupies one scanning signal channel.
  • the sum of the number of data signal channels occupied by the non-transparent display area 10a and the number of multiple data signal channels occupied by the transparent display area 10b is the total number of data signal channels, that is, the data of all data signal channels corresponds to one frame of the display area 10 Screen.
  • the pixel driving circuit 8A and 8B are a circuit diagram and a timing diagram of a pixel driving circuit having a function of compensating for the threshold voltage of a driving transistor.
  • the pixel driving circuit may also be a pixel driving circuit that compensates for the threshold voltage of the driving transistor, such as 7T1C, 6T1C.
  • the 7T1C pixel driving circuit shown in FIG. 8A is divided into three working stages (FIG. 8B): a reset stage, a compensation stage, and a light-emitting stage.
  • the threshold voltage Vth of the driving transistor is first stored in its gate-source voltage Vgs, and in the final light-emitting stage, Vgs-Vth is converted into current, because Vgs already contains Vth, so it is converted into current At this time, the influence of Vth is cancelled, thereby achieving current consistency.
  • the above circuit can improve the life span and display uniformity of the second OLED sub-pixel 13.
  • each second OLED sub-pixel 13 is connected to the drain of the same driving transistor in the pixel driving circuit, the gate of the driving transistor corresponds to a data signal channel of the display driving integrated chip, and the source corresponds to a power voltage
  • V dATA data signal line driving circuit of the pixel may be derived from a display driver integrated chip (DDIC) channel of a data signal (source line); scan line S n-1, S n of the signal may be derived from two GIP circuit
  • DDIC display driver integrated chip
  • scan line S n-1, S n of the signal may be derived from two GIP circuit
  • the transmitting signal EM can be derived from a transmitting signal channel of the GIP circuit
  • the initial signal INIT can be derived from the display driving integrated chip.
  • the remaining data channels of the display driving integrated chip may be provided to each column of the first OLED sub-pixels 11 of the non-transparent display area 10a, and each column of the first OLED sub-pixels 11 occupies one data signal channel.
  • the remaining scanning signals of the GIP circuit can be provided to the first OLED subpixels 11 of each row of the non-transparent display area 10a, that is, the first OLED subpixels 11 of each row occupy two scanning signal channels, and the first OLED subpixels 11 of two adjacent rows are shared One scan signal channel.
  • the remaining emission signals EM of the GIP circuit may be provided to each row of the first OLED sub-pixels 11 of the non-transparent display area 10a, that is, each row of the first OLED sub-pixels 11 occupies one emission signal EM channel.
  • the first electrode of the second OLED sub-pixel 13 is connected to the drains of different drive transistors in the pixel drive circuit, the gate of each drive transistor corresponds to a data signal channel of the display drive integrated chip, and the source of each drive transistor Extremely corresponds to the same or different power supply voltage:
  • the data line signal V DATA of the pixel driving circuit of the second OLED sub-pixel 13 of each column can be derived from a data signal channel (source line) of the display driving integrated chip (DDIC); scanning line S n-1, S n can be derived from the two signal channels GIP scanning signal circuit, the emission signal EM can be derived from a transmit signal path GIP circuit, it can be derived from the initial signal INIT display driver integrated chip.
  • Multi-column data line V DATA signal a second sub-pixel OLED pixel drive circuit 13 may be derived from a display driver integrated chip (DDIC) a plurality of data signal channels (source line); scan line S n-1, S n of the signal It can be derived from two scanning signal channels of the GIP circuit, and the transmission signal EM can be derived from one transmission signal channel of the GIP circuit.
  • DDIC display driver integrated chip
  • the remaining data channels of the display driving integrated chip may be provided to each column of the first OLED sub-pixels 11 of the non-transparent display area 10a, that is, each column of the first OLED sub-pixels 11 occupies one data signal channel.
  • the remaining scanning signals of the GIP circuit can be provided to the first OLED subpixels 11 of each row of the non-transparent display area 10a, that is, the first OLED subpixels 11 of each row occupy two scanning signal channels, and the first OLED subpixels 11 of two adjacent rows are shared One scan signal channel.
  • the remaining emission signals EM of the GIP circuit may be provided to each row of the first OLED sub-pixels 11 of the non-transparent display area 10a, that is, each row of the first OLED sub-pixels 11 occupies one emission signal EM channel.
  • the pixel driving circuits and traces corresponding to the second OLED sub-pixels 13 in each column are disposed in the border area of the OLED array substrate 1, and the border area is located in the peripheral area of the display area 10.
  • it may also be provided in the non-transparent display area 10a or the transparent display area 10b.
  • the solution provided in the frame area and the non-transparent display area 10a can further reduce the graphic film layer of the transparent display area 10b and further reduce the diffraction in the light transmission mode.
  • the number of data signal channels and scan signal channels is small, the number of connection traces is also small, and the occupied area is small.
  • the OLED array substrate 2 shown in FIG. 9 is substantially the same as the OLED array substrate 1 shown in FIG. 1, except that the second OLED sub-pixels 13 in each column are second OLED sub-pixels of multiple colors, and the adjacent ones are different.
  • the second OLED sub-pixels in each column of color form a second OLED pixel unit.
  • a row of red sub-pixels, a row of green sub-pixels, and a row of blue sub-pixels are alternately distributed.
  • the second OLED sub-pixels in the second OLED pixel unit may also be other colors than red, green, and blue.
  • the second OLED sub-pixel 13 For the specific structure of the second OLED sub-pixel 13, please refer to the specific structure in the foregoing embodiment. The following highlights the differences between the driving method of the sub-pixels of multiple colors and the driving method of all the second OLED sub-pixels being the same color sub-pixels .
  • FIG. 10 is a schematic circuit diagram of a passive driving type of second OLED sub-pixels 13 in each column of the transparent display area.
  • the first electrode of the same color sub-pixel in each second OLED pixel unit is connected to the same data signal channel of the display driving integrated chip and the second electrode is grounded.
  • the first electrodes of all columns of red sub-pixels are connected to the same R data signal channel;
  • the first electrodes of all columns of green sub-pixels are connected to the same G data signal channel;
  • the first electrodes of all columns of blue sub-pixels are connected to the same B Data signal channel.
  • the transparent display area only has one row and three columns of second OLED pixel units, it is only necessary to apply the same driving current to each column of the same color sub-pixels of each second OLED pixel unit, which is derived from the display driving integrated chip (DDIC) Three data signal channels (source line).
  • the remaining data channels of the display driving integrated chip may be provided to the first OLED sub-pixels 11 of each column of the non-transparent display area 10a, and each column of the first OLED sub-pixels 11 occupies one data signal channel.
  • the sum of the number of multiple data signal channels occupied by the non-transparent display area 10a and the three data signal channels occupied by the transparent display area 10b is the total number of data signal channels, and the data of all data signal channels corresponds to one frame of the display area 10 .
  • FIG. 11 is a schematic circuit diagram of another passive driving type of the second OLED sub-pixel 13 in each column of the transparent display area.
  • the second electrodes of each column of sub-pixels of each second OLED pixel unit are grounded, the first electrodes of each column of sub-pixels of each second OLED pixel unit are connected to the drain of a switching transistor, and each second OLED pixel unit
  • the source of the switching transistor corresponding to the same-color sub-pixels of each column is connected to the same data signal channel of the display driving integrated chip, and the gate is connected to the same switching signal.
  • the first electrode of the second OLED subpixel of each column of each second OLED pixel unit is connected to the drain of a switching transistor, and the source of the switching transistor corresponding to the same color subpixel of each column of each second OLED pixel unit
  • the pole is connected to the same data signal channel of the display driving integrated chip, and the gate is connected to different switching signals.
  • FIG. 12 is a schematic circuit diagram of yet another passive driving type of the second OLED sub-pixel 13 in each column of the transparent display area.
  • the first electrode of each column of the second OLED sub-pixel 13 in each column of the second OLED pixel unit may also be connected to Display the different data signal channels driving the integrated chip. Since the transparent display area has only one row of second OLED sub-pixels 13, it is only necessary to apply a driving current to each column of second OLED sub-pixels 13.
  • the driving current of each column comes from several data signal channels (source lines) of the display driving integrated chip (DDIC).
  • the remaining data channels of the display driving integrated chip may be provided to each column of the first OLED sub-pixels 11 of the non-transparent display area 10a, and each column of the first OLED sub-pixels 11 occupies one data signal channel.
  • the sum of the data signal channels corresponding to the first OLED subpixels 11 in each column of the non-transparent display area 10a and the data signal channels corresponding to the second OLED subpixels 13 in each column in the transparent display area 10b is all data signal channels, and all data signal channels
  • the data corresponds to a frame of the display area 10.
  • FIG. 13 is a schematic circuit diagram of an active driving type of the second OLED sub-pixels 13 in each column of the transparent display area.
  • the second electrodes of the same-color sub-pixels of each column of the second OLED pixel unit in each column are grounded, and the first electrodes of the same-color sub-pixels of each column of the second OLED pixel unit in each column are connected to the same in the pixel driving circuit Drive the drain of the transistor.
  • the gate of each driving transistor corresponds to a data signal channel of the display driving integrated chip; the source of each driving transistor corresponds to the power supply voltage VDD.
  • the pixel driving circuit may include a transistor array.
  • Each transistor unit may include a switching transistor X1, a driving transistor X2, and a storage capacitor C. That is, each transistor unit includes 2T1C.
  • the data line in each transistor unit can be connected to a data signal channel (source line) of a display driver integrated chip (DDIC); each scan line of each transistor unit can be connected to a scan signal channel of the GIP circuit.
  • all the second OLED pixel units occupy three data signal channels of the display driving integrated chip and one scan signal channel of the GIP circuit.
  • the remaining data channels of the display driving integrated chip may be provided to each column of the first OLED sub-pixels 11 of the non-transparent display area 10a, that is, each column of the first OLED sub-pixels 11 occupies one data signal channel.
  • the remaining scan signals of the GIP circuit may be provided to the first OLED sub-pixels 11 of each row of the non-transparent display area 10a, that is, the first OLED sub-pixels 11 of each row occupy one scan signal channel.
  • the second electrodes of the same-color subpixels in each column of the second OLED pixel unit in each column are grounded, and the first electrodes of the same-color subpixels in each column of the second OLED pixel unit in each column are connected to different ones in the pixel driving circuit
  • the drain of the driving transistor, the gate of each driving transistor corresponds to a data signal channel of the display driving integrated chip; the source stage of each driving transistor corresponds to a power supply voltage VDD.
  • the pixel driving circuit may include a transistor array.
  • Each transistor unit may include a switching transistor X1, a driving transistor X2, and a storage capacitor C. That is, each transistor unit includes 2T1C.
  • each transistor unit can be connected to a data signal channel (source line) of a display driver integrated chip (DDIC); each scan line of each transistor unit can be connected to a scan signal channel of the GIP circuit.
  • each second OLED pixel unit respectively occupies one data signal channel of the display driving integrated chip, and jointly occupies one scan signal channel of the GIP circuit.
  • the sum of the number of data signal channels corresponding to the first OLED sub-pixels 11 in each column in the non-transparent display area 10a and the number of data signal channels corresponding to the second OLED sub-pixels 13 in each column in the transparent display area 10b is the total number of data signal channels Number, the data of all data signal channels corresponds to one frame of the display area 10.
  • the pixel driving circuit connected to the first electrode of the same-color sub-pixel 13 of each second OLED pixel unit may be an existing pixel driving circuit such as 6T1C or 7T1C in addition to the above 2T1C.
  • V DATA data line signal of the pixel driving circuit may be derived from a display driver integrated chip (DDIC) signals of three or more data channels; scan line S n-1, S n can be derived from the signals of two scanning circuit GIP
  • DDIC display driver integrated chip
  • scan line S n-1, S n can be derived from the signals of two scanning circuit
  • the signal channel, the transmission signal EM can be derived from a transmission signal channel of the GIP circuit, and the initial signal INIT can be derived from the display driver integrated chip.
  • FIG. 14 is a top view of the OLED array substrate 3 in the third embodiment of the present application.
  • the OLED array substrate 3 in this embodiment is substantially the same as the OLED array substrates 1 and 2 in the foregoing embodiments, and the only difference is that a row of second OLED sub-pixels 13 ′ can be located in the transparent display area 10b. Extends in a column direction in a middle section, or extends from the top of the transparent display area 10b in the column direction to the middle or bottom of the transparent display area 10b, or extends from the middle of the transparent display area 10b in the column direction to the transparent display area 10b Bottom end.
  • each column of second OLED sub-pixels 13' can also be formed by combining structures Various patterns.
  • the second OLED sub-pixels 13' of each column in the above-mentioned arrangement manner may be the same-color sub-pixels, that is, the transparent display area 10b performs a monochrome display function.
  • the second OLED sub-pixels 13' in each column may also be sub-pixels of different colors, that is, the transparent display area 10b performs a color display function.
  • the OLED array substrate 4 in this embodiment is substantially the same as the OLED array substrates 1, 2, and 3 in the foregoing embodiments, and the difference is only that: the second OLED sub-array in a certain column, a certain column, or all columns
  • the pixel 13" has a gourd shape in the column direction.
  • the first electrode and the second OLED light emitting structure of the second OLED sub-pixel 13" in a certain column, some columns, or all columns have a gourd shape in the column direction.
  • the shape of the second OLED light emitting structure can further reduce the diffraction phenomenon during light transmission.
  • the second OLED sub-pixels 13" in each column of the above shape may be the same-color sub-pixels, that is, the transparent display area 10b performs a monochrome display function; or may be sub-pixels of different colors, that is, the transparent display area 10b performs a color display function.
  • FIG. 16 is a top view of the OLED array substrate 5 in the fifth embodiment of the present application.
  • the structure of the OLED array substrate 5 in this embodiment is substantially the same as that of the OLED array substrate 1 in the foregoing embodiment, and the only difference is that the second OLED sub-pixel 13 is two rows and several columns.
  • FIG. 17 is a schematic diagram of a passive driving circuit of the second OLED sub-pixel 13 in two rows and columns in the transparent display area.
  • the first electrode of the second OLED sub-pixel 13 in the first row and each column is connected to a data signal channel of the display driving integrated chip 12, and the second OLED sub-pixel in the second row and each column
  • the first electrode of 13 is connected to another data signal channel of the display driving integrated chip 12.
  • the second electrodes of all second OLED sub-pixels 13 are grounded.
  • the first electrodes of the second OLED sub-pixels 13 in two rows and columns may be connected to the same data signal channel of the display driving integrated chip 12. In this solution, the number of channels for driving the integrated chip 12 is the smallest.
  • the traces of the data signal channels corresponding to the second OLED sub-pixels 13 in the first row may be disposed in the border area, and the border area is located in the peripheral area of the display area 10.
  • the traces of the data signal channels corresponding to the second OLED sub-pixels 13 in the second row may be disposed in the transition area between the transparent display area and the non-transparent display area, and the transition area is located between the transparent display area 10b and the non-transparent display area 10a .
  • FIG. 18 is a schematic circuit diagram of another passive driving type of the second OLED sub-pixel 13 in two rows and columns of the transparent display area.
  • the first electrode of the second OLED sub-pixel 13 in the first row and each column is connected to a data signal channel of the display driving integrated chip 12, and the first electrode of the second OLED sub-pixel 13 in the second row and each column is also One data signal channel connected to the display driving integrated chip 12.
  • the number of channels driving the integrated chip is the largest.
  • FIG. 19 is a schematic circuit diagram of an active driving type of the second OLED sub-pixel 13 in two rows and columns in the transparent display area.
  • the first electrode of the second OLED sub-pixel 13 in the first row and each column is connected to the drain of a driving transistor in a pixel driving circuit, and the gate of the driving transistor corresponds to a piece of data for driving the integrated chip.
  • Signal channel; the first electrode of the second OLED sub-pixel 13 in the second row and each column is connected to the drain of a driving transistor in another pixel driving circuit, and the gate of the driving transistor corresponds to another data signal for driving the integrated chip aisle.
  • the second OLED sub-pixels 13 in the first row and each column correspond to the same scan signal as the second OLED sub-pixels 13 in the second row and each column. In other words, all the second OLED sub-pixels of the transparent display area are turned on at once.
  • the pixel driving circuit in FIG. 19 takes 2T1C as an example, and in other alternatives, it may also be a specific pixel driving circuit such as 3T1C, 6T1C, and 7T1C.
  • FIG. 20 is a schematic diagram of another actively driven circuit of the second OLED sub-pixel 13 in two rows and columns of the transparent display area.
  • the first electrode of the second OLED sub-pixel 13 in the first row and each column is connected to the drain of a driving transistor in a pixel driving circuit, and the gate of the driving transistor corresponds to a piece of data for driving the integrated chip Signal channel.
  • the first electrode of the second OLED subpixel 13 in the second row and each column is also connected to the drain of a driving transistor in a pixel driving circuit, and the gate of the driving transistor corresponds to a data signal channel of the display driving integrated chip.
  • the second OLED subpixels 13 in the first row and each column correspond to the same scan signal as the OLED subpixels 13 in the second row and the second column. That is, all the second OLED sub-pixels of the transparent display area are turned on at once.
  • the pixel driving circuit in FIG. 20 takes 2T1C as an example, and in other alternative solutions, it may also be a specific pixel driving circuit such as 3T1C, 6T1C, and 7T1C.
  • the driving of the two rows of the second OLED sub-pixels 13 in this embodiment is equivalent to two rows of second OLED sub-pixels in the previous embodiment.
  • Pixel 13 drive The difference is that when driving the upper and lower lines, the scan signal can be shared.
  • the second OLED sub-pixels 13 of each column of the transparent display area 10b are the same-color sub-pixels.
  • the second OLED sub-pixels 13 in each column of the transparent display area 10b may be one of a red sub-pixel, a green sub-pixel, a blue sub-pixel, a yellow sub-pixel, and the like. In other words, when the transparent display area 10b performs a display function, the area emits monochrome light.
  • the second OLED sub-pixels 13 of each column of the transparent display area 10b may be sub-pixels of multiple colors.
  • the colors of the sub-pixels in the upper and lower rows in one column are preferably the same.
  • the two rows can correspond to one data signal or can share one column of data signals. .
  • the first electrode of the second OLED sub-pixel 13 in the first row and each column and the second OLED light-emitting structure may extend in the column direction in a section in the middle of the transparent display area 10b, or self-transparent display
  • the top of the area 10b extends along the column direction to the upper middle or middle of the top of the transparent display area 10b; the first electrode of the second OLED sub-pixel 13 in the second row and each column and the second OLED light emitting structure may be in the lower middle of the transparent display area 10b
  • a section extends in the column direction, or extends from the bottom end of the transparent display area 10b in the column direction to the middle or lower portion of the transparent display area 10b.
  • the OLED array substrate 6 in this embodiment includes a display area 10, and the display area 10 includes a non-transparent display area 10a and a transparent display area 10b.
  • the non-transparent display area 10a includes first OLED sub-pixels 11 arranged in an array.
  • the first OLED sub-pixel 11 includes: a lower electrode, a pixel located on the lower electrode.
  • the first OLED light emitting structure and the upper electrode on the first OLED light emitting structure, the position of the lower electrode is above the OLED array substrate.
  • the driving of the first OLED sub-pixels 11 in each column corresponds to a part of the data signal channels of the display driving integrated chip 12.
  • the transparent display area 10b includes second OLED sub-pixels 13 arranged in an array, and in a direction perpendicular to the plane where the OLED array substrate is located, the second OLED sub-pixel 13 includes: a first electrode extending in a row direction, located in the A second OLED light emitting structure extending along the row direction on the first electrode and a second electrode located on the second OLED light emitting structure.
  • the transparent display area performs a display function; when the second OLED subpixels 13 in two columns and rows are not driven, the transparent display area performs a light transmission function.
  • the driving of the second OLED sub-pixels 13 in two columns and rows corresponds to the data signal channel of the remaining part of the same display driving integrated chip.
  • the data of all the data signal channels corresponding to the driving of the first OLED sub-pixels 11 and the second OLED sub-pixels 13 of each row correspond to one frame of the display area 10.
  • the difference is that the second OLED sub-pixels 13 are distributed in two columns and several rows.
  • the first electrode of each second OLED sub-pixel 13 extends in the row direction.
  • FIG. 22 is a schematic circuit diagram of a passive driving type of second OLED pixels 13 in two columns and rows in a transparent display area.
  • the first electrodes of the second OLED sub-pixels 13 in each column and row are connected to the same data signal channel of the display driving integrated chip.
  • the second OLED sub-pixels 13 in two columns and rows occupy two data signal channels.
  • the sum of the number of multiple data signal channels occupied by the non-transparent display area 10a and the two data signal channels occupied by the transparent display area 10b is the total number of data signal channels, and the data of all data signal channels corresponds to one frame of the display area 10 .
  • first electrodes of the second OLED sub-pixels 13 in one column and each row are connected to different data signal channels of the display driver integrated chip, or some rows may be connected to the same data signal channel; and the second OLED sub-pixels in two columns and each row The first electrode of 13 is connected to the same data signal channel of the display driving integrated chip.
  • FIG. 23 is a schematic circuit diagram of an active driving type of second OLED sub-pixels 13 in two columns and rows of a transparent display area.
  • the first electrode of the second OLED pixel 13 in each row of the first column is connected to the drain of a driving transistor in the same pixel driving circuit, and the gate of the driving transistor corresponds to a data signal for displaying and driving the integrated chip
  • the first electrode of the second OLED sub-pixel 13 in the second column and each row is connected to the drain of a driving transistor in another pixel driving circuit, and the gate of the driving transistor corresponds to another data signal channel for displaying and driving the integrated chip.
  • the transparent display area occupies two data signal channels.
  • the first electrodes of the second OLED sub-pixels 13 in all columns and rows may be connected to the drain of the driving transistor in the same pixel driving circuit, and the gate of the driving transistor corresponds to the same display driving integrated chip.
  • Data signal channel That is, the transparent display area occupies only one data signal channel.
  • the second OLED sub-pixels 13 in each row of the first column and the second OLED sub-pixels 13 in each row of the second column correspond to the same scan signal.
  • the pixel driving circuit in FIG. 23 takes 2T1C as an example, and in other optional solutions, it may also be a specific pixel driving circuit such as 3T1C, 6T1C, and 7T1C.
  • the second OLED sub-pixels 13 of each column of the transparent display area 10b are the same-color sub-pixels.
  • the second OLED pixels 13 in each column of the transparent display area 10b may be one of red sub-pixels, green sub-pixels, blue sub-pixels, yellow sub-pixels, and the like.
  • the transparent display area 10b performs a display function, the area emits monochrome light.
  • the second OLED sub-pixels in two columns and several rows are pixels of multiple colors, the colors of the sub-pixels in the left and right columns in a row are preferably the same.
  • Fig. 24 is a schematic diagram of a passive driving type circuit of the second OLED sub-pixel 13 in two columns and each row of the transparent display area.
  • the second OLED sub-pixels 13 in two columns and rows are sub-pixels of multiple colors, and the first electrodes of the same-color sub-pixels in each row of each column of second OLED pixel units are connected to the same data signal channel of the display driving integrated chip .
  • the first electrode of each row of the same-color sub-pixels in each column of the second OLED pixel unit may be connected to a data signal channel of the display driving integrated chip; and the same-color sub-rows in each row of the second OLED pixel unit in two columns The first electrode of the pixel is connected to the same data signal channel of the display driving integrated chip.
  • FIG. 25 is a schematic circuit diagram of an active driving type of second OLED sub-pixels 13 in two columns and rows of a transparent display area.
  • the second OLED sub-pixels 13 in two columns and rows are sub-pixels of multiple colors, and the first electrodes of the same-color sub-pixels in each row of the second OLED pixel unit in one column are connected to the driving transistors in the same pixel driving circuit. Drain, the gate of each of the driving transistors corresponds to a data signal channel of the display driving integrated chip.
  • the first electrodes of the same-color sub-pixels of each row of each second OLED pixel unit are connected to the drains of drive transistors in different pixel drive circuits, and the gate of each drive transistor corresponds to a display drive integrated chip A data signal channel.
  • the first electrodes of the same-color sub-pixels in each row of the second OLED pixel unit in two columns may be connected to the drains of driving transistors in the same pixel driving circuit, and the gate of each driving transistor corresponds to display driving A data signal channel of the integrated chip.
  • the pixel driving circuit in FIG. 25 takes 2T1C as an example, and in other optional solutions, it may also be a specific pixel driving circuit such as 3T1C, 6T1C, and 7T1C.
  • FIG. 26 is a top view of the OLED array substrate 7 in the seventh embodiment of the present application.
  • the OLED array substrate 7 in this embodiment omits the second OLED sub-pixels 13 in the first column or the second column, while the first column or the second The second column of OLED sub-pixels 13 extends left and right.
  • the structure of the second OLED sub-pixel 13 please refer to the structure of the second OLED sub-pixel in FIG. 21; for driving, it is sufficient to omit the left set or the right set of drives in FIGS. 22 to 25 above.
  • the present application also provides a display panel provided with an encapsulation layer on this basis.
  • the display panel can also be provided with a touch layer as a touch panel.
  • the display panel can also be integrated and assembled with other components as a semi-finished product to form a display device such as a mobile phone, a tablet computer, or a car display screen.
  • a light sensor is correspondingly arranged below the transparent display area 10b of the display panel, and the light sensor includes one or a combination of a camera, an iris recognition sensor, and a fingerprint recognition sensor.

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Abstract

本申请提供了一种显示装置及其显示面板、OLED阵列基板，OLED阵列基板包括显示区，所述显示区包括非透明显示区和透明显示区，其中，所述非透明显示区设有阵列排布的第一OLED子像素，所述透明显示区设有阵列排布的第二OLED子像素。所述第一OLED子像素的驱动对应显示驱动集成芯片的部分数据信号通道；所述第二OLED子像素的驱动对应所述显示驱动集成芯片的剩余部分的数据信号通道；所有所述数据信号通道的数据对应所述显示区的一帧画面；当所述第二OLED子像素被驱动时，所述透明显示区执行显示功能；当所述第二OLED子像素未被驱动时，所述透明显示区执行透光功能。

Description

显示装置及其显示面板、OLED阵列基板 技术领域
本申请涉及OLED显示设备技术领域，尤其涉及显示装置及其显示面板、OLED阵列基板。
背景技术
随着显示装置的快速发展，用户对显示屏幕占比的要求越来越高，全面屏受到业界越来越多的关注。由于显示屏幕上方需要安装摄像头、传感器、听筒等元件，因此显示屏幕上方通常会预留一部分区域用于安装上述元件，例如苹果手机iphoneX的前刘海区域。
发明内容
本申请的目的是提供一种显示装置及其显示面板、OLED阵列基板。
本申请的第一方面提供一种OLED阵列基板，所述显示区包括：非透明显示区以及透明显示区。所述非透明显示区设有阵列排布的第一OLED子像素，所述透明显示区设有阵列排布的的第二OLED子像素。所述各列第一OLED子像素的驱动对应显示驱动集成芯片的部分数据信号通道。所述第二OLED子像素的驱动对应所述显示驱动集成芯片的剩余部分的数据信号通道。所有所述数据信号通道的数据对应所述显示区的一帧画面。当所述第二OLED子像素被驱动时，所述透明显示区执行显示功能；当所述第二OLED子像素未被驱动时，所述透明显示区执行透光功能。
在垂直于所述OLED阵列基板所在平面的方向上，所述第一OLED子像素包括下电极、位于所述下电极上的第一OLED发光结构以及位于所述第一OLED发光结构上的上电极。所述第二OLED子像素包括：沿列方向延伸的第一电极、位于所述第一电极上沿列方向延伸的第二OLED发光结构以及位于所述第二OLED发光结构上的第二电极。
可选地，所述阵列排布的第二OLED子像素包括一行若干列或两行若干列所述第二OLED子像素；当为两行若干列时，同一列中的两行所述第二OLED子像素的颜色相同。
可选地，所述第二OLED子像素的驱动方式为主动式，所述OLED阵列基板还包括与所述第二OLED子像素对应的至少一个像素驱动电路。
可选地，所述OLED阵列基板还包括边框区和过渡区，所述边框区位于所述显示区的外围区域，所述过渡区位于所述透明显示区与所述非透明显示区之间。所述像素驱动电路设置在所述非透明显示区、所述边框区或所述过渡区。
可选地，所述第二OLED子像素均为同色子像素，各所述第二OLED子像素的驱动方式为被动式，一行中各列所述第二OLED子像素的第一电极连接至显示驱动集成芯片的同一数据信号通道或不同数据信号通道。
可选地，所述第二OLED子像素包括多个颜色的子像素，一行中相邻若干列不同颜色的第二OLED子像素形成一第二OLED像素单元，各所述第二OLED子显示的驱动方式为被动式，一行中各列同色子像素的第一电极连接至所述显示驱动集成芯片的同一数据信号通道或不同数据信号通道。
可选地，各所述列第二OLED子像素为多个颜色的像素，一行中相邻若干列不同颜色的第二OLED子像素形成一像素单元，各所述第二OLED子像素的驱动方式为被动式。一行中各列所述第二OLED子像素的第一电极连接一开关晶体管的漏极，不同的第二OLED像素单元中的各列同色子像素对应的开关晶体管的源极连接显示驱动集成芯片的同一数据信号通道，所述开关晶体管的栅极连接同一或不同开关信号。
可选地，所述第二OLED子像素均为同色子像素，各所述第二OLED子像素的驱动方式为主动式，所述各第二OLED子像素的第一电极连接至同一像素驱动电路中的驱动晶体管的漏极，所述驱动晶体管的栅极对应显示驱动集成芯片的同一数据信号通道；
可选地，所述第二OLED子像素像素包括多个颜色的子像素，一行中相邻若干列不同颜色的第二OLED子像素形成一第二OLED像素单元，各第二OLED子像素的驱动方式为主动式，一行中各列同色子像素的第一电极连接至同一或不同像素驱动电路中的驱动晶体管的漏极，每一所述驱动晶体管的栅极对应显示驱动集成芯片的一个数据信号通道。
可选地，各所述第二OLED子像素对应的像素驱动电路具有对驱动晶体管的阈值电压进行补偿的功能。
可选地，各行第二OLED子像素对应的像素驱动电路中的开关信号来源于GIP电路中的部分扫描信号通道，各所述第一OLED子像素对应的像素驱动电路中的开关信号来源于所述GIP电路的剩余部分扫描信号通道。
可选地，第二OLED子像素的第二电极为面电极，和/或各个所述第一OLED子像 素的所述上电极与各个所述第二OLED子像素的所述第二电极连接成一面电极。
可选地，当所述阵列排布的第二OLED子像素包括一行若干列所述第二OLED子像素时，各列所述第二OLED子像素的所述第一电极以及所述第二OLED发光结构在所述透明显示区的中部一区段内沿列方向延伸、或自所述透明显示区的顶端沿所述列方向延伸至所述透明显示区的中部或底端，或自所述透明显示区的中部沿所述列方向延伸至所述透明显示区的底端。当所述阵列排布的第二OLED子像素包括两行若干列所述第二OLED子像素时，第一行各列第二OLED子像素的第一电极以及第二OLED发光结构在透明显示区的中上部一区段内沿所述列方向延伸，或自所述透明显示区的顶端沿所述列方向延伸至所述透明显示区的中上部或中部。第二行各列第二OLED子像素的第一电极以及第二OLED发光结构在所述透明显示区的中下部一区段内沿所述列方向延伸、或自所述透明显示区的底端沿所述列方向延伸至所述透明显示区中下部或中部。
本申请的第二方面提供一种显示面板，包括上述任一项的OLED阵列基板。
本申请的第三方面提供一种显示装置，包括上述任一项的显示面板。
在本申请中：
1)透明显示区与非透明显示区显示不同步的原因在于：透明显示区与非透明显示区分别采用各自的显示驱动器提供开关信号和/或数据信号，各自互不关联。
基于上述分析，本申请采用同一显示驱动集成芯片驱动同一显示面板上的透明显示区的第二OLED像素以及非透明显示区的第一OLED像素，即显示驱动集成芯片中的部分数据信号通道提供给各列第一OLED子像素，剩余部分的数据信号通道提供给各列第二OLED像素。所述第一OLED子像素对应的所有数据信号通道的数量与与第二OLED像素的驱动对应的所有数据信号通道的数量的总和为数据信号通道的总数量，即所有数据信号通道的的数据对应显示区的一帧画面。如此，利用显示驱动集成芯片中的各数据信号通道的关联性，实现画面一致、驱动同步。
2)可选方案中，将透明显示区的第二OLED像素的第一电极在列方向延伸，设置为一行若干列或两行若干列，减少图形膜层的交界，减小PPI，适当增加平行结构间距，改善透光时的衍射问题，因而透明显示区下的光传感器成像效果佳。
3)透明显示区的第二OLED像素的驱动方式为a)主动式或b)被动式。即透明显示区为AMOLED或PMOLED。
4)可选方案中，对于3)可选方案中的a)方案，透明显示区的第二OLED像素对 应的像素驱动电路设置在非透明显示区、边框区或透明显示区与非透明显示区之间的过渡区。相对于像素驱动电路设置在透明显示区的方案，前者方案能进一步减少透明显示区的图形膜层，进一步降低透光模式下的衍射问题。
5)可选方案中，c)各列第二OLED子像素为同色子像素；或d)各列第二OLED子像素为多个颜色的子像素，一行中相邻若干列不同颜色的子像素形成一第二OLED像素单元。对于c)方案，透明显示区执行显示功能时，该区域为单色发光，例如发红光、蓝光、绿光等。对于d)方案，与非透明显示区的像素单元相比，可以看成一行若干列或两行若干列的像素单元，如此，透明显示区执行显示功能时，各个第二OLED像素单元内的各个子像素发光，显示效果与非透明显示区的显示效果更接近。
6)可选方案中，对于上述a)、c)的结合方案，各列同色子像素的第一电极连接至同一像素驱动电路中的驱动晶体管的漏极，所述驱动晶体管的栅极对应显示驱动集成芯片的一个数据信号通道。其它可选方案中，各列同色子像素中，每个子像素的第一电极可以连接至一个像素驱动电路中的驱动晶体管的漏极，每一驱动晶体管的栅极对应显示驱动集成芯片的一个数据信号通道。相对于后者方案，前者方案中的像素驱动电路的驱动晶体管数目较少、所占面积较少；另外，数据信号通道的数目较少，连接走线数目也较少、占用面积较少。
对于上述a)、d)的结合方案，各第二OLED像素单元的各列同色子像素的第一电极连接至同一或不同像素驱动电路中的驱动晶体管的漏极，每一驱动晶体管的栅极对应显示驱动集成芯片的一个数据信号通道。相对于后者方案，前者方案中的像素驱动电路的驱动晶体管数目较少、所占面积较少；另外，数据信号通道的数目较少，连接走线数目也较少、占用面积较少。
对于上述b)、c)的结合方案，各列同色子像素的第一电极可以连接至显示驱动集成芯片的同一数据信号通道。其它可选方案中，各列同色子像素中，每个像素的第一电极可以连接显示驱动集成芯片的一个数据信号通道。相对于后者方案，前者方案中的数据信号通道的数目较少，连接走线数目也较少、占用面积较少。
对于上述b)、d)的结合方案，各第二OLED像素单元的各列同色子像素的第三电极连接至显示驱动集成芯片的同一数据信号通道或不同数据信号通道。相对于后者方案，前者方案中的数据信号通道的数目较少，连接走线数目也较少、占用面积较少。
本可选方案中，各第二OLED像素单元的各列子像素的第一电极连接一开关晶体管 的漏极，各第二OLED像素单元的各列同色子像素对应的开关晶体管的源极连接显示驱动集成芯片的同一数据信号通道，栅极连接同一或不同开关信号。栅极连接同一开关信号时，除了能统一控制所有同色子像素执行显示功能或透光功能外，在开关信号为“关”时，还能控制所有同色子像素执行透光功能，防止相邻其它颜色子像素显示时串扰。
7)可选方案中，一行各列第二OLED子像素对应的像素驱动电路具有对驱动晶体管的阈值电压进行补偿功能。上述补偿可以提高显示面板的寿命以及显示均匀性。
8)可选方案中，一行各列第二OLED子像素对应的像素驱动电路中的开关信号来源于GIP电路的部分扫描信号通道(对于2T1C像素驱动电路，为一个扫描信号通道；对于7T1C像素驱动电流，为两个扫描信号通道)，所述第一OLED子像素对应的像素驱动电路中的开关信号来源于同一GIP电路的剩余部分的扫描信号通道。透明显示区与非透明显示区共用同一GIP电路，能更方便地提高两区域的显示同步。
9)可选方案中，当一组若干列为一行若干列时，各列第二OLED子像素的第一电极以及发光结构在透明显示区的中部一区段内沿列方向延伸、或自透明显示区的顶端沿列方向延伸至透明显示区的中部或底端，或自透明显示区的中部沿列方向延伸至透明显示区的底端；当一组若干列为两行若干列时，第一行各列第二OLED子像素的第一电极以及OLED发光结构在透明显示区的中部一区段内沿列方向延伸、或自透明显示区的顶端沿列方向延伸至透明显示区的中上部或中部；第二行各列第二OLED子像素的第一电极以及OLED发光结构在透明显示区的中部一区段内沿列方向延伸、或自透明显示区的底端沿列方向延伸至透明显示区的中下部或中部。
10)可选方案中，透明显示区的每列第二OLED像素包括在垂直于OLED阵列基板所在平面的方向上设置的第一电极、第二OLED发光结构以及第二电极，各第二OLED像素的第二电极连成一面电极。第一电极和第二OLED发光结构均可设置为一行若干列或两行若干列，一个第二OLED发光结构对应一个第一电极，这样可以减少图形膜层的交界，改善衍射问题。
附图说明
图1是本申请第一实施例中的OLED阵列基板的俯视图；
图2是沿着图1中的AA直线的剖视图；
图3是透明显示区各列第二OLED子像素的一种被动驱动式的电路示意图；
图4是透明显示区各列第二OLED子像素的另一种被动驱动式的电路示意图；
图5是透明显示区各列第二OLED子像素的一种主动驱动式的电路示意图；
图6是一种GIP电路结构及时序图；
图7是透明显示区各列第二OLED子像素的另一种主动驱动式的电路示意图；
图8A和图8B是具有对驱动晶体管的阈值电压进行补偿功能的一种像素驱动电路的电路图以及时序图；
图9是本申请第二实施例中的OLED阵列基板的俯视图；
图10是透明显示区各列第二OLED子像素的一种被动驱动式的电路示意图；
图11是透明显示区各列第二OLED子像素的另一种被动驱动式的电路示意图；
图12是透明显示区各列第二OLED子像素的再一种被动驱动式的电路示意图；
图13是透明显示区各列第二OLED子像素的一种主动驱动式的电路示意图；
图14是本申请第三实施例中的OLED阵列基板的俯视图；
图15是本申请第四实施例中的OLED阵列基板的俯视图；
图16是本申请第五实施例中的OLED阵列基板的俯视图；
图17是透明显示区两行各列第二OLED子像素的一种被动驱动式的电路示意图；
图18是透明显示区两行各列第二OLED子像素的另一种被动驱动式的电路示意图；
图19是透明显示区两行各列第二OLED子像素的一种主动驱动式的电路示意图；
图20是透明显示区两行各列第二OLED子像素的另一种主动驱动式的电路示意图；
图21是本申请第六实施例中的OLED阵列基板的俯视图；
图22是透明显示区两列各行第二OLED子像素的一种被动驱动式的电路示意图；
图23是透明显示区两列各行第二OLED子像素的一种主动驱动式的电路示意图；
图24是透明显示区两列各行第二OLED子像素的一种被动驱动式的电路示意图；
图25是透明显示区两列各行第二OLED子像素的一种主动驱动式的电路示意图；
图26是本申请第七实施例中的OLED阵列基板的俯视图。
为方便理解本申请，以下列出本申请中出现的所有附图标记：
OLED阵列基板1、2、3、4、5、6、7       显示区10
非透明显示区10a                       透明显示区10b
第一OLED子像素11                      显示驱动集成芯片12
第二OLED子像素13、13'、13"            第一电极131
第二电极132                           第二OLED发光结构133
像素定义层14                          开关晶体管X1
驱动晶体管X2                          存储电容C
第一晶体管T1                          第二晶体管T2
第三晶体管T3                          第四晶体管T4
第五晶体管T5                          第一时钟信号线XCK
第二时钟信号线CK                      第一栅极线Vgh
第二栅极线Vgl
具体实施方式
为使本申请的上述目的、特征和优点能够更为明显易懂，下面结合附图对本申请的具体实施例做详细的说明。
显示屏幕上方预留一部分区域用于安装摄像头、传感器、听筒等元件的设计容易影响显示屏幕的整体一致性。
图1是本申请第一实施例中的OLED(Organic Light Emitting Diode)阵列基板的俯视图；图2是沿着图1中的AA直线的剖视图。
参照图1与图2所示，OLED阵列基板1包括：显示区10，显示区10包括非透明显示区10a与透明显示区10b。
其中，非透明显示区10a包括阵列排布的第一OLED子像素11，在垂直于OLED阵列基板1所在平面的方向上，第一OLED子像素11包括：下电极、位于第一电极上且沿列方向延伸的第一OLED发光结构以及位于第一OLED发光结构上的上电极。第一OLED子像素11的下电极靠近OLED阵列基板1设置。各列第一OLED子像素11的驱 动对应显示驱动集成芯片12的部分数据信号通道。
透明显示区10b包括阵列排布的第二OLED子像素13。在垂直于OLED阵列基板1所在平面的方向上，第二OLED子像素13包括：沿列方向延伸的第一电极、位于第一电极上沿列方向延伸的第二OLED发光结构以及位于第二OLED发光结构上的第二电极。各列第二OLED子像素13被驱动时，透明显示区10b执行显示功能。各列第二OLED子像素13未被驱动时，透明显示区10b执行透光功能。各列第二OLED子像素13的驱动对应同一显示驱动集成芯片12的剩余部分的数据信号通道。各列第一OLED子像素11与各列第二OLED子像素13的驱动对应的所有数据信号通道的数据对应显示区10的一帧画面。所述阵列排布的第二OLED子像素13包括一行若干列或两行若干列第二OLED子像素。
参照图2所示，第二OLED子像素13包括：沿列方向延伸的第一电极131、第二OLED发光结构133以及第二电极132。各OLED发光结构133由像素定义层14隔开。第一OLED子像素11的结构与第二OLED子像素13的结构相同。其它可选方案中，OLED发光结构133之间也可以无像素定义层14。
第二OLED子像素13与第一OLED子像素11的区别在于：各列第一OLED子像素11中，下电极、第一OLED发光结构与上电极在非透明显示区10a中呈具有若干行列的阵列排布且相互隔开。而阵列排布的各列第二OLED子像素13中的第一电极131与OLED发光结构133自透明显示区10b的顶端沿列方向延伸至底端，各列第二OLED子像素13中的第二电极132可以自透明显示区10b的顶端延伸至底端，也可以如图2所示，各列第二OLED子像素13的第二电极132连成一面电极，和/或各个第一OLED子像素的上电极与各个第二OLED子像素的第二电极连接成一面电极。
图1与图2中，透明显示区10b中，所有第二OLED子像素13为同色子像素。可选的，透明显示区10b的所有第二OLED子像素13可以为红色子像素、绿色子像素、蓝色子像素、黄色子像素中的一个。换言之，透明显示区10b执行显示功能时，该区域为单色发光。
其它示例性的实施例中，第二OLED子像素13中的第一电极131、第二OLED发光结构133的阵列排布也可以设置为与第一OLED子像素11完全相同。将透明显示区10b的第二OLED子像素13中的第一电极131、第二OLED发光结构133设置为沿列方向延伸的一行若干列或两行若干列的阵列排布，相对于设置为如第一OLED子像素11的具有若干行列的、相互隔开的单元的阵列排布，可以减少图形膜层的交界，改善透 光时的衍射问题。
关于透明显示区10b的各第二OLED子像素13的发光驱动方式，可以为主动式，也可以为被动式。
被动驱动式OLED(Passive Matrix OLED，PMOLED)，也称无源驱动式OLED，单纯地将第二电极、第一电极设置成矩阵状，以扫描方式点亮阵列中行列交叉点的像素，每个像素都是在短脉冲模式下被操作，进行瞬间高亮度发光。换言之，每个第二OLED子像素13的寻址直接受控于外部电路。该外部电路可以受控于显示驱动集成芯片(Display Driver Integrated Circuit，DDIC)。
主动驱动式OLED(Active Matrix OLED，AMOLED)，也称有源驱动式OLED，包括薄膜晶体管(Thin Film Transistor，TFT)阵列。该薄膜晶体管阵列中每一薄膜晶体管包含存储电容。AMOLED采用独立的薄膜晶体管控制每个像素发光，且每个像素可以连续发光。换言之，每个第二OLED子像素13的寻址直接受控于薄膜晶体管阵列。薄膜晶体管阵列的行选择信号可以来源于GIP(Gate In Panel)电路，列选择信号可以来源于显示驱动集成芯片(DDIC)。
图3是透明显示区各第二OLED子像素13的一种被动驱动式的电路示意图。参照图1与图3所示，各第二OLED子像素13的第一电极连接至显示驱动集成芯片12的同一数据信号通道，各第二OLED子像素13的第二电极接地。该数据信号通道携带的颜色数据与各第二OLED子像素13的颜色一致。换言之，由于透明显示区仅具有一行第二OLED子像素13，因而仅需向各列第二OLED子像素13施加同一驱动电流，该驱动电流占据显示驱动集成芯片(DDIC)的一个数据信号通道。显示驱动集成芯片的其余数据通道可以提供给非透明显示区10a的各列第一OLED子像素11，即每列第一OLED子像素11占据一个数据信号通道。
非透明显示区10a占据的多个数据信号通道的数量与透明显示区10b占据的一个数据信号通道的总和是数据信号通道的总数量，即所有数据信号通道的数据对应显示区10的一帧画面。所有数据信号通道的数据对应显示区10的一帧画面是指：在一个图像刷新周期内，各数据通道的数据是由对一副图像处理得来。
图4是透明显示区各第二OLED子像素13的另一种被动驱动式的电路示意图。参照图4所示，各列第二OLED子像素13的第一电极连接至显示驱动集成芯片12的不同数据信号通道，各第二OLED子像素13的第二电极接地。每个数据信号通道携带的颜 色数据与所连接列的第二OLED子像素13的颜色一致。换言之，由于透明显示区具有一行第二OLED子像素13，因而需向各列第二OLED子像素13分别施加驱动电流，各列第二OLED子像素13的驱动电流占据显示驱动集成芯片(DDIC)的若干个数据信号通道(source线)，即每列第二OLED子像素13占据一个数据信号通道。显示驱动集成芯片的其余数据通道可以提供给非透明显示区10a的各列第一OLED子像素11，即每列第一OLED子像素11占据一个数据信号通道。
非透明显示区10a占据的数据信号通道的数量与透明显示区10b占据的数据信号通道的数量的总和是数据信号通道的总数量，所有数据信号通道的数据对应显示区10的一帧画面。
图3与图4所示的实施例中，各第二OLED子像素13的第一电极的走线设置在OLED阵列基板1的边框区，该边框区位于显示区10的外围区域。其它可选的实施例中，第一电极的走线也可以设置在非透明显示区10a或透明显示区10b。相对于第一电极的走线设置在透明显示区10b的方案，第一电极的走线设置在边框区以及非透明显示区10a的方案能进一步减少透明显示区10b的图形膜层，进一步降低透光模式下的衍射。
相对于图4所示的实施例，图3所示的实施例中，数据信号通道的数目较少，连接数据信号通道和子像素的走线的数目也较少、占用面积较少。
图5是透明显示区各第二OLED子像素13的一种主动驱动式的电路示意图。参照图5所示，各第二OLED子像素13的第一电极连接至像素驱动电路中的同一驱动晶体管的漏极，各第二OLED子像素13的第二电极接地。驱动晶体管的栅极对应显示驱动集成芯片(DDIC)的同一数据信号通道；驱动晶体管的源极连接至电源电压VDD。图5中，像素驱动电路包括一开关晶体管X1、一驱动晶体管X2以及一存储电容C。数据线可以接入显示驱动集成芯片(DDIC)的一个数据信号通道(source线)；扫描线可以接入GIP电路的一扫描信号通道。显示驱动集成芯片的其余数据通道可以提供给非透明显示区10a的各列第一OLED子像素11，每列第一OLED子像素11占据一个数据信号通道。GIP电路的其余扫描信号通道可以提供给非透明显示区10a的各行第一OLED子像素11，每行第一OLED子像素11占据一个扫描信号通道。
非透明显示区10a占据的数据信号通道的数量与透明显示区10b占据的一个数据信号通道的总和是数据信号通道的总数量，即所有数据信号通道的数据对应显示区10的一帧画面。
图6是一种GIP电路结构及时序图。参照图6所示，GIP电路包括第一晶体管T1、第二晶体管T2、第三晶体管T3、第四晶体管T4和第五晶体管T5。第一时钟信号线XCK连接至第一晶体管T1的栅极和第三晶体管T3的栅极。第二时钟信号线CK连接至第二晶体管T2的源极。第一栅极线Vgh连接至第四晶体管T4的源极和第五晶体管T5的源极，第二栅极线Vgl连接至第三晶体管T3的源极。OLED阵列基板1中可以包括多级GIP电路，第n级GIP电路的第一晶体管T1的源极连接至一输入信号线G n，为第n级电路的输入信号。第n级GIP电路的第二晶体管T2的漏极连接至第n级GIP电路的输出信号线，并且第n级GIP电路的输出信号作为第n+1级GIP电路的输入信号G n+1。
参照图6中的GIP电路驱动的波形图，第一栅极线Vgh为高电平，第二栅极线Vgl为低电平，第一时钟信号线XCK和第二时钟信号线CK分别输出高低电平相反的数字信号。在第一时钟信号线XCK跳变为低电平时，第1级GIP电路输入信号线G1级输入一低电平。在第二时钟信号线CK跳变为低电平时，第1级GIP电路输出低电平，作为第2级GIP电路的输入信号G2，并以此类推，第n级GIP电路的输出信号作为第n+1级GIP电路的输入信号。
图7是透明显示区各第二OLED子像素13的另一种主动驱动式的电路示意图。参照图7所示，各列第二OLED子像素13的第一电极连接至像素驱动电路中的不同驱动晶体管的漏极，各第二OLED子像素13的第二电极接地。每一驱动晶体管的栅极对应显示驱动集成芯片的一个数据信号通道。每一驱动晶体管的源极对应电源电压VDD。图7中，像素驱动电路包括一晶体管阵列，该晶体管阵列中每个晶体管单元包括：一开关晶体管X1、一驱动晶体管X2以及一存储电容C。即每个晶体管单元包括2T1C。每个晶体管单元中的数据线可以接入显示驱动集成芯片(DDIC)的一个数据信号通道(source线)。各晶体管单元的扫描线可以共同接入GIP电路的一个扫描信号通道。换言之，每个晶体管单元占据显示驱动集成芯片的一个数据信号通道，且所有晶体管单元共同占据GIP电路的一个扫描信号通道。显示驱动集成芯片的其余数据通道可以提供给非透明显示区10a的各列第一OLED子像素11，每列第一OLED子像素11占据一个数据信号通道。GIP电路的其余扫描信号通道可以提供给非透明显示区10a的各行第一OLED子像素11，即每行第一OLED子像素11占据一个扫描信号通道。
非透明显示区10a占据的数据信号通道的数量与透明显示区10b占据的多个数据信号通道的数量的总和是数据信号通道的总数量，即所有数据信号通道的数据对应显示区10的一帧画面。
图8A和图8B是具有对驱动晶体管的阈值电压进行补偿功能的一种像素驱动电路的电路图以及时序图。在具体实施过程中，像素驱动电路除了上述的2T1C，还可以为7T1C、6T1C等对驱动晶体管的阈值电压进行补偿的像素驱动电路。图8A所示的7T1C像素驱动电路分为三个工作阶段(图8B)：复位阶段、补偿阶段、发光阶段。工作思路为：在补偿阶段把驱动晶体管的阈值电压Vth先保存在它的栅源电压Vgs内，在最后发光阶段，把Vgs-Vth转换为电流，因为Vgs已经包含了Vth，因而在转化成电流时，Vth的影响被抵消，从而实现了电流的一致性。上述电路可以提高第二OLED子像素13的寿命以及显示均匀性。
针对各第二OLED子像素13的第一电极连接至像素驱动电路中的同一驱动晶体管的漏极，该驱动晶体管的栅极对应显示驱动集成芯片的一个数据信号通道，源极对应一电源电压的情况：上述像素驱动电路的数据线信号V DATA可以来源于显示驱动集成芯片(DDIC)的一个数据信号通道(source线)；扫描线S n-1、S n的信号可以来源于GIP电路的两个扫描信号通道，发射信号EM可以来源于GIP电路的一个发射信号通道，初始信号INIT可以来源于显示驱动集成芯片。显示驱动集成芯片的其余数据通道可以提供给非透明显示区10a的各列第一OLED子像素11，每列第一OLED子像素11占据一个数据信号通道。GIP电路的其余扫描信号可以提供给非透明显示区10a的各行第一OLED子像素11，即每行第一OLED子像素11占据两个扫描信号通道，相邻两行第一OLED子像素11共用一个扫描信号通道。GIP电路的其余发射信号EM可以提供给非透明显示区10a的各行第一OLED子像素11，即每行第一OLED子像素11占据一个发射信号EM通道。
针对各列第二OLED子像素13的第一电极连接至像素驱动电路中的不同驱动晶体管的漏极，每一驱动晶体管的栅极对应显示驱动集成芯片的一个数据信号通道，各驱动晶体管的源极对应同一或不同电源电压的情况：上述每列第二OLED子像素13的像素驱动电路的数据线信号V DATA可以来源于显示驱动集成芯片(DDIC)的一个数据信号通道(source线)；扫描线S n-1、S n的信号可以来源于GIP电路的两个扫描信号通道，发射信号EM可以来源于GIP电路的一个发射信号通道，初始信号INIT可以来源于显示驱动集成芯片。多列第二OLED子像素13的像素驱动电路的数据线信号V DATA可以来源于显示驱动集成芯片(DDIC)的多个数据信号通道(source线)；扫描线S n-1、S n的信号可以来源于GIP电路的两个扫描信号通道，发射信号EM可以来源于GIP电路的一个发射信号通道。
显示驱动集成芯片的其余数据通道可以提供给非透明显示区10a的各列第一OLED子像素11，即每列第一OLED子像素11占据一个数据信号通道。GIP电路的其余扫描信号可以提供给非透明显示区10a的各行第一OLED子像素11，即每行第一OLED子像素11占据两个扫描信号通道，相邻两行第一OLED子像素11共用一个扫描信号通道。GIP电路的其余发射信号EM可以提供给非透明显示区10a的各行第一OLED子像素11，即每行第一OLED子像素11占据一个发射信号EM通道。
图5与图7的实施例中，各列第二OLED子像素13对应的像素驱动电路以及走线设置在OLED阵列基板1的边框区，该边框区位于显示区10的外围区域。其它可选方案中，也可以设置在非透明显示区10a或透明显示区10b。相对于设置在透明显示区10b的方案，设置在边框区以及非透明显示区10a的方案能进一步减少透明显示区10b的图形膜层，进一步降低透光模式下的衍射。
相对于图7所示的实施例，图5所示的实施例中，数据信号通道和扫描信号通道的数目较少，连接走线数目也较少、占用面积较少。
图9是本申请第二实施例中的OLED阵列基板2的俯视图。图9所示的OLED阵列基板2与图1所示的OLED阵列基板1大致相同，区别在于：各列第二OLED子像素13为多个颜色的第二OLED子像素，相邻的若干个不同颜色的各列第二OLED子像素形成一第二OLED像素单元。换言之，一列红色子像素、一列绿色子像素、一列蓝色子像素交替分布。其它可选方案中，第二OLED像素单元中的第二OLED子像素也可以为除红、绿、蓝外的其它颜色。
第二OLED子像素13的具体结构请参照前述实施例中的具体结构，以下重点介绍多个颜色的子像素的驱动方式与所有第二OLED子像素都为同色子像素的驱动方式的不同之处。
图10是透明显示区各列第二OLED子像素13的一种被动驱动式的电路示意图。参照图10所示，各第二OLED像素单元中的同色子像素的第一电极连接至显示驱动集成芯片的同一数据信号通道且第二电极接地。换言之，所有列红色子像素的第一电极连接至同一R数据信号通道；所有列绿色子像素的第一电极连接至同一G数据信号通道；所有列蓝色子像素的第一电极连接至同一B数据信号通道。由于透明显示区仅具有一行、三列第二OLED像素单元，因而仅需向各第二OLED像素单元的各列同色子像素施加同一驱动电流，该驱动电流来源于显示驱动集成芯片(DDIC)的三个数据信号通道(source线)。显示驱动集成芯片的其余数据通道可以提供给非透明显示区10a的各列 第一OLED子像素11，每列第一OLED子像素11占据一个数据信号通道。
非透明显示区10a占据的多个数据信号通道的数量与透明显示区10b占据的三个数据信号通道的总和是数据信号通道的总数量，所有数据信号通道的数据对应显示区10的一帧画面。
图11是透明显示区各列第二OLED子像素13的另一种被动驱动式的电路示意图。参照图11所示，各第二OLED像素单元的各列子像素的第二电极接地，各第二OLED像素单元的各列子像素的第一电极连接一开关晶体管的漏极，各第二OLED像素单元的各列同色子像素对应的开关晶体管的源极连接显示驱动集成芯片的同一数据信号通道，栅极连接同一开关信号。除了能统一控制所有同色子像素执行显示功能或透光功能外，在开关信号为“关”时，还能控制所有同色子像素执行透光功能，防止相邻其它颜色子像素执行显示功能时串扰。
其它可选方案中，各第二OLED像素单元的各列第二OLED子像素的第一电极连接一开关晶体管的漏极，各第二OLED像素单元的各列同色子像素对应的开关晶体管的源极连接至显示驱动集成芯片的同一数据信号通道，栅极连接至不同开关信号。上述结构使得各列同色子像素可以单独控制执行显示功能或透光功能。
图12是透明显示区各列第二OLED子像素13的再一种被动驱动式的电路示意图。为了使得各列同色子像素可以单独控制执行显示功能或透光功能，参照图12所示，也可以将各列第二OLED像素单元中的各列第二OLED子像素13的第一电极连接至显示驱动集成芯片的不同数据信号通道。由于透明显示区仅具有一行第二OLED子像素13，因而仅需向各列第二OLED子像素13施加驱动电流。各列的驱动电流来源于显示驱动集成芯片(DDIC)的若干个数据信号通道(source线)。显示驱动集成芯片的其余数据通道可以提供给非透明显示区10a的各列第一OLED子像素11，每列第一OLED子像素11占据一个数据信号通道。
非透明显示区10a中各列第一OLED子像素11对应的数据信号通道与透明显示区10b中各列第二OLED子像素13对应的数据信号通道的总和为所有数据信号通道，所有数据信号通道的数据对应显示区10的一帧画面。
图13是透明显示区各列第二OLED子像素13的一种主动驱动式的电路示意图。参照图13所示，各列第二OLED像素单元的各列同色子像素的第二电极接地，各列第二OLED像素单元的各列同色子像素的第一电极连接至像素驱动电路中的同一驱动晶 体管的漏极。每一驱动晶体管的栅极对应显示驱动集成芯片的一个数据信号通道；每一驱动晶体管的源级对应电源电压VDD。图13中，像素驱动电路可以包括晶体管阵列。每一晶体管单元可以包括：一开关晶体管X1、一驱动晶体管X2以及一存储电容C。即每个晶体管单元包括2T1C。每一晶体管单元中的数据线可以接入显示驱动集成芯片(DDIC)的一个数据信号通道(source线)；各晶体管单元的各个扫描线可以共同接入GIP电路的一个扫描信号通道。换言之，所有第二OLED像素单元共占据显示驱动集成芯片的三个数据信号通道，以及GIP电路的一个扫描信号通道。显示驱动集成芯片的其余数据通道可以提供给非透明显示区10a的各列第一OLED子像素11，即每列第一OLED子像素11占据一个数据信号通道。GIP电路的其余扫描信号可以提供给非透明显示区10a的各行第一OLED子像素11，即每行第一OLED子像素11占据一个扫描信号通道。
其它可选方案中，各列第二OLED像素单元的各列同色子像素的第二电极接地，各列第二OLED像素单元的各列同色子像素的第一电极连接至像素驱动电路中的不同驱动晶体管的漏极，每一驱动晶体管的栅极对应显示驱动集成芯片的一个数据信号通道；每一驱动晶体管的源级对应一电源电压VDD。像素驱动电路可以包括晶体管阵列。每一晶体管单元可以包括：一开关晶体管X1、一驱动晶体管X2以及一存储电容C。即每个晶体管单元包括2T1C。每一晶体管单元中的数据线可以接入显示驱动集成芯片(DDIC)的一个数据信号通道(source线)；各晶体管单元的各个扫描线可以共同接入GIP电路的一个扫描信号通道。换言之，各第二OLED像素单元分别占据显示驱动集成芯片的一个数据信号通道，并共同占据GIP电路的一个扫描信号通道。
非透明显示区10a中各列第一OLED子像素11对应的数据信号通道的数量与透明显示区10b中各列第二OLED子像素13对应的数据信号通道的数量的总和是数据信号通道的总数量，所有数据信号通道的数据对应显示区10的一帧画面。
在具体实施过程中，各第二OLED像素单元的同色子像素13的第一电极连接的像素驱动电路中，除了上述的2T1C，还可以为6T1C、7T1C等现有像素驱动电路。上述像素驱动电路的数据线信号V DATA可以来源于显示驱动集成芯片(DDIC)的三个或多个数据信号通道；扫描线S n-1、S n的信号可以来源于GIP电路的两个扫描信号通道，发射信号EM可以来源于GIP电路的一个发射信号通道，初始信号INIT可以来源于显示驱动集成芯片。
图14是本申请第三实施例中的OLED阵列基板3的俯视图。参照图14所示， 本实施例中的OLED阵列基板3与前述实施例中的OLED阵列基板1、2大致相同，区别仅在于：某一列第二OLED子像素13'可以在透明显示区10b的中部某一段内沿列方向延伸、或自透明显示区10b的顶端沿列方向延伸至透明显示区10b的中部或底端，或自透明显示区10b的中部沿列方向延伸至透明显示区10b的底端。不同于前述方案中仅通过在第一电极上施加不同大小的驱动电流，和/或对不同颜色的子像素施加驱动电流以实现不同图案，各列第二OLED子像素13'还可以结合结构形成各种图案。
上述设置方式的各列第二OLED子像素13'可以为同色子像素，即透明显示区10b执行单色显示功能。各列第二OLED子像素13'也可以为不同颜色的子像素，即透明显示区10b执行彩色显示功能。
图15是本申请第四实施例中的OLED阵列基板4的俯视图。参照图15所示，本实施例中的OLED阵列基板4与前述实施例中的OLED阵列基板1、2、3大致相同，区别仅在于：某一列、某几列或所有列的第二OLED子像素13"在列方向上呈葫芦状。换言之，某一列、某几列或所有列的第二OLED子像素13"的第一电极、第二OLED发光结构在列方向上呈葫芦状。与直角矩形、圆角矩形相比，上述第二OLED发光结构的形状能进一步降低透光时的衍射现象。
上述形状的各列第二OLED子像素13"可以为同色子像素，即透明显示区10b执行单色显示功能；也可以为不同颜色的子像素，即透明显示区10b执行彩色显示功能。
图16是本申请第五实施例中的OLED阵列基板5的俯视图。参照图16所示，本实施例中的OLED阵列基板5与前述实施例中的OLED阵列基板1结构大致相同，区别仅在于：第二OLED子像素13为两行若干列。
两行若干列第二OLED子像素13的结构可以参照前述实施例一至四中的结构。
图17是透明显示区两行各列第二OLED子像素13的一种被动驱动式的电路示意图。与图3相比，如图17所示，第一行各列第二OLED子像素13的第一电极连接至显示驱动集成芯片12的一个数据信号通道，第二行各列第二OLED子像素13的第一电极连接至显示驱动集成芯片12的另一个数据信号通道。所有第二OLED子像素13的第二电极接地。其它可选方案中，也可以两行各列第二OLED子像素13的第一电极连接至显示驱动集成芯片12的同一个数据信号通道。此种方案中，显示驱动集成芯片12的通道数目最少。第一行第二OLED子像素13对应的数据信号通道的走线可以设置在边框区，该边框区位于显示区10的外围区域。第二行第二OLED子像素13对应的数据信 号通道的走线可以设置在透明显示区与非透明显示区之间的过渡区，该过渡区位于透明显示区10b与非透明显示区10a之间。
图18是透明显示区两行各列第二OLED子像素13的另一种被动驱动式的电路示意图。与图4相比，第一行每列第二OLED子像素13的第一电极连接至显示驱动集成芯片12的一个数据信号通道，第二行每列第二OLED子像素13的第一电极也连接至显示驱动集成芯片12的一个数据信号通道。此种方案中，显示驱动集成芯片的通道数目最多。
图19是透明显示区两行各列第二OLED子像素13的一种主动驱动式的电路示意图。与图5相比，第一行各列第二OLED子像素13的第一电极连接至一像素驱动电路中的驱动晶体管的漏极，所述驱动晶体管的栅极对应显示驱动集成芯片的一个数据信号通道；第二行各列第二OLED子像素13的第一电极连接至另一像素驱动电路中的驱动晶体管的漏极，所述驱动晶体管的栅极对应显示驱动集成芯片的另一个数据信号通道。第一行各列第二OLED子像素13与第二行各列第二OLED子像素13对应同一扫描信号。换言之，透明显示区的所有第二OLED子像素为一次打开。
图19中的像素驱动电路以2T1C为例，其它可选方案中，也可以为3T1C、6T1C、7T1C等具体的像素驱动电路。
图20是透明显示区两行各列第二OLED子像素13的另一种主动驱动式的电路示意图。与图6相比，第一行每列第二OLED子像素13的第一电极连接至一像素驱动电路中的驱动晶体管的漏极，所述驱动晶体管的栅极对应显示驱动集成芯片的一个数据信号通道。第二行每列第二OLED子像素13的第一电极也连接至一像素驱动电路中的驱动晶体管的漏极，所述驱动晶体管的栅极对应显示驱动集成芯片的一个数据信号通道。第一行各列第二OLED子像素13与第二行第二各列OLED子像素13对应同一扫描信号。即，透明显示区的所有第二OLED子像素为一次打开。
图20中的像素驱动电路以2T1C为例，其它可选方案中，也可以为3T1C、6T1C、7T1C等具体的像素驱动电路。
参照图17至图20的第二OLED子像素13的驱动方式，本实施例中的两行第二OLED子像素13的驱动相当于两行前一实施例中的一行若干列的第二OLED子像素13的驱动。区别在于：上下两行在驱动时，可以共用扫描信号。
在图17至图20中，透明显示区10b的各列第二OLED子像素13为同色子像素。 可选方案中，透明显示区10b的各列第二OLED子像素13可以为红色子像素、绿色子像素、蓝色子像素、黄色子像素等中的其中一个。换言之，透明显示区10b执行显示功能时，该区域为单色发光。
在图17至图20中，透明显示区10b的各列第二OLED子像素13可以为多个颜色的子像素。两行若干列第二OLED子像素13为多个颜色的子像素时，一列中，上下两行的子像素的颜色优选相同，此时两行可以分别对应一数据信号，也可以共用一列数据信号。
在图17至图20中，第一行各列第二OLED子像素13的第一电极以及第二OLED发光结构可以在透明显示区10b的中部一区段内沿列方向延伸，或自透明显示区10b的顶端沿列方向延伸至透明显示区10b的顶端中上部或中部；第二行各列第二OLED子像素13的第一电极以及第二OLED发光结构可以在透明显示区10b的中下部一区段内沿列方向延伸、或自透明显示区10b的底端沿列方向延伸至透明显示区10b的中下部或中部。
图21是本申请第六实施例中的OLED阵列基板6的俯视图。参照图21所示，本实施例中的OLED阵列基板6包括显示区10，显示区10包括非透明显示区10a与透明显示区10b。
其中，非透明显示区10a包括阵列排布的第一OLED子像素11，在垂直于所述OLED阵列基板6所在平面的方向上，第一OLED子像素11包括：下电极、位于下电极上的第一OLED发光结构以及位于第一OLED发光结构上的上电极，该下电极的位置处于OLED阵列基板之上。各列第一OLED子像素11的驱动对应显示驱动集成芯片12的部分数据信号通道。透明显示区10b包括阵列排布的第二OLED子像素13，在垂直于所述OLED阵列基板所在平面的方向上，第二OLED子像素13包括：沿行方向延伸的第一电极、位于所述第一电极上沿行方向延伸的第二OLED发光结构以及位于第二OLED发光结构上的第二电极。两列各行第二OLED子像素13被驱动时，所述透明显示区执行显示功能；两列各行第二OLED子像素13未被驱动时，所述透明显示区执行透光功能。两列各行所述第二OLED子像素13的驱动对应同一显示驱动集成芯片的剩余部分的数据信号通道。两列各行第一OLED子像素11与各行第二OLED子像素13的驱动对应的所有数据信号通道的数据对应显示区10的一帧画面。
与前述实施例五中的OLED阵列基板5相比，区别在于：第二OLED子像素13呈两列若干行分布。
每个第二OLED子像素13的第一电极沿行方向延伸。
图22是透明显示区两列各行第二OLED像素13的一种被动驱动式的电路示意图。参照图22所示，一列各行第二OLED子像素13的第一电极连接至显示驱动集成芯片的同一数据信号通道。换言之，两列各行第二OLED子像素13共占据了两个数据信号通道。
非透明显示区10a占据的多个数据信号通道的数量与透明显示区10b占据的两个数据信号通道的总和为数据信号通道的总数量，所有数据信号通道的数据对应显示区10的一帧画面。
其它可选方案中，一列各行第二OLED子像素13的第一电极连接至显示驱动集成芯片的不同数据信号通道，也可以部分行连接同一数据信号通道；还可以两列各行第二OLED子像素13的第一电极连接至显示驱动集成芯片的同一数据信号通道。
图23是透明显示区两列各行第二OLED子像素13的一种主动驱动式的电路示意图。参照图23所示，第一列各行第二OLED像素子13的第一电极连接至同一像素驱动电路中的驱动晶体管的漏极，所述驱动晶体管的栅极对应显示驱动集成芯片的一个数据信号通道；第二列各行第二OLED子像素13的第一电极连接至另一像素驱动电路中的驱动晶体管的漏极，所述驱动晶体管的栅极对应显示驱动集成芯片的另一数据信号通道。换言之，该透明显示区占据了两个数据信号通道。其它可选方案中，也可以两列所有行第二OLED子像素13的第一电极连接至同一像素驱动电路中的驱动晶体管的漏极，所述驱动晶体管的栅极对应显示驱动集成芯片的同一数据信号通道。即该透明显示区只占据了一个数据信号通道。第一列各行第二OLED子像素13与第二列各行第二OLED子像素13对应同一扫描信号。
图23中的像素驱动电路以2T1C为例，其它可选方案中，也可以为3T1C、6T1C、7T1C等具体的像素驱动电路。
在图21至图23中，透明显示区10b的各列第二OLED子像素13为同色子像素。可选方案中，透明显示区10b的各列第二OLED像素13可以为红色子像素、绿色子像素、蓝色子像素、黄色子像素等中的其中一个。换言之，透明显示区10b执行显示功能时，该区域为单色发光。当两列若干行第二OLED子像素为多个颜色的像素时，一行中，左右两列的子像素的颜色优选相同。
图24是透明显示区两列各行第二OLED子像素13的一种被动驱动式的电路示 意图。参照图24所示，两列各行第二OLED子像素13为多个颜色的子像素，一列各第二OLED像素单元的各行同色子像素的第一电极连接至显示驱动集成芯片的同一数据信号通道。
其它可选方案中，一列各第二OLED像素单元的每行同色子像素的第一电极可以连接至显示驱动集成芯片的一个数据信号通道；还可以两列各第二OLED像素单元的各行同色子像素的第一电极连接至显示驱动集成芯片的同一数据信号通道。
图25是透明显示区两列各行第二OLED子像素13的一种主动驱动式的电路示意图。参照图25所示，两列各行第二OLED子像素13为多个颜色的子像素，一列各第二OLED像素单元的各行同色子像素的第一电极连接至同一像素驱动电路中的驱动晶体管的漏极，每一所述驱动晶体管的栅极对应显示驱动集成芯片的一个数据信号通道。其它可选方案中，一列各第二OLED像素单元的各行同色子像素的第一电极连接至不同像素驱动电路中的驱动晶体管的漏极，每一所述驱动晶体管的栅极对应显示驱动集成芯片的一个数据信号通道。其它可选方案中，两列各第二OLED像素单元的各行同色子像素的第一电极可以连接至同一像素驱动电路中的驱动晶体管的漏极，每一所述驱动晶体管的栅极对应显示驱动集成芯片的一个数据信号通道。
图25中的像素驱动电路以2T1C为例，其它可选方案中，也可以为3T1C、6T1C、7T1C等具体的像素驱动电路。
图26是本申请第七实施例中的OLED阵列基板7的俯视图。参照图26所示，本实施例中的OLED阵列基板7与图21中的OLED阵列基板6相比，省略第一列或第二列第二OLED子像素13，同时将第一列或第二列第二OLED子像素13左右延伸。对应地，关于第二OLED子像素13的结构请参照图21中的第二OLED子像素的结构；关于驱动，省略上述图22至25中的左边一套或右边一套驱动即可。
基于上述的OLED阵列基板，本申请还提供一种在此基础上设置有封装层的显示面板。显示面板除了用作显示器件，还可以设置触控层以作为触控面板。显示面板也可以作为半成品与其它部件集成、装配在一起形成如手机、平板电脑、车载显示屏等的显示装置。
显示装置中，显示面板的透明显示区10b下方对应设置光传感器，光传感器包括：摄像头、虹膜识别传感器以及指纹识别传感器中的一种或组合。
虽然本申请披露如上，但本申请并非限定于此。任何本领域技术人员，在不脱 离本申请的精神和范围内，均可作各种更动与修改，因此本申请的保护范围应当以权利要求所限定的范围为准。

Claims (19)

  1. 一种OLED阵列基板，包括：
    显示区，所述显示区包括：
    非透明显示区，所述非透明显示区设有阵列排布的第一OLED子像素；以及
    透明显示区，所述透明显示区设有阵列排布的第二OLED子像素，
    其中，所述第一OLED子像素的驱动对应显示驱动集成芯片的部分数据信号通道；所述第二OLED子像素的驱动对应所述显示驱动集成芯片的剩余部分的数据信号通道；所有所述数据信号通道的数据对应所述显示区的一帧画面；
    当所述第二OLED子像素被驱动时，所述透明显示区执行显示功能；当所述第二OLED子像素未被驱动时，所述透明显示区执行透光功能。
  2. 根据权利要求1所述的OLED阵列基板，其中，在垂直于所述OLED阵列基板所在平面的方向上，所述第一OLED子像素包括下电极、位于所述下电极上的第一OLED发光结构以及位于所述第一OLED发光结构上的上电极；
    在垂直于所述OLED阵列基板所在平面的方向上，所述第二OLED子像素包括沿列方向延伸的第一电极、位于所述第一电极上、且沿所述列方向延伸的第二OLED发光结构以及位于所述第二OLED发光结构上的第二电极。
  3. 根据权利要求1所述的OLED阵列基板，其中，所述阵列排布的第二OLED子像素包括一行若干列或两行若干列所述第二OLED子像素；
    当所述阵列排布的第二OLED子像素包括两行若干列所述第二OLED子像素时，同一列中的所述第二OLED子像素的颜色相同。
  4. 根据权利要求1所述的OLED阵列基板，其中，所述第二OLED子像素的驱动方式为主动式，所述OLED阵列基板还包括与所述第二OLED子像素对应的至少一个像素驱动电路。
  5. 根据权利要求3所述的OLED阵列基板，其中，所述OLED阵列基板还包括边框区和过渡区，所述边框区位于所述显示区的外围区域，所述过渡区位于所述透明显示区与所述非透明显示区之间；
    所述像素驱动电路设置在所述非透明显示区、所述边框区或所述过渡区。
  6. 根据权利要求2所述的OLED阵列基板，其中，所述第二OLED子像素均为同色子像素，各所述第二OLED子像素的驱动方式为被动式，一行中各所述第二OLED子像素的第一电极连接至所述显示驱动集成芯片的同一数据信号通道或不同数据信号通道。
  7. 根据权利要求2所述的OLED阵列基板，其中所述第二OLED子像素包括多个颜色的子像素，一行中相邻若干列不同颜色的第二OLED子像素形成一第二OLED像素单元，各所述第二OLED子像素的驱动方式为被动式，一行中各列同色第二OLED子像素的第一电极连接至所述显示驱动集成芯片的同一数据信号通道或不同数据信号通道。
  8. 根据权利要求2所述的OLED阵列基板，其中，所述第二OLED子像素包括多个颜色的子像素，一行中相邻若干列不同颜色的第二OLED子像素形成一像素单元，各所述第二OLED子像素的驱动方式为被动式；一行中各列所述第二OLED子像素的第一电极连接至一开关晶体管的漏极，不同的第二OLED像素单元中各列同色子像素对应的所述开关晶体管的源极连接至所述显示驱动集成芯片的同一数据信号通道，所述开关晶体管的栅极连接至同一或不同开关信号。
  9. 根据权利要求2所述的OLED阵列基板，其中，所述第二OLED子像素均为同色子像素，各所述第二OLED子像素的驱动方式为主动式，所述各第二OLED子像素的第一电极连接至同一像素驱动电路中的驱动晶体管的漏极，所述驱动晶体管的栅极对应所述显示驱动集成芯片的同一数据信号通道。
  10. 根据权利要求9所述的OLED阵列基板，其中，各所述第二OLED子像素对应的像素驱动电路具有对驱动晶体管的阈值电压进行补偿的功能。
  11. 根据权利要求9所述的OLED阵列基板，其中，各所述第二OLED子像素对应的像素驱动电路中的开关信号来源于GIP电路中的部分扫描信号通道，各所述第一OLED子像素对应的像素驱动电路中的开关信号来源于所述GIP电路的剩余部分扫描信号通道。
  12. 根据权利要求2所述的OLED阵列基板，其中，所述第二OLED子像素包括多个颜色的子像素，一行中相邻若干列不同颜色的第二OLED子像素形成一第二OLED像素单元，各第二OLED子像素的驱动方式为主动式，一行中各列同色子像素的第一电极连接至同一或不同像素驱动电路中的驱动晶体管的漏极，每一所述驱动晶体管的栅极对应所述显示驱动集成芯片的一个数据信号通道。
  13. 根据权利要求12所述的OLED阵列基板，其中，各所述第二OLED子像素对应的像素驱动电路具有对驱动晶体管的阈值电压进行补偿的功能。
  14. 根据权利要求12所述的OLED阵列基板，其中，各所述第二OLED子像素对应的像素驱动电路中的开关信号来源于GIP电路中的部分扫描信号通道，各所述第一OLED子像素对应的像素驱动电路中的开关信号来源于所述GIP电路的剩余部分扫描信 号通道。
  15. 根据权利要求2所述的OLED阵列基板，其中，所述第二OLED子像素的所述第二电极为面电极，和/或各个所述第一OLED子像素的所述上电极与各个所述第二OLED子像素的所述第二电极连接成一面电极。
  16. 根据权利要求2所述的OLED阵列基板，其中，当所述阵列排布的第二OLED子像素包括一行若干列所述第二OLED子像素时，各列所述第二OLED子像素的所述第一电极以及所述第二OLED发光结构在述透明显示区的中部一区段内沿所述列方向延伸、或自所述透明显示区的顶端沿所述列方向延伸至所述透明显示区的中部或底端，或自所述透明显示区的中部沿所述列方向延伸至所述透明显示区的底端。
  17. 根据权利要求2所述的基板，其中，当所述阵列排布的第二OLED子像素包括两行若干列所述第二OLED子像素时，
    第一行各列第二OLED子像素的第一电极以及第二OLED发光结构在所述透明显示区的中上部一区段内沿所述列方向延伸，或自所述透明显示区的顶端沿所述列方向延伸至所述透明显示区的中上部或中部；
    第二行各列第二OLED子像素的第一电极以及第二OLED发光结构在所述透明显示区的中下部一区段内沿所述列方向延伸、或自所述透明显示区的底端沿所述列方向延伸至所述透明显示区的中下部或中部。
  18. 一种显示面板，其特征在于，包括权利要求1至17任一项所述的OLED阵列基板。
  19. 一种显示装置，其特征在于，包括权利要求18所述的显示面板。
PCT/CN2019/092563 2018-12-28 2019-06-24 显示装置及其显示面板、oled阵列基板 Ceased WO2020133968A1 (zh)

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