WO2020133113A1 - Bldc反电势过零点阈值确定方法、装置及存储介质 - Google Patents

Bldc反电势过零点阈值确定方法、装置及存储介质 Download PDF

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Publication number
WO2020133113A1
WO2020133113A1 PCT/CN2018/124500 CN2018124500W WO2020133113A1 WO 2020133113 A1 WO2020133113 A1 WO 2020133113A1 CN 2018124500 W CN2018124500 W CN 2018124500W WO 2020133113 A1 WO2020133113 A1 WO 2020133113A1
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WIPO (PCT)
Prior art keywords
emf
zero
crossing
error
signal
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PCT/CN2018/124500
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English (en)
French (fr)
Inventor
杨雷
诸自强
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广东美的白色家电技术创新中心有限公司
美的集团股份有限公司
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Application filed by 广东美的白色家电技术创新中心有限公司, 美的集团股份有限公司 filed Critical 广东美的白色家电技术创新中心有限公司
Priority to JP2021534150A priority Critical patent/JP2022514535A/ja
Priority to EP18944189.2A priority patent/EP3886311B1/en
Priority to PCT/CN2018/124500 priority patent/WO2020133113A1/zh
Priority to US17/418,243 priority patent/US11716037B2/en
Priority to CN201880039612.8A priority patent/CN111630771B/zh
Publication of WO2020133113A1 publication Critical patent/WO2020133113A1/zh

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
    • H02P6/00—Arrangements for controlling synchronous motors or other dynamo-electric motors using electronic commutation dependent on the rotor position; Electronic commutators therefor
    • H02P6/14—Electronic commutators
    • H02P6/16—Circuit arrangements for detecting position
    • H02P6/18—Circuit arrangements for detecting position without separate position detecting elements
    • H02P6/182—Circuit arrangements for detecting position without separate position detecting elements using back-emf in windings

Definitions

  • the present disclosure relates to the technical field of motor control, and in particular, to a method, device, and storage medium for determining the back-EMF zero-crossing threshold of a brushless DC motor (BLDC, Brush, Direct, Current).
  • BLDC Brush, Direct, Current
  • BLDC sensorless drive control technology has advantages because it does not need to rely on position sensors to achieve commutation.
  • the back-EMF zero-crossing method is simple, effective and widely used.
  • the basic principle of the back-EMF zero-crossing method is that when the back-EMF of a phase winding of BLDC crosses zero, the rotor's straight axis coincides with the axis of the phase winding exactly, so as long as the back-EMF zero-crossing point of each phase winding is judged, the motor's Rotor position.
  • the voltage signal of the BLDC terminal is collected by an analog-to-digital converter (ADC, Analog-to-Digital Converter) module during the high period of pulse width modulation (PWM, Pulse Width Modulation), and then the location where the back-EMF zero-crossing occurs is determined.
  • ADC Analog-to-Digital Converter
  • PWM Pulse Width Modulation
  • the resistance of the three-phase terminal voltage divider resistor will shift, and the parameters of the motor resistance and inductance will be asymmetric.
  • the detected terminal voltage zero-crossing signal will be An offset occurs, which eventually leads to commutation error, which in turn affects drive performance.
  • the embodiments of the present disclosure provide a method, device, and storage medium for determining the BLDC back-EMF zero-crossing threshold.
  • An embodiment of the present disclosure provides a method for determining a BLDC back-EMF zero-crossing threshold, including:
  • the back-EMF zero-crossing threshold is determined; the determined back-EMF zero-crossing threshold is used to determine whether the back-EMF zero-crossing threshold.
  • the use of the obtained at least two first time intervals to determine the back-EMF zero-crossing error includes:
  • the first error of each phase of the BLDC is determined to obtain a first error set ;
  • the first back EMF signal is an ideal back EMF signal;
  • the second back EMF signal is an actual back EMF signal;
  • the errors in the first error set are converged to obtain the back-EMF zero-crossing zero-point threshold correction increment.
  • the use of the obtained at least two first time intervals to determine the back-EMF zero-crossing error includes:
  • the second back EMF signal is an ideal back EMF signal
  • the second back EMF signal is an actual back EMF signal
  • the errors in the second error set are converged to obtain the back-EMF zero-crossing zero-point threshold correction increment.
  • the use of the obtained at least two first time intervals to determine the back-EMF zero-crossing error includes:
  • the first error of each phase of the BLDC is determined to obtain a first error set ;
  • the obtained at least two first time intervals, and combining the relationship between the zero-point angular interval of two adjacent sectors of the first back-EMF signal and the zero-angle angular interval of the corresponding two adjacent sectors of the second back-EMF signal Determining the second error of each phase of the BLDC to obtain a second error set; wherein the first back EMF signal is an ideal back EMF signal; the second back EMF signal is an actual back EMF signal;
  • the back-EMF zero-crossing threshold is determined using the first back-EMF zero-crossing threshold correction increment and the second back-EMF zero-crossing threshold correction increment.
  • the use of the obtained at least two first time intervals and the relationship between the half-cycle angle of the first back-EMF signal and the corresponding half-cycle angle of the second back-EMF signal to determine the first error of each phase of the BLDC include:
  • the first error of each phase of the BLDC is determined by using the obtained at least two second time intervals and combining the relationship between the half-cycle angle of the first back-EMF signal and the corresponding half-cycle angle of the second back-EMF signal.
  • the convergence of the determined back-EMF zero-crossing error signal to obtain the back-EMF zero-crossing correction threshold correction increment includes:
  • Proportional integral (PI) controller is used to converge the determined back-EMF zero-crossing error signal to obtain the back-EMF zero-crossing correction threshold correction increment.
  • the method further includes:
  • An embodiment of the present disclosure also provides a BLDC back-EMF zero-crossing threshold determination device, including:
  • a detection unit configured to detect the back-EMF zero-crossing time interval of two adjacent sectors of the BLDC to obtain at least two first time intervals
  • the first determining unit is configured to determine the error of the zero-crossing point of the back EMF using the obtained at least two first time intervals;
  • the second determining unit is configured to converge the determined back-EMF zero-crossing error to obtain the back-EMF zero-crossing threshold correction increment;
  • the third determining unit is configured to correct the increment using the back-EMF zero-crossing threshold to determine the back-EMF zero-crossing threshold; the determined back-EMF zero-crossing threshold is used to determine whether the back-EMF crosses zero.
  • the first determining unit is configured to use the obtained at least two first time intervals and combine the relationship between the half-cycle angle of the first back-EMF signal and the corresponding half-cycle angle of the second back-EMF signal to determine the The first error of each phase of the BLDC obtains a first error set; wherein the first back EMF signal is an ideal back EMF signal; the second back EMF signal is an actual back EMF signal;
  • the second determining unit is configured to converge the errors in the determined first error set to obtain the back-EMF zero-crossing zero-point threshold correction increment.
  • the first determining unit is configured to use the obtained at least two first time intervals and the zero-point angular interval of two adjacent sectors in combination with the first back EMF signal is correspondingly adjacent to the second back EMF signal
  • the relationship between the zero-point angular intervals of the two sectors determines the second error of each phase of the BLDC to obtain a second error set; wherein the first back EMF signal is an ideal back EMF signal; the second back EMF signal is Actual back EMF signal;
  • the second determining unit is configured to converge the errors in the determined second error set to obtain the back-EMF zero-crossing zero-point threshold correction increment.
  • the first determining unit is configured to use the obtained at least two first time intervals and combine the relationship between the half-cycle angle of the first back-EMF signal and the corresponding half-cycle angle of the second back-EMF signal to determine the
  • the first error of each phase of the BLDC is used to obtain the first error set; and at least two first time intervals are obtained, and the zero-angle angle interval of the two adjacent sectors is combined with the first back-EMF signal corresponding to the second back-EMF signal.
  • the relationship between the zero-point angular intervals of two adjacent sectors determines the second error of each phase of the BLDC to obtain a second error set; wherein the first back EMF signal is an ideal back EMF signal; the second back EMF The signal is the actual back EMF signal;
  • the second determining unit is configured to converge the determined error in the first error set to obtain the first back-EMF zero-crossing threshold correction increment; converge on the determined error in the second error set to obtain the second Correction increment of zero crossing threshold of electric potential;
  • a third determining unit is configured to determine the back-EMF zero-crossing threshold using the first back-EMF zero-crossing threshold correction increment and the second back-EMF zero-crossing threshold correction increment.
  • An embodiment of the present disclosure further provides a BLDC back-EMF zero-crossing threshold determination device, the device including: a processor and a memory configured to store a computer program that can run on the processor;
  • any one of the above method steps is implemented when executed.
  • An embodiment of the present disclosure also provides a storage medium on which a computer program is stored, and when the computer program is executed by a processor, any of the steps of the above-mentioned methods is implemented.
  • the BLDC back-EMF zero-crossing threshold determination method, device and storage medium obtained at least two first time intervals by detecting the back-EMF zero-crossing time intervals of two adjacent sectors of the BLDC; At least two first time intervals to determine the back-EMF zero-crossing error; converge the determined back-EMF zero-crossing error to obtain the back-EMF zero-crossing threshold correction increment; use the obtained back-EMF zero-crossing threshold correction increment, Determine the back-EMF zero-crossing threshold.
  • the solution provided by the embodiments of the present disclosure determines the error of the BLDC back-EMF zero-crossing point, thereby determining the actual back-EMF zero-crossing threshold, and thus can accurately detect the occurrence position of the back-EMF zero-crossing point, ensuring the driving performance of the BLDC and improving the The reliability of the product; meanwhile, the solution of the embodiment of the present disclosure achieves the elimination of the commutation error caused by non-ideal factors through software, so that the hardware cost will not increase, and the implementation is simple and convenient.
  • Figure 1a is a schematic diagram of the voltage waveform at the end of the A-phase winding during the detection of the back-EMF zero-crossing point in the related art
  • Fig. 1b is a schematic diagram of the voltage waveform of the phase A terminal during the detection of the zero crossing of the back EMF in the related art
  • FIG. 2 is a schematic structural diagram of a hardware system in which BLDC is applied in an electronic device according to an embodiment of the present disclosure
  • FIG. 3 is a schematic diagram of BLDC ideal back EMF waveform and sector number according to an embodiment of the present disclosure
  • FIG. 4 is a schematic diagram of an implementation process of a method for determining a BLDC back-EMF zero-crossing threshold according to an embodiment of the present disclosure
  • FIG. 5 is a schematic structural diagram of a hardware system in which BLDC is applied in an electronic device according to an application example of the present disclosure
  • FIG. 6 is a schematic structural diagram of a BLDC back-EMF zero-crossing threshold determination system according to an application example of the present disclosure
  • FIG. 7 is a schematic diagram of the principle implementation module of the BLDC back-EMF zero-crossing threshold determination method according to an embodiment of the present disclosure
  • FIG. 8 is a schematic diagram of the relationship between the actual back EMF signal model and the ideal back EMF signal model generated by the offset of the three-phase terminal voltage divider resistance value according to an embodiment of the present disclosure
  • FIG. 9 is a schematic diagram of an equivalent structure of a control algorithm of a controller according to an embodiment of the present disclosure.
  • FIG. 10 is a schematic diagram of the relationship between the actual back EMF signal model and the ideal back EMF signal model generated by the asymmetry of the motor resistance and inductance parameters in the application example of the present disclosure
  • FIG. 11 is a flow chart diagram of BLDC implementing commutation according to an embodiment of the present disclosure
  • FIG. 12 is a schematic structural diagram of a BLDC back-EMF zero-crossing threshold determination device according to an embodiment of the present disclosure
  • FIG. 13 is a schematic diagram of the hardware composition of the BLDC back-EMF zero-crossing threshold determination device according to an embodiment of the present disclosure
  • 14a is a schematic diagram of a commutation position where the resistance of the three-phase voltage divider resistor is shifted and the motor resistance and inductance parameters are asymmetrical without using the embodiment of the present disclosure;
  • 14b is a schematic diagram of a commutation position where the resistance value of the three-phase voltage divider resistor is shifted and the motor resistance and inductance parameters are asymmetric under the condition of using the solution of the embodiment of the present disclosure.
  • the BLDC back electromotive force is sampled multiple times through the acquisition function of the ADC module during the high level of each PWM control cycle, and passed after the sampling is completed. Compare the relationship between the voltage of the floating phase terminal and the back-EMF reference voltage to determine whether the back-EMF crosses zero.
  • phase A the voltage waveform of the phase A winding terminal is shown in FIG. 1a, where during phase BC and CB, the phase A is floating, and its terminal voltage waveform is shown in FIG. 1b.
  • the premise of using the back-EMF zero-crossing detection scheme is that the resistance value of the three-phase voltage divider resistor is fixed and the motor resistance and inductance parameters are completely symmetrical.
  • the following phenomena will occur:
  • the resistance of the three-phase terminal voltage divider resistor will be changed by external factors such as temperature rise or aging, which will cause the voltage division ratio to shift, which will affect the accuracy of the terminal voltage detection.
  • external factors such as temperature rise or aging, which will cause the voltage division ratio to shift, which will affect the accuracy of the terminal voltage detection.
  • the traditional sensorless BLDC driving method based on back-EMF zero-crossing detection will be affected by the following non-ideal factors: three-phase voltage divider resistance offset and motor resistance and inductance parameters are asymmetric. After the above two non-ideal situations occur, the zero-crossing signal of the terminal voltage will shift and eventually lead to commutation error, which affects the driving performance.
  • the back-EMF zero-crossing threshold can accurately detect the position of the back-EMF zero-crossing point, and thus can improve the commutation accuracy.
  • FIG. 2 shows a schematic diagram of a hardware system in which BLDC is applied in an electronic device.
  • the hardware system includes: BLDC 201, three-phase terminal voltage dividing resistor 202, three-phase full bridge 203, capacitor 204, battery 205, current sampling resistor 206, and micro controller unit (MCU, MicroController Unit) 207.
  • the MCU 207 controls the three-phase full bridge 203 through the driving signal, thereby realizing the control of the BLDC 201.
  • the three phases of BLDC201 are respectively connected with three-component piezoresistor, namely three-phase terminal voltage dividing resistor 202, and the three-phase terminal voltage is collected by the ADC module in MCU207 BLDC 201 is equipped with resistance and inductance.
  • the embodiments of the present disclosure propose an improvement strategy for the resistance offset of the three-phase voltage divider resistor 202 and/or the influence of the asymmetric resistance and inductance parameters in BLDC 201 on the motor drive performance.
  • Figure 3 shows the BLDC ideal back-EMF waveform and sector number.
  • the waveform 301, the waveform 302, and the waveform 303 are the back-EMF waveforms of the A phase, B phase, and C phase of the BLDC, respectively.
  • the phase difference between the three phases is 120°
  • the mechanical cycle of one motor body includes 6 Sectors, their numbers are: sector 1, sector 2, sector 3, sector 4, sector 5 and sector 6, the sector boundary is the angular position of BLDC commutation, in an ideal state, each fan The interval of interval angle is 60°.
  • the angular position of the commutation and the angular position of the back-EMF zero-crossing point are separated by 30°, and the mechanical period t period of a motor body includes 6 back-EMF zero-crossing intervals.
  • the back-EMF zero-crossing angle of two adjacent sectors is 60° apart, but when the motor resistance and inductance parameters are asymmetric or the voltage divider resistance of the three-phase terminal changes, the terminal voltage signal crosses the zero point The angular position of will be shifted, and the back-EMF zero-crossing interval of adjacent sectors is no longer 60°, which will cause BLDC to cause commutation errors and reduce drive performance.
  • the back-EMF zero-crossing time interval is easily detected by software, and the back-EMF zero-crossing time interval t and the back-EMF zero-crossing angle ⁇ have a corresponding relationship in Equation 1 (where ⁇ and t refer to FIG. 3 The same abscissa area).
  • the embodiment of the present disclosure starts from detecting the actual back-EMF zero-crossing time interval and uses a series of correction methods to achieve the purpose of correcting the back-EMF zero-crossing interval of the adjacent sector to be uniformly 60°.
  • An embodiment of the present disclosure provides a method for determining a BLDC back-EMF zero-crossing threshold, as shown in FIG. 4, including the following steps:
  • S101 Detect a time interval of zero-crossing of the back EMF of two adjacent sectors of the BLDC to obtain at least two first time intervals.
  • the BLDC of the embodiment of the present invention uses sensorless drive control technology.
  • the back-EMF zero-crossing time interval of two adjacent sectors refers to the six adjacent back-EMF zero-crossing time intervals in FIG. 3, and these 6 adjacent back-EMFs
  • the numbers of the zero-crossing intervals are: t 12 , t 23 , t 34 , t 45 , t 56 and t 61. These time intervals together constitute the duration of the mechanical cycle of a motor body. Among them, the subscript of the number represents the number of the sector, for example, t 12 represents the zero-crossing time interval of the back EMF between the adjacent sectors 1 and 2.
  • the back-EMF zero-crossing time interval between the two adjacent sectors of the BLDC can be obtained by means of a timer.
  • S102 Determine the error of the zero-crossing point of the back EMF using the obtained at least two first time intervals.
  • the error of the zero-crossing point of the back-EMF refers to a signal of the difference between the actual back-EMF signal and the ideal back-EMF signal after the BLDC back-EMF has shifted due to non-ideal factors.
  • the relationship between the ideal back EMF signal and the actual back EMF signal that has shifted compared to the ideal back EMF signal is used to determine the back EMF zero-crossing error, and the back EMF zero-crossing error can be determined by at least two Calculated during the first time interval.
  • the non-ideal factors may include the offset of the resistance value of the three-phase voltage divider resistor, and/or the asymmetry of the parameters of the motor resistance and inductance.
  • the convergence refers to processing the determined back-EMF zero-crossing error so as to bring the back-EMF zero-crossing error closer to 0, thereby achieving the purpose of eliminating the error.
  • There are many techniques for converging the back-EMF zero-crossing error such as using a controller.
  • the back-EMF zero-crossing threshold correction increment is a correction value that offsets the back-EMF zero-crossing point caused by a non-ideal factor, such as a slight correction amount of the back-EMF near V dc /2 shown in FIG. 1b.
  • S104 Use the obtained back-EMF zero-crossing threshold correction increment to determine the back-EMF zero-crossing threshold; the determined back-EMF zero-crossing threshold is used to determine whether the back-EMF crosses zero.
  • the back-EMF zero-crossing threshold is the back-EMF zero-crossing threshold ⁇ 1 , ⁇ 2 , ⁇ 3 , ⁇ 4 between 6 adjacent sectors , ⁇ 5 and ⁇ 6 are the actual values of the back EMF shown in Figure 1b.
  • the back-EMF zero-crossing threshold obtained by using the embodiment of the present disclosure can provide an accurate commutation basis for the motor to achieve the purpose of eliminating commutation errors caused by non-ideal factors.
  • the BLDC back-EMF zero-crossing threshold determination method detects the back-EMF zero-crossing time interval of two adjacent sectors of the BLDC to obtain at least two first time intervals; using the obtained at least two first time intervals To determine the back-EMF zero-crossing error; converge the determined back-EMF zero-crossing error to obtain the back-EMF zero-crossing threshold correction increment; use the obtained back-EMF zero-crossing threshold correction increment to determine the back-EMF zero-crossing threshold, because The error of the BLDC back-EMF zero-crossing point is determined, thereby determining the actual back-EMF zero-crossing threshold, which can accurately detect the occurrence position of the back-EMF zero-crossing point, ensuring the driving performance of the BLDC, and improving the reliability of the product;
  • the solution of the disclosed embodiment does not increase the hardware cost, and only the software algorithm, that is, the back-EMF zero-crossing threshold determination algorithm, realizes the elimination of the commutation error caused
  • the use of the obtained at least two time intervals to determine the back-EMF zero-crossing error includes:
  • the first error of each phase of the BLDC is determined to obtain a first error set ;
  • the first back EMF signal is an ideal back EMF signal;
  • the second back EMF signal is an actual back EMF signal;
  • the errors in the first error set are converged to obtain the back-EMF zero-crossing zero-point threshold correction increment.
  • this kind of error can be called longitudinal error.
  • the use of the obtained at least two time intervals to determine the back-EMF zero-crossing error includes:
  • the second back EMF signal is an ideal back EMF signal
  • the second back EMF signal is an actual back EMF signal
  • the errors in the second error set are converged to obtain the back-EMF zero-crossing zero-point threshold correction increment.
  • this error can be called lateral error.
  • the use of the obtained at least two first time intervals to determine the error of the zero-crossing point of the back EMF includes:
  • the first error of each phase of the BLDC is determined to obtain a first error set ;
  • the obtained at least two first time intervals, and combining the relationship between the zero-point angular interval of two adjacent sectors of the first back-EMF signal and the zero-angle angular interval of the corresponding two adjacent sectors of the second back-EMF signal Determining the second error of each phase of the BLDC to obtain a second error set; wherein the first back EMF signal is an ideal back EMF signal; the second back EMF signal is an actual back EMF signal;
  • the back-EMF zero-crossing threshold is determined using the first back-EMF zero-crossing threshold correction increment and the second back-EMF zero-crossing threshold correction increment.
  • the at least two first time intervals obtained by the combination of the relationship between the half-cycle angle of the first back-EMF signal and the corresponding half-cycle angle of the second back-EMF signal determine each phase of the BLDC
  • the first error includes:
  • the first error of each phase of the BLDC is determined by using the obtained at least two second time intervals and combining the relationship between the half-cycle angle of the first back-EMF signal and the corresponding half-cycle angle of the second back-EMF signal.
  • the BLDC has 6 sectors, and is implemented using the hardware system of the BLDC shown in FIG. 5 applied in an electronic device.
  • the system includes: BLDC 501, three-phase terminal voltage dividing resistor 502, three-phase full bridge 503, capacitor 504, battery 505, current sampling resistor 506 and MCU 507.
  • the components shown in FIG. 5 are similar to the components shown in FIG. 2 except for the three-phase terminal voltage divider resistor 502, in which the resistor divider type back-EMF sampling scheme is used in FIG. 2, and the virtual Neutral back-EMF sampling scheme.
  • the resistor-divided potential sampling scheme of FIG. 2 is not used in FIG. 5, in actual application, the system shown in FIG. 5 will also exhibit asymmetric motor resistance, inductance parameters, and three-phase resistance resistance offset (three The resistance value of the voltage divider resistor 502 at the phase end is shifted).
  • the manifestation of the influencing factor of the resistance offset of the three-phase terminal can be: the resistance of the three-phase terminal has an offset, or it can be other conditions equivalent to the offset of the resistance value, such as the three-phase branch side pressure Inconsistent drop, inconsistent voltage drop of switch tube on three-phase branch, etc.
  • the BLDC back-EMF zero-crossing threshold determination system shown in FIG. 6 is used for implementation.
  • the control system includes: speed loop controller 601, current loop controller 602, commutation logic module 603, PWM module 604, three-phase full bridge 605, BLDC 606, timer B 607, timer A608, back-EMF zero-crossing threshold determination algorithm module 609, zero-crossing detection module 610, ADC sampling module 611, and three-phase terminal voltage divider resistance module 612.
  • the timer A 608 continuously measures the back-EMF zero-crossing time interval of BLDC at least 6 times to obtain 6 back-EMF zero-crossing time intervals within the mechanical cycle time of a motor body, and then the latest phases obtained by the 6 measurements
  • Adjacent two sector zero-crossing time intervals t 12 , t 23 , t 34 , t 45 , t 56 and t 61 are sent to the back-EMF zero-crossing threshold determination algorithm module 609, which is generated by the back-EMF zero-crossing threshold determination algorithm module 609 Back-EMF zero-crossing threshold.
  • the ADC sampling module 611 (corresponding to the function of the three-phase terminal voltage dividing resistor 502 in FIG. 5 and the MCU507 back-EMF sampling function) passes the voltage dividing resistor module 612 (corresponding to the three-phase terminal voltage dividing resistor 502 in FIG. 5) in the PWM
  • the module 604 is at a high level, the terminal voltage is collected in real time.
  • Input the difference between the collected terminal voltage signal and the aforementioned back-EMF zero-crossing threshold to the zero-crossing detection module 610 (corresponding to the function of MCU 507 in FIG. 5 to perform zero-point detection).
  • the difference between the terminal voltage signal and the back-EMF zero-crossing threshold is 0, back-EMF zero-crossing occurs.
  • the back-EMF zero-crossing logic module 603. Starting from measuring the back-EMF zero-crossing time interval of BLDC, the above process is executed cyclically in the control system.
  • the back-EMF zero-crossing threshold determination algorithm module 609 calculates the zero-crossing threshold for the judgment of the occurrence of the zero-crossing of the mechanical cycle of the next motor body. In this way, the position of the zero-crossing point of the back EMF can be accurately detected, and thus the accuracy of commutation can be greatly improved.
  • the structure shown in FIG. 6 adopts a speed and current double closed-loop control structure, that is, a speed loop controller 601 and a current loop controller 602 to implement system functions.
  • the difference between the given speed signal and the feedback speed signal outputs the current fixed value signal to the current controller 602 through the speed controller 601, then the current fixed value signal and the current feedback signal make a difference, and outputs the voltage signal to the commutation logic module, and finally through the PWM Module 604, three-phase full bridge 605 drive BLDC606.
  • the speed and current double closed-loop control structure can be expanded to any structure such as speed single-loop or power current double-closed loop.
  • the speed loop controller 601 and the current loop controller 602 can be replaced only by the speed loop controller or the power loop controller and the current loop controller or other equivalent structures that can realize the functions of this place according to the actual application requirements. carry out.
  • the BLDC back-EMF zero-crossing threshold determination algorithm shown in FIG. 7 is specifically used to correct the BLDC back-EMF zero-crossing threshold.
  • the correction algorithm mainly includes: a vertical correction algorithm, a horizontal correction algorithm, and a threshold feedback algorithm.
  • the longitudinal correction algorithm is mainly used to calculate the longitudinal error (the error caused by the offset of the three-phase voltage divider resistance);
  • the lateral correction algorithm is mainly used to calculate the lateral error (the error caused by the asymmetry of the motor resistance and inductance parameters);
  • the threshold feedback algorithm is mainly used to determine the actual back-EMF zero-crossing threshold.
  • the processor can use the vertical correction algorithm and the horizontal correction algorithm to calculate the corresponding errors separately.
  • the two do not affect each other. They are responsible for correcting the commutation errors caused by different non-ideal factors.
  • the algorithm implements the correction function. Since two kinds of non-ideal factors are the most complicated, and when there are two kinds of non-ideal factors, the implementation of any one of the above correction modules is included, so here only three parts of the correction are made when both non-ideal factors exist.
  • the implementation of the algorithm is elaborated in detail. Those skilled in the art can understand that when there is only one non-ideal factor, one of the corresponding longitudinal correction algorithm and lateral correction algorithm can be used in combination with the threshold feedback algorithm to achieve the purpose of back-EMF zero-crossing threshold correction.
  • the back-EMF signal obtained from the terminal voltage will be symmetrically distributed on both sides of V dc /2. That is, the back-EMF signal with a half period of 180° is evenly distributed on both sides of V dc /2.
  • the resistance of the three-phase voltage divider resistor is shifted, there will be a DC deviation between the voltage-dividing rear-end voltage signal and the ideal design value.
  • the actual back-EMF signal will no longer be evenly distributed in V dc / 2 Both sides, but a certain longitudinal offset based on the ideal back EMF signal, which causes a zero-crossing detection error.
  • Fig. 8 shows the relationship between the actual back-EMF signal model and the ideal back-EMF signal model generated by the offset of the three-phase voltage divider resistance.
  • 801 is the ideal back-EMF signal model of phase B (a randomly exemplified phase)
  • 802 is the actual back-EMF signal model of phase B due to the longitudinal offset after the voltage division resistance of the three-phase terminal is offset.
  • ⁇ 25 and ⁇ 52 are used to denote the angle of the upper half period and the lower half period of the ideal back-EMF signal, respectively; with Respectively represent the angle of the first half cycle and the angle of the second half cycle of the actual back EMF signal.
  • ⁇ VB represents the longitudinal error of the B-phase back-EMF zero crossing.
  • phase A and phase C the zero-crossing error of the longitudinal back-EMF of the other two phases
  • the relationship between the half-cycle angle of the ideal back-EMF signal and the corresponding half-cycle angle of the actual back-EMF signal gives each phase of BLDC caused by the offset of the resistance of the three-phase terminal voltage divider resistance
  • the relationship between the back-EMF zero-crossing longitudinal error and the back-EMF zero-crossing time interval determines the longitudinal error through software.
  • the two back-EMF zero-crossing time intervals corresponding to the above two phases of phase A, B, and C are calculated according to the above relationship, and the longitudinal error of the back-EMF zero-crossing point of each phase of BLDC is obtained.
  • the longitudinal errors of the zero-crossing points of the back EMF of the A phase, B phase, and C phase of the BLDC are sent to the controller respectively.
  • the controller here can use a PI controller. According to the classic PI parameter tuning method, the zero-crossing potential error signal can be realized. Perform convergence to achieve the purpose of eliminating errors.
  • the specific implementation method of the PI controller can be implemented in conjunction with the equivalent structure of the control algorithm of the controller shown in FIG. 9, and the PI controller of each phase can be implemented using the equivalent structure of the control algorithm in FIG. 9:
  • k p and k i are PI ratio and integral gain; ⁇ is the motor speed, ⁇ is the permanent magnet flux linkage, and t period is the mechanical period of a motor body.
  • k p and k i can be set as
  • ⁇ c is the desired control bandwidth angular frequency. For example, if the bandwidth is 10 Hz, then
  • the longitudinal errors of the back-EMF zero-crossing points of the A, B, and C phases of the BLDC are fed into the PI controller, and the back-EMF zero-crossing zero-point threshold longitudinal correction increments ⁇ VA , ⁇ VB , and ⁇ VC are obtained .
  • the lateral correction algorithm is explained in detail below.
  • Figure 10 shows the relationship between the actual back-EMF signal model and the ideal back-EMF signal model resulting from the asymmetry of the motor resistance and inductance parameters.
  • 1001, 1002, and 1003 are the ideal back-EMF signal models of A-phase, B-phase, and C-phase, respectively;
  • 1004, 1005, and 1006 are the A-phase, B-phase, and C-phase, respectively, because the motor resistance and inductance parameters are not
  • the actual back-EMF signal model after the lateral offset is generated after symmetry;
  • ⁇ 12 , ⁇ 23 , ⁇ 34 , ⁇ 45 , ⁇ 56 , and ⁇ 61 are the zero-angle interval between two adjacent sectors of the ideal back-EMF signal; It is the actual zero-point angular interval between two adjacent sectors;
  • ⁇ HA , ⁇ HB , ⁇ HC are the back-EMF zero-crossing lateral errors of phases A, B, and C, respectively.
  • a The opposite potential signal is affected by the BC phase resistance and inductance parameters
  • the phase A impedance in Figure 10 is greater than the phase B impedance, the C phase back EMF signal shifts to the right (lag); if the phase A impedance is less than the phase B impedance, then C The phase back EMF signal is shifted to the left (leading). Due to the circularity of this logic, it can be concluded that the three-phase offset value is 0, that is, there is the following relationship:
  • Equation 10 the variables in parentheses in Equation 13 and the parentheses have theoretically the same value, ie And according to the corresponding relationship between the back-EMF zero-crossing time interval and the back-EMF zero-crossing angle (Equation 1), the calculation relationship of the equivalent error in Equation 10 can be obtained:
  • the relationship between the zero-angle angle interval of two adjacent sectors of the ideal back-EMF signal and the zero-angle angle interval of the corresponding two adjacent sectors of the actual back-EMF signal yields each phase of BLDC
  • the relationship between the back-EMF zero-crossing lateral error and the back-EMF zero-crossing time interval caused by the asymmetry of the motor resistance and inductance parameters determines the lateral error through software.
  • the relationship between the A phase and the B phase does not have to be these two phases, but two random phases in the three phases, but it should be noted that when in the relationship 14 When it is no longer A phase and B phase but the other two phases, the corresponding back-EMF zero-crossing time interval needs to be adjusted.
  • the specific adjustment method can be obtained by referring to the above process.
  • the two back-EMF zero-crossing time intervals corresponding to the above-mentioned phase A and B are calculated according to the above relationship, and the lateral error of the back-EMF zero-crossing point of the BLDC phases A and B is obtained, while the back-EMF zero-crossing point of the C phase is lateral
  • the error is obtained by adding the lateral errors of the back-EMF zero-crossing points of phases A and B to the opposite number, that is, the lateral error set of the back-EMF zero-crossing point caused by the asymmetry of the motor resistance and inductance parameters (ie, the second error set ).
  • the controller can use a PI controller. According to the classic PI parameter tuning method, the potential zero-crossing error signal can be realized. Perform convergence to achieve the purpose of eliminating errors.
  • the specific implementation of the PI controller is the same as the implementation in the longitudinal correction algorithm, and will not be repeated here.
  • the longitudinal errors of the back-EMF zero-crossing points of the A, B, and C phases of the BLDC are sent to the PI controller, and the back-EMF zero-crossing zero-point threshold lateral correction increments ⁇ HA , ⁇ HB , and ⁇ HC are obtained .
  • the threshold feedback algorithm is explained in detail below.
  • back-EMF zero-crossing threshold longitudinal correction increment and the back-EMF zero-crossing threshold lateral correction increment are used to determine the back-EMF zero-crossing threshold
  • the difference between the longitudinal correction increment of the back-EMF zero-crossing threshold and the transverse correction increment of the back-EMF zero-crossing threshold is obtained to obtain the back-EMF zero-crossing threshold;
  • the zero-crossing The direction of is from negative to positive, and the longitudinal correction increment of the back-EMF zero-crossing threshold and the transverse correction increment of the back-EMF zero-crossing threshold are summed to obtain the back-EMF zero-crossing threshold.
  • the back-EMF zero-crossing correction threshold increment is added to the back-EMF zero-crossing reference voltage value to obtain a back-EMF zero-crossing correction threshold.
  • Equation 15 sectors 1, 3 and 5 minus the back-EMF zero-crossing threshold lateral correction increment; 2, 4, and 6 sectors increase the back-EMF zero-crossing threshold lateral correction increment, which can logically form negative feedback.
  • the actually detected zero-crossing signal leads the ideal zero-crossing ⁇ HA phase. If you increase the 6-sector threshold and lower the 3-sector threshold at this time, you can move the actual zero-crossing position to the right at the same time. When ⁇ HA converges to 0, the actual zero-crossing position will coincide with the ideal zero-crossing position.
  • FIG. 11 is a flowchart of a process of implementing commutation by BLDC in an application embodiment. As shown in FIG. 11, the process includes:
  • the error between each zero-crossing point and the ideal position is reconstructed according to the mathematical relationship. Then through the PI controller, continuously adjust the back-EMF zero-crossing threshold to make each zero-crossing point converge to the ideal position and improve the accuracy of commutation.
  • the correction is divided into two parts, of which the longitudinal correction part is responsible for correcting the commutation error caused by the resistance deviation of the voltage divider resistance; the lateral correction part is responsible for correcting the commutation error caused by the asymmetry of the motor resistance and inductance parameters. Two sets of controllers can work at the same time but do not affect each other, and can finally achieve the purpose of eliminating errors.
  • FIG. 12 is a schematic diagram of the composition of the device of the embodiment of the disclosure. As shown in FIG. 12, the device 1200 includes : Detection unit 1201, first determination unit 1202, second determination unit 1203, and third determination unit 1204, where:
  • the detection unit 1201 is configured to detect the back-EMF zero-crossing time interval of two adjacent sectors of the BLDC to obtain at least two first time intervals;
  • the first determining unit 1202 is configured to determine the error of the zero-crossing point of the back EMF using the obtained at least two first time intervals;
  • the second determining unit 1203 is configured to converge on the determined back-EMF zero-crossing error to obtain a back-EMF zero-crossing threshold correction increment;
  • the third determining unit 1204 is configured to correct the increment using the back-EMF zero-crossing threshold to determine the back-EMF zero-crossing threshold; the determined back-EMF zero-crossing threshold is used to determine whether the back-EMF is crossing zero.
  • the first determining unit 1201 is configured to use the obtained at least two first time intervals in combination with the relationship between the half-cycle angle of the first back-EMF signal and the corresponding half-cycle angle of the second back-EMF signal, Determine the first error of each phase of the BLDC to obtain a first error set; wherein the first back EMF signal is an ideal back EMF signal; the second back EMF signal is an actual back EMF signal;
  • the second determining unit 1202 is configured to converge the determined errors in the first error set to obtain the back-EMF zero-crossing zero-point threshold correction increment.
  • the first determining unit 1201 is configured to use the obtained at least two first time intervals in combination with the zero-point angular interval of two adjacent sectors of the first back EMF signal and the second back EMF signal Corresponding to the relationship between the zero-point angular intervals of two adjacent sectors, the second error of each phase of the BLDC is determined to obtain a second error set; wherein the first back EMF signal is an ideal back EMF signal; the second back EMF The potential signal is the actual back EMF signal;
  • the second determining unit 1202 is configured to converge the errors in the determined second error set to obtain the back-EMF zero-crossing zero-point threshold correction increment.
  • the first determining unit 1201 is configured to use the obtained at least two first time intervals in combination with the relationship between the half-cycle angle of the first back-EMF signal and the corresponding half-cycle angle of the second back-EMF signal, Determine the first error of each phase of the BLDC to obtain a first error set; and use the at least two first time intervals obtained, combined with the zero-angle angle interval of two adjacent sectors of the first back-EMF signal and the second inverse
  • the potential signal corresponds to the relationship between the zero-point angular intervals of two adjacent sectors to determine the second error of each phase of the BLDC to obtain a second error set; wherein the first back-EMF signal is an ideal back-EMF signal; the first The second back EMF signal is the actual back EMF signal;
  • the second determining unit 1202 is configured to converge the determined error in the first error set to obtain a first back-EMF zero-crossing threshold correction increment; converge on the determined error in the second error set to obtain the second Correction increment of back-EMF zero-crossing threshold;
  • the third determining unit 1203 is configured to determine the back-EMF zero-crossing threshold using the first back-EMF zero-crossing threshold correction increment and the second back-EMF zero-crossing threshold correction increment.
  • the detection unit 1201, the first determination unit 1202, the second determination unit 1203, and the third determination unit 1204 may be implemented by a processor in the BLDC back-EMF zero-crossing threshold determination device.
  • the BLDC back-EMF zero-crossing threshold determination device provided in the above embodiment is used to determine the BLDC back-EMF zero-crossing threshold, only the above-mentioned division of each program module is used as an example for illustration. In actual applications, the The above processing allocation is performed by different program modules, that is, the internal structure of the device is divided into different program modules to complete all or part of the processing described above.
  • the BLDC back-EMF zero-crossing threshold determination device provided in the above embodiment and the BLDC back-EMF zero-crossing threshold determination method embodiment belong to the same concept. For the specific implementation process, please refer to the method embodiment, which will not be repeated here.
  • an embodiment of the present disclosure provides a BLDC back-EMF zero-crossing threshold determination device.
  • the device 1300 includes: a processor 1301 and A memory 1302 configured to store a computer program capable of running on the processor, where:
  • the processor 1301 is configured to execute the method provided by one or more of the above technical solutions when running the computer program.
  • each component in the device 1300 is coupled together through the bus system 1303.
  • the bus system 1303 is used to implement connection and communication between these components.
  • the bus system 1303 also includes a power bus, a control bus, and a status signal bus.
  • various buses are marked as the bus system 1303 in FIG. 13.
  • an embodiment of the present disclosure also provides a storage medium, which is a computer-readable storage medium, such as a memory 1302 including a computer program, which can be processed by the processor of the BLDC back-EMF zero-crossing threshold determination device 1300 1301 is executed to complete the steps of the foregoing method.
  • a storage medium which is a computer-readable storage medium, such as a memory 1302 including a computer program, which can be processed by the processor of the BLDC back-EMF zero-crossing threshold determination device 1300 1301 is executed to complete the steps of the foregoing method.
  • Computer-readable storage media can be magnetic random access memory (FRAM, ferromagnetic random access memory), read-only memory (ROM, Read Only Memory), programmable read-only memory (PROM, Programmable Read-Only Memory), erasable Programmable read-only memory (EPROM, Erasable, Programmable, Read-Only Memory), electrically erasable programmable read-only memory (EEPROM, Electrically Erasable, Programmable Read-Only Memory), flash memory (Flash), magnetic surface memory, optical disc , Or read-only compact disc (CD-ROM, Compact, Read-Only Memory) and other memories.
  • FRAM magnetic random access memory
  • ROM read-only memory
  • PROM programmable Read-Only Memory
  • EPROM Erasable Programmable Read-Only Memory
  • EEPROM Electrically Erasable, Programmable Read-Only Memory
  • flash memory Flash
  • magnetic surface memory optical disc
  • CD-ROM Compact, Read-Only Memory
  • CD-ROM Compact, Read-Only Memory
  • the experimental conditions are: BLDC speed ⁇ is 20000r/min, and
  • FIG. 14 shows the commutation positions of the solution using the embodiment of the present disclosure and the solution not using the embodiment of the present disclosure.
  • FIG. 14a shows the commutation position where the resistance value of the three-phase voltage division resistor is shifted and the motor resistance and inductance parameters are asymmetrical without using the solution of the embodiment of the present disclosure. It can be seen from Figure 14a: Under the influence of two non-ideal factors, the BLDC back-EMF adjacent sector zero-crossing angle interval is not ideal 60°, and the position of commutation is not uniform, and the phase current fluctuates significantly.
  • FIG. 14b shows the commutation positions of the asymmetric pairs of the motor resistance and inductance parameters when the resistance of the three-phase voltage division resistor is shifted and the resistance and inductance parameters of the motor are shifted under the condition of using the solution of the embodiment of the present disclosure.
  • the angular interval of the zero-crossing points of adjacent sectors of the BLDC back-EMF is all 60°, the commutation positions are uniform, and the phase current fluctuation disappears. Therefore, the back-EMF zero-crossing threshold determination algorithm achieves the purpose of automatically and dynamically correcting the BLDC back-EMF zero-crossing error.

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Abstract

一种无刷直流电机反电势过零点阈值确定方法、装置及存储介质，其中，方法包括：检测所述无刷直流电机相邻两个扇区的反电势过零点时间间隔，得到至少两个第一时间间隔（S101）；利用得到的至少两个第一时间间隔，确定反电势过零点的误差（S102）；对确定的反电势过零点误差进行收敛，得到反电势过零点阈值矫正增量（S103）；利用得到的反电势过零点阈值矫正增量，确定反电势过零点阈值。

Description

BLDC反电势过零点阈值确定方法、装置及存储介质 技术领域
本公开涉及电机控制技术领域，尤其涉及一种无刷直流电机(BLDC，Brush Less Direct Current)的反电势过零点阈值确定方法、装置及存储介质。
背景技术
高速小型化的BLDC如今应用领域越来越广泛，尤其是在小型电动工具如手持式的真空吸尘器等领域。BLDC无传感器驱动控制技术因其无需依靠位置传感器来实现换向而优势凸显。
目前，在BLDC无传感器驱动控制技术领域中，电机的转子位置检测方法有多种，其中以反电势过零点法简单、有效而被广泛应用。反电势过零点法的基本原理是当BLDC的某相绕组的反电势过零时，转子直轴与该相绕组轴线恰好重合，因此只要判断出各相绕组的反电势过零点就可获知电机的转子位置。
相关技术中，在脉冲宽度调制(PWM，Pulse Width Modulation)高电平期间通过模数转换器(ADC，Analog-to-Digital Converter)模块采集BLDC端电压信号，然后判断反电势过零点发生位置。
然而，实际应用时，三相端电压分压电阻的阻值会产生偏移，电机电阻、电感的参数会出现不对称的情况，当出现这些情况时，检测到的端电压过零点信号就会发生偏移，从而最终导致换相误差，进而影响驱动性能。
发明内容
为解决相关技术存在的技术问题，本公开实施例提出一种BLDC反电势过零点阈值确定方法、装置及存储介质。
本公开实施例提供了一种BLDC反电势过零点阈值确定方法，包括：
检测所述BLDC相邻两个扇区的反电势过零点时间间隔，得到至少两个第 一时间间隔；
利用得到的至少两个第一时间间隔，确定反电势过零点的误差；
对确定的反电势过零点误差进行收敛，得到反电势过零点阈值矫正增量；
利用得到的反电势过零点阈值矫正增量，确定反电势过零点阈值；确定的反电势零点阈值用于判断反电势是否过零。
上述方案中，所述利用得到的至少两个第一时间间隔，确定反电势过零点的误差，包括：
利用得到的至少两个第一时间间隔，并结合第一反电势信号半周期角度与第二反电势信号相应半周期角度的关系，确定所述BLDC每相的第一误差，得到第一误差集；其中，所述第一反电势信号为理想反电势信号；所述第二反电势信号为实际反电势信号；
对所述第一误差集中的误差进行收敛，得到反电势过零点零点阈值矫正增量。
上述方案中，所述利用得到的至少两个第一时间间隔，确定反电势过零点的误差，包括：
利用得到的至少两个第一时间间隔，并结合第一反电势信号相邻两个扇区的零点角度间隔与第二反电势信号相应相邻两个扇区的零点角度间隔的关系，确定所述BLDC每相的第二误差，得到第二误差集；其中所述第一反电势信号为理想反电势信号；所述第二反电势信号为实际反电势信号；
对所述第二误差集中的误差进行收敛，得到反电势过零点零点阈值矫正增量。
上述方案中，所述利用得到的至少两个第一时间间隔，确定反电势过零点的误差，包括：
利用得到的至少两个第一时间间隔，并结合第一反电势信号半周期角度与第二反电势信号相应半周期角度的关系，确定所述BLDC每相的第一误差，得到第一误差集；并利用得到的至少两个第一时间间隔，并结合第一反电势信号相邻两个扇区的零点角度间隔与第二反电势信号相应相邻两个扇区的零点角度 间隔的关系，确定所述BLDC每相的第二误差，得到第二误差集；其中所述第一反电势信号为理想反电势信号；所述第二反电势信号为实际反电势信号；
对所述第一误差集中的误差进行收敛，得到第一反电势过零点阈值矫正增量；并对所述第二误差集中的误差进行收敛，得到第二反电势过零点阈值矫正增量；
利用所述第一反电势过零点阈值矫正增量和所述第二反电势过零点阈值矫正增量，确定反电势过零点阈值。
上述方案中，所述利用得到的至少两个第一时间间隔，并结合第一反电势信号半周期角度与第二反电势信号相应半周期角度的关系，确定所述BLDC每相的第一误差，包括：
利用得到的至少两个第一时间间隔，确定所述BLDC本体的机械周期中半个周期对应的扇区的反电势过零点时间间隔，得到至少两个第二时间间隔；
利用得到的至少两个第二时间间隔，并结合第一反电势信号半周期角度与第二反电势信号相应半周期角度的关系，确定所述BLDC每相的第一误差。
上述方案中，所述对确定的反电势过零点误差信号进行收敛，得到反电势过零点矫正阈值矫正增量，包括：
利用比例积分(PI，Proportional Integral)控制器对确定的反电势过零点误差信号进行收敛，得到反电势过零点矫正阈值矫正增量。
上述方案中，所述方法还包括：
将端电压与确定的反电势过零点阈值进行比较，得到比较结果；
根据比较结果，判断反电势是否过零。
本公开实施例还提供一种BLDC反电势过零点阈值确定装置，包括：
检测单元，配置为检测所述BLDC相邻两个扇区的反电势过零点时间间隔，得到至少两个第一时间间隔；
第一确定单元，配置为利用得到的至少两个第一时间间隔，确定反电势过零点的误差；
第二确定单元，配置为对确定的反电势过零点误差进行收敛，得到反电势 过零点阈值矫正增量；
第三确定单元，配置为利用所述反电势过零点阈值矫正增量，确定反电势过零点阈值；确定的反电势零点阈值用于判断反电势是否过零。
上述方案中，所述第一确定单元，配置为利用得到的至少两个第一时间间隔，并结合第一反电势信号半周期角度与第二反电势信号相应半周期角度的关系，确定所述BLDC每相的第一误差，得到第一误差集；其中所述第一反电势信号为理想反电势信号；所述第二反电势信号为实际反电势信号；
所述第二确定单元，配置为对确定的第一误差集中的误差进行收敛，得到反电势过零点零点阈值矫正增量。
上述方案中，所述第一确定单元，配置为利用得到的至少两个第一时间间隔，并结合第一反电势信号相邻两个扇区的零点角度间隔与第二反电势信号相应相邻两个扇区的零点角度间隔的关系，确定所述BLDC每相的第二误差，得到第二误差集；其中所述第一反电势信号为理想反电势信号；所述第二反电势信号为实际反电势信号；
所述第二确定单元，配置为对确定的第二误差集中的误差进行收敛，得到反电势过零点零点阈值矫正增量。
上述方案中，所述第一确定单元，配置为利用得到的至少两个第一时间间隔，并结合第一反电势信号半周期角度与第二反电势信号相应半周期角度的关系，确定所述BLDC每相的第一误差，得到第一误差集；并利用得到的至少两个第一时间间隔，并结合第一反电势信号相邻两个扇区的零点角度间隔与第二反电势信号相应相邻两个扇区的零点角度间隔的关系，确定所述BLDC每相的第二误差，得到第二误差集；其中所述第一反电势信号为理想反电势信号；所述第二反电势信号为实际反电势信号；
所述第二确定单元，配置为对确定的第一误差集中的误差进行收敛，得到第一反电势过零点阈值矫正增量；并对确定的第二误差集中的误差进行收敛，得到第二反电势过零点阈值矫正增量；
第三确定单元，配置为利用所述第一反电势过零点阈值矫正增量和所述第 二反电势过零点阈值矫正增量，确定反电势过零点阈值。
本公开实施例又提供一种BLDC反电势过零点阈值确定装置，所述装置包括：处理器和配置为存储能够在处理器上运行的计算机程序的存储器；
其中，所述处理器配置为运行所述计算机程序时，执行时实现上述任一所述方法步骤。
本公开实施例还提供一种存储介质，其上存储有计算机程序，所述计算机程序被处理器执行时实现上述任一所述方法的步骤。
本公开实施例提供的BLDC反电势过零点阈值确定方法、装置及存储介质，通过检测所述BLDC相邻两个扇区的反电势过零点时间间隔，得到至少两个第一时间间隔；利用得到的至少两个第一时间间隔，确定反电势过零点的误差；对确定的反电势过零点误差进行收敛，得到反电势过零点阈值矫正增量；利用得到的反电势过零点阈值矫正增量，确定反电势过零点阈值。本公开实施例提供的方案，确定了BLDC反电动势过零点的误差，从而确定了实际的反电势过零点阈值，进而能够准确检测反电势过零点的发生位置，保证了BLDC的驱动性能，提高了产品的可靠性；同时，本公开实施例的方案通过软件方式实现了消除非理想因素引起的换相误差，如此，不会增加硬件成本，并且实现简单、方便。
附图说明
图1a为相关技术中反电势过零点检测时A相绕组端电压波形示意图；
图1b为相关技术中反电势过零点检测时A相端电压波形示意图；
图2为本公开实施例BLDC应用在电子设备中的硬件系统结构示意图；
图3为本公开实施例BLDC理想反电势波形以及扇区编号示意图；
图4为本公开实施例BLDC反电势过零点阈值确定方法实现流程示意图；
图5为本公开应用实施例BLDC应用在电子设备中的硬件系统结构示意图；
图6为本公开应用实施例BLDC反电势过零点阈值确定系统结构示意图；
图7为本公开应用实施例BLDC反电势过零点阈值确定方法原理实现模块示意图；
图8为本公开应用实施例由三相端电压分压电阻阻值偏移产生的实际反电势信号模型和理想反电势信号模型之间的关系示意图；
图9为本公开应用实施例控制器的控制算法等效结构示意图；
图10为本公开应用实施例由电机电阻、电感参数不对称产生的实际反电势信号模型和理想反电势信号模型之间的关系示意图；
图11为本公开应用实施例BLDC实现换相的流程图示意图；
图12为本公开实施例BLDC反电势过零点阈值确定装置的组成结构示意图；
图13为本公开实施例BLDC反电势过零点阈值确定装置的硬件组成结构示意图；
图14a为未使用本公开实施例方案的条件下，三相端电压分压电阻的阻值发生偏移且电机电阻、电感参数不对称的换相位置示意图；
图14b为使用本公开实施例的方案条件下，三相端电压分压电阻的阻值发生偏移且电机电阻、电感参数不对称的换相位置示意图。
具体实施方式
为使本公开实施例的目的、技术方案和优点更加清楚，下面将结合本公开实施例中的附图，对发明的具体技术方案做进一步详细描述。以下实施例用于说明本公开，但不用来限制本公开的范围。
如前所述，相关技术中，在对BLDC控制的过程中，在每个PWM控制周期的高电平时间内通过ADC模块的采集功能对BLDC反电动势进行多次采样，并在采样完成后通过比较悬空相端电压与反电势参考电压的关系来判断反电势是否过零点。以A相为例，在一个电机本体的机械周期内，A相绕组端电压波形如图1a所示，其中在BC和CB期间，A相悬空，其端电压波形如图1b所示。在PWM开通期间，A相端电压U A＝e A+V dc/2(其中：e A为A相反电势，V dc/2 为反电势参考电压)，当U A＝V dc/2时，e A＝0，即为A相反电势过零点时刻。在图1b中的a1时刻，U A＜V dc/2，反电势未过零点，在下一PWM控制周期的a2时刻，U A＞V dc/2，此时检测到反电势已过零点；同理，在CB期间，A相端电压呈下降趋势，在b2时刻，U A＞V dc/2，反电势未过零点，而在b3时刻，U A＜V dc/2，此时检测到反电势已过零点。
相关技术中，反电势过零点检测方案的使用前提是：三相端电压分压电阻阻值固定、电机电阻、电感参数完全对称，然而，在实际过程中，会发生以下现象：
1、三相端电压分压电阻的阻值会受温升或老化等外界因素影响而发生改变，使分压比例发生偏移，进而影响端电压检测的准确度。当上述情况发生，通过分压电阻采样得到的端电压与实际值之间会存在偏差。
2、高速电机由于电阻、电感参数较小，在实际制造过程中，容易产生阻感参数不对称的现象。其可能产生的原因包括：模块化制造，匝数不对称，线路接触电阻不相等。当上述现象发生后，悬空相端电压与其反电势信号间会存在偏差。
当上述两种现象发生后，传统基于反电势过零点检测的无传感器BLDC驱动方法会受到以下非理想因素的影响：三相端电压分压电阻阻值偏移和电机电阻、电感参数不对称。在上述两种非理想情况发生后，端电压过零点信号会发生偏移并最终导致换相误差，影响驱动性能。
基于此，在本公开的各种实施例中，通过检测BLDC相邻两个扇区的反电势过零点时间间隔，得到至少两个第一时间间隔；利用得到的至少两个第一时间间隔，确定反电势过零点的误差；对确定的反电势过零点误差进行收敛，得到反电势过零点阈值矫正增量；利用得到的反电势过零点阈值矫正增量，确定反电势过零点阈值，根据确定的反电势过零点阈值能够准确检测到反电势过零点的位置，进而能够提高换相准确度。
图2示出了BLDC应用在电子设备中的硬件系统结构示意图。如图2所示， 所述硬件系统包括：BLDC 201、三相端电压分压电阻202、三相全桥203、电容204、电池205、电流采样电阻206和微控制单元(MCU，MicroController Unit)207。MCU 207通过驱动信号控制三相全桥203，从而实现控制BLDC 201。BLDC201的三相分别接有三组分压电阻即三相端电压分压电阻202，三相端电压通过MCU 207中的ADC模块采集。BLDC 201中配置有电阻和电感。
其中，本公开实施例针对三相端电压分压电阻202的阻值偏移和/或BLDC201中电阻、电感参数不对称对电机驱动性能的影响，提出了改进策略。
图3示出了BLDC理想反电势波形以及扇区编号。在图3中，波形301、波形302和波形303分别为BLDC的A相、B相位和C相位的反电势波形，三个相位之间相位差为120°，一个电机本体的机械周期包括6个扇区，它们的编号为：扇区1、扇区2、扇区3、扇区4、扇区5和扇区6，扇区边界为BLDC换相的角度位置，在理想状态下，各扇区间角度间隔为60°。
换相的角度位置与反电势过零点的角度位置之间间隔30°，一个电机本体的机械周期t period包括6个反电势过零点间隔。在理想状态下，相邻两个扇区反电势过零点角度间隔为60°，但当电机电阻、电感参数发生不对称或者三相端电压分压电阻阻值发生改变时，端电压信号过零点的角度位置会发生偏移，相邻扇区反电势过零点间隔不再是60°，这样会导致BLDC引起换相误差，降低驱动性能。在实际应用中，反电势过零点时间间隔通过软件很容易检测得到，且反电势过零点时间间隔 t与反电势过零点角度θ存在式1中的对应关系(其中θ和t指代图3中相同的横坐标区域)。
Figure PCTCN2018124500-appb-000001
因此本公开实施例从检测实际的反电势过零点时间间隔出发，通过一系列矫正手段，以达到矫正相邻扇区反电势过零点间隔为均匀的60°的目的。
本公开实施例提供一种BLDC反电势过零点阈值确定方法，如图4所示，包括以下步骤：
S101：检测所述BLDC相邻两个扇区的反电势过零点时间间隔，得到至少 两个第一时间间隔。
这里，实际应用时，本发明实施例的BLDC采用无传感器驱动控制技术。
当所述BLDC有6个扇区时，相邻两个扇区的反电势过零点时间间隔是指图3中的6个相邻的反电势过零点时间间隔，这6个相邻的反电势过零点间隔的编号为：t 12、t 23、t 34、t 45、t 56和t 61，这些时间间隔共同构成了一个电机本体的机械周期的时长。其中，编号的下标代表扇区的编号，比如，t 12代表相邻的扇区1、扇区2之间的反电势过零点时间间隔。
在实际应用中，所述BLDC相邻两个扇区的反电势过零点时间间隔可以通过计时器计时的方式得到。
S102：利用得到的至少两个第一时间间隔，确定反电势过零点的误差。
这里，所述反电势过零点的误差是指由于非理想因素引起BLDC反电动势产生偏移后的实际反电势信号与理想反电势信号的差值的信号。利用理想反电势信号与相较于理想反电势信号已产生偏移的实际反电势信号之间的关系确定反电势过零点的误差，并且所述反电势过零点的误差可以由得到的至少两个第一时间间隔间的计算得到。
实际应用时，如前所述，非理想因素可以包括三相端电压分压电阻的阻值的偏移、和/或电机电阻、电感的参数的不对称。
S103：对确定的反电势过零点误差进行收敛，得到反电势过零点阈值矫正增量。
这里，所述收敛是指对确定的反电势过零点误差进行处理，以使反电势过零点误差向0靠近，从而达到消除误差的目的。对反电势过零点误差进行收敛的技术手段有很多种，比如采用控制器等。
这里，所述反电势过零点阈值矫正增量是对非理想因素导致反电势过零点产生偏移的矫正值，比如图1b所示的反电势在V dc/2附近纵向的微小矫正量。
S104：利用得到的反电势过零点阈值矫正增量，确定反电势过零点阈值；确定的反电势零点阈值用于判断反电势是否过零。
这里，实际应用时，当所述BLDC有6个扇区时时，所述反电势过零点阈值是6个相邻扇区之间的反电势过零点阈值τ 1、τ 2、τ 3、τ 4、τ 5和τ 6，即为图1b所示的反电势的实际值。采用本公开实施例方案得到的反电势过零点阈值可以给电机提供准确的换相依据，以达到消除非理想因素引起的换相误差的目的。
本公开实施例提供的BLDC反电势过零点阈值确定方法，检测BLDC相邻两个扇区的反电势过零点时间间隔，得到至少两个第一时间间隔；利用得到的至少两个第一时间间隔，确定反电势过零点的误差；对确定的反电势过零点误差进行收敛，得到反电势过零点阈值矫正增量；利用得到的反电势过零点阈值矫正增量，确定反电势过零点阈值，由于确定了BLDC反电动势过零点的误差，从而确定了实际的反电势过零点阈值，进而能够准确检测反电势过零点的发生位置，保证了BLDC的驱动性能，提高了产品的可靠性；同时，本公开实施例的方案在不增加硬件成本的基础上，仅通过软件算法，即反电势过零点阈值确定算法实现了消除非理想因素引起的换相误差，方案易于实现。
实际应用时，当三相端电压分压电阻的阻值发生偏移，且电机电阻、电感的参数对称时，可以仅对由三相端电压分压电阻阻值偏移产生的影响进行消除。
基于此，在一实施例中，在S102和S103中，所述利用得到的至少两个时间间隔，确定反电势过零点的误差，包括：
利用得到的至少两个第一时间间隔，并结合第一反电势信号半周期角度与第二反电势信号相应半周期角度的关系，确定所述BLDC每相的第一误差，得到第一误差集；其中，所述第一反电势信号为理想反电势信号；所述第二反电势信号为实际反电势信号；
对所述第一误差集中的误差进行收敛，得到反电势过零点零点阈值矫正增量。
这里，实际应用时，这种误差可以称为纵向误差。
当三相端电压分压电阻的阻值未发生偏移，且电机电阻、电感的参数不对称时，可以仅对电机电阻、电感的参数不对称产生的影响进行消除。
基于此，在一实施例中，在S102和S103中，所述利用得到的至少两个时间间隔，确定反电势过零点的误差，包括：
利用得到的至少两个第一时间间隔，并结合第一反电势信号相邻两个扇区的零点角度间隔与第二反电势信号相应相邻两个扇区的零点角度间隔的关系，确定所述BLDC每相的第二误差，得到第二误差集；其中所述第一反电势信号为理想反电势信号；所述第二反电势信号为实际反电势信号；
对所述第二误差集中的误差进行收敛，得到反电势过零点零点阈值矫正增量。
这里，实际应用时，这种误差可以称为横向误差。
当三相端电压分压电阻的阻值发生了偏移，且电机电阻、电感的参数不对称时，需要对这两种因素产生的影响进行消除。
基于此，在一实施例中，在S102至104中，所述利用得到的至少两个第一时间间隔，确定反电势过零点的误差，包括：
利用得到的至少两个第一时间间隔，并结合第一反电势信号半周期角度与第二反电势信号相应半周期角度的关系，确定所述BLDC每相的第一误差，得到第一误差集；并利用得到的至少两个第一时间间隔，并结合第一反电势信号相邻两个扇区的零点角度间隔与第二反电势信号相应相邻两个扇区的零点角度间隔的关系，确定所述BLDC每相的第二误差，得到第二误差集；其中所述第一反电势信号为理想反电势信号；所述第二反电势信号为实际反电势信号；
对所述第一误差集中的误差进行收敛，得到第一反电势过零点阈值矫正增量；并对所述第二误差集中的误差进行收敛，得到第二反电势过零点阈值矫正增量；
利用所述第一反电势过零点阈值矫正增量和所述第二反电势过零点阈值矫正增量，确定反电势过零点阈值。
其中，在一实施例中，所述利用得到的至少两个第一时间间隔，并结合第一反电势信号半周期角度与第二反电势信号相应半周期角度的关系，确定 所述BLDC每相的第一误差，包括：
利用得到的至少两个第一时间间隔，确定所述BLDC本体的机械周期中半个周期对应的扇区的反电势过零点时间间隔，得到至少两个第二时间间隔；
利用得到的至少两个第二时间间隔，并结合第一反电势信号半周期角度与第二反电势信号相应半周期角度的关系，确定所述BLDC每相的第一误差。
下面结合具体的应用实例对本公开进行详细的说明。
在应用实施例中，BLDC具有6个扇区，且采用图5所示的BLDC应用在电子设备中的硬件系统来实现。如图5所示，该系统包括：BLDC 501、三相端电压分压电阻502、三相全桥503、电容504、电池505、电流采样电阻506和MCU 507。
其中，图5所示的各组成与图2所示的各组成类似，区别仅在于三相端电压分压电阻502，其中图2中采用电阻分压式反电势采样方案，图5中采用虚拟中性点反电势采样方案。虽然图5中未采用图2的电阻分压式电势采样方案，但是在实际应用时，图5所示的系统会也出现电机电阻、电感参数不对称和三相端电阻阻值偏移(三相端电压分压电阻502中的电阻阻值发生偏移)的问题。这里，三相端电阻阻值偏移这个影响因素的表现形式可以是：三相端电阻阻值产生了偏移，还可以是其它等同于电阻阻值偏移的情况，比如三相支流侧压降不一致，三相支路上开关管导通压降不一致等。
在应用实施例中，采用图6所示的BLDC反电势过零点阈值确定系统来实现。如图6所示，所述控制系统包括：转速环控制器601、电流环控制器602、换相逻辑模块603、PWM模块604、三相全桥605、BLDC 606、定时器B 607、定时器A 608、反电势过零点阈值确定算法模块609、过零点检测模块610、ADC采样模块611和三相端电压分压电阻模块612。
其中，由定时器A 608至少连续测量6次BLDC的反电势过零点时间间隔，得到一个电机本体的机械周期时长内的6个反电势过零点时间间隔，然后将6个测量得到的最新的相邻两个扇区过零点时间间隔t 12、t 23、t 34、t 45、t 56和t 61送入 反电势过零点阈值确定算法模块609中，由反电势过零点阈值确定算法模块609产生反电势过零点阈值。
由ADC采样模块611(对应图5中三相端电压分压电阻502的功能与MCU507反电势采样的功能)通过分压电阻模块612(对应图5中三相端电压分压电阻502)在PWM模块604高电平时对端电压进行实时采集。将采集到的端电压信号与前述的反电势过零点阈值做差输入到过零点检测模块610(对应图5中MCU 507执行零点检测的功能)。当端电压信号与反电势过零点阈值的差值为0时，反电势过零点发生。每当反电势过零点发生时，首先通过定时器B 607启动30°延时并触发换相逻辑模块603，从测量BLDC的反电势过零点时间间隔开始，上述过程在控制系统中循环执行，每次由反电势过零点阈值确定算法模块609计算过零点阈值，用于下一个电机本体的机械周期过零点发生的判断。如此，能够准确检测到反电势过零点的位置，进而能够大大提高换相准确度。
需要说明的是：图6所示的结构采用了转速电流双闭环控制结构，即转速环控制器601和电流环控制器602来实现系统功能。给定转速信号和反馈转速信号做差通过转速控制器601输出电流定值信号给电流控制器602，然后电流定值信号与电流反馈信号做差，输出电压信号给换相逻辑模块，最后通过PWM模块604、三相全桥605驱动BLDC 606。其中，转速电流双闭环控制结构可以拓展为转速单环或功率电流双闭环等任意结构。也就是说，转速环控制器601和电流环控制器602可以根据实际的应用需求，仅通过转速环控制器或者功率环控制器和电流环控制器或者能实现本处功能的其它等同结构来替换完成。
在应用实施例中，具体采用图7所示的BLDC反电势过零点阈值确定算法来进行BLDC反电势过零点阈值的矫正。
如图7所示，矫正算法主要包括：纵向矫正算法、横向矫正算法和阈值反馈算法。其中，纵向矫正算法主要用于计算纵向误差(三相端电压分压电阻阻值偏移产生的误差)；横向矫正算法主要用于计算横向误差(电机电阻、电感参数不对称产生的误差)；阈值反馈算法主要用于确定实际的反电势过零点阈值。
实际应用时，处理器可以同时使用纵向矫正算法和横向矫正算法来分别计 算对应的误差，二者互不影响，它们分别负责矫正不同非理想因素引起的换相误差。实际应用时，当具体应用中仅存在一种非理想因素影响时，即仅存在三相端电压分压电阻阻值偏移或者电机电阻、电感参数不对称时，可以单独采用其中一个对应得矫正算法实现矫正功能。由于当存在两种非理想因素时最复杂，并且存在两种非理想因素时包含了上述任一个矫正模块的实现方式，因此这里仅对两种非理想因素均存在时的情况下，三部分矫正算法的实现进行详细阐述。本领域技术人员可以理解的是当仅存在一种非理想因素影响时，可采用相应的纵向矫正算法和横向矫正算法之一并结合阈值反馈算法达到反电势过零点阈值矫正的目的。
下面对图7的每种算法进行详细阐述。
首先详细阐述纵向矫正算法：
在理想状况下，由端电压所得的反电势信号会对称分布在V dc/2两侧。即V dc/2两侧会均匀分布半周期180°的反电势信号。当三相端电压分压电阻的阻值发生偏移，会使得分压后端电压信号与理想设计值之间存在直流偏差，具体表现为实际反电势信号将不再均匀的分布在V dc/2两侧，而是在理想反电势信号的基础上产生一定的纵向偏移，由此引起过零点检测误差。
图8示出了由三相端电压分压电阻阻值偏移产生的实际反电势信号模型和理想反电势信号模型之间的关系。其中，801为B相(随机举例的一个相位)的理想反电势信号模型，802为B相由于三相端电压分压电阻偏移后产生纵向偏移后的实际反电势信号模型。相应地，在B相下，用θ 25和θ 52分别表示理想反电势信号的上半周期角度和下半周期角度；用
Figure PCTCN2018124500-appb-000002
和
Figure PCTCN2018124500-appb-000003
分别表示实际反电势信号的上半周期角度和下半周期角度。ε VB表示B相的反电势过零点纵向误差。
在图8中，存在以下基本关系：
Figure PCTCN2018124500-appb-000004
由于θ 25＝θ 52＝π，故可得：
Figure PCTCN2018124500-appb-000005
其中，若用t 25表示B相上半周期时间间隔，t 52表示B相下半周期时间间隔，则
Figure PCTCN2018124500-appb-000006
与t 25的关系、
Figure PCTCN2018124500-appb-000007
与t 52的关系为：
Figure PCTCN2018124500-appb-000008
将式(4)代入式(3)中得到：
Figure PCTCN2018124500-appb-000009
同理可以得到其它两相位(A相和C相)纵向反电动势过零点误差：
Figure PCTCN2018124500-appb-000010
Figure PCTCN2018124500-appb-000011
这里，从上面的推导过程可以看出，由理想反电势信号半周期角度与实际反电势信号相应半周期角度的关系得到了BLDC每一相由三相端电压分压电阻阻值偏移引起的反电势过零点纵向误差与反电势过零点时间间隔的关系式，从而通过软件方式确定了纵向误差。
根据由定时器连续测量6次BLDC的反电势过零点时间间隔，得到一个电机本体的机械周期的6个反电势过零点时间间隔：t 12、t 23、t 34、t 45、t 56和t 61，然后分别得到A相、B相、C相对应两个半周期的两个反电势过零点时间间隔：t 36和t 36、t 25和t 52、t 14和t 41。
对上述A相、B相、C相对应两个半周期的两个反电势过零点时间间隔根据上述关系式计算，得到了BLDC每一相的反电势过零点的纵向误差，即这里确定了由三相端电压分压电阻阻值偏移引起的反电势过零点的纵向误差集(即第一误差集)。
分别将BLDC的A相、B相、C相的反电势过零点的纵向误差送入控制器，这里的控制器可以采用PI控制器，根据经典PI参数整定法，可以实现对电势 过零点误差信号进行收敛，以达到消除误差的目的。
其中，PI控制器的具体实现方法可结合图9所示的控制器的控制算法等效结构来实现，每一相的PI控制器均可采用图9中的控制算法等效结构来实现：
其开环传递函数G OL为：
Figure PCTCN2018124500-appb-000012
其中，k p与k i为PI比例与积分增益；ω为电机转速，λ为永磁体磁链，t period为一个电机本体的机械周期。根据经典PI参数整定法，k p与k i可设为
Figure PCTCN2018124500-appb-000013
Figure PCTCN2018124500-appb-000014
其中ω c为期望控制带宽角频率。例如取带宽为10Hz，则
Figure PCTCN2018124500-appb-000015
Figure PCTCN2018124500-appb-000016
这里，将BLDC的A相、B相、C相的反电势过零点的纵向误差送入PI控制器，得到了反电势过零点零点阈值纵向矫正增量τ VA、τ VB、τ VC。
下面详细阐述横向矫正算法。
图10示出了由电机电阻、电感参数不对称产生的实际反电势信号模型和理想反电势信号模型之间的关系。在图10中，1001、1002和1003分别为A相、B相和C相的理想反电势信号模型；1004、1005和1006分别为A相、B相和C相的由于电机电阻、电感参数不对称后产生横向偏移后的实际反电势信号模型；θ 12、θ 23、θ 34、θ 45、θ 56、θ 61为理想反电势信号相邻两个扇区的零点角度间隔；
Figure PCTCN2018124500-appb-000017
Figure PCTCN2018124500-appb-000018
为实际相邻两个扇区的零点角度间隔；ε HA、ε HB、ε HC分别为A、B、C相的反电势过零点横向误差。
当电机电阻、电感参数不对称时，比如如图10所示的A相阻抗大于B相阻抗(随机举例的两个相位)，则会出现扇区2端电压小于理想值；扇区5端电 压大于理想值。具体表现为C相的实际反电势信号较C相的理想反电势信号向右偏移(图10中由1002到1005)。因此可推断出：
C相反电势信号受AB相电阻、电感参数影响；
B相反电势信号受AC相电阻、电感参数影响；
A相反电势信号受BC相电阻、电感参数影响；
具体影响表现为超前或是滞后，取决于对应电阻、电感参数的相对大小。
在图10中，存在以下基本关系：
Figure PCTCN2018124500-appb-000019
同时，根据电机电阻电感不对称影响产生的特点，例如图10中A相位阻抗大于B相位阻抗，则C相位反电势信号向右偏移(滞后)；若A相位阻抗小于B相位阻抗，则C相位反电势信号向左偏移(超前)。由于这一逻辑的循环性，可得出三相偏移值综合为0，即存在如下关系：
ε HA+ε HB+ε HC＝0   (12)
且θ 12至θ 61均为
Figure PCTCN2018124500-appb-000020
将式(12)代入式(11)，可以得到等效误差信号ε HA与ε HB，其中ε HC为冗余信息，在算法中无需求解。
Figure PCTCN2018124500-appb-000021
根据图10所示的关系，式13中括号中与括号外的变量理论上有相同数值，即
Figure PCTCN2018124500-appb-000022
并且根据反电势过零点时间间隔与反电势过零点角度存在的对应关系(式1)，可以得到式10中的等效误差的计算关系式：
Figure PCTCN2018124500-appb-000023
这里，从上面的推导过程可以看出，由理想反电势信号相邻两个扇区的零点角度间隔与实际反电势信号相应相邻两个扇区的零点角度间隔的关系得到了BLDC每一相由电机电阻、电感参数不对称引起的反电势过零点横向误差与反电势过零点时间间隔的关系式，从而通过软件方式确定了横向误差。
需要说明的是，实际应用时，这里的关于A相、B相的关系式并不必须是这两个相位，而是三相中随机的两相，但是需要注意的是当关系式14中的不再是A相、B相而是其它两相时，其对应的反电势过零点时间间隔需作出调整，具体的调整方法可以参照上述过程得到。
根据由定时器连续测量6次BLDC的反电势过零点时间间隔，得到一个电机本体的机械周期的6个反电势过零点时间间隔：t 12、t 23、t 34、t 45、t 56和t 61，然后分别得到A相、B相对应两个反电势过零点时间间隔：t 12+t 45和t 23+t 56、t 12+t 45和t 34+t 61。
对上述A相、B相对应两个反电势过零点时间间隔根据上述关系式计算，得到了BLDC的A相、B相的反电势过零点的横向误差，而C相的反电势过零点的横向误差为A相、B相的反电势过零点的横向误差相加取相反数得到，即这里确定了由电机电阻、电感参数不对称引起的反电势过零点的横向误差集(即第二误差集)。
分别将BLDC的A相、B相、C相的反电势过零点的横向误差送入控制器，这里的控制器可以采用PI控制器，根据经典PI参数整定法，可以实现对电势过零点误差信号进行收敛，以达到消除误差的目的。
关于PI控制器的具体实现方式与纵向矫正算法中的实现方式相同，这里不再赘述。
这里将BLDC的A相、B相、C相的反电势过零点的纵向误差送入PI控制器，得到了反电势过零点零点阈值横向矫正增量τ HA、τ HB、τ HC。
下面详细阐述阈值反馈算法。
这里，利用所述反电势过零点阈值纵向矫正增量和所述反电势过零点阈值 横向矫正增量，确定反电势过零点阈值；
其中，当过零点的方向从正到负，则由所述反电势过零点阈值纵向矫正增量与反电势过零点阈值横向矫正增量作差，得到所述反电势过零点阈值；当过零点的方向从负到正，则由所述反电势过零点阈值纵向矫正增量与反电势过零点阈值横向矫正增量作和，得到所述反电势过零点阈值。
然后将所述反电势过零点矫正阈值增量与所述反电势过零点参考电压值作和，得到反电势过零点矫正阈值。
这里，六个扇区所对应的六个过零点阈值τ 1到τ 6的计算方法如下所示：
Figure PCTCN2018124500-appb-000024
式15中，1、3和5扇区减掉反电势过零点阈值横向矫正增量；2、4和6扇区增加反电势过零点阈值横向矫正增量，这样可以从逻辑上形成负反馈。以图10中A相位为例，实际检测到的过零点信号超前于理想过零点ε HA相位。若此时提高6扇区阈值并降低3扇区阈值，可以同时向右移动实际过零点位置，当ε HA收敛到0后，实际过零点位置将与理想过零点位置重合。
需要说明的是，这里如果根据实际情况，仅进行了纵向矫正或横向误差对应的阈值矫正时，在式15中，需要去掉没有使用的相应反电势过零点阈值矫正增量。
图11为本应用实施例BLDC实现换相的过程流程图，如图11所示，所述流程包括：
(1)检测到反电势过零；
(2)执行停止、读取并重启定时器A的过程，得到过零点时间间隔t 12、t 23、t 34、t 45、t 56和t 61；
(3)执行纵向矫正，得到τ VA、τ VB和τ VC；
(4)执行横向矫正，得到τ HA、τ HB和τ HC；
(5)执行阈值反馈计算得到τ 1到τ 6；
(6)执行τ 1到τ 6与端电压的比较，判断反电势是否过零；
(7)判断结果为反电势过零时，设置并启动定时器B；
(8)根据换相顺序，执行换相操作；
(9)停止定时器B。
重复执行上述(1)-(9)，可实现BLDC的精准换相。
从上面的描述可以看出，本公开实施例中，通过测量相邻扇区过零点间的时间间隔，根据数学关系重构得到每一个过零点与理想位置的误差。再通过PI控制器，不断调节反电势过零点阈值，使每一个过零点收敛到理想位置，提高换相准确度。矫正分为两个部分，其中纵向矫正部分负责矫正分压电阻阻值偏移产生的换相误差；横向矫正部分负责矫正电机电阻电感参数不对称所产生的换相误差。两组控制器可以同时工作但互不影响，可以最终达到消除误差的目的。
为了实现本公开实施例的方法，本公开实施例还提供一种BLDC反电势过零点阈值确定装置，图12为本公开实施例装置的组成结构示意图，如图12所示，所述装置1200包括：检测单元1201、第一确定单元1202、第二确定单元1203和第三确定单元1204，其中：
所述检测单元1201，配置为检测所述BLDC相邻两个扇区的反电势过零点时间间隔，得到至少两个第一时间间隔；
所述第一确定单元1202，配置为利用得到的至少两个第一时间间隔，确定反电势过零点的误差；
所述第二确定单元1203，配置为对确定的反电势过零点误差进行收敛，得到反电势过零点阈值矫正增量；
所述第三确定单元1204，配置为利用所述反电势过零点阈值矫正增量，确定反电势过零点阈值；确定的反电势零点阈值用于判断反电势是否过零。
在一实施例中，所述第一确定单元1201，配置为利用得到的至少两个第一时间间隔，并结合第一反电势信号半周期角度与第二反电势信号相应半周期角度的关系，确定所述BLDC每相的第一误差，得到第一误差集；其中所述第一反电势信号为理想反电势信号；所述第二反电势信号为实际反电势信号；
所述第二确定单元1202，配置为对确定的第一误差集中的误差进行收敛，得到反电势过零点零点阈值矫正增量。
在一实施例中，所述第一确定单元1201，配置为利用得到的至少两个第一时间间隔，并结合第一反电势信号相邻两个扇区的零点角度间隔与第二反电势信号相应相邻两个扇区的零点角度间隔的关系，确定所述BLDC每相的第二误差，得到第二误差集；其中所述第一反电势信号为理想反电势信号；所述第二反电势信号为实际反电势信号；
所述第二确定单元1202，配置为对确定的第二误差集中的误差进行收敛，得到反电势过零点零点阈值矫正增量。
在一实施例中，所述第一确定单元1201，配置为利用得到的至少两个第一时间间隔，并结合第一反电势信号半周期角度与第二反电势信号相应半周期角度的关系，确定所述BLDC每相的第一误差，得到第一误差集；并利用得到的至少两个第一时间间隔，并结合第一反电势信号相邻两个扇区的零点角度间隔与第二反电势信号相应相邻两个扇区的零点角度间隔的关系，确定所述BLDC每相的第二误差，得到第二误差集；其中所述第一反电势信号为理想反电势信号；所述第二反电势信号为实际反电势信号；
所述第二确定单元1202，配置为对确定的第一误差集中的误差进行收敛，得到第一反电势过零点阈值矫正增量；并对确定的第二误差集中的误差进行收敛，得到第二反电势过零点阈值矫正增量；
第三确定单元1203，配置为利用所述第一反电势过零点阈值矫正增量和所述第二反电势过零点阈值矫正增量，确定反电势过零点阈值。
实际应用时，所述检测单元1201、第一确定单元1202、第二确定单元 1203、第三确定单元1204可由BLDC反电势过零点阈值确定装置中的处理器实现。
需要说明的是：上述实施例提供的BLDC反电势过零点阈值确定装置在进行BLDC反电势过零点阈值确定时，仅以上述各程序模块的划分进行举例说明，实际应用中，可以根据需要而将上述处理分配由不同的程序模块完成，即将装置的内部结构划分成不同的程序模块，以完成以上描述的全部或者部分处理。另外，上述实施例提供的BLDC反电势过零点阈值确定装置与BLDC反电势过零点阈值确定方法实施例属于同一构思，其具体实现过程详见方法实施例，这里不再赘述。
基于上述程序模块的硬件实现，且为了实现本公开实施例的方法，本公开实施例提供一种BLDC反电势过零点阈值确定装置，如图13所示，所述装置1300包括：处理器1301和配置为存储能够在处理器上运行的计算机程序的存储器1302，其中：
所述处理器1301配置为运行所述计算机程序时执行上述一个或多个技术方案提供的方法。
实际应用时，如图13所示，所述装置1300中的各个组件通过总线系统1303耦合在一起。可理解，总线系统1303用于实现这些组件之间的连接通信。总线系统1303除包括数据总线之外，还包括电源总线、控制总线和状态信号总线。但是为了清楚说明起见，在图13中将各种总线都标为总线系统1303。
在示例性实施例中，本公开实施例还提供了一种存储介质，是计算机可读存储介质，例如包括计算机程序的存储器1302，上述计算机程序可由BLDC反电势过零点阈值确定装置1300的处理器1301执行，以完成前述方法所述步骤。计算机可读存储介质可以是磁性随机存取存储器(FRAM，ferromagnetic random access memory)、只读存储器(ROM，Read Only Memory)、可编程只读存储器(PROM，Programmable Read-Only Memory)、可擦除可编程只读存储器(EPROM，Erasable Programmable Read-Only Memory)、电可擦除可编程只读存储器(EEPROM，Electrically Erasable Programmable Read-Only Memory)、快 闪存储器(Flash Memory)、磁表面存储器、光盘、或只读光盘(CD-ROM，Compact Disc Read-Only Memory)等存储器。
为了更好地说明本公开实施例的方案能够消除误差，进行了换相位置实验。
实验条件是：BLDC转速ω为20000r/min，并且
1、三相端电压分压电阻阻值偏移如表1所示：
Figure PCTCN2018124500-appb-000025
表1
2、电机电阻、电感参数不对称情况如表2所示：
  A相 B相 C相
电阻 RA＝38.1mΩ RB＝37.5mΩ RC＝43.5mΩ
电感 LA＝27.5uH LB＝27.2uH LC＝28.6uH
表2
由此，本实验是在两种非理想因素即三相端电压分压电阻阻值偏移且电机电阻、电感参数不对称的条件下进行的。
图14示出了使用本公开实施例的方案和未采用本公开实施例的方案的换相位置。其中，图14a示出了未使用本公开实施例的方案的条件下，三相端电压分压电阻阻值发生偏移且电机电阻、电感参数不对称的换相位置。从图14a可以看出：在两种非理想因素的影响下，BLDC反电势相邻扇区过零点角度间隔并非理想的60°，且换相位置不均匀，相电流存在明显波动。
图14b示出了使用本公开实施例的方案的条件下，三相端电压分压电阻的阻值发生偏移且电机电阻、电感参数不对称对的换相位置。从图14b可以看出：在采用本公开实施例的方案后，BLDC反电势相邻扇区过零点角度间隔均为60°，换相位置均匀，相电流波动消失。因此，反电势过零点阈值确定算法达到了自动、动态的矫正BLDC反电动势过零点的误差的目的。
需要说明的是：“第一”、“第二”等是用于区别类似的对象，而不必用于描述特定的顺序或先后次序。
另外，本公开实施例所记载的技术方案之间，在不冲突的情况下，可以任意组合。
以上所述，仅为本公开的较佳实施例而已，并非用于限定本公开的保护范围。

Claims (13)

  1. 一种无刷直流电机反电势过零点阈值确定方法，包括：
    检测所述无刷直流电机相邻两个扇区的反电势过零点时间间隔，得到至少两个第一时间间隔；
    利用得到的至少两个第一时间间隔，确定反电势过零点的误差；
    对确定的反电势过零点误差进行收敛，得到反电势过零点阈值矫正增量；
    利用得到的反电势过零点阈值矫正增量，确定反电势过零点阈值；确定的反电势零点阈值用于判断反电势是否过零。
  2. 根据权利要求1中所述的方法，其中，所述利用得到的至少两个第一时间间隔，确定反电势过零点的误差，包括：
    利用得到的至少两个第一时间间隔，并结合第一反电势信号半周期角度与第二反电势信号相应半周期角度的关系，确定所述无刷直流电机每相的第一误差，得到第一误差集；其中，所述第一反电势信号为理想反电势信号；所述第二反电势信号为实际反电势信号；
    对所述第一误差集中的误差进行收敛，得到反电势过零点零点阈值矫正增量。
  3. 根据权利要求1所述的方法，其中，所述利用得到的至少两个第一时间间隔，确定反电势过零点的误差，包括：
    利用得到的至少两个第一时间间隔，并结合第一反电势信号相邻两个扇区的零点角度间隔与第二反电势信号相应相邻两个扇区的零点角度间隔的关系，确定所述无刷直流电机每相的第二误差，得到第二误差集；其中所述第一反电势信号为理想反电势信号；所述第二反电势信号为实际反电势信号；
    对所述第二误差集中的误差进行收敛，得到反电势过零点零点阈值矫正增量。
  4. 根据权利要求1所述的方法，其中，所述利用得到的至少两个第一时间间隔，确定反电势过零点的误差，包括：
    利用得到的至少两个第一时间间隔，并结合第一反电势信号半周期角度与第二反电势信号相应半周期角度的关系，确定所述无刷直流电机每相的第一误差，得到第一误差集；并利用得到的至少两个第一时间间隔，并结合第一反电势信号相邻两个扇区的零点角度间隔与第二反电势信号相应相邻两个扇区的零点角度间隔的关系，确定所述无刷直流电机每相的第二误差，得到第二误差集；其中所述第一反电势信号为理想反电势信号；所述第二反电势信号为实际反电势信号；
    对所述第一误差集中的误差进行收敛，得到第一反电势过零点阈值矫正增量；并对所述第二误差集中的误差进行收敛，得到第二反电势过零点阈值矫正增量；
    利用所述第一反电势过零点阈值矫正增量和所述第二反电势过零点阈值矫正增量，确定反电势过零点阈值。
  5. 根据权利要求2或4所述的方法，其中，所述利用得到的至少两个第一时间间隔，并结合第一反电势信号半周期角度与第二反电势信号相应半周期角度的关系，确定所述无刷直流电机每相的第一误差，包括：
    利用得到的至少两个第一时间间隔，确定所述无刷直流电机本体的机械周期中半个周期对应的扇区的反电势过零点时间间隔，得到至少两个第二时间间隔；
    利用得到的至少两个第二时间间隔，并结合第一反电势信号半周期角度与第二反电势信号相应半周期角度的关系，确定所述无刷直流电机每相的第一误差。
  6. 根据权利要求1所述的方法，其中，所述对确定的反电势过零点误差信号进行收敛，得到反电势过零点矫正阈值矫正增量，包括：
    利用比例积分PI控制器对确定的反电势过零点误差信号进行收敛，得到反电势过零点矫正阈值矫正增量。
  7. 根据权利要求1所述的方法，其中，所述方法还包括：
    将端电压与确定的反电势过零点阈值进行比较，得到比较结果；
    根据比较结果，判断反电势是否过零。
  8. 一种无刷直流电机反电势过零点阈值确定装置，包括：
    检测单元，配置为检测所述无刷直流电机相邻两个扇区的反电势过零点时间间隔，得到至少两个第一时间间隔；
    第一确定单元，配置为利用得到的至少两个第一时间间隔，确定反电势过零点的误差；
    第二确定单元，配置为对确定的反电势过零点误差进行收敛，得到反电势过零点阈值矫正增量；
    第三确定单元，配置为利用所述反电势过零点阈值矫正增量，确定反电势过零点阈值；确定的反电势零点阈值用于判断反电势是否过零。
  9. 根据权利要求8中所述的装置，其中，包括：
    所述第一确定单元，配置为利用得到的至少两个第一时间间隔，并结合第一反电势信号半周期角度与第二反电势信号相应半周期角度的关系，确定所述无刷直流电机每相的第一误差，得到第一误差集；其中所述第一反电势信号为理想反电势信号；所述第二反电势信号为实际反电势信号；
    所述第二确定单元，配置为对确定的第一误差集中的误差进行收敛，得到反电势过零点零点阈值矫正增量。
  10. 根据权利要求8中所述的装置，其中，包括：
    所述第一确定单元，配置为利用得到的至少两个第一时间间隔，并结合第一反电势信号相邻两个扇区的零点角度间隔与第二反电势信号相应相邻两个扇区的零点角度间隔的关系，确定所述无刷直流电机每相的第二误差，得到第二误差集；其中所述第一反电势信号为理想反电势信号；所述第二反电势信号为实际反电势信号；
    所述第二确定单元，配置为对确定的第二误差集中的误差进行收敛，得到反电势过零点零点阈值矫正增量。
  11. 根据权利要求8中所述的装置，其中，包括：
    所述第一确定单元，配置为利用得到的至少两个第一时间间隔，并结合 第一反电势信号半周期角度与第二反电势信号相应半周期角度的关系，确定所述无刷直流电机每相的第一误差，得到第一误差集；并利用得到的至少两个第一时间间隔，并结合第一反电势信号相邻两个扇区的零点角度间隔与第二反电势信号相应相邻两个扇区的零点角度间隔的关系，确定所述无刷直流电机每相的第二误差，得到第二误差集；其中所述第一反电势信号为理想反电势信号；所述第二反电势信号为实际反电势信号；
    所述第二确定单元，配置为对确定的第一误差集中的误差进行收敛，得到第一反电势过零点阈值矫正增量；并对确定的第二误差集中的误差进行收敛，得到第二反电势过零点阈值矫正增量；
    第三确定单元，配置为利用所述第一反电势过零点阈值矫正增量和所述第二反电势过零点阈值矫正增量，确定反电势过零点阈值。
  12. 一种无刷直流电机反电势过零点阈值确定装置，包括：处理器和配置为存储能够在处理器上运行的计算机程序的存储器；
    其中，所述处理器配置为运行所述计算机程序时，执行权利要求1至7任一项所述方法的步骤。
  13. 一种存储介质，其上存储有计算机程序，所述计算机程序被处理器执行时实现权利要求1至7任一项所述方法的步骤。
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